1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 5 * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer, 13 * without modification. 14 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 15 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 16 * redistribution must be conditioned upon including a substantially 17 * similar Disclaimer requirement for further binary redistribution. 18 * 19 * NO WARRANTY 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 23 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 24 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 25 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 28 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGES. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* 37 * Driver for the Atheros Wireless LAN controller. 38 * 39 * This software is derived from work of Atsushi Onoe; his contribution 40 * is greatly appreciated. 41 */ 42 43 #include "opt_inet.h" 44 #include "opt_ath.h" 45 #include "opt_wlan.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/sysctl.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/lock.h> 53 #include <sys/mutex.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/sockio.h> 57 #include <sys/errno.h> 58 #include <sys/callout.h> 59 #include <sys/bus.h> 60 #include <sys/endian.h> 61 #include <sys/kthread.h> 62 #include <sys/taskqueue.h> 63 #include <sys/priv.h> 64 #include <sys/ktr.h> 65 66 #include <machine/bus.h> 67 68 #include <net/if.h> 69 #include <net/if_var.h> 70 #include <net/if_dl.h> 71 #include <net/if_media.h> 72 #include <net/if_types.h> 73 #include <net/if_arp.h> 74 #include <net/ethernet.h> 75 #include <net/if_llc.h> 76 77 #include <net80211/ieee80211_var.h> 78 #include <net80211/ieee80211_regdomain.h> 79 #ifdef IEEE80211_SUPPORT_SUPERG 80 #include <net80211/ieee80211_superg.h> 81 #endif 82 #ifdef IEEE80211_SUPPORT_TDMA 83 #include <net80211/ieee80211_tdma.h> 84 #endif 85 #include <net80211/ieee80211_ht.h> 86 87 #include <net/bpf.h> 88 89 #ifdef INET 90 #include <netinet/in.h> 91 #include <netinet/if_ether.h> 92 #endif 93 94 #include <dev/ath/if_athvar.h> 95 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 96 #include <dev/ath/ath_hal/ah_diagcodes.h> 97 98 #include <dev/ath/if_ath_debug.h> 99 100 #ifdef ATH_TX99_DIAG 101 #include <dev/ath/ath_tx99/ath_tx99.h> 102 #endif 103 104 #include <dev/ath/if_ath_misc.h> 105 #include <dev/ath/if_ath_tx.h> 106 #include <dev/ath/if_ath_tx_ht.h> 107 108 #ifdef ATH_DEBUG_ALQ 109 #include <dev/ath/if_ath_alq.h> 110 #endif 111 112 /* 113 * How many retries to perform in software 114 */ 115 #define SWMAX_RETRIES 10 116 117 /* 118 * What queue to throw the non-QoS TID traffic into 119 */ 120 #define ATH_NONQOS_TID_AC WME_AC_VO 121 122 #if 0 123 static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an); 124 #endif 125 static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, 126 int tid); 127 static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, 128 int tid); 129 static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc, 130 struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0); 131 static int ath_tx_action_frame_override_queue(struct ath_softc *sc, 132 struct ieee80211_node *ni, struct mbuf *m0, int *tid); 133 static struct ath_buf * 134 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 135 struct ath_tid *tid, struct ath_buf *bf); 136 137 #ifdef ATH_DEBUG_ALQ 138 void 139 ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first) 140 { 141 struct ath_buf *bf; 142 int i, n; 143 const char *ds; 144 145 /* XXX we should skip out early if debugging isn't enabled! */ 146 bf = bf_first; 147 148 while (bf != NULL) { 149 /* XXX should ensure bf_nseg > 0! */ 150 if (bf->bf_nseg == 0) 151 break; 152 n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1; 153 for (i = 0, ds = (const char *) bf->bf_desc; 154 i < n; 155 i++, ds += sc->sc_tx_desclen) { 156 if_ath_alq_post(&sc->sc_alq, 157 ATH_ALQ_EDMA_TXDESC, 158 sc->sc_tx_desclen, 159 ds); 160 } 161 bf = bf->bf_next; 162 } 163 } 164 #endif /* ATH_DEBUG_ALQ */ 165 166 /* 167 * Whether to use the 11n rate scenario functions or not 168 */ 169 static inline int 170 ath_tx_is_11n(struct ath_softc *sc) 171 { 172 return ((sc->sc_ah->ah_magic == 0x20065416) || 173 (sc->sc_ah->ah_magic == 0x19741014)); 174 } 175 176 /* 177 * Obtain the current TID from the given frame. 178 * 179 * Non-QoS frames get mapped to a TID so frames consistently 180 * go on a sensible queue. 181 */ 182 static int 183 ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0) 184 { 185 const struct ieee80211_frame *wh; 186 187 wh = mtod(m0, const struct ieee80211_frame *); 188 189 /* Non-QoS: map frame to a TID queue for software queueing */ 190 if (! IEEE80211_QOS_HAS_SEQ(wh)) 191 return (WME_AC_TO_TID(M_WME_GETAC(m0))); 192 193 /* QoS - fetch the TID from the header, ignore mbuf WME */ 194 return (ieee80211_gettid(wh)); 195 } 196 197 static void 198 ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf) 199 { 200 struct ieee80211_frame *wh; 201 202 wh = mtod(bf->bf_m, struct ieee80211_frame *); 203 /* Only update/resync if needed */ 204 if (bf->bf_state.bfs_isretried == 0) { 205 wh->i_fc[1] |= IEEE80211_FC1_RETRY; 206 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 207 BUS_DMASYNC_PREWRITE); 208 } 209 bf->bf_state.bfs_isretried = 1; 210 bf->bf_state.bfs_retries ++; 211 } 212 213 /* 214 * Determine what the correct AC queue for the given frame 215 * should be. 216 * 217 * For QoS frames, obey the TID. That way things like 218 * management frames that are related to a given TID 219 * are thus serialised with the rest of the TID traffic, 220 * regardless of net80211 overriding priority. 221 * 222 * For non-QoS frames, return the mbuf WMI priority. 223 * 224 * This has implications that higher priority non-QoS traffic 225 * may end up being scheduled before other non-QoS traffic, 226 * leading to out-of-sequence packets being emitted. 227 * 228 * (It'd be nice to log/count this so we can see if it 229 * really is a problem.) 230 * 231 * TODO: maybe we should throw multicast traffic, QoS or 232 * otherwise, into a separate TX queue? 233 */ 234 static int 235 ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0) 236 { 237 const struct ieee80211_frame *wh; 238 239 wh = mtod(m0, const struct ieee80211_frame *); 240 241 /* 242 * QoS data frame (sequence number or otherwise) - 243 * return hardware queue mapping for the underlying 244 * TID. 245 */ 246 if (IEEE80211_QOS_HAS_SEQ(wh)) 247 return TID_TO_WME_AC(ieee80211_gettid(wh)); 248 249 /* 250 * Otherwise - return mbuf QoS pri. 251 */ 252 return (M_WME_GETAC(m0)); 253 } 254 255 void 256 ath_txfrag_cleanup(struct ath_softc *sc, 257 ath_bufhead *frags, struct ieee80211_node *ni) 258 { 259 struct ath_buf *bf, *next; 260 261 ATH_TXBUF_LOCK_ASSERT(sc); 262 263 TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) { 264 /* NB: bf assumed clean */ 265 TAILQ_REMOVE(frags, bf, bf_list); 266 ath_returnbuf_head(sc, bf); 267 ieee80211_node_decref(ni); 268 } 269 } 270 271 /* 272 * Setup xmit of a fragmented frame. Allocate a buffer 273 * for each frag and bump the node reference count to 274 * reflect the held reference to be setup by ath_tx_start. 275 */ 276 int 277 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags, 278 struct mbuf *m0, struct ieee80211_node *ni) 279 { 280 struct mbuf *m; 281 struct ath_buf *bf; 282 283 ATH_TXBUF_LOCK(sc); 284 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) { 285 /* XXX non-management? */ 286 bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL); 287 if (bf == NULL) { /* out of buffers, cleanup */ 288 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n", 289 __func__); 290 ath_txfrag_cleanup(sc, frags, ni); 291 break; 292 } 293 ieee80211_node_incref(ni); 294 TAILQ_INSERT_TAIL(frags, bf, bf_list); 295 } 296 ATH_TXBUF_UNLOCK(sc); 297 298 return !TAILQ_EMPTY(frags); 299 } 300 301 static int 302 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0) 303 { 304 struct mbuf *m; 305 int error; 306 307 /* 308 * Load the DMA map so any coalescing is done. This 309 * also calculates the number of descriptors we need. 310 */ 311 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 312 bf->bf_segs, &bf->bf_nseg, 313 BUS_DMA_NOWAIT); 314 if (error == EFBIG) { 315 /* XXX packet requires too many descriptors */ 316 bf->bf_nseg = ATH_MAX_SCATTER + 1; 317 } else if (error != 0) { 318 sc->sc_stats.ast_tx_busdma++; 319 ieee80211_free_mbuf(m0); 320 return error; 321 } 322 /* 323 * Discard null packets and check for packets that 324 * require too many TX descriptors. We try to convert 325 * the latter to a cluster. 326 */ 327 if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */ 328 sc->sc_stats.ast_tx_linear++; 329 m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER); 330 if (m == NULL) { 331 ieee80211_free_mbuf(m0); 332 sc->sc_stats.ast_tx_nombuf++; 333 return ENOMEM; 334 } 335 m0 = m; 336 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 337 bf->bf_segs, &bf->bf_nseg, 338 BUS_DMA_NOWAIT); 339 if (error != 0) { 340 sc->sc_stats.ast_tx_busdma++; 341 ieee80211_free_mbuf(m0); 342 return error; 343 } 344 KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER, 345 ("too many segments after defrag; nseg %u", bf->bf_nseg)); 346 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 347 sc->sc_stats.ast_tx_nodata++; 348 ieee80211_free_mbuf(m0); 349 return EIO; 350 } 351 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n", 352 __func__, m0, m0->m_pkthdr.len); 353 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 354 bf->bf_m = m0; 355 356 return 0; 357 } 358 359 /* 360 * Chain together segments+descriptors for a frame - 11n or otherwise. 361 * 362 * For aggregates, this is called on each frame in the aggregate. 363 */ 364 static void 365 ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0, 366 struct ath_buf *bf, int is_aggr, int is_first_subframe, 367 int is_last_subframe) 368 { 369 struct ath_hal *ah = sc->sc_ah; 370 char *ds; 371 int i, bp, dsp; 372 HAL_DMA_ADDR bufAddrList[4]; 373 uint32_t segLenList[4]; 374 int numTxMaps = 1; 375 int isFirstDesc = 1; 376 377 /* 378 * XXX There's txdma and txdma_mgmt; the descriptor 379 * sizes must match. 380 */ 381 struct ath_descdma *dd = &sc->sc_txdma; 382 383 /* 384 * Fillin the remainder of the descriptor info. 385 */ 386 387 /* 388 * We need the number of TX data pointers in each descriptor. 389 * EDMA and later chips support 4 TX buffers per descriptor; 390 * previous chips just support one. 391 */ 392 numTxMaps = sc->sc_tx_nmaps; 393 394 /* 395 * For EDMA and later chips ensure the TX map is fully populated 396 * before advancing to the next descriptor. 397 */ 398 ds = (char *) bf->bf_desc; 399 bp = dsp = 0; 400 bzero(bufAddrList, sizeof(bufAddrList)); 401 bzero(segLenList, sizeof(segLenList)); 402 for (i = 0; i < bf->bf_nseg; i++) { 403 bufAddrList[bp] = bf->bf_segs[i].ds_addr; 404 segLenList[bp] = bf->bf_segs[i].ds_len; 405 bp++; 406 407 /* 408 * Go to the next segment if this isn't the last segment 409 * and there's space in the current TX map. 410 */ 411 if ((i != bf->bf_nseg - 1) && (bp < numTxMaps)) 412 continue; 413 414 /* 415 * Last segment or we're out of buffer pointers. 416 */ 417 bp = 0; 418 419 if (i == bf->bf_nseg - 1) 420 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 421 else 422 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 423 bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 424 425 /* 426 * XXX This assumes that bfs_txq is the actual destination 427 * hardware queue at this point. It may not have been 428 * assigned, it may actually be pointing to the multicast 429 * software TXQ id. These must be fixed! 430 */ 431 ath_hal_filltxdesc(ah, (struct ath_desc *) ds 432 , bufAddrList 433 , segLenList 434 , bf->bf_descid /* XXX desc id */ 435 , bf->bf_state.bfs_tx_queue 436 , isFirstDesc /* first segment */ 437 , i == bf->bf_nseg - 1 /* last segment */ 438 , (struct ath_desc *) ds0 /* first descriptor */ 439 ); 440 441 /* 442 * Make sure the 11n aggregate fields are cleared. 443 * 444 * XXX TODO: this doesn't need to be called for 445 * aggregate frames; as it'll be called on all 446 * sub-frames. Since the descriptors are in 447 * non-cacheable memory, this leads to some 448 * rather slow writes on MIPS/ARM platforms. 449 */ 450 if (ath_tx_is_11n(sc)) 451 ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds); 452 453 /* 454 * If 11n is enabled, set it up as if it's an aggregate 455 * frame. 456 */ 457 if (is_last_subframe) { 458 ath_hal_set11n_aggr_last(sc->sc_ah, 459 (struct ath_desc *) ds); 460 } else if (is_aggr) { 461 /* 462 * This clears the aggrlen field; so 463 * the caller needs to call set_aggr_first()! 464 * 465 * XXX TODO: don't call this for the first 466 * descriptor in the first frame in an 467 * aggregate! 468 */ 469 ath_hal_set11n_aggr_middle(sc->sc_ah, 470 (struct ath_desc *) ds, 471 bf->bf_state.bfs_ndelim); 472 } 473 isFirstDesc = 0; 474 bf->bf_lastds = (struct ath_desc *) ds; 475 476 /* 477 * Don't forget to skip to the next descriptor. 478 */ 479 ds += sc->sc_tx_desclen; 480 dsp++; 481 482 /* 483 * .. and don't forget to blank these out! 484 */ 485 bzero(bufAddrList, sizeof(bufAddrList)); 486 bzero(segLenList, sizeof(segLenList)); 487 } 488 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 489 } 490 491 /* 492 * Set the rate control fields in the given descriptor based on 493 * the bf_state fields and node state. 494 * 495 * The bfs fields should already be set with the relevant rate 496 * control information, including whether MRR is to be enabled. 497 * 498 * Since the FreeBSD HAL currently sets up the first TX rate 499 * in ath_hal_setuptxdesc(), this will setup the MRR 500 * conditionally for the pre-11n chips, and call ath_buf_set_rate 501 * unconditionally for 11n chips. These require the 11n rate 502 * scenario to be set if MCS rates are enabled, so it's easier 503 * to just always call it. The caller can then only set rates 2, 3 504 * and 4 if multi-rate retry is needed. 505 */ 506 static void 507 ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni, 508 struct ath_buf *bf) 509 { 510 struct ath_rc_series *rc = bf->bf_state.bfs_rc; 511 512 /* If mrr is disabled, blank tries 1, 2, 3 */ 513 if (! bf->bf_state.bfs_ismrr) 514 rc[1].tries = rc[2].tries = rc[3].tries = 0; 515 516 #if 0 517 /* 518 * If NOACK is set, just set ntries=1. 519 */ 520 else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) { 521 rc[1].tries = rc[2].tries = rc[3].tries = 0; 522 rc[0].tries = 1; 523 } 524 #endif 525 526 /* 527 * Always call - that way a retried descriptor will 528 * have the MRR fields overwritten. 529 * 530 * XXX TODO: see if this is really needed - setting up 531 * the first descriptor should set the MRR fields to 0 532 * for us anyway. 533 */ 534 if (ath_tx_is_11n(sc)) { 535 ath_buf_set_rate(sc, ni, bf); 536 } else { 537 ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc 538 , rc[1].ratecode, rc[1].tries 539 , rc[2].ratecode, rc[2].tries 540 , rc[3].ratecode, rc[3].tries 541 ); 542 } 543 } 544 545 /* 546 * Setup segments+descriptors for an 11n aggregate. 547 * bf_first is the first buffer in the aggregate. 548 * The descriptor list must already been linked together using 549 * bf->bf_next. 550 */ 551 static void 552 ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first) 553 { 554 struct ath_buf *bf, *bf_prev = NULL; 555 struct ath_desc *ds0 = bf_first->bf_desc; 556 557 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n", 558 __func__, bf_first->bf_state.bfs_nframes, 559 bf_first->bf_state.bfs_al); 560 561 bf = bf_first; 562 563 if (bf->bf_state.bfs_txrate0 == 0) 564 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n", 565 __func__, bf, 0); 566 if (bf->bf_state.bfs_rc[0].ratecode == 0) 567 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n", 568 __func__, bf, 0); 569 570 /* 571 * Setup all descriptors of all subframes - this will 572 * call ath_hal_set11naggrmiddle() on every frame. 573 */ 574 while (bf != NULL) { 575 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 576 "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n", 577 __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen, 578 SEQNO(bf->bf_state.bfs_seqno)); 579 580 /* 581 * Setup the initial fields for the first descriptor - all 582 * the non-11n specific stuff. 583 */ 584 ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc 585 , bf->bf_state.bfs_pktlen /* packet length */ 586 , bf->bf_state.bfs_hdrlen /* header length */ 587 , bf->bf_state.bfs_atype /* Atheros packet type */ 588 , bf->bf_state.bfs_txpower /* txpower */ 589 , bf->bf_state.bfs_txrate0 590 , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 591 , bf->bf_state.bfs_keyix /* key cache index */ 592 , bf->bf_state.bfs_txantenna /* antenna mode */ 593 , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */ 594 , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 595 , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 596 ); 597 598 /* 599 * First descriptor? Setup the rate control and initial 600 * aggregate header information. 601 */ 602 if (bf == bf_first) { 603 /* 604 * setup first desc with rate and aggr info 605 */ 606 ath_tx_set_ratectrl(sc, bf->bf_node, bf); 607 } 608 609 /* 610 * Setup the descriptors for a multi-descriptor frame. 611 * This is both aggregate and non-aggregate aware. 612 */ 613 ath_tx_chaindesclist(sc, ds0, bf, 614 1, /* is_aggr */ 615 !! (bf == bf_first), /* is_first_subframe */ 616 !! (bf->bf_next == NULL) /* is_last_subframe */ 617 ); 618 619 if (bf == bf_first) { 620 /* 621 * Initialise the first 11n aggregate with the 622 * aggregate length and aggregate enable bits. 623 */ 624 ath_hal_set11n_aggr_first(sc->sc_ah, 625 ds0, 626 bf->bf_state.bfs_al, 627 bf->bf_state.bfs_ndelim); 628 } 629 630 /* 631 * Link the last descriptor of the previous frame 632 * to the beginning descriptor of this frame. 633 */ 634 if (bf_prev != NULL) 635 ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds, 636 bf->bf_daddr); 637 638 /* Save a copy so we can link the next descriptor in */ 639 bf_prev = bf; 640 bf = bf->bf_next; 641 } 642 643 /* 644 * Set the first descriptor bf_lastds field to point to 645 * the last descriptor in the last subframe, that's where 646 * the status update will occur. 647 */ 648 bf_first->bf_lastds = bf_prev->bf_lastds; 649 650 /* 651 * And bf_last in the first descriptor points to the end of 652 * the aggregate list. 653 */ 654 bf_first->bf_last = bf_prev; 655 656 /* 657 * For non-AR9300 NICs, which require the rate control 658 * in the final descriptor - let's set that up now. 659 * 660 * This is because the filltxdesc() HAL call doesn't 661 * populate the last segment with rate control information 662 * if firstSeg is also true. For non-aggregate frames 663 * that is fine, as the first frame already has rate control 664 * info. But if the last frame in an aggregate has one 665 * descriptor, both firstseg and lastseg will be true and 666 * the rate info isn't copied. 667 * 668 * This is inefficient on MIPS/ARM platforms that have 669 * non-cachable memory for TX descriptors, but we'll just 670 * make do for now. 671 * 672 * As to why the rate table is stashed in the last descriptor 673 * rather than the first descriptor? Because proctxdesc() 674 * is called on the final descriptor in an MPDU or A-MPDU - 675 * ie, the one that gets updated by the hardware upon 676 * completion. That way proctxdesc() doesn't need to know 677 * about the first _and_ last TX descriptor. 678 */ 679 ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0); 680 681 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__); 682 } 683 684 /* 685 * Hand-off a frame to the multicast TX queue. 686 * 687 * This is a software TXQ which will be appended to the CAB queue 688 * during the beacon setup code. 689 * 690 * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID 691 * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated 692 * with the actual hardware txq, or all of this will fall apart. 693 * 694 * XXX It may not be a bad idea to just stuff the QCU ID into bf_state 695 * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated 696 * correctly. 697 */ 698 static void 699 ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 700 struct ath_buf *bf) 701 { 702 ATH_TX_LOCK_ASSERT(sc); 703 704 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 705 ("%s: busy status 0x%x", __func__, bf->bf_flags)); 706 707 /* 708 * Ensure that the tx queue is the cabq, so things get 709 * mapped correctly. 710 */ 711 if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) { 712 DPRINTF(sc, ATH_DEBUG_XMIT, 713 "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 714 __func__, bf, bf->bf_state.bfs_tx_queue, 715 txq->axq_qnum); 716 } 717 718 ATH_TXQ_LOCK(txq); 719 if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) { 720 struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s); 721 struct ieee80211_frame *wh; 722 723 /* mark previous frame */ 724 wh = mtod(bf_last->bf_m, struct ieee80211_frame *); 725 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 726 bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap, 727 BUS_DMASYNC_PREWRITE); 728 729 /* link descriptor */ 730 ath_hal_settxdesclink(sc->sc_ah, 731 bf_last->bf_lastds, 732 bf->bf_daddr); 733 } 734 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 735 ATH_TXQ_UNLOCK(txq); 736 } 737 738 /* 739 * Hand-off packet to a hardware queue. 740 */ 741 static void 742 ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 743 struct ath_buf *bf) 744 { 745 struct ath_hal *ah = sc->sc_ah; 746 struct ath_buf *bf_first; 747 748 /* 749 * Insert the frame on the outbound list and pass it on 750 * to the hardware. Multicast frames buffered for power 751 * save stations and transmit from the CAB queue are stored 752 * on a s/w only queue and loaded on to the CAB queue in 753 * the SWBA handler since frames only go out on DTIM and 754 * to avoid possible races. 755 */ 756 ATH_TX_LOCK_ASSERT(sc); 757 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 758 ("%s: busy status 0x%x", __func__, bf->bf_flags)); 759 KASSERT(txq->axq_qnum != ATH_TXQ_SWQ, 760 ("ath_tx_handoff_hw called for mcast queue")); 761 762 /* 763 * XXX We should instead just verify that sc_txstart_cnt 764 * or ath_txproc_cnt > 0. That would mean that 765 * the reset is going to be waiting for us to complete. 766 */ 767 if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) { 768 device_printf(sc->sc_dev, 769 "%s: TX dispatch without holding txcount/txstart refcnt!\n", 770 __func__); 771 } 772 773 /* 774 * XXX .. this is going to cause the hardware to get upset; 775 * so we really should find some way to drop or queue 776 * things. 777 */ 778 779 ATH_TXQ_LOCK(txq); 780 781 /* 782 * XXX TODO: if there's a holdingbf, then 783 * ATH_TXQ_PUTRUNNING should be clear. 784 * 785 * If there is a holdingbf and the list is empty, 786 * then axq_link should be pointing to the holdingbf. 787 * 788 * Otherwise it should point to the last descriptor 789 * in the last ath_buf. 790 * 791 * In any case, we should really ensure that we 792 * update the previous descriptor link pointer to 793 * this descriptor, regardless of all of the above state. 794 * 795 * For now this is captured by having axq_link point 796 * to either the holdingbf (if the TXQ list is empty) 797 * or the end of the list (if the TXQ list isn't empty.) 798 * I'd rather just kill axq_link here and do it as above. 799 */ 800 801 /* 802 * Append the frame to the TX queue. 803 */ 804 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 805 ATH_KTR(sc, ATH_KTR_TX, 3, 806 "ath_tx_handoff: non-tdma: txq=%u, add bf=%p " 807 "depth=%d", 808 txq->axq_qnum, 809 bf, 810 txq->axq_depth); 811 812 /* 813 * If there's a link pointer, update it. 814 * 815 * XXX we should replace this with the above logic, just 816 * to kill axq_link with fire. 817 */ 818 if (txq->axq_link != NULL) { 819 *txq->axq_link = bf->bf_daddr; 820 DPRINTF(sc, ATH_DEBUG_XMIT, 821 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 822 txq->axq_qnum, txq->axq_link, 823 (caddr_t)bf->bf_daddr, bf->bf_desc, 824 txq->axq_depth); 825 ATH_KTR(sc, ATH_KTR_TX, 5, 826 "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) " 827 "lastds=%d", 828 txq->axq_qnum, txq->axq_link, 829 (caddr_t)bf->bf_daddr, bf->bf_desc, 830 bf->bf_lastds); 831 } 832 833 /* 834 * If we've not pushed anything into the hardware yet, 835 * push the head of the queue into the TxDP. 836 * 837 * Once we've started DMA, there's no guarantee that 838 * updating the TxDP with a new value will actually work. 839 * So we just don't do that - if we hit the end of the list, 840 * we keep that buffer around (the "holding buffer") and 841 * re-start DMA by updating the link pointer of _that_ 842 * descriptor and then restart DMA. 843 */ 844 if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) { 845 bf_first = TAILQ_FIRST(&txq->axq_q); 846 txq->axq_flags |= ATH_TXQ_PUTRUNNING; 847 ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr); 848 DPRINTF(sc, ATH_DEBUG_XMIT, 849 "%s: TXDP[%u] = %p (%p) depth %d\n", 850 __func__, txq->axq_qnum, 851 (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 852 txq->axq_depth); 853 ATH_KTR(sc, ATH_KTR_TX, 5, 854 "ath_tx_handoff: TXDP[%u] = %p (%p) " 855 "lastds=%p depth %d", 856 txq->axq_qnum, 857 (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 858 bf_first->bf_lastds, 859 txq->axq_depth); 860 } 861 862 /* 863 * Ensure that the bf TXQ matches this TXQ, so later 864 * checking and holding buffer manipulation is sane. 865 */ 866 if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) { 867 DPRINTF(sc, ATH_DEBUG_XMIT, 868 "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 869 __func__, bf, bf->bf_state.bfs_tx_queue, 870 txq->axq_qnum); 871 } 872 873 /* 874 * Track aggregate queue depth. 875 */ 876 if (bf->bf_state.bfs_aggr) 877 txq->axq_aggr_depth++; 878 879 /* 880 * Update the link pointer. 881 */ 882 ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); 883 884 /* 885 * Start DMA. 886 * 887 * If we wrote a TxDP above, DMA will start from here. 888 * 889 * If DMA is running, it'll do nothing. 890 * 891 * If the DMA engine hit the end of the QCU list (ie LINK=NULL, 892 * or VEOL) then it stops at the last transmitted write. 893 * We then append a new frame by updating the link pointer 894 * in that descriptor and then kick TxE here; it will re-read 895 * that last descriptor and find the new descriptor to transmit. 896 * 897 * This is why we keep the holding descriptor around. 898 */ 899 ath_hal_txstart(ah, txq->axq_qnum); 900 ATH_TXQ_UNLOCK(txq); 901 ATH_KTR(sc, ATH_KTR_TX, 1, 902 "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum); 903 } 904 905 /* 906 * Restart TX DMA for the given TXQ. 907 * 908 * This must be called whether the queue is empty or not. 909 */ 910 static void 911 ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq) 912 { 913 struct ath_buf *bf, *bf_last; 914 915 ATH_TXQ_LOCK_ASSERT(txq); 916 917 /* XXX make this ATH_TXQ_FIRST */ 918 bf = TAILQ_FIRST(&txq->axq_q); 919 bf_last = ATH_TXQ_LAST(txq, axq_q_s); 920 921 if (bf == NULL) 922 return; 923 924 DPRINTF(sc, ATH_DEBUG_RESET, 925 "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n", 926 __func__, 927 txq->axq_qnum, 928 bf, 929 bf_last, 930 (uint32_t) bf->bf_daddr); 931 932 #ifdef ATH_DEBUG 933 if (sc->sc_debug & ATH_DEBUG_RESET) 934 ath_tx_dump(sc, txq); 935 #endif 936 937 /* 938 * This is called from a restart, so DMA is known to be 939 * completely stopped. 940 */ 941 KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)), 942 ("%s: Q%d: called with PUTRUNNING=1\n", 943 __func__, 944 txq->axq_qnum)); 945 946 ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr); 947 txq->axq_flags |= ATH_TXQ_PUTRUNNING; 948 949 ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds, 950 &txq->axq_link); 951 ath_hal_txstart(sc->sc_ah, txq->axq_qnum); 952 } 953 954 /* 955 * Hand off a packet to the hardware (or mcast queue.) 956 * 957 * The relevant hardware txq should be locked. 958 */ 959 static void 960 ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq, 961 struct ath_buf *bf) 962 { 963 ATH_TX_LOCK_ASSERT(sc); 964 965 #ifdef ATH_DEBUG_ALQ 966 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC)) 967 ath_tx_alq_post(sc, bf); 968 #endif 969 970 if (txq->axq_qnum == ATH_TXQ_SWQ) 971 ath_tx_handoff_mcast(sc, txq, bf); 972 else 973 ath_tx_handoff_hw(sc, txq, bf); 974 } 975 976 static int 977 ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni, 978 struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen, 979 int *keyix) 980 { 981 DPRINTF(sc, ATH_DEBUG_XMIT, 982 "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n", 983 __func__, 984 *hdrlen, 985 *pktlen, 986 isfrag, 987 iswep, 988 m0); 989 990 if (iswep) { 991 const struct ieee80211_cipher *cip; 992 struct ieee80211_key *k; 993 994 /* 995 * Construct the 802.11 header+trailer for an encrypted 996 * frame. The only reason this can fail is because of an 997 * unknown or unsupported cipher/key type. 998 */ 999 k = ieee80211_crypto_encap(ni, m0); 1000 if (k == NULL) { 1001 /* 1002 * This can happen when the key is yanked after the 1003 * frame was queued. Just discard the frame; the 1004 * 802.11 layer counts failures and provides 1005 * debugging/diagnostics. 1006 */ 1007 return (0); 1008 } 1009 /* 1010 * Adjust the packet + header lengths for the crypto 1011 * additions and calculate the h/w key index. When 1012 * a s/w mic is done the frame will have had any mic 1013 * added to it prior to entry so m0->m_pkthdr.len will 1014 * account for it. Otherwise we need to add it to the 1015 * packet length. 1016 */ 1017 cip = k->wk_cipher; 1018 (*hdrlen) += cip->ic_header; 1019 (*pktlen) += cip->ic_header + cip->ic_trailer; 1020 /* NB: frags always have any TKIP MIC done in s/w */ 1021 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag) 1022 (*pktlen) += cip->ic_miclen; 1023 (*keyix) = k->wk_keyix; 1024 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) { 1025 /* 1026 * Use station key cache slot, if assigned. 1027 */ 1028 (*keyix) = ni->ni_ucastkey.wk_keyix; 1029 if ((*keyix) == IEEE80211_KEYIX_NONE) 1030 (*keyix) = HAL_TXKEYIX_INVALID; 1031 } else 1032 (*keyix) = HAL_TXKEYIX_INVALID; 1033 1034 return (1); 1035 } 1036 1037 /* 1038 * Calculate whether interoperability protection is required for 1039 * this frame. 1040 * 1041 * This requires the rate control information be filled in, 1042 * as the protection requirement depends upon the current 1043 * operating mode / PHY. 1044 */ 1045 static void 1046 ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf) 1047 { 1048 struct ieee80211_frame *wh; 1049 uint8_t rix; 1050 uint16_t flags; 1051 int shortPreamble; 1052 const HAL_RATE_TABLE *rt = sc->sc_currates; 1053 struct ieee80211com *ic = &sc->sc_ic; 1054 1055 flags = bf->bf_state.bfs_txflags; 1056 rix = bf->bf_state.bfs_rc[0].rix; 1057 shortPreamble = bf->bf_state.bfs_shpream; 1058 wh = mtod(bf->bf_m, struct ieee80211_frame *); 1059 1060 /* Disable frame protection for TOA probe frames */ 1061 if (bf->bf_flags & ATH_BUF_TOA_PROBE) { 1062 /* XXX count */ 1063 flags &= ~(HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA); 1064 bf->bf_state.bfs_doprot = 0; 1065 goto finish; 1066 } 1067 1068 /* 1069 * If 802.11g protection is enabled, determine whether 1070 * to use RTS/CTS or just CTS. Note that this is only 1071 * done for OFDM unicast frames. 1072 */ 1073 if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1074 rt->info[rix].phy == IEEE80211_T_OFDM && 1075 (flags & HAL_TXDESC_NOACK) == 0) { 1076 bf->bf_state.bfs_doprot = 1; 1077 /* XXX fragments must use CCK rates w/ protection */ 1078 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1079 flags |= HAL_TXDESC_RTSENA; 1080 } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1081 flags |= HAL_TXDESC_CTSENA; 1082 } 1083 /* 1084 * For frags it would be desirable to use the 1085 * highest CCK rate for RTS/CTS. But stations 1086 * farther away may detect it at a lower CCK rate 1087 * so use the configured protection rate instead 1088 * (for now). 1089 */ 1090 sc->sc_stats.ast_tx_protect++; 1091 } 1092 1093 /* 1094 * If 11n protection is enabled and it's a HT frame, 1095 * enable RTS. 1096 * 1097 * XXX ic_htprotmode or ic_curhtprotmode? 1098 * XXX should it_htprotmode only matter if ic_curhtprotmode 1099 * XXX indicates it's not a HT pure environment? 1100 */ 1101 if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) && 1102 rt->info[rix].phy == IEEE80211_T_HT && 1103 (flags & HAL_TXDESC_NOACK) == 0) { 1104 flags |= HAL_TXDESC_RTSENA; 1105 sc->sc_stats.ast_tx_htprotect++; 1106 } 1107 1108 finish: 1109 bf->bf_state.bfs_txflags = flags; 1110 } 1111 1112 /* 1113 * Update the frame duration given the currently selected rate. 1114 * 1115 * This also updates the frame duration value, so it will require 1116 * a DMA flush. 1117 */ 1118 static void 1119 ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf) 1120 { 1121 struct ieee80211_frame *wh; 1122 uint8_t rix; 1123 uint16_t flags; 1124 int shortPreamble; 1125 struct ath_hal *ah = sc->sc_ah; 1126 const HAL_RATE_TABLE *rt = sc->sc_currates; 1127 int isfrag = bf->bf_m->m_flags & M_FRAG; 1128 1129 flags = bf->bf_state.bfs_txflags; 1130 rix = bf->bf_state.bfs_rc[0].rix; 1131 shortPreamble = bf->bf_state.bfs_shpream; 1132 wh = mtod(bf->bf_m, struct ieee80211_frame *); 1133 1134 /* 1135 * Calculate duration. This logically belongs in the 802.11 1136 * layer but it lacks sufficient information to calculate it. 1137 */ 1138 if ((flags & HAL_TXDESC_NOACK) == 0 && 1139 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 1140 u_int16_t dur; 1141 if (shortPreamble) 1142 dur = rt->info[rix].spAckDuration; 1143 else 1144 dur = rt->info[rix].lpAckDuration; 1145 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) { 1146 dur += dur; /* additional SIFS+ACK */ 1147 /* 1148 * Include the size of next fragment so NAV is 1149 * updated properly. The last fragment uses only 1150 * the ACK duration 1151 * 1152 * XXX TODO: ensure that the rate lookup for each 1153 * fragment is the same as the rate used by the 1154 * first fragment! 1155 */ 1156 dur += ath_hal_computetxtime(ah, 1157 rt, 1158 bf->bf_nextfraglen, 1159 rix, shortPreamble, 1160 AH_TRUE); 1161 } 1162 if (isfrag) { 1163 /* 1164 * Force hardware to use computed duration for next 1165 * fragment by disabling multi-rate retry which updates 1166 * duration based on the multi-rate duration table. 1167 */ 1168 bf->bf_state.bfs_ismrr = 0; 1169 bf->bf_state.bfs_try0 = ATH_TXMGTTRY; 1170 /* XXX update bfs_rc[0].try? */ 1171 } 1172 1173 /* Update the duration field itself */ 1174 *(u_int16_t *)wh->i_dur = htole16(dur); 1175 } 1176 } 1177 1178 static uint8_t 1179 ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt, 1180 int cix, int shortPreamble) 1181 { 1182 uint8_t ctsrate; 1183 1184 /* 1185 * CTS transmit rate is derived from the transmit rate 1186 * by looking in the h/w rate table. We must also factor 1187 * in whether or not a short preamble is to be used. 1188 */ 1189 /* NB: cix is set above where RTS/CTS is enabled */ 1190 KASSERT(cix != 0xff, ("cix not setup")); 1191 ctsrate = rt->info[cix].rateCode; 1192 1193 /* XXX this should only matter for legacy rates */ 1194 if (shortPreamble) 1195 ctsrate |= rt->info[cix].shortPreamble; 1196 1197 return (ctsrate); 1198 } 1199 1200 /* 1201 * Calculate the RTS/CTS duration for legacy frames. 1202 */ 1203 static int 1204 ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix, 1205 int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt, 1206 int flags) 1207 { 1208 int ctsduration = 0; 1209 1210 /* This mustn't be called for HT modes */ 1211 if (rt->info[cix].phy == IEEE80211_T_HT) { 1212 printf("%s: HT rate where it shouldn't be (0x%x)\n", 1213 __func__, rt->info[cix].rateCode); 1214 return (-1); 1215 } 1216 1217 /* 1218 * Compute the transmit duration based on the frame 1219 * size and the size of an ACK frame. We call into the 1220 * HAL to do the computation since it depends on the 1221 * characteristics of the actual PHY being used. 1222 * 1223 * NB: CTS is assumed the same size as an ACK so we can 1224 * use the precalculated ACK durations. 1225 */ 1226 if (shortPreamble) { 1227 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1228 ctsduration += rt->info[cix].spAckDuration; 1229 ctsduration += ath_hal_computetxtime(ah, 1230 rt, pktlen, rix, AH_TRUE, AH_TRUE); 1231 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1232 ctsduration += rt->info[rix].spAckDuration; 1233 } else { 1234 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1235 ctsduration += rt->info[cix].lpAckDuration; 1236 ctsduration += ath_hal_computetxtime(ah, 1237 rt, pktlen, rix, AH_FALSE, AH_TRUE); 1238 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1239 ctsduration += rt->info[rix].lpAckDuration; 1240 } 1241 1242 return (ctsduration); 1243 } 1244 1245 /* 1246 * Update the given ath_buf with updated rts/cts setup and duration 1247 * values. 1248 * 1249 * To support rate lookups for each software retry, the rts/cts rate 1250 * and cts duration must be re-calculated. 1251 * 1252 * This function assumes the RTS/CTS flags have been set as needed; 1253 * mrr has been disabled; and the rate control lookup has been done. 1254 * 1255 * XXX TODO: MRR need only be disabled for the pre-11n NICs. 1256 * XXX The 11n NICs support per-rate RTS/CTS configuration. 1257 */ 1258 static void 1259 ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf) 1260 { 1261 uint16_t ctsduration = 0; 1262 uint8_t ctsrate = 0; 1263 uint8_t rix = bf->bf_state.bfs_rc[0].rix; 1264 uint8_t cix = 0; 1265 const HAL_RATE_TABLE *rt = sc->sc_currates; 1266 1267 /* 1268 * No RTS/CTS enabled? Don't bother. 1269 */ 1270 if ((bf->bf_state.bfs_txflags & 1271 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) { 1272 /* XXX is this really needed? */ 1273 bf->bf_state.bfs_ctsrate = 0; 1274 bf->bf_state.bfs_ctsduration = 0; 1275 return; 1276 } 1277 1278 /* 1279 * If protection is enabled, use the protection rix control 1280 * rate. Otherwise use the rate0 control rate. 1281 */ 1282 if (bf->bf_state.bfs_doprot) 1283 rix = sc->sc_protrix; 1284 else 1285 rix = bf->bf_state.bfs_rc[0].rix; 1286 1287 /* 1288 * If the raw path has hard-coded ctsrate0 to something, 1289 * use it. 1290 */ 1291 if (bf->bf_state.bfs_ctsrate0 != 0) 1292 cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0); 1293 else 1294 /* Control rate from above */ 1295 cix = rt->info[rix].controlRate; 1296 1297 /* Calculate the rtscts rate for the given cix */ 1298 ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix, 1299 bf->bf_state.bfs_shpream); 1300 1301 /* The 11n chipsets do ctsduration calculations for you */ 1302 if (! ath_tx_is_11n(sc)) 1303 ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix, 1304 bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen, 1305 rt, bf->bf_state.bfs_txflags); 1306 1307 /* Squirrel away in ath_buf */ 1308 bf->bf_state.bfs_ctsrate = ctsrate; 1309 bf->bf_state.bfs_ctsduration = ctsduration; 1310 1311 /* 1312 * Must disable multi-rate retry when using RTS/CTS. 1313 */ 1314 if (!sc->sc_mrrprot) { 1315 bf->bf_state.bfs_ismrr = 0; 1316 bf->bf_state.bfs_try0 = 1317 bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */ 1318 } 1319 } 1320 1321 /* 1322 * Setup the descriptor chain for a normal or fast-frame 1323 * frame. 1324 * 1325 * XXX TODO: extend to include the destination hardware QCU ID. 1326 * Make sure that is correct. Make sure that when being added 1327 * to the mcastq, the CABQ QCUID is set or things will get a bit 1328 * odd. 1329 */ 1330 static void 1331 ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf) 1332 { 1333 struct ath_desc *ds = bf->bf_desc; 1334 struct ath_hal *ah = sc->sc_ah; 1335 1336 if (bf->bf_state.bfs_txrate0 == 0) 1337 DPRINTF(sc, ATH_DEBUG_XMIT, 1338 "%s: bf=%p, txrate0=%d\n", __func__, bf, 0); 1339 1340 ath_hal_setuptxdesc(ah, ds 1341 , bf->bf_state.bfs_pktlen /* packet length */ 1342 , bf->bf_state.bfs_hdrlen /* header length */ 1343 , bf->bf_state.bfs_atype /* Atheros packet type */ 1344 , bf->bf_state.bfs_txpower /* txpower */ 1345 , bf->bf_state.bfs_txrate0 1346 , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 1347 , bf->bf_state.bfs_keyix /* key cache index */ 1348 , bf->bf_state.bfs_txantenna /* antenna mode */ 1349 , bf->bf_state.bfs_txflags /* flags */ 1350 , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 1351 , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 1352 ); 1353 1354 /* 1355 * This will be overriden when the descriptor chain is written. 1356 */ 1357 bf->bf_lastds = ds; 1358 bf->bf_last = bf; 1359 1360 /* Set rate control and descriptor chain for this frame */ 1361 ath_tx_set_ratectrl(sc, bf->bf_node, bf); 1362 ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0); 1363 } 1364 1365 /* 1366 * Do a rate lookup. 1367 * 1368 * This performs a rate lookup for the given ath_buf only if it's required. 1369 * Non-data frames and raw frames don't require it. 1370 * 1371 * This populates the primary and MRR entries; MRR values are 1372 * then disabled later on if something requires it (eg RTS/CTS on 1373 * pre-11n chipsets. 1374 * 1375 * This needs to be done before the RTS/CTS fields are calculated 1376 * as they may depend upon the rate chosen. 1377 */ 1378 static void 1379 ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf) 1380 { 1381 uint8_t rate, rix; 1382 int try0; 1383 1384 if (! bf->bf_state.bfs_doratelookup) 1385 return; 1386 1387 /* Get rid of any previous state */ 1388 bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1389 1390 ATH_NODE_LOCK(ATH_NODE(bf->bf_node)); 1391 ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream, 1392 bf->bf_state.bfs_pktlen, &rix, &try0, &rate); 1393 1394 /* In case MRR is disabled, make sure rc[0] is setup correctly */ 1395 bf->bf_state.bfs_rc[0].rix = rix; 1396 bf->bf_state.bfs_rc[0].ratecode = rate; 1397 bf->bf_state.bfs_rc[0].tries = try0; 1398 1399 if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY) 1400 ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix, 1401 bf->bf_state.bfs_rc); 1402 ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node)); 1403 1404 sc->sc_txrix = rix; /* for LED blinking */ 1405 sc->sc_lastdatarix = rix; /* for fast frames */ 1406 bf->bf_state.bfs_try0 = try0; 1407 bf->bf_state.bfs_txrate0 = rate; 1408 } 1409 1410 /* 1411 * Update the CLRDMASK bit in the ath_buf if it needs to be set. 1412 */ 1413 static void 1414 ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid, 1415 struct ath_buf *bf) 1416 { 1417 struct ath_node *an = ATH_NODE(bf->bf_node); 1418 1419 ATH_TX_LOCK_ASSERT(sc); 1420 1421 if (an->clrdmask == 1) { 1422 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 1423 an->clrdmask = 0; 1424 } 1425 } 1426 1427 /* 1428 * Return whether this frame should be software queued or 1429 * direct dispatched. 1430 * 1431 * When doing powersave, BAR frames should be queued but other management 1432 * frames should be directly sent. 1433 * 1434 * When not doing powersave, stick BAR frames into the hardware queue 1435 * so it goes out even though the queue is paused. 1436 * 1437 * For now, management frames are also software queued by default. 1438 */ 1439 static int 1440 ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an, 1441 struct mbuf *m0, int *queue_to_head) 1442 { 1443 struct ieee80211_node *ni = &an->an_node; 1444 struct ieee80211_frame *wh; 1445 uint8_t type, subtype; 1446 1447 wh = mtod(m0, struct ieee80211_frame *); 1448 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1449 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1450 1451 (*queue_to_head) = 0; 1452 1453 /* If it's not in powersave - direct-dispatch BAR */ 1454 if ((ATH_NODE(ni)->an_is_powersave == 0) 1455 && type == IEEE80211_FC0_TYPE_CTL && 1456 subtype == IEEE80211_FC0_SUBTYPE_BAR) { 1457 DPRINTF(sc, ATH_DEBUG_SW_TX, 1458 "%s: BAR: TX'ing direct\n", __func__); 1459 return (0); 1460 } else if ((ATH_NODE(ni)->an_is_powersave == 1) 1461 && type == IEEE80211_FC0_TYPE_CTL && 1462 subtype == IEEE80211_FC0_SUBTYPE_BAR) { 1463 /* BAR TX whilst asleep; queue */ 1464 DPRINTF(sc, ATH_DEBUG_SW_TX, 1465 "%s: swq: TX'ing\n", __func__); 1466 (*queue_to_head) = 1; 1467 return (1); 1468 } else if ((ATH_NODE(ni)->an_is_powersave == 1) 1469 && (type == IEEE80211_FC0_TYPE_MGT || 1470 type == IEEE80211_FC0_TYPE_CTL)) { 1471 /* 1472 * Other control/mgmt frame; bypass software queuing 1473 * for now! 1474 */ 1475 DPRINTF(sc, ATH_DEBUG_XMIT, 1476 "%s: %6D: Node is asleep; sending mgmt " 1477 "(type=%d, subtype=%d)\n", 1478 __func__, ni->ni_macaddr, ":", type, subtype); 1479 return (0); 1480 } else { 1481 return (1); 1482 } 1483 } 1484 1485 1486 /* 1487 * Transmit the given frame to the hardware. 1488 * 1489 * The frame must already be setup; rate control must already have 1490 * been done. 1491 * 1492 * XXX since the TXQ lock is being held here (and I dislike holding 1493 * it for this long when not doing software aggregation), later on 1494 * break this function into "setup_normal" and "xmit_normal". The 1495 * lock only needs to be held for the ath_tx_handoff call. 1496 * 1497 * XXX we don't update the leak count here - if we're doing 1498 * direct frame dispatch, we need to be able to do it without 1499 * decrementing the leak count (eg multicast queue frames.) 1500 */ 1501 static void 1502 ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq, 1503 struct ath_buf *bf) 1504 { 1505 struct ath_node *an = ATH_NODE(bf->bf_node); 1506 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 1507 1508 ATH_TX_LOCK_ASSERT(sc); 1509 1510 /* 1511 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does 1512 * set a completion handler however it doesn't (yet) properly 1513 * handle the strict ordering requirements needed for normal, 1514 * non-aggregate session frames. 1515 * 1516 * Once this is implemented, only set CLRDMASK like this for 1517 * frames that must go out - eg management/raw frames. 1518 */ 1519 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 1520 1521 /* Setup the descriptor before handoff */ 1522 ath_tx_do_ratelookup(sc, bf); 1523 ath_tx_calc_duration(sc, bf); 1524 ath_tx_calc_protection(sc, bf); 1525 ath_tx_set_rtscts(sc, bf); 1526 ath_tx_rate_fill_rcflags(sc, bf); 1527 ath_tx_setds(sc, bf); 1528 1529 /* Track per-TID hardware queue depth correctly */ 1530 tid->hwq_depth++; 1531 1532 /* Assign the completion handler */ 1533 bf->bf_comp = ath_tx_normal_comp; 1534 1535 /* Hand off to hardware */ 1536 ath_tx_handoff(sc, txq, bf); 1537 } 1538 1539 /* 1540 * Do the basic frame setup stuff that's required before the frame 1541 * is added to a software queue. 1542 * 1543 * All frames get mostly the same treatment and it's done once. 1544 * Retransmits fiddle with things like the rate control setup, 1545 * setting the retransmit bit in the packet; doing relevant DMA/bus 1546 * syncing and relinking it (back) into the hardware TX queue. 1547 * 1548 * Note that this may cause the mbuf to be reallocated, so 1549 * m0 may not be valid. 1550 */ 1551 static int 1552 ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni, 1553 struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq) 1554 { 1555 struct ieee80211vap *vap = ni->ni_vap; 1556 struct ieee80211com *ic = &sc->sc_ic; 1557 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams; 1558 int error, iswep, ismcast, isfrag, ismrr; 1559 int keyix, hdrlen, pktlen, try0 = 0; 1560 u_int8_t rix = 0, txrate = 0; 1561 struct ath_desc *ds; 1562 struct ieee80211_frame *wh; 1563 u_int subtype, flags; 1564 HAL_PKT_TYPE atype; 1565 const HAL_RATE_TABLE *rt; 1566 HAL_BOOL shortPreamble; 1567 struct ath_node *an; 1568 1569 /* XXX TODO: this pri is only used for non-QoS check, right? */ 1570 u_int pri; 1571 1572 /* 1573 * To ensure that both sequence numbers and the CCMP PN handling 1574 * is "correct", make sure that the relevant TID queue is locked. 1575 * Otherwise the CCMP PN and seqno may appear out of order, causing 1576 * re-ordered frames to have out of order CCMP PN's, resulting 1577 * in many, many frame drops. 1578 */ 1579 ATH_TX_LOCK_ASSERT(sc); 1580 1581 wh = mtod(m0, struct ieee80211_frame *); 1582 iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1583 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1584 isfrag = m0->m_flags & M_FRAG; 1585 hdrlen = ieee80211_anyhdrsize(wh); 1586 /* 1587 * Packet length must not include any 1588 * pad bytes; deduct them here. 1589 */ 1590 pktlen = m0->m_pkthdr.len - (hdrlen & 3); 1591 1592 /* Handle encryption twiddling if needed */ 1593 if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen, 1594 &pktlen, &keyix)) { 1595 ieee80211_free_mbuf(m0); 1596 return EIO; 1597 } 1598 1599 /* packet header may have moved, reset our local pointer */ 1600 wh = mtod(m0, struct ieee80211_frame *); 1601 1602 pktlen += IEEE80211_CRC_LEN; 1603 1604 /* 1605 * Load the DMA map so any coalescing is done. This 1606 * also calculates the number of descriptors we need. 1607 */ 1608 error = ath_tx_dmasetup(sc, bf, m0); 1609 if (error != 0) 1610 return error; 1611 KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 1612 bf->bf_node = ni; /* NB: held reference */ 1613 m0 = bf->bf_m; /* NB: may have changed */ 1614 wh = mtod(m0, struct ieee80211_frame *); 1615 1616 /* setup descriptors */ 1617 ds = bf->bf_desc; 1618 rt = sc->sc_currates; 1619 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1620 1621 /* 1622 * NB: the 802.11 layer marks whether or not we should 1623 * use short preamble based on the current mode and 1624 * negotiated parameters. 1625 */ 1626 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1627 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 1628 shortPreamble = AH_TRUE; 1629 sc->sc_stats.ast_tx_shortpre++; 1630 } else { 1631 shortPreamble = AH_FALSE; 1632 } 1633 1634 an = ATH_NODE(ni); 1635 //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 1636 flags = 0; 1637 ismrr = 0; /* default no multi-rate retry*/ 1638 1639 pri = ath_tx_getac(sc, m0); /* honor classification */ 1640 /* XXX use txparams instead of fixed values */ 1641 /* 1642 * Calculate Atheros packet type from IEEE80211 packet header, 1643 * setup for rate calculations, and select h/w transmit queue. 1644 */ 1645 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1646 case IEEE80211_FC0_TYPE_MGT: 1647 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1648 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 1649 atype = HAL_PKT_TYPE_BEACON; 1650 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1651 atype = HAL_PKT_TYPE_PROBE_RESP; 1652 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 1653 atype = HAL_PKT_TYPE_ATIM; 1654 else 1655 atype = HAL_PKT_TYPE_NORMAL; /* XXX */ 1656 rix = an->an_mgmtrix; 1657 txrate = rt->info[rix].rateCode; 1658 if (shortPreamble) 1659 txrate |= rt->info[rix].shortPreamble; 1660 try0 = ATH_TXMGTTRY; 1661 flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1662 break; 1663 case IEEE80211_FC0_TYPE_CTL: 1664 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */ 1665 rix = an->an_mgmtrix; 1666 txrate = rt->info[rix].rateCode; 1667 if (shortPreamble) 1668 txrate |= rt->info[rix].shortPreamble; 1669 try0 = ATH_TXMGTTRY; 1670 flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1671 break; 1672 case IEEE80211_FC0_TYPE_DATA: 1673 atype = HAL_PKT_TYPE_NORMAL; /* default */ 1674 /* 1675 * Data frames: multicast frames go out at a fixed rate, 1676 * EAPOL frames use the mgmt frame rate; otherwise consult 1677 * the rate control module for the rate to use. 1678 */ 1679 if (ismcast) { 1680 rix = an->an_mcastrix; 1681 txrate = rt->info[rix].rateCode; 1682 if (shortPreamble) 1683 txrate |= rt->info[rix].shortPreamble; 1684 try0 = 1; 1685 } else if (m0->m_flags & M_EAPOL) { 1686 /* XXX? maybe always use long preamble? */ 1687 rix = an->an_mgmtrix; 1688 txrate = rt->info[rix].rateCode; 1689 if (shortPreamble) 1690 txrate |= rt->info[rix].shortPreamble; 1691 try0 = ATH_TXMAXTRY; /* XXX?too many? */ 1692 } else { 1693 /* 1694 * Do rate lookup on each TX, rather than using 1695 * the hard-coded TX information decided here. 1696 */ 1697 ismrr = 1; 1698 bf->bf_state.bfs_doratelookup = 1; 1699 } 1700 if (cap->cap_wmeParams[pri].wmep_noackPolicy) 1701 flags |= HAL_TXDESC_NOACK; 1702 break; 1703 default: 1704 device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n", 1705 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1706 /* XXX statistic */ 1707 /* XXX free tx dmamap */ 1708 ieee80211_free_mbuf(m0); 1709 return EIO; 1710 } 1711 1712 /* 1713 * There are two known scenarios where the frame AC doesn't match 1714 * what the destination TXQ is. 1715 * 1716 * + non-QoS frames (eg management?) that the net80211 stack has 1717 * assigned a higher AC to, but since it's a non-QoS TID, it's 1718 * being thrown into TID 16. TID 16 gets the AC_BE queue. 1719 * It's quite possible that management frames should just be 1720 * direct dispatched to hardware rather than go via the software 1721 * queue; that should be investigated in the future. There are 1722 * some specific scenarios where this doesn't make sense, mostly 1723 * surrounding ADDBA request/response - hence why that is special 1724 * cased. 1725 * 1726 * + Multicast frames going into the VAP mcast queue. That shows up 1727 * as "TXQ 11". 1728 * 1729 * This driver should eventually support separate TID and TXQ locking, 1730 * allowing for arbitrary AC frames to appear on arbitrary software 1731 * queues, being queued to the "correct" hardware queue when needed. 1732 */ 1733 #if 0 1734 if (txq != sc->sc_ac2q[pri]) { 1735 DPRINTF(sc, ATH_DEBUG_XMIT, 1736 "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n", 1737 __func__, 1738 txq, 1739 txq->axq_qnum, 1740 pri, 1741 sc->sc_ac2q[pri], 1742 sc->sc_ac2q[pri]->axq_qnum); 1743 } 1744 #endif 1745 1746 /* 1747 * Calculate miscellaneous flags. 1748 */ 1749 if (ismcast) { 1750 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 1751 } else if (pktlen > vap->iv_rtsthreshold && 1752 (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) { 1753 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 1754 sc->sc_stats.ast_tx_rts++; 1755 } 1756 if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */ 1757 sc->sc_stats.ast_tx_noack++; 1758 #ifdef IEEE80211_SUPPORT_TDMA 1759 if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) { 1760 DPRINTF(sc, ATH_DEBUG_TDMA, 1761 "%s: discard frame, ACK required w/ TDMA\n", __func__); 1762 sc->sc_stats.ast_tdma_ack++; 1763 /* XXX free tx dmamap */ 1764 ieee80211_free_mbuf(m0); 1765 return EIO; 1766 } 1767 #endif 1768 1769 /* 1770 * If it's a frame to do location reporting on, 1771 * communicate it to the HAL. 1772 */ 1773 if (ieee80211_get_toa_params(m0, NULL)) { 1774 device_printf(sc->sc_dev, 1775 "%s: setting TX positioning bit\n", __func__); 1776 flags |= HAL_TXDESC_POS; 1777 1778 /* 1779 * Note: The hardware reports timestamps for 1780 * each of the RX'ed packets as part of the packet 1781 * exchange. So this means things like RTS/CTS 1782 * exchanges, as well as the final ACK. 1783 * 1784 * So, if you send a RTS-protected NULL data frame, 1785 * you'll get an RX report for the RTS response, then 1786 * an RX report for the NULL frame, and then the TX 1787 * completion at the end. 1788 * 1789 * NOTE: it doesn't work right for CCK frames; 1790 * there's no channel info data provided unless 1791 * it's OFDM or HT. Will have to dig into it. 1792 */ 1793 flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 1794 bf->bf_flags |= ATH_BUF_TOA_PROBE; 1795 } 1796 1797 #if 0 1798 /* 1799 * Placeholder: if you want to transmit with the azimuth 1800 * timestamp in the end of the payload, here's where you 1801 * should set the TXDESC field. 1802 */ 1803 flags |= HAL_TXDESC_HWTS; 1804 #endif 1805 1806 /* 1807 * Determine if a tx interrupt should be generated for 1808 * this descriptor. We take a tx interrupt to reap 1809 * descriptors when the h/w hits an EOL condition or 1810 * when the descriptor is specifically marked to generate 1811 * an interrupt. We periodically mark descriptors in this 1812 * way to insure timely replenishing of the supply needed 1813 * for sending frames. Defering interrupts reduces system 1814 * load and potentially allows more concurrent work to be 1815 * done but if done to aggressively can cause senders to 1816 * backup. 1817 * 1818 * NB: use >= to deal with sc_txintrperiod changing 1819 * dynamically through sysctl. 1820 */ 1821 if (flags & HAL_TXDESC_INTREQ) { 1822 txq->axq_intrcnt = 0; 1823 } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) { 1824 flags |= HAL_TXDESC_INTREQ; 1825 txq->axq_intrcnt = 0; 1826 } 1827 1828 /* This point forward is actual TX bits */ 1829 1830 /* 1831 * At this point we are committed to sending the frame 1832 * and we don't need to look at m_nextpkt; clear it in 1833 * case this frame is part of frag chain. 1834 */ 1835 m0->m_nextpkt = NULL; 1836 1837 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 1838 ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len, 1839 sc->sc_hwmap[rix].ieeerate, -1); 1840 1841 if (ieee80211_radiotap_active_vap(vap)) { 1842 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 1843 if (iswep) 1844 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1845 if (isfrag) 1846 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 1847 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 1848 sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni); 1849 sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 1850 1851 ieee80211_radiotap_tx(vap, m0); 1852 } 1853 1854 /* Blank the legacy rate array */ 1855 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1856 1857 /* 1858 * ath_buf_set_rate needs at least one rate/try to setup 1859 * the rate scenario. 1860 */ 1861 bf->bf_state.bfs_rc[0].rix = rix; 1862 bf->bf_state.bfs_rc[0].tries = try0; 1863 bf->bf_state.bfs_rc[0].ratecode = txrate; 1864 1865 /* Store the decided rate index values away */ 1866 bf->bf_state.bfs_pktlen = pktlen; 1867 bf->bf_state.bfs_hdrlen = hdrlen; 1868 bf->bf_state.bfs_atype = atype; 1869 bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni); 1870 bf->bf_state.bfs_txrate0 = txrate; 1871 bf->bf_state.bfs_try0 = try0; 1872 bf->bf_state.bfs_keyix = keyix; 1873 bf->bf_state.bfs_txantenna = sc->sc_txantenna; 1874 bf->bf_state.bfs_txflags = flags; 1875 bf->bf_state.bfs_shpream = shortPreamble; 1876 1877 /* XXX this should be done in ath_tx_setrate() */ 1878 bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */ 1879 bf->bf_state.bfs_ctsrate = 0; /* calculated later */ 1880 bf->bf_state.bfs_ctsduration = 0; 1881 bf->bf_state.bfs_ismrr = ismrr; 1882 1883 return 0; 1884 } 1885 1886 /* 1887 * Queue a frame to the hardware or software queue. 1888 * 1889 * This can be called by the net80211 code. 1890 * 1891 * XXX what about locking? Or, push the seqno assign into the 1892 * XXX aggregate scheduler so its serialised? 1893 * 1894 * XXX When sending management frames via ath_raw_xmit(), 1895 * should CLRDMASK be set unconditionally? 1896 */ 1897 int 1898 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, 1899 struct ath_buf *bf, struct mbuf *m0) 1900 { 1901 struct ieee80211vap *vap = ni->ni_vap; 1902 struct ath_vap *avp = ATH_VAP(vap); 1903 int r = 0; 1904 u_int pri; 1905 int tid; 1906 struct ath_txq *txq; 1907 int ismcast; 1908 const struct ieee80211_frame *wh; 1909 int is_ampdu, is_ampdu_tx, is_ampdu_pending; 1910 ieee80211_seq seqno; 1911 uint8_t type, subtype; 1912 int queue_to_head; 1913 1914 ATH_TX_LOCK_ASSERT(sc); 1915 1916 /* 1917 * Determine the target hardware queue. 1918 * 1919 * For multicast frames, the txq gets overridden appropriately 1920 * depending upon the state of PS. If powersave is enabled 1921 * then they get added to the cabq for later transmit. 1922 * 1923 * The "fun" issue here is that group addressed frames should 1924 * have the sequence number from a different pool, rather than 1925 * the per-TID pool. That means that even QoS group addressed 1926 * frames will have a sequence number from that global value, 1927 * which means if we transmit different group addressed frames 1928 * at different traffic priorities, the sequence numbers will 1929 * all be out of whack. So - chances are, the right thing 1930 * to do here is to always put group addressed frames into the BE 1931 * queue, and ignore the TID for queue selection. 1932 * 1933 * For any other frame, we do a TID/QoS lookup inside the frame 1934 * to see what the TID should be. If it's a non-QoS frame, the 1935 * AC and TID are overridden. The TID/TXQ code assumes the 1936 * TID is on a predictable hardware TXQ, so we don't support 1937 * having a node TID queued to multiple hardware TXQs. 1938 * This may change in the future but would require some locking 1939 * fudgery. 1940 */ 1941 pri = ath_tx_getac(sc, m0); 1942 tid = ath_tx_gettid(sc, m0); 1943 1944 txq = sc->sc_ac2q[pri]; 1945 wh = mtod(m0, struct ieee80211_frame *); 1946 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1947 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1948 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1949 1950 /* 1951 * Enforce how deep the multicast queue can grow. 1952 * 1953 * XXX duplicated in ath_raw_xmit(). 1954 */ 1955 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1956 if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 1957 > sc->sc_txq_mcastq_maxdepth) { 1958 sc->sc_stats.ast_tx_mcastq_overflow++; 1959 m_freem(m0); 1960 return (ENOBUFS); 1961 } 1962 } 1963 1964 /* 1965 * Enforce how deep the unicast queue can grow. 1966 * 1967 * If the node is in power save then we don't want 1968 * the software queue to grow too deep, or a node may 1969 * end up consuming all of the ath_buf entries. 1970 * 1971 * For now, only do this for DATA frames. 1972 * 1973 * We will want to cap how many management/control 1974 * frames get punted to the software queue so it doesn't 1975 * fill up. But the correct solution isn't yet obvious. 1976 * In any case, this check should at least let frames pass 1977 * that we are direct-dispatching. 1978 * 1979 * XXX TODO: duplicate this to the raw xmit path! 1980 */ 1981 if (type == IEEE80211_FC0_TYPE_DATA && 1982 ATH_NODE(ni)->an_is_powersave && 1983 ATH_NODE(ni)->an_swq_depth > 1984 sc->sc_txq_node_psq_maxdepth) { 1985 sc->sc_stats.ast_tx_node_psq_overflow++; 1986 m_freem(m0); 1987 return (ENOBUFS); 1988 } 1989 1990 /* A-MPDU TX */ 1991 is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid); 1992 is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1993 is_ampdu = is_ampdu_tx | is_ampdu_pending; 1994 1995 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1996 __func__, tid, pri, is_ampdu); 1997 1998 /* Set local packet state, used to queue packets to hardware */ 1999 bf->bf_state.bfs_tid = tid; 2000 bf->bf_state.bfs_tx_queue = txq->axq_qnum; 2001 bf->bf_state.bfs_pri = pri; 2002 2003 #if 1 2004 /* 2005 * When servicing one or more stations in power-save mode 2006 * (or) if there is some mcast data waiting on the mcast 2007 * queue (to prevent out of order delivery) multicast frames 2008 * must be bufferd until after the beacon. 2009 * 2010 * TODO: we should lock the mcastq before we check the length. 2011 */ 2012 if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 2013 txq = &avp->av_mcastq; 2014 /* 2015 * Mark the frame as eventually belonging on the CAB 2016 * queue, so the descriptor setup functions will 2017 * correctly initialise the descriptor 'qcuId' field. 2018 */ 2019 bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum; 2020 } 2021 #endif 2022 2023 /* Do the generic frame setup */ 2024 /* XXX should just bzero the bf_state? */ 2025 bf->bf_state.bfs_dobaw = 0; 2026 2027 /* A-MPDU TX? Manually set sequence number */ 2028 /* 2029 * Don't do it whilst pending; the net80211 layer still 2030 * assigns them. 2031 * 2032 * Don't assign A-MPDU sequence numbers to group address 2033 * frames; they come from a different sequence number space. 2034 */ 2035 if (is_ampdu_tx && (! IEEE80211_IS_MULTICAST(wh->i_addr1))) { 2036 /* 2037 * Always call; this function will 2038 * handle making sure that null data frames 2039 * and group-addressed frames don't get a sequence number 2040 * from the current TID and thus mess with the BAW. 2041 */ 2042 seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0); 2043 2044 /* 2045 * Don't add QoS NULL frames and group-addressed frames 2046 * to the BAW. 2047 */ 2048 if (IEEE80211_QOS_HAS_SEQ(wh) && 2049 (! IEEE80211_IS_MULTICAST(wh->i_addr1)) && 2050 (subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL)) { 2051 bf->bf_state.bfs_dobaw = 1; 2052 } 2053 } 2054 2055 /* 2056 * If needed, the sequence number has been assigned. 2057 * Squirrel it away somewhere easy to get to. 2058 */ 2059 bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT; 2060 2061 /* Is ampdu pending? fetch the seqno and print it out */ 2062 if (is_ampdu_pending) 2063 DPRINTF(sc, ATH_DEBUG_SW_TX, 2064 "%s: tid %d: ampdu pending, seqno %d\n", 2065 __func__, tid, M_SEQNO_GET(m0)); 2066 2067 /* This also sets up the DMA map; crypto; frame parameters, etc */ 2068 r = ath_tx_normal_setup(sc, ni, bf, m0, txq); 2069 2070 if (r != 0) 2071 goto done; 2072 2073 /* At this point m0 could have changed! */ 2074 m0 = bf->bf_m; 2075 2076 #if 1 2077 /* 2078 * If it's a multicast frame, do a direct-dispatch to the 2079 * destination hardware queue. Don't bother software 2080 * queuing it. 2081 */ 2082 /* 2083 * If it's a BAR frame, do a direct dispatch to the 2084 * destination hardware queue. Don't bother software 2085 * queuing it, as the TID will now be paused. 2086 * Sending a BAR frame can occur from the net80211 txa timer 2087 * (ie, retries) or from the ath txtask (completion call.) 2088 * It queues directly to hardware because the TID is paused 2089 * at this point (and won't be unpaused until the BAR has 2090 * either been TXed successfully or max retries has been 2091 * reached.) 2092 */ 2093 /* 2094 * Until things are better debugged - if this node is asleep 2095 * and we're sending it a non-BAR frame, direct dispatch it. 2096 * Why? Because we need to figure out what's actually being 2097 * sent - eg, during reassociation/reauthentication after 2098 * the node (last) disappeared whilst asleep, the driver should 2099 * have unpaused/unsleep'ed the node. So until that is 2100 * sorted out, use this workaround. 2101 */ 2102 if (txq == &avp->av_mcastq) { 2103 DPRINTF(sc, ATH_DEBUG_SW_TX, 2104 "%s: bf=%p: mcastq: TX'ing\n", __func__, bf); 2105 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2106 ath_tx_xmit_normal(sc, txq, bf); 2107 } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 2108 &queue_to_head)) { 2109 ath_tx_swq(sc, ni, txq, queue_to_head, bf); 2110 } else { 2111 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2112 ath_tx_xmit_normal(sc, txq, bf); 2113 } 2114 #else 2115 /* 2116 * For now, since there's no software queue, 2117 * direct-dispatch to the hardware. 2118 */ 2119 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2120 /* 2121 * Update the current leak count if 2122 * we're leaking frames; and set the 2123 * MORE flag as appropriate. 2124 */ 2125 ath_tx_leak_count_update(sc, tid, bf); 2126 ath_tx_xmit_normal(sc, txq, bf); 2127 #endif 2128 done: 2129 return 0; 2130 } 2131 2132 static int 2133 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni, 2134 struct ath_buf *bf, struct mbuf *m0, 2135 const struct ieee80211_bpf_params *params) 2136 { 2137 struct ieee80211com *ic = &sc->sc_ic; 2138 struct ieee80211vap *vap = ni->ni_vap; 2139 int error, ismcast, ismrr; 2140 int keyix, hdrlen, pktlen, try0, txantenna; 2141 u_int8_t rix, txrate; 2142 struct ieee80211_frame *wh; 2143 u_int flags; 2144 HAL_PKT_TYPE atype; 2145 const HAL_RATE_TABLE *rt; 2146 struct ath_desc *ds; 2147 u_int pri; 2148 int o_tid = -1; 2149 int do_override; 2150 uint8_t type, subtype; 2151 int queue_to_head; 2152 struct ath_node *an = ATH_NODE(ni); 2153 2154 ATH_TX_LOCK_ASSERT(sc); 2155 2156 wh = mtod(m0, struct ieee80211_frame *); 2157 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2158 hdrlen = ieee80211_anyhdrsize(wh); 2159 /* 2160 * Packet length must not include any 2161 * pad bytes; deduct them here. 2162 */ 2163 /* XXX honor IEEE80211_BPF_DATAPAD */ 2164 pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN; 2165 2166 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2167 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2168 2169 ATH_KTR(sc, ATH_KTR_TX, 2, 2170 "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf); 2171 2172 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n", 2173 __func__, ismcast); 2174 2175 pri = params->ibp_pri & 3; 2176 /* Override pri if the frame isn't a QoS one */ 2177 if (! IEEE80211_QOS_HAS_SEQ(wh)) 2178 pri = ath_tx_getac(sc, m0); 2179 2180 /* XXX If it's an ADDBA, override the correct queue */ 2181 do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid); 2182 2183 /* Map ADDBA to the correct priority */ 2184 if (do_override) { 2185 #if 1 2186 DPRINTF(sc, ATH_DEBUG_XMIT, 2187 "%s: overriding tid %d pri %d -> %d\n", 2188 __func__, o_tid, pri, TID_TO_WME_AC(o_tid)); 2189 #endif 2190 pri = TID_TO_WME_AC(o_tid); 2191 } 2192 2193 /* 2194 * "pri" is the hardware queue to transmit on. 2195 * 2196 * Look at the description in ath_tx_start() to understand 2197 * what needs to be "fixed" here so we just use the TID 2198 * for QoS frames. 2199 */ 2200 2201 /* Handle encryption twiddling if needed */ 2202 if (! ath_tx_tag_crypto(sc, ni, 2203 m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0, 2204 &hdrlen, &pktlen, &keyix)) { 2205 ieee80211_free_mbuf(m0); 2206 return EIO; 2207 } 2208 /* packet header may have moved, reset our local pointer */ 2209 wh = mtod(m0, struct ieee80211_frame *); 2210 2211 /* Do the generic frame setup */ 2212 /* XXX should just bzero the bf_state? */ 2213 bf->bf_state.bfs_dobaw = 0; 2214 2215 error = ath_tx_dmasetup(sc, bf, m0); 2216 if (error != 0) 2217 return error; 2218 m0 = bf->bf_m; /* NB: may have changed */ 2219 wh = mtod(m0, struct ieee80211_frame *); 2220 KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 2221 bf->bf_node = ni; /* NB: held reference */ 2222 2223 /* Always enable CLRDMASK for raw frames for now.. */ 2224 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 2225 flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 2226 if (params->ibp_flags & IEEE80211_BPF_RTS) 2227 flags |= HAL_TXDESC_RTSENA; 2228 else if (params->ibp_flags & IEEE80211_BPF_CTS) { 2229 /* XXX assume 11g/11n protection? */ 2230 bf->bf_state.bfs_doprot = 1; 2231 flags |= HAL_TXDESC_CTSENA; 2232 } 2233 /* XXX leave ismcast to injector? */ 2234 if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast) 2235 flags |= HAL_TXDESC_NOACK; 2236 2237 rt = sc->sc_currates; 2238 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2239 2240 /* Fetch first rate information */ 2241 rix = ath_tx_findrix(sc, params->ibp_rate0); 2242 try0 = params->ibp_try0; 2243 2244 /* 2245 * Override EAPOL rate as appropriate. 2246 */ 2247 if (m0->m_flags & M_EAPOL) { 2248 /* XXX? maybe always use long preamble? */ 2249 rix = an->an_mgmtrix; 2250 try0 = ATH_TXMAXTRY; /* XXX?too many? */ 2251 } 2252 2253 /* 2254 * If it's a frame to do location reporting on, 2255 * communicate it to the HAL. 2256 */ 2257 if (ieee80211_get_toa_params(m0, NULL)) { 2258 device_printf(sc->sc_dev, 2259 "%s: setting TX positioning bit\n", __func__); 2260 flags |= HAL_TXDESC_POS; 2261 flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 2262 bf->bf_flags |= ATH_BUF_TOA_PROBE; 2263 } 2264 2265 txrate = rt->info[rix].rateCode; 2266 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) 2267 txrate |= rt->info[rix].shortPreamble; 2268 sc->sc_txrix = rix; 2269 ismrr = (params->ibp_try1 != 0); 2270 txantenna = params->ibp_pri >> 2; 2271 if (txantenna == 0) /* XXX? */ 2272 txantenna = sc->sc_txantenna; 2273 2274 /* 2275 * Since ctsrate is fixed, store it away for later 2276 * use when the descriptor fields are being set. 2277 */ 2278 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) 2279 bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate; 2280 2281 /* 2282 * NB: we mark all packets as type PSPOLL so the h/w won't 2283 * set the sequence number, duration, etc. 2284 */ 2285 atype = HAL_PKT_TYPE_PSPOLL; 2286 2287 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 2288 ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len, 2289 sc->sc_hwmap[rix].ieeerate, -1); 2290 2291 if (ieee80211_radiotap_active_vap(vap)) { 2292 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 2293 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) 2294 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2295 if (m0->m_flags & M_FRAG) 2296 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 2297 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 2298 sc->sc_tx_th.wt_txpower = MIN(params->ibp_power, 2299 ieee80211_get_node_txpower(ni)); 2300 sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 2301 2302 ieee80211_radiotap_tx(vap, m0); 2303 } 2304 2305 /* 2306 * Formulate first tx descriptor with tx controls. 2307 */ 2308 ds = bf->bf_desc; 2309 /* XXX check return value? */ 2310 2311 /* Store the decided rate index values away */ 2312 bf->bf_state.bfs_pktlen = pktlen; 2313 bf->bf_state.bfs_hdrlen = hdrlen; 2314 bf->bf_state.bfs_atype = atype; 2315 bf->bf_state.bfs_txpower = MIN(params->ibp_power, 2316 ieee80211_get_node_txpower(ni)); 2317 bf->bf_state.bfs_txrate0 = txrate; 2318 bf->bf_state.bfs_try0 = try0; 2319 bf->bf_state.bfs_keyix = keyix; 2320 bf->bf_state.bfs_txantenna = txantenna; 2321 bf->bf_state.bfs_txflags = flags; 2322 bf->bf_state.bfs_shpream = 2323 !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2324 2325 /* Set local packet state, used to queue packets to hardware */ 2326 bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); 2327 bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum; 2328 bf->bf_state.bfs_pri = pri; 2329 2330 /* XXX this should be done in ath_tx_setrate() */ 2331 bf->bf_state.bfs_ctsrate = 0; 2332 bf->bf_state.bfs_ctsduration = 0; 2333 bf->bf_state.bfs_ismrr = ismrr; 2334 2335 /* Blank the legacy rate array */ 2336 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 2337 2338 bf->bf_state.bfs_rc[0].rix = rix; 2339 bf->bf_state.bfs_rc[0].tries = try0; 2340 bf->bf_state.bfs_rc[0].ratecode = txrate; 2341 2342 if (ismrr) { 2343 int rix; 2344 2345 rix = ath_tx_findrix(sc, params->ibp_rate1); 2346 bf->bf_state.bfs_rc[1].rix = rix; 2347 bf->bf_state.bfs_rc[1].tries = params->ibp_try1; 2348 2349 rix = ath_tx_findrix(sc, params->ibp_rate2); 2350 bf->bf_state.bfs_rc[2].rix = rix; 2351 bf->bf_state.bfs_rc[2].tries = params->ibp_try2; 2352 2353 rix = ath_tx_findrix(sc, params->ibp_rate3); 2354 bf->bf_state.bfs_rc[3].rix = rix; 2355 bf->bf_state.bfs_rc[3].tries = params->ibp_try3; 2356 } 2357 /* 2358 * All the required rate control decisions have been made; 2359 * fill in the rc flags. 2360 */ 2361 ath_tx_rate_fill_rcflags(sc, bf); 2362 2363 /* NB: no buffered multicast in power save support */ 2364 2365 /* 2366 * If we're overiding the ADDBA destination, dump directly 2367 * into the hardware queue, right after any pending 2368 * frames to that node are. 2369 */ 2370 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n", 2371 __func__, do_override); 2372 2373 #if 1 2374 /* 2375 * Put addba frames in the right place in the right TID/HWQ. 2376 */ 2377 if (do_override) { 2378 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2379 /* 2380 * XXX if it's addba frames, should we be leaking 2381 * them out via the frame leak method? 2382 * XXX for now let's not risk it; but we may wish 2383 * to investigate this later. 2384 */ 2385 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2386 } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 2387 &queue_to_head)) { 2388 /* Queue to software queue */ 2389 ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf); 2390 } else { 2391 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2392 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2393 } 2394 #else 2395 /* Direct-dispatch to the hardware */ 2396 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2397 /* 2398 * Update the current leak count if 2399 * we're leaking frames; and set the 2400 * MORE flag as appropriate. 2401 */ 2402 ath_tx_leak_count_update(sc, tid, bf); 2403 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2404 #endif 2405 return 0; 2406 } 2407 2408 /* 2409 * Send a raw frame. 2410 * 2411 * This can be called by net80211. 2412 */ 2413 int 2414 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2415 const struct ieee80211_bpf_params *params) 2416 { 2417 struct ieee80211com *ic = ni->ni_ic; 2418 struct ath_softc *sc = ic->ic_softc; 2419 struct ath_buf *bf; 2420 struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *); 2421 int error = 0; 2422 2423 ATH_PCU_LOCK(sc); 2424 if (sc->sc_inreset_cnt > 0) { 2425 DPRINTF(sc, ATH_DEBUG_XMIT, 2426 "%s: sc_inreset_cnt > 0; bailing\n", __func__); 2427 error = EIO; 2428 ATH_PCU_UNLOCK(sc); 2429 goto badbad; 2430 } 2431 sc->sc_txstart_cnt++; 2432 ATH_PCU_UNLOCK(sc); 2433 2434 /* Wake the hardware up already */ 2435 ATH_LOCK(sc); 2436 ath_power_set_power_state(sc, HAL_PM_AWAKE); 2437 ATH_UNLOCK(sc); 2438 2439 ATH_TX_LOCK(sc); 2440 2441 if (!sc->sc_running || sc->sc_invalid) { 2442 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d", 2443 __func__, sc->sc_running, sc->sc_invalid); 2444 m_freem(m); 2445 error = ENETDOWN; 2446 goto bad; 2447 } 2448 2449 /* 2450 * Enforce how deep the multicast queue can grow. 2451 * 2452 * XXX duplicated in ath_tx_start(). 2453 */ 2454 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2455 if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 2456 > sc->sc_txq_mcastq_maxdepth) { 2457 sc->sc_stats.ast_tx_mcastq_overflow++; 2458 error = ENOBUFS; 2459 } 2460 2461 if (error != 0) { 2462 m_freem(m); 2463 goto bad; 2464 } 2465 } 2466 2467 /* 2468 * Grab a TX buffer and associated resources. 2469 */ 2470 bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT); 2471 if (bf == NULL) { 2472 sc->sc_stats.ast_tx_nobuf++; 2473 m_freem(m); 2474 error = ENOBUFS; 2475 goto bad; 2476 } 2477 ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n", 2478 m, params, bf); 2479 2480 if (params == NULL) { 2481 /* 2482 * Legacy path; interpret frame contents to decide 2483 * precisely how to send the frame. 2484 */ 2485 if (ath_tx_start(sc, ni, bf, m)) { 2486 error = EIO; /* XXX */ 2487 goto bad2; 2488 } 2489 } else { 2490 /* 2491 * Caller supplied explicit parameters to use in 2492 * sending the frame. 2493 */ 2494 if (ath_tx_raw_start(sc, ni, bf, m, params)) { 2495 error = EIO; /* XXX */ 2496 goto bad2; 2497 } 2498 } 2499 sc->sc_wd_timer = 5; 2500 sc->sc_stats.ast_tx_raw++; 2501 2502 /* 2503 * Update the TIM - if there's anything queued to the 2504 * software queue and power save is enabled, we should 2505 * set the TIM. 2506 */ 2507 ath_tx_update_tim(sc, ni, 1); 2508 2509 ATH_TX_UNLOCK(sc); 2510 2511 ATH_PCU_LOCK(sc); 2512 sc->sc_txstart_cnt--; 2513 ATH_PCU_UNLOCK(sc); 2514 2515 2516 /* Put the hardware back to sleep if required */ 2517 ATH_LOCK(sc); 2518 ath_power_restore_power_state(sc); 2519 ATH_UNLOCK(sc); 2520 2521 return 0; 2522 2523 bad2: 2524 ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, " 2525 "bf=%p", 2526 m, 2527 params, 2528 bf); 2529 ATH_TXBUF_LOCK(sc); 2530 ath_returnbuf_head(sc, bf); 2531 ATH_TXBUF_UNLOCK(sc); 2532 2533 bad: 2534 ATH_TX_UNLOCK(sc); 2535 2536 ATH_PCU_LOCK(sc); 2537 sc->sc_txstart_cnt--; 2538 ATH_PCU_UNLOCK(sc); 2539 2540 /* Put the hardware back to sleep if required */ 2541 ATH_LOCK(sc); 2542 ath_power_restore_power_state(sc); 2543 ATH_UNLOCK(sc); 2544 2545 badbad: 2546 ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p", 2547 m, params); 2548 sc->sc_stats.ast_tx_raw_fail++; 2549 2550 return error; 2551 } 2552 2553 /* Some helper functions */ 2554 2555 /* 2556 * ADDBA (and potentially others) need to be placed in the same 2557 * hardware queue as the TID/node it's relating to. This is so 2558 * it goes out after any pending non-aggregate frames to the 2559 * same node/TID. 2560 * 2561 * If this isn't done, the ADDBA can go out before the frames 2562 * queued in hardware. Even though these frames have a sequence 2563 * number -earlier- than the ADDBA can be transmitted (but 2564 * no frames whose sequence numbers are after the ADDBA should 2565 * be!) they'll arrive after the ADDBA - and the receiving end 2566 * will simply drop them as being out of the BAW. 2567 * 2568 * The frames can't be appended to the TID software queue - it'll 2569 * never be sent out. So these frames have to be directly 2570 * dispatched to the hardware, rather than queued in software. 2571 * So if this function returns true, the TXQ has to be 2572 * overridden and it has to be directly dispatched. 2573 * 2574 * It's a dirty hack, but someone's gotta do it. 2575 */ 2576 2577 /* 2578 * XXX doesn't belong here! 2579 */ 2580 static int 2581 ieee80211_is_action(struct ieee80211_frame *wh) 2582 { 2583 /* Type: Management frame? */ 2584 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != 2585 IEEE80211_FC0_TYPE_MGT) 2586 return 0; 2587 2588 /* Subtype: Action frame? */ 2589 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) != 2590 IEEE80211_FC0_SUBTYPE_ACTION) 2591 return 0; 2592 2593 return 1; 2594 } 2595 2596 #define MS(_v, _f) (((_v) & _f) >> _f##_S) 2597 /* 2598 * Return an alternate TID for ADDBA request frames. 2599 * 2600 * Yes, this likely should be done in the net80211 layer. 2601 */ 2602 static int 2603 ath_tx_action_frame_override_queue(struct ath_softc *sc, 2604 struct ieee80211_node *ni, 2605 struct mbuf *m0, int *tid) 2606 { 2607 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 2608 struct ieee80211_action_ba_addbarequest *ia; 2609 uint8_t *frm; 2610 uint16_t baparamset; 2611 2612 /* Not action frame? Bail */ 2613 if (! ieee80211_is_action(wh)) 2614 return 0; 2615 2616 /* XXX Not needed for frames we send? */ 2617 #if 0 2618 /* Correct length? */ 2619 if (! ieee80211_parse_action(ni, m)) 2620 return 0; 2621 #endif 2622 2623 /* Extract out action frame */ 2624 frm = (u_int8_t *)&wh[1]; 2625 ia = (struct ieee80211_action_ba_addbarequest *) frm; 2626 2627 /* Not ADDBA? Bail */ 2628 if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA) 2629 return 0; 2630 if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST) 2631 return 0; 2632 2633 /* Extract TID, return it */ 2634 baparamset = le16toh(ia->rq_baparamset); 2635 *tid = (int) MS(baparamset, IEEE80211_BAPS_TID); 2636 2637 return 1; 2638 } 2639 #undef MS 2640 2641 /* Per-node software queue operations */ 2642 2643 /* 2644 * Add the current packet to the given BAW. 2645 * It is assumed that the current packet 2646 * 2647 * + fits inside the BAW; 2648 * + already has had a sequence number allocated. 2649 * 2650 * Since the BAW status may be modified by both the ath task and 2651 * the net80211/ifnet contexts, the TID must be locked. 2652 */ 2653 void 2654 ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an, 2655 struct ath_tid *tid, struct ath_buf *bf) 2656 { 2657 int index, cindex; 2658 struct ieee80211_tx_ampdu *tap; 2659 2660 ATH_TX_LOCK_ASSERT(sc); 2661 2662 if (bf->bf_state.bfs_isretried) 2663 return; 2664 2665 tap = ath_tx_get_tx_tid(an, tid->tid); 2666 2667 if (! bf->bf_state.bfs_dobaw) { 2668 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2669 "%s: dobaw=0, seqno=%d, window %d:%d\n", 2670 __func__, SEQNO(bf->bf_state.bfs_seqno), 2671 tap->txa_start, tap->txa_wnd); 2672 } 2673 2674 if (bf->bf_state.bfs_addedbaw) 2675 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2676 "%s: re-added? tid=%d, seqno %d; window %d:%d; " 2677 "baw head=%d tail=%d\n", 2678 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2679 tap->txa_start, tap->txa_wnd, tid->baw_head, 2680 tid->baw_tail); 2681 2682 /* 2683 * Verify that the given sequence number is not outside of the 2684 * BAW. Complain loudly if that's the case. 2685 */ 2686 if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 2687 SEQNO(bf->bf_state.bfs_seqno))) { 2688 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2689 "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; " 2690 "baw head=%d tail=%d\n", 2691 __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2692 tap->txa_start, tap->txa_wnd, tid->baw_head, 2693 tid->baw_tail); 2694 } 2695 2696 /* 2697 * ni->ni_txseqs[] is the currently allocated seqno. 2698 * the txa state contains the current baw start. 2699 */ 2700 index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno)); 2701 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2702 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2703 "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d " 2704 "baw head=%d tail=%d\n", 2705 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2706 tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head, 2707 tid->baw_tail); 2708 2709 2710 #if 0 2711 assert(tid->tx_buf[cindex] == NULL); 2712 #endif 2713 if (tid->tx_buf[cindex] != NULL) { 2714 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2715 "%s: ba packet dup (index=%d, cindex=%d, " 2716 "head=%d, tail=%d)\n", 2717 __func__, index, cindex, tid->baw_head, tid->baw_tail); 2718 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2719 "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n", 2720 __func__, 2721 tid->tx_buf[cindex], 2722 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno), 2723 bf, 2724 SEQNO(bf->bf_state.bfs_seqno) 2725 ); 2726 } 2727 tid->tx_buf[cindex] = bf; 2728 2729 if (index >= ((tid->baw_tail - tid->baw_head) & 2730 (ATH_TID_MAX_BUFS - 1))) { 2731 tid->baw_tail = cindex; 2732 INCR(tid->baw_tail, ATH_TID_MAX_BUFS); 2733 } 2734 } 2735 2736 /* 2737 * Flip the BAW buffer entry over from the existing one to the new one. 2738 * 2739 * When software retransmitting a (sub-)frame, it is entirely possible that 2740 * the frame ath_buf is marked as BUSY and can't be immediately reused. 2741 * In that instance the buffer is cloned and the new buffer is used for 2742 * retransmit. We thus need to update the ath_buf slot in the BAW buf 2743 * tracking array to maintain consistency. 2744 */ 2745 static void 2746 ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an, 2747 struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf) 2748 { 2749 int index, cindex; 2750 struct ieee80211_tx_ampdu *tap; 2751 int seqno = SEQNO(old_bf->bf_state.bfs_seqno); 2752 2753 ATH_TX_LOCK_ASSERT(sc); 2754 2755 tap = ath_tx_get_tx_tid(an, tid->tid); 2756 index = ATH_BA_INDEX(tap->txa_start, seqno); 2757 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2758 2759 /* 2760 * Just warn for now; if it happens then we should find out 2761 * about it. It's highly likely the aggregation session will 2762 * soon hang. 2763 */ 2764 if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) { 2765 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2766 "%s: retransmitted buffer" 2767 " has mismatching seqno's, BA session may hang.\n", 2768 __func__); 2769 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2770 "%s: old seqno=%d, new_seqno=%d\n", __func__, 2771 old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno); 2772 } 2773 2774 if (tid->tx_buf[cindex] != old_bf) { 2775 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2776 "%s: ath_buf pointer incorrect; " 2777 " has m BA session may hang.\n", __func__); 2778 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2779 "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf); 2780 } 2781 2782 tid->tx_buf[cindex] = new_bf; 2783 } 2784 2785 /* 2786 * seq_start - left edge of BAW 2787 * seq_next - current/next sequence number to allocate 2788 * 2789 * Since the BAW status may be modified by both the ath task and 2790 * the net80211/ifnet contexts, the TID must be locked. 2791 */ 2792 static void 2793 ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an, 2794 struct ath_tid *tid, const struct ath_buf *bf) 2795 { 2796 int index, cindex; 2797 struct ieee80211_tx_ampdu *tap; 2798 int seqno = SEQNO(bf->bf_state.bfs_seqno); 2799 2800 ATH_TX_LOCK_ASSERT(sc); 2801 2802 tap = ath_tx_get_tx_tid(an, tid->tid); 2803 index = ATH_BA_INDEX(tap->txa_start, seqno); 2804 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2805 2806 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2807 "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, " 2808 "baw head=%d, tail=%d\n", 2809 __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index, 2810 cindex, tid->baw_head, tid->baw_tail); 2811 2812 /* 2813 * If this occurs then we have a big problem - something else 2814 * has slid tap->txa_start along without updating the BAW 2815 * tracking start/end pointers. Thus the TX BAW state is now 2816 * completely busted. 2817 * 2818 * But for now, since I haven't yet fixed TDMA and buffer cloning, 2819 * it's quite possible that a cloned buffer is making its way 2820 * here and causing it to fire off. Disable TDMA for now. 2821 */ 2822 if (tid->tx_buf[cindex] != bf) { 2823 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2824 "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n", 2825 __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 2826 tid->tx_buf[cindex], 2827 (tid->tx_buf[cindex] != NULL) ? 2828 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1); 2829 } 2830 2831 tid->tx_buf[cindex] = NULL; 2832 2833 while (tid->baw_head != tid->baw_tail && 2834 !tid->tx_buf[tid->baw_head]) { 2835 INCR(tap->txa_start, IEEE80211_SEQ_RANGE); 2836 INCR(tid->baw_head, ATH_TID_MAX_BUFS); 2837 } 2838 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2839 "%s: tid=%d: baw is now %d:%d, baw head=%d\n", 2840 __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head); 2841 } 2842 2843 static void 2844 ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid, 2845 struct ath_buf *bf) 2846 { 2847 struct ieee80211_frame *wh; 2848 2849 ATH_TX_LOCK_ASSERT(sc); 2850 2851 if (tid->an->an_leak_count > 0) { 2852 wh = mtod(bf->bf_m, struct ieee80211_frame *); 2853 2854 /* 2855 * Update MORE based on the software/net80211 queue states. 2856 */ 2857 if ((tid->an->an_stack_psq > 0) 2858 || (tid->an->an_swq_depth > 0)) 2859 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 2860 else 2861 wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA; 2862 2863 DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE, 2864 "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n", 2865 __func__, 2866 tid->an->an_node.ni_macaddr, 2867 ":", 2868 tid->an->an_leak_count, 2869 tid->an->an_stack_psq, 2870 tid->an->an_swq_depth, 2871 !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA)); 2872 2873 /* 2874 * Re-sync the underlying buffer. 2875 */ 2876 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 2877 BUS_DMASYNC_PREWRITE); 2878 2879 tid->an->an_leak_count --; 2880 } 2881 } 2882 2883 static int 2884 ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid) 2885 { 2886 2887 ATH_TX_LOCK_ASSERT(sc); 2888 2889 if (tid->an->an_leak_count > 0) { 2890 return (1); 2891 } 2892 if (tid->paused) 2893 return (0); 2894 return (1); 2895 } 2896 2897 /* 2898 * Mark the current node/TID as ready to TX. 2899 * 2900 * This is done to make it easy for the software scheduler to 2901 * find which nodes have data to send. 2902 * 2903 * The TXQ lock must be held. 2904 */ 2905 void 2906 ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid) 2907 { 2908 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2909 2910 ATH_TX_LOCK_ASSERT(sc); 2911 2912 /* 2913 * If we are leaking out a frame to this destination 2914 * for PS-POLL, ensure that we allow scheduling to 2915 * occur. 2916 */ 2917 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 2918 return; /* paused, can't schedule yet */ 2919 2920 if (tid->sched) 2921 return; /* already scheduled */ 2922 2923 tid->sched = 1; 2924 2925 #if 0 2926 /* 2927 * If this is a sleeping node we're leaking to, given 2928 * it a higher priority. This is so bad for QoS it hurts. 2929 */ 2930 if (tid->an->an_leak_count) { 2931 TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem); 2932 } else { 2933 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2934 } 2935 #endif 2936 2937 /* 2938 * We can't do the above - it'll confuse the TXQ software 2939 * scheduler which will keep checking the _head_ TID 2940 * in the list to see if it has traffic. If we queue 2941 * a TID to the head of the list and it doesn't transmit, 2942 * we'll check it again. 2943 * 2944 * So, get the rest of this leaking frames support working 2945 * and reliable first and _then_ optimise it so they're 2946 * pushed out in front of any other pending software 2947 * queued nodes. 2948 */ 2949 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2950 } 2951 2952 /* 2953 * Mark the current node as no longer needing to be polled for 2954 * TX packets. 2955 * 2956 * The TXQ lock must be held. 2957 */ 2958 static void 2959 ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid) 2960 { 2961 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2962 2963 ATH_TX_LOCK_ASSERT(sc); 2964 2965 if (tid->sched == 0) 2966 return; 2967 2968 tid->sched = 0; 2969 TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem); 2970 } 2971 2972 /* 2973 * Assign a sequence number manually to the given frame. 2974 * 2975 * This should only be called for A-MPDU TX frames. 2976 * 2977 * Note: for group addressed frames, the sequence number 2978 * should be from NONQOS_TID, and net80211 should have 2979 * already assigned it for us. 2980 */ 2981 static ieee80211_seq 2982 ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni, 2983 struct ath_buf *bf, struct mbuf *m0) 2984 { 2985 struct ieee80211_frame *wh; 2986 int tid; 2987 ieee80211_seq seqno; 2988 uint8_t subtype; 2989 2990 wh = mtod(m0, struct ieee80211_frame *); 2991 tid = ieee80211_gettid(wh); 2992 2993 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, qos has seq=%d\n", 2994 __func__, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2995 2996 /* XXX Is it a control frame? Ignore */ 2997 2998 /* Does the packet require a sequence number? */ 2999 if (! IEEE80211_QOS_HAS_SEQ(wh)) 3000 return -1; 3001 3002 ATH_TX_LOCK_ASSERT(sc); 3003 3004 /* 3005 * Is it a QOS NULL Data frame? Give it a sequence number from 3006 * the default TID (IEEE80211_NONQOS_TID.) 3007 * 3008 * The RX path of everything I've looked at doesn't include the NULL 3009 * data frame sequence number in the aggregation state updates, so 3010 * assigning it a sequence number there will cause a BAW hole on the 3011 * RX side. 3012 */ 3013 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 3014 if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) { 3015 /* XXX no locking for this TID? This is a bit of a problem. */ 3016 seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 3017 INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 3018 } else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 3019 /* 3020 * group addressed frames get a sequence number from 3021 * a different sequence number space. 3022 */ 3023 seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 3024 INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 3025 } else { 3026 /* Manually assign sequence number */ 3027 seqno = ni->ni_txseqs[tid]; 3028 INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE); 3029 } 3030 *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); 3031 M_SEQNO_SET(m0, seqno); 3032 3033 /* Return so caller can do something with it if needed */ 3034 DPRINTF(sc, ATH_DEBUG_SW_TX, 3035 "%s: -> subtype=0x%x, tid=%d, seqno=%d\n", 3036 __func__, subtype, tid, seqno); 3037 return seqno; 3038 } 3039 3040 /* 3041 * Attempt to direct dispatch an aggregate frame to hardware. 3042 * If the frame is out of BAW, queue. 3043 * Otherwise, schedule it as a single frame. 3044 */ 3045 static void 3046 ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 3047 struct ath_txq *txq, struct ath_buf *bf) 3048 { 3049 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 3050 struct ieee80211_tx_ampdu *tap; 3051 3052 ATH_TX_LOCK_ASSERT(sc); 3053 3054 tap = ath_tx_get_tx_tid(an, tid->tid); 3055 3056 /* paused? queue */ 3057 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 3058 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3059 /* XXX don't sched - we're paused! */ 3060 return; 3061 } 3062 3063 /* outside baw? queue */ 3064 if (bf->bf_state.bfs_dobaw && 3065 (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 3066 SEQNO(bf->bf_state.bfs_seqno)))) { 3067 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3068 ath_tx_tid_sched(sc, tid); 3069 return; 3070 } 3071 3072 /* 3073 * This is a temporary check and should be removed once 3074 * all the relevant code paths have been fixed. 3075 * 3076 * During aggregate retries, it's possible that the head 3077 * frame will fail (which has the bfs_aggr and bfs_nframes 3078 * fields set for said aggregate) and will be retried as 3079 * a single frame. In this instance, the values should 3080 * be reset or the completion code will get upset with you. 3081 */ 3082 if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) { 3083 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 3084 "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__, 3085 bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes); 3086 bf->bf_state.bfs_aggr = 0; 3087 bf->bf_state.bfs_nframes = 1; 3088 } 3089 3090 /* Update CLRDMASK just before this frame is queued */ 3091 ath_tx_update_clrdmask(sc, tid, bf); 3092 3093 /* Direct dispatch to hardware */ 3094 ath_tx_do_ratelookup(sc, bf); 3095 ath_tx_calc_duration(sc, bf); 3096 ath_tx_calc_protection(sc, bf); 3097 ath_tx_set_rtscts(sc, bf); 3098 ath_tx_rate_fill_rcflags(sc, bf); 3099 ath_tx_setds(sc, bf); 3100 3101 /* Statistics */ 3102 sc->sc_aggr_stats.aggr_low_hwq_single_pkt++; 3103 3104 /* Track per-TID hardware queue depth correctly */ 3105 tid->hwq_depth++; 3106 3107 /* Add to BAW */ 3108 if (bf->bf_state.bfs_dobaw) { 3109 ath_tx_addto_baw(sc, an, tid, bf); 3110 bf->bf_state.bfs_addedbaw = 1; 3111 } 3112 3113 /* Set completion handler, multi-frame aggregate or not */ 3114 bf->bf_comp = ath_tx_aggr_comp; 3115 3116 /* 3117 * Update the current leak count if 3118 * we're leaking frames; and set the 3119 * MORE flag as appropriate. 3120 */ 3121 ath_tx_leak_count_update(sc, tid, bf); 3122 3123 /* Hand off to hardware */ 3124 ath_tx_handoff(sc, txq, bf); 3125 } 3126 3127 /* 3128 * Attempt to send the packet. 3129 * If the queue isn't busy, direct-dispatch. 3130 * If the queue is busy enough, queue the given packet on the 3131 * relevant software queue. 3132 */ 3133 void 3134 ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, 3135 struct ath_txq *txq, int queue_to_head, struct ath_buf *bf) 3136 { 3137 struct ath_node *an = ATH_NODE(ni); 3138 struct ieee80211_frame *wh; 3139 struct ath_tid *atid; 3140 int pri, tid; 3141 struct mbuf *m0 = bf->bf_m; 3142 3143 ATH_TX_LOCK_ASSERT(sc); 3144 3145 /* Fetch the TID - non-QoS frames get assigned to TID 16 */ 3146 wh = mtod(m0, struct ieee80211_frame *); 3147 pri = ath_tx_getac(sc, m0); 3148 tid = ath_tx_gettid(sc, m0); 3149 atid = &an->an_tid[tid]; 3150 3151 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 3152 __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 3153 3154 /* Set local packet state, used to queue packets to hardware */ 3155 /* XXX potentially duplicate info, re-check */ 3156 bf->bf_state.bfs_tid = tid; 3157 bf->bf_state.bfs_tx_queue = txq->axq_qnum; 3158 bf->bf_state.bfs_pri = pri; 3159 3160 /* 3161 * If the hardware queue isn't busy, queue it directly. 3162 * If the hardware queue is busy, queue it. 3163 * If the TID is paused or the traffic it outside BAW, software 3164 * queue it. 3165 * 3166 * If the node is in power-save and we're leaking a frame, 3167 * leak a single frame. 3168 */ 3169 if (! ath_tx_tid_can_tx_or_sched(sc, atid)) { 3170 /* TID is paused, queue */ 3171 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__); 3172 /* 3173 * If the caller requested that it be sent at a high 3174 * priority, queue it at the head of the list. 3175 */ 3176 if (queue_to_head) 3177 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 3178 else 3179 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3180 } else if (ath_tx_ampdu_pending(sc, an, tid)) { 3181 /* AMPDU pending; queue */ 3182 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__); 3183 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3184 /* XXX sched? */ 3185 } else if (ath_tx_ampdu_running(sc, an, tid)) { 3186 /* 3187 * AMPDU running, queue single-frame if the hardware queue 3188 * isn't busy. 3189 * 3190 * If the hardware queue is busy, sending an aggregate frame 3191 * then just hold off so we can queue more aggregate frames. 3192 * 3193 * Otherwise we may end up with single frames leaking through 3194 * because we are dispatching them too quickly. 3195 * 3196 * TODO: maybe we should treat this as two policies - minimise 3197 * latency, or maximise throughput. Then for BE/BK we can 3198 * maximise throughput, and VO/VI (if AMPDU is enabled!) 3199 * minimise latency. 3200 */ 3201 3202 /* 3203 * Always queue the frame to the tail of the list. 3204 */ 3205 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3206 3207 /* 3208 * If the hardware queue isn't busy, direct dispatch 3209 * the head frame in the list. 3210 * 3211 * Note: if we're say, configured to do ADDBA but not A-MPDU 3212 * then maybe we want to still queue two non-aggregate frames 3213 * to the hardware. Again with the per-TID policy 3214 * configuration..) 3215 * 3216 * Otherwise, schedule the TID. 3217 */ 3218 /* XXX TXQ locking */ 3219 if (txq->axq_depth + txq->fifo.axq_depth == 0) { 3220 3221 bf = ATH_TID_FIRST(atid); 3222 ATH_TID_REMOVE(atid, bf, bf_list); 3223 3224 /* 3225 * Ensure it's definitely treated as a non-AMPDU 3226 * frame - this information may have been left 3227 * over from a previous attempt. 3228 */ 3229 bf->bf_state.bfs_aggr = 0; 3230 bf->bf_state.bfs_nframes = 1; 3231 3232 /* Queue to the hardware */ 3233 ath_tx_xmit_aggr(sc, an, txq, bf); 3234 DPRINTF(sc, ATH_DEBUG_SW_TX, 3235 "%s: xmit_aggr\n", 3236 __func__); 3237 } else { 3238 DPRINTF(sc, ATH_DEBUG_SW_TX, 3239 "%s: ampdu; swq'ing\n", 3240 __func__); 3241 3242 ath_tx_tid_sched(sc, atid); 3243 } 3244 /* 3245 * If we're not doing A-MPDU, be prepared to direct dispatch 3246 * up to both limits if possible. This particular corner 3247 * case may end up with packet starvation between aggregate 3248 * traffic and non-aggregate traffic: we want to ensure 3249 * that non-aggregate stations get a few frames queued to the 3250 * hardware before the aggregate station(s) get their chance. 3251 * 3252 * So if you only ever see a couple of frames direct dispatched 3253 * to the hardware from a non-AMPDU client, check both here 3254 * and in the software queue dispatcher to ensure that those 3255 * non-AMPDU stations get a fair chance to transmit. 3256 */ 3257 /* XXX TXQ locking */ 3258 } else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) && 3259 (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) { 3260 /* AMPDU not running, attempt direct dispatch */ 3261 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__); 3262 /* See if clrdmask needs to be set */ 3263 ath_tx_update_clrdmask(sc, atid, bf); 3264 3265 /* 3266 * Update the current leak count if 3267 * we're leaking frames; and set the 3268 * MORE flag as appropriate. 3269 */ 3270 ath_tx_leak_count_update(sc, atid, bf); 3271 3272 /* 3273 * Dispatch the frame. 3274 */ 3275 ath_tx_xmit_normal(sc, txq, bf); 3276 } else { 3277 /* Busy; queue */ 3278 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__); 3279 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3280 ath_tx_tid_sched(sc, atid); 3281 } 3282 } 3283 3284 /* 3285 * Only set the clrdmask bit if none of the nodes are currently 3286 * filtered. 3287 * 3288 * XXX TODO: go through all the callers and check to see 3289 * which are being called in the context of looping over all 3290 * TIDs (eg, if all tids are being paused, resumed, etc.) 3291 * That'll avoid O(n^2) complexity here. 3292 */ 3293 static void 3294 ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an) 3295 { 3296 int i; 3297 3298 ATH_TX_LOCK_ASSERT(sc); 3299 3300 for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3301 if (an->an_tid[i].isfiltered == 1) 3302 return; 3303 } 3304 an->clrdmask = 1; 3305 } 3306 3307 /* 3308 * Configure the per-TID node state. 3309 * 3310 * This likely belongs in if_ath_node.c but I can't think of anywhere 3311 * else to put it just yet. 3312 * 3313 * This sets up the SLISTs and the mutex as appropriate. 3314 */ 3315 void 3316 ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an) 3317 { 3318 int i, j; 3319 struct ath_tid *atid; 3320 3321 for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3322 atid = &an->an_tid[i]; 3323 3324 /* XXX now with this bzer(), is the field 0'ing needed? */ 3325 bzero(atid, sizeof(*atid)); 3326 3327 TAILQ_INIT(&atid->tid_q); 3328 TAILQ_INIT(&atid->filtq.tid_q); 3329 atid->tid = i; 3330 atid->an = an; 3331 for (j = 0; j < ATH_TID_MAX_BUFS; j++) 3332 atid->tx_buf[j] = NULL; 3333 atid->baw_head = atid->baw_tail = 0; 3334 atid->paused = 0; 3335 atid->sched = 0; 3336 atid->hwq_depth = 0; 3337 atid->cleanup_inprogress = 0; 3338 if (i == IEEE80211_NONQOS_TID) 3339 atid->ac = ATH_NONQOS_TID_AC; 3340 else 3341 atid->ac = TID_TO_WME_AC(i); 3342 } 3343 an->clrdmask = 1; /* Always start by setting this bit */ 3344 } 3345 3346 /* 3347 * Pause the current TID. This stops packets from being transmitted 3348 * on it. 3349 * 3350 * Since this is also called from upper layers as well as the driver, 3351 * it will get the TID lock. 3352 */ 3353 static void 3354 ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid) 3355 { 3356 3357 ATH_TX_LOCK_ASSERT(sc); 3358 tid->paused++; 3359 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n", 3360 __func__, 3361 tid->an->an_node.ni_macaddr, ":", 3362 tid->tid, 3363 tid->paused); 3364 } 3365 3366 /* 3367 * Unpause the current TID, and schedule it if needed. 3368 */ 3369 static void 3370 ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid) 3371 { 3372 ATH_TX_LOCK_ASSERT(sc); 3373 3374 /* 3375 * There's some odd places where ath_tx_tid_resume() is called 3376 * when it shouldn't be; this works around that particular issue 3377 * until it's actually resolved. 3378 */ 3379 if (tid->paused == 0) { 3380 device_printf(sc->sc_dev, 3381 "%s: [%6D]: tid=%d, paused=0?\n", 3382 __func__, 3383 tid->an->an_node.ni_macaddr, ":", 3384 tid->tid); 3385 } else { 3386 tid->paused--; 3387 } 3388 3389 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 3390 "%s: [%6D]: tid=%d, unpaused = %d\n", 3391 __func__, 3392 tid->an->an_node.ni_macaddr, ":", 3393 tid->tid, 3394 tid->paused); 3395 3396 if (tid->paused) 3397 return; 3398 3399 /* 3400 * Override the clrdmask configuration for the next frame 3401 * from this TID, just to get the ball rolling. 3402 */ 3403 ath_tx_set_clrdmask(sc, tid->an); 3404 3405 if (tid->axq_depth == 0) 3406 return; 3407 3408 /* XXX isfiltered shouldn't ever be 0 at this point */ 3409 if (tid->isfiltered == 1) { 3410 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n", 3411 __func__); 3412 return; 3413 } 3414 3415 ath_tx_tid_sched(sc, tid); 3416 3417 /* 3418 * Queue the software TX scheduler. 3419 */ 3420 ath_tx_swq_kick(sc); 3421 } 3422 3423 /* 3424 * Add the given ath_buf to the TID filtered frame list. 3425 * This requires the TID be filtered. 3426 */ 3427 static void 3428 ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid, 3429 struct ath_buf *bf) 3430 { 3431 3432 ATH_TX_LOCK_ASSERT(sc); 3433 3434 if (!tid->isfiltered) 3435 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n", 3436 __func__); 3437 3438 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf); 3439 3440 /* Set the retry bit and bump the retry counter */ 3441 ath_tx_set_retry(sc, bf); 3442 sc->sc_stats.ast_tx_swfiltered++; 3443 3444 ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list); 3445 } 3446 3447 /* 3448 * Handle a completed filtered frame from the given TID. 3449 * This just enables/pauses the filtered frame state if required 3450 * and appends the filtered frame to the filtered queue. 3451 */ 3452 static void 3453 ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid, 3454 struct ath_buf *bf) 3455 { 3456 3457 ATH_TX_LOCK_ASSERT(sc); 3458 3459 if (! tid->isfiltered) { 3460 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n", 3461 __func__, tid->tid); 3462 tid->isfiltered = 1; 3463 ath_tx_tid_pause(sc, tid); 3464 } 3465 3466 /* Add the frame to the filter queue */ 3467 ath_tx_tid_filt_addbuf(sc, tid, bf); 3468 } 3469 3470 /* 3471 * Complete the filtered frame TX completion. 3472 * 3473 * If there are no more frames in the hardware queue, unpause/unfilter 3474 * the TID if applicable. Otherwise we will wait for a node PS transition 3475 * to unfilter. 3476 */ 3477 static void 3478 ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid) 3479 { 3480 struct ath_buf *bf; 3481 int do_resume = 0; 3482 3483 ATH_TX_LOCK_ASSERT(sc); 3484 3485 if (tid->hwq_depth != 0) 3486 return; 3487 3488 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n", 3489 __func__, tid->tid); 3490 if (tid->isfiltered == 1) { 3491 tid->isfiltered = 0; 3492 do_resume = 1; 3493 } 3494 3495 /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */ 3496 ath_tx_set_clrdmask(sc, tid->an); 3497 3498 /* XXX this is really quite inefficient */ 3499 while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) { 3500 ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3501 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3502 } 3503 3504 /* And only resume if we had paused before */ 3505 if (do_resume) 3506 ath_tx_tid_resume(sc, tid); 3507 } 3508 3509 /* 3510 * Called when a single (aggregate or otherwise) frame is completed. 3511 * 3512 * Returns 0 if the buffer could be added to the filtered list 3513 * (cloned or otherwise), 1 if the buffer couldn't be added to the 3514 * filtered list (failed clone; expired retry) and the caller should 3515 * free it and handle it like a failure (eg by sending a BAR.) 3516 * 3517 * since the buffer may be cloned, bf must be not touched after this 3518 * if the return value is 0. 3519 */ 3520 static int 3521 ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid, 3522 struct ath_buf *bf) 3523 { 3524 struct ath_buf *nbf; 3525 int retval; 3526 3527 ATH_TX_LOCK_ASSERT(sc); 3528 3529 /* 3530 * Don't allow a filtered frame to live forever. 3531 */ 3532 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 3533 sc->sc_stats.ast_tx_swretrymax++; 3534 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3535 "%s: bf=%p, seqno=%d, exceeded retries\n", 3536 __func__, 3537 bf, 3538 SEQNO(bf->bf_state.bfs_seqno)); 3539 retval = 1; /* error */ 3540 goto finish; 3541 } 3542 3543 /* 3544 * A busy buffer can't be added to the retry list. 3545 * It needs to be cloned. 3546 */ 3547 if (bf->bf_flags & ATH_BUF_BUSY) { 3548 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3549 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3550 "%s: busy buffer clone: %p -> %p\n", 3551 __func__, bf, nbf); 3552 } else { 3553 nbf = bf; 3554 } 3555 3556 if (nbf == NULL) { 3557 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3558 "%s: busy buffer couldn't be cloned (%p)!\n", 3559 __func__, bf); 3560 retval = 1; /* error */ 3561 } else { 3562 ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3563 retval = 0; /* ok */ 3564 } 3565 finish: 3566 ath_tx_tid_filt_comp_complete(sc, tid); 3567 3568 return (retval); 3569 } 3570 3571 static void 3572 ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid, 3573 struct ath_buf *bf_first, ath_bufhead *bf_q) 3574 { 3575 struct ath_buf *bf, *bf_next, *nbf; 3576 3577 ATH_TX_LOCK_ASSERT(sc); 3578 3579 bf = bf_first; 3580 while (bf) { 3581 bf_next = bf->bf_next; 3582 bf->bf_next = NULL; /* Remove it from the aggr list */ 3583 3584 /* 3585 * Don't allow a filtered frame to live forever. 3586 */ 3587 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 3588 sc->sc_stats.ast_tx_swretrymax++; 3589 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3590 "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n", 3591 __func__, 3592 tid->tid, 3593 bf, 3594 SEQNO(bf->bf_state.bfs_seqno)); 3595 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3596 goto next; 3597 } 3598 3599 if (bf->bf_flags & ATH_BUF_BUSY) { 3600 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3601 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3602 "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n", 3603 __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno)); 3604 } else { 3605 nbf = bf; 3606 } 3607 3608 /* 3609 * If the buffer couldn't be cloned, add it to bf_q; 3610 * the caller will free the buffer(s) as required. 3611 */ 3612 if (nbf == NULL) { 3613 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3614 "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n", 3615 __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno)); 3616 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3617 } else { 3618 ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3619 } 3620 next: 3621 bf = bf_next; 3622 } 3623 3624 ath_tx_tid_filt_comp_complete(sc, tid); 3625 } 3626 3627 /* 3628 * Suspend the queue because we need to TX a BAR. 3629 */ 3630 static void 3631 ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid) 3632 { 3633 3634 ATH_TX_LOCK_ASSERT(sc); 3635 3636 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3637 "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n", 3638 __func__, 3639 tid->tid, 3640 tid->bar_wait, 3641 tid->bar_tx); 3642 3643 /* We shouldn't be called when bar_tx is 1 */ 3644 if (tid->bar_tx) { 3645 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3646 "%s: bar_tx is 1?!\n", __func__); 3647 } 3648 3649 /* If we've already been called, just be patient. */ 3650 if (tid->bar_wait) 3651 return; 3652 3653 /* Wait! */ 3654 tid->bar_wait = 1; 3655 3656 /* Only one pause, no matter how many frames fail */ 3657 ath_tx_tid_pause(sc, tid); 3658 } 3659 3660 /* 3661 * We've finished with BAR handling - either we succeeded or 3662 * failed. Either way, unsuspend TX. 3663 */ 3664 static void 3665 ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid) 3666 { 3667 3668 ATH_TX_LOCK_ASSERT(sc); 3669 3670 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3671 "%s: %6D: TID=%d, called\n", 3672 __func__, 3673 tid->an->an_node.ni_macaddr, 3674 ":", 3675 tid->tid); 3676 3677 if (tid->bar_tx == 0 || tid->bar_wait == 0) { 3678 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3679 "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 3680 __func__, tid->an->an_node.ni_macaddr, ":", 3681 tid->tid, tid->bar_tx, tid->bar_wait); 3682 } 3683 3684 tid->bar_tx = tid->bar_wait = 0; 3685 ath_tx_tid_resume(sc, tid); 3686 } 3687 3688 /* 3689 * Return whether we're ready to TX a BAR frame. 3690 * 3691 * Requires the TID lock be held. 3692 */ 3693 static int 3694 ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid) 3695 { 3696 3697 ATH_TX_LOCK_ASSERT(sc); 3698 3699 if (tid->bar_wait == 0 || tid->hwq_depth > 0) 3700 return (0); 3701 3702 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3703 "%s: %6D: TID=%d, bar ready\n", 3704 __func__, 3705 tid->an->an_node.ni_macaddr, 3706 ":", 3707 tid->tid); 3708 3709 return (1); 3710 } 3711 3712 /* 3713 * Check whether the current TID is ready to have a BAR 3714 * TXed and if so, do the TX. 3715 * 3716 * Since the TID/TXQ lock can't be held during a call to 3717 * ieee80211_send_bar(), we have to do the dirty thing of unlocking it, 3718 * sending the BAR and locking it again. 3719 * 3720 * Eventually, the code to send the BAR should be broken out 3721 * from this routine so the lock doesn't have to be reacquired 3722 * just to be immediately dropped by the caller. 3723 */ 3724 static void 3725 ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid) 3726 { 3727 struct ieee80211_tx_ampdu *tap; 3728 3729 ATH_TX_LOCK_ASSERT(sc); 3730 3731 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3732 "%s: %6D: TID=%d, called\n", 3733 __func__, 3734 tid->an->an_node.ni_macaddr, 3735 ":", 3736 tid->tid); 3737 3738 tap = ath_tx_get_tx_tid(tid->an, tid->tid); 3739 3740 /* 3741 * This is an error condition! 3742 */ 3743 if (tid->bar_wait == 0 || tid->bar_tx == 1) { 3744 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3745 "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 3746 __func__, tid->an->an_node.ni_macaddr, ":", 3747 tid->tid, tid->bar_tx, tid->bar_wait); 3748 return; 3749 } 3750 3751 /* Don't do anything if we still have pending frames */ 3752 if (tid->hwq_depth > 0) { 3753 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3754 "%s: %6D: TID=%d, hwq_depth=%d, waiting\n", 3755 __func__, 3756 tid->an->an_node.ni_macaddr, 3757 ":", 3758 tid->tid, 3759 tid->hwq_depth); 3760 return; 3761 } 3762 3763 /* We're now about to TX */ 3764 tid->bar_tx = 1; 3765 3766 /* 3767 * Override the clrdmask configuration for the next frame, 3768 * just to get the ball rolling. 3769 */ 3770 ath_tx_set_clrdmask(sc, tid->an); 3771 3772 /* 3773 * Calculate new BAW left edge, now that all frames have either 3774 * succeeded or failed. 3775 * 3776 * XXX verify this is _actually_ the valid value to begin at! 3777 */ 3778 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3779 "%s: %6D: TID=%d, new BAW left edge=%d\n", 3780 __func__, 3781 tid->an->an_node.ni_macaddr, 3782 ":", 3783 tid->tid, 3784 tap->txa_start); 3785 3786 /* Try sending the BAR frame */ 3787 /* We can't hold the lock here! */ 3788 3789 ATH_TX_UNLOCK(sc); 3790 if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) { 3791 /* Success? Now we wait for notification that it's done */ 3792 ATH_TX_LOCK(sc); 3793 return; 3794 } 3795 3796 /* Failure? For now, warn loudly and continue */ 3797 ATH_TX_LOCK(sc); 3798 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3799 "%s: %6D: TID=%d, failed to TX BAR, continue!\n", 3800 __func__, tid->an->an_node.ni_macaddr, ":", 3801 tid->tid); 3802 ath_tx_tid_bar_unsuspend(sc, tid); 3803 } 3804 3805 static void 3806 ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an, 3807 struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf) 3808 { 3809 3810 ATH_TX_LOCK_ASSERT(sc); 3811 3812 /* 3813 * If the current TID is running AMPDU, update 3814 * the BAW. 3815 */ 3816 if (ath_tx_ampdu_running(sc, an, tid->tid) && 3817 bf->bf_state.bfs_dobaw) { 3818 /* 3819 * Only remove the frame from the BAW if it's 3820 * been transmitted at least once; this means 3821 * the frame was in the BAW to begin with. 3822 */ 3823 if (bf->bf_state.bfs_retries > 0) { 3824 ath_tx_update_baw(sc, an, tid, bf); 3825 bf->bf_state.bfs_dobaw = 0; 3826 } 3827 #if 0 3828 /* 3829 * This has become a non-fatal error now 3830 */ 3831 if (! bf->bf_state.bfs_addedbaw) 3832 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW 3833 "%s: wasn't added: seqno %d\n", 3834 __func__, SEQNO(bf->bf_state.bfs_seqno)); 3835 #endif 3836 } 3837 3838 /* Strip it out of an aggregate list if it was in one */ 3839 bf->bf_next = NULL; 3840 3841 /* Insert on the free queue to be freed by the caller */ 3842 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 3843 } 3844 3845 static void 3846 ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an, 3847 const char *pfx, struct ath_tid *tid, struct ath_buf *bf) 3848 { 3849 struct ieee80211_node *ni = &an->an_node; 3850 struct ath_txq *txq; 3851 struct ieee80211_tx_ampdu *tap; 3852 3853 txq = sc->sc_ac2q[tid->ac]; 3854 tap = ath_tx_get_tx_tid(an, tid->tid); 3855 3856 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3857 "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, " 3858 "seqno=%d, retry=%d\n", 3859 __func__, 3860 pfx, 3861 ni->ni_macaddr, 3862 ":", 3863 bf, 3864 bf->bf_state.bfs_addedbaw, 3865 bf->bf_state.bfs_dobaw, 3866 SEQNO(bf->bf_state.bfs_seqno), 3867 bf->bf_state.bfs_retries); 3868 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3869 "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n", 3870 __func__, 3871 pfx, 3872 ni->ni_macaddr, 3873 ":", 3874 bf, 3875 txq->axq_qnum, 3876 txq->axq_depth, 3877 txq->axq_aggr_depth); 3878 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3879 "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, " 3880 "isfiltered=%d\n", 3881 __func__, 3882 pfx, 3883 ni->ni_macaddr, 3884 ":", 3885 bf, 3886 tid->axq_depth, 3887 tid->hwq_depth, 3888 tid->bar_wait, 3889 tid->isfiltered); 3890 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3891 "%s: %s: %6D: tid %d: " 3892 "sched=%d, paused=%d, " 3893 "incomp=%d, baw_head=%d, " 3894 "baw_tail=%d txa_start=%d, ni_txseqs=%d\n", 3895 __func__, 3896 pfx, 3897 ni->ni_macaddr, 3898 ":", 3899 tid->tid, 3900 tid->sched, tid->paused, 3901 tid->incomp, tid->baw_head, 3902 tid->baw_tail, tap == NULL ? -1 : tap->txa_start, 3903 ni->ni_txseqs[tid->tid]); 3904 3905 /* XXX Dump the frame, see what it is? */ 3906 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 3907 ieee80211_dump_pkt(ni->ni_ic, 3908 mtod(bf->bf_m, const uint8_t *), 3909 bf->bf_m->m_len, 0, -1); 3910 } 3911 3912 /* 3913 * Free any packets currently pending in the software TX queue. 3914 * 3915 * This will be called when a node is being deleted. 3916 * 3917 * It can also be called on an active node during an interface 3918 * reset or state transition. 3919 * 3920 * (From Linux/reference): 3921 * 3922 * TODO: For frame(s) that are in the retry state, we will reuse the 3923 * sequence number(s) without setting the retry bit. The 3924 * alternative is to give up on these and BAR the receiver's window 3925 * forward. 3926 */ 3927 static void 3928 ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an, 3929 struct ath_tid *tid, ath_bufhead *bf_cq) 3930 { 3931 struct ath_buf *bf; 3932 struct ieee80211_tx_ampdu *tap; 3933 struct ieee80211_node *ni = &an->an_node; 3934 int t; 3935 3936 tap = ath_tx_get_tx_tid(an, tid->tid); 3937 3938 ATH_TX_LOCK_ASSERT(sc); 3939 3940 /* Walk the queue, free frames */ 3941 t = 0; 3942 for (;;) { 3943 bf = ATH_TID_FIRST(tid); 3944 if (bf == NULL) { 3945 break; 3946 } 3947 3948 if (t == 0) { 3949 ath_tx_tid_drain_print(sc, an, "norm", tid, bf); 3950 // t = 1; 3951 } 3952 3953 ATH_TID_REMOVE(tid, bf, bf_list); 3954 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3955 } 3956 3957 /* And now, drain the filtered frame queue */ 3958 t = 0; 3959 for (;;) { 3960 bf = ATH_TID_FILT_FIRST(tid); 3961 if (bf == NULL) 3962 break; 3963 3964 if (t == 0) { 3965 ath_tx_tid_drain_print(sc, an, "filt", tid, bf); 3966 // t = 1; 3967 } 3968 3969 ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3970 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3971 } 3972 3973 /* 3974 * Override the clrdmask configuration for the next frame 3975 * in case there is some future transmission, just to get 3976 * the ball rolling. 3977 * 3978 * This won't hurt things if the TID is about to be freed. 3979 */ 3980 ath_tx_set_clrdmask(sc, tid->an); 3981 3982 /* 3983 * Now that it's completed, grab the TID lock and update 3984 * the sequence number and BAW window. 3985 * Because sequence numbers have been assigned to frames 3986 * that haven't been sent yet, it's entirely possible 3987 * we'll be called with some pending frames that have not 3988 * been transmitted. 3989 * 3990 * The cleaner solution is to do the sequence number allocation 3991 * when the packet is first transmitted - and thus the "retries" 3992 * check above would be enough to update the BAW/seqno. 3993 */ 3994 3995 /* But don't do it for non-QoS TIDs */ 3996 if (tap) { 3997 #if 1 3998 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 3999 "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n", 4000 __func__, 4001 ni->ni_macaddr, 4002 ":", 4003 an, 4004 tid->tid, 4005 tap->txa_start); 4006 #endif 4007 ni->ni_txseqs[tid->tid] = tap->txa_start; 4008 tid->baw_tail = tid->baw_head; 4009 } 4010 } 4011 4012 /* 4013 * Reset the TID state. This must be only called once the node has 4014 * had its frames flushed from this TID, to ensure that no other 4015 * pause / unpause logic can kick in. 4016 */ 4017 static void 4018 ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid) 4019 { 4020 4021 #if 0 4022 tid->bar_wait = tid->bar_tx = tid->isfiltered = 0; 4023 tid->paused = tid->sched = tid->addba_tx_pending = 0; 4024 tid->incomp = tid->cleanup_inprogress = 0; 4025 #endif 4026 4027 /* 4028 * If we have a bar_wait set, we need to unpause the TID 4029 * here. Otherwise once cleanup has finished, the TID won't 4030 * have the right paused counter. 4031 * 4032 * XXX I'm not going through resume here - I don't want the 4033 * node to be rescheuled just yet. This however should be 4034 * methodized! 4035 */ 4036 if (tid->bar_wait) { 4037 if (tid->paused > 0) { 4038 tid->paused --; 4039 } 4040 } 4041 4042 /* 4043 * XXX same with a currently filtered TID. 4044 * 4045 * Since this is being called during a flush, we assume that 4046 * the filtered frame list is actually empty. 4047 * 4048 * XXX TODO: add in a check to ensure that the filtered queue 4049 * depth is actually 0! 4050 */ 4051 if (tid->isfiltered) { 4052 if (tid->paused > 0) { 4053 tid->paused --; 4054 } 4055 } 4056 4057 /* 4058 * Clear BAR, filtered frames, scheduled and ADDBA pending. 4059 * The TID may be going through cleanup from the last association 4060 * where things in the BAW are still in the hardware queue. 4061 */ 4062 tid->bar_wait = 0; 4063 tid->bar_tx = 0; 4064 tid->isfiltered = 0; 4065 tid->sched = 0; 4066 tid->addba_tx_pending = 0; 4067 4068 /* 4069 * XXX TODO: it may just be enough to walk the HWQs and mark 4070 * frames for that node as non-aggregate; or mark the ath_node 4071 * with something that indicates that aggregation is no longer 4072 * occurring. Then we can just toss the BAW complaints and 4073 * do a complete hard reset of state here - no pause, no 4074 * complete counter, etc. 4075 */ 4076 4077 } 4078 4079 /* 4080 * Flush all software queued packets for the given node. 4081 * 4082 * This occurs when a completion handler frees the last buffer 4083 * for a node, and the node is thus freed. This causes the node 4084 * to be cleaned up, which ends up calling ath_tx_node_flush. 4085 */ 4086 void 4087 ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an) 4088 { 4089 int tid; 4090 ath_bufhead bf_cq; 4091 struct ath_buf *bf; 4092 4093 TAILQ_INIT(&bf_cq); 4094 4095 ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p", 4096 &an->an_node); 4097 4098 ATH_TX_LOCK(sc); 4099 DPRINTF(sc, ATH_DEBUG_NODE, 4100 "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, " 4101 "swq_depth=%d, clrdmask=%d, leak_count=%d\n", 4102 __func__, 4103 an->an_node.ni_macaddr, 4104 ":", 4105 an->an_is_powersave, 4106 an->an_stack_psq, 4107 an->an_tim_set, 4108 an->an_swq_depth, 4109 an->clrdmask, 4110 an->an_leak_count); 4111 4112 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 4113 struct ath_tid *atid = &an->an_tid[tid]; 4114 4115 /* Free packets */ 4116 ath_tx_tid_drain(sc, an, atid, &bf_cq); 4117 4118 /* Remove this tid from the list of active tids */ 4119 ath_tx_tid_unsched(sc, atid); 4120 4121 /* Reset the per-TID pause, BAR, etc state */ 4122 ath_tx_tid_reset(sc, atid); 4123 } 4124 4125 /* 4126 * Clear global leak count 4127 */ 4128 an->an_leak_count = 0; 4129 ATH_TX_UNLOCK(sc); 4130 4131 /* Handle completed frames */ 4132 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4133 TAILQ_REMOVE(&bf_cq, bf, bf_list); 4134 ath_tx_default_comp(sc, bf, 0); 4135 } 4136 } 4137 4138 /* 4139 * Drain all the software TXQs currently with traffic queued. 4140 */ 4141 void 4142 ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq) 4143 { 4144 struct ath_tid *tid; 4145 ath_bufhead bf_cq; 4146 struct ath_buf *bf; 4147 4148 TAILQ_INIT(&bf_cq); 4149 ATH_TX_LOCK(sc); 4150 4151 /* 4152 * Iterate over all active tids for the given txq, 4153 * flushing and unsched'ing them 4154 */ 4155 while (! TAILQ_EMPTY(&txq->axq_tidq)) { 4156 tid = TAILQ_FIRST(&txq->axq_tidq); 4157 ath_tx_tid_drain(sc, tid->an, tid, &bf_cq); 4158 ath_tx_tid_unsched(sc, tid); 4159 } 4160 4161 ATH_TX_UNLOCK(sc); 4162 4163 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4164 TAILQ_REMOVE(&bf_cq, bf, bf_list); 4165 ath_tx_default_comp(sc, bf, 0); 4166 } 4167 } 4168 4169 /* 4170 * Handle completion of non-aggregate session frames. 4171 * 4172 * This (currently) doesn't implement software retransmission of 4173 * non-aggregate frames! 4174 * 4175 * Software retransmission of non-aggregate frames needs to obey 4176 * the strict sequence number ordering, and drop any frames that 4177 * will fail this. 4178 * 4179 * For now, filtered frames and frame transmission will cause 4180 * all kinds of issues. So we don't support them. 4181 * 4182 * So anyone queuing frames via ath_tx_normal_xmit() or 4183 * ath_tx_hw_queue_norm() must override and set CLRDMASK. 4184 */ 4185 void 4186 ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 4187 { 4188 struct ieee80211_node *ni = bf->bf_node; 4189 struct ath_node *an = ATH_NODE(ni); 4190 int tid = bf->bf_state.bfs_tid; 4191 struct ath_tid *atid = &an->an_tid[tid]; 4192 struct ath_tx_status *ts = &bf->bf_status.ds_txstat; 4193 4194 /* The TID state is protected behind the TXQ lock */ 4195 ATH_TX_LOCK(sc); 4196 4197 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n", 4198 __func__, bf, fail, atid->hwq_depth - 1); 4199 4200 atid->hwq_depth--; 4201 4202 #if 0 4203 /* 4204 * If the frame was filtered, stick it on the filter frame 4205 * queue and complain about it. It shouldn't happen! 4206 */ 4207 if ((ts->ts_status & HAL_TXERR_FILT) || 4208 (ts->ts_status != 0 && atid->isfiltered)) { 4209 DPRINTF(sc, ATH_DEBUG_SW_TX, 4210 "%s: isfiltered=%d, ts_status=%d: huh?\n", 4211 __func__, 4212 atid->isfiltered, 4213 ts->ts_status); 4214 ath_tx_tid_filt_comp_buf(sc, atid, bf); 4215 } 4216 #endif 4217 if (atid->isfiltered) 4218 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__); 4219 if (atid->hwq_depth < 0) 4220 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 4221 __func__, atid->hwq_depth); 4222 4223 /* If the TID is being cleaned up, track things */ 4224 /* XXX refactor! */ 4225 if (atid->cleanup_inprogress) { 4226 atid->incomp--; 4227 if (atid->incomp == 0) { 4228 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4229 "%s: TID %d: cleaned up! resume!\n", 4230 __func__, tid); 4231 atid->cleanup_inprogress = 0; 4232 ath_tx_tid_resume(sc, atid); 4233 } 4234 } 4235 4236 /* 4237 * If the queue is filtered, potentially mark it as complete 4238 * and reschedule it as needed. 4239 * 4240 * This is required as there may be a subsequent TX descriptor 4241 * for this end-node that has CLRDMASK set, so it's quite possible 4242 * that a filtered frame will be followed by a non-filtered 4243 * (complete or otherwise) frame. 4244 * 4245 * XXX should we do this before we complete the frame? 4246 */ 4247 if (atid->isfiltered) 4248 ath_tx_tid_filt_comp_complete(sc, atid); 4249 ATH_TX_UNLOCK(sc); 4250 4251 /* 4252 * punt to rate control if we're not being cleaned up 4253 * during a hw queue drain and the frame wanted an ACK. 4254 */ 4255 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 4256 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 4257 ts, bf->bf_state.bfs_pktlen, 4258 1, (ts->ts_status == 0) ? 0 : 1); 4259 4260 ath_tx_default_comp(sc, bf, fail); 4261 } 4262 4263 /* 4264 * Handle cleanup of aggregate session packets that aren't 4265 * an A-MPDU. 4266 * 4267 * There's no need to update the BAW here - the session is being 4268 * torn down. 4269 */ 4270 static void 4271 ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4272 { 4273 struct ieee80211_node *ni = bf->bf_node; 4274 struct ath_node *an = ATH_NODE(ni); 4275 int tid = bf->bf_state.bfs_tid; 4276 struct ath_tid *atid = &an->an_tid[tid]; 4277 4278 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n", 4279 __func__, tid, atid->incomp); 4280 4281 ATH_TX_LOCK(sc); 4282 atid->incomp--; 4283 4284 /* XXX refactor! */ 4285 if (bf->bf_state.bfs_dobaw) { 4286 ath_tx_update_baw(sc, an, atid, bf); 4287 if (!bf->bf_state.bfs_addedbaw) 4288 DPRINTF(sc, ATH_DEBUG_SW_TX, 4289 "%s: wasn't added: seqno %d\n", 4290 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4291 } 4292 4293 if (atid->incomp == 0) { 4294 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4295 "%s: TID %d: cleaned up! resume!\n", 4296 __func__, tid); 4297 atid->cleanup_inprogress = 0; 4298 ath_tx_tid_resume(sc, atid); 4299 } 4300 ATH_TX_UNLOCK(sc); 4301 4302 ath_tx_default_comp(sc, bf, 0); 4303 } 4304 4305 4306 /* 4307 * This as it currently stands is a bit dumb. Ideally we'd just 4308 * fail the frame the normal way and have it permanently fail 4309 * via the normal aggregate completion path. 4310 */ 4311 static void 4312 ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an, 4313 int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq) 4314 { 4315 struct ath_tid *atid = &an->an_tid[tid]; 4316 struct ath_buf *bf, *bf_next; 4317 4318 ATH_TX_LOCK_ASSERT(sc); 4319 4320 /* 4321 * Remove this frame from the queue. 4322 */ 4323 ATH_TID_REMOVE(atid, bf_head, bf_list); 4324 4325 /* 4326 * Loop over all the frames in the aggregate. 4327 */ 4328 bf = bf_head; 4329 while (bf != NULL) { 4330 bf_next = bf->bf_next; /* next aggregate frame, or NULL */ 4331 4332 /* 4333 * If it's been added to the BAW we need to kick 4334 * it out of the BAW before we continue. 4335 * 4336 * XXX if it's an aggregate, assert that it's in the 4337 * BAW - we shouldn't have it be in an aggregate 4338 * otherwise! 4339 */ 4340 if (bf->bf_state.bfs_addedbaw) { 4341 ath_tx_update_baw(sc, an, atid, bf); 4342 bf->bf_state.bfs_dobaw = 0; 4343 } 4344 4345 /* 4346 * Give it the default completion handler. 4347 */ 4348 bf->bf_comp = ath_tx_normal_comp; 4349 bf->bf_next = NULL; 4350 4351 /* 4352 * Add it to the list to free. 4353 */ 4354 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 4355 4356 /* 4357 * Now advance to the next frame in the aggregate. 4358 */ 4359 bf = bf_next; 4360 } 4361 } 4362 4363 /* 4364 * Performs transmit side cleanup when TID changes from aggregated to 4365 * unaggregated and during reassociation. 4366 * 4367 * For now, this just tosses everything from the TID software queue 4368 * whether or not it has been retried and marks the TID as 4369 * pending completion if there's anything for this TID queued to 4370 * the hardware. 4371 * 4372 * The caller is responsible for pausing the TID and unpausing the 4373 * TID if no cleanup was required. Otherwise the cleanup path will 4374 * unpause the TID once the last hardware queued frame is completed. 4375 */ 4376 static void 4377 ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid, 4378 ath_bufhead *bf_cq) 4379 { 4380 struct ath_tid *atid = &an->an_tid[tid]; 4381 struct ath_buf *bf, *bf_next; 4382 4383 ATH_TX_LOCK_ASSERT(sc); 4384 4385 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4386 "%s: TID %d: called; inprogress=%d\n", __func__, tid, 4387 atid->cleanup_inprogress); 4388 4389 /* 4390 * Move the filtered frames to the TX queue, before 4391 * we run off and discard/process things. 4392 */ 4393 4394 /* XXX this is really quite inefficient */ 4395 while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) { 4396 ATH_TID_FILT_REMOVE(atid, bf, bf_list); 4397 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4398 } 4399 4400 /* 4401 * Update the frames in the software TX queue: 4402 * 4403 * + Discard retry frames in the queue 4404 * + Fix the completion function to be non-aggregate 4405 */ 4406 bf = ATH_TID_FIRST(atid); 4407 while (bf) { 4408 /* 4409 * Grab the next frame in the list, we may 4410 * be fiddling with the list. 4411 */ 4412 bf_next = TAILQ_NEXT(bf, bf_list); 4413 4414 /* 4415 * Free the frame and all subframes. 4416 */ 4417 ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq); 4418 4419 /* 4420 * Next frame! 4421 */ 4422 bf = bf_next; 4423 } 4424 4425 /* 4426 * If there's anything in the hardware queue we wait 4427 * for the TID HWQ to empty. 4428 */ 4429 if (atid->hwq_depth > 0) { 4430 /* 4431 * XXX how about we kill atid->incomp, and instead 4432 * replace it with a macro that checks that atid->hwq_depth 4433 * is 0? 4434 */ 4435 atid->incomp = atid->hwq_depth; 4436 atid->cleanup_inprogress = 1; 4437 } 4438 4439 if (atid->cleanup_inprogress) 4440 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4441 "%s: TID %d: cleanup needed: %d packets\n", 4442 __func__, tid, atid->incomp); 4443 4444 /* Owner now must free completed frames */ 4445 } 4446 4447 static struct ath_buf * 4448 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 4449 struct ath_tid *tid, struct ath_buf *bf) 4450 { 4451 struct ath_buf *nbf; 4452 int error; 4453 4454 /* 4455 * Clone the buffer. This will handle the dma unmap and 4456 * copy the node reference to the new buffer. If this 4457 * works out, 'bf' will have no DMA mapping, no mbuf 4458 * pointer and no node reference. 4459 */ 4460 nbf = ath_buf_clone(sc, bf); 4461 4462 #if 0 4463 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n", 4464 __func__); 4465 #endif 4466 4467 if (nbf == NULL) { 4468 /* Failed to clone */ 4469 DPRINTF(sc, ATH_DEBUG_XMIT, 4470 "%s: failed to clone a busy buffer\n", 4471 __func__); 4472 return NULL; 4473 } 4474 4475 /* Setup the dma for the new buffer */ 4476 error = ath_tx_dmasetup(sc, nbf, nbf->bf_m); 4477 if (error != 0) { 4478 DPRINTF(sc, ATH_DEBUG_XMIT, 4479 "%s: failed to setup dma for clone\n", 4480 __func__); 4481 /* 4482 * Put this at the head of the list, not tail; 4483 * that way it doesn't interfere with the 4484 * busy buffer logic (which uses the tail of 4485 * the list.) 4486 */ 4487 ATH_TXBUF_LOCK(sc); 4488 ath_returnbuf_head(sc, nbf); 4489 ATH_TXBUF_UNLOCK(sc); 4490 return NULL; 4491 } 4492 4493 /* Update BAW if required, before we free the original buf */ 4494 if (bf->bf_state.bfs_dobaw) 4495 ath_tx_switch_baw_buf(sc, an, tid, bf, nbf); 4496 4497 /* Free original buffer; return new buffer */ 4498 ath_freebuf(sc, bf); 4499 4500 return nbf; 4501 } 4502 4503 /* 4504 * Handle retrying an unaggregate frame in an aggregate 4505 * session. 4506 * 4507 * If too many retries occur, pause the TID, wait for 4508 * any further retransmits (as there's no reason why 4509 * non-aggregate frames in an aggregate session are 4510 * transmitted in-order; they just have to be in-BAW) 4511 * and then queue a BAR. 4512 */ 4513 static void 4514 ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4515 { 4516 struct ieee80211_node *ni = bf->bf_node; 4517 struct ath_node *an = ATH_NODE(ni); 4518 int tid = bf->bf_state.bfs_tid; 4519 struct ath_tid *atid = &an->an_tid[tid]; 4520 struct ieee80211_tx_ampdu *tap; 4521 4522 ATH_TX_LOCK(sc); 4523 4524 tap = ath_tx_get_tx_tid(an, tid); 4525 4526 /* 4527 * If the buffer is marked as busy, we can't directly 4528 * reuse it. Instead, try to clone the buffer. 4529 * If the clone is successful, recycle the old buffer. 4530 * If the clone is unsuccessful, set bfs_retries to max 4531 * to force the next bit of code to free the buffer 4532 * for us. 4533 */ 4534 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4535 (bf->bf_flags & ATH_BUF_BUSY)) { 4536 struct ath_buf *nbf; 4537 nbf = ath_tx_retry_clone(sc, an, atid, bf); 4538 if (nbf) 4539 /* bf has been freed at this point */ 4540 bf = nbf; 4541 else 4542 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4543 } 4544 4545 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4546 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4547 "%s: exceeded retries; seqno %d\n", 4548 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4549 sc->sc_stats.ast_tx_swretrymax++; 4550 4551 /* Update BAW anyway */ 4552 if (bf->bf_state.bfs_dobaw) { 4553 ath_tx_update_baw(sc, an, atid, bf); 4554 if (! bf->bf_state.bfs_addedbaw) 4555 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4556 "%s: wasn't added: seqno %d\n", 4557 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4558 } 4559 bf->bf_state.bfs_dobaw = 0; 4560 4561 /* Suspend the TX queue and get ready to send the BAR */ 4562 ath_tx_tid_bar_suspend(sc, atid); 4563 4564 /* Send the BAR if there are no other frames waiting */ 4565 if (ath_tx_tid_bar_tx_ready(sc, atid)) 4566 ath_tx_tid_bar_tx(sc, atid); 4567 4568 ATH_TX_UNLOCK(sc); 4569 4570 /* Free buffer, bf is free after this call */ 4571 ath_tx_default_comp(sc, bf, 0); 4572 return; 4573 } 4574 4575 /* 4576 * This increments the retry counter as well as 4577 * sets the retry flag in the ath_buf and packet 4578 * body. 4579 */ 4580 ath_tx_set_retry(sc, bf); 4581 sc->sc_stats.ast_tx_swretries++; 4582 4583 /* 4584 * Insert this at the head of the queue, so it's 4585 * retried before any current/subsequent frames. 4586 */ 4587 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4588 ath_tx_tid_sched(sc, atid); 4589 /* Send the BAR if there are no other frames waiting */ 4590 if (ath_tx_tid_bar_tx_ready(sc, atid)) 4591 ath_tx_tid_bar_tx(sc, atid); 4592 4593 ATH_TX_UNLOCK(sc); 4594 } 4595 4596 /* 4597 * Common code for aggregate excessive retry/subframe retry. 4598 * If retrying, queues buffers to bf_q. If not, frees the 4599 * buffers. 4600 * 4601 * XXX should unify this with ath_tx_aggr_retry_unaggr() 4602 */ 4603 static int 4604 ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf, 4605 ath_bufhead *bf_q) 4606 { 4607 struct ieee80211_node *ni = bf->bf_node; 4608 struct ath_node *an = ATH_NODE(ni); 4609 int tid = bf->bf_state.bfs_tid; 4610 struct ath_tid *atid = &an->an_tid[tid]; 4611 4612 ATH_TX_LOCK_ASSERT(sc); 4613 4614 /* XXX clr11naggr should be done for all subframes */ 4615 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 4616 ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0); 4617 4618 /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */ 4619 4620 /* 4621 * If the buffer is marked as busy, we can't directly 4622 * reuse it. Instead, try to clone the buffer. 4623 * If the clone is successful, recycle the old buffer. 4624 * If the clone is unsuccessful, set bfs_retries to max 4625 * to force the next bit of code to free the buffer 4626 * for us. 4627 */ 4628 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4629 (bf->bf_flags & ATH_BUF_BUSY)) { 4630 struct ath_buf *nbf; 4631 nbf = ath_tx_retry_clone(sc, an, atid, bf); 4632 if (nbf) 4633 /* bf has been freed at this point */ 4634 bf = nbf; 4635 else 4636 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4637 } 4638 4639 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4640 sc->sc_stats.ast_tx_swretrymax++; 4641 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4642 "%s: max retries: seqno %d\n", 4643 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4644 ath_tx_update_baw(sc, an, atid, bf); 4645 if (!bf->bf_state.bfs_addedbaw) 4646 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4647 "%s: wasn't added: seqno %d\n", 4648 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4649 bf->bf_state.bfs_dobaw = 0; 4650 return 1; 4651 } 4652 4653 ath_tx_set_retry(sc, bf); 4654 sc->sc_stats.ast_tx_swretries++; 4655 bf->bf_next = NULL; /* Just to make sure */ 4656 4657 /* Clear the aggregate state */ 4658 bf->bf_state.bfs_aggr = 0; 4659 bf->bf_state.bfs_ndelim = 0; /* ??? needed? */ 4660 bf->bf_state.bfs_nframes = 1; 4661 4662 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 4663 return 0; 4664 } 4665 4666 /* 4667 * error pkt completion for an aggregate destination 4668 */ 4669 static void 4670 ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first, 4671 struct ath_tid *tid) 4672 { 4673 struct ieee80211_node *ni = bf_first->bf_node; 4674 struct ath_node *an = ATH_NODE(ni); 4675 struct ath_buf *bf_next, *bf; 4676 ath_bufhead bf_q; 4677 int drops = 0; 4678 struct ieee80211_tx_ampdu *tap; 4679 ath_bufhead bf_cq; 4680 4681 TAILQ_INIT(&bf_q); 4682 TAILQ_INIT(&bf_cq); 4683 4684 /* 4685 * Update rate control - all frames have failed. 4686 * 4687 * XXX use the length in the first frame in the series; 4688 * XXX just so things are consistent for now. 4689 */ 4690 ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc, 4691 &bf_first->bf_status.ds_txstat, 4692 bf_first->bf_state.bfs_pktlen, 4693 bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes); 4694 4695 ATH_TX_LOCK(sc); 4696 tap = ath_tx_get_tx_tid(an, tid->tid); 4697 sc->sc_stats.ast_tx_aggr_failall++; 4698 4699 /* Retry all subframes */ 4700 bf = bf_first; 4701 while (bf) { 4702 bf_next = bf->bf_next; 4703 bf->bf_next = NULL; /* Remove it from the aggr list */ 4704 sc->sc_stats.ast_tx_aggr_fail++; 4705 if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4706 drops++; 4707 bf->bf_next = NULL; 4708 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4709 } 4710 bf = bf_next; 4711 } 4712 4713 /* Prepend all frames to the beginning of the queue */ 4714 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4715 TAILQ_REMOVE(&bf_q, bf, bf_list); 4716 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 4717 } 4718 4719 /* 4720 * Schedule the TID to be re-tried. 4721 */ 4722 ath_tx_tid_sched(sc, tid); 4723 4724 /* 4725 * send bar if we dropped any frames 4726 * 4727 * Keep the txq lock held for now, as we need to ensure 4728 * that ni_txseqs[] is consistent (as it's being updated 4729 * in the ifnet TX context or raw TX context.) 4730 */ 4731 if (drops) { 4732 /* Suspend the TX queue and get ready to send the BAR */ 4733 ath_tx_tid_bar_suspend(sc, tid); 4734 } 4735 4736 /* 4737 * Send BAR if required 4738 */ 4739 if (ath_tx_tid_bar_tx_ready(sc, tid)) 4740 ath_tx_tid_bar_tx(sc, tid); 4741 4742 ATH_TX_UNLOCK(sc); 4743 4744 /* Complete frames which errored out */ 4745 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4746 TAILQ_REMOVE(&bf_cq, bf, bf_list); 4747 ath_tx_default_comp(sc, bf, 0); 4748 } 4749 } 4750 4751 /* 4752 * Handle clean-up of packets from an aggregate list. 4753 * 4754 * There's no need to update the BAW here - the session is being 4755 * torn down. 4756 */ 4757 static void 4758 ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first) 4759 { 4760 struct ath_buf *bf, *bf_next; 4761 struct ieee80211_node *ni = bf_first->bf_node; 4762 struct ath_node *an = ATH_NODE(ni); 4763 int tid = bf_first->bf_state.bfs_tid; 4764 struct ath_tid *atid = &an->an_tid[tid]; 4765 4766 ATH_TX_LOCK(sc); 4767 4768 /* update incomp */ 4769 atid->incomp--; 4770 4771 /* Update the BAW */ 4772 bf = bf_first; 4773 while (bf) { 4774 /* XXX refactor! */ 4775 if (bf->bf_state.bfs_dobaw) { 4776 ath_tx_update_baw(sc, an, atid, bf); 4777 if (!bf->bf_state.bfs_addedbaw) 4778 DPRINTF(sc, ATH_DEBUG_SW_TX, 4779 "%s: wasn't added: seqno %d\n", 4780 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4781 } 4782 bf = bf->bf_next; 4783 } 4784 4785 if (atid->incomp == 0) { 4786 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4787 "%s: TID %d: cleaned up! resume!\n", 4788 __func__, tid); 4789 atid->cleanup_inprogress = 0; 4790 ath_tx_tid_resume(sc, atid); 4791 } 4792 4793 /* Send BAR if required */ 4794 /* XXX why would we send a BAR when transitioning to non-aggregation? */ 4795 /* 4796 * XXX TODO: we should likely just tear down the BAR state here, 4797 * rather than sending a BAR. 4798 */ 4799 if (ath_tx_tid_bar_tx_ready(sc, atid)) 4800 ath_tx_tid_bar_tx(sc, atid); 4801 4802 ATH_TX_UNLOCK(sc); 4803 4804 /* Handle frame completion as individual frames */ 4805 bf = bf_first; 4806 while (bf) { 4807 bf_next = bf->bf_next; 4808 bf->bf_next = NULL; 4809 ath_tx_default_comp(sc, bf, 1); 4810 bf = bf_next; 4811 } 4812 } 4813 4814 /* 4815 * Handle completion of an set of aggregate frames. 4816 * 4817 * Note: the completion handler is the last descriptor in the aggregate, 4818 * not the last descriptor in the first frame. 4819 */ 4820 static void 4821 ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first, 4822 int fail) 4823 { 4824 //struct ath_desc *ds = bf->bf_lastds; 4825 struct ieee80211_node *ni = bf_first->bf_node; 4826 struct ath_node *an = ATH_NODE(ni); 4827 int tid = bf_first->bf_state.bfs_tid; 4828 struct ath_tid *atid = &an->an_tid[tid]; 4829 struct ath_tx_status ts; 4830 struct ieee80211_tx_ampdu *tap; 4831 ath_bufhead bf_q; 4832 ath_bufhead bf_cq; 4833 int seq_st, tx_ok; 4834 int hasba, isaggr; 4835 uint32_t ba[2]; 4836 struct ath_buf *bf, *bf_next; 4837 int ba_index; 4838 int drops = 0; 4839 int nframes = 0, nbad = 0, nf; 4840 int pktlen; 4841 /* XXX there's too much on the stack? */ 4842 struct ath_rc_series rc[ATH_RC_NUM]; 4843 int txseq; 4844 4845 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n", 4846 __func__, atid->hwq_depth); 4847 4848 /* 4849 * Take a copy; this may be needed -after- bf_first 4850 * has been completed and freed. 4851 */ 4852 ts = bf_first->bf_status.ds_txstat; 4853 4854 TAILQ_INIT(&bf_q); 4855 TAILQ_INIT(&bf_cq); 4856 4857 /* The TID state is kept behind the TXQ lock */ 4858 ATH_TX_LOCK(sc); 4859 4860 atid->hwq_depth--; 4861 if (atid->hwq_depth < 0) 4862 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n", 4863 __func__, atid->hwq_depth); 4864 4865 /* 4866 * If the TID is filtered, handle completing the filter 4867 * transition before potentially kicking it to the cleanup 4868 * function. 4869 * 4870 * XXX this is duplicate work, ew. 4871 */ 4872 if (atid->isfiltered) 4873 ath_tx_tid_filt_comp_complete(sc, atid); 4874 4875 /* 4876 * Punt cleanup to the relevant function, not our problem now 4877 */ 4878 if (atid->cleanup_inprogress) { 4879 if (atid->isfiltered) 4880 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4881 "%s: isfiltered=1, normal_comp?\n", 4882 __func__); 4883 ATH_TX_UNLOCK(sc); 4884 ath_tx_comp_cleanup_aggr(sc, bf_first); 4885 return; 4886 } 4887 4888 /* 4889 * If the frame is filtered, transition to filtered frame 4890 * mode and add this to the filtered frame list. 4891 * 4892 * XXX TODO: figure out how this interoperates with 4893 * BAR, pause and cleanup states. 4894 */ 4895 if ((ts.ts_status & HAL_TXERR_FILT) || 4896 (ts.ts_status != 0 && atid->isfiltered)) { 4897 if (fail != 0) 4898 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4899 "%s: isfiltered=1, fail=%d\n", __func__, fail); 4900 ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq); 4901 4902 /* Remove from BAW */ 4903 TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) { 4904 if (bf->bf_state.bfs_addedbaw) 4905 drops++; 4906 if (bf->bf_state.bfs_dobaw) { 4907 ath_tx_update_baw(sc, an, atid, bf); 4908 if (!bf->bf_state.bfs_addedbaw) 4909 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4910 "%s: wasn't added: seqno %d\n", 4911 __func__, 4912 SEQNO(bf->bf_state.bfs_seqno)); 4913 } 4914 bf->bf_state.bfs_dobaw = 0; 4915 } 4916 /* 4917 * If any intermediate frames in the BAW were dropped when 4918 * handling filtering things, send a BAR. 4919 */ 4920 if (drops) 4921 ath_tx_tid_bar_suspend(sc, atid); 4922 4923 /* 4924 * Finish up by sending a BAR if required and freeing 4925 * the frames outside of the TX lock. 4926 */ 4927 goto finish_send_bar; 4928 } 4929 4930 /* 4931 * XXX for now, use the first frame in the aggregate for 4932 * XXX rate control completion; it's at least consistent. 4933 */ 4934 pktlen = bf_first->bf_state.bfs_pktlen; 4935 4936 /* 4937 * Handle errors first! 4938 * 4939 * Here, handle _any_ error as a "exceeded retries" error. 4940 * Later on (when filtered frames are to be specially handled) 4941 * it'll have to be expanded. 4942 */ 4943 #if 0 4944 if (ts.ts_status & HAL_TXERR_XRETRY) { 4945 #endif 4946 if (ts.ts_status != 0) { 4947 ATH_TX_UNLOCK(sc); 4948 ath_tx_comp_aggr_error(sc, bf_first, atid); 4949 return; 4950 } 4951 4952 tap = ath_tx_get_tx_tid(an, tid); 4953 4954 /* 4955 * extract starting sequence and block-ack bitmap 4956 */ 4957 /* XXX endian-ness of seq_st, ba? */ 4958 seq_st = ts.ts_seqnum; 4959 hasba = !! (ts.ts_flags & HAL_TX_BA); 4960 tx_ok = (ts.ts_status == 0); 4961 isaggr = bf_first->bf_state.bfs_aggr; 4962 ba[0] = ts.ts_ba_low; 4963 ba[1] = ts.ts_ba_high; 4964 4965 /* 4966 * Copy the TX completion status and the rate control 4967 * series from the first descriptor, as it may be freed 4968 * before the rate control code can get its grubby fingers 4969 * into things. 4970 */ 4971 memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc)); 4972 4973 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4974 "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, " 4975 "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n", 4976 __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags, 4977 isaggr, seq_st, hasba, ba[0], ba[1]); 4978 4979 /* 4980 * The reference driver doesn't do this; it simply ignores 4981 * this check in its entirety. 4982 * 4983 * I've seen this occur when using iperf to send traffic 4984 * out tid 1 - the aggregate frames are all marked as TID 1, 4985 * but the TXSTATUS has TID=0. So, let's just ignore this 4986 * check. 4987 */ 4988 #if 0 4989 /* Occasionally, the MAC sends a tx status for the wrong TID. */ 4990 if (tid != ts.ts_tid) { 4991 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n", 4992 __func__, tid, ts.ts_tid); 4993 tx_ok = 0; 4994 } 4995 #endif 4996 4997 /* AR5416 BA bug; this requires an interface reset */ 4998 if (isaggr && tx_ok && (! hasba)) { 4999 device_printf(sc->sc_dev, 5000 "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, " 5001 "seq_st=%d\n", 5002 __func__, hasba, tx_ok, isaggr, seq_st); 5003 /* XXX TODO: schedule an interface reset */ 5004 #ifdef ATH_DEBUG 5005 ath_printtxbuf(sc, bf_first, 5006 sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0); 5007 #endif 5008 } 5009 5010 /* 5011 * Walk the list of frames, figure out which ones were correctly 5012 * sent and which weren't. 5013 */ 5014 bf = bf_first; 5015 nf = bf_first->bf_state.bfs_nframes; 5016 5017 /* bf_first is going to be invalid once this list is walked */ 5018 bf_first = NULL; 5019 5020 /* 5021 * Walk the list of completed frames and determine 5022 * which need to be completed and which need to be 5023 * retransmitted. 5024 * 5025 * For completed frames, the completion functions need 5026 * to be called at the end of this function as the last 5027 * node reference may free the node. 5028 * 5029 * Finally, since the TXQ lock can't be held during the 5030 * completion callback (to avoid lock recursion), 5031 * the completion calls have to be done outside of the 5032 * lock. 5033 */ 5034 while (bf) { 5035 nframes++; 5036 ba_index = ATH_BA_INDEX(seq_st, 5037 SEQNO(bf->bf_state.bfs_seqno)); 5038 bf_next = bf->bf_next; 5039 bf->bf_next = NULL; /* Remove it from the aggr list */ 5040 5041 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5042 "%s: checking bf=%p seqno=%d; ack=%d\n", 5043 __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 5044 ATH_BA_ISSET(ba, ba_index)); 5045 5046 if (tx_ok && ATH_BA_ISSET(ba, ba_index)) { 5047 sc->sc_stats.ast_tx_aggr_ok++; 5048 ath_tx_update_baw(sc, an, atid, bf); 5049 bf->bf_state.bfs_dobaw = 0; 5050 if (!bf->bf_state.bfs_addedbaw) 5051 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5052 "%s: wasn't added: seqno %d\n", 5053 __func__, SEQNO(bf->bf_state.bfs_seqno)); 5054 bf->bf_next = NULL; 5055 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 5056 } else { 5057 sc->sc_stats.ast_tx_aggr_fail++; 5058 if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 5059 drops++; 5060 bf->bf_next = NULL; 5061 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 5062 } 5063 nbad++; 5064 } 5065 bf = bf_next; 5066 } 5067 5068 /* 5069 * Now that the BAW updates have been done, unlock 5070 * 5071 * txseq is grabbed before the lock is released so we 5072 * have a consistent view of what -was- in the BAW. 5073 * Anything after this point will not yet have been 5074 * TXed. 5075 */ 5076 txseq = tap->txa_start; 5077 ATH_TX_UNLOCK(sc); 5078 5079 if (nframes != nf) 5080 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5081 "%s: num frames seen=%d; bf nframes=%d\n", 5082 __func__, nframes, nf); 5083 5084 /* 5085 * Now we know how many frames were bad, call the rate 5086 * control code. 5087 */ 5088 if (fail == 0) 5089 ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes, 5090 nbad); 5091 5092 /* 5093 * send bar if we dropped any frames 5094 */ 5095 if (drops) { 5096 /* Suspend the TX queue and get ready to send the BAR */ 5097 ATH_TX_LOCK(sc); 5098 ath_tx_tid_bar_suspend(sc, atid); 5099 ATH_TX_UNLOCK(sc); 5100 } 5101 5102 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5103 "%s: txa_start now %d\n", __func__, tap->txa_start); 5104 5105 ATH_TX_LOCK(sc); 5106 5107 /* Prepend all frames to the beginning of the queue */ 5108 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 5109 TAILQ_REMOVE(&bf_q, bf, bf_list); 5110 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 5111 } 5112 5113 /* 5114 * Reschedule to grab some further frames. 5115 */ 5116 ath_tx_tid_sched(sc, atid); 5117 5118 /* 5119 * If the queue is filtered, re-schedule as required. 5120 * 5121 * This is required as there may be a subsequent TX descriptor 5122 * for this end-node that has CLRDMASK set, so it's quite possible 5123 * that a filtered frame will be followed by a non-filtered 5124 * (complete or otherwise) frame. 5125 * 5126 * XXX should we do this before we complete the frame? 5127 */ 5128 if (atid->isfiltered) 5129 ath_tx_tid_filt_comp_complete(sc, atid); 5130 5131 finish_send_bar: 5132 5133 /* 5134 * Send BAR if required 5135 */ 5136 if (ath_tx_tid_bar_tx_ready(sc, atid)) 5137 ath_tx_tid_bar_tx(sc, atid); 5138 5139 ATH_TX_UNLOCK(sc); 5140 5141 /* Do deferred completion */ 5142 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 5143 TAILQ_REMOVE(&bf_cq, bf, bf_list); 5144 ath_tx_default_comp(sc, bf, 0); 5145 } 5146 } 5147 5148 /* 5149 * Handle completion of unaggregated frames in an ADDBA 5150 * session. 5151 * 5152 * Fail is set to 1 if the entry is being freed via a call to 5153 * ath_tx_draintxq(). 5154 */ 5155 static void 5156 ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail) 5157 { 5158 struct ieee80211_node *ni = bf->bf_node; 5159 struct ath_node *an = ATH_NODE(ni); 5160 int tid = bf->bf_state.bfs_tid; 5161 struct ath_tid *atid = &an->an_tid[tid]; 5162 struct ath_tx_status ts; 5163 int drops = 0; 5164 5165 /* 5166 * Take a copy of this; filtering/cloning the frame may free the 5167 * bf pointer. 5168 */ 5169 ts = bf->bf_status.ds_txstat; 5170 5171 /* 5172 * Update rate control status here, before we possibly 5173 * punt to retry or cleanup. 5174 * 5175 * Do it outside of the TXQ lock. 5176 */ 5177 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 5178 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 5179 &bf->bf_status.ds_txstat, 5180 bf->bf_state.bfs_pktlen, 5181 1, (ts.ts_status == 0) ? 0 : 1); 5182 5183 /* 5184 * This is called early so atid->hwq_depth can be tracked. 5185 * This unfortunately means that it's released and regrabbed 5186 * during retry and cleanup. That's rather inefficient. 5187 */ 5188 ATH_TX_LOCK(sc); 5189 5190 if (tid == IEEE80211_NONQOS_TID) 5191 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__); 5192 5193 DPRINTF(sc, ATH_DEBUG_SW_TX, 5194 "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n", 5195 __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth, 5196 SEQNO(bf->bf_state.bfs_seqno)); 5197 5198 atid->hwq_depth--; 5199 if (atid->hwq_depth < 0) 5200 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 5201 __func__, atid->hwq_depth); 5202 5203 /* 5204 * If the TID is filtered, handle completing the filter 5205 * transition before potentially kicking it to the cleanup 5206 * function. 5207 */ 5208 if (atid->isfiltered) 5209 ath_tx_tid_filt_comp_complete(sc, atid); 5210 5211 /* 5212 * If a cleanup is in progress, punt to comp_cleanup; 5213 * rather than handling it here. It's thus their 5214 * responsibility to clean up, call the completion 5215 * function in net80211, etc. 5216 */ 5217 if (atid->cleanup_inprogress) { 5218 if (atid->isfiltered) 5219 DPRINTF(sc, ATH_DEBUG_SW_TX, 5220 "%s: isfiltered=1, normal_comp?\n", 5221 __func__); 5222 ATH_TX_UNLOCK(sc); 5223 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n", 5224 __func__); 5225 ath_tx_comp_cleanup_unaggr(sc, bf); 5226 return; 5227 } 5228 5229 /* 5230 * XXX TODO: how does cleanup, BAR and filtered frame handling 5231 * overlap? 5232 * 5233 * If the frame is filtered OR if it's any failure but 5234 * the TID is filtered, the frame must be added to the 5235 * filtered frame list. 5236 * 5237 * However - a busy buffer can't be added to the filtered 5238 * list as it will end up being recycled without having 5239 * been made available for the hardware. 5240 */ 5241 if ((ts.ts_status & HAL_TXERR_FILT) || 5242 (ts.ts_status != 0 && atid->isfiltered)) { 5243 int freeframe; 5244 5245 if (fail != 0) 5246 DPRINTF(sc, ATH_DEBUG_SW_TX, 5247 "%s: isfiltered=1, fail=%d\n", 5248 __func__, fail); 5249 freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf); 5250 /* 5251 * If freeframe=0 then bf is no longer ours; don't 5252 * touch it. 5253 */ 5254 if (freeframe) { 5255 /* Remove from BAW */ 5256 if (bf->bf_state.bfs_addedbaw) 5257 drops++; 5258 if (bf->bf_state.bfs_dobaw) { 5259 ath_tx_update_baw(sc, an, atid, bf); 5260 if (!bf->bf_state.bfs_addedbaw) 5261 DPRINTF(sc, ATH_DEBUG_SW_TX, 5262 "%s: wasn't added: seqno %d\n", 5263 __func__, SEQNO(bf->bf_state.bfs_seqno)); 5264 } 5265 bf->bf_state.bfs_dobaw = 0; 5266 } 5267 5268 /* 5269 * If the frame couldn't be filtered, treat it as a drop and 5270 * prepare to send a BAR. 5271 */ 5272 if (freeframe && drops) 5273 ath_tx_tid_bar_suspend(sc, atid); 5274 5275 /* 5276 * Send BAR if required 5277 */ 5278 if (ath_tx_tid_bar_tx_ready(sc, atid)) 5279 ath_tx_tid_bar_tx(sc, atid); 5280 5281 ATH_TX_UNLOCK(sc); 5282 /* 5283 * If freeframe is set, then the frame couldn't be 5284 * cloned and bf is still valid. Just complete/free it. 5285 */ 5286 if (freeframe) 5287 ath_tx_default_comp(sc, bf, fail); 5288 5289 return; 5290 } 5291 /* 5292 * Don't bother with the retry check if all frames 5293 * are being failed (eg during queue deletion.) 5294 */ 5295 #if 0 5296 if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) { 5297 #endif 5298 if (fail == 0 && ts.ts_status != 0) { 5299 ATH_TX_UNLOCK(sc); 5300 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n", 5301 __func__); 5302 ath_tx_aggr_retry_unaggr(sc, bf); 5303 return; 5304 } 5305 5306 /* Success? Complete */ 5307 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n", 5308 __func__, tid, SEQNO(bf->bf_state.bfs_seqno)); 5309 if (bf->bf_state.bfs_dobaw) { 5310 ath_tx_update_baw(sc, an, atid, bf); 5311 bf->bf_state.bfs_dobaw = 0; 5312 if (!bf->bf_state.bfs_addedbaw) 5313 DPRINTF(sc, ATH_DEBUG_SW_TX, 5314 "%s: wasn't added: seqno %d\n", 5315 __func__, SEQNO(bf->bf_state.bfs_seqno)); 5316 } 5317 5318 /* 5319 * If the queue is filtered, re-schedule as required. 5320 * 5321 * This is required as there may be a subsequent TX descriptor 5322 * for this end-node that has CLRDMASK set, so it's quite possible 5323 * that a filtered frame will be followed by a non-filtered 5324 * (complete or otherwise) frame. 5325 * 5326 * XXX should we do this before we complete the frame? 5327 */ 5328 if (atid->isfiltered) 5329 ath_tx_tid_filt_comp_complete(sc, atid); 5330 5331 /* 5332 * Send BAR if required 5333 */ 5334 if (ath_tx_tid_bar_tx_ready(sc, atid)) 5335 ath_tx_tid_bar_tx(sc, atid); 5336 5337 ATH_TX_UNLOCK(sc); 5338 5339 ath_tx_default_comp(sc, bf, fail); 5340 /* bf is freed at this point */ 5341 } 5342 5343 void 5344 ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 5345 { 5346 if (bf->bf_state.bfs_aggr) 5347 ath_tx_aggr_comp_aggr(sc, bf, fail); 5348 else 5349 ath_tx_aggr_comp_unaggr(sc, bf, fail); 5350 } 5351 5352 /* 5353 * Schedule some packets from the given node/TID to the hardware. 5354 * 5355 * This is the aggregate version. 5356 */ 5357 void 5358 ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an, 5359 struct ath_tid *tid) 5360 { 5361 struct ath_buf *bf; 5362 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5363 struct ieee80211_tx_ampdu *tap; 5364 ATH_AGGR_STATUS status; 5365 ath_bufhead bf_q; 5366 5367 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid); 5368 ATH_TX_LOCK_ASSERT(sc); 5369 5370 /* 5371 * XXX TODO: If we're called for a queue that we're leaking frames to, 5372 * ensure we only leak one. 5373 */ 5374 5375 tap = ath_tx_get_tx_tid(an, tid->tid); 5376 5377 if (tid->tid == IEEE80211_NONQOS_TID) 5378 DPRINTF(sc, ATH_DEBUG_SW_TX, 5379 "%s: called for TID=NONQOS_TID?\n", __func__); 5380 5381 for (;;) { 5382 status = ATH_AGGR_DONE; 5383 5384 /* 5385 * If the upper layer has paused the TID, don't 5386 * queue any further packets. 5387 * 5388 * This can also occur from the completion task because 5389 * of packet loss; but as its serialised with this code, 5390 * it won't "appear" half way through queuing packets. 5391 */ 5392 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5393 break; 5394 5395 bf = ATH_TID_FIRST(tid); 5396 if (bf == NULL) { 5397 break; 5398 } 5399 5400 /* 5401 * If the packet doesn't fall within the BAW (eg a NULL 5402 * data frame), schedule it directly; continue. 5403 */ 5404 if (! bf->bf_state.bfs_dobaw) { 5405 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5406 "%s: non-baw packet\n", 5407 __func__); 5408 ATH_TID_REMOVE(tid, bf, bf_list); 5409 5410 if (bf->bf_state.bfs_nframes > 1) 5411 DPRINTF(sc, ATH_DEBUG_SW_TX, 5412 "%s: aggr=%d, nframes=%d\n", 5413 __func__, 5414 bf->bf_state.bfs_aggr, 5415 bf->bf_state.bfs_nframes); 5416 5417 /* 5418 * This shouldn't happen - such frames shouldn't 5419 * ever have been queued as an aggregate in the 5420 * first place. However, make sure the fields 5421 * are correctly setup just to be totally sure. 5422 */ 5423 bf->bf_state.bfs_aggr = 0; 5424 bf->bf_state.bfs_nframes = 1; 5425 5426 /* Update CLRDMASK just before this frame is queued */ 5427 ath_tx_update_clrdmask(sc, tid, bf); 5428 5429 ath_tx_do_ratelookup(sc, bf); 5430 ath_tx_calc_duration(sc, bf); 5431 ath_tx_calc_protection(sc, bf); 5432 ath_tx_set_rtscts(sc, bf); 5433 ath_tx_rate_fill_rcflags(sc, bf); 5434 ath_tx_setds(sc, bf); 5435 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5436 5437 sc->sc_aggr_stats.aggr_nonbaw_pkt++; 5438 5439 /* Queue the packet; continue */ 5440 goto queuepkt; 5441 } 5442 5443 TAILQ_INIT(&bf_q); 5444 5445 /* 5446 * Do a rate control lookup on the first frame in the 5447 * list. The rate control code needs that to occur 5448 * before it can determine whether to TX. 5449 * It's inaccurate because the rate control code doesn't 5450 * really "do" aggregate lookups, so it only considers 5451 * the size of the first frame. 5452 */ 5453 ath_tx_do_ratelookup(sc, bf); 5454 bf->bf_state.bfs_rc[3].rix = 0; 5455 bf->bf_state.bfs_rc[3].tries = 0; 5456 5457 ath_tx_calc_duration(sc, bf); 5458 ath_tx_calc_protection(sc, bf); 5459 5460 ath_tx_set_rtscts(sc, bf); 5461 ath_tx_rate_fill_rcflags(sc, bf); 5462 5463 status = ath_tx_form_aggr(sc, an, tid, &bf_q); 5464 5465 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5466 "%s: ath_tx_form_aggr() status=%d\n", __func__, status); 5467 5468 /* 5469 * No frames to be picked up - out of BAW 5470 */ 5471 if (TAILQ_EMPTY(&bf_q)) 5472 break; 5473 5474 /* 5475 * This assumes that the descriptor list in the ath_bufhead 5476 * are already linked together via bf_next pointers. 5477 */ 5478 bf = TAILQ_FIRST(&bf_q); 5479 5480 if (status == ATH_AGGR_8K_LIMITED) 5481 sc->sc_aggr_stats.aggr_rts_aggr_limited++; 5482 5483 /* 5484 * If it's the only frame send as non-aggregate 5485 * assume that ath_tx_form_aggr() has checked 5486 * whether it's in the BAW and added it appropriately. 5487 */ 5488 if (bf->bf_state.bfs_nframes == 1) { 5489 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5490 "%s: single-frame aggregate\n", __func__); 5491 5492 /* Update CLRDMASK just before this frame is queued */ 5493 ath_tx_update_clrdmask(sc, tid, bf); 5494 5495 bf->bf_state.bfs_aggr = 0; 5496 bf->bf_state.bfs_ndelim = 0; 5497 ath_tx_setds(sc, bf); 5498 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5499 if (status == ATH_AGGR_BAW_CLOSED) 5500 sc->sc_aggr_stats.aggr_baw_closed_single_pkt++; 5501 else 5502 sc->sc_aggr_stats.aggr_single_pkt++; 5503 } else { 5504 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5505 "%s: multi-frame aggregate: %d frames, " 5506 "length %d\n", 5507 __func__, bf->bf_state.bfs_nframes, 5508 bf->bf_state.bfs_al); 5509 bf->bf_state.bfs_aggr = 1; 5510 sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++; 5511 sc->sc_aggr_stats.aggr_aggr_pkt++; 5512 5513 /* Update CLRDMASK just before this frame is queued */ 5514 ath_tx_update_clrdmask(sc, tid, bf); 5515 5516 /* 5517 * Calculate the duration/protection as required. 5518 */ 5519 ath_tx_calc_duration(sc, bf); 5520 ath_tx_calc_protection(sc, bf); 5521 5522 /* 5523 * Update the rate and rtscts information based on the 5524 * rate decision made by the rate control code; 5525 * the first frame in the aggregate needs it. 5526 */ 5527 ath_tx_set_rtscts(sc, bf); 5528 5529 /* 5530 * Setup the relevant descriptor fields 5531 * for aggregation. The first descriptor 5532 * already points to the rest in the chain. 5533 */ 5534 ath_tx_setds_11n(sc, bf); 5535 5536 } 5537 queuepkt: 5538 /* Set completion handler, multi-frame aggregate or not */ 5539 bf->bf_comp = ath_tx_aggr_comp; 5540 5541 if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 5542 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__); 5543 5544 /* 5545 * Update leak count and frame config if were leaking frames. 5546 * 5547 * XXX TODO: it should update all frames in an aggregate 5548 * correctly! 5549 */ 5550 ath_tx_leak_count_update(sc, tid, bf); 5551 5552 /* Punt to txq */ 5553 ath_tx_handoff(sc, txq, bf); 5554 5555 /* Track outstanding buffer count to hardware */ 5556 /* aggregates are "one" buffer */ 5557 tid->hwq_depth++; 5558 5559 /* 5560 * Break out if ath_tx_form_aggr() indicated 5561 * there can't be any further progress (eg BAW is full.) 5562 * Checking for an empty txq is done above. 5563 * 5564 * XXX locking on txq here? 5565 */ 5566 /* XXX TXQ locking */ 5567 if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr || 5568 (status == ATH_AGGR_BAW_CLOSED || 5569 status == ATH_AGGR_LEAK_CLOSED)) 5570 break; 5571 } 5572 } 5573 5574 /* 5575 * Schedule some packets from the given node/TID to the hardware. 5576 * 5577 * XXX TODO: this routine doesn't enforce the maximum TXQ depth. 5578 * It just dumps frames into the TXQ. We should limit how deep 5579 * the transmit queue can grow for frames dispatched to the given 5580 * TXQ. 5581 * 5582 * To avoid locking issues, either we need to own the TXQ lock 5583 * at this point, or we need to pass in the maximum frame count 5584 * from the caller. 5585 */ 5586 void 5587 ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an, 5588 struct ath_tid *tid) 5589 { 5590 struct ath_buf *bf; 5591 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5592 5593 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n", 5594 __func__, an, tid->tid); 5595 5596 ATH_TX_LOCK_ASSERT(sc); 5597 5598 /* Check - is AMPDU pending or running? then print out something */ 5599 if (ath_tx_ampdu_pending(sc, an, tid->tid)) 5600 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n", 5601 __func__, tid->tid); 5602 if (ath_tx_ampdu_running(sc, an, tid->tid)) 5603 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n", 5604 __func__, tid->tid); 5605 5606 for (;;) { 5607 5608 /* 5609 * If the upper layers have paused the TID, don't 5610 * queue any further packets. 5611 * 5612 * XXX if we are leaking frames, make sure we decrement 5613 * that counter _and_ we continue here. 5614 */ 5615 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5616 break; 5617 5618 bf = ATH_TID_FIRST(tid); 5619 if (bf == NULL) { 5620 break; 5621 } 5622 5623 ATH_TID_REMOVE(tid, bf, bf_list); 5624 5625 /* Sanity check! */ 5626 if (tid->tid != bf->bf_state.bfs_tid) { 5627 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !=" 5628 " tid %d\n", __func__, bf->bf_state.bfs_tid, 5629 tid->tid); 5630 } 5631 /* Normal completion handler */ 5632 bf->bf_comp = ath_tx_normal_comp; 5633 5634 /* 5635 * Override this for now, until the non-aggregate 5636 * completion handler correctly handles software retransmits. 5637 */ 5638 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 5639 5640 /* Update CLRDMASK just before this frame is queued */ 5641 ath_tx_update_clrdmask(sc, tid, bf); 5642 5643 /* Program descriptors + rate control */ 5644 ath_tx_do_ratelookup(sc, bf); 5645 ath_tx_calc_duration(sc, bf); 5646 ath_tx_calc_protection(sc, bf); 5647 ath_tx_set_rtscts(sc, bf); 5648 ath_tx_rate_fill_rcflags(sc, bf); 5649 ath_tx_setds(sc, bf); 5650 5651 /* 5652 * Update the current leak count if 5653 * we're leaking frames; and set the 5654 * MORE flag as appropriate. 5655 */ 5656 ath_tx_leak_count_update(sc, tid, bf); 5657 5658 /* Track outstanding buffer count to hardware */ 5659 /* aggregates are "one" buffer */ 5660 tid->hwq_depth++; 5661 5662 /* Punt to hardware or software txq */ 5663 ath_tx_handoff(sc, txq, bf); 5664 } 5665 } 5666 5667 /* 5668 * Schedule some packets to the given hardware queue. 5669 * 5670 * This function walks the list of TIDs (ie, ath_node TIDs 5671 * with queued traffic) and attempts to schedule traffic 5672 * from them. 5673 * 5674 * TID scheduling is implemented as a FIFO, with TIDs being 5675 * added to the end of the queue after some frames have been 5676 * scheduled. 5677 */ 5678 void 5679 ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq) 5680 { 5681 struct ath_tid *tid, *next, *last; 5682 5683 ATH_TX_LOCK_ASSERT(sc); 5684 5685 /* 5686 * For non-EDMA chips, aggr frames that have been built are 5687 * in axq_aggr_depth, whether they've been scheduled or not. 5688 * There's no FIFO, so txq->axq_depth is what's been scheduled 5689 * to the hardware. 5690 * 5691 * For EDMA chips, we do it in two stages. The existing code 5692 * builds a list of frames to go to the hardware and the EDMA 5693 * code turns it into a single entry to push into the FIFO. 5694 * That way we don't take up one packet per FIFO slot. 5695 * We do push one aggregate per FIFO slot though, just to keep 5696 * things simple. 5697 * 5698 * The FIFO depth is what's in the hardware; the txq->axq_depth 5699 * is what's been scheduled to the FIFO. 5700 * 5701 * fifo.axq_depth is the number of frames (or aggregates) pushed 5702 * into the EDMA FIFO. For multi-frame lists, this is the number 5703 * of frames pushed in. 5704 * axq_fifo_depth is the number of FIFO slots currently busy. 5705 */ 5706 5707 /* For EDMA and non-EDMA, check built/scheduled against aggr limit */ 5708 if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr) { 5709 sc->sc_aggr_stats.aggr_sched_nopkt++; 5710 return; 5711 } 5712 5713 /* 5714 * For non-EDMA chips, axq_depth is the "what's scheduled to 5715 * the hardware list". For EDMA it's "What's built for the hardware" 5716 * and fifo.axq_depth is how many frames have been dispatched 5717 * already to the hardware. 5718 */ 5719 if (txq->axq_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_nonaggr) { 5720 sc->sc_aggr_stats.aggr_sched_nopkt++; 5721 return; 5722 } 5723 5724 last = TAILQ_LAST(&txq->axq_tidq, axq_t_s); 5725 5726 TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) { 5727 /* 5728 * Suspend paused queues here; they'll be resumed 5729 * once the addba completes or times out. 5730 */ 5731 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n", 5732 __func__, tid->tid, tid->paused); 5733 ath_tx_tid_unsched(sc, tid); 5734 /* 5735 * This node may be in power-save and we're leaking 5736 * a frame; be careful. 5737 */ 5738 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 5739 goto loop_done; 5740 } 5741 if (ath_tx_ampdu_running(sc, tid->an, tid->tid)) 5742 ath_tx_tid_hw_queue_aggr(sc, tid->an, tid); 5743 else 5744 ath_tx_tid_hw_queue_norm(sc, tid->an, tid); 5745 5746 /* Not empty? Re-schedule */ 5747 if (tid->axq_depth != 0) 5748 ath_tx_tid_sched(sc, tid); 5749 5750 /* 5751 * Give the software queue time to aggregate more 5752 * packets. If we aren't running aggregation then 5753 * we should still limit the hardware queue depth. 5754 */ 5755 /* XXX TXQ locking */ 5756 if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 5757 break; 5758 } 5759 if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5760 break; 5761 } 5762 loop_done: 5763 /* 5764 * If this was the last entry on the original list, stop. 5765 * Otherwise nodes that have been rescheduled onto the end 5766 * of the TID FIFO list will just keep being rescheduled. 5767 * 5768 * XXX What should we do about nodes that were paused 5769 * but are pending a leaking frame in response to a ps-poll? 5770 * They'll be put at the front of the list; so they'll 5771 * prematurely trigger this condition! Ew. 5772 */ 5773 if (tid == last) 5774 break; 5775 } 5776 } 5777 5778 /* 5779 * TX addba handling 5780 */ 5781 5782 /* 5783 * Return net80211 TID struct pointer, or NULL for none 5784 */ 5785 struct ieee80211_tx_ampdu * 5786 ath_tx_get_tx_tid(struct ath_node *an, int tid) 5787 { 5788 struct ieee80211_node *ni = &an->an_node; 5789 struct ieee80211_tx_ampdu *tap; 5790 5791 if (tid == IEEE80211_NONQOS_TID) 5792 return NULL; 5793 5794 tap = &ni->ni_tx_ampdu[tid]; 5795 return tap; 5796 } 5797 5798 /* 5799 * Is AMPDU-TX running? 5800 */ 5801 static int 5802 ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid) 5803 { 5804 struct ieee80211_tx_ampdu *tap; 5805 5806 if (tid == IEEE80211_NONQOS_TID) 5807 return 0; 5808 5809 tap = ath_tx_get_tx_tid(an, tid); 5810 if (tap == NULL) 5811 return 0; /* Not valid; default to not running */ 5812 5813 return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING); 5814 } 5815 5816 /* 5817 * Is AMPDU-TX negotiation pending? 5818 */ 5819 static int 5820 ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid) 5821 { 5822 struct ieee80211_tx_ampdu *tap; 5823 5824 if (tid == IEEE80211_NONQOS_TID) 5825 return 0; 5826 5827 tap = ath_tx_get_tx_tid(an, tid); 5828 if (tap == NULL) 5829 return 0; /* Not valid; default to not pending */ 5830 5831 return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND); 5832 } 5833 5834 /* 5835 * Is AMPDU-TX pending for the given TID? 5836 */ 5837 5838 5839 /* 5840 * Method to handle sending an ADDBA request. 5841 * 5842 * We tap this so the relevant flags can be set to pause the TID 5843 * whilst waiting for the response. 5844 * 5845 * XXX there's no timeout handler we can override? 5846 */ 5847 int 5848 ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5849 int dialogtoken, int baparamset, int batimeout) 5850 { 5851 struct ath_softc *sc = ni->ni_ic->ic_softc; 5852 int tid = tap->txa_tid; 5853 struct ath_node *an = ATH_NODE(ni); 5854 struct ath_tid *atid = &an->an_tid[tid]; 5855 5856 /* 5857 * XXX danger Will Robinson! 5858 * 5859 * Although the taskqueue may be running and scheduling some more 5860 * packets, these should all be _before_ the addba sequence number. 5861 * However, net80211 will keep self-assigning sequence numbers 5862 * until addba has been negotiated. 5863 * 5864 * In the past, these packets would be "paused" (which still works 5865 * fine, as they're being scheduled to the driver in the same 5866 * serialised method which is calling the addba request routine) 5867 * and when the aggregation session begins, they'll be dequeued 5868 * as aggregate packets and added to the BAW. However, now there's 5869 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these 5870 * packets. Thus they never get included in the BAW tracking and 5871 * this can cause the initial burst of packets after the addba 5872 * negotiation to "hang", as they quickly fall outside the BAW. 5873 * 5874 * The "eventual" solution should be to tag these packets with 5875 * dobaw. Although net80211 has given us a sequence number, 5876 * it'll be "after" the left edge of the BAW and thus it'll 5877 * fall within it. 5878 */ 5879 ATH_TX_LOCK(sc); 5880 /* 5881 * This is a bit annoying. Until net80211 HT code inherits some 5882 * (any) locking, we may have this called in parallel BUT only 5883 * one response/timeout will be called. Grr. 5884 */ 5885 if (atid->addba_tx_pending == 0) { 5886 ath_tx_tid_pause(sc, atid); 5887 atid->addba_tx_pending = 1; 5888 } 5889 ATH_TX_UNLOCK(sc); 5890 5891 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5892 "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n", 5893 __func__, 5894 ni->ni_macaddr, 5895 ":", 5896 dialogtoken, baparamset, batimeout); 5897 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5898 "%s: txa_start=%d, ni_txseqs=%d\n", 5899 __func__, tap->txa_start, ni->ni_txseqs[tid]); 5900 5901 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, 5902 batimeout); 5903 } 5904 5905 /* 5906 * Handle an ADDBA response. 5907 * 5908 * We unpause the queue so TX'ing can resume. 5909 * 5910 * Any packets TX'ed from this point should be "aggregate" (whether 5911 * aggregate or not) so the BAW is updated. 5912 * 5913 * Note! net80211 keeps self-assigning sequence numbers until 5914 * ampdu is negotiated. This means the initially-negotiated BAW left 5915 * edge won't match the ni->ni_txseq. 5916 * 5917 * So, being very dirty, the BAW left edge is "slid" here to match 5918 * ni->ni_txseq. 5919 * 5920 * What likely SHOULD happen is that all packets subsequent to the 5921 * addba request should be tagged as aggregate and queued as non-aggregate 5922 * frames; thus updating the BAW. For now though, I'll just slide the 5923 * window. 5924 */ 5925 int 5926 ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5927 int status, int code, int batimeout) 5928 { 5929 struct ath_softc *sc = ni->ni_ic->ic_softc; 5930 int tid = tap->txa_tid; 5931 struct ath_node *an = ATH_NODE(ni); 5932 struct ath_tid *atid = &an->an_tid[tid]; 5933 int r; 5934 5935 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5936 "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__, 5937 ni->ni_macaddr, 5938 ":", 5939 status, code, batimeout); 5940 5941 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5942 "%s: txa_start=%d, ni_txseqs=%d\n", 5943 __func__, tap->txa_start, ni->ni_txseqs[tid]); 5944 5945 /* 5946 * Call this first, so the interface flags get updated 5947 * before the TID is unpaused. Otherwise a race condition 5948 * exists where the unpaused TID still doesn't yet have 5949 * IEEE80211_AGGR_RUNNING set. 5950 */ 5951 r = sc->sc_addba_response(ni, tap, status, code, batimeout); 5952 5953 ATH_TX_LOCK(sc); 5954 atid->addba_tx_pending = 0; 5955 /* 5956 * XXX dirty! 5957 * Slide the BAW left edge to wherever net80211 left it for us. 5958 * Read above for more information. 5959 */ 5960 tap->txa_start = ni->ni_txseqs[tid]; 5961 ath_tx_tid_resume(sc, atid); 5962 ATH_TX_UNLOCK(sc); 5963 return r; 5964 } 5965 5966 5967 /* 5968 * Stop ADDBA on a queue. 5969 * 5970 * This can be called whilst BAR TX is currently active on the queue, 5971 * so make sure this is unblocked before continuing. 5972 */ 5973 void 5974 ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 5975 { 5976 struct ath_softc *sc = ni->ni_ic->ic_softc; 5977 int tid = tap->txa_tid; 5978 struct ath_node *an = ATH_NODE(ni); 5979 struct ath_tid *atid = &an->an_tid[tid]; 5980 ath_bufhead bf_cq; 5981 struct ath_buf *bf; 5982 5983 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n", 5984 __func__, 5985 ni->ni_macaddr, 5986 ":"); 5987 5988 /* 5989 * Pause TID traffic early, so there aren't any races 5990 * Unblock the pending BAR held traffic, if it's currently paused. 5991 */ 5992 ATH_TX_LOCK(sc); 5993 ath_tx_tid_pause(sc, atid); 5994 if (atid->bar_wait) { 5995 /* 5996 * bar_unsuspend() expects bar_tx == 1, as it should be 5997 * called from the TX completion path. This quietens 5998 * the warning. It's cleared for us anyway. 5999 */ 6000 atid->bar_tx = 1; 6001 ath_tx_tid_bar_unsuspend(sc, atid); 6002 } 6003 ATH_TX_UNLOCK(sc); 6004 6005 /* There's no need to hold the TXQ lock here */ 6006 sc->sc_addba_stop(ni, tap); 6007 6008 /* 6009 * ath_tx_tid_cleanup will resume the TID if possible, otherwise 6010 * it'll set the cleanup flag, and it'll be unpaused once 6011 * things have been cleaned up. 6012 */ 6013 TAILQ_INIT(&bf_cq); 6014 ATH_TX_LOCK(sc); 6015 6016 /* 6017 * In case there's a followup call to this, only call it 6018 * if we don't have a cleanup in progress. 6019 * 6020 * Since we've paused the queue above, we need to make 6021 * sure we unpause if there's already a cleanup in 6022 * progress - it means something else is also doing 6023 * this stuff, so we don't need to also keep it paused. 6024 */ 6025 if (atid->cleanup_inprogress) { 6026 ath_tx_tid_resume(sc, atid); 6027 } else { 6028 ath_tx_tid_cleanup(sc, an, tid, &bf_cq); 6029 /* 6030 * Unpause the TID if no cleanup is required. 6031 */ 6032 if (! atid->cleanup_inprogress) 6033 ath_tx_tid_resume(sc, atid); 6034 } 6035 ATH_TX_UNLOCK(sc); 6036 6037 /* Handle completing frames and fail them */ 6038 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 6039 TAILQ_REMOVE(&bf_cq, bf, bf_list); 6040 ath_tx_default_comp(sc, bf, 1); 6041 } 6042 6043 } 6044 6045 /* 6046 * Handle a node reassociation. 6047 * 6048 * We may have a bunch of frames queued to the hardware; those need 6049 * to be marked as cleanup. 6050 */ 6051 void 6052 ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an) 6053 { 6054 struct ath_tid *tid; 6055 int i; 6056 ath_bufhead bf_cq; 6057 struct ath_buf *bf; 6058 6059 TAILQ_INIT(&bf_cq); 6060 6061 ATH_TX_UNLOCK_ASSERT(sc); 6062 6063 ATH_TX_LOCK(sc); 6064 for (i = 0; i < IEEE80211_TID_SIZE; i++) { 6065 tid = &an->an_tid[i]; 6066 if (tid->hwq_depth == 0) 6067 continue; 6068 DPRINTF(sc, ATH_DEBUG_NODE, 6069 "%s: %6D: TID %d: cleaning up TID\n", 6070 __func__, 6071 an->an_node.ni_macaddr, 6072 ":", 6073 i); 6074 /* 6075 * In case there's a followup call to this, only call it 6076 * if we don't have a cleanup in progress. 6077 */ 6078 if (! tid->cleanup_inprogress) { 6079 ath_tx_tid_pause(sc, tid); 6080 ath_tx_tid_cleanup(sc, an, i, &bf_cq); 6081 /* 6082 * Unpause the TID if no cleanup is required. 6083 */ 6084 if (! tid->cleanup_inprogress) 6085 ath_tx_tid_resume(sc, tid); 6086 } 6087 } 6088 ATH_TX_UNLOCK(sc); 6089 6090 /* Handle completing frames and fail them */ 6091 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 6092 TAILQ_REMOVE(&bf_cq, bf, bf_list); 6093 ath_tx_default_comp(sc, bf, 1); 6094 } 6095 } 6096 6097 /* 6098 * Note: net80211 bar_timeout() doesn't call this function on BAR failure; 6099 * it simply tears down the aggregation session. Ew. 6100 * 6101 * It however will call ieee80211_ampdu_stop() which will call 6102 * ic->ic_addba_stop(). 6103 * 6104 * XXX This uses a hard-coded max BAR count value; the whole 6105 * XXX BAR TX success or failure should be better handled! 6106 */ 6107 void 6108 ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 6109 int status) 6110 { 6111 struct ath_softc *sc = ni->ni_ic->ic_softc; 6112 int tid = tap->txa_tid; 6113 struct ath_node *an = ATH_NODE(ni); 6114 struct ath_tid *atid = &an->an_tid[tid]; 6115 int attempts = tap->txa_attempts; 6116 int old_txa_start; 6117 6118 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6119 "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n", 6120 __func__, 6121 ni->ni_macaddr, 6122 ":", 6123 tap->txa_tid, 6124 atid->tid, 6125 status, 6126 attempts, 6127 tap->txa_start, 6128 tap->txa_seqpending); 6129 6130 /* Note: This may update the BAW details */ 6131 /* 6132 * XXX What if this does slide the BAW along? We need to somehow 6133 * XXX either fix things when it does happen, or prevent the 6134 * XXX seqpending value to be anything other than exactly what 6135 * XXX the hell we want! 6136 * 6137 * XXX So for now, how I do this inside the TX lock for now 6138 * XXX and just correct it afterwards? The below condition should 6139 * XXX never happen and if it does I need to fix all kinds of things. 6140 */ 6141 ATH_TX_LOCK(sc); 6142 old_txa_start = tap->txa_start; 6143 sc->sc_bar_response(ni, tap, status); 6144 if (tap->txa_start != old_txa_start) { 6145 device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n", 6146 __func__, 6147 tid, 6148 tap->txa_start, 6149 old_txa_start); 6150 } 6151 tap->txa_start = old_txa_start; 6152 ATH_TX_UNLOCK(sc); 6153 6154 /* Unpause the TID */ 6155 /* 6156 * XXX if this is attempt=50, the TID will be downgraded 6157 * XXX to a non-aggregate session. So we must unpause the 6158 * XXX TID here or it'll never be done. 6159 * 6160 * Also, don't call it if bar_tx/bar_wait are 0; something 6161 * has beaten us to the punch? (XXX figure out what?) 6162 */ 6163 if (status == 0 || attempts == 50) { 6164 ATH_TX_LOCK(sc); 6165 if (atid->bar_tx == 0 || atid->bar_wait == 0) 6166 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6167 "%s: huh? bar_tx=%d, bar_wait=%d\n", 6168 __func__, 6169 atid->bar_tx, atid->bar_wait); 6170 else 6171 ath_tx_tid_bar_unsuspend(sc, atid); 6172 ATH_TX_UNLOCK(sc); 6173 } 6174 } 6175 6176 /* 6177 * This is called whenever the pending ADDBA request times out. 6178 * Unpause and reschedule the TID. 6179 */ 6180 void 6181 ath_addba_response_timeout(struct ieee80211_node *ni, 6182 struct ieee80211_tx_ampdu *tap) 6183 { 6184 struct ath_softc *sc = ni->ni_ic->ic_softc; 6185 int tid = tap->txa_tid; 6186 struct ath_node *an = ATH_NODE(ni); 6187 struct ath_tid *atid = &an->an_tid[tid]; 6188 6189 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 6190 "%s: %6D: TID=%d, called; resuming\n", 6191 __func__, 6192 ni->ni_macaddr, 6193 ":", 6194 tid); 6195 6196 ATH_TX_LOCK(sc); 6197 atid->addba_tx_pending = 0; 6198 ATH_TX_UNLOCK(sc); 6199 6200 /* Note: This updates the aggregate state to (again) pending */ 6201 sc->sc_addba_response_timeout(ni, tap); 6202 6203 /* Unpause the TID; which reschedules it */ 6204 ATH_TX_LOCK(sc); 6205 ath_tx_tid_resume(sc, atid); 6206 ATH_TX_UNLOCK(sc); 6207 } 6208 6209 /* 6210 * Check if a node is asleep or not. 6211 */ 6212 int 6213 ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an) 6214 { 6215 6216 ATH_TX_LOCK_ASSERT(sc); 6217 6218 return (an->an_is_powersave); 6219 } 6220 6221 /* 6222 * Mark a node as currently "in powersaving." 6223 * This suspends all traffic on the node. 6224 * 6225 * This must be called with the node/tx locks free. 6226 * 6227 * XXX TODO: the locking silliness below is due to how the node 6228 * locking currently works. Right now, the node lock is grabbed 6229 * to do rate control lookups and these are done with the TX 6230 * queue lock held. This means the node lock can't be grabbed 6231 * first here or a LOR will occur. 6232 * 6233 * Eventually (hopefully!) the TX path code will only grab 6234 * the TXQ lock when transmitting and the ath_node lock when 6235 * doing node/TID operations. There are other complications - 6236 * the sched/unsched operations involve walking the per-txq 6237 * 'active tid' list and this requires both locks to be held. 6238 */ 6239 void 6240 ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an) 6241 { 6242 struct ath_tid *atid; 6243 struct ath_txq *txq; 6244 int tid; 6245 6246 ATH_TX_UNLOCK_ASSERT(sc); 6247 6248 /* Suspend all traffic on the node */ 6249 ATH_TX_LOCK(sc); 6250 6251 if (an->an_is_powersave) { 6252 DPRINTF(sc, ATH_DEBUG_XMIT, 6253 "%s: %6D: node was already asleep!\n", 6254 __func__, an->an_node.ni_macaddr, ":"); 6255 ATH_TX_UNLOCK(sc); 6256 return; 6257 } 6258 6259 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 6260 atid = &an->an_tid[tid]; 6261 txq = sc->sc_ac2q[atid->ac]; 6262 6263 ath_tx_tid_pause(sc, atid); 6264 } 6265 6266 /* Mark node as in powersaving */ 6267 an->an_is_powersave = 1; 6268 6269 ATH_TX_UNLOCK(sc); 6270 } 6271 6272 /* 6273 * Mark a node as currently "awake." 6274 * This resumes all traffic to the node. 6275 */ 6276 void 6277 ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an) 6278 { 6279 struct ath_tid *atid; 6280 struct ath_txq *txq; 6281 int tid; 6282 6283 ATH_TX_UNLOCK_ASSERT(sc); 6284 6285 ATH_TX_LOCK(sc); 6286 6287 /* !? */ 6288 if (an->an_is_powersave == 0) { 6289 ATH_TX_UNLOCK(sc); 6290 DPRINTF(sc, ATH_DEBUG_XMIT, 6291 "%s: an=%p: node was already awake\n", 6292 __func__, an); 6293 return; 6294 } 6295 6296 /* Mark node as awake */ 6297 an->an_is_powersave = 0; 6298 /* 6299 * Clear any pending leaked frame requests 6300 */ 6301 an->an_leak_count = 0; 6302 6303 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 6304 atid = &an->an_tid[tid]; 6305 txq = sc->sc_ac2q[atid->ac]; 6306 6307 ath_tx_tid_resume(sc, atid); 6308 } 6309 ATH_TX_UNLOCK(sc); 6310 } 6311 6312 static int 6313 ath_legacy_dma_txsetup(struct ath_softc *sc) 6314 { 6315 6316 /* nothing new needed */ 6317 return (0); 6318 } 6319 6320 static int 6321 ath_legacy_dma_txteardown(struct ath_softc *sc) 6322 { 6323 6324 /* nothing new needed */ 6325 return (0); 6326 } 6327 6328 void 6329 ath_xmit_setup_legacy(struct ath_softc *sc) 6330 { 6331 /* 6332 * For now, just set the descriptor length to sizeof(ath_desc); 6333 * worry about extracting the real length out of the HAL later. 6334 */ 6335 sc->sc_tx_desclen = sizeof(struct ath_desc); 6336 sc->sc_tx_statuslen = sizeof(struct ath_desc); 6337 sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */ 6338 6339 sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup; 6340 sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown; 6341 sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func; 6342 6343 sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart; 6344 sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff; 6345 6346 sc->sc_tx.xmit_drain = ath_legacy_tx_drain; 6347 } 6348