1b8e788a5SAdrian Chadd /*- 2b8e788a5SAdrian Chadd * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3c6e9cee2SAdrian Chadd * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 4b8e788a5SAdrian Chadd * All rights reserved. 5b8e788a5SAdrian Chadd * 6b8e788a5SAdrian Chadd * Redistribution and use in source and binary forms, with or without 7b8e788a5SAdrian Chadd * modification, are permitted provided that the following conditions 8b8e788a5SAdrian Chadd * are met: 9b8e788a5SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 10b8e788a5SAdrian Chadd * notice, this list of conditions and the following disclaimer, 11b8e788a5SAdrian Chadd * without modification. 12b8e788a5SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13b8e788a5SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14b8e788a5SAdrian Chadd * redistribution must be conditioned upon including a substantially 15b8e788a5SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 16b8e788a5SAdrian Chadd * 17b8e788a5SAdrian Chadd * NO WARRANTY 18b8e788a5SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19b8e788a5SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20b8e788a5SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21b8e788a5SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22b8e788a5SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23b8e788a5SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24b8e788a5SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25b8e788a5SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26b8e788a5SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27b8e788a5SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28b8e788a5SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 29b8e788a5SAdrian Chadd */ 30b8e788a5SAdrian Chadd 31b8e788a5SAdrian Chadd #include <sys/cdefs.h> 32b8e788a5SAdrian Chadd __FBSDID("$FreeBSD$"); 33b8e788a5SAdrian Chadd 34b8e788a5SAdrian Chadd /* 35b8e788a5SAdrian Chadd * Driver for the Atheros Wireless LAN controller. 36b8e788a5SAdrian Chadd * 37b8e788a5SAdrian Chadd * This software is derived from work of Atsushi Onoe; his contribution 38b8e788a5SAdrian Chadd * is greatly appreciated. 39b8e788a5SAdrian Chadd */ 40b8e788a5SAdrian Chadd 41b8e788a5SAdrian Chadd #include "opt_inet.h" 42b8e788a5SAdrian Chadd #include "opt_ath.h" 43b8e788a5SAdrian Chadd #include "opt_wlan.h" 44b8e788a5SAdrian Chadd 45b8e788a5SAdrian Chadd #include <sys/param.h> 46b8e788a5SAdrian Chadd #include <sys/systm.h> 47b8e788a5SAdrian Chadd #include <sys/sysctl.h> 48b8e788a5SAdrian Chadd #include <sys/mbuf.h> 49b8e788a5SAdrian Chadd #include <sys/malloc.h> 50b8e788a5SAdrian Chadd #include <sys/lock.h> 51b8e788a5SAdrian Chadd #include <sys/mutex.h> 52b8e788a5SAdrian Chadd #include <sys/kernel.h> 53b8e788a5SAdrian Chadd #include <sys/socket.h> 54b8e788a5SAdrian Chadd #include <sys/sockio.h> 55b8e788a5SAdrian Chadd #include <sys/errno.h> 56b8e788a5SAdrian Chadd #include <sys/callout.h> 57b8e788a5SAdrian Chadd #include <sys/bus.h> 58b8e788a5SAdrian Chadd #include <sys/endian.h> 59b8e788a5SAdrian Chadd #include <sys/kthread.h> 60b8e788a5SAdrian Chadd #include <sys/taskqueue.h> 61b8e788a5SAdrian Chadd #include <sys/priv.h> 62f431664cSOlivier Houchard #include <sys/ktr.h> 63b8e788a5SAdrian Chadd 64b8e788a5SAdrian Chadd #include <machine/bus.h> 65b8e788a5SAdrian Chadd 66b8e788a5SAdrian Chadd #include <net/if.h> 6776039bc8SGleb Smirnoff #include <net/if_var.h> 68b8e788a5SAdrian Chadd #include <net/if_dl.h> 69b8e788a5SAdrian Chadd #include <net/if_media.h> 70b8e788a5SAdrian Chadd #include <net/if_types.h> 71b8e788a5SAdrian Chadd #include <net/if_arp.h> 72b8e788a5SAdrian Chadd #include <net/ethernet.h> 73b8e788a5SAdrian Chadd #include <net/if_llc.h> 74b8e788a5SAdrian Chadd 75b8e788a5SAdrian Chadd #include <net80211/ieee80211_var.h> 76b8e788a5SAdrian Chadd #include <net80211/ieee80211_regdomain.h> 77b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_SUPERG 78b8e788a5SAdrian Chadd #include <net80211/ieee80211_superg.h> 79b8e788a5SAdrian Chadd #endif 80b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 81b8e788a5SAdrian Chadd #include <net80211/ieee80211_tdma.h> 82b8e788a5SAdrian Chadd #endif 83eb6f0de0SAdrian Chadd #include <net80211/ieee80211_ht.h> 84b8e788a5SAdrian Chadd 85b8e788a5SAdrian Chadd #include <net/bpf.h> 86b8e788a5SAdrian Chadd 87b8e788a5SAdrian Chadd #ifdef INET 88b8e788a5SAdrian Chadd #include <netinet/in.h> 89b8e788a5SAdrian Chadd #include <netinet/if_ether.h> 90b8e788a5SAdrian Chadd #endif 91b8e788a5SAdrian Chadd 92b8e788a5SAdrian Chadd #include <dev/ath/if_athvar.h> 93b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 94b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_diagcodes.h> 95b8e788a5SAdrian Chadd 96b8e788a5SAdrian Chadd #include <dev/ath/if_ath_debug.h> 97b8e788a5SAdrian Chadd 98b8e788a5SAdrian Chadd #ifdef ATH_TX99_DIAG 99b8e788a5SAdrian Chadd #include <dev/ath/ath_tx99/ath_tx99.h> 100b8e788a5SAdrian Chadd #endif 101b8e788a5SAdrian Chadd 102b8e788a5SAdrian Chadd #include <dev/ath/if_ath_misc.h> 103b8e788a5SAdrian Chadd #include <dev/ath/if_ath_tx.h> 104c1782ce0SAdrian Chadd #include <dev/ath/if_ath_tx_ht.h> 105b8e788a5SAdrian Chadd 106b69b0dccSAdrian Chadd #ifdef ATH_DEBUG_ALQ 107b69b0dccSAdrian Chadd #include <dev/ath/if_ath_alq.h> 108b69b0dccSAdrian Chadd #endif 109b69b0dccSAdrian Chadd 11081a82688SAdrian Chadd /* 111eb6f0de0SAdrian Chadd * How many retries to perform in software 112eb6f0de0SAdrian Chadd */ 113eb6f0de0SAdrian Chadd #define SWMAX_RETRIES 10 114eb6f0de0SAdrian Chadd 1157403d1b9SAdrian Chadd /* 1167403d1b9SAdrian Chadd * What queue to throw the non-QoS TID traffic into 1177403d1b9SAdrian Chadd */ 1187403d1b9SAdrian Chadd #define ATH_NONQOS_TID_AC WME_AC_VO 1197403d1b9SAdrian Chadd 1200eb81626SAdrian Chadd #if 0 1210eb81626SAdrian Chadd static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an); 1220eb81626SAdrian Chadd #endif 123eb6f0de0SAdrian Chadd static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, 124eb6f0de0SAdrian Chadd int tid); 125eb6f0de0SAdrian Chadd static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, 126eb6f0de0SAdrian Chadd int tid); 127a108d2d6SAdrian Chadd static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc, 128a108d2d6SAdrian Chadd struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0); 129eb6f0de0SAdrian Chadd static int ath_tx_action_frame_override_queue(struct ath_softc *sc, 130eb6f0de0SAdrian Chadd struct ieee80211_node *ni, struct mbuf *m0, int *tid); 131f1bc738eSAdrian Chadd static struct ath_buf * 132f1bc738eSAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 133f1bc738eSAdrian Chadd struct ath_tid *tid, struct ath_buf *bf); 134eb6f0de0SAdrian Chadd 135bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 136bb327d28SAdrian Chadd void 137bb327d28SAdrian Chadd ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first) 138bb327d28SAdrian Chadd { 139bb327d28SAdrian Chadd struct ath_buf *bf; 140bb327d28SAdrian Chadd int i, n; 141bb327d28SAdrian Chadd const char *ds; 142bb327d28SAdrian Chadd 143bb327d28SAdrian Chadd /* XXX we should skip out early if debugging isn't enabled! */ 144bb327d28SAdrian Chadd bf = bf_first; 145bb327d28SAdrian Chadd 146bb327d28SAdrian Chadd while (bf != NULL) { 147bb327d28SAdrian Chadd /* XXX should ensure bf_nseg > 0! */ 148bb327d28SAdrian Chadd if (bf->bf_nseg == 0) 149bb327d28SAdrian Chadd break; 150bb327d28SAdrian Chadd n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1; 151bb327d28SAdrian Chadd for (i = 0, ds = (const char *) bf->bf_desc; 152bb327d28SAdrian Chadd i < n; 153bb327d28SAdrian Chadd i++, ds += sc->sc_tx_desclen) { 154bb327d28SAdrian Chadd if_ath_alq_post(&sc->sc_alq, 155bb327d28SAdrian Chadd ATH_ALQ_EDMA_TXDESC, 156bb327d28SAdrian Chadd sc->sc_tx_desclen, 157bb327d28SAdrian Chadd ds); 158bb327d28SAdrian Chadd } 159bb327d28SAdrian Chadd bf = bf->bf_next; 160bb327d28SAdrian Chadd } 161bb327d28SAdrian Chadd } 162bb327d28SAdrian Chadd #endif /* ATH_DEBUG_ALQ */ 163bb327d28SAdrian Chadd 164eb6f0de0SAdrian Chadd /* 16581a82688SAdrian Chadd * Whether to use the 11n rate scenario functions or not 16681a82688SAdrian Chadd */ 16781a82688SAdrian Chadd static inline int 16881a82688SAdrian Chadd ath_tx_is_11n(struct ath_softc *sc) 16981a82688SAdrian Chadd { 1704ddf2cc3SAdrian Chadd return ((sc->sc_ah->ah_magic == 0x20065416) || 1714ddf2cc3SAdrian Chadd (sc->sc_ah->ah_magic == 0x19741014)); 17281a82688SAdrian Chadd } 17381a82688SAdrian Chadd 174eb6f0de0SAdrian Chadd /* 175eb6f0de0SAdrian Chadd * Obtain the current TID from the given frame. 176eb6f0de0SAdrian Chadd * 177eb6f0de0SAdrian Chadd * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.) 178eb6f0de0SAdrian Chadd * This has implications for which AC/priority the packet is placed 179eb6f0de0SAdrian Chadd * in. 180eb6f0de0SAdrian Chadd */ 181eb6f0de0SAdrian Chadd static int 182eb6f0de0SAdrian Chadd ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0) 183eb6f0de0SAdrian Chadd { 184eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 185eb6f0de0SAdrian Chadd int pri = M_WME_GETAC(m0); 186eb6f0de0SAdrian Chadd 187eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 188eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 189eb6f0de0SAdrian Chadd return IEEE80211_NONQOS_TID; 190eb6f0de0SAdrian Chadd else 191eb6f0de0SAdrian Chadd return WME_AC_TO_TID(pri); 192eb6f0de0SAdrian Chadd } 193eb6f0de0SAdrian Chadd 194f1bc738eSAdrian Chadd static void 195f1bc738eSAdrian Chadd ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf) 196f1bc738eSAdrian Chadd { 197f1bc738eSAdrian Chadd struct ieee80211_frame *wh; 198f1bc738eSAdrian Chadd 199f1bc738eSAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 200f1bc738eSAdrian Chadd /* Only update/resync if needed */ 201f1bc738eSAdrian Chadd if (bf->bf_state.bfs_isretried == 0) { 202f1bc738eSAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_RETRY; 203f1bc738eSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 204f1bc738eSAdrian Chadd BUS_DMASYNC_PREWRITE); 205f1bc738eSAdrian Chadd } 206f1bc738eSAdrian Chadd bf->bf_state.bfs_isretried = 1; 207f1bc738eSAdrian Chadd bf->bf_state.bfs_retries ++; 208f1bc738eSAdrian Chadd } 209f1bc738eSAdrian Chadd 210eb6f0de0SAdrian Chadd /* 211eb6f0de0SAdrian Chadd * Determine what the correct AC queue for the given frame 212eb6f0de0SAdrian Chadd * should be. 213eb6f0de0SAdrian Chadd * 214eb6f0de0SAdrian Chadd * This code assumes that the TIDs map consistently to 215eb6f0de0SAdrian Chadd * the underlying hardware (or software) ath_txq. 216eb6f0de0SAdrian Chadd * Since the sender may try to set an AC which is 217eb6f0de0SAdrian Chadd * arbitrary, non-QoS TIDs may end up being put on 218eb6f0de0SAdrian Chadd * completely different ACs. There's no way to put a 219eb6f0de0SAdrian Chadd * TID into multiple ath_txq's for scheduling, so 220eb6f0de0SAdrian Chadd * for now we override the AC/TXQ selection and set 221eb6f0de0SAdrian Chadd * non-QOS TID frames into the BE queue. 222eb6f0de0SAdrian Chadd * 223eb6f0de0SAdrian Chadd * This may be completely incorrect - specifically, 224eb6f0de0SAdrian Chadd * some management frames may end up out of order 225eb6f0de0SAdrian Chadd * compared to the QoS traffic they're controlling. 226eb6f0de0SAdrian Chadd * I'll look into this later. 227eb6f0de0SAdrian Chadd */ 228eb6f0de0SAdrian Chadd static int 229eb6f0de0SAdrian Chadd ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0) 230eb6f0de0SAdrian Chadd { 231eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 232eb6f0de0SAdrian Chadd int pri = M_WME_GETAC(m0); 233eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 234eb6f0de0SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh)) 235eb6f0de0SAdrian Chadd return pri; 236eb6f0de0SAdrian Chadd 2377403d1b9SAdrian Chadd return ATH_NONQOS_TID_AC; 238eb6f0de0SAdrian Chadd } 239eb6f0de0SAdrian Chadd 240b8e788a5SAdrian Chadd void 241b8e788a5SAdrian Chadd ath_txfrag_cleanup(struct ath_softc *sc, 242b8e788a5SAdrian Chadd ath_bufhead *frags, struct ieee80211_node *ni) 243b8e788a5SAdrian Chadd { 244b8e788a5SAdrian Chadd struct ath_buf *bf, *next; 245b8e788a5SAdrian Chadd 246b8e788a5SAdrian Chadd ATH_TXBUF_LOCK_ASSERT(sc); 247b8e788a5SAdrian Chadd 2486b349e5aSAdrian Chadd TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) { 249b8e788a5SAdrian Chadd /* NB: bf assumed clean */ 2506b349e5aSAdrian Chadd TAILQ_REMOVE(frags, bf, bf_list); 251e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 252b8e788a5SAdrian Chadd ieee80211_node_decref(ni); 253b8e788a5SAdrian Chadd } 254b8e788a5SAdrian Chadd } 255b8e788a5SAdrian Chadd 256b8e788a5SAdrian Chadd /* 257b8e788a5SAdrian Chadd * Setup xmit of a fragmented frame. Allocate a buffer 258b8e788a5SAdrian Chadd * for each frag and bump the node reference count to 259b8e788a5SAdrian Chadd * reflect the held reference to be setup by ath_tx_start. 260b8e788a5SAdrian Chadd */ 261b8e788a5SAdrian Chadd int 262b8e788a5SAdrian Chadd ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags, 263b8e788a5SAdrian Chadd struct mbuf *m0, struct ieee80211_node *ni) 264b8e788a5SAdrian Chadd { 265b8e788a5SAdrian Chadd struct mbuf *m; 266b8e788a5SAdrian Chadd struct ath_buf *bf; 267b8e788a5SAdrian Chadd 268b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 269b8e788a5SAdrian Chadd for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) { 270af33d486SAdrian Chadd /* XXX non-management? */ 271af33d486SAdrian Chadd bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL); 272b8e788a5SAdrian Chadd if (bf == NULL) { /* out of buffers, cleanup */ 27383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n", 274b43facbfSAdrian Chadd __func__); 275b8e788a5SAdrian Chadd ath_txfrag_cleanup(sc, frags, ni); 276b8e788a5SAdrian Chadd break; 277b8e788a5SAdrian Chadd } 278b8e788a5SAdrian Chadd ieee80211_node_incref(ni); 2796b349e5aSAdrian Chadd TAILQ_INSERT_TAIL(frags, bf, bf_list); 280b8e788a5SAdrian Chadd } 281b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 282b8e788a5SAdrian Chadd 2836b349e5aSAdrian Chadd return !TAILQ_EMPTY(frags); 284b8e788a5SAdrian Chadd } 285b8e788a5SAdrian Chadd 286b8e788a5SAdrian Chadd /* 287b8e788a5SAdrian Chadd * Reclaim mbuf resources. For fragmented frames we 288b8e788a5SAdrian Chadd * need to claim each frag chained with m_nextpkt. 289b8e788a5SAdrian Chadd */ 290b8e788a5SAdrian Chadd void 291b8e788a5SAdrian Chadd ath_freetx(struct mbuf *m) 292b8e788a5SAdrian Chadd { 293b8e788a5SAdrian Chadd struct mbuf *next; 294b8e788a5SAdrian Chadd 295b8e788a5SAdrian Chadd do { 296b8e788a5SAdrian Chadd next = m->m_nextpkt; 297b8e788a5SAdrian Chadd m->m_nextpkt = NULL; 298b8e788a5SAdrian Chadd m_freem(m); 299b8e788a5SAdrian Chadd } while ((m = next) != NULL); 300b8e788a5SAdrian Chadd } 301b8e788a5SAdrian Chadd 302b8e788a5SAdrian Chadd static int 303b8e788a5SAdrian Chadd ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0) 304b8e788a5SAdrian Chadd { 305b8e788a5SAdrian Chadd struct mbuf *m; 306b8e788a5SAdrian Chadd int error; 307b8e788a5SAdrian Chadd 308b8e788a5SAdrian Chadd /* 309b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 310b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 311b8e788a5SAdrian Chadd */ 312b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 313b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 314b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 315b8e788a5SAdrian Chadd if (error == EFBIG) { 316b8e788a5SAdrian Chadd /* XXX packet requires too many descriptors */ 31709067b6eSAdrian Chadd bf->bf_nseg = ATH_MAX_SCATTER + 1; 318b8e788a5SAdrian Chadd } else if (error != 0) { 319b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 320b8e788a5SAdrian Chadd ath_freetx(m0); 321b8e788a5SAdrian Chadd return error; 322b8e788a5SAdrian Chadd } 323b8e788a5SAdrian Chadd /* 324b8e788a5SAdrian Chadd * Discard null packets and check for packets that 325b8e788a5SAdrian Chadd * require too many TX descriptors. We try to convert 326b8e788a5SAdrian Chadd * the latter to a cluster. 327b8e788a5SAdrian Chadd */ 32809067b6eSAdrian Chadd if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */ 329b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_linear++; 33009067b6eSAdrian Chadd m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER); 331b8e788a5SAdrian Chadd if (m == NULL) { 332b8e788a5SAdrian Chadd ath_freetx(m0); 333b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nombuf++; 334b8e788a5SAdrian Chadd return ENOMEM; 335b8e788a5SAdrian Chadd } 336b8e788a5SAdrian Chadd m0 = m; 337b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 338b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 339b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 340b8e788a5SAdrian Chadd if (error != 0) { 341b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 342b8e788a5SAdrian Chadd ath_freetx(m0); 343b8e788a5SAdrian Chadd return error; 344b8e788a5SAdrian Chadd } 34509067b6eSAdrian Chadd KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER, 346b8e788a5SAdrian Chadd ("too many segments after defrag; nseg %u", bf->bf_nseg)); 347b8e788a5SAdrian Chadd } else if (bf->bf_nseg == 0) { /* null packet, discard */ 348b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nodata++; 349b8e788a5SAdrian Chadd ath_freetx(m0); 350b8e788a5SAdrian Chadd return EIO; 351b8e788a5SAdrian Chadd } 352b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n", 353b8e788a5SAdrian Chadd __func__, m0, m0->m_pkthdr.len); 354b8e788a5SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 355b8e788a5SAdrian Chadd bf->bf_m = m0; 356b8e788a5SAdrian Chadd 357b8e788a5SAdrian Chadd return 0; 358b8e788a5SAdrian Chadd } 359b8e788a5SAdrian Chadd 3606edf1dc7SAdrian Chadd /* 3616e84772fSAdrian Chadd * Chain together segments+descriptors for a frame - 11n or otherwise. 3626e84772fSAdrian Chadd * 3636e84772fSAdrian Chadd * For aggregates, this is called on each frame in the aggregate. 3646edf1dc7SAdrian Chadd */ 365b8e788a5SAdrian Chadd static void 3666e84772fSAdrian Chadd ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0, 3676e84772fSAdrian Chadd struct ath_buf *bf, int is_aggr, int is_first_subframe, 3686e84772fSAdrian Chadd int is_last_subframe) 369b8e788a5SAdrian Chadd { 370b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 3716e84772fSAdrian Chadd char *ds; 3722b200bb4SAdrian Chadd int i, bp, dsp; 37346634305SAdrian Chadd HAL_DMA_ADDR bufAddrList[4]; 37446634305SAdrian Chadd uint32_t segLenList[4]; 3752b200bb4SAdrian Chadd int numTxMaps = 1; 376e2137b86SAdrian Chadd int isFirstDesc = 1; 37746634305SAdrian Chadd 3783d9b1596SAdrian Chadd /* 3793d9b1596SAdrian Chadd * XXX There's txdma and txdma_mgmt; the descriptor 3803d9b1596SAdrian Chadd * sizes must match. 3813d9b1596SAdrian Chadd */ 3823d9b1596SAdrian Chadd struct ath_descdma *dd = &sc->sc_txdma; 383b8e788a5SAdrian Chadd 384b8e788a5SAdrian Chadd /* 385b8e788a5SAdrian Chadd * Fillin the remainder of the descriptor info. 386b8e788a5SAdrian Chadd */ 38746634305SAdrian Chadd 3882b200bb4SAdrian Chadd /* 389378a752fSAdrian Chadd * We need the number of TX data pointers in each descriptor. 390378a752fSAdrian Chadd * EDMA and later chips support 4 TX buffers per descriptor; 391378a752fSAdrian Chadd * previous chips just support one. 3922b200bb4SAdrian Chadd */ 393378a752fSAdrian Chadd numTxMaps = sc->sc_tx_nmaps; 3942b200bb4SAdrian Chadd 3952b200bb4SAdrian Chadd /* 3962b200bb4SAdrian Chadd * For EDMA and later chips ensure the TX map is fully populated 3972b200bb4SAdrian Chadd * before advancing to the next descriptor. 3982b200bb4SAdrian Chadd */ 3996e84772fSAdrian Chadd ds = (char *) bf->bf_desc; 4002b200bb4SAdrian Chadd bp = dsp = 0; 4012b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 4022b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 4032b200bb4SAdrian Chadd for (i = 0; i < bf->bf_nseg; i++) { 4042b200bb4SAdrian Chadd bufAddrList[bp] = bf->bf_segs[i].ds_addr; 4052b200bb4SAdrian Chadd segLenList[bp] = bf->bf_segs[i].ds_len; 4062b200bb4SAdrian Chadd bp++; 4072b200bb4SAdrian Chadd 4082b200bb4SAdrian Chadd /* 4092b200bb4SAdrian Chadd * Go to the next segment if this isn't the last segment 4102b200bb4SAdrian Chadd * and there's space in the current TX map. 4112b200bb4SAdrian Chadd */ 4122b200bb4SAdrian Chadd if ((i != bf->bf_nseg - 1) && (bp < numTxMaps)) 4132b200bb4SAdrian Chadd continue; 4142b200bb4SAdrian Chadd 4152b200bb4SAdrian Chadd /* 4162b200bb4SAdrian Chadd * Last segment or we're out of buffer pointers. 4172b200bb4SAdrian Chadd */ 4182b200bb4SAdrian Chadd bp = 0; 41946634305SAdrian Chadd 420b8e788a5SAdrian Chadd if (i == bf->bf_nseg - 1) 42142083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 422b8e788a5SAdrian Chadd else 42342083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 4242b200bb4SAdrian Chadd bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 42546634305SAdrian Chadd 42646634305SAdrian Chadd /* 427fc56c9c5SAdrian Chadd * XXX This assumes that bfs_txq is the actual destination 428fc56c9c5SAdrian Chadd * hardware queue at this point. It may not have been 429fc56c9c5SAdrian Chadd * assigned, it may actually be pointing to the multicast 430fc56c9c5SAdrian Chadd * software TXQ id. These must be fixed! 43146634305SAdrian Chadd */ 43242083b3dSAdrian Chadd ath_hal_filltxdesc(ah, (struct ath_desc *) ds 43346634305SAdrian Chadd , bufAddrList 43446634305SAdrian Chadd , segLenList 4352b200bb4SAdrian Chadd , bf->bf_descid /* XXX desc id */ 436fc56c9c5SAdrian Chadd , bf->bf_state.bfs_tx_queue 437e2137b86SAdrian Chadd , isFirstDesc /* first segment */ 438b8e788a5SAdrian Chadd , i == bf->bf_nseg - 1 /* last segment */ 43942083b3dSAdrian Chadd , (struct ath_desc *) ds0 /* first descriptor */ 440b8e788a5SAdrian Chadd ); 44121840808SAdrian Chadd 4426e84772fSAdrian Chadd /* 4436e84772fSAdrian Chadd * Make sure the 11n aggregate fields are cleared. 4446e84772fSAdrian Chadd * 4456e84772fSAdrian Chadd * XXX TODO: this doesn't need to be called for 4466e84772fSAdrian Chadd * aggregate frames; as it'll be called on all 4476e84772fSAdrian Chadd * sub-frames. Since the descriptors are in 4486e84772fSAdrian Chadd * non-cacheable memory, this leads to some 4496e84772fSAdrian Chadd * rather slow writes on MIPS/ARM platforms. 4506e84772fSAdrian Chadd */ 45121840808SAdrian Chadd if (ath_tx_is_11n(sc)) 4525d9b19f7SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds); 45321840808SAdrian Chadd 4546e84772fSAdrian Chadd /* 4556e84772fSAdrian Chadd * If 11n is enabled, set it up as if it's an aggregate 4566e84772fSAdrian Chadd * frame. 4576e84772fSAdrian Chadd */ 4586e84772fSAdrian Chadd if (is_last_subframe) { 4596e84772fSAdrian Chadd ath_hal_set11n_aggr_last(sc->sc_ah, 4606e84772fSAdrian Chadd (struct ath_desc *) ds); 4616e84772fSAdrian Chadd } else if (is_aggr) { 4626e84772fSAdrian Chadd /* 4636e84772fSAdrian Chadd * This clears the aggrlen field; so 4646e84772fSAdrian Chadd * the caller needs to call set_aggr_first()! 4656e84772fSAdrian Chadd * 4666e84772fSAdrian Chadd * XXX TODO: don't call this for the first 4676e84772fSAdrian Chadd * descriptor in the first frame in an 4686e84772fSAdrian Chadd * aggregate! 4696e84772fSAdrian Chadd */ 4706e84772fSAdrian Chadd ath_hal_set11n_aggr_middle(sc->sc_ah, 4716e84772fSAdrian Chadd (struct ath_desc *) ds, 4726e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 4736e84772fSAdrian Chadd } 474e2137b86SAdrian Chadd isFirstDesc = 0; 47542083b3dSAdrian Chadd bf->bf_lastds = (struct ath_desc *) ds; 4762b200bb4SAdrian Chadd 4772b200bb4SAdrian Chadd /* 4782b200bb4SAdrian Chadd * Don't forget to skip to the next descriptor. 4792b200bb4SAdrian Chadd */ 48042083b3dSAdrian Chadd ds += sc->sc_tx_desclen; 4812b200bb4SAdrian Chadd dsp++; 4822b200bb4SAdrian Chadd 4832b200bb4SAdrian Chadd /* 4842b200bb4SAdrian Chadd * .. and don't forget to blank these out! 4852b200bb4SAdrian Chadd */ 4862b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 4872b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 488b8e788a5SAdrian Chadd } 4894d7f8837SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 49081a82688SAdrian Chadd } 49181a82688SAdrian Chadd 492eb6f0de0SAdrian Chadd /* 493d34a7347SAdrian Chadd * Set the rate control fields in the given descriptor based on 494d34a7347SAdrian Chadd * the bf_state fields and node state. 495d34a7347SAdrian Chadd * 496d34a7347SAdrian Chadd * The bfs fields should already be set with the relevant rate 497d34a7347SAdrian Chadd * control information, including whether MRR is to be enabled. 498d34a7347SAdrian Chadd * 499d34a7347SAdrian Chadd * Since the FreeBSD HAL currently sets up the first TX rate 500d34a7347SAdrian Chadd * in ath_hal_setuptxdesc(), this will setup the MRR 501d34a7347SAdrian Chadd * conditionally for the pre-11n chips, and call ath_buf_set_rate 502d34a7347SAdrian Chadd * unconditionally for 11n chips. These require the 11n rate 503d34a7347SAdrian Chadd * scenario to be set if MCS rates are enabled, so it's easier 504d34a7347SAdrian Chadd * to just always call it. The caller can then only set rates 2, 3 505d34a7347SAdrian Chadd * and 4 if multi-rate retry is needed. 506d34a7347SAdrian Chadd */ 507d34a7347SAdrian Chadd static void 508d34a7347SAdrian Chadd ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni, 509d34a7347SAdrian Chadd struct ath_buf *bf) 510d34a7347SAdrian Chadd { 511d34a7347SAdrian Chadd struct ath_rc_series *rc = bf->bf_state.bfs_rc; 512d34a7347SAdrian Chadd 513d34a7347SAdrian Chadd /* If mrr is disabled, blank tries 1, 2, 3 */ 514d34a7347SAdrian Chadd if (! bf->bf_state.bfs_ismrr) 515d34a7347SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 516d34a7347SAdrian Chadd 517491e1248SAdrian Chadd #if 0 518491e1248SAdrian Chadd /* 519491e1248SAdrian Chadd * If NOACK is set, just set ntries=1. 520491e1248SAdrian Chadd */ 521491e1248SAdrian Chadd else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) { 522491e1248SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 523491e1248SAdrian Chadd rc[0].tries = 1; 524491e1248SAdrian Chadd } 525491e1248SAdrian Chadd #endif 526491e1248SAdrian Chadd 527d34a7347SAdrian Chadd /* 528d34a7347SAdrian Chadd * Always call - that way a retried descriptor will 529d34a7347SAdrian Chadd * have the MRR fields overwritten. 530d34a7347SAdrian Chadd * 531d34a7347SAdrian Chadd * XXX TODO: see if this is really needed - setting up 532d34a7347SAdrian Chadd * the first descriptor should set the MRR fields to 0 533d34a7347SAdrian Chadd * for us anyway. 534d34a7347SAdrian Chadd */ 535d34a7347SAdrian Chadd if (ath_tx_is_11n(sc)) { 536d34a7347SAdrian Chadd ath_buf_set_rate(sc, ni, bf); 537d34a7347SAdrian Chadd } else { 538d34a7347SAdrian Chadd ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc 539d34a7347SAdrian Chadd , rc[1].ratecode, rc[1].tries 540d34a7347SAdrian Chadd , rc[2].ratecode, rc[2].tries 541d34a7347SAdrian Chadd , rc[3].ratecode, rc[3].tries 542d34a7347SAdrian Chadd ); 543d34a7347SAdrian Chadd } 544d34a7347SAdrian Chadd } 545d34a7347SAdrian Chadd 546d34a7347SAdrian Chadd /* 547eb6f0de0SAdrian Chadd * Setup segments+descriptors for an 11n aggregate. 548eb6f0de0SAdrian Chadd * bf_first is the first buffer in the aggregate. 549eb6f0de0SAdrian Chadd * The descriptor list must already been linked together using 550eb6f0de0SAdrian Chadd * bf->bf_next. 551eb6f0de0SAdrian Chadd */ 552eb6f0de0SAdrian Chadd static void 553eb6f0de0SAdrian Chadd ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first) 554eb6f0de0SAdrian Chadd { 555eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_prev = NULL; 5566e84772fSAdrian Chadd struct ath_desc *ds0 = bf_first->bf_desc; 557eb6f0de0SAdrian Chadd 558eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n", 559eb6f0de0SAdrian Chadd __func__, bf_first->bf_state.bfs_nframes, 560eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_al); 561eb6f0de0SAdrian Chadd 5627d9dd2acSAdrian Chadd bf = bf_first; 5637d9dd2acSAdrian Chadd 5647d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 56583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n", 5667d9dd2acSAdrian Chadd __func__, bf, 0); 5677d9dd2acSAdrian Chadd if (bf->bf_state.bfs_rc[0].ratecode == 0) 56883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n", 5697d9dd2acSAdrian Chadd __func__, bf, 0); 5707d9dd2acSAdrian Chadd 571eb6f0de0SAdrian Chadd /* 5726e84772fSAdrian Chadd * Setup all descriptors of all subframes - this will 5736e84772fSAdrian Chadd * call ath_hal_set11naggrmiddle() on every frame. 574eb6f0de0SAdrian Chadd */ 575eb6f0de0SAdrian Chadd while (bf != NULL) { 576eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 577eb6f0de0SAdrian Chadd "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n", 578eb6f0de0SAdrian Chadd __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen, 579eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 580eb6f0de0SAdrian Chadd 5816e84772fSAdrian Chadd /* 5826e84772fSAdrian Chadd * Setup the initial fields for the first descriptor - all 5836e84772fSAdrian Chadd * the non-11n specific stuff. 5846e84772fSAdrian Chadd */ 5856e84772fSAdrian Chadd ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc 5866e84772fSAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 5876e84772fSAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 5886e84772fSAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 5896e84772fSAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 5906e84772fSAdrian Chadd , bf->bf_state.bfs_txrate0 5916e84772fSAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 5926e84772fSAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 5936e84772fSAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 5946e84772fSAdrian Chadd , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */ 5956e84772fSAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 5966e84772fSAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 5976e84772fSAdrian Chadd ); 5986e84772fSAdrian Chadd 5996e84772fSAdrian Chadd /* 6006e84772fSAdrian Chadd * First descriptor? Setup the rate control and initial 6016e84772fSAdrian Chadd * aggregate header information. 6026e84772fSAdrian Chadd */ 6036e84772fSAdrian Chadd if (bf == bf_first) { 6046e84772fSAdrian Chadd /* 6056e84772fSAdrian Chadd * setup first desc with rate and aggr info 6066e84772fSAdrian Chadd */ 6076e84772fSAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 6086e84772fSAdrian Chadd } 6096e84772fSAdrian Chadd 6106e84772fSAdrian Chadd /* 6116e84772fSAdrian Chadd * Setup the descriptors for a multi-descriptor frame. 6126e84772fSAdrian Chadd * This is both aggregate and non-aggregate aware. 6136e84772fSAdrian Chadd */ 6146e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds0, bf, 6156e84772fSAdrian Chadd 1, /* is_aggr */ 6166e84772fSAdrian Chadd !! (bf == bf_first), /* is_first_subframe */ 6176e84772fSAdrian Chadd !! (bf->bf_next == NULL) /* is_last_subframe */ 6186e84772fSAdrian Chadd ); 6196e84772fSAdrian Chadd 6206e84772fSAdrian Chadd if (bf == bf_first) { 6216e84772fSAdrian Chadd /* 6226e84772fSAdrian Chadd * Initialise the first 11n aggregate with the 6236e84772fSAdrian Chadd * aggregate length and aggregate enable bits. 6246e84772fSAdrian Chadd */ 6256e84772fSAdrian Chadd ath_hal_set11n_aggr_first(sc->sc_ah, 6266e84772fSAdrian Chadd ds0, 6276e84772fSAdrian Chadd bf->bf_state.bfs_al, 6286e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 6296e84772fSAdrian Chadd } 630eb6f0de0SAdrian Chadd 631eb6f0de0SAdrian Chadd /* 632eb6f0de0SAdrian Chadd * Link the last descriptor of the previous frame 633eb6f0de0SAdrian Chadd * to the beginning descriptor of this frame. 634eb6f0de0SAdrian Chadd */ 635eb6f0de0SAdrian Chadd if (bf_prev != NULL) 636bb069955SAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds, 637bb069955SAdrian Chadd bf->bf_daddr); 638eb6f0de0SAdrian Chadd 639eb6f0de0SAdrian Chadd /* Save a copy so we can link the next descriptor in */ 640eb6f0de0SAdrian Chadd bf_prev = bf; 641eb6f0de0SAdrian Chadd bf = bf->bf_next; 642eb6f0de0SAdrian Chadd } 643eb6f0de0SAdrian Chadd 644eb6f0de0SAdrian Chadd /* 645eb6f0de0SAdrian Chadd * Set the first descriptor bf_lastds field to point to 646eb6f0de0SAdrian Chadd * the last descriptor in the last subframe, that's where 647eb6f0de0SAdrian Chadd * the status update will occur. 648eb6f0de0SAdrian Chadd */ 649eb6f0de0SAdrian Chadd bf_first->bf_lastds = bf_prev->bf_lastds; 650eb6f0de0SAdrian Chadd 651eb6f0de0SAdrian Chadd /* 652eb6f0de0SAdrian Chadd * And bf_last in the first descriptor points to the end of 653eb6f0de0SAdrian Chadd * the aggregate list. 654eb6f0de0SAdrian Chadd */ 655eb6f0de0SAdrian Chadd bf_first->bf_last = bf_prev; 656eb6f0de0SAdrian Chadd 657bbdf3df1SAdrian Chadd /* 658bbdf3df1SAdrian Chadd * For non-AR9300 NICs, which require the rate control 659bbdf3df1SAdrian Chadd * in the final descriptor - let's set that up now. 660bbdf3df1SAdrian Chadd * 661bbdf3df1SAdrian Chadd * This is because the filltxdesc() HAL call doesn't 662bbdf3df1SAdrian Chadd * populate the last segment with rate control information 663bbdf3df1SAdrian Chadd * if firstSeg is also true. For non-aggregate frames 664bbdf3df1SAdrian Chadd * that is fine, as the first frame already has rate control 665bbdf3df1SAdrian Chadd * info. But if the last frame in an aggregate has one 666bbdf3df1SAdrian Chadd * descriptor, both firstseg and lastseg will be true and 667bbdf3df1SAdrian Chadd * the rate info isn't copied. 668bbdf3df1SAdrian Chadd * 669bbdf3df1SAdrian Chadd * This is inefficient on MIPS/ARM platforms that have 670bbdf3df1SAdrian Chadd * non-cachable memory for TX descriptors, but we'll just 671bbdf3df1SAdrian Chadd * make do for now. 672bbdf3df1SAdrian Chadd * 673bbdf3df1SAdrian Chadd * As to why the rate table is stashed in the last descriptor 674bbdf3df1SAdrian Chadd * rather than the first descriptor? Because proctxdesc() 675bbdf3df1SAdrian Chadd * is called on the final descriptor in an MPDU or A-MPDU - 676bbdf3df1SAdrian Chadd * ie, the one that gets updated by the hardware upon 677bbdf3df1SAdrian Chadd * completion. That way proctxdesc() doesn't need to know 678bbdf3df1SAdrian Chadd * about the first _and_ last TX descriptor. 679bbdf3df1SAdrian Chadd */ 680bbdf3df1SAdrian Chadd ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0); 681bbdf3df1SAdrian Chadd 682eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__); 683eb6f0de0SAdrian Chadd } 684eb6f0de0SAdrian Chadd 68546634305SAdrian Chadd /* 68646634305SAdrian Chadd * Hand-off a frame to the multicast TX queue. 68746634305SAdrian Chadd * 68846634305SAdrian Chadd * This is a software TXQ which will be appended to the CAB queue 68946634305SAdrian Chadd * during the beacon setup code. 69046634305SAdrian Chadd * 69146634305SAdrian Chadd * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID 692fc56c9c5SAdrian Chadd * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated 69346634305SAdrian Chadd * with the actual hardware txq, or all of this will fall apart. 69446634305SAdrian Chadd * 69546634305SAdrian Chadd * XXX It may not be a bad idea to just stuff the QCU ID into bf_state 696fc56c9c5SAdrian Chadd * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated 69746634305SAdrian Chadd * correctly. 69846634305SAdrian Chadd */ 699eb6f0de0SAdrian Chadd static void 700eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 701eb6f0de0SAdrian Chadd struct ath_buf *bf) 702eb6f0de0SAdrian Chadd { 703375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 704375307d4SAdrian Chadd 705eb6f0de0SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 706eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 70756a85978SAdrian Chadd 70897c9a8e8SAdrian Chadd /* 70997c9a8e8SAdrian Chadd * Ensure that the tx queue is the cabq, so things get 71097c9a8e8SAdrian Chadd * mapped correctly. 71197c9a8e8SAdrian Chadd */ 71297c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) { 71383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 71497c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 71583bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue, 71697c9a8e8SAdrian Chadd txq->axq_qnum); 71797c9a8e8SAdrian Chadd } 71897c9a8e8SAdrian Chadd 71956a85978SAdrian Chadd ATH_TXQ_LOCK(txq); 7200891354cSAdrian Chadd if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) { 7210891354cSAdrian Chadd struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s); 722eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 723eb6f0de0SAdrian Chadd 724eb6f0de0SAdrian Chadd /* mark previous frame */ 7250891354cSAdrian Chadd wh = mtod(bf_last->bf_m, struct ieee80211_frame *); 726eb6f0de0SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 7270891354cSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap, 728eb6f0de0SAdrian Chadd BUS_DMASYNC_PREWRITE); 729eb6f0de0SAdrian Chadd 730eb6f0de0SAdrian Chadd /* link descriptor */ 7310891354cSAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, 7320891354cSAdrian Chadd bf_last->bf_lastds, 7330891354cSAdrian Chadd bf->bf_daddr); 734eb6f0de0SAdrian Chadd } 735eb6f0de0SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 736b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 737eb6f0de0SAdrian Chadd } 738eb6f0de0SAdrian Chadd 739eb6f0de0SAdrian Chadd /* 740eb6f0de0SAdrian Chadd * Hand-off packet to a hardware queue. 741eb6f0de0SAdrian Chadd */ 742eb6f0de0SAdrian Chadd static void 743d4365d16SAdrian Chadd ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 744d4365d16SAdrian Chadd struct ath_buf *bf) 745eb6f0de0SAdrian Chadd { 746eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 7479be82a42SAdrian Chadd struct ath_buf *bf_first; 74881a82688SAdrian Chadd 749b8e788a5SAdrian Chadd /* 750b8e788a5SAdrian Chadd * Insert the frame on the outbound list and pass it on 751b8e788a5SAdrian Chadd * to the hardware. Multicast frames buffered for power 752b8e788a5SAdrian Chadd * save stations and transmit from the CAB queue are stored 753b8e788a5SAdrian Chadd * on a s/w only queue and loaded on to the CAB queue in 754b8e788a5SAdrian Chadd * the SWBA handler since frames only go out on DTIM and 755b8e788a5SAdrian Chadd * to avoid possible races. 756b8e788a5SAdrian Chadd */ 757375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 758b8e788a5SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 759eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 760eb6f0de0SAdrian Chadd KASSERT(txq->axq_qnum != ATH_TXQ_SWQ, 761eb6f0de0SAdrian Chadd ("ath_tx_handoff_hw called for mcast queue")); 762eb6f0de0SAdrian Chadd 7639be82a42SAdrian Chadd /* 764*f5c30c4eSAdrian Chadd * XXX We should instead just verify that sc_txstart_cnt 765*f5c30c4eSAdrian Chadd * or ath_txproc_cnt > 0. That would mean that 766*f5c30c4eSAdrian Chadd * the reset is going to be waiting for us to complete. 7679be82a42SAdrian Chadd */ 768*f5c30c4eSAdrian Chadd if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) { 769*f5c30c4eSAdrian Chadd device_printf(sc->sc_dev, 770*f5c30c4eSAdrian Chadd "%s: TX dispatch without holding txcount/txstart refcnt!\n", 771ef27340cSAdrian Chadd __func__); 772ef27340cSAdrian Chadd } 773*f5c30c4eSAdrian Chadd 774*f5c30c4eSAdrian Chadd /* 775*f5c30c4eSAdrian Chadd * XXX .. this is going to cause the hardware to get upset; 776*f5c30c4eSAdrian Chadd * so we really should find some way to drop or queue 777*f5c30c4eSAdrian Chadd * things. 778*f5c30c4eSAdrian Chadd */ 779ef27340cSAdrian Chadd 780b837332dSAdrian Chadd ATH_TXQ_LOCK(txq); 781b8e788a5SAdrian Chadd 782b8e788a5SAdrian Chadd /* 7839be82a42SAdrian Chadd * XXX TODO: if there's a holdingbf, then 7849be82a42SAdrian Chadd * ATH_TXQ_PUTRUNNING should be clear. 7859be82a42SAdrian Chadd * 7869be82a42SAdrian Chadd * If there is a holdingbf and the list is empty, 7879be82a42SAdrian Chadd * then axq_link should be pointing to the holdingbf. 7889be82a42SAdrian Chadd * 7899be82a42SAdrian Chadd * Otherwise it should point to the last descriptor 7909be82a42SAdrian Chadd * in the last ath_buf. 7919be82a42SAdrian Chadd * 7929be82a42SAdrian Chadd * In any case, we should really ensure that we 7939be82a42SAdrian Chadd * update the previous descriptor link pointer to 7949be82a42SAdrian Chadd * this descriptor, regardless of all of the above state. 7959be82a42SAdrian Chadd * 7969be82a42SAdrian Chadd * For now this is captured by having axq_link point 7979be82a42SAdrian Chadd * to either the holdingbf (if the TXQ list is empty) 7989be82a42SAdrian Chadd * or the end of the list (if the TXQ list isn't empty.) 7999be82a42SAdrian Chadd * I'd rather just kill axq_link here and do it as above. 800b8e788a5SAdrian Chadd */ 80103682514SAdrian Chadd 802b8e788a5SAdrian Chadd /* 8039be82a42SAdrian Chadd * Append the frame to the TX queue. 804b8e788a5SAdrian Chadd */ 805b8e788a5SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 806b1dddc28SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, 807b1dddc28SAdrian Chadd "ath_tx_handoff: non-tdma: txq=%u, add bf=%p " 80803682514SAdrian Chadd "depth=%d", 80903682514SAdrian Chadd txq->axq_qnum, 81003682514SAdrian Chadd bf, 81103682514SAdrian Chadd txq->axq_depth); 81203682514SAdrian Chadd 8139be82a42SAdrian Chadd /* 8149be82a42SAdrian Chadd * If there's a link pointer, update it. 8159be82a42SAdrian Chadd * 8169be82a42SAdrian Chadd * XXX we should replace this with the above logic, just 8179be82a42SAdrian Chadd * to kill axq_link with fire. 8189be82a42SAdrian Chadd */ 8199be82a42SAdrian Chadd if (txq->axq_link != NULL) { 820b8e788a5SAdrian Chadd *txq->axq_link = bf->bf_daddr; 821b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 822b8e788a5SAdrian Chadd "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 823b8e788a5SAdrian Chadd txq->axq_qnum, txq->axq_link, 824d4365d16SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 825d4365d16SAdrian Chadd txq->axq_depth); 82603682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 82703682514SAdrian Chadd "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) " 82803682514SAdrian Chadd "lastds=%d", 82903682514SAdrian Chadd txq->axq_qnum, txq->axq_link, 83003682514SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 83103682514SAdrian Chadd bf->bf_lastds); 832b8e788a5SAdrian Chadd } 83397c9a8e8SAdrian Chadd 8349be82a42SAdrian Chadd /* 8359be82a42SAdrian Chadd * If we've not pushed anything into the hardware yet, 8369be82a42SAdrian Chadd * push the head of the queue into the TxDP. 8379be82a42SAdrian Chadd * 8389be82a42SAdrian Chadd * Once we've started DMA, there's no guarantee that 8399be82a42SAdrian Chadd * updating the TxDP with a new value will actually work. 8409be82a42SAdrian Chadd * So we just don't do that - if we hit the end of the list, 8419be82a42SAdrian Chadd * we keep that buffer around (the "holding buffer") and 8429be82a42SAdrian Chadd * re-start DMA by updating the link pointer of _that_ 8439be82a42SAdrian Chadd * descriptor and then restart DMA. 8449be82a42SAdrian Chadd */ 8459be82a42SAdrian Chadd if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) { 8469be82a42SAdrian Chadd bf_first = TAILQ_FIRST(&txq->axq_q); 8479be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING; 8489be82a42SAdrian Chadd ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr); 8499be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 8509be82a42SAdrian Chadd "%s: TXDP[%u] = %p (%p) depth %d\n", 8519be82a42SAdrian Chadd __func__, txq->axq_qnum, 8529be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 8539be82a42SAdrian Chadd txq->axq_depth); 8549be82a42SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 8559be82a42SAdrian Chadd "ath_tx_handoff: TXDP[%u] = %p (%p) " 8569be82a42SAdrian Chadd "lastds=%p depth %d", 8579be82a42SAdrian Chadd txq->axq_qnum, 8589be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 8599be82a42SAdrian Chadd bf_first->bf_lastds, 8609be82a42SAdrian Chadd txq->axq_depth); 8619be82a42SAdrian Chadd } 8629be82a42SAdrian Chadd 8639be82a42SAdrian Chadd /* 8649be82a42SAdrian Chadd * Ensure that the bf TXQ matches this TXQ, so later 8659be82a42SAdrian Chadd * checking and holding buffer manipulation is sane. 8669be82a42SAdrian Chadd */ 86797c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) { 86883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 86997c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 87083bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue, 87197c9a8e8SAdrian Chadd txq->axq_qnum); 87297c9a8e8SAdrian Chadd } 87397c9a8e8SAdrian Chadd 8749be82a42SAdrian Chadd /* 8759be82a42SAdrian Chadd * Track aggregate queue depth. 8769be82a42SAdrian Chadd */ 8776edf1dc7SAdrian Chadd if (bf->bf_state.bfs_aggr) 8786edf1dc7SAdrian Chadd txq->axq_aggr_depth++; 8799be82a42SAdrian Chadd 8809be82a42SAdrian Chadd /* 8819be82a42SAdrian Chadd * Update the link pointer. 8829be82a42SAdrian Chadd */ 883bb069955SAdrian Chadd ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); 8849be82a42SAdrian Chadd 8859be82a42SAdrian Chadd /* 8869be82a42SAdrian Chadd * Start DMA. 8879be82a42SAdrian Chadd * 8889be82a42SAdrian Chadd * If we wrote a TxDP above, DMA will start from here. 8899be82a42SAdrian Chadd * 8909be82a42SAdrian Chadd * If DMA is running, it'll do nothing. 8919be82a42SAdrian Chadd * 8929be82a42SAdrian Chadd * If the DMA engine hit the end of the QCU list (ie LINK=NULL, 8939be82a42SAdrian Chadd * or VEOL) then it stops at the last transmitted write. 8949be82a42SAdrian Chadd * We then append a new frame by updating the link pointer 8959be82a42SAdrian Chadd * in that descriptor and then kick TxE here; it will re-read 8969be82a42SAdrian Chadd * that last descriptor and find the new descriptor to transmit. 8979be82a42SAdrian Chadd * 8989be82a42SAdrian Chadd * This is why we keep the holding descriptor around. 8999be82a42SAdrian Chadd */ 900b8e788a5SAdrian Chadd ath_hal_txstart(ah, txq->axq_qnum); 901b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 90203682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 1, 90303682514SAdrian Chadd "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum); 904b8e788a5SAdrian Chadd } 905eb6f0de0SAdrian Chadd 906eb6f0de0SAdrian Chadd /* 907eb6f0de0SAdrian Chadd * Restart TX DMA for the given TXQ. 908eb6f0de0SAdrian Chadd * 909eb6f0de0SAdrian Chadd * This must be called whether the queue is empty or not. 910eb6f0de0SAdrian Chadd */ 911746bab5bSAdrian Chadd static void 912746bab5bSAdrian Chadd ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq) 913eb6f0de0SAdrian Chadd { 914b1f3262cSAdrian Chadd struct ath_buf *bf, *bf_last; 915eb6f0de0SAdrian Chadd 916b837332dSAdrian Chadd ATH_TXQ_LOCK_ASSERT(txq); 917eb6f0de0SAdrian Chadd 918b1f3262cSAdrian Chadd /* XXX make this ATH_TXQ_FIRST */ 919eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&txq->axq_q); 920b1f3262cSAdrian Chadd bf_last = ATH_TXQ_LAST(txq, axq_q_s); 921b1f3262cSAdrian Chadd 922eb6f0de0SAdrian Chadd if (bf == NULL) 923eb6f0de0SAdrian Chadd return; 924eb6f0de0SAdrian Chadd 9259be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_RESET, 9269be82a42SAdrian Chadd "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n", 9279be82a42SAdrian Chadd __func__, 9289be82a42SAdrian Chadd txq->axq_qnum, 9299be82a42SAdrian Chadd bf, 9309be82a42SAdrian Chadd bf_last, 9319be82a42SAdrian Chadd (uint32_t) bf->bf_daddr); 9329be82a42SAdrian Chadd 9336112d22cSAdrian Chadd #ifdef ATH_DEBUG 9349be82a42SAdrian Chadd if (sc->sc_debug & ATH_DEBUG_RESET) 9359be82a42SAdrian Chadd ath_tx_dump(sc, txq); 9366112d22cSAdrian Chadd #endif 9379be82a42SAdrian Chadd 9389be82a42SAdrian Chadd /* 9399be82a42SAdrian Chadd * This is called from a restart, so DMA is known to be 9409be82a42SAdrian Chadd * completely stopped. 9419be82a42SAdrian Chadd */ 9429be82a42SAdrian Chadd KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)), 9439be82a42SAdrian Chadd ("%s: Q%d: called with PUTRUNNING=1\n", 9449be82a42SAdrian Chadd __func__, 9459be82a42SAdrian Chadd txq->axq_qnum)); 9469be82a42SAdrian Chadd 9479be82a42SAdrian Chadd ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr); 9489be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING; 9499be82a42SAdrian Chadd 9506112d22cSAdrian Chadd ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds, 9516112d22cSAdrian Chadd &txq->axq_link); 9526112d22cSAdrian Chadd ath_hal_txstart(sc->sc_ah, txq->axq_qnum); 953eb6f0de0SAdrian Chadd } 954eb6f0de0SAdrian Chadd 955eb6f0de0SAdrian Chadd /* 956eb6f0de0SAdrian Chadd * Hand off a packet to the hardware (or mcast queue.) 957eb6f0de0SAdrian Chadd * 958eb6f0de0SAdrian Chadd * The relevant hardware txq should be locked. 959eb6f0de0SAdrian Chadd */ 960eb6f0de0SAdrian Chadd static void 961746bab5bSAdrian Chadd ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq, 962746bab5bSAdrian Chadd struct ath_buf *bf) 963eb6f0de0SAdrian Chadd { 964375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 965eb6f0de0SAdrian Chadd 966bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 967bb327d28SAdrian Chadd if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC)) 968bb327d28SAdrian Chadd ath_tx_alq_post(sc, bf); 969bb327d28SAdrian Chadd #endif 970bb327d28SAdrian Chadd 971eb6f0de0SAdrian Chadd if (txq->axq_qnum == ATH_TXQ_SWQ) 972eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(sc, txq, bf); 973eb6f0de0SAdrian Chadd else 974eb6f0de0SAdrian Chadd ath_tx_handoff_hw(sc, txq, bf); 975b8e788a5SAdrian Chadd } 976b8e788a5SAdrian Chadd 97781a82688SAdrian Chadd static int 97881a82688SAdrian Chadd ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni, 979d4365d16SAdrian Chadd struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen, 980d4365d16SAdrian Chadd int *keyix) 98181a82688SAdrian Chadd { 98212be5b9cSAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 98312be5b9cSAdrian Chadd "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n", 98412be5b9cSAdrian Chadd __func__, 98512be5b9cSAdrian Chadd *hdrlen, 98612be5b9cSAdrian Chadd *pktlen, 98712be5b9cSAdrian Chadd isfrag, 98812be5b9cSAdrian Chadd iswep, 98912be5b9cSAdrian Chadd m0); 99012be5b9cSAdrian Chadd 99181a82688SAdrian Chadd if (iswep) { 99281a82688SAdrian Chadd const struct ieee80211_cipher *cip; 99381a82688SAdrian Chadd struct ieee80211_key *k; 99481a82688SAdrian Chadd 99581a82688SAdrian Chadd /* 99681a82688SAdrian Chadd * Construct the 802.11 header+trailer for an encrypted 99781a82688SAdrian Chadd * frame. The only reason this can fail is because of an 99881a82688SAdrian Chadd * unknown or unsupported cipher/key type. 99981a82688SAdrian Chadd */ 100081a82688SAdrian Chadd k = ieee80211_crypto_encap(ni, m0); 100181a82688SAdrian Chadd if (k == NULL) { 100281a82688SAdrian Chadd /* 100381a82688SAdrian Chadd * This can happen when the key is yanked after the 100481a82688SAdrian Chadd * frame was queued. Just discard the frame; the 100581a82688SAdrian Chadd * 802.11 layer counts failures and provides 100681a82688SAdrian Chadd * debugging/diagnostics. 100781a82688SAdrian Chadd */ 1008d4365d16SAdrian Chadd return (0); 100981a82688SAdrian Chadd } 101081a82688SAdrian Chadd /* 101181a82688SAdrian Chadd * Adjust the packet + header lengths for the crypto 101281a82688SAdrian Chadd * additions and calculate the h/w key index. When 101381a82688SAdrian Chadd * a s/w mic is done the frame will have had any mic 101481a82688SAdrian Chadd * added to it prior to entry so m0->m_pkthdr.len will 101581a82688SAdrian Chadd * account for it. Otherwise we need to add it to the 101681a82688SAdrian Chadd * packet length. 101781a82688SAdrian Chadd */ 101881a82688SAdrian Chadd cip = k->wk_cipher; 101981a82688SAdrian Chadd (*hdrlen) += cip->ic_header; 102081a82688SAdrian Chadd (*pktlen) += cip->ic_header + cip->ic_trailer; 102181a82688SAdrian Chadd /* NB: frags always have any TKIP MIC done in s/w */ 102281a82688SAdrian Chadd if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag) 102381a82688SAdrian Chadd (*pktlen) += cip->ic_miclen; 102481a82688SAdrian Chadd (*keyix) = k->wk_keyix; 102581a82688SAdrian Chadd } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) { 102681a82688SAdrian Chadd /* 102781a82688SAdrian Chadd * Use station key cache slot, if assigned. 102881a82688SAdrian Chadd */ 102981a82688SAdrian Chadd (*keyix) = ni->ni_ucastkey.wk_keyix; 103081a82688SAdrian Chadd if ((*keyix) == IEEE80211_KEYIX_NONE) 103181a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 103281a82688SAdrian Chadd } else 103381a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 103481a82688SAdrian Chadd 1035d4365d16SAdrian Chadd return (1); 103681a82688SAdrian Chadd } 103781a82688SAdrian Chadd 1038e2e4a2c2SAdrian Chadd /* 1039e2e4a2c2SAdrian Chadd * Calculate whether interoperability protection is required for 1040e2e4a2c2SAdrian Chadd * this frame. 1041e2e4a2c2SAdrian Chadd * 1042e2e4a2c2SAdrian Chadd * This requires the rate control information be filled in, 1043e2e4a2c2SAdrian Chadd * as the protection requirement depends upon the current 1044e2e4a2c2SAdrian Chadd * operating mode / PHY. 1045e2e4a2c2SAdrian Chadd */ 1046e2e4a2c2SAdrian Chadd static void 1047e2e4a2c2SAdrian Chadd ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf) 1048e2e4a2c2SAdrian Chadd { 1049e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1050e2e4a2c2SAdrian Chadd uint8_t rix; 1051e2e4a2c2SAdrian Chadd uint16_t flags; 1052e2e4a2c2SAdrian Chadd int shortPreamble; 1053e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1054e2e4a2c2SAdrian Chadd struct ifnet *ifp = sc->sc_ifp; 1055e2e4a2c2SAdrian Chadd struct ieee80211com *ic = ifp->if_l2com; 1056e2e4a2c2SAdrian Chadd 1057e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1058e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1059e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1060e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1061e2e4a2c2SAdrian Chadd 1062e2e4a2c2SAdrian Chadd /* 1063e2e4a2c2SAdrian Chadd * If 802.11g protection is enabled, determine whether 1064e2e4a2c2SAdrian Chadd * to use RTS/CTS or just CTS. Note that this is only 1065e2e4a2c2SAdrian Chadd * done for OFDM unicast frames. 1066e2e4a2c2SAdrian Chadd */ 1067e2e4a2c2SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1068e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_OFDM && 1069e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1070e2e4a2c2SAdrian Chadd bf->bf_state.bfs_doprot = 1; 1071e2e4a2c2SAdrian Chadd /* XXX fragments must use CCK rates w/ protection */ 1072e2e4a2c2SAdrian Chadd if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1073e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1074e2e4a2c2SAdrian Chadd } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1075e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 1076e2e4a2c2SAdrian Chadd } 1077e2e4a2c2SAdrian Chadd /* 1078e2e4a2c2SAdrian Chadd * For frags it would be desirable to use the 1079e2e4a2c2SAdrian Chadd * highest CCK rate for RTS/CTS. But stations 1080e2e4a2c2SAdrian Chadd * farther away may detect it at a lower CCK rate 1081e2e4a2c2SAdrian Chadd * so use the configured protection rate instead 1082e2e4a2c2SAdrian Chadd * (for now). 1083e2e4a2c2SAdrian Chadd */ 1084e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_protect++; 1085e2e4a2c2SAdrian Chadd } 1086e2e4a2c2SAdrian Chadd 1087e2e4a2c2SAdrian Chadd /* 1088e2e4a2c2SAdrian Chadd * If 11n protection is enabled and it's a HT frame, 1089e2e4a2c2SAdrian Chadd * enable RTS. 1090e2e4a2c2SAdrian Chadd * 1091e2e4a2c2SAdrian Chadd * XXX ic_htprotmode or ic_curhtprotmode? 1092e2e4a2c2SAdrian Chadd * XXX should it_htprotmode only matter if ic_curhtprotmode 1093e2e4a2c2SAdrian Chadd * XXX indicates it's not a HT pure environment? 1094e2e4a2c2SAdrian Chadd */ 1095e2e4a2c2SAdrian Chadd if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) && 1096e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_HT && 1097e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1098e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1099e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_htprotect++; 1100e2e4a2c2SAdrian Chadd } 1101e2e4a2c2SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1102e2e4a2c2SAdrian Chadd } 1103e2e4a2c2SAdrian Chadd 1104e2e4a2c2SAdrian Chadd /* 1105e2e4a2c2SAdrian Chadd * Update the frame duration given the currently selected rate. 1106e2e4a2c2SAdrian Chadd * 1107e2e4a2c2SAdrian Chadd * This also updates the frame duration value, so it will require 1108e2e4a2c2SAdrian Chadd * a DMA flush. 1109e2e4a2c2SAdrian Chadd */ 1110e2e4a2c2SAdrian Chadd static void 1111e2e4a2c2SAdrian Chadd ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf) 1112e2e4a2c2SAdrian Chadd { 1113e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1114e2e4a2c2SAdrian Chadd uint8_t rix; 1115e2e4a2c2SAdrian Chadd uint16_t flags; 1116e2e4a2c2SAdrian Chadd int shortPreamble; 1117e2e4a2c2SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1118e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1119e2e4a2c2SAdrian Chadd int isfrag = bf->bf_m->m_flags & M_FRAG; 1120e2e4a2c2SAdrian Chadd 1121e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1122e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1123e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1124e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1125e2e4a2c2SAdrian Chadd 1126e2e4a2c2SAdrian Chadd /* 1127e2e4a2c2SAdrian Chadd * Calculate duration. This logically belongs in the 802.11 1128e2e4a2c2SAdrian Chadd * layer but it lacks sufficient information to calculate it. 1129e2e4a2c2SAdrian Chadd */ 1130e2e4a2c2SAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0 && 1131e2e4a2c2SAdrian Chadd (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 1132e2e4a2c2SAdrian Chadd u_int16_t dur; 1133e2e4a2c2SAdrian Chadd if (shortPreamble) 1134e2e4a2c2SAdrian Chadd dur = rt->info[rix].spAckDuration; 1135e2e4a2c2SAdrian Chadd else 1136e2e4a2c2SAdrian Chadd dur = rt->info[rix].lpAckDuration; 1137e2e4a2c2SAdrian Chadd if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) { 1138e2e4a2c2SAdrian Chadd dur += dur; /* additional SIFS+ACK */ 1139e2e4a2c2SAdrian Chadd /* 1140e2e4a2c2SAdrian Chadd * Include the size of next fragment so NAV is 1141e2e4a2c2SAdrian Chadd * updated properly. The last fragment uses only 1142e2e4a2c2SAdrian Chadd * the ACK duration 11439572684aSAdrian Chadd * 11449572684aSAdrian Chadd * XXX TODO: ensure that the rate lookup for each 11459572684aSAdrian Chadd * fragment is the same as the rate used by the 11469572684aSAdrian Chadd * first fragment! 1147e2e4a2c2SAdrian Chadd */ 1148cd7dffd0SAdrian Chadd dur += ath_hal_computetxtime(ah, 1149cd7dffd0SAdrian Chadd rt, 1150cd7dffd0SAdrian Chadd bf->bf_nextfraglen, 1151e2e4a2c2SAdrian Chadd rix, shortPreamble); 1152e2e4a2c2SAdrian Chadd } 1153e2e4a2c2SAdrian Chadd if (isfrag) { 1154e2e4a2c2SAdrian Chadd /* 1155e2e4a2c2SAdrian Chadd * Force hardware to use computed duration for next 1156e2e4a2c2SAdrian Chadd * fragment by disabling multi-rate retry which updates 1157e2e4a2c2SAdrian Chadd * duration based on the multi-rate duration table. 1158e2e4a2c2SAdrian Chadd */ 1159e2e4a2c2SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1160e2e4a2c2SAdrian Chadd bf->bf_state.bfs_try0 = ATH_TXMGTTRY; 1161e2e4a2c2SAdrian Chadd /* XXX update bfs_rc[0].try? */ 1162e2e4a2c2SAdrian Chadd } 1163e2e4a2c2SAdrian Chadd 1164e2e4a2c2SAdrian Chadd /* Update the duration field itself */ 1165e2e4a2c2SAdrian Chadd *(u_int16_t *)wh->i_dur = htole16(dur); 1166e2e4a2c2SAdrian Chadd } 1167e2e4a2c2SAdrian Chadd } 1168e2e4a2c2SAdrian Chadd 1169e42b5dbaSAdrian Chadd static uint8_t 1170e42b5dbaSAdrian Chadd ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt, 1171eb6f0de0SAdrian Chadd int cix, int shortPreamble) 117279f02dbfSAdrian Chadd { 1173e42b5dbaSAdrian Chadd uint8_t ctsrate; 1174e42b5dbaSAdrian Chadd 117579f02dbfSAdrian Chadd /* 117679f02dbfSAdrian Chadd * CTS transmit rate is derived from the transmit rate 117779f02dbfSAdrian Chadd * by looking in the h/w rate table. We must also factor 117879f02dbfSAdrian Chadd * in whether or not a short preamble is to be used. 117979f02dbfSAdrian Chadd */ 118079f02dbfSAdrian Chadd /* NB: cix is set above where RTS/CTS is enabled */ 118179f02dbfSAdrian Chadd KASSERT(cix != 0xff, ("cix not setup")); 1182e42b5dbaSAdrian Chadd ctsrate = rt->info[cix].rateCode; 1183e42b5dbaSAdrian Chadd 1184e42b5dbaSAdrian Chadd /* XXX this should only matter for legacy rates */ 1185e42b5dbaSAdrian Chadd if (shortPreamble) 1186e42b5dbaSAdrian Chadd ctsrate |= rt->info[cix].shortPreamble; 1187e42b5dbaSAdrian Chadd 1188d4365d16SAdrian Chadd return (ctsrate); 1189e42b5dbaSAdrian Chadd } 1190e42b5dbaSAdrian Chadd 1191e42b5dbaSAdrian Chadd /* 1192e42b5dbaSAdrian Chadd * Calculate the RTS/CTS duration for legacy frames. 1193e42b5dbaSAdrian Chadd */ 1194e42b5dbaSAdrian Chadd static int 1195e42b5dbaSAdrian Chadd ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix, 1196e42b5dbaSAdrian Chadd int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt, 1197e42b5dbaSAdrian Chadd int flags) 1198e42b5dbaSAdrian Chadd { 1199e42b5dbaSAdrian Chadd int ctsduration = 0; 1200e42b5dbaSAdrian Chadd 1201e42b5dbaSAdrian Chadd /* This mustn't be called for HT modes */ 1202e42b5dbaSAdrian Chadd if (rt->info[cix].phy == IEEE80211_T_HT) { 1203e42b5dbaSAdrian Chadd printf("%s: HT rate where it shouldn't be (0x%x)\n", 1204e42b5dbaSAdrian Chadd __func__, rt->info[cix].rateCode); 1205d4365d16SAdrian Chadd return (-1); 1206e42b5dbaSAdrian Chadd } 1207e42b5dbaSAdrian Chadd 120879f02dbfSAdrian Chadd /* 120979f02dbfSAdrian Chadd * Compute the transmit duration based on the frame 121079f02dbfSAdrian Chadd * size and the size of an ACK frame. We call into the 121179f02dbfSAdrian Chadd * HAL to do the computation since it depends on the 121279f02dbfSAdrian Chadd * characteristics of the actual PHY being used. 121379f02dbfSAdrian Chadd * 121479f02dbfSAdrian Chadd * NB: CTS is assumed the same size as an ACK so we can 121579f02dbfSAdrian Chadd * use the precalculated ACK durations. 121679f02dbfSAdrian Chadd */ 121779f02dbfSAdrian Chadd if (shortPreamble) { 121879f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1219e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].spAckDuration; 1220e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 122179f02dbfSAdrian Chadd rt, pktlen, rix, AH_TRUE); 122279f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1223e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].spAckDuration; 122479f02dbfSAdrian Chadd } else { 122579f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1226e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].lpAckDuration; 1227e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 122879f02dbfSAdrian Chadd rt, pktlen, rix, AH_FALSE); 122979f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1230e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].lpAckDuration; 123179f02dbfSAdrian Chadd } 1232e42b5dbaSAdrian Chadd 1233d4365d16SAdrian Chadd return (ctsduration); 123479f02dbfSAdrian Chadd } 123579f02dbfSAdrian Chadd 1236eb6f0de0SAdrian Chadd /* 1237eb6f0de0SAdrian Chadd * Update the given ath_buf with updated rts/cts setup and duration 1238eb6f0de0SAdrian Chadd * values. 1239eb6f0de0SAdrian Chadd * 1240eb6f0de0SAdrian Chadd * To support rate lookups for each software retry, the rts/cts rate 1241eb6f0de0SAdrian Chadd * and cts duration must be re-calculated. 1242eb6f0de0SAdrian Chadd * 1243eb6f0de0SAdrian Chadd * This function assumes the RTS/CTS flags have been set as needed; 1244eb6f0de0SAdrian Chadd * mrr has been disabled; and the rate control lookup has been done. 1245eb6f0de0SAdrian Chadd * 1246eb6f0de0SAdrian Chadd * XXX TODO: MRR need only be disabled for the pre-11n NICs. 1247eb6f0de0SAdrian Chadd * XXX The 11n NICs support per-rate RTS/CTS configuration. 1248eb6f0de0SAdrian Chadd */ 1249eb6f0de0SAdrian Chadd static void 1250eb6f0de0SAdrian Chadd ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf) 1251eb6f0de0SAdrian Chadd { 1252eb6f0de0SAdrian Chadd uint16_t ctsduration = 0; 1253eb6f0de0SAdrian Chadd uint8_t ctsrate = 0; 1254eb6f0de0SAdrian Chadd uint8_t rix = bf->bf_state.bfs_rc[0].rix; 1255eb6f0de0SAdrian Chadd uint8_t cix = 0; 1256eb6f0de0SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1257eb6f0de0SAdrian Chadd 1258eb6f0de0SAdrian Chadd /* 1259eb6f0de0SAdrian Chadd * No RTS/CTS enabled? Don't bother. 1260eb6f0de0SAdrian Chadd */ 1261875a9451SAdrian Chadd if ((bf->bf_state.bfs_txflags & 1262eb6f0de0SAdrian Chadd (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) { 1263eb6f0de0SAdrian Chadd /* XXX is this really needed? */ 1264eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 1265eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1266eb6f0de0SAdrian Chadd return; 1267eb6f0de0SAdrian Chadd } 1268eb6f0de0SAdrian Chadd 1269eb6f0de0SAdrian Chadd /* 1270eb6f0de0SAdrian Chadd * If protection is enabled, use the protection rix control 1271eb6f0de0SAdrian Chadd * rate. Otherwise use the rate0 control rate. 1272eb6f0de0SAdrian Chadd */ 1273eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_doprot) 1274eb6f0de0SAdrian Chadd rix = sc->sc_protrix; 1275eb6f0de0SAdrian Chadd else 1276eb6f0de0SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1277eb6f0de0SAdrian Chadd 1278eb6f0de0SAdrian Chadd /* 1279eb6f0de0SAdrian Chadd * If the raw path has hard-coded ctsrate0 to something, 1280eb6f0de0SAdrian Chadd * use it. 1281eb6f0de0SAdrian Chadd */ 1282eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ctsrate0 != 0) 1283eb6f0de0SAdrian Chadd cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0); 1284eb6f0de0SAdrian Chadd else 1285eb6f0de0SAdrian Chadd /* Control rate from above */ 1286eb6f0de0SAdrian Chadd cix = rt->info[rix].controlRate; 1287eb6f0de0SAdrian Chadd 1288eb6f0de0SAdrian Chadd /* Calculate the rtscts rate for the given cix */ 1289eb6f0de0SAdrian Chadd ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix, 1290eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream); 1291eb6f0de0SAdrian Chadd 1292eb6f0de0SAdrian Chadd /* The 11n chipsets do ctsduration calculations for you */ 1293eb6f0de0SAdrian Chadd if (! ath_tx_is_11n(sc)) 1294eb6f0de0SAdrian Chadd ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix, 1295eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen, 1296875a9451SAdrian Chadd rt, bf->bf_state.bfs_txflags); 1297eb6f0de0SAdrian Chadd 1298eb6f0de0SAdrian Chadd /* Squirrel away in ath_buf */ 1299eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = ctsrate; 1300eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = ctsduration; 1301eb6f0de0SAdrian Chadd 1302eb6f0de0SAdrian Chadd /* 1303eb6f0de0SAdrian Chadd * Must disable multi-rate retry when using RTS/CTS. 1304eb6f0de0SAdrian Chadd */ 1305af017101SAdrian Chadd if (!sc->sc_mrrprot) { 1306eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1307eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = 1308eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */ 1309eb6f0de0SAdrian Chadd } 1310af017101SAdrian Chadd } 1311eb6f0de0SAdrian Chadd 1312eb6f0de0SAdrian Chadd /* 1313eb6f0de0SAdrian Chadd * Setup the descriptor chain for a normal or fast-frame 1314eb6f0de0SAdrian Chadd * frame. 131546634305SAdrian Chadd * 131646634305SAdrian Chadd * XXX TODO: extend to include the destination hardware QCU ID. 131746634305SAdrian Chadd * Make sure that is correct. Make sure that when being added 131846634305SAdrian Chadd * to the mcastq, the CABQ QCUID is set or things will get a bit 131946634305SAdrian Chadd * odd. 1320eb6f0de0SAdrian Chadd */ 1321eb6f0de0SAdrian Chadd static void 1322eb6f0de0SAdrian Chadd ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf) 1323eb6f0de0SAdrian Chadd { 1324eb6f0de0SAdrian Chadd struct ath_desc *ds = bf->bf_desc; 1325eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1326eb6f0de0SAdrian Chadd 13277d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 132883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 132983bbd5ebSRui Paulo "%s: bf=%p, txrate0=%d\n", __func__, bf, 0); 13307d9dd2acSAdrian Chadd 1331eb6f0de0SAdrian Chadd ath_hal_setuptxdesc(ah, ds 1332eb6f0de0SAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 1333eb6f0de0SAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 1334eb6f0de0SAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 1335eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 1336eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txrate0 1337eb6f0de0SAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 1338eb6f0de0SAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 1339eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 1340875a9451SAdrian Chadd , bf->bf_state.bfs_txflags /* flags */ 1341eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 1342eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 1343eb6f0de0SAdrian Chadd ); 1344eb6f0de0SAdrian Chadd 1345eb6f0de0SAdrian Chadd /* 1346eb6f0de0SAdrian Chadd * This will be overriden when the descriptor chain is written. 1347eb6f0de0SAdrian Chadd */ 1348eb6f0de0SAdrian Chadd bf->bf_lastds = ds; 1349eb6f0de0SAdrian Chadd bf->bf_last = bf; 1350eb6f0de0SAdrian Chadd 1351d34a7347SAdrian Chadd /* Set rate control and descriptor chain for this frame */ 1352d34a7347SAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 13536e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0); 1354eb6f0de0SAdrian Chadd } 1355eb6f0de0SAdrian Chadd 1356eb6f0de0SAdrian Chadd /* 1357eb6f0de0SAdrian Chadd * Do a rate lookup. 1358eb6f0de0SAdrian Chadd * 1359eb6f0de0SAdrian Chadd * This performs a rate lookup for the given ath_buf only if it's required. 1360eb6f0de0SAdrian Chadd * Non-data frames and raw frames don't require it. 1361eb6f0de0SAdrian Chadd * 1362eb6f0de0SAdrian Chadd * This populates the primary and MRR entries; MRR values are 1363eb6f0de0SAdrian Chadd * then disabled later on if something requires it (eg RTS/CTS on 1364eb6f0de0SAdrian Chadd * pre-11n chipsets. 1365eb6f0de0SAdrian Chadd * 1366eb6f0de0SAdrian Chadd * This needs to be done before the RTS/CTS fields are calculated 1367eb6f0de0SAdrian Chadd * as they may depend upon the rate chosen. 1368eb6f0de0SAdrian Chadd */ 1369eb6f0de0SAdrian Chadd static void 1370eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf) 1371eb6f0de0SAdrian Chadd { 1372eb6f0de0SAdrian Chadd uint8_t rate, rix; 1373eb6f0de0SAdrian Chadd int try0; 1374eb6f0de0SAdrian Chadd 1375eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_doratelookup) 1376eb6f0de0SAdrian Chadd return; 1377eb6f0de0SAdrian Chadd 1378eb6f0de0SAdrian Chadd /* Get rid of any previous state */ 1379eb6f0de0SAdrian Chadd bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1380eb6f0de0SAdrian Chadd 1381eb6f0de0SAdrian Chadd ATH_NODE_LOCK(ATH_NODE(bf->bf_node)); 1382eb6f0de0SAdrian Chadd ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream, 1383eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, &rix, &try0, &rate); 1384eb6f0de0SAdrian Chadd 1385eb6f0de0SAdrian Chadd /* In case MRR is disabled, make sure rc[0] is setup correctly */ 1386eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1387eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = rate; 1388eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1389eb6f0de0SAdrian Chadd 1390eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY) 1391eb6f0de0SAdrian Chadd ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix, 1392eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc); 1393eb6f0de0SAdrian Chadd ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node)); 1394eb6f0de0SAdrian Chadd 1395eb6f0de0SAdrian Chadd sc->sc_txrix = rix; /* for LED blinking */ 1396eb6f0de0SAdrian Chadd sc->sc_lastdatarix = rix; /* for fast frames */ 1397eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1398eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = rate; 1399eb6f0de0SAdrian Chadd } 1400eb6f0de0SAdrian Chadd 1401eb6f0de0SAdrian Chadd /* 14020c54de88SAdrian Chadd * Update the CLRDMASK bit in the ath_buf if it needs to be set. 14030c54de88SAdrian Chadd */ 14040c54de88SAdrian Chadd static void 14050c54de88SAdrian Chadd ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid, 14060c54de88SAdrian Chadd struct ath_buf *bf) 14070c54de88SAdrian Chadd { 14084f25ddbbSAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 14090c54de88SAdrian Chadd 1410375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 14110c54de88SAdrian Chadd 14124f25ddbbSAdrian Chadd if (an->clrdmask == 1) { 14130c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 14144f25ddbbSAdrian Chadd an->clrdmask = 0; 14150c54de88SAdrian Chadd } 14160c54de88SAdrian Chadd } 14170c54de88SAdrian Chadd 14180c54de88SAdrian Chadd /* 141922a3aee6SAdrian Chadd * Return whether this frame should be software queued or 142022a3aee6SAdrian Chadd * direct dispatched. 142122a3aee6SAdrian Chadd * 142222a3aee6SAdrian Chadd * When doing powersave, BAR frames should be queued but other management 142322a3aee6SAdrian Chadd * frames should be directly sent. 142422a3aee6SAdrian Chadd * 142522a3aee6SAdrian Chadd * When not doing powersave, stick BAR frames into the hardware queue 142622a3aee6SAdrian Chadd * so it goes out even though the queue is paused. 142722a3aee6SAdrian Chadd * 142822a3aee6SAdrian Chadd * For now, management frames are also software queued by default. 142922a3aee6SAdrian Chadd */ 143022a3aee6SAdrian Chadd static int 143122a3aee6SAdrian Chadd ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an, 143222a3aee6SAdrian Chadd struct mbuf *m0, int *queue_to_head) 143322a3aee6SAdrian Chadd { 143422a3aee6SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 143522a3aee6SAdrian Chadd struct ieee80211_frame *wh; 143622a3aee6SAdrian Chadd uint8_t type, subtype; 143722a3aee6SAdrian Chadd 143822a3aee6SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 143922a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 144022a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 144122a3aee6SAdrian Chadd 144222a3aee6SAdrian Chadd (*queue_to_head) = 0; 144322a3aee6SAdrian Chadd 144422a3aee6SAdrian Chadd /* If it's not in powersave - direct-dispatch BAR */ 144522a3aee6SAdrian Chadd if ((ATH_NODE(ni)->an_is_powersave == 0) 144622a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 144722a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 144822a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 144922a3aee6SAdrian Chadd "%s: BAR: TX'ing direct\n", __func__); 145022a3aee6SAdrian Chadd return (0); 145122a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 145222a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 145322a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 145422a3aee6SAdrian Chadd /* BAR TX whilst asleep; queue */ 145522a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 145622a3aee6SAdrian Chadd "%s: swq: TX'ing\n", __func__); 145722a3aee6SAdrian Chadd (*queue_to_head) = 1; 145822a3aee6SAdrian Chadd return (1); 145922a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 146022a3aee6SAdrian Chadd && (type == IEEE80211_FC0_TYPE_MGT || 146122a3aee6SAdrian Chadd type == IEEE80211_FC0_TYPE_CTL)) { 146222a3aee6SAdrian Chadd /* 146322a3aee6SAdrian Chadd * Other control/mgmt frame; bypass software queuing 146422a3aee6SAdrian Chadd * for now! 146522a3aee6SAdrian Chadd */ 146683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 146722a3aee6SAdrian Chadd "%s: %6D: Node is asleep; sending mgmt " 146822a3aee6SAdrian Chadd "(type=%d, subtype=%d)\n", 146983bbd5ebSRui Paulo __func__, ni->ni_macaddr, ":", type, subtype); 147022a3aee6SAdrian Chadd return (0); 147122a3aee6SAdrian Chadd } else { 147222a3aee6SAdrian Chadd return (1); 147322a3aee6SAdrian Chadd } 147422a3aee6SAdrian Chadd } 147522a3aee6SAdrian Chadd 147622a3aee6SAdrian Chadd 147722a3aee6SAdrian Chadd /* 1478eb6f0de0SAdrian Chadd * Transmit the given frame to the hardware. 1479eb6f0de0SAdrian Chadd * 1480eb6f0de0SAdrian Chadd * The frame must already be setup; rate control must already have 1481eb6f0de0SAdrian Chadd * been done. 1482eb6f0de0SAdrian Chadd * 1483eb6f0de0SAdrian Chadd * XXX since the TXQ lock is being held here (and I dislike holding 1484eb6f0de0SAdrian Chadd * it for this long when not doing software aggregation), later on 1485eb6f0de0SAdrian Chadd * break this function into "setup_normal" and "xmit_normal". The 1486eb6f0de0SAdrian Chadd * lock only needs to be held for the ath_tx_handoff call. 148722a3aee6SAdrian Chadd * 148822a3aee6SAdrian Chadd * XXX we don't update the leak count here - if we're doing 148922a3aee6SAdrian Chadd * direct frame dispatch, we need to be able to do it without 149022a3aee6SAdrian Chadd * decrementing the leak count (eg multicast queue frames.) 1491eb6f0de0SAdrian Chadd */ 1492eb6f0de0SAdrian Chadd static void 1493eb6f0de0SAdrian Chadd ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq, 1494eb6f0de0SAdrian Chadd struct ath_buf *bf) 1495eb6f0de0SAdrian Chadd { 14960c54de88SAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 14970c54de88SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 1498eb6f0de0SAdrian Chadd 1499375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1500eb6f0de0SAdrian Chadd 15010c54de88SAdrian Chadd /* 15020c54de88SAdrian Chadd * For now, just enable CLRDMASK. ath_tx_xmit_normal() does 15030c54de88SAdrian Chadd * set a completion handler however it doesn't (yet) properly 15040c54de88SAdrian Chadd * handle the strict ordering requirements needed for normal, 15050c54de88SAdrian Chadd * non-aggregate session frames. 15060c54de88SAdrian Chadd * 15070c54de88SAdrian Chadd * Once this is implemented, only set CLRDMASK like this for 15080c54de88SAdrian Chadd * frames that must go out - eg management/raw frames. 15090c54de88SAdrian Chadd */ 15100c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 15110c54de88SAdrian Chadd 1512eb6f0de0SAdrian Chadd /* Setup the descriptor before handoff */ 1513eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 1514e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 1515e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 1516eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 1517e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 1518eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 1519eb6f0de0SAdrian Chadd 15200c54de88SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 15210c54de88SAdrian Chadd tid->hwq_depth++; 15220c54de88SAdrian Chadd 15230c54de88SAdrian Chadd /* Assign the completion handler */ 15240c54de88SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 15254e81f27cSAdrian Chadd 1526eb6f0de0SAdrian Chadd /* Hand off to hardware */ 1527eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 1528eb6f0de0SAdrian Chadd } 1529eb6f0de0SAdrian Chadd 1530d05b576dSAdrian Chadd /* 1531d05b576dSAdrian Chadd * Do the basic frame setup stuff that's required before the frame 1532d05b576dSAdrian Chadd * is added to a software queue. 1533d05b576dSAdrian Chadd * 1534d05b576dSAdrian Chadd * All frames get mostly the same treatment and it's done once. 1535d05b576dSAdrian Chadd * Retransmits fiddle with things like the rate control setup, 1536d05b576dSAdrian Chadd * setting the retransmit bit in the packet; doing relevant DMA/bus 1537d05b576dSAdrian Chadd * syncing and relinking it (back) into the hardware TX queue. 1538d05b576dSAdrian Chadd * 1539d05b576dSAdrian Chadd * Note that this may cause the mbuf to be reallocated, so 1540d05b576dSAdrian Chadd * m0 may not be valid. 1541d05b576dSAdrian Chadd */ 1542eb6f0de0SAdrian Chadd static int 1543eb6f0de0SAdrian Chadd ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni, 1544b43facbfSAdrian Chadd struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq) 1545b8e788a5SAdrian Chadd { 1546b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 1547b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1548b8e788a5SAdrian Chadd struct ifnet *ifp = sc->sc_ifp; 1549b8e788a5SAdrian Chadd struct ieee80211com *ic = ifp->if_l2com; 1550b8e788a5SAdrian Chadd const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams; 1551b8e788a5SAdrian Chadd int error, iswep, ismcast, isfrag, ismrr; 1552eb6f0de0SAdrian Chadd int keyix, hdrlen, pktlen, try0 = 0; 1553eb6f0de0SAdrian Chadd u_int8_t rix = 0, txrate = 0; 1554b8e788a5SAdrian Chadd struct ath_desc *ds; 1555b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 1556eb6f0de0SAdrian Chadd u_int subtype, flags; 1557b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 1558b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 1559b8e788a5SAdrian Chadd HAL_BOOL shortPreamble; 1560b8e788a5SAdrian Chadd struct ath_node *an; 1561b8e788a5SAdrian Chadd u_int pri; 1562b8e788a5SAdrian Chadd 15637561cb5cSAdrian Chadd /* 15647561cb5cSAdrian Chadd * To ensure that both sequence numbers and the CCMP PN handling 15657561cb5cSAdrian Chadd * is "correct", make sure that the relevant TID queue is locked. 15667561cb5cSAdrian Chadd * Otherwise the CCMP PN and seqno may appear out of order, causing 15677561cb5cSAdrian Chadd * re-ordered frames to have out of order CCMP PN's, resulting 15687561cb5cSAdrian Chadd * in many, many frame drops. 15697561cb5cSAdrian Chadd */ 1570375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 15717561cb5cSAdrian Chadd 1572b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 15735945b5f5SKevin Lo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1574b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1575b8e788a5SAdrian Chadd isfrag = m0->m_flags & M_FRAG; 1576b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 1577b8e788a5SAdrian Chadd /* 1578b8e788a5SAdrian Chadd * Packet length must not include any 1579b8e788a5SAdrian Chadd * pad bytes; deduct them here. 1580b8e788a5SAdrian Chadd */ 1581b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3); 1582b8e788a5SAdrian Chadd 158381a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 1584eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen, 1585eb6f0de0SAdrian Chadd &pktlen, &keyix)) { 1586b8e788a5SAdrian Chadd ath_freetx(m0); 1587b8e788a5SAdrian Chadd return EIO; 1588b8e788a5SAdrian Chadd } 1589b8e788a5SAdrian Chadd 1590b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 1591b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1592b8e788a5SAdrian Chadd 1593b8e788a5SAdrian Chadd pktlen += IEEE80211_CRC_LEN; 1594b8e788a5SAdrian Chadd 1595b8e788a5SAdrian Chadd /* 1596b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 1597b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 1598b8e788a5SAdrian Chadd */ 1599b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 1600b8e788a5SAdrian Chadd if (error != 0) 1601b8e788a5SAdrian Chadd return error; 1602*f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 1603b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 1604b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 1605b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1606b8e788a5SAdrian Chadd 1607b8e788a5SAdrian Chadd /* setup descriptors */ 1608b8e788a5SAdrian Chadd ds = bf->bf_desc; 1609b8e788a5SAdrian Chadd rt = sc->sc_currates; 1610b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1611b8e788a5SAdrian Chadd 1612b8e788a5SAdrian Chadd /* 1613b8e788a5SAdrian Chadd * NB: the 802.11 layer marks whether or not we should 1614b8e788a5SAdrian Chadd * use short preamble based on the current mode and 1615b8e788a5SAdrian Chadd * negotiated parameters. 1616b8e788a5SAdrian Chadd */ 1617b8e788a5SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1618b8e788a5SAdrian Chadd (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 1619b8e788a5SAdrian Chadd shortPreamble = AH_TRUE; 1620b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_shortpre++; 1621b8e788a5SAdrian Chadd } else { 1622b8e788a5SAdrian Chadd shortPreamble = AH_FALSE; 1623b8e788a5SAdrian Chadd } 1624b8e788a5SAdrian Chadd 1625b8e788a5SAdrian Chadd an = ATH_NODE(ni); 16264e81f27cSAdrian Chadd //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 16274e81f27cSAdrian Chadd flags = 0; 1628b8e788a5SAdrian Chadd ismrr = 0; /* default no multi-rate retry*/ 1629b8e788a5SAdrian Chadd pri = M_WME_GETAC(m0); /* honor classification */ 1630b8e788a5SAdrian Chadd /* XXX use txparams instead of fixed values */ 1631b8e788a5SAdrian Chadd /* 1632b8e788a5SAdrian Chadd * Calculate Atheros packet type from IEEE80211 packet header, 1633b8e788a5SAdrian Chadd * setup for rate calculations, and select h/w transmit queue. 1634b8e788a5SAdrian Chadd */ 1635b8e788a5SAdrian Chadd switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1636b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_MGT: 1637b8e788a5SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1638b8e788a5SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 1639b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_BEACON; 1640b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1641b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PROBE_RESP; 1642b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 1643b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_ATIM; 1644b8e788a5SAdrian Chadd else 1645b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* XXX */ 1646b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1647b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1648b8e788a5SAdrian Chadd if (shortPreamble) 1649b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1650b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1651b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1652b8e788a5SAdrian Chadd break; 1653b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_CTL: 1654b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */ 1655b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1656b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1657b8e788a5SAdrian Chadd if (shortPreamble) 1658b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1659b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1660b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1661b8e788a5SAdrian Chadd break; 1662b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_DATA: 1663b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* default */ 1664b8e788a5SAdrian Chadd /* 1665b8e788a5SAdrian Chadd * Data frames: multicast frames go out at a fixed rate, 1666b8e788a5SAdrian Chadd * EAPOL frames use the mgmt frame rate; otherwise consult 1667b8e788a5SAdrian Chadd * the rate control module for the rate to use. 1668b8e788a5SAdrian Chadd */ 1669b8e788a5SAdrian Chadd if (ismcast) { 1670b8e788a5SAdrian Chadd rix = an->an_mcastrix; 1671b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1672b8e788a5SAdrian Chadd if (shortPreamble) 1673b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1674b8e788a5SAdrian Chadd try0 = 1; 1675b8e788a5SAdrian Chadd } else if (m0->m_flags & M_EAPOL) { 1676b8e788a5SAdrian Chadd /* XXX? maybe always use long preamble? */ 1677b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1678b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1679b8e788a5SAdrian Chadd if (shortPreamble) 1680b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1681b8e788a5SAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */ 1682b8e788a5SAdrian Chadd } else { 1683eb6f0de0SAdrian Chadd /* 1684eb6f0de0SAdrian Chadd * Do rate lookup on each TX, rather than using 1685eb6f0de0SAdrian Chadd * the hard-coded TX information decided here. 1686eb6f0de0SAdrian Chadd */ 1687b8e788a5SAdrian Chadd ismrr = 1; 1688eb6f0de0SAdrian Chadd bf->bf_state.bfs_doratelookup = 1; 1689b8e788a5SAdrian Chadd } 1690b8e788a5SAdrian Chadd if (cap->cap_wmeParams[pri].wmep_noackPolicy) 1691b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 1692b8e788a5SAdrian Chadd break; 1693b8e788a5SAdrian Chadd default: 1694b8e788a5SAdrian Chadd if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1695b8e788a5SAdrian Chadd wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1696b8e788a5SAdrian Chadd /* XXX statistic */ 1697c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1698b8e788a5SAdrian Chadd ath_freetx(m0); 1699b8e788a5SAdrian Chadd return EIO; 1700b8e788a5SAdrian Chadd } 1701b8e788a5SAdrian Chadd 1702447fd44aSAdrian Chadd /* 1703447fd44aSAdrian Chadd * There are two known scenarios where the frame AC doesn't match 1704447fd44aSAdrian Chadd * what the destination TXQ is. 1705447fd44aSAdrian Chadd * 1706447fd44aSAdrian Chadd * + non-QoS frames (eg management?) that the net80211 stack has 1707447fd44aSAdrian Chadd * assigned a higher AC to, but since it's a non-QoS TID, it's 1708447fd44aSAdrian Chadd * being thrown into TID 16. TID 16 gets the AC_BE queue. 1709447fd44aSAdrian Chadd * It's quite possible that management frames should just be 1710447fd44aSAdrian Chadd * direct dispatched to hardware rather than go via the software 1711447fd44aSAdrian Chadd * queue; that should be investigated in the future. There are 1712447fd44aSAdrian Chadd * some specific scenarios where this doesn't make sense, mostly 1713447fd44aSAdrian Chadd * surrounding ADDBA request/response - hence why that is special 1714447fd44aSAdrian Chadd * cased. 1715447fd44aSAdrian Chadd * 1716447fd44aSAdrian Chadd * + Multicast frames going into the VAP mcast queue. That shows up 1717447fd44aSAdrian Chadd * as "TXQ 11". 1718447fd44aSAdrian Chadd * 1719447fd44aSAdrian Chadd * This driver should eventually support separate TID and TXQ locking, 1720447fd44aSAdrian Chadd * allowing for arbitrary AC frames to appear on arbitrary software 1721447fd44aSAdrian Chadd * queues, being queued to the "correct" hardware queue when needed. 1722447fd44aSAdrian Chadd */ 1723447fd44aSAdrian Chadd #if 0 17246deb7f32SAdrian Chadd if (txq != sc->sc_ac2q[pri]) { 172583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 17266deb7f32SAdrian Chadd "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n", 17276deb7f32SAdrian Chadd __func__, 17286deb7f32SAdrian Chadd txq, 17296deb7f32SAdrian Chadd txq->axq_qnum, 17306deb7f32SAdrian Chadd pri, 17316deb7f32SAdrian Chadd sc->sc_ac2q[pri], 17326deb7f32SAdrian Chadd sc->sc_ac2q[pri]->axq_qnum); 17336deb7f32SAdrian Chadd } 1734447fd44aSAdrian Chadd #endif 17356deb7f32SAdrian Chadd 1736b8e788a5SAdrian Chadd /* 1737b8e788a5SAdrian Chadd * Calculate miscellaneous flags. 1738b8e788a5SAdrian Chadd */ 1739b8e788a5SAdrian Chadd if (ismcast) { 1740b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 1741b8e788a5SAdrian Chadd } else if (pktlen > vap->iv_rtsthreshold && 1742b8e788a5SAdrian Chadd (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) { 1743b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 1744b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_rts++; 1745b8e788a5SAdrian Chadd } 1746b8e788a5SAdrian Chadd if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */ 1747b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_noack++; 1748b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 1749b8e788a5SAdrian Chadd if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) { 1750b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_TDMA, 1751b8e788a5SAdrian Chadd "%s: discard frame, ACK required w/ TDMA\n", __func__); 1752b8e788a5SAdrian Chadd sc->sc_stats.ast_tdma_ack++; 1753c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1754b8e788a5SAdrian Chadd ath_freetx(m0); 1755b8e788a5SAdrian Chadd return EIO; 1756b8e788a5SAdrian Chadd } 1757b8e788a5SAdrian Chadd #endif 1758b8e788a5SAdrian Chadd 1759b8e788a5SAdrian Chadd /* 1760eb6f0de0SAdrian Chadd * Determine if a tx interrupt should be generated for 1761eb6f0de0SAdrian Chadd * this descriptor. We take a tx interrupt to reap 1762eb6f0de0SAdrian Chadd * descriptors when the h/w hits an EOL condition or 1763eb6f0de0SAdrian Chadd * when the descriptor is specifically marked to generate 1764eb6f0de0SAdrian Chadd * an interrupt. We periodically mark descriptors in this 1765eb6f0de0SAdrian Chadd * way to insure timely replenishing of the supply needed 1766eb6f0de0SAdrian Chadd * for sending frames. Defering interrupts reduces system 1767eb6f0de0SAdrian Chadd * load and potentially allows more concurrent work to be 1768eb6f0de0SAdrian Chadd * done but if done to aggressively can cause senders to 1769eb6f0de0SAdrian Chadd * backup. 1770eb6f0de0SAdrian Chadd * 1771eb6f0de0SAdrian Chadd * NB: use >= to deal with sc_txintrperiod changing 1772eb6f0de0SAdrian Chadd * dynamically through sysctl. 1773b8e788a5SAdrian Chadd */ 1774eb6f0de0SAdrian Chadd if (flags & HAL_TXDESC_INTREQ) { 1775eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1776eb6f0de0SAdrian Chadd } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) { 1777eb6f0de0SAdrian Chadd flags |= HAL_TXDESC_INTREQ; 1778eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1779eb6f0de0SAdrian Chadd } 1780e42b5dbaSAdrian Chadd 1781eb6f0de0SAdrian Chadd /* This point forward is actual TX bits */ 1782b8e788a5SAdrian Chadd 1783b8e788a5SAdrian Chadd /* 1784b8e788a5SAdrian Chadd * At this point we are committed to sending the frame 1785b8e788a5SAdrian Chadd * and we don't need to look at m_nextpkt; clear it in 1786b8e788a5SAdrian Chadd * case this frame is part of frag chain. 1787b8e788a5SAdrian Chadd */ 1788b8e788a5SAdrian Chadd m0->m_nextpkt = NULL; 1789b8e788a5SAdrian Chadd 1790b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 1791b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len, 1792b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 1793b8e788a5SAdrian Chadd 1794b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 1795b8e788a5SAdrian Chadd u_int64_t tsf = ath_hal_gettsf64(ah); 1796b8e788a5SAdrian Chadd 1797b8e788a5SAdrian Chadd sc->sc_tx_th.wt_tsf = htole64(tsf); 1798b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 1799b8e788a5SAdrian Chadd if (iswep) 1800b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1801b8e788a5SAdrian Chadd if (isfrag) 1802b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 1803b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 180412087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni); 1805b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 1806b8e788a5SAdrian Chadd 1807b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 1808b8e788a5SAdrian Chadd } 1809b8e788a5SAdrian Chadd 1810eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 1811eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1812c1782ce0SAdrian Chadd 1813b8e788a5SAdrian Chadd /* 1814eb6f0de0SAdrian Chadd * ath_buf_set_rate needs at least one rate/try to setup 1815eb6f0de0SAdrian Chadd * the rate scenario. 1816b8e788a5SAdrian Chadd */ 1817eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1818eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1819eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 1820eb6f0de0SAdrian Chadd 1821eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 1822eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 1823eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 1824eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 182512087a07SAdrian Chadd bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni); 1826eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 1827eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1828eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 1829eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = sc->sc_txantenna; 1830875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1831eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = shortPreamble; 1832eb6f0de0SAdrian Chadd 1833eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 1834eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */ 1835eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; /* calculated later */ 1836eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1837eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 1838eb6f0de0SAdrian Chadd 1839eb6f0de0SAdrian Chadd return 0; 1840eb6f0de0SAdrian Chadd } 1841eb6f0de0SAdrian Chadd 1842b8e788a5SAdrian Chadd /* 18434e81f27cSAdrian Chadd * Queue a frame to the hardware or software queue. 1844eb6f0de0SAdrian Chadd * 1845eb6f0de0SAdrian Chadd * This can be called by the net80211 code. 1846eb6f0de0SAdrian Chadd * 1847eb6f0de0SAdrian Chadd * XXX what about locking? Or, push the seqno assign into the 1848eb6f0de0SAdrian Chadd * XXX aggregate scheduler so its serialised? 18494e81f27cSAdrian Chadd * 18504e81f27cSAdrian Chadd * XXX When sending management frames via ath_raw_xmit(), 18514e81f27cSAdrian Chadd * should CLRDMASK be set unconditionally? 1852b8e788a5SAdrian Chadd */ 1853eb6f0de0SAdrian Chadd int 1854eb6f0de0SAdrian Chadd ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, 1855eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 1856eb6f0de0SAdrian Chadd { 1857eb6f0de0SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 1858eb6f0de0SAdrian Chadd struct ath_vap *avp = ATH_VAP(vap); 18599c85ff91SAdrian Chadd int r = 0; 1860eb6f0de0SAdrian Chadd u_int pri; 1861eb6f0de0SAdrian Chadd int tid; 1862eb6f0de0SAdrian Chadd struct ath_txq *txq; 1863eb6f0de0SAdrian Chadd int ismcast; 1864eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 1865eb6f0de0SAdrian Chadd int is_ampdu, is_ampdu_tx, is_ampdu_pending; 1866a108d2d6SAdrian Chadd ieee80211_seq seqno; 1867eb6f0de0SAdrian Chadd uint8_t type, subtype; 186822a3aee6SAdrian Chadd int queue_to_head; 1869eb6f0de0SAdrian Chadd 1870375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1871375307d4SAdrian Chadd 1872eb6f0de0SAdrian Chadd /* 1873eb6f0de0SAdrian Chadd * Determine the target hardware queue. 1874eb6f0de0SAdrian Chadd * 1875b43facbfSAdrian Chadd * For multicast frames, the txq gets overridden appropriately 1876b43facbfSAdrian Chadd * depending upon the state of PS. 1877eb6f0de0SAdrian Chadd * 1878eb6f0de0SAdrian Chadd * For any other frame, we do a TID/QoS lookup inside the frame 1879eb6f0de0SAdrian Chadd * to see what the TID should be. If it's a non-QoS frame, the 1880eb6f0de0SAdrian Chadd * AC and TID are overridden. The TID/TXQ code assumes the 1881eb6f0de0SAdrian Chadd * TID is on a predictable hardware TXQ, so we don't support 1882eb6f0de0SAdrian Chadd * having a node TID queued to multiple hardware TXQs. 1883eb6f0de0SAdrian Chadd * This may change in the future but would require some locking 1884eb6f0de0SAdrian Chadd * fudgery. 1885eb6f0de0SAdrian Chadd */ 1886eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 1887eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 1888eb6f0de0SAdrian Chadd 1889eb6f0de0SAdrian Chadd txq = sc->sc_ac2q[pri]; 1890eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1891eb6f0de0SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1892eb6f0de0SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1893eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1894eb6f0de0SAdrian Chadd 18959c85ff91SAdrian Chadd /* 18969c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 18979c85ff91SAdrian Chadd * 18989c85ff91SAdrian Chadd * XXX duplicated in ath_raw_xmit(). 18999c85ff91SAdrian Chadd */ 19009c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 190192e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 190292e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 19039c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 19049c85ff91SAdrian Chadd m_freem(m0); 190555cf0326SAdrian Chadd return (ENOBUFS); 19069c85ff91SAdrian Chadd } 19079c85ff91SAdrian Chadd } 19089c85ff91SAdrian Chadd 190922a3aee6SAdrian Chadd /* 191022a3aee6SAdrian Chadd * Enforce how deep the unicast queue can grow. 191122a3aee6SAdrian Chadd * 191222a3aee6SAdrian Chadd * If the node is in power save then we don't want 191322a3aee6SAdrian Chadd * the software queue to grow too deep, or a node may 191422a3aee6SAdrian Chadd * end up consuming all of the ath_buf entries. 191522a3aee6SAdrian Chadd * 191622a3aee6SAdrian Chadd * For now, only do this for DATA frames. 191722a3aee6SAdrian Chadd * 191822a3aee6SAdrian Chadd * We will want to cap how many management/control 191922a3aee6SAdrian Chadd * frames get punted to the software queue so it doesn't 192022a3aee6SAdrian Chadd * fill up. But the correct solution isn't yet obvious. 192122a3aee6SAdrian Chadd * In any case, this check should at least let frames pass 192222a3aee6SAdrian Chadd * that we are direct-dispatching. 192322a3aee6SAdrian Chadd * 192422a3aee6SAdrian Chadd * XXX TODO: duplicate this to the raw xmit path! 192522a3aee6SAdrian Chadd */ 192622a3aee6SAdrian Chadd if (type == IEEE80211_FC0_TYPE_DATA && 192722a3aee6SAdrian Chadd ATH_NODE(ni)->an_is_powersave && 192822a3aee6SAdrian Chadd ATH_NODE(ni)->an_swq_depth > 192922a3aee6SAdrian Chadd sc->sc_txq_node_psq_maxdepth) { 193022a3aee6SAdrian Chadd sc->sc_stats.ast_tx_node_psq_overflow++; 193122a3aee6SAdrian Chadd m_freem(m0); 193222a3aee6SAdrian Chadd return (ENOBUFS); 193322a3aee6SAdrian Chadd } 193422a3aee6SAdrian Chadd 1935eb6f0de0SAdrian Chadd /* A-MPDU TX */ 1936eb6f0de0SAdrian Chadd is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid); 1937eb6f0de0SAdrian Chadd is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1938eb6f0de0SAdrian Chadd is_ampdu = is_ampdu_tx | is_ampdu_pending; 1939eb6f0de0SAdrian Chadd 1940a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1941a108d2d6SAdrian Chadd __func__, tid, pri, is_ampdu); 1942eb6f0de0SAdrian Chadd 194346634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 194446634305SAdrian Chadd bf->bf_state.bfs_tid = tid; 1945fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 194646634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 194746634305SAdrian Chadd 1948b837332dSAdrian Chadd #if 1 1949c5940c30SAdrian Chadd /* 1950b43facbfSAdrian Chadd * When servicing one or more stations in power-save mode 1951b43facbfSAdrian Chadd * (or) if there is some mcast data waiting on the mcast 1952b43facbfSAdrian Chadd * queue (to prevent out of order delivery) multicast frames 1953b43facbfSAdrian Chadd * must be bufferd until after the beacon. 1954b43facbfSAdrian Chadd * 1955b43facbfSAdrian Chadd * TODO: we should lock the mcastq before we check the length. 1956c5940c30SAdrian Chadd */ 1957b837332dSAdrian Chadd if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 1958eb6f0de0SAdrian Chadd txq = &avp->av_mcastq; 195946634305SAdrian Chadd /* 196046634305SAdrian Chadd * Mark the frame as eventually belonging on the CAB 196146634305SAdrian Chadd * queue, so the descriptor setup functions will 196246634305SAdrian Chadd * correctly initialise the descriptor 'qcuId' field. 196346634305SAdrian Chadd */ 1964fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum; 196546634305SAdrian Chadd } 1966b837332dSAdrian Chadd #endif 1967eb6f0de0SAdrian Chadd 1968eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 1969eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 1970eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 1971eb6f0de0SAdrian Chadd 19727561cb5cSAdrian Chadd /* A-MPDU TX? Manually set sequence number */ 19737561cb5cSAdrian Chadd /* 19747561cb5cSAdrian Chadd * Don't do it whilst pending; the net80211 layer still 19757561cb5cSAdrian Chadd * assigns them. 19767561cb5cSAdrian Chadd */ 19777561cb5cSAdrian Chadd if (is_ampdu_tx) { 1978eb6f0de0SAdrian Chadd /* 1979eb6f0de0SAdrian Chadd * Always call; this function will 1980eb6f0de0SAdrian Chadd * handle making sure that null data frames 1981eb6f0de0SAdrian Chadd * don't get a sequence number from the current 1982eb6f0de0SAdrian Chadd * TID and thus mess with the BAW. 1983eb6f0de0SAdrian Chadd */ 1984a108d2d6SAdrian Chadd seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0); 198542f4d061SAdrian Chadd 198642f4d061SAdrian Chadd /* 198742f4d061SAdrian Chadd * Don't add QoS NULL frames to the BAW. 198842f4d061SAdrian Chadd */ 1989a108d2d6SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh) && 1990a108d2d6SAdrian Chadd subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) { 1991eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 1; 1992eb6f0de0SAdrian Chadd } 1993c1782ce0SAdrian Chadd } 1994c1782ce0SAdrian Chadd 1995eb6f0de0SAdrian Chadd /* 1996eb6f0de0SAdrian Chadd * If needed, the sequence number has been assigned. 1997eb6f0de0SAdrian Chadd * Squirrel it away somewhere easy to get to. 1998eb6f0de0SAdrian Chadd */ 1999a108d2d6SAdrian Chadd bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT; 2000b8e788a5SAdrian Chadd 2001eb6f0de0SAdrian Chadd /* Is ampdu pending? fetch the seqno and print it out */ 2002eb6f0de0SAdrian Chadd if (is_ampdu_pending) 2003eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 2004eb6f0de0SAdrian Chadd "%s: tid %d: ampdu pending, seqno %d\n", 2005eb6f0de0SAdrian Chadd __func__, tid, M_SEQNO_GET(m0)); 2006eb6f0de0SAdrian Chadd 2007eb6f0de0SAdrian Chadd /* This also sets up the DMA map */ 2008b43facbfSAdrian Chadd r = ath_tx_normal_setup(sc, ni, bf, m0, txq); 2009eb6f0de0SAdrian Chadd 2010eb6f0de0SAdrian Chadd if (r != 0) 20117561cb5cSAdrian Chadd goto done; 2012eb6f0de0SAdrian Chadd 2013eb6f0de0SAdrian Chadd /* At this point m0 could have changed! */ 2014eb6f0de0SAdrian Chadd m0 = bf->bf_m; 2015eb6f0de0SAdrian Chadd 2016eb6f0de0SAdrian Chadd #if 1 2017eb6f0de0SAdrian Chadd /* 2018eb6f0de0SAdrian Chadd * If it's a multicast frame, do a direct-dispatch to the 2019eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2020eb6f0de0SAdrian Chadd * queuing it. 2021eb6f0de0SAdrian Chadd */ 2022eb6f0de0SAdrian Chadd /* 2023eb6f0de0SAdrian Chadd * If it's a BAR frame, do a direct dispatch to the 2024eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2025eb6f0de0SAdrian Chadd * queuing it, as the TID will now be paused. 2026eb6f0de0SAdrian Chadd * Sending a BAR frame can occur from the net80211 txa timer 2027eb6f0de0SAdrian Chadd * (ie, retries) or from the ath txtask (completion call.) 2028eb6f0de0SAdrian Chadd * It queues directly to hardware because the TID is paused 2029eb6f0de0SAdrian Chadd * at this point (and won't be unpaused until the BAR has 2030eb6f0de0SAdrian Chadd * either been TXed successfully or max retries has been 2031eb6f0de0SAdrian Chadd * reached.) 2032eb6f0de0SAdrian Chadd */ 203322a3aee6SAdrian Chadd /* 203422a3aee6SAdrian Chadd * Until things are better debugged - if this node is asleep 203522a3aee6SAdrian Chadd * and we're sending it a non-BAR frame, direct dispatch it. 203622a3aee6SAdrian Chadd * Why? Because we need to figure out what's actually being 203722a3aee6SAdrian Chadd * sent - eg, during reassociation/reauthentication after 203822a3aee6SAdrian Chadd * the node (last) disappeared whilst asleep, the driver should 203922a3aee6SAdrian Chadd * have unpaused/unsleep'ed the node. So until that is 204022a3aee6SAdrian Chadd * sorted out, use this workaround. 204122a3aee6SAdrian Chadd */ 2042eb6f0de0SAdrian Chadd if (txq == &avp->av_mcastq) { 2043d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 20440b96ef63SAdrian Chadd "%s: bf=%p: mcastq: TX'ing\n", __func__, bf); 20454e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2046eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 204722a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 204822a3aee6SAdrian Chadd &queue_to_head)) { 204922a3aee6SAdrian Chadd ath_tx_swq(sc, ni, txq, queue_to_head, bf); 205022a3aee6SAdrian Chadd } else { 20514e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2052eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2053eb6f0de0SAdrian Chadd } 2054eb6f0de0SAdrian Chadd #else 2055eb6f0de0SAdrian Chadd /* 2056eb6f0de0SAdrian Chadd * For now, since there's no software queue, 2057eb6f0de0SAdrian Chadd * direct-dispatch to the hardware. 2058eb6f0de0SAdrian Chadd */ 20594e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 206022a3aee6SAdrian Chadd /* 206122a3aee6SAdrian Chadd * Update the current leak count if 206222a3aee6SAdrian Chadd * we're leaking frames; and set the 206322a3aee6SAdrian Chadd * MORE flag as appropriate. 206422a3aee6SAdrian Chadd */ 206522a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 2066eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2067eb6f0de0SAdrian Chadd #endif 20687561cb5cSAdrian Chadd done: 2069b8e788a5SAdrian Chadd return 0; 2070b8e788a5SAdrian Chadd } 2071b8e788a5SAdrian Chadd 2072b8e788a5SAdrian Chadd static int 2073b8e788a5SAdrian Chadd ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni, 2074b8e788a5SAdrian Chadd struct ath_buf *bf, struct mbuf *m0, 2075b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2076b8e788a5SAdrian Chadd { 2077b8e788a5SAdrian Chadd struct ifnet *ifp = sc->sc_ifp; 2078b8e788a5SAdrian Chadd struct ieee80211com *ic = ifp->if_l2com; 2079b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 2080b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 2081b8e788a5SAdrian Chadd int error, ismcast, ismrr; 2082b8e788a5SAdrian Chadd int keyix, hdrlen, pktlen, try0, txantenna; 2083eb6f0de0SAdrian Chadd u_int8_t rix, txrate; 2084b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 2085eb6f0de0SAdrian Chadd u_int flags; 2086b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 2087b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 2088b8e788a5SAdrian Chadd struct ath_desc *ds; 2089b8e788a5SAdrian Chadd u_int pri; 2090eb6f0de0SAdrian Chadd int o_tid = -1; 2091eb6f0de0SAdrian Chadd int do_override; 209222a3aee6SAdrian Chadd uint8_t type, subtype; 209322a3aee6SAdrian Chadd int queue_to_head; 2094*f5c30c4eSAdrian Chadd struct ath_node *an = ATH_NODE(ni); 2095b8e788a5SAdrian Chadd 2096375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2097375307d4SAdrian Chadd 2098b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2099b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2100b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 2101b8e788a5SAdrian Chadd /* 2102b8e788a5SAdrian Chadd * Packet length must not include any 2103b8e788a5SAdrian Chadd * pad bytes; deduct them here. 2104b8e788a5SAdrian Chadd */ 2105b8e788a5SAdrian Chadd /* XXX honor IEEE80211_BPF_DATAPAD */ 2106b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN; 2107b8e788a5SAdrian Chadd 210822a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 210922a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 211022a3aee6SAdrian Chadd 211103682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, 211203682514SAdrian Chadd "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf); 211303682514SAdrian Chadd 2114eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n", 2115eb6f0de0SAdrian Chadd __func__, ismcast); 2116eb6f0de0SAdrian Chadd 21177561cb5cSAdrian Chadd pri = params->ibp_pri & 3; 21187561cb5cSAdrian Chadd /* Override pri if the frame isn't a QoS one */ 21197561cb5cSAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 21207561cb5cSAdrian Chadd pri = ath_tx_getac(sc, m0); 21217561cb5cSAdrian Chadd 21227561cb5cSAdrian Chadd /* XXX If it's an ADDBA, override the correct queue */ 21237561cb5cSAdrian Chadd do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid); 21247561cb5cSAdrian Chadd 21257561cb5cSAdrian Chadd /* Map ADDBA to the correct priority */ 21267561cb5cSAdrian Chadd if (do_override) { 21277561cb5cSAdrian Chadd #if 0 212883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 21297561cb5cSAdrian Chadd "%s: overriding tid %d pri %d -> %d\n", 21307561cb5cSAdrian Chadd __func__, o_tid, pri, TID_TO_WME_AC(o_tid)); 21317561cb5cSAdrian Chadd #endif 21327561cb5cSAdrian Chadd pri = TID_TO_WME_AC(o_tid); 21337561cb5cSAdrian Chadd } 21347561cb5cSAdrian Chadd 213581a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 2136eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, 2137eb6f0de0SAdrian Chadd m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0, 2138eb6f0de0SAdrian Chadd &hdrlen, &pktlen, &keyix)) { 2139b8e788a5SAdrian Chadd ath_freetx(m0); 2140b8e788a5SAdrian Chadd return EIO; 2141b8e788a5SAdrian Chadd } 2142b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 2143b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2144b8e788a5SAdrian Chadd 2145eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 2146eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 2147eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 2148eb6f0de0SAdrian Chadd 2149b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 2150b8e788a5SAdrian Chadd if (error != 0) 2151b8e788a5SAdrian Chadd return error; 2152b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 2153b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2154*f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 2155b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 2156b8e788a5SAdrian Chadd 21574e81f27cSAdrian Chadd /* Always enable CLRDMASK for raw frames for now.. */ 2158b8e788a5SAdrian Chadd flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 2159b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 2160b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_RTS) 2161b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 2162eb6f0de0SAdrian Chadd else if (params->ibp_flags & IEEE80211_BPF_CTS) { 2163eb6f0de0SAdrian Chadd /* XXX assume 11g/11n protection? */ 2164eb6f0de0SAdrian Chadd bf->bf_state.bfs_doprot = 1; 2165b8e788a5SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 2166eb6f0de0SAdrian Chadd } 2167b8e788a5SAdrian Chadd /* XXX leave ismcast to injector? */ 2168b8e788a5SAdrian Chadd if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast) 2169b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 2170b8e788a5SAdrian Chadd 2171b8e788a5SAdrian Chadd rt = sc->sc_currates; 2172b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2173*f5c30c4eSAdrian Chadd 2174*f5c30c4eSAdrian Chadd /* Fetch first rate information */ 2175b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate0); 2176*f5c30c4eSAdrian Chadd try0 = params->ibp_try0; 2177*f5c30c4eSAdrian Chadd 2178*f5c30c4eSAdrian Chadd /* 2179*f5c30c4eSAdrian Chadd * Override EAPOL rate as appropriate. 2180*f5c30c4eSAdrian Chadd */ 2181*f5c30c4eSAdrian Chadd if (m0->m_flags & M_EAPOL) { 2182*f5c30c4eSAdrian Chadd /* XXX? maybe always use long preamble? */ 2183*f5c30c4eSAdrian Chadd rix = an->an_mgmtrix; 2184*f5c30c4eSAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */ 2185*f5c30c4eSAdrian Chadd } 2186*f5c30c4eSAdrian Chadd 2187b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 2188b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) 2189b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 2190b8e788a5SAdrian Chadd sc->sc_txrix = rix; 2191b8e788a5SAdrian Chadd ismrr = (params->ibp_try1 != 0); 2192b8e788a5SAdrian Chadd txantenna = params->ibp_pri >> 2; 2193b8e788a5SAdrian Chadd if (txantenna == 0) /* XXX? */ 2194b8e788a5SAdrian Chadd txantenna = sc->sc_txantenna; 219579f02dbfSAdrian Chadd 219679f02dbfSAdrian Chadd /* 2197eb6f0de0SAdrian Chadd * Since ctsrate is fixed, store it away for later 2198eb6f0de0SAdrian Chadd * use when the descriptor fields are being set. 219979f02dbfSAdrian Chadd */ 2200eb6f0de0SAdrian Chadd if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) 2201eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate; 220279f02dbfSAdrian Chadd 2203b8e788a5SAdrian Chadd /* 2204b8e788a5SAdrian Chadd * NB: we mark all packets as type PSPOLL so the h/w won't 2205b8e788a5SAdrian Chadd * set the sequence number, duration, etc. 2206b8e788a5SAdrian Chadd */ 2207b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; 2208b8e788a5SAdrian Chadd 2209b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 2210b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len, 2211b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 2212b8e788a5SAdrian Chadd 2213b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 2214b8e788a5SAdrian Chadd u_int64_t tsf = ath_hal_gettsf64(ah); 2215b8e788a5SAdrian Chadd 2216b8e788a5SAdrian Chadd sc->sc_tx_th.wt_tsf = htole64(tsf); 2217b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 22185945b5f5SKevin Lo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) 2219b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2220b8e788a5SAdrian Chadd if (m0->m_flags & M_FRAG) 2221b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 2222b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 222312087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = MIN(params->ibp_power, 222412087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2225b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 2226b8e788a5SAdrian Chadd 2227b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 2228b8e788a5SAdrian Chadd } 2229b8e788a5SAdrian Chadd 2230b8e788a5SAdrian Chadd /* 2231b8e788a5SAdrian Chadd * Formulate first tx descriptor with tx controls. 2232b8e788a5SAdrian Chadd */ 2233b8e788a5SAdrian Chadd ds = bf->bf_desc; 2234b8e788a5SAdrian Chadd /* XXX check return value? */ 2235eb6f0de0SAdrian Chadd 2236eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 2237eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 2238eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 2239eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 224012087a07SAdrian Chadd bf->bf_state.bfs_txpower = MIN(params->ibp_power, 224112087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2242eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 2243eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 2244eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 2245eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = txantenna; 2246875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 2247eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = 2248eb6f0de0SAdrian Chadd !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2249b8e788a5SAdrian Chadd 225046634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 225146634305SAdrian Chadd bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); 2252fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum; 225346634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 225446634305SAdrian Chadd 2255eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 2256eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 2257eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 2258eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 2259eb6f0de0SAdrian Chadd 2260eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 2261eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 2262eb6f0de0SAdrian Chadd 2263*f5c30c4eSAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 2264eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 2265eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 2266c1782ce0SAdrian Chadd 2267c1782ce0SAdrian Chadd if (ismrr) { 2268eb6f0de0SAdrian Chadd int rix; 2269c1782ce0SAdrian Chadd 2270b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate1); 2271eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].rix = rix; 2272eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].tries = params->ibp_try1; 2273c1782ce0SAdrian Chadd 2274eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate2); 2275eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].rix = rix; 2276eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].tries = params->ibp_try2; 2277eb6f0de0SAdrian Chadd 2278eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate3); 2279eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = rix; 2280eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = params->ibp_try3; 2281c1782ce0SAdrian Chadd } 2282eb6f0de0SAdrian Chadd /* 2283eb6f0de0SAdrian Chadd * All the required rate control decisions have been made; 2284eb6f0de0SAdrian Chadd * fill in the rc flags. 2285eb6f0de0SAdrian Chadd */ 2286eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 2287b8e788a5SAdrian Chadd 2288b8e788a5SAdrian Chadd /* NB: no buffered multicast in power save support */ 2289eb6f0de0SAdrian Chadd 2290eb6f0de0SAdrian Chadd /* 2291eb6f0de0SAdrian Chadd * If we're overiding the ADDBA destination, dump directly 2292eb6f0de0SAdrian Chadd * into the hardware queue, right after any pending 2293eb6f0de0SAdrian Chadd * frames to that node are. 2294eb6f0de0SAdrian Chadd */ 2295eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n", 2296eb6f0de0SAdrian Chadd __func__, do_override); 2297eb6f0de0SAdrian Chadd 229894eefcf1SAdrian Chadd #if 1 229922a3aee6SAdrian Chadd /* 230022a3aee6SAdrian Chadd * Put addba frames in the right place in the right TID/HWQ. 230122a3aee6SAdrian Chadd */ 2302eb6f0de0SAdrian Chadd if (do_override) { 23034e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 230422a3aee6SAdrian Chadd /* 230522a3aee6SAdrian Chadd * XXX if it's addba frames, should we be leaking 230622a3aee6SAdrian Chadd * them out via the frame leak method? 230722a3aee6SAdrian Chadd * XXX for now let's not risk it; but we may wish 230822a3aee6SAdrian Chadd * to investigate this later. 230922a3aee6SAdrian Chadd */ 2310eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 231122a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 231222a3aee6SAdrian Chadd &queue_to_head)) { 2313eb6f0de0SAdrian Chadd /* Queue to software queue */ 231422a3aee6SAdrian Chadd ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf); 231522a3aee6SAdrian Chadd } else { 231622a3aee6SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 231722a3aee6SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2318eb6f0de0SAdrian Chadd } 231994eefcf1SAdrian Chadd #else 232094eefcf1SAdrian Chadd /* Direct-dispatch to the hardware */ 232194eefcf1SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 232222a3aee6SAdrian Chadd /* 232322a3aee6SAdrian Chadd * Update the current leak count if 232422a3aee6SAdrian Chadd * we're leaking frames; and set the 232522a3aee6SAdrian Chadd * MORE flag as appropriate. 232622a3aee6SAdrian Chadd */ 232722a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 232894eefcf1SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 232994eefcf1SAdrian Chadd #endif 2330b8e788a5SAdrian Chadd return 0; 2331b8e788a5SAdrian Chadd } 2332b8e788a5SAdrian Chadd 2333eb6f0de0SAdrian Chadd /* 2334eb6f0de0SAdrian Chadd * Send a raw frame. 2335eb6f0de0SAdrian Chadd * 2336eb6f0de0SAdrian Chadd * This can be called by net80211. 2337eb6f0de0SAdrian Chadd */ 2338b8e788a5SAdrian Chadd int 2339b8e788a5SAdrian Chadd ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2340b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2341b8e788a5SAdrian Chadd { 2342b8e788a5SAdrian Chadd struct ieee80211com *ic = ni->ni_ic; 2343b8e788a5SAdrian Chadd struct ifnet *ifp = ic->ic_ifp; 2344b8e788a5SAdrian Chadd struct ath_softc *sc = ifp->if_softc; 2345b8e788a5SAdrian Chadd struct ath_buf *bf; 23469c85ff91SAdrian Chadd struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *); 23479c85ff91SAdrian Chadd int error = 0; 2348b8e788a5SAdrian Chadd 2349ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2350ef27340cSAdrian Chadd if (sc->sc_inreset_cnt > 0) { 235183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 235283bbd5ebSRui Paulo "%s: sc_inreset_cnt > 0; bailing\n", __func__); 2353ef27340cSAdrian Chadd error = EIO; 2354ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2355*f5c30c4eSAdrian Chadd goto badbad; 2356ef27340cSAdrian Chadd } 2357ef27340cSAdrian Chadd sc->sc_txstart_cnt++; 2358ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2359ef27340cSAdrian Chadd 2360*f5c30c4eSAdrian Chadd /* Wake the hardware up already */ 2361*f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2362*f5c30c4eSAdrian Chadd ath_power_set_power_state(sc, HAL_PM_AWAKE); 2363*f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2364*f5c30c4eSAdrian Chadd 23651b5c5f5aSAdrian Chadd ATH_TX_LOCK(sc); 23661b5c5f5aSAdrian Chadd 2367b8e788a5SAdrian Chadd if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) { 2368b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__, 2369b8e788a5SAdrian Chadd (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ? 2370b8e788a5SAdrian Chadd "!running" : "invalid"); 2371b8e788a5SAdrian Chadd m_freem(m); 2372b8e788a5SAdrian Chadd error = ENETDOWN; 2373b8e788a5SAdrian Chadd goto bad; 2374b8e788a5SAdrian Chadd } 23759c85ff91SAdrian Chadd 23769c85ff91SAdrian Chadd /* 23779c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 23789c85ff91SAdrian Chadd * 23799c85ff91SAdrian Chadd * XXX duplicated in ath_tx_start(). 23809c85ff91SAdrian Chadd */ 23819c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 238292e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 238392e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 23849c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 23859c85ff91SAdrian Chadd error = ENOBUFS; 23869c85ff91SAdrian Chadd } 23879c85ff91SAdrian Chadd 23889c85ff91SAdrian Chadd if (error != 0) { 23899c85ff91SAdrian Chadd m_freem(m); 23909c85ff91SAdrian Chadd goto bad; 23919c85ff91SAdrian Chadd } 23929c85ff91SAdrian Chadd } 23939c85ff91SAdrian Chadd 2394b8e788a5SAdrian Chadd /* 2395b8e788a5SAdrian Chadd * Grab a TX buffer and associated resources. 2396b8e788a5SAdrian Chadd */ 2397af33d486SAdrian Chadd bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT); 2398b8e788a5SAdrian Chadd if (bf == NULL) { 2399b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nobuf++; 2400b8e788a5SAdrian Chadd m_freem(m); 2401b8e788a5SAdrian Chadd error = ENOBUFS; 2402b8e788a5SAdrian Chadd goto bad; 2403b8e788a5SAdrian Chadd } 240403682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n", 240503682514SAdrian Chadd m, params, bf); 2406b8e788a5SAdrian Chadd 2407b8e788a5SAdrian Chadd if (params == NULL) { 2408b8e788a5SAdrian Chadd /* 2409b8e788a5SAdrian Chadd * Legacy path; interpret frame contents to decide 2410b8e788a5SAdrian Chadd * precisely how to send the frame. 2411b8e788a5SAdrian Chadd */ 2412b8e788a5SAdrian Chadd if (ath_tx_start(sc, ni, bf, m)) { 2413b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2414b8e788a5SAdrian Chadd goto bad2; 2415b8e788a5SAdrian Chadd } 2416b8e788a5SAdrian Chadd } else { 2417b8e788a5SAdrian Chadd /* 2418b8e788a5SAdrian Chadd * Caller supplied explicit parameters to use in 2419b8e788a5SAdrian Chadd * sending the frame. 2420b8e788a5SAdrian Chadd */ 2421b8e788a5SAdrian Chadd if (ath_tx_raw_start(sc, ni, bf, m, params)) { 2422b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2423b8e788a5SAdrian Chadd goto bad2; 2424b8e788a5SAdrian Chadd } 2425b8e788a5SAdrian Chadd } 2426b8e788a5SAdrian Chadd sc->sc_wd_timer = 5; 2427b8e788a5SAdrian Chadd ifp->if_opackets++; 2428b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw++; 2429b8e788a5SAdrian Chadd 2430548a605dSAdrian Chadd /* 2431548a605dSAdrian Chadd * Update the TIM - if there's anything queued to the 2432548a605dSAdrian Chadd * software queue and power save is enabled, we should 2433548a605dSAdrian Chadd * set the TIM. 2434548a605dSAdrian Chadd */ 2435548a605dSAdrian Chadd ath_tx_update_tim(sc, ni, 1); 2436548a605dSAdrian Chadd 2437974185bbSAdrian Chadd ATH_TX_UNLOCK(sc); 2438974185bbSAdrian Chadd 2439ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2440ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2441ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2442ef27340cSAdrian Chadd 2443*f5c30c4eSAdrian Chadd 2444*f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */ 2445*f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2446*f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc); 2447*f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2448*f5c30c4eSAdrian Chadd 2449b8e788a5SAdrian Chadd return 0; 2450*f5c30c4eSAdrian Chadd 2451b8e788a5SAdrian Chadd bad2: 245203682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, " 245303682514SAdrian Chadd "bf=%p", 245403682514SAdrian Chadd m, 245503682514SAdrian Chadd params, 245603682514SAdrian Chadd bf); 2457b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 2458e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 2459b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 24601b5c5f5aSAdrian Chadd 2461*f5c30c4eSAdrian Chadd bad: 24621b5c5f5aSAdrian Chadd ATH_TX_UNLOCK(sc); 24631b5c5f5aSAdrian Chadd 2464ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2465ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2466ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2467*f5c30c4eSAdrian Chadd 2468*f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */ 2469*f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2470*f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc); 2471*f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2472*f5c30c4eSAdrian Chadd 2473*f5c30c4eSAdrian Chadd badbad: 247403682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p", 247503682514SAdrian Chadd m, params); 2476b8e788a5SAdrian Chadd ifp->if_oerrors++; 2477b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw_fail++; 2478b8e788a5SAdrian Chadd ieee80211_free_node(ni); 2479ef27340cSAdrian Chadd 2480b8e788a5SAdrian Chadd return error; 2481b8e788a5SAdrian Chadd } 2482eb6f0de0SAdrian Chadd 2483eb6f0de0SAdrian Chadd /* Some helper functions */ 2484eb6f0de0SAdrian Chadd 2485eb6f0de0SAdrian Chadd /* 2486eb6f0de0SAdrian Chadd * ADDBA (and potentially others) need to be placed in the same 2487eb6f0de0SAdrian Chadd * hardware queue as the TID/node it's relating to. This is so 2488eb6f0de0SAdrian Chadd * it goes out after any pending non-aggregate frames to the 2489eb6f0de0SAdrian Chadd * same node/TID. 2490eb6f0de0SAdrian Chadd * 2491eb6f0de0SAdrian Chadd * If this isn't done, the ADDBA can go out before the frames 2492eb6f0de0SAdrian Chadd * queued in hardware. Even though these frames have a sequence 2493eb6f0de0SAdrian Chadd * number -earlier- than the ADDBA can be transmitted (but 2494eb6f0de0SAdrian Chadd * no frames whose sequence numbers are after the ADDBA should 2495eb6f0de0SAdrian Chadd * be!) they'll arrive after the ADDBA - and the receiving end 2496eb6f0de0SAdrian Chadd * will simply drop them as being out of the BAW. 2497eb6f0de0SAdrian Chadd * 2498eb6f0de0SAdrian Chadd * The frames can't be appended to the TID software queue - it'll 2499eb6f0de0SAdrian Chadd * never be sent out. So these frames have to be directly 2500eb6f0de0SAdrian Chadd * dispatched to the hardware, rather than queued in software. 2501eb6f0de0SAdrian Chadd * So if this function returns true, the TXQ has to be 2502eb6f0de0SAdrian Chadd * overridden and it has to be directly dispatched. 2503eb6f0de0SAdrian Chadd * 2504eb6f0de0SAdrian Chadd * It's a dirty hack, but someone's gotta do it. 2505eb6f0de0SAdrian Chadd */ 2506eb6f0de0SAdrian Chadd 2507eb6f0de0SAdrian Chadd /* 2508eb6f0de0SAdrian Chadd * XXX doesn't belong here! 2509eb6f0de0SAdrian Chadd */ 2510eb6f0de0SAdrian Chadd static int 2511eb6f0de0SAdrian Chadd ieee80211_is_action(struct ieee80211_frame *wh) 2512eb6f0de0SAdrian Chadd { 2513eb6f0de0SAdrian Chadd /* Type: Management frame? */ 2514eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != 2515eb6f0de0SAdrian Chadd IEEE80211_FC0_TYPE_MGT) 2516eb6f0de0SAdrian Chadd return 0; 2517eb6f0de0SAdrian Chadd 2518eb6f0de0SAdrian Chadd /* Subtype: Action frame? */ 2519eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) != 2520eb6f0de0SAdrian Chadd IEEE80211_FC0_SUBTYPE_ACTION) 2521eb6f0de0SAdrian Chadd return 0; 2522eb6f0de0SAdrian Chadd 2523eb6f0de0SAdrian Chadd return 1; 2524eb6f0de0SAdrian Chadd } 2525eb6f0de0SAdrian Chadd 2526eb6f0de0SAdrian Chadd #define MS(_v, _f) (((_v) & _f) >> _f##_S) 2527eb6f0de0SAdrian Chadd /* 2528eb6f0de0SAdrian Chadd * Return an alternate TID for ADDBA request frames. 2529eb6f0de0SAdrian Chadd * 2530eb6f0de0SAdrian Chadd * Yes, this likely should be done in the net80211 layer. 2531eb6f0de0SAdrian Chadd */ 2532eb6f0de0SAdrian Chadd static int 2533eb6f0de0SAdrian Chadd ath_tx_action_frame_override_queue(struct ath_softc *sc, 2534eb6f0de0SAdrian Chadd struct ieee80211_node *ni, 2535eb6f0de0SAdrian Chadd struct mbuf *m0, int *tid) 2536eb6f0de0SAdrian Chadd { 2537eb6f0de0SAdrian Chadd struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 2538eb6f0de0SAdrian Chadd struct ieee80211_action_ba_addbarequest *ia; 2539eb6f0de0SAdrian Chadd uint8_t *frm; 2540eb6f0de0SAdrian Chadd uint16_t baparamset; 2541eb6f0de0SAdrian Chadd 2542eb6f0de0SAdrian Chadd /* Not action frame? Bail */ 2543eb6f0de0SAdrian Chadd if (! ieee80211_is_action(wh)) 2544eb6f0de0SAdrian Chadd return 0; 2545eb6f0de0SAdrian Chadd 2546eb6f0de0SAdrian Chadd /* XXX Not needed for frames we send? */ 2547eb6f0de0SAdrian Chadd #if 0 2548eb6f0de0SAdrian Chadd /* Correct length? */ 2549eb6f0de0SAdrian Chadd if (! ieee80211_parse_action(ni, m)) 2550eb6f0de0SAdrian Chadd return 0; 2551eb6f0de0SAdrian Chadd #endif 2552eb6f0de0SAdrian Chadd 2553eb6f0de0SAdrian Chadd /* Extract out action frame */ 2554eb6f0de0SAdrian Chadd frm = (u_int8_t *)&wh[1]; 2555eb6f0de0SAdrian Chadd ia = (struct ieee80211_action_ba_addbarequest *) frm; 2556eb6f0de0SAdrian Chadd 2557eb6f0de0SAdrian Chadd /* Not ADDBA? Bail */ 2558eb6f0de0SAdrian Chadd if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA) 2559eb6f0de0SAdrian Chadd return 0; 2560eb6f0de0SAdrian Chadd if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST) 2561eb6f0de0SAdrian Chadd return 0; 2562eb6f0de0SAdrian Chadd 2563eb6f0de0SAdrian Chadd /* Extract TID, return it */ 2564eb6f0de0SAdrian Chadd baparamset = le16toh(ia->rq_baparamset); 2565eb6f0de0SAdrian Chadd *tid = (int) MS(baparamset, IEEE80211_BAPS_TID); 2566eb6f0de0SAdrian Chadd 2567eb6f0de0SAdrian Chadd return 1; 2568eb6f0de0SAdrian Chadd } 2569eb6f0de0SAdrian Chadd #undef MS 2570eb6f0de0SAdrian Chadd 2571eb6f0de0SAdrian Chadd /* Per-node software queue operations */ 2572eb6f0de0SAdrian Chadd 2573eb6f0de0SAdrian Chadd /* 2574eb6f0de0SAdrian Chadd * Add the current packet to the given BAW. 2575eb6f0de0SAdrian Chadd * It is assumed that the current packet 2576eb6f0de0SAdrian Chadd * 2577eb6f0de0SAdrian Chadd * + fits inside the BAW; 2578eb6f0de0SAdrian Chadd * + already has had a sequence number allocated. 2579eb6f0de0SAdrian Chadd * 2580eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2581eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2582eb6f0de0SAdrian Chadd */ 2583eb6f0de0SAdrian Chadd void 2584eb6f0de0SAdrian Chadd ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an, 2585eb6f0de0SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 2586eb6f0de0SAdrian Chadd { 2587eb6f0de0SAdrian Chadd int index, cindex; 2588eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2589eb6f0de0SAdrian Chadd 2590375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2591eb6f0de0SAdrian Chadd 2592eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_isretried) 2593eb6f0de0SAdrian Chadd return; 2594eb6f0de0SAdrian Chadd 2595c7c07341SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2596c7c07341SAdrian Chadd 25977561cb5cSAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 259883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 25997561cb5cSAdrian Chadd "%s: dobaw=0, seqno=%d, window %d:%d\n", 260083bbd5ebSRui Paulo __func__, SEQNO(bf->bf_state.bfs_seqno), 260183bbd5ebSRui Paulo tap->txa_start, tap->txa_wnd); 26027561cb5cSAdrian Chadd } 26037561cb5cSAdrian Chadd 2604eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_addedbaw) 260583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2606a108d2d6SAdrian Chadd "%s: re-added? tid=%d, seqno %d; window %d:%d; " 2607d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2608a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2609d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 2610d4365d16SAdrian Chadd tid->baw_tail); 2611eb6f0de0SAdrian Chadd 2612eb6f0de0SAdrian Chadd /* 26137561cb5cSAdrian Chadd * Verify that the given sequence number is not outside of the 26147561cb5cSAdrian Chadd * BAW. Complain loudly if that's the case. 26157561cb5cSAdrian Chadd */ 26167561cb5cSAdrian Chadd if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 26177561cb5cSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno))) { 261883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 26197561cb5cSAdrian Chadd "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; " 26207561cb5cSAdrian Chadd "baw head=%d tail=%d\n", 26217561cb5cSAdrian Chadd __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 26227561cb5cSAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 26237561cb5cSAdrian Chadd tid->baw_tail); 26247561cb5cSAdrian Chadd } 26257561cb5cSAdrian Chadd 26267561cb5cSAdrian Chadd /* 2627eb6f0de0SAdrian Chadd * ni->ni_txseqs[] is the currently allocated seqno. 2628eb6f0de0SAdrian Chadd * the txa state contains the current baw start. 2629eb6f0de0SAdrian Chadd */ 2630eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno)); 2631eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2632eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2633a108d2d6SAdrian Chadd "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d " 2634d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2635a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2636d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head, 2637d4365d16SAdrian Chadd tid->baw_tail); 2638eb6f0de0SAdrian Chadd 2639eb6f0de0SAdrian Chadd 2640eb6f0de0SAdrian Chadd #if 0 2641eb6f0de0SAdrian Chadd assert(tid->tx_buf[cindex] == NULL); 2642eb6f0de0SAdrian Chadd #endif 2643eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != NULL) { 264483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2645eb6f0de0SAdrian Chadd "%s: ba packet dup (index=%d, cindex=%d, " 2646eb6f0de0SAdrian Chadd "head=%d, tail=%d)\n", 2647eb6f0de0SAdrian Chadd __func__, index, cindex, tid->baw_head, tid->baw_tail); 264883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2649eb6f0de0SAdrian Chadd "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n", 2650eb6f0de0SAdrian Chadd __func__, 2651eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 2652eb6f0de0SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno), 2653eb6f0de0SAdrian Chadd bf, 2654eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno) 2655eb6f0de0SAdrian Chadd ); 2656eb6f0de0SAdrian Chadd } 2657eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = bf; 2658eb6f0de0SAdrian Chadd 2659d4365d16SAdrian Chadd if (index >= ((tid->baw_tail - tid->baw_head) & 2660d4365d16SAdrian Chadd (ATH_TID_MAX_BUFS - 1))) { 2661eb6f0de0SAdrian Chadd tid->baw_tail = cindex; 2662eb6f0de0SAdrian Chadd INCR(tid->baw_tail, ATH_TID_MAX_BUFS); 2663eb6f0de0SAdrian Chadd } 2664eb6f0de0SAdrian Chadd } 2665eb6f0de0SAdrian Chadd 2666eb6f0de0SAdrian Chadd /* 266738962489SAdrian Chadd * Flip the BAW buffer entry over from the existing one to the new one. 266838962489SAdrian Chadd * 266938962489SAdrian Chadd * When software retransmitting a (sub-)frame, it is entirely possible that 267038962489SAdrian Chadd * the frame ath_buf is marked as BUSY and can't be immediately reused. 267138962489SAdrian Chadd * In that instance the buffer is cloned and the new buffer is used for 267238962489SAdrian Chadd * retransmit. We thus need to update the ath_buf slot in the BAW buf 267338962489SAdrian Chadd * tracking array to maintain consistency. 267438962489SAdrian Chadd */ 267538962489SAdrian Chadd static void 267638962489SAdrian Chadd ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an, 267738962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf) 267838962489SAdrian Chadd { 267938962489SAdrian Chadd int index, cindex; 268038962489SAdrian Chadd struct ieee80211_tx_ampdu *tap; 268138962489SAdrian Chadd int seqno = SEQNO(old_bf->bf_state.bfs_seqno); 268238962489SAdrian Chadd 2683375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 268438962489SAdrian Chadd 268538962489SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 268638962489SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 268738962489SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 268838962489SAdrian Chadd 268938962489SAdrian Chadd /* 269038962489SAdrian Chadd * Just warn for now; if it happens then we should find out 269138962489SAdrian Chadd * about it. It's highly likely the aggregation session will 269238962489SAdrian Chadd * soon hang. 269338962489SAdrian Chadd */ 269438962489SAdrian Chadd if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) { 269583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 269683bbd5ebSRui Paulo "%s: retransmitted buffer" 269738962489SAdrian Chadd " has mismatching seqno's, BA session may hang.\n", 269838962489SAdrian Chadd __func__); 269983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 270083bbd5ebSRui Paulo "%s: old seqno=%d, new_seqno=%d\n", __func__, 270183bbd5ebSRui Paulo old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno); 270238962489SAdrian Chadd } 270338962489SAdrian Chadd 270438962489SAdrian Chadd if (tid->tx_buf[cindex] != old_bf) { 270583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 270683bbd5ebSRui Paulo "%s: ath_buf pointer incorrect; " 270783bbd5ebSRui Paulo " has m BA session may hang.\n", __func__); 270883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 270983bbd5ebSRui Paulo "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf); 271038962489SAdrian Chadd } 271138962489SAdrian Chadd 271238962489SAdrian Chadd tid->tx_buf[cindex] = new_bf; 271338962489SAdrian Chadd } 271438962489SAdrian Chadd 271538962489SAdrian Chadd /* 2716eb6f0de0SAdrian Chadd * seq_start - left edge of BAW 2717eb6f0de0SAdrian Chadd * seq_next - current/next sequence number to allocate 2718eb6f0de0SAdrian Chadd * 2719eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2720eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2721eb6f0de0SAdrian Chadd */ 2722eb6f0de0SAdrian Chadd static void 2723eb6f0de0SAdrian Chadd ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an, 2724eb6f0de0SAdrian Chadd struct ath_tid *tid, const struct ath_buf *bf) 2725eb6f0de0SAdrian Chadd { 2726eb6f0de0SAdrian Chadd int index, cindex; 2727eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2728eb6f0de0SAdrian Chadd int seqno = SEQNO(bf->bf_state.bfs_seqno); 2729eb6f0de0SAdrian Chadd 2730375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2731eb6f0de0SAdrian Chadd 2732eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2733eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 2734eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2735eb6f0de0SAdrian Chadd 2736eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2737a108d2d6SAdrian Chadd "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, " 2738d4365d16SAdrian Chadd "baw head=%d, tail=%d\n", 2739a108d2d6SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index, 2740eb6f0de0SAdrian Chadd cindex, tid->baw_head, tid->baw_tail); 2741eb6f0de0SAdrian Chadd 2742eb6f0de0SAdrian Chadd /* 2743eb6f0de0SAdrian Chadd * If this occurs then we have a big problem - something else 2744eb6f0de0SAdrian Chadd * has slid tap->txa_start along without updating the BAW 2745eb6f0de0SAdrian Chadd * tracking start/end pointers. Thus the TX BAW state is now 2746eb6f0de0SAdrian Chadd * completely busted. 2747eb6f0de0SAdrian Chadd * 2748eb6f0de0SAdrian Chadd * But for now, since I haven't yet fixed TDMA and buffer cloning, 2749eb6f0de0SAdrian Chadd * it's quite possible that a cloned buffer is making its way 2750eb6f0de0SAdrian Chadd * here and causing it to fire off. Disable TDMA for now. 2751eb6f0de0SAdrian Chadd */ 2752eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != bf) { 275383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2754eb6f0de0SAdrian Chadd "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n", 275583bbd5ebSRui Paulo __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 2756eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 27573527f6a9SAdrian Chadd (tid->tx_buf[cindex] != NULL) ? 27583527f6a9SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1); 2759eb6f0de0SAdrian Chadd } 2760eb6f0de0SAdrian Chadd 2761eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = NULL; 2762eb6f0de0SAdrian Chadd 2763d4365d16SAdrian Chadd while (tid->baw_head != tid->baw_tail && 2764d4365d16SAdrian Chadd !tid->tx_buf[tid->baw_head]) { 2765eb6f0de0SAdrian Chadd INCR(tap->txa_start, IEEE80211_SEQ_RANGE); 2766eb6f0de0SAdrian Chadd INCR(tid->baw_head, ATH_TID_MAX_BUFS); 2767eb6f0de0SAdrian Chadd } 2768d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 276942fdd8e7SAdrian Chadd "%s: tid=%d: baw is now %d:%d, baw head=%d\n", 277042fdd8e7SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head); 2771eb6f0de0SAdrian Chadd } 2772eb6f0de0SAdrian Chadd 277322a3aee6SAdrian Chadd static void 277422a3aee6SAdrian Chadd ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid, 277522a3aee6SAdrian Chadd struct ath_buf *bf) 277622a3aee6SAdrian Chadd { 277722a3aee6SAdrian Chadd struct ieee80211_frame *wh; 277822a3aee6SAdrian Chadd 277922a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 278022a3aee6SAdrian Chadd 278122a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 278222a3aee6SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 278322a3aee6SAdrian Chadd 278422a3aee6SAdrian Chadd /* 278522a3aee6SAdrian Chadd * Update MORE based on the software/net80211 queue states. 278622a3aee6SAdrian Chadd */ 278722a3aee6SAdrian Chadd if ((tid->an->an_stack_psq > 0) 278822a3aee6SAdrian Chadd || (tid->an->an_swq_depth > 0)) 278922a3aee6SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 279022a3aee6SAdrian Chadd else 279122a3aee6SAdrian Chadd wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA; 279222a3aee6SAdrian Chadd 279322a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE, 279422a3aee6SAdrian Chadd "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n", 279522a3aee6SAdrian Chadd __func__, 279622a3aee6SAdrian Chadd tid->an->an_node.ni_macaddr, 279722a3aee6SAdrian Chadd ":", 279822a3aee6SAdrian Chadd tid->an->an_leak_count, 279922a3aee6SAdrian Chadd tid->an->an_stack_psq, 280022a3aee6SAdrian Chadd tid->an->an_swq_depth, 280122a3aee6SAdrian Chadd !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA)); 280222a3aee6SAdrian Chadd 280322a3aee6SAdrian Chadd /* 280422a3aee6SAdrian Chadd * Re-sync the underlying buffer. 280522a3aee6SAdrian Chadd */ 280622a3aee6SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 280722a3aee6SAdrian Chadd BUS_DMASYNC_PREWRITE); 280822a3aee6SAdrian Chadd 280922a3aee6SAdrian Chadd tid->an->an_leak_count --; 281022a3aee6SAdrian Chadd } 281122a3aee6SAdrian Chadd } 281222a3aee6SAdrian Chadd 281322a3aee6SAdrian Chadd static int 281422a3aee6SAdrian Chadd ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid) 281522a3aee6SAdrian Chadd { 281622a3aee6SAdrian Chadd 281722a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 281822a3aee6SAdrian Chadd 281922a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 282022a3aee6SAdrian Chadd return (1); 282122a3aee6SAdrian Chadd } 282222a3aee6SAdrian Chadd if (tid->paused) 282322a3aee6SAdrian Chadd return (0); 282422a3aee6SAdrian Chadd return (1); 282522a3aee6SAdrian Chadd } 282622a3aee6SAdrian Chadd 2827eb6f0de0SAdrian Chadd /* 2828eb6f0de0SAdrian Chadd * Mark the current node/TID as ready to TX. 2829eb6f0de0SAdrian Chadd * 2830eb6f0de0SAdrian Chadd * This is done to make it easy for the software scheduler to 2831eb6f0de0SAdrian Chadd * find which nodes have data to send. 2832eb6f0de0SAdrian Chadd * 2833eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2834eb6f0de0SAdrian Chadd */ 283522a3aee6SAdrian Chadd void 2836eb6f0de0SAdrian Chadd ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid) 2837eb6f0de0SAdrian Chadd { 2838eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2839eb6f0de0SAdrian Chadd 2840375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2841eb6f0de0SAdrian Chadd 284222a3aee6SAdrian Chadd /* 284322a3aee6SAdrian Chadd * If we are leaking out a frame to this destination 284422a3aee6SAdrian Chadd * for PS-POLL, ensure that we allow scheduling to 284522a3aee6SAdrian Chadd * occur. 284622a3aee6SAdrian Chadd */ 284722a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 2848eb6f0de0SAdrian Chadd return; /* paused, can't schedule yet */ 2849eb6f0de0SAdrian Chadd 2850eb6f0de0SAdrian Chadd if (tid->sched) 2851eb6f0de0SAdrian Chadd return; /* already scheduled */ 2852eb6f0de0SAdrian Chadd 2853eb6f0de0SAdrian Chadd tid->sched = 1; 2854eb6f0de0SAdrian Chadd 285522a3aee6SAdrian Chadd #if 0 285622a3aee6SAdrian Chadd /* 285722a3aee6SAdrian Chadd * If this is a sleeping node we're leaking to, given 285822a3aee6SAdrian Chadd * it a higher priority. This is so bad for QoS it hurts. 285922a3aee6SAdrian Chadd */ 286022a3aee6SAdrian Chadd if (tid->an->an_leak_count) { 286122a3aee6SAdrian Chadd TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem); 286222a3aee6SAdrian Chadd } else { 286322a3aee6SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 286422a3aee6SAdrian Chadd } 286522a3aee6SAdrian Chadd #endif 286622a3aee6SAdrian Chadd 286722a3aee6SAdrian Chadd /* 286822a3aee6SAdrian Chadd * We can't do the above - it'll confuse the TXQ software 286922a3aee6SAdrian Chadd * scheduler which will keep checking the _head_ TID 287022a3aee6SAdrian Chadd * in the list to see if it has traffic. If we queue 287122a3aee6SAdrian Chadd * a TID to the head of the list and it doesn't transmit, 287222a3aee6SAdrian Chadd * we'll check it again. 287322a3aee6SAdrian Chadd * 287422a3aee6SAdrian Chadd * So, get the rest of this leaking frames support working 287522a3aee6SAdrian Chadd * and reliable first and _then_ optimise it so they're 287622a3aee6SAdrian Chadd * pushed out in front of any other pending software 287722a3aee6SAdrian Chadd * queued nodes. 287822a3aee6SAdrian Chadd */ 2879eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2880eb6f0de0SAdrian Chadd } 2881eb6f0de0SAdrian Chadd 2882eb6f0de0SAdrian Chadd /* 2883eb6f0de0SAdrian Chadd * Mark the current node as no longer needing to be polled for 2884eb6f0de0SAdrian Chadd * TX packets. 2885eb6f0de0SAdrian Chadd * 2886eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2887eb6f0de0SAdrian Chadd */ 2888eb6f0de0SAdrian Chadd static void 2889eb6f0de0SAdrian Chadd ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid) 2890eb6f0de0SAdrian Chadd { 2891eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2892eb6f0de0SAdrian Chadd 2893375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2894eb6f0de0SAdrian Chadd 2895eb6f0de0SAdrian Chadd if (tid->sched == 0) 2896eb6f0de0SAdrian Chadd return; 2897eb6f0de0SAdrian Chadd 2898eb6f0de0SAdrian Chadd tid->sched = 0; 2899eb6f0de0SAdrian Chadd TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem); 2900eb6f0de0SAdrian Chadd } 2901eb6f0de0SAdrian Chadd 2902eb6f0de0SAdrian Chadd /* 2903eb6f0de0SAdrian Chadd * Assign a sequence number manually to the given frame. 2904eb6f0de0SAdrian Chadd * 2905eb6f0de0SAdrian Chadd * This should only be called for A-MPDU TX frames. 2906eb6f0de0SAdrian Chadd */ 2907a108d2d6SAdrian Chadd static ieee80211_seq 2908eb6f0de0SAdrian Chadd ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni, 2909eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 2910eb6f0de0SAdrian Chadd { 2911eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 2912eb6f0de0SAdrian Chadd int tid, pri; 2913eb6f0de0SAdrian Chadd ieee80211_seq seqno; 2914eb6f0de0SAdrian Chadd uint8_t subtype; 2915eb6f0de0SAdrian Chadd 2916eb6f0de0SAdrian Chadd /* TID lookup */ 2917eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2918eb6f0de0SAdrian Chadd pri = M_WME_GETAC(m0); /* honor classification */ 2919eb6f0de0SAdrian Chadd tid = WME_AC_TO_TID(pri); 2920a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n", 2921a108d2d6SAdrian Chadd __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2922eb6f0de0SAdrian Chadd 2923eb6f0de0SAdrian Chadd /* XXX Is it a control frame? Ignore */ 2924eb6f0de0SAdrian Chadd 2925eb6f0de0SAdrian Chadd /* Does the packet require a sequence number? */ 2926eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 2927eb6f0de0SAdrian Chadd return -1; 2928eb6f0de0SAdrian Chadd 2929375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 29307561cb5cSAdrian Chadd 2931eb6f0de0SAdrian Chadd /* 2932eb6f0de0SAdrian Chadd * Is it a QOS NULL Data frame? Give it a sequence number from 2933eb6f0de0SAdrian Chadd * the default TID (IEEE80211_NONQOS_TID.) 2934eb6f0de0SAdrian Chadd * 2935eb6f0de0SAdrian Chadd * The RX path of everything I've looked at doesn't include the NULL 2936eb6f0de0SAdrian Chadd * data frame sequence number in the aggregation state updates, so 2937eb6f0de0SAdrian Chadd * assigning it a sequence number there will cause a BAW hole on the 2938eb6f0de0SAdrian Chadd * RX side. 2939eb6f0de0SAdrian Chadd */ 2940eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2941eb6f0de0SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) { 29427561cb5cSAdrian Chadd /* XXX no locking for this TID? This is a bit of a problem. */ 2943eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 2944eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 2945eb6f0de0SAdrian Chadd } else { 2946eb6f0de0SAdrian Chadd /* Manually assign sequence number */ 2947eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[tid]; 2948eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE); 2949eb6f0de0SAdrian Chadd } 2950eb6f0de0SAdrian Chadd *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); 2951eb6f0de0SAdrian Chadd M_SEQNO_SET(m0, seqno); 2952eb6f0de0SAdrian Chadd 2953eb6f0de0SAdrian Chadd /* Return so caller can do something with it if needed */ 2954a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: -> seqno=%d\n", __func__, seqno); 2955eb6f0de0SAdrian Chadd return seqno; 2956eb6f0de0SAdrian Chadd } 2957eb6f0de0SAdrian Chadd 2958eb6f0de0SAdrian Chadd /* 2959eb6f0de0SAdrian Chadd * Attempt to direct dispatch an aggregate frame to hardware. 2960eb6f0de0SAdrian Chadd * If the frame is out of BAW, queue. 2961eb6f0de0SAdrian Chadd * Otherwise, schedule it as a single frame. 2962eb6f0de0SAdrian Chadd */ 2963eb6f0de0SAdrian Chadd static void 296446634305SAdrian Chadd ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 296546634305SAdrian Chadd struct ath_txq *txq, struct ath_buf *bf) 2966eb6f0de0SAdrian Chadd { 2967eb6f0de0SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 2968eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2969eb6f0de0SAdrian Chadd 2970375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2971eb6f0de0SAdrian Chadd 2972eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2973eb6f0de0SAdrian Chadd 2974eb6f0de0SAdrian Chadd /* paused? queue */ 297522a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 29763e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 29770f04c5a2SAdrian Chadd /* XXX don't sched - we're paused! */ 2978eb6f0de0SAdrian Chadd return; 2979eb6f0de0SAdrian Chadd } 2980eb6f0de0SAdrian Chadd 2981eb6f0de0SAdrian Chadd /* outside baw? queue */ 2982eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw && 2983eb6f0de0SAdrian Chadd (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 2984eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)))) { 29853e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 2986eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 2987eb6f0de0SAdrian Chadd return; 2988eb6f0de0SAdrian Chadd } 2989eb6f0de0SAdrian Chadd 29902a9f83afSAdrian Chadd /* 29912a9f83afSAdrian Chadd * This is a temporary check and should be removed once 29922a9f83afSAdrian Chadd * all the relevant code paths have been fixed. 29932a9f83afSAdrian Chadd * 29942a9f83afSAdrian Chadd * During aggregate retries, it's possible that the head 29952a9f83afSAdrian Chadd * frame will fail (which has the bfs_aggr and bfs_nframes 29962a9f83afSAdrian Chadd * fields set for said aggregate) and will be retried as 29972a9f83afSAdrian Chadd * a single frame. In this instance, the values should 29982a9f83afSAdrian Chadd * be reset or the completion code will get upset with you. 29992a9f83afSAdrian Chadd */ 30002a9f83afSAdrian Chadd if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) { 3001b372f122SRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 300283bbd5ebSRui Paulo "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__, 300383bbd5ebSRui Paulo bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes); 30042a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 30052a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 30062a9f83afSAdrian Chadd } 30072a9f83afSAdrian Chadd 30084e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 30094e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 30104e81f27cSAdrian Chadd 3011eb6f0de0SAdrian Chadd /* Direct dispatch to hardware */ 3012eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 3013e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 3014e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 3015eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 3016e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 3017eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 3018eb6f0de0SAdrian Chadd 3019eb6f0de0SAdrian Chadd /* Statistics */ 3020eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_low_hwq_single_pkt++; 3021eb6f0de0SAdrian Chadd 3022eb6f0de0SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 3023eb6f0de0SAdrian Chadd tid->hwq_depth++; 3024eb6f0de0SAdrian Chadd 3025eb6f0de0SAdrian Chadd /* Add to BAW */ 3026eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 3027eb6f0de0SAdrian Chadd ath_tx_addto_baw(sc, an, tid, bf); 3028eb6f0de0SAdrian Chadd bf->bf_state.bfs_addedbaw = 1; 3029eb6f0de0SAdrian Chadd } 3030eb6f0de0SAdrian Chadd 3031eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 3032eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 3033eb6f0de0SAdrian Chadd 303422a3aee6SAdrian Chadd /* 303522a3aee6SAdrian Chadd * Update the current leak count if 303622a3aee6SAdrian Chadd * we're leaking frames; and set the 303722a3aee6SAdrian Chadd * MORE flag as appropriate. 303822a3aee6SAdrian Chadd */ 303922a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 304022a3aee6SAdrian Chadd 3041eb6f0de0SAdrian Chadd /* Hand off to hardware */ 3042eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 3043eb6f0de0SAdrian Chadd } 3044eb6f0de0SAdrian Chadd 3045eb6f0de0SAdrian Chadd /* 3046eb6f0de0SAdrian Chadd * Attempt to send the packet. 3047eb6f0de0SAdrian Chadd * If the queue isn't busy, direct-dispatch. 3048eb6f0de0SAdrian Chadd * If the queue is busy enough, queue the given packet on the 3049eb6f0de0SAdrian Chadd * relevant software queue. 3050eb6f0de0SAdrian Chadd */ 3051eb6f0de0SAdrian Chadd void 305222a3aee6SAdrian Chadd ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, 305322a3aee6SAdrian Chadd struct ath_txq *txq, int queue_to_head, struct ath_buf *bf) 3054eb6f0de0SAdrian Chadd { 3055eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 3056eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 3057eb6f0de0SAdrian Chadd struct ath_tid *atid; 3058eb6f0de0SAdrian Chadd int pri, tid; 3059eb6f0de0SAdrian Chadd struct mbuf *m0 = bf->bf_m; 3060eb6f0de0SAdrian Chadd 3061375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 30627561cb5cSAdrian Chadd 3063eb6f0de0SAdrian Chadd /* Fetch the TID - non-QoS frames get assigned to TID 16 */ 3064eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 3065eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 3066eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 3067eb6f0de0SAdrian Chadd atid = &an->an_tid[tid]; 3068eb6f0de0SAdrian Chadd 3069a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 3070a108d2d6SAdrian Chadd __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 3071eb6f0de0SAdrian Chadd 3072eb6f0de0SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 307346634305SAdrian Chadd /* XXX potentially duplicate info, re-check */ 3074eb6f0de0SAdrian Chadd bf->bf_state.bfs_tid = tid; 3075fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 3076eb6f0de0SAdrian Chadd bf->bf_state.bfs_pri = pri; 3077eb6f0de0SAdrian Chadd 3078eb6f0de0SAdrian Chadd /* 3079eb6f0de0SAdrian Chadd * If the hardware queue isn't busy, queue it directly. 3080eb6f0de0SAdrian Chadd * If the hardware queue is busy, queue it. 3081eb6f0de0SAdrian Chadd * If the TID is paused or the traffic it outside BAW, software 3082eb6f0de0SAdrian Chadd * queue it. 308322a3aee6SAdrian Chadd * 308422a3aee6SAdrian Chadd * If the node is in power-save and we're leaking a frame, 308522a3aee6SAdrian Chadd * leak a single frame. 3086eb6f0de0SAdrian Chadd */ 308722a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, atid)) { 3088eb6f0de0SAdrian Chadd /* TID is paused, queue */ 3089a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__); 309022a3aee6SAdrian Chadd /* 309122a3aee6SAdrian Chadd * If the caller requested that it be sent at a high 309222a3aee6SAdrian Chadd * priority, queue it at the head of the list. 309322a3aee6SAdrian Chadd */ 309422a3aee6SAdrian Chadd if (queue_to_head) 309522a3aee6SAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 309622a3aee6SAdrian Chadd else 30973e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3098eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_pending(sc, an, tid)) { 3099eb6f0de0SAdrian Chadd /* AMPDU pending; queue */ 3100a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__); 31013e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3102eb6f0de0SAdrian Chadd /* XXX sched? */ 3103eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_running(sc, an, tid)) { 3104eb6f0de0SAdrian Chadd /* AMPDU running, attempt direct dispatch if possible */ 310539f24578SAdrian Chadd 310639f24578SAdrian Chadd /* 310739f24578SAdrian Chadd * Always queue the frame to the tail of the list. 310839f24578SAdrian Chadd */ 31093e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 311039f24578SAdrian Chadd 311139f24578SAdrian Chadd /* 311239f24578SAdrian Chadd * If the hardware queue isn't busy, direct dispatch 311339f24578SAdrian Chadd * the head frame in the list. Don't schedule the 311439f24578SAdrian Chadd * TID - let it build some more frames first? 311539f24578SAdrian Chadd * 311672910f03SAdrian Chadd * When running A-MPDU, always just check the hardware 311772910f03SAdrian Chadd * queue depth against the aggregate frame limit. 311872910f03SAdrian Chadd * We don't want to burst a large number of single frames 311972910f03SAdrian Chadd * out to the hardware; we want to aggressively hold back. 312072910f03SAdrian Chadd * 312139f24578SAdrian Chadd * Otherwise, schedule the TID. 312239f24578SAdrian Chadd */ 312372910f03SAdrian Chadd /* XXX TXQ locking */ 312472910f03SAdrian Chadd if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_aggr) { 31253e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 31263e6cc97fSAdrian Chadd ATH_TID_REMOVE(atid, bf, bf_list); 31272a9f83afSAdrian Chadd 31282a9f83afSAdrian Chadd /* 31292a9f83afSAdrian Chadd * Ensure it's definitely treated as a non-AMPDU 31302a9f83afSAdrian Chadd * frame - this information may have been left 31312a9f83afSAdrian Chadd * over from a previous attempt. 31322a9f83afSAdrian Chadd */ 31332a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 31342a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 31352a9f83afSAdrian Chadd 31362a9f83afSAdrian Chadd /* Queue to the hardware */ 313746634305SAdrian Chadd ath_tx_xmit_aggr(sc, an, txq, bf); 3138a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3139a108d2d6SAdrian Chadd "%s: xmit_aggr\n", 3140a108d2d6SAdrian Chadd __func__); 3141d4365d16SAdrian Chadd } else { 3142d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3143a108d2d6SAdrian Chadd "%s: ampdu; swq'ing\n", 3144a108d2d6SAdrian Chadd __func__); 314503682514SAdrian Chadd 3146eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3147eb6f0de0SAdrian Chadd } 314872910f03SAdrian Chadd /* 314972910f03SAdrian Chadd * If we're not doing A-MPDU, be prepared to direct dispatch 315072910f03SAdrian Chadd * up to both limits if possible. This particular corner 315172910f03SAdrian Chadd * case may end up with packet starvation between aggregate 315272910f03SAdrian Chadd * traffic and non-aggregate traffic: we wnat to ensure 315372910f03SAdrian Chadd * that non-aggregate stations get a few frames queued to the 315472910f03SAdrian Chadd * hardware before the aggregate station(s) get their chance. 315572910f03SAdrian Chadd * 315672910f03SAdrian Chadd * So if you only ever see a couple of frames direct dispatched 315772910f03SAdrian Chadd * to the hardware from a non-AMPDU client, check both here 315872910f03SAdrian Chadd * and in the software queue dispatcher to ensure that those 315972910f03SAdrian Chadd * non-AMPDU stations get a fair chance to transmit. 316072910f03SAdrian Chadd */ 316172910f03SAdrian Chadd /* XXX TXQ locking */ 316272910f03SAdrian Chadd } else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) && 316372910f03SAdrian Chadd (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) { 3164eb6f0de0SAdrian Chadd /* AMPDU not running, attempt direct dispatch */ 3165a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__); 31660a544719SAdrian Chadd /* See if clrdmask needs to be set */ 31670a544719SAdrian Chadd ath_tx_update_clrdmask(sc, atid, bf); 316822a3aee6SAdrian Chadd 316922a3aee6SAdrian Chadd /* 317022a3aee6SAdrian Chadd * Update the current leak count if 317122a3aee6SAdrian Chadd * we're leaking frames; and set the 317222a3aee6SAdrian Chadd * MORE flag as appropriate. 317322a3aee6SAdrian Chadd */ 317422a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, atid, bf); 317522a3aee6SAdrian Chadd 317622a3aee6SAdrian Chadd /* 317722a3aee6SAdrian Chadd * Dispatch the frame. 317822a3aee6SAdrian Chadd */ 3179eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 3180eb6f0de0SAdrian Chadd } else { 3181eb6f0de0SAdrian Chadd /* Busy; queue */ 3182a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__); 31833e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3184eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3185eb6f0de0SAdrian Chadd } 3186eb6f0de0SAdrian Chadd } 3187eb6f0de0SAdrian Chadd 3188eb6f0de0SAdrian Chadd /* 31894f25ddbbSAdrian Chadd * Only set the clrdmask bit if none of the nodes are currently 31904f25ddbbSAdrian Chadd * filtered. 31914f25ddbbSAdrian Chadd * 31924f25ddbbSAdrian Chadd * XXX TODO: go through all the callers and check to see 31934f25ddbbSAdrian Chadd * which are being called in the context of looping over all 31944f25ddbbSAdrian Chadd * TIDs (eg, if all tids are being paused, resumed, etc.) 31954f25ddbbSAdrian Chadd * That'll avoid O(n^2) complexity here. 31964f25ddbbSAdrian Chadd */ 31974f25ddbbSAdrian Chadd static void 31984f25ddbbSAdrian Chadd ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an) 31994f25ddbbSAdrian Chadd { 32004f25ddbbSAdrian Chadd int i; 32014f25ddbbSAdrian Chadd 32024f25ddbbSAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 32034f25ddbbSAdrian Chadd 32044f25ddbbSAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 32054f25ddbbSAdrian Chadd if (an->an_tid[i].isfiltered == 1) 3206f74d878fSAdrian Chadd return; 32074f25ddbbSAdrian Chadd } 32084f25ddbbSAdrian Chadd an->clrdmask = 1; 32094f25ddbbSAdrian Chadd } 32104f25ddbbSAdrian Chadd 32114f25ddbbSAdrian Chadd /* 3212eb6f0de0SAdrian Chadd * Configure the per-TID node state. 3213eb6f0de0SAdrian Chadd * 3214eb6f0de0SAdrian Chadd * This likely belongs in if_ath_node.c but I can't think of anywhere 3215eb6f0de0SAdrian Chadd * else to put it just yet. 3216eb6f0de0SAdrian Chadd * 3217eb6f0de0SAdrian Chadd * This sets up the SLISTs and the mutex as appropriate. 3218eb6f0de0SAdrian Chadd */ 3219eb6f0de0SAdrian Chadd void 3220eb6f0de0SAdrian Chadd ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an) 3221eb6f0de0SAdrian Chadd { 3222eb6f0de0SAdrian Chadd int i, j; 3223eb6f0de0SAdrian Chadd struct ath_tid *atid; 3224eb6f0de0SAdrian Chadd 3225eb6f0de0SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3226eb6f0de0SAdrian Chadd atid = &an->an_tid[i]; 3227f1bc738eSAdrian Chadd 3228f1bc738eSAdrian Chadd /* XXX now with this bzer(), is the field 0'ing needed? */ 3229f1bc738eSAdrian Chadd bzero(atid, sizeof(*atid)); 3230f1bc738eSAdrian Chadd 32313e6cc97fSAdrian Chadd TAILQ_INIT(&atid->tid_q); 32323e6cc97fSAdrian Chadd TAILQ_INIT(&atid->filtq.tid_q); 3233eb6f0de0SAdrian Chadd atid->tid = i; 3234eb6f0de0SAdrian Chadd atid->an = an; 3235eb6f0de0SAdrian Chadd for (j = 0; j < ATH_TID_MAX_BUFS; j++) 3236eb6f0de0SAdrian Chadd atid->tx_buf[j] = NULL; 3237eb6f0de0SAdrian Chadd atid->baw_head = atid->baw_tail = 0; 3238eb6f0de0SAdrian Chadd atid->paused = 0; 3239eb6f0de0SAdrian Chadd atid->sched = 0; 3240eb6f0de0SAdrian Chadd atid->hwq_depth = 0; 3241eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 3242eb6f0de0SAdrian Chadd if (i == IEEE80211_NONQOS_TID) 32437403d1b9SAdrian Chadd atid->ac = ATH_NONQOS_TID_AC; 3244eb6f0de0SAdrian Chadd else 3245eb6f0de0SAdrian Chadd atid->ac = TID_TO_WME_AC(i); 3246eb6f0de0SAdrian Chadd } 32474f25ddbbSAdrian Chadd an->clrdmask = 1; /* Always start by setting this bit */ 3248eb6f0de0SAdrian Chadd } 3249eb6f0de0SAdrian Chadd 3250eb6f0de0SAdrian Chadd /* 3251eb6f0de0SAdrian Chadd * Pause the current TID. This stops packets from being transmitted 3252eb6f0de0SAdrian Chadd * on it. 3253eb6f0de0SAdrian Chadd * 3254eb6f0de0SAdrian Chadd * Since this is also called from upper layers as well as the driver, 3255eb6f0de0SAdrian Chadd * it will get the TID lock. 3256eb6f0de0SAdrian Chadd */ 3257eb6f0de0SAdrian Chadd static void 3258eb6f0de0SAdrian Chadd ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid) 3259eb6f0de0SAdrian Chadd { 326088b3d483SAdrian Chadd 3261375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3262eb6f0de0SAdrian Chadd tid->paused++; 32631771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n", 32641771c649SAdrian Chadd __func__, 32651771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 32661771c649SAdrian Chadd tid->tid, 32671771c649SAdrian Chadd tid->paused); 3268eb6f0de0SAdrian Chadd } 3269eb6f0de0SAdrian Chadd 3270eb6f0de0SAdrian Chadd /* 3271eb6f0de0SAdrian Chadd * Unpause the current TID, and schedule it if needed. 3272eb6f0de0SAdrian Chadd */ 3273eb6f0de0SAdrian Chadd static void 3274eb6f0de0SAdrian Chadd ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid) 3275eb6f0de0SAdrian Chadd { 3276375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3277eb6f0de0SAdrian Chadd 3278dff5bdf4SAdrian Chadd /* 3279dff5bdf4SAdrian Chadd * There's some odd places where ath_tx_tid_resume() is called 3280dff5bdf4SAdrian Chadd * when it shouldn't be; this works around that particular issue 3281dff5bdf4SAdrian Chadd * until it's actually resolved. 3282dff5bdf4SAdrian Chadd */ 3283dff5bdf4SAdrian Chadd if (tid->paused == 0) { 32841771c649SAdrian Chadd device_printf(sc->sc_dev, 32851771c649SAdrian Chadd "%s: [%6D]: tid=%d, paused=0?\n", 32861771c649SAdrian Chadd __func__, 32871771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 32881771c649SAdrian Chadd tid->tid); 3289dff5bdf4SAdrian Chadd } else { 3290eb6f0de0SAdrian Chadd tid->paused--; 3291dff5bdf4SAdrian Chadd } 3292eb6f0de0SAdrian Chadd 32931771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 32941771c649SAdrian Chadd "%s: [%6D]: tid=%d, unpaused = %d\n", 32951771c649SAdrian Chadd __func__, 32961771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 32971771c649SAdrian Chadd tid->tid, 32981771c649SAdrian Chadd tid->paused); 3299eb6f0de0SAdrian Chadd 33000eb81626SAdrian Chadd if (tid->paused) 3301eb6f0de0SAdrian Chadd return; 33020eb81626SAdrian Chadd 33030eb81626SAdrian Chadd /* 33040eb81626SAdrian Chadd * Override the clrdmask configuration for the next frame 33050eb81626SAdrian Chadd * from this TID, just to get the ball rolling. 33060eb81626SAdrian Chadd */ 33074f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 33080eb81626SAdrian Chadd 33090eb81626SAdrian Chadd if (tid->axq_depth == 0) 33100eb81626SAdrian Chadd return; 3311eb6f0de0SAdrian Chadd 3312f1bc738eSAdrian Chadd /* XXX isfiltered shouldn't ever be 0 at this point */ 3313f1bc738eSAdrian Chadd if (tid->isfiltered == 1) { 331483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n", 331583bbd5ebSRui Paulo __func__); 3316f1bc738eSAdrian Chadd return; 3317f1bc738eSAdrian Chadd } 3318f1bc738eSAdrian Chadd 3319eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 332021bca442SAdrian Chadd 332121bca442SAdrian Chadd /* 332221bca442SAdrian Chadd * Queue the software TX scheduler. 332321bca442SAdrian Chadd */ 332421bca442SAdrian Chadd ath_tx_swq_kick(sc); 3325eb6f0de0SAdrian Chadd } 3326eb6f0de0SAdrian Chadd 3327eb6f0de0SAdrian Chadd /* 3328f1bc738eSAdrian Chadd * Add the given ath_buf to the TID filtered frame list. 3329f1bc738eSAdrian Chadd * This requires the TID be filtered. 3330f1bc738eSAdrian Chadd */ 3331f1bc738eSAdrian Chadd static void 3332f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid, 3333f1bc738eSAdrian Chadd struct ath_buf *bf) 3334f1bc738eSAdrian Chadd { 3335f1bc738eSAdrian Chadd 3336375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3337375307d4SAdrian Chadd 3338f1bc738eSAdrian Chadd if (!tid->isfiltered) 333983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n", 334083bbd5ebSRui Paulo __func__); 3341f1bc738eSAdrian Chadd 3342f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf); 3343f1bc738eSAdrian Chadd 3344f1bc738eSAdrian Chadd /* Set the retry bit and bump the retry counter */ 3345f1bc738eSAdrian Chadd ath_tx_set_retry(sc, bf); 3346f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swfiltered++; 3347f1bc738eSAdrian Chadd 334813aa9ee5SAdrian Chadd ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list); 3349f1bc738eSAdrian Chadd } 3350f1bc738eSAdrian Chadd 3351f1bc738eSAdrian Chadd /* 3352f1bc738eSAdrian Chadd * Handle a completed filtered frame from the given TID. 3353f1bc738eSAdrian Chadd * This just enables/pauses the filtered frame state if required 3354f1bc738eSAdrian Chadd * and appends the filtered frame to the filtered queue. 3355f1bc738eSAdrian Chadd */ 3356f1bc738eSAdrian Chadd static void 3357f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid, 3358f1bc738eSAdrian Chadd struct ath_buf *bf) 3359f1bc738eSAdrian Chadd { 3360f1bc738eSAdrian Chadd 3361375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3362f1bc738eSAdrian Chadd 3363f1bc738eSAdrian Chadd if (! tid->isfiltered) { 336442fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n", 336542fdd8e7SAdrian Chadd __func__, tid->tid); 3366f1bc738eSAdrian Chadd tid->isfiltered = 1; 3367f1bc738eSAdrian Chadd ath_tx_tid_pause(sc, tid); 3368f1bc738eSAdrian Chadd } 3369f1bc738eSAdrian Chadd 3370f1bc738eSAdrian Chadd /* Add the frame to the filter queue */ 3371f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(sc, tid, bf); 3372f1bc738eSAdrian Chadd } 3373f1bc738eSAdrian Chadd 3374f1bc738eSAdrian Chadd /* 3375f1bc738eSAdrian Chadd * Complete the filtered frame TX completion. 3376f1bc738eSAdrian Chadd * 3377f1bc738eSAdrian Chadd * If there are no more frames in the hardware queue, unpause/unfilter 3378f1bc738eSAdrian Chadd * the TID if applicable. Otherwise we will wait for a node PS transition 3379f1bc738eSAdrian Chadd * to unfilter. 3380f1bc738eSAdrian Chadd */ 3381f1bc738eSAdrian Chadd static void 3382f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid) 3383f1bc738eSAdrian Chadd { 3384f1bc738eSAdrian Chadd struct ath_buf *bf; 3385a3fd3b14SAdrian Chadd int do_resume = 0; 3386f1bc738eSAdrian Chadd 3387375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3388f1bc738eSAdrian Chadd 3389f1bc738eSAdrian Chadd if (tid->hwq_depth != 0) 3390f1bc738eSAdrian Chadd return; 3391f1bc738eSAdrian Chadd 339242fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n", 339342fdd8e7SAdrian Chadd __func__, tid->tid); 3394a3fd3b14SAdrian Chadd if (tid->isfiltered == 1) { 3395f1bc738eSAdrian Chadd tid->isfiltered = 0; 3396a3fd3b14SAdrian Chadd do_resume = 1; 3397a3fd3b14SAdrian Chadd } 3398a3fd3b14SAdrian Chadd 33994f25ddbbSAdrian Chadd /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */ 34004f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 3401f1bc738eSAdrian Chadd 3402f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 340313aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) { 340413aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 34053e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3406f1bc738eSAdrian Chadd } 3407f1bc738eSAdrian Chadd 3408c5d230abSAdrian Chadd /* And only resume if we had paused before */ 3409a3fd3b14SAdrian Chadd if (do_resume) 3410f1bc738eSAdrian Chadd ath_tx_tid_resume(sc, tid); 3411f1bc738eSAdrian Chadd } 3412f1bc738eSAdrian Chadd 3413f1bc738eSAdrian Chadd /* 3414f1bc738eSAdrian Chadd * Called when a single (aggregate or otherwise) frame is completed. 3415f1bc738eSAdrian Chadd * 34161f737306SAdrian Chadd * Returns 0 if the buffer could be added to the filtered list 34171f737306SAdrian Chadd * (cloned or otherwise), 1 if the buffer couldn't be added to the 3418f1bc738eSAdrian Chadd * filtered list (failed clone; expired retry) and the caller should 3419f1bc738eSAdrian Chadd * free it and handle it like a failure (eg by sending a BAR.) 34201f737306SAdrian Chadd * 34211f737306SAdrian Chadd * since the buffer may be cloned, bf must be not touched after this 34221f737306SAdrian Chadd * if the return value is 0. 3423f1bc738eSAdrian Chadd */ 3424f1bc738eSAdrian Chadd static int 3425f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid, 3426f1bc738eSAdrian Chadd struct ath_buf *bf) 3427f1bc738eSAdrian Chadd { 3428f1bc738eSAdrian Chadd struct ath_buf *nbf; 3429f1bc738eSAdrian Chadd int retval; 3430f1bc738eSAdrian Chadd 3431375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3432f1bc738eSAdrian Chadd 3433f1bc738eSAdrian Chadd /* 3434f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3435f1bc738eSAdrian Chadd */ 3436f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 34370eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3438f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3439f1bc738eSAdrian Chadd "%s: bf=%p, seqno=%d, exceeded retries\n", 3440f1bc738eSAdrian Chadd __func__, 3441f1bc738eSAdrian Chadd bf, 344242fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 34431f737306SAdrian Chadd retval = 1; /* error */ 34441f737306SAdrian Chadd goto finish; 3445f1bc738eSAdrian Chadd } 3446f1bc738eSAdrian Chadd 3447f1bc738eSAdrian Chadd /* 3448f1bc738eSAdrian Chadd * A busy buffer can't be added to the retry list. 3449f1bc738eSAdrian Chadd * It needs to be cloned. 3450f1bc738eSAdrian Chadd */ 3451f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3452f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3453f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3454f1bc738eSAdrian Chadd "%s: busy buffer clone: %p -> %p\n", 3455f1bc738eSAdrian Chadd __func__, bf, nbf); 3456f1bc738eSAdrian Chadd } else { 3457f1bc738eSAdrian Chadd nbf = bf; 3458f1bc738eSAdrian Chadd } 3459f1bc738eSAdrian Chadd 3460f1bc738eSAdrian Chadd if (nbf == NULL) { 3461f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3462f1bc738eSAdrian Chadd "%s: busy buffer couldn't be cloned (%p)!\n", 3463f1bc738eSAdrian Chadd __func__, bf); 34641f737306SAdrian Chadd retval = 1; /* error */ 3465f1bc738eSAdrian Chadd } else { 3466f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 34671f737306SAdrian Chadd retval = 0; /* ok */ 3468f1bc738eSAdrian Chadd } 34691f737306SAdrian Chadd finish: 3470f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3471f1bc738eSAdrian Chadd 3472f1bc738eSAdrian Chadd return (retval); 3473f1bc738eSAdrian Chadd } 3474f1bc738eSAdrian Chadd 3475f1bc738eSAdrian Chadd static void 3476f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid, 3477f1bc738eSAdrian Chadd struct ath_buf *bf_first, ath_bufhead *bf_q) 3478f1bc738eSAdrian Chadd { 3479f1bc738eSAdrian Chadd struct ath_buf *bf, *bf_next, *nbf; 3480f1bc738eSAdrian Chadd 3481375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3482f1bc738eSAdrian Chadd 3483f1bc738eSAdrian Chadd bf = bf_first; 3484f1bc738eSAdrian Chadd while (bf) { 3485f1bc738eSAdrian Chadd bf_next = bf->bf_next; 3486f1bc738eSAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 3487f1bc738eSAdrian Chadd 3488f1bc738eSAdrian Chadd /* 3489f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3490f1bc738eSAdrian Chadd */ 3491f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 34920eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3493f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 349442fdd8e7SAdrian Chadd "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n", 3495f1bc738eSAdrian Chadd __func__, 349642fdd8e7SAdrian Chadd tid->tid, 3497f1bc738eSAdrian Chadd bf, 349842fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 3499f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3500f1bc738eSAdrian Chadd goto next; 3501f1bc738eSAdrian Chadd } 3502f1bc738eSAdrian Chadd 3503f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3504f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3505f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 350642fdd8e7SAdrian Chadd "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n", 350742fdd8e7SAdrian Chadd __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno)); 3508f1bc738eSAdrian Chadd } else { 3509f1bc738eSAdrian Chadd nbf = bf; 3510f1bc738eSAdrian Chadd } 3511f1bc738eSAdrian Chadd 3512f1bc738eSAdrian Chadd /* 3513f1bc738eSAdrian Chadd * If the buffer couldn't be cloned, add it to bf_q; 3514f1bc738eSAdrian Chadd * the caller will free the buffer(s) as required. 3515f1bc738eSAdrian Chadd */ 3516f1bc738eSAdrian Chadd if (nbf == NULL) { 3517f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 351842fdd8e7SAdrian Chadd "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n", 351942fdd8e7SAdrian Chadd __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno)); 3520f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3521f1bc738eSAdrian Chadd } else { 3522f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3523f1bc738eSAdrian Chadd } 3524f1bc738eSAdrian Chadd next: 3525f1bc738eSAdrian Chadd bf = bf_next; 3526f1bc738eSAdrian Chadd } 3527f1bc738eSAdrian Chadd 3528f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3529f1bc738eSAdrian Chadd } 3530f1bc738eSAdrian Chadd 3531f1bc738eSAdrian Chadd /* 353288b3d483SAdrian Chadd * Suspend the queue because we need to TX a BAR. 353388b3d483SAdrian Chadd */ 353488b3d483SAdrian Chadd static void 353588b3d483SAdrian Chadd ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid) 353688b3d483SAdrian Chadd { 3537375307d4SAdrian Chadd 3538375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 353988b3d483SAdrian Chadd 35400e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35416d07d3e0SAdrian Chadd "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n", 354288b3d483SAdrian Chadd __func__, 35436d07d3e0SAdrian Chadd tid->tid, 3544e60c4fc2SAdrian Chadd tid->bar_wait, 3545e60c4fc2SAdrian Chadd tid->bar_tx); 354688b3d483SAdrian Chadd 354788b3d483SAdrian Chadd /* We shouldn't be called when bar_tx is 1 */ 354888b3d483SAdrian Chadd if (tid->bar_tx) { 354983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 355083bbd5ebSRui Paulo "%s: bar_tx is 1?!\n", __func__); 355188b3d483SAdrian Chadd } 355288b3d483SAdrian Chadd 355388b3d483SAdrian Chadd /* If we've already been called, just be patient. */ 355488b3d483SAdrian Chadd if (tid->bar_wait) 355588b3d483SAdrian Chadd return; 355688b3d483SAdrian Chadd 355788b3d483SAdrian Chadd /* Wait! */ 355888b3d483SAdrian Chadd tid->bar_wait = 1; 355988b3d483SAdrian Chadd 356088b3d483SAdrian Chadd /* Only one pause, no matter how many frames fail */ 356188b3d483SAdrian Chadd ath_tx_tid_pause(sc, tid); 356288b3d483SAdrian Chadd } 356388b3d483SAdrian Chadd 356488b3d483SAdrian Chadd /* 356588b3d483SAdrian Chadd * We've finished with BAR handling - either we succeeded or 356688b3d483SAdrian Chadd * failed. Either way, unsuspend TX. 356788b3d483SAdrian Chadd */ 356888b3d483SAdrian Chadd static void 356988b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid) 357088b3d483SAdrian Chadd { 3571375307d4SAdrian Chadd 3572375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 357388b3d483SAdrian Chadd 35740e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35756d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 357688b3d483SAdrian Chadd __func__, 35779b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 35789b48fb4bSAdrian Chadd ":", 35796d07d3e0SAdrian Chadd tid->tid); 358088b3d483SAdrian Chadd 358188b3d483SAdrian Chadd if (tid->bar_tx == 0 || tid->bar_wait == 0) { 358283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35836d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 358483bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 358583bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait); 358688b3d483SAdrian Chadd } 358788b3d483SAdrian Chadd 358888b3d483SAdrian Chadd tid->bar_tx = tid->bar_wait = 0; 358988b3d483SAdrian Chadd ath_tx_tid_resume(sc, tid); 359088b3d483SAdrian Chadd } 359188b3d483SAdrian Chadd 359288b3d483SAdrian Chadd /* 359388b3d483SAdrian Chadd * Return whether we're ready to TX a BAR frame. 359488b3d483SAdrian Chadd * 359588b3d483SAdrian Chadd * Requires the TID lock be held. 359688b3d483SAdrian Chadd */ 359788b3d483SAdrian Chadd static int 359888b3d483SAdrian Chadd ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid) 359988b3d483SAdrian Chadd { 360088b3d483SAdrian Chadd 3601375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 360288b3d483SAdrian Chadd 360388b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->hwq_depth > 0) 360488b3d483SAdrian Chadd return (0); 360588b3d483SAdrian Chadd 36069b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36076d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar ready\n", 36089b48fb4bSAdrian Chadd __func__, 36099b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36109b48fb4bSAdrian Chadd ":", 36116d07d3e0SAdrian Chadd tid->tid); 36120e22ed0eSAdrian Chadd 361388b3d483SAdrian Chadd return (1); 361488b3d483SAdrian Chadd } 361588b3d483SAdrian Chadd 361688b3d483SAdrian Chadd /* 361788b3d483SAdrian Chadd * Check whether the current TID is ready to have a BAR 361888b3d483SAdrian Chadd * TXed and if so, do the TX. 361988b3d483SAdrian Chadd * 362088b3d483SAdrian Chadd * Since the TID/TXQ lock can't be held during a call to 362188b3d483SAdrian Chadd * ieee80211_send_bar(), we have to do the dirty thing of unlocking it, 362288b3d483SAdrian Chadd * sending the BAR and locking it again. 362388b3d483SAdrian Chadd * 362488b3d483SAdrian Chadd * Eventually, the code to send the BAR should be broken out 362588b3d483SAdrian Chadd * from this routine so the lock doesn't have to be reacquired 362688b3d483SAdrian Chadd * just to be immediately dropped by the caller. 362788b3d483SAdrian Chadd */ 362888b3d483SAdrian Chadd static void 362988b3d483SAdrian Chadd ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid) 363088b3d483SAdrian Chadd { 363188b3d483SAdrian Chadd struct ieee80211_tx_ampdu *tap; 363288b3d483SAdrian Chadd 3633375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 363488b3d483SAdrian Chadd 36350e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36366d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 363788b3d483SAdrian Chadd __func__, 36389b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36399b48fb4bSAdrian Chadd ":", 36406d07d3e0SAdrian Chadd tid->tid); 364188b3d483SAdrian Chadd 364288b3d483SAdrian Chadd tap = ath_tx_get_tx_tid(tid->an, tid->tid); 364388b3d483SAdrian Chadd 364488b3d483SAdrian Chadd /* 364588b3d483SAdrian Chadd * This is an error condition! 364688b3d483SAdrian Chadd */ 364788b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->bar_tx == 1) { 364883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36496d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 365083bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 365183bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait); 365288b3d483SAdrian Chadd return; 365388b3d483SAdrian Chadd } 365488b3d483SAdrian Chadd 365588b3d483SAdrian Chadd /* Don't do anything if we still have pending frames */ 365688b3d483SAdrian Chadd if (tid->hwq_depth > 0) { 36570e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36586d07d3e0SAdrian Chadd "%s: %6D: TID=%d, hwq_depth=%d, waiting\n", 365988b3d483SAdrian Chadd __func__, 36609b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36619b48fb4bSAdrian Chadd ":", 36626d07d3e0SAdrian Chadd tid->tid, 366388b3d483SAdrian Chadd tid->hwq_depth); 366488b3d483SAdrian Chadd return; 366588b3d483SAdrian Chadd } 366688b3d483SAdrian Chadd 366788b3d483SAdrian Chadd /* We're now about to TX */ 366888b3d483SAdrian Chadd tid->bar_tx = 1; 366988b3d483SAdrian Chadd 367088b3d483SAdrian Chadd /* 36714e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame, 36724e81f27cSAdrian Chadd * just to get the ball rolling. 36734e81f27cSAdrian Chadd */ 36744f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 36754e81f27cSAdrian Chadd 36764e81f27cSAdrian Chadd /* 367788b3d483SAdrian Chadd * Calculate new BAW left edge, now that all frames have either 367888b3d483SAdrian Chadd * succeeded or failed. 367988b3d483SAdrian Chadd * 368088b3d483SAdrian Chadd * XXX verify this is _actually_ the valid value to begin at! 368188b3d483SAdrian Chadd */ 36820e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36836d07d3e0SAdrian Chadd "%s: %6D: TID=%d, new BAW left edge=%d\n", 368488b3d483SAdrian Chadd __func__, 36859b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36869b48fb4bSAdrian Chadd ":", 36876d07d3e0SAdrian Chadd tid->tid, 368888b3d483SAdrian Chadd tap->txa_start); 368988b3d483SAdrian Chadd 369088b3d483SAdrian Chadd /* Try sending the BAR frame */ 369188b3d483SAdrian Chadd /* We can't hold the lock here! */ 369288b3d483SAdrian Chadd 3693375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 369488b3d483SAdrian Chadd if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) { 369588b3d483SAdrian Chadd /* Success? Now we wait for notification that it's done */ 3696375307d4SAdrian Chadd ATH_TX_LOCK(sc); 369788b3d483SAdrian Chadd return; 369888b3d483SAdrian Chadd } 369988b3d483SAdrian Chadd 370088b3d483SAdrian Chadd /* Failure? For now, warn loudly and continue */ 3701375307d4SAdrian Chadd ATH_TX_LOCK(sc); 370283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 37036d07d3e0SAdrian Chadd "%s: %6D: TID=%d, failed to TX BAR, continue!\n", 370483bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 37056d07d3e0SAdrian Chadd tid->tid); 370688b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, tid); 370788b3d483SAdrian Chadd } 370888b3d483SAdrian Chadd 3709eb6f0de0SAdrian Chadd static void 3710f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an, 3711f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf) 3712eb6f0de0SAdrian Chadd { 3713eb6f0de0SAdrian Chadd 3714375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3715eb6f0de0SAdrian Chadd 3716eb6f0de0SAdrian Chadd /* 3717eb6f0de0SAdrian Chadd * If the current TID is running AMPDU, update 3718eb6f0de0SAdrian Chadd * the BAW. 3719eb6f0de0SAdrian Chadd */ 3720eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid) && 3721eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw) { 3722eb6f0de0SAdrian Chadd /* 3723eb6f0de0SAdrian Chadd * Only remove the frame from the BAW if it's 3724eb6f0de0SAdrian Chadd * been transmitted at least once; this means 3725eb6f0de0SAdrian Chadd * the frame was in the BAW to begin with. 3726eb6f0de0SAdrian Chadd */ 3727eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries > 0) { 3728eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, tid, bf); 3729eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 3730eb6f0de0SAdrian Chadd } 3731ce597531SAdrian Chadd #if 0 3732eb6f0de0SAdrian Chadd /* 3733eb6f0de0SAdrian Chadd * This has become a non-fatal error now 3734eb6f0de0SAdrian Chadd */ 3735eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 373683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW 3737eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 3738eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 3739ce597531SAdrian Chadd #endif 3740eb6f0de0SAdrian Chadd } 3741b837332dSAdrian Chadd 3742b837332dSAdrian Chadd /* Strip it out of an aggregate list if it was in one */ 3743b837332dSAdrian Chadd bf->bf_next = NULL; 3744b837332dSAdrian Chadd 3745b837332dSAdrian Chadd /* Insert on the free queue to be freed by the caller */ 3746eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 3747eb6f0de0SAdrian Chadd } 3748eb6f0de0SAdrian Chadd 3749f1bc738eSAdrian Chadd static void 3750f1bc738eSAdrian Chadd ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an, 375103682514SAdrian Chadd const char *pfx, struct ath_tid *tid, struct ath_buf *bf) 3752f1bc738eSAdrian Chadd { 3753f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 375483bbd5ebSRui Paulo struct ath_txq *txq; 3755f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3756f1bc738eSAdrian Chadd 375783bbd5ebSRui Paulo txq = sc->sc_ac2q[tid->ac]; 3758f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3759f1bc738eSAdrian Chadd 37606fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3761272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, " 3762f1bc738eSAdrian Chadd "seqno=%d, retry=%d\n", 3763272a8ab6SAdrian Chadd __func__, 3764272a8ab6SAdrian Chadd pfx, 3765272a8ab6SAdrian Chadd ni->ni_macaddr, 3766272a8ab6SAdrian Chadd ":", 3767272a8ab6SAdrian Chadd bf, 3768f1bc738eSAdrian Chadd bf->bf_state.bfs_addedbaw, 3769f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw, 3770f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno), 3771f1bc738eSAdrian Chadd bf->bf_state.bfs_retries); 37726fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3773272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n", 3774272a8ab6SAdrian Chadd __func__, 3775272a8ab6SAdrian Chadd pfx, 3776272a8ab6SAdrian Chadd ni->ni_macaddr, 3777272a8ab6SAdrian Chadd ":", 3778272a8ab6SAdrian Chadd bf, 377903682514SAdrian Chadd txq->axq_qnum, 37804e81f27cSAdrian Chadd txq->axq_depth, 37814e81f27cSAdrian Chadd txq->axq_aggr_depth); 37826fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3783272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, " 3784272a8ab6SAdrian Chadd "isfiltered=%d\n", 3785272a8ab6SAdrian Chadd __func__, 3786272a8ab6SAdrian Chadd pfx, 3787272a8ab6SAdrian Chadd ni->ni_macaddr, 3788272a8ab6SAdrian Chadd ":", 3789272a8ab6SAdrian Chadd bf, 3790f1bc738eSAdrian Chadd tid->axq_depth, 3791f1bc738eSAdrian Chadd tid->hwq_depth, 3792f1bc738eSAdrian Chadd tid->bar_wait, 3793f1bc738eSAdrian Chadd tid->isfiltered); 37946fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3795272a8ab6SAdrian Chadd "%s: %s: %6D: tid %d: " 37964e81f27cSAdrian Chadd "sched=%d, paused=%d, " 37974e81f27cSAdrian Chadd "incomp=%d, baw_head=%d, " 3798f1bc738eSAdrian Chadd "baw_tail=%d txa_start=%d, ni_txseqs=%d\n", 3799272a8ab6SAdrian Chadd __func__, 3800272a8ab6SAdrian Chadd pfx, 3801272a8ab6SAdrian Chadd ni->ni_macaddr, 3802272a8ab6SAdrian Chadd ":", 3803272a8ab6SAdrian Chadd tid->tid, 38044e81f27cSAdrian Chadd tid->sched, tid->paused, 38054e81f27cSAdrian Chadd tid->incomp, tid->baw_head, 3806f1bc738eSAdrian Chadd tid->baw_tail, tap == NULL ? -1 : tap->txa_start, 3807f1bc738eSAdrian Chadd ni->ni_txseqs[tid->tid]); 3808f1bc738eSAdrian Chadd 3809f1bc738eSAdrian Chadd /* XXX Dump the frame, see what it is? */ 3810a2be2710SRui Paulo if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 3811f1bc738eSAdrian Chadd ieee80211_dump_pkt(ni->ni_ic, 3812f1bc738eSAdrian Chadd mtod(bf->bf_m, const uint8_t *), 3813f1bc738eSAdrian Chadd bf->bf_m->m_len, 0, -1); 3814f1bc738eSAdrian Chadd } 3815f1bc738eSAdrian Chadd 3816f1bc738eSAdrian Chadd /* 3817f1bc738eSAdrian Chadd * Free any packets currently pending in the software TX queue. 3818f1bc738eSAdrian Chadd * 3819f1bc738eSAdrian Chadd * This will be called when a node is being deleted. 3820f1bc738eSAdrian Chadd * 3821f1bc738eSAdrian Chadd * It can also be called on an active node during an interface 3822f1bc738eSAdrian Chadd * reset or state transition. 3823f1bc738eSAdrian Chadd * 3824f1bc738eSAdrian Chadd * (From Linux/reference): 3825f1bc738eSAdrian Chadd * 3826f1bc738eSAdrian Chadd * TODO: For frame(s) that are in the retry state, we will reuse the 3827f1bc738eSAdrian Chadd * sequence number(s) without setting the retry bit. The 3828f1bc738eSAdrian Chadd * alternative is to give up on these and BAR the receiver's window 3829f1bc738eSAdrian Chadd * forward. 3830f1bc738eSAdrian Chadd */ 3831f1bc738eSAdrian Chadd static void 3832f1bc738eSAdrian Chadd ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an, 3833f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq) 3834f1bc738eSAdrian Chadd { 3835f1bc738eSAdrian Chadd struct ath_buf *bf; 3836f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3837f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 3838f1bc738eSAdrian Chadd int t; 3839f1bc738eSAdrian Chadd 3840f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3841f1bc738eSAdrian Chadd 3842375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3843f1bc738eSAdrian Chadd 3844f1bc738eSAdrian Chadd /* Walk the queue, free frames */ 3845f1bc738eSAdrian Chadd t = 0; 3846f1bc738eSAdrian Chadd for (;;) { 38473e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 3848f1bc738eSAdrian Chadd if (bf == NULL) { 3849f1bc738eSAdrian Chadd break; 3850f1bc738eSAdrian Chadd } 3851f1bc738eSAdrian Chadd 3852f1bc738eSAdrian Chadd if (t == 0) { 385303682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "norm", tid, bf); 38546fc621c2SAdrian Chadd // t = 1; 3855f1bc738eSAdrian Chadd } 3856f1bc738eSAdrian Chadd 38573e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 3858f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3859f1bc738eSAdrian Chadd } 3860f1bc738eSAdrian Chadd 3861f1bc738eSAdrian Chadd /* And now, drain the filtered frame queue */ 3862f1bc738eSAdrian Chadd t = 0; 3863f1bc738eSAdrian Chadd for (;;) { 386413aa9ee5SAdrian Chadd bf = ATH_TID_FILT_FIRST(tid); 3865f1bc738eSAdrian Chadd if (bf == NULL) 3866f1bc738eSAdrian Chadd break; 3867f1bc738eSAdrian Chadd 3868f1bc738eSAdrian Chadd if (t == 0) { 386903682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "filt", tid, bf); 38706fc621c2SAdrian Chadd // t = 1; 3871f1bc738eSAdrian Chadd } 3872f1bc738eSAdrian Chadd 387313aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3874f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3875f1bc738eSAdrian Chadd } 3876f1bc738eSAdrian Chadd 3877eb6f0de0SAdrian Chadd /* 38784e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame 38794e81f27cSAdrian Chadd * in case there is some future transmission, just to get 38804e81f27cSAdrian Chadd * the ball rolling. 38814e81f27cSAdrian Chadd * 38824e81f27cSAdrian Chadd * This won't hurt things if the TID is about to be freed. 38834e81f27cSAdrian Chadd */ 38844f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 38854e81f27cSAdrian Chadd 38864e81f27cSAdrian Chadd /* 3887eb6f0de0SAdrian Chadd * Now that it's completed, grab the TID lock and update 3888eb6f0de0SAdrian Chadd * the sequence number and BAW window. 3889eb6f0de0SAdrian Chadd * Because sequence numbers have been assigned to frames 3890eb6f0de0SAdrian Chadd * that haven't been sent yet, it's entirely possible 3891eb6f0de0SAdrian Chadd * we'll be called with some pending frames that have not 3892eb6f0de0SAdrian Chadd * been transmitted. 3893eb6f0de0SAdrian Chadd * 3894eb6f0de0SAdrian Chadd * The cleaner solution is to do the sequence number allocation 3895eb6f0de0SAdrian Chadd * when the packet is first transmitted - and thus the "retries" 3896eb6f0de0SAdrian Chadd * check above would be enough to update the BAW/seqno. 3897eb6f0de0SAdrian Chadd */ 3898eb6f0de0SAdrian Chadd 3899eb6f0de0SAdrian Chadd /* But don't do it for non-QoS TIDs */ 3900eb6f0de0SAdrian Chadd if (tap) { 39019b48fb4bSAdrian Chadd #if 1 3902eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 39039b48fb4bSAdrian Chadd "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n", 39049b48fb4bSAdrian Chadd __func__, 39059b48fb4bSAdrian Chadd ni->ni_macaddr, 39069b48fb4bSAdrian Chadd ":", 39079b48fb4bSAdrian Chadd an, 39089b48fb4bSAdrian Chadd tid->tid, 39099b48fb4bSAdrian Chadd tap->txa_start); 3910eb6f0de0SAdrian Chadd #endif 3911eb6f0de0SAdrian Chadd ni->ni_txseqs[tid->tid] = tap->txa_start; 3912eb6f0de0SAdrian Chadd tid->baw_tail = tid->baw_head; 3913eb6f0de0SAdrian Chadd } 3914eb6f0de0SAdrian Chadd } 3915eb6f0de0SAdrian Chadd 3916eb6f0de0SAdrian Chadd /* 391722780332SAdrian Chadd * Reset the TID state. This must be only called once the node has 391822780332SAdrian Chadd * had its frames flushed from this TID, to ensure that no other 391922780332SAdrian Chadd * pause / unpause logic can kick in. 392022780332SAdrian Chadd */ 392122780332SAdrian Chadd static void 392222780332SAdrian Chadd ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid) 392322780332SAdrian Chadd { 392422780332SAdrian Chadd 392522780332SAdrian Chadd #if 0 392622780332SAdrian Chadd tid->bar_wait = tid->bar_tx = tid->isfiltered = 0; 392722780332SAdrian Chadd tid->paused = tid->sched = tid->addba_tx_pending = 0; 392822780332SAdrian Chadd tid->incomp = tid->cleanup_inprogress = 0; 392922780332SAdrian Chadd #endif 393022780332SAdrian Chadd 393122780332SAdrian Chadd /* 393222780332SAdrian Chadd * If we have a bar_wait set, we need to unpause the TID 393322780332SAdrian Chadd * here. Otherwise once cleanup has finished, the TID won't 393422780332SAdrian Chadd * have the right paused counter. 393522780332SAdrian Chadd * 393622780332SAdrian Chadd * XXX I'm not going through resume here - I don't want the 393722780332SAdrian Chadd * node to be rescheuled just yet. This however should be 393822780332SAdrian Chadd * methodized! 393922780332SAdrian Chadd */ 394022780332SAdrian Chadd if (tid->bar_wait) { 394122780332SAdrian Chadd if (tid->paused > 0) { 394222780332SAdrian Chadd tid->paused --; 394322780332SAdrian Chadd } 394422780332SAdrian Chadd } 394522780332SAdrian Chadd 394622780332SAdrian Chadd /* 394722780332SAdrian Chadd * XXX same with a currently filtered TID. 394822780332SAdrian Chadd * 394922780332SAdrian Chadd * Since this is being called during a flush, we assume that 395022780332SAdrian Chadd * the filtered frame list is actually empty. 395122780332SAdrian Chadd * 395222780332SAdrian Chadd * XXX TODO: add in a check to ensure that the filtered queue 395322780332SAdrian Chadd * depth is actually 0! 395422780332SAdrian Chadd */ 395522780332SAdrian Chadd if (tid->isfiltered) { 395622780332SAdrian Chadd if (tid->paused > 0) { 395722780332SAdrian Chadd tid->paused --; 395822780332SAdrian Chadd } 395922780332SAdrian Chadd } 396022780332SAdrian Chadd 396122780332SAdrian Chadd /* 396222780332SAdrian Chadd * Clear BAR, filtered frames, scheduled and ADDBA pending. 396322780332SAdrian Chadd * The TID may be going through cleanup from the last association 396422780332SAdrian Chadd * where things in the BAW are still in the hardware queue. 396522780332SAdrian Chadd */ 396622780332SAdrian Chadd tid->bar_wait = 0; 396722780332SAdrian Chadd tid->bar_tx = 0; 396822780332SAdrian Chadd tid->isfiltered = 0; 396922780332SAdrian Chadd tid->sched = 0; 397022780332SAdrian Chadd tid->addba_tx_pending = 0; 397122780332SAdrian Chadd 397222780332SAdrian Chadd /* 397322780332SAdrian Chadd * XXX TODO: it may just be enough to walk the HWQs and mark 397422780332SAdrian Chadd * frames for that node as non-aggregate; or mark the ath_node 397522780332SAdrian Chadd * with something that indicates that aggregation is no longer 397622780332SAdrian Chadd * occuring. Then we can just toss the BAW complaints and 397722780332SAdrian Chadd * do a complete hard reset of state here - no pause, no 397822780332SAdrian Chadd * complete counter, etc. 397922780332SAdrian Chadd */ 398022a3aee6SAdrian Chadd 398122780332SAdrian Chadd } 398222780332SAdrian Chadd 398322780332SAdrian Chadd /* 3984eb6f0de0SAdrian Chadd * Flush all software queued packets for the given node. 3985eb6f0de0SAdrian Chadd * 3986eb6f0de0SAdrian Chadd * This occurs when a completion handler frees the last buffer 3987eb6f0de0SAdrian Chadd * for a node, and the node is thus freed. This causes the node 3988eb6f0de0SAdrian Chadd * to be cleaned up, which ends up calling ath_tx_node_flush. 3989eb6f0de0SAdrian Chadd */ 3990eb6f0de0SAdrian Chadd void 3991eb6f0de0SAdrian Chadd ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an) 3992eb6f0de0SAdrian Chadd { 3993eb6f0de0SAdrian Chadd int tid; 3994eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 3995eb6f0de0SAdrian Chadd struct ath_buf *bf; 3996eb6f0de0SAdrian Chadd 3997eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 3998eb6f0de0SAdrian Chadd 399903682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p", 400003682514SAdrian Chadd &an->an_node); 400103682514SAdrian Chadd 4002375307d4SAdrian Chadd ATH_TX_LOCK(sc); 40039b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 40049b48fb4bSAdrian Chadd "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, " 400522a3aee6SAdrian Chadd "swq_depth=%d, clrdmask=%d, leak_count=%d\n", 40069b48fb4bSAdrian Chadd __func__, 40079b48fb4bSAdrian Chadd an->an_node.ni_macaddr, 40089b48fb4bSAdrian Chadd ":", 40099b48fb4bSAdrian Chadd an->an_is_powersave, 40109b48fb4bSAdrian Chadd an->an_stack_psq, 40119b48fb4bSAdrian Chadd an->an_tim_set, 40129b48fb4bSAdrian Chadd an->an_swq_depth, 401322a3aee6SAdrian Chadd an->clrdmask, 401422a3aee6SAdrian Chadd an->an_leak_count); 40159b48fb4bSAdrian Chadd 4016eb6f0de0SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 4017eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4018eb6f0de0SAdrian Chadd 4019eb6f0de0SAdrian Chadd /* Free packets */ 4020eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, an, atid, &bf_cq); 402122a3aee6SAdrian Chadd 402223f44d2bSAdrian Chadd /* Remove this tid from the list of active tids */ 402323f44d2bSAdrian Chadd ath_tx_tid_unsched(sc, atid); 402422a3aee6SAdrian Chadd 402522780332SAdrian Chadd /* Reset the per-TID pause, BAR, etc state */ 402622780332SAdrian Chadd ath_tx_tid_reset(sc, atid); 4027eb6f0de0SAdrian Chadd } 402822a3aee6SAdrian Chadd 402922a3aee6SAdrian Chadd /* 403022a3aee6SAdrian Chadd * Clear global leak count 403122a3aee6SAdrian Chadd */ 403222a3aee6SAdrian Chadd an->an_leak_count = 0; 4033375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4034eb6f0de0SAdrian Chadd 4035eb6f0de0SAdrian Chadd /* Handle completed frames */ 4036eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4037eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4038eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4039eb6f0de0SAdrian Chadd } 4040eb6f0de0SAdrian Chadd } 4041eb6f0de0SAdrian Chadd 4042eb6f0de0SAdrian Chadd /* 4043eb6f0de0SAdrian Chadd * Drain all the software TXQs currently with traffic queued. 4044eb6f0de0SAdrian Chadd */ 4045eb6f0de0SAdrian Chadd void 4046eb6f0de0SAdrian Chadd ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq) 4047eb6f0de0SAdrian Chadd { 4048eb6f0de0SAdrian Chadd struct ath_tid *tid; 4049eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4050eb6f0de0SAdrian Chadd struct ath_buf *bf; 4051eb6f0de0SAdrian Chadd 4052eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4053375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4054eb6f0de0SAdrian Chadd 4055eb6f0de0SAdrian Chadd /* 4056eb6f0de0SAdrian Chadd * Iterate over all active tids for the given txq, 4057eb6f0de0SAdrian Chadd * flushing and unsched'ing them 4058eb6f0de0SAdrian Chadd */ 4059eb6f0de0SAdrian Chadd while (! TAILQ_EMPTY(&txq->axq_tidq)) { 4060eb6f0de0SAdrian Chadd tid = TAILQ_FIRST(&txq->axq_tidq); 4061eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, tid->an, tid, &bf_cq); 4062eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 4063eb6f0de0SAdrian Chadd } 4064eb6f0de0SAdrian Chadd 4065375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4066eb6f0de0SAdrian Chadd 4067eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4068eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4069eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4070eb6f0de0SAdrian Chadd } 4071eb6f0de0SAdrian Chadd } 4072eb6f0de0SAdrian Chadd 4073eb6f0de0SAdrian Chadd /* 4074eb6f0de0SAdrian Chadd * Handle completion of non-aggregate session frames. 40750c54de88SAdrian Chadd * 40760c54de88SAdrian Chadd * This (currently) doesn't implement software retransmission of 40770c54de88SAdrian Chadd * non-aggregate frames! 40780c54de88SAdrian Chadd * 40790c54de88SAdrian Chadd * Software retransmission of non-aggregate frames needs to obey 40800c54de88SAdrian Chadd * the strict sequence number ordering, and drop any frames that 40810c54de88SAdrian Chadd * will fail this. 40820c54de88SAdrian Chadd * 40830c54de88SAdrian Chadd * For now, filtered frames and frame transmission will cause 40840c54de88SAdrian Chadd * all kinds of issues. So we don't support them. 40850c54de88SAdrian Chadd * 40860c54de88SAdrian Chadd * So anyone queuing frames via ath_tx_normal_xmit() or 40870c54de88SAdrian Chadd * ath_tx_hw_queue_norm() must override and set CLRDMASK. 4088eb6f0de0SAdrian Chadd */ 4089eb6f0de0SAdrian Chadd void 4090eb6f0de0SAdrian Chadd ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 4091eb6f0de0SAdrian Chadd { 4092eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4093eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4094eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4095eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4096eb6f0de0SAdrian Chadd struct ath_tx_status *ts = &bf->bf_status.ds_txstat; 4097eb6f0de0SAdrian Chadd 4098eb6f0de0SAdrian Chadd /* The TID state is protected behind the TXQ lock */ 4099375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4100eb6f0de0SAdrian Chadd 4101eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n", 4102eb6f0de0SAdrian Chadd __func__, bf, fail, atid->hwq_depth - 1); 4103eb6f0de0SAdrian Chadd 4104eb6f0de0SAdrian Chadd atid->hwq_depth--; 4105f1bc738eSAdrian Chadd 41060c54de88SAdrian Chadd #if 0 41070c54de88SAdrian Chadd /* 41080c54de88SAdrian Chadd * If the frame was filtered, stick it on the filter frame 41090c54de88SAdrian Chadd * queue and complain about it. It shouldn't happen! 41100c54de88SAdrian Chadd */ 41110c54de88SAdrian Chadd if ((ts->ts_status & HAL_TXERR_FILT) || 41120c54de88SAdrian Chadd (ts->ts_status != 0 && atid->isfiltered)) { 411383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 41140c54de88SAdrian Chadd "%s: isfiltered=%d, ts_status=%d: huh?\n", 41150c54de88SAdrian Chadd __func__, 41160c54de88SAdrian Chadd atid->isfiltered, 41170c54de88SAdrian Chadd ts->ts_status); 41180c54de88SAdrian Chadd ath_tx_tid_filt_comp_buf(sc, atid, bf); 41190c54de88SAdrian Chadd } 41200c54de88SAdrian Chadd #endif 4121f1bc738eSAdrian Chadd if (atid->isfiltered) 412283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__); 4123eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 412483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 4125eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4126f1bc738eSAdrian Chadd 4127f172ef75SAdrian Chadd /* If the TID is being cleaned up, track things */ 4128f172ef75SAdrian Chadd /* XXX refactor! */ 4129f172ef75SAdrian Chadd if (atid->cleanup_inprogress) { 4130f172ef75SAdrian Chadd atid->incomp--; 4131f172ef75SAdrian Chadd if (atid->incomp == 0) { 4132f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4133f172ef75SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4134f172ef75SAdrian Chadd __func__, tid); 4135f172ef75SAdrian Chadd atid->cleanup_inprogress = 0; 4136f172ef75SAdrian Chadd ath_tx_tid_resume(sc, atid); 4137f172ef75SAdrian Chadd } 4138f172ef75SAdrian Chadd } 4139f172ef75SAdrian Chadd 4140f1bc738eSAdrian Chadd /* 4141f1bc738eSAdrian Chadd * If the queue is filtered, potentially mark it as complete 4142f1bc738eSAdrian Chadd * and reschedule it as needed. 4143f1bc738eSAdrian Chadd * 4144f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 4145f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 4146f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 4147f1bc738eSAdrian Chadd * (complete or otherwise) frame. 4148f1bc738eSAdrian Chadd * 4149f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 4150f1bc738eSAdrian Chadd */ 4151f1bc738eSAdrian Chadd if (atid->isfiltered) 4152f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4153375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4154eb6f0de0SAdrian Chadd 4155eb6f0de0SAdrian Chadd /* 4156eb6f0de0SAdrian Chadd * punt to rate control if we're not being cleaned up 4157eb6f0de0SAdrian Chadd * during a hw queue drain and the frame wanted an ACK. 4158eb6f0de0SAdrian Chadd */ 4159875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 4160eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 4161eb6f0de0SAdrian Chadd ts, bf->bf_state.bfs_pktlen, 4162eb6f0de0SAdrian Chadd 1, (ts->ts_status == 0) ? 0 : 1); 4163eb6f0de0SAdrian Chadd 4164eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 4165eb6f0de0SAdrian Chadd } 4166eb6f0de0SAdrian Chadd 4167eb6f0de0SAdrian Chadd /* 4168eb6f0de0SAdrian Chadd * Handle cleanup of aggregate session packets that aren't 4169eb6f0de0SAdrian Chadd * an A-MPDU. 4170eb6f0de0SAdrian Chadd * 4171eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4172eb6f0de0SAdrian Chadd * torn down. 4173eb6f0de0SAdrian Chadd */ 4174eb6f0de0SAdrian Chadd static void 4175eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4176eb6f0de0SAdrian Chadd { 4177eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4178eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4179eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4180eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4181eb6f0de0SAdrian Chadd 4182eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n", 4183eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4184eb6f0de0SAdrian Chadd 4185375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4186eb6f0de0SAdrian Chadd atid->incomp--; 4187f172ef75SAdrian Chadd 4188f172ef75SAdrian Chadd /* XXX refactor! */ 4189f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4190f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4191f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 4192f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 4193f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n", 4194f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4195f172ef75SAdrian Chadd } 4196f172ef75SAdrian Chadd 4197eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4198eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4199eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4200eb6f0de0SAdrian Chadd __func__, tid); 4201eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4202eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4203eb6f0de0SAdrian Chadd } 4204375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4205eb6f0de0SAdrian Chadd 4206eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4207eb6f0de0SAdrian Chadd } 4208eb6f0de0SAdrian Chadd 4209f172ef75SAdrian Chadd 4210f172ef75SAdrian Chadd /* 4211f172ef75SAdrian Chadd * This as it currently stands is a bit dumb. Ideally we'd just 4212f172ef75SAdrian Chadd * fail the frame the normal way and have it permanently fail 4213f172ef75SAdrian Chadd * via the normal aggregate completion path. 4214f172ef75SAdrian Chadd */ 4215f172ef75SAdrian Chadd static void 4216f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an, 4217f172ef75SAdrian Chadd int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq) 4218f172ef75SAdrian Chadd { 4219f172ef75SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4220f172ef75SAdrian Chadd struct ath_buf *bf, *bf_next; 4221f172ef75SAdrian Chadd 4222f172ef75SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4223f172ef75SAdrian Chadd 4224f172ef75SAdrian Chadd /* 4225f172ef75SAdrian Chadd * Remove this frame from the queue. 4226f172ef75SAdrian Chadd */ 4227f172ef75SAdrian Chadd ATH_TID_REMOVE(atid, bf_head, bf_list); 4228f172ef75SAdrian Chadd 4229f172ef75SAdrian Chadd /* 4230f172ef75SAdrian Chadd * Loop over all the frames in the aggregate. 4231f172ef75SAdrian Chadd */ 4232f172ef75SAdrian Chadd bf = bf_head; 4233f172ef75SAdrian Chadd while (bf != NULL) { 4234f172ef75SAdrian Chadd bf_next = bf->bf_next; /* next aggregate frame, or NULL */ 4235f172ef75SAdrian Chadd 4236f172ef75SAdrian Chadd /* 4237f172ef75SAdrian Chadd * If it's been added to the BAW we need to kick 4238f172ef75SAdrian Chadd * it out of the BAW before we continue. 4239f172ef75SAdrian Chadd * 4240f172ef75SAdrian Chadd * XXX if it's an aggregate, assert that it's in the 4241f172ef75SAdrian Chadd * BAW - we shouldn't have it be in an aggregate 4242f172ef75SAdrian Chadd * otherwise! 4243f172ef75SAdrian Chadd */ 4244f172ef75SAdrian Chadd if (bf->bf_state.bfs_addedbaw) { 4245f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4246f172ef75SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4247f172ef75SAdrian Chadd } 4248f172ef75SAdrian Chadd 4249f172ef75SAdrian Chadd /* 4250f172ef75SAdrian Chadd * Give it the default completion handler. 4251f172ef75SAdrian Chadd */ 4252f172ef75SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 4253f172ef75SAdrian Chadd bf->bf_next = NULL; 4254f172ef75SAdrian Chadd 4255f172ef75SAdrian Chadd /* 4256f172ef75SAdrian Chadd * Add it to the list to free. 4257f172ef75SAdrian Chadd */ 4258f172ef75SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 4259f172ef75SAdrian Chadd 4260f172ef75SAdrian Chadd /* 4261f172ef75SAdrian Chadd * Now advance to the next frame in the aggregate. 4262f172ef75SAdrian Chadd */ 4263f172ef75SAdrian Chadd bf = bf_next; 4264f172ef75SAdrian Chadd } 4265f172ef75SAdrian Chadd } 4266f172ef75SAdrian Chadd 4267eb6f0de0SAdrian Chadd /* 4268eb6f0de0SAdrian Chadd * Performs transmit side cleanup when TID changes from aggregated to 4269f172ef75SAdrian Chadd * unaggregated and during reassociation. 4270eb6f0de0SAdrian Chadd * 4271f172ef75SAdrian Chadd * For now, this just tosses everything from the TID software queue 4272f172ef75SAdrian Chadd * whether or not it has been retried and marks the TID as 4273f172ef75SAdrian Chadd * pending completion if there's anything for this TID queued to 4274f172ef75SAdrian Chadd * the hardware. 4275eb6f0de0SAdrian Chadd * 42765da3fc10SAdrian Chadd * The caller is responsible for pausing the TID and unpausing the 42775da3fc10SAdrian Chadd * TID if no cleanup was required. Otherwise the cleanup path will 42785da3fc10SAdrian Chadd * unpause the TID once the last hardware queued frame is completed. 4279eb6f0de0SAdrian Chadd */ 4280eb6f0de0SAdrian Chadd static void 428122780332SAdrian Chadd ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid, 428222780332SAdrian Chadd ath_bufhead *bf_cq) 4283eb6f0de0SAdrian Chadd { 4284eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4285eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 428622780332SAdrian Chadd 428722780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4288eb6f0de0SAdrian Chadd 4289d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4290f172ef75SAdrian Chadd "%s: TID %d: called; inprogress=%d\n", __func__, tid, 4291f172ef75SAdrian Chadd atid->cleanup_inprogress); 4292eb6f0de0SAdrian Chadd 4293eb6f0de0SAdrian Chadd /* 4294f1bc738eSAdrian Chadd * Move the filtered frames to the TX queue, before 4295f1bc738eSAdrian Chadd * we run off and discard/process things. 4296f1bc738eSAdrian Chadd */ 4297f172ef75SAdrian Chadd 4298f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 429913aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) { 430013aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(atid, bf, bf_list); 43013e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4302f1bc738eSAdrian Chadd } 4303f1bc738eSAdrian Chadd 4304f1bc738eSAdrian Chadd /* 4305eb6f0de0SAdrian Chadd * Update the frames in the software TX queue: 4306eb6f0de0SAdrian Chadd * 4307eb6f0de0SAdrian Chadd * + Discard retry frames in the queue 4308eb6f0de0SAdrian Chadd * + Fix the completion function to be non-aggregate 4309eb6f0de0SAdrian Chadd */ 43103e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 4311eb6f0de0SAdrian Chadd while (bf) { 4312eb6f0de0SAdrian Chadd /* 4313f172ef75SAdrian Chadd * Grab the next frame in the list, we may 4314f172ef75SAdrian Chadd * be fiddling with the list. 4315eb6f0de0SAdrian Chadd */ 4316f172ef75SAdrian Chadd bf_next = TAILQ_NEXT(bf, bf_list); 4317f172ef75SAdrian Chadd 4318f172ef75SAdrian Chadd /* 4319f172ef75SAdrian Chadd * Free the frame and all subframes. 4320f172ef75SAdrian Chadd */ 4321f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq); 4322f172ef75SAdrian Chadd 4323f172ef75SAdrian Chadd /* 4324f172ef75SAdrian Chadd * Next frame! 4325f172ef75SAdrian Chadd */ 4326eb6f0de0SAdrian Chadd bf = bf_next; 4327eb6f0de0SAdrian Chadd } 4328eb6f0de0SAdrian Chadd 4329eb6f0de0SAdrian Chadd /* 4330f172ef75SAdrian Chadd * If there's anything in the hardware queue we wait 4331f172ef75SAdrian Chadd * for the TID HWQ to empty. 4332eb6f0de0SAdrian Chadd */ 4333f172ef75SAdrian Chadd if (atid->hwq_depth > 0) { 4334f172ef75SAdrian Chadd /* 4335f172ef75SAdrian Chadd * XXX how about we kill atid->incomp, and instead 4336f172ef75SAdrian Chadd * replace it with a macro that checks that atid->hwq_depth 4337f172ef75SAdrian Chadd * is 0? 4338f172ef75SAdrian Chadd */ 4339f172ef75SAdrian Chadd atid->incomp = atid->hwq_depth; 4340eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 1; 4341eb6f0de0SAdrian Chadd } 4342eb6f0de0SAdrian Chadd 4343eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) 4344eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4345eb6f0de0SAdrian Chadd "%s: TID %d: cleanup needed: %d packets\n", 4346eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4347eb6f0de0SAdrian Chadd 434822780332SAdrian Chadd /* Owner now must free completed frames */ 4349eb6f0de0SAdrian Chadd } 4350eb6f0de0SAdrian Chadd 4351eb6f0de0SAdrian Chadd static struct ath_buf * 435238962489SAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 435338962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 4354eb6f0de0SAdrian Chadd { 4355eb6f0de0SAdrian Chadd struct ath_buf *nbf; 4356eb6f0de0SAdrian Chadd int error; 4357eb6f0de0SAdrian Chadd 43583f3a5dbdSAdrian Chadd /* 43593f3a5dbdSAdrian Chadd * Clone the buffer. This will handle the dma unmap and 43603f3a5dbdSAdrian Chadd * copy the node reference to the new buffer. If this 43613f3a5dbdSAdrian Chadd * works out, 'bf' will have no DMA mapping, no mbuf 43623f3a5dbdSAdrian Chadd * pointer and no node reference. 43633f3a5dbdSAdrian Chadd */ 4364eb6f0de0SAdrian Chadd nbf = ath_buf_clone(sc, bf); 4365eb6f0de0SAdrian Chadd 4366eb6f0de0SAdrian Chadd #if 0 436783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n", 4368eb6f0de0SAdrian Chadd __func__); 4369eb6f0de0SAdrian Chadd #endif 4370eb6f0de0SAdrian Chadd 4371eb6f0de0SAdrian Chadd if (nbf == NULL) { 4372eb6f0de0SAdrian Chadd /* Failed to clone */ 437383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 4374eb6f0de0SAdrian Chadd "%s: failed to clone a busy buffer\n", 4375eb6f0de0SAdrian Chadd __func__); 4376eb6f0de0SAdrian Chadd return NULL; 4377eb6f0de0SAdrian Chadd } 4378eb6f0de0SAdrian Chadd 4379eb6f0de0SAdrian Chadd /* Setup the dma for the new buffer */ 4380eb6f0de0SAdrian Chadd error = ath_tx_dmasetup(sc, nbf, nbf->bf_m); 4381eb6f0de0SAdrian Chadd if (error != 0) { 438283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 4383eb6f0de0SAdrian Chadd "%s: failed to setup dma for clone\n", 4384eb6f0de0SAdrian Chadd __func__); 4385eb6f0de0SAdrian Chadd /* 4386eb6f0de0SAdrian Chadd * Put this at the head of the list, not tail; 4387eb6f0de0SAdrian Chadd * that way it doesn't interfere with the 4388eb6f0de0SAdrian Chadd * busy buffer logic (which uses the tail of 4389eb6f0de0SAdrian Chadd * the list.) 4390eb6f0de0SAdrian Chadd */ 4391eb6f0de0SAdrian Chadd ATH_TXBUF_LOCK(sc); 439232c387f7SAdrian Chadd ath_returnbuf_head(sc, nbf); 4393eb6f0de0SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 4394eb6f0de0SAdrian Chadd return NULL; 4395eb6f0de0SAdrian Chadd } 4396eb6f0de0SAdrian Chadd 439738962489SAdrian Chadd /* Update BAW if required, before we free the original buf */ 439838962489SAdrian Chadd if (bf->bf_state.bfs_dobaw) 439938962489SAdrian Chadd ath_tx_switch_baw_buf(sc, an, tid, bf, nbf); 440038962489SAdrian Chadd 44013f3a5dbdSAdrian Chadd /* Free original buffer; return new buffer */ 4402eb6f0de0SAdrian Chadd ath_freebuf(sc, bf); 4403f1bc738eSAdrian Chadd 4404eb6f0de0SAdrian Chadd return nbf; 4405eb6f0de0SAdrian Chadd } 4406eb6f0de0SAdrian Chadd 4407eb6f0de0SAdrian Chadd /* 4408eb6f0de0SAdrian Chadd * Handle retrying an unaggregate frame in an aggregate 4409eb6f0de0SAdrian Chadd * session. 4410eb6f0de0SAdrian Chadd * 4411eb6f0de0SAdrian Chadd * If too many retries occur, pause the TID, wait for 4412eb6f0de0SAdrian Chadd * any further retransmits (as there's no reason why 4413eb6f0de0SAdrian Chadd * non-aggregate frames in an aggregate session are 4414eb6f0de0SAdrian Chadd * transmitted in-order; they just have to be in-BAW) 4415eb6f0de0SAdrian Chadd * and then queue a BAR. 4416eb6f0de0SAdrian Chadd */ 4417eb6f0de0SAdrian Chadd static void 4418eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4419eb6f0de0SAdrian Chadd { 4420eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4421eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4422eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4423eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4424eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4425eb6f0de0SAdrian Chadd 4426375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4427eb6f0de0SAdrian Chadd 4428eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4429eb6f0de0SAdrian Chadd 4430eb6f0de0SAdrian Chadd /* 4431eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4432eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4433eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4434eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4435eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4436eb6f0de0SAdrian Chadd * for us. 4437eb6f0de0SAdrian Chadd */ 4438eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4439eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4440eb6f0de0SAdrian Chadd struct ath_buf *nbf; 444138962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4442eb6f0de0SAdrian Chadd if (nbf) 4443eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4444eb6f0de0SAdrian Chadd bf = nbf; 4445eb6f0de0SAdrian Chadd else 4446eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4447eb6f0de0SAdrian Chadd } 4448eb6f0de0SAdrian Chadd 4449eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4450eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4451eb6f0de0SAdrian Chadd "%s: exceeded retries; seqno %d\n", 4452eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4453eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4454eb6f0de0SAdrian Chadd 4455eb6f0de0SAdrian Chadd /* Update BAW anyway */ 4456eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4457eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4458eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 445983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4460eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4461eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4462eb6f0de0SAdrian Chadd } 4463eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4464eb6f0de0SAdrian Chadd 446588b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 446688b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 446788b3d483SAdrian Chadd 446888b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 446988b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 447088b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 447188b3d483SAdrian Chadd 4472375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4473eb6f0de0SAdrian Chadd 4474eb6f0de0SAdrian Chadd /* Free buffer, bf is free after this call */ 4475eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4476eb6f0de0SAdrian Chadd return; 4477eb6f0de0SAdrian Chadd } 4478eb6f0de0SAdrian Chadd 4479eb6f0de0SAdrian Chadd /* 4480eb6f0de0SAdrian Chadd * This increments the retry counter as well as 4481eb6f0de0SAdrian Chadd * sets the retry flag in the ath_buf and packet 4482eb6f0de0SAdrian Chadd * body. 4483eb6f0de0SAdrian Chadd */ 4484eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4485f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4486eb6f0de0SAdrian Chadd 4487eb6f0de0SAdrian Chadd /* 4488eb6f0de0SAdrian Chadd * Insert this at the head of the queue, so it's 4489eb6f0de0SAdrian Chadd * retried before any current/subsequent frames. 4490eb6f0de0SAdrian Chadd */ 44913e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4492eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 449388b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 449488b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 449588b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4496eb6f0de0SAdrian Chadd 4497375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4498eb6f0de0SAdrian Chadd } 4499eb6f0de0SAdrian Chadd 4500eb6f0de0SAdrian Chadd /* 4501eb6f0de0SAdrian Chadd * Common code for aggregate excessive retry/subframe retry. 4502eb6f0de0SAdrian Chadd * If retrying, queues buffers to bf_q. If not, frees the 4503eb6f0de0SAdrian Chadd * buffers. 4504eb6f0de0SAdrian Chadd * 4505eb6f0de0SAdrian Chadd * XXX should unify this with ath_tx_aggr_retry_unaggr() 4506eb6f0de0SAdrian Chadd */ 4507eb6f0de0SAdrian Chadd static int 4508eb6f0de0SAdrian Chadd ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf, 4509eb6f0de0SAdrian Chadd ath_bufhead *bf_q) 4510eb6f0de0SAdrian Chadd { 4511eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4512eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4513eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4514eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4515eb6f0de0SAdrian Chadd 4516375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4517eb6f0de0SAdrian Chadd 451821840808SAdrian Chadd /* XXX clr11naggr should be done for all subframes */ 4519eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 4520eb6f0de0SAdrian Chadd ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0); 4521f1bc738eSAdrian Chadd 4522eb6f0de0SAdrian Chadd /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */ 4523eb6f0de0SAdrian Chadd 4524eb6f0de0SAdrian Chadd /* 4525eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4526eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4527eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4528eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4529eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4530eb6f0de0SAdrian Chadd * for us. 4531eb6f0de0SAdrian Chadd */ 4532eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4533eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4534eb6f0de0SAdrian Chadd struct ath_buf *nbf; 453538962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4536eb6f0de0SAdrian Chadd if (nbf) 4537eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4538eb6f0de0SAdrian Chadd bf = nbf; 4539eb6f0de0SAdrian Chadd else 4540eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4541eb6f0de0SAdrian Chadd } 4542eb6f0de0SAdrian Chadd 4543eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4544eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4545eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4546eb6f0de0SAdrian Chadd "%s: max retries: seqno %d\n", 4547eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4548eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4549eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 455083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4551eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4552eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4553eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4554eb6f0de0SAdrian Chadd return 1; 4555eb6f0de0SAdrian Chadd } 4556eb6f0de0SAdrian Chadd 4557eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4558f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4559eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Just to make sure */ 4560eb6f0de0SAdrian Chadd 456121840808SAdrian Chadd /* Clear the aggregate state */ 456221840808SAdrian Chadd bf->bf_state.bfs_aggr = 0; 456321840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; /* ??? needed? */ 456421840808SAdrian Chadd bf->bf_state.bfs_nframes = 1; 456521840808SAdrian Chadd 4566eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 4567eb6f0de0SAdrian Chadd return 0; 4568eb6f0de0SAdrian Chadd } 4569eb6f0de0SAdrian Chadd 4570eb6f0de0SAdrian Chadd /* 4571eb6f0de0SAdrian Chadd * error pkt completion for an aggregate destination 4572eb6f0de0SAdrian Chadd */ 4573eb6f0de0SAdrian Chadd static void 4574eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first, 4575eb6f0de0SAdrian Chadd struct ath_tid *tid) 4576eb6f0de0SAdrian Chadd { 4577eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4578eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4579eb6f0de0SAdrian Chadd struct ath_buf *bf_next, *bf; 4580eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4581eb6f0de0SAdrian Chadd int drops = 0; 4582eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4583eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4584eb6f0de0SAdrian Chadd 4585eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 4586eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4587eb6f0de0SAdrian Chadd 4588eb6f0de0SAdrian Chadd /* 4589eb6f0de0SAdrian Chadd * Update rate control - all frames have failed. 4590eb6f0de0SAdrian Chadd * 4591eb6f0de0SAdrian Chadd * XXX use the length in the first frame in the series; 4592eb6f0de0SAdrian Chadd * XXX just so things are consistent for now. 4593eb6f0de0SAdrian Chadd */ 4594eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc, 4595eb6f0de0SAdrian Chadd &bf_first->bf_status.ds_txstat, 4596eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_pktlen, 4597eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes); 4598eb6f0de0SAdrian Chadd 4599375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4600eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 46012d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_failall++; 4602eb6f0de0SAdrian Chadd 4603eb6f0de0SAdrian Chadd /* Retry all subframes */ 4604eb6f0de0SAdrian Chadd bf = bf_first; 4605eb6f0de0SAdrian Chadd while (bf) { 4606eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4607eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 46082d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 4609eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4610eb6f0de0SAdrian Chadd drops++; 4611eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4612eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4613eb6f0de0SAdrian Chadd } 4614eb6f0de0SAdrian Chadd bf = bf_next; 4615eb6f0de0SAdrian Chadd } 4616eb6f0de0SAdrian Chadd 4617eb6f0de0SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 4618eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4619eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 46203e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 4621eb6f0de0SAdrian Chadd } 4622eb6f0de0SAdrian Chadd 462339da9d42SAdrian Chadd /* 462439da9d42SAdrian Chadd * Schedule the TID to be re-tried. 462539da9d42SAdrian Chadd */ 4626eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 4627eb6f0de0SAdrian Chadd 4628eb6f0de0SAdrian Chadd /* 4629eb6f0de0SAdrian Chadd * send bar if we dropped any frames 4630eb6f0de0SAdrian Chadd * 4631eb6f0de0SAdrian Chadd * Keep the txq lock held for now, as we need to ensure 4632eb6f0de0SAdrian Chadd * that ni_txseqs[] is consistent (as it's being updated 4633eb6f0de0SAdrian Chadd * in the ifnet TX context or raw TX context.) 4634eb6f0de0SAdrian Chadd */ 4635eb6f0de0SAdrian Chadd if (drops) { 463688b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 463788b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, tid); 4638eb6f0de0SAdrian Chadd } 4639eb6f0de0SAdrian Chadd 464088b3d483SAdrian Chadd /* 464188b3d483SAdrian Chadd * Send BAR if required 464288b3d483SAdrian Chadd */ 464388b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, tid)) 464488b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, tid); 4645f1bc738eSAdrian Chadd 4646375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 464788b3d483SAdrian Chadd 4648eb6f0de0SAdrian Chadd /* Complete frames which errored out */ 4649eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4650eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4651eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4652eb6f0de0SAdrian Chadd } 4653eb6f0de0SAdrian Chadd } 4654eb6f0de0SAdrian Chadd 4655eb6f0de0SAdrian Chadd /* 4656eb6f0de0SAdrian Chadd * Handle clean-up of packets from an aggregate list. 4657eb6f0de0SAdrian Chadd * 4658eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4659eb6f0de0SAdrian Chadd * torn down. 4660eb6f0de0SAdrian Chadd */ 4661eb6f0de0SAdrian Chadd static void 4662eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first) 4663eb6f0de0SAdrian Chadd { 4664eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4665eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4666eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4667eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4668eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4669eb6f0de0SAdrian Chadd 4670375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4671eb6f0de0SAdrian Chadd 4672eb6f0de0SAdrian Chadd /* update incomp */ 4673f172ef75SAdrian Chadd atid->incomp--; 4674f172ef75SAdrian Chadd 4675f172ef75SAdrian Chadd /* Update the BAW */ 4676302868d9SAdrian Chadd bf = bf_first; 4677eb6f0de0SAdrian Chadd while (bf) { 4678f172ef75SAdrian Chadd /* XXX refactor! */ 4679f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4680f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4681f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 4682f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 4683f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n", 4684f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4685f172ef75SAdrian Chadd } 4686eb6f0de0SAdrian Chadd bf = bf->bf_next; 4687eb6f0de0SAdrian Chadd } 4688eb6f0de0SAdrian Chadd 4689eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4690eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4691eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4692eb6f0de0SAdrian Chadd __func__, tid); 4693eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4694eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4695eb6f0de0SAdrian Chadd } 469688b3d483SAdrian Chadd 469788b3d483SAdrian Chadd /* Send BAR if required */ 4698f1bc738eSAdrian Chadd /* XXX why would we send a BAR when transitioning to non-aggregation? */ 4699302868d9SAdrian Chadd /* 4700302868d9SAdrian Chadd * XXX TODO: we should likely just tear down the BAR state here, 4701302868d9SAdrian Chadd * rather than sending a BAR. 4702302868d9SAdrian Chadd */ 470388b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 470488b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4705f1bc738eSAdrian Chadd 4706375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4707eb6f0de0SAdrian Chadd 4708706bb444SAdrian Chadd /* Handle frame completion as individual frames */ 4709302868d9SAdrian Chadd bf = bf_first; 4710eb6f0de0SAdrian Chadd while (bf) { 4711eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4712706bb444SAdrian Chadd bf->bf_next = NULL; 4713eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 4714eb6f0de0SAdrian Chadd bf = bf_next; 4715eb6f0de0SAdrian Chadd } 4716eb6f0de0SAdrian Chadd } 4717eb6f0de0SAdrian Chadd 4718eb6f0de0SAdrian Chadd /* 4719eb6f0de0SAdrian Chadd * Handle completion of an set of aggregate frames. 4720eb6f0de0SAdrian Chadd * 4721eb6f0de0SAdrian Chadd * Note: the completion handler is the last descriptor in the aggregate, 4722eb6f0de0SAdrian Chadd * not the last descriptor in the first frame. 4723eb6f0de0SAdrian Chadd */ 4724eb6f0de0SAdrian Chadd static void 4725d4365d16SAdrian Chadd ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first, 4726d4365d16SAdrian Chadd int fail) 4727eb6f0de0SAdrian Chadd { 4728eb6f0de0SAdrian Chadd //struct ath_desc *ds = bf->bf_lastds; 4729eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4730eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4731eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4732eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4733eb6f0de0SAdrian Chadd struct ath_tx_status ts; 4734eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4735eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4736eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4737eb6f0de0SAdrian Chadd int seq_st, tx_ok; 4738eb6f0de0SAdrian Chadd int hasba, isaggr; 4739eb6f0de0SAdrian Chadd uint32_t ba[2]; 4740eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4741eb6f0de0SAdrian Chadd int ba_index; 4742eb6f0de0SAdrian Chadd int drops = 0; 4743eb6f0de0SAdrian Chadd int nframes = 0, nbad = 0, nf; 4744eb6f0de0SAdrian Chadd int pktlen; 4745eb6f0de0SAdrian Chadd /* XXX there's too much on the stack? */ 4746b815538dSAdrian Chadd struct ath_rc_series rc[ATH_RC_NUM]; 4747eb6f0de0SAdrian Chadd int txseq; 4748eb6f0de0SAdrian Chadd 4749eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n", 4750eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4751eb6f0de0SAdrian Chadd 47520aa5c1bbSAdrian Chadd /* 47530aa5c1bbSAdrian Chadd * Take a copy; this may be needed -after- bf_first 47540aa5c1bbSAdrian Chadd * has been completed and freed. 47550aa5c1bbSAdrian Chadd */ 47560aa5c1bbSAdrian Chadd ts = bf_first->bf_status.ds_txstat; 47570aa5c1bbSAdrian Chadd 4758f1bc738eSAdrian Chadd TAILQ_INIT(&bf_q); 4759f1bc738eSAdrian Chadd TAILQ_INIT(&bf_cq); 4760f1bc738eSAdrian Chadd 4761eb6f0de0SAdrian Chadd /* The TID state is kept behind the TXQ lock */ 4762375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4763eb6f0de0SAdrian Chadd 4764eb6f0de0SAdrian Chadd atid->hwq_depth--; 4765eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 476683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n", 4767eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4768eb6f0de0SAdrian Chadd 4769eb6f0de0SAdrian Chadd /* 4770f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 4771f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 4772f1bc738eSAdrian Chadd * function. 47730aa5c1bbSAdrian Chadd * 47740aa5c1bbSAdrian Chadd * XXX this is duplicate work, ew. 4775f1bc738eSAdrian Chadd */ 4776f1bc738eSAdrian Chadd if (atid->isfiltered) 4777f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4778f1bc738eSAdrian Chadd 4779f1bc738eSAdrian Chadd /* 4780eb6f0de0SAdrian Chadd * Punt cleanup to the relevant function, not our problem now 4781eb6f0de0SAdrian Chadd */ 4782eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 4783f1bc738eSAdrian Chadd if (atid->isfiltered) 478483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4785f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 4786f1bc738eSAdrian Chadd __func__); 4787375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4788eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(sc, bf_first); 4789eb6f0de0SAdrian Chadd return; 4790eb6f0de0SAdrian Chadd } 4791eb6f0de0SAdrian Chadd 4792eb6f0de0SAdrian Chadd /* 4793f1bc738eSAdrian Chadd * If the frame is filtered, transition to filtered frame 4794f1bc738eSAdrian Chadd * mode and add this to the filtered frame list. 4795f1bc738eSAdrian Chadd * 4796f1bc738eSAdrian Chadd * XXX TODO: figure out how this interoperates with 4797f1bc738eSAdrian Chadd * BAR, pause and cleanup states. 4798f1bc738eSAdrian Chadd */ 4799f1bc738eSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 4800f1bc738eSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 4801f1bc738eSAdrian Chadd if (fail != 0) 480283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4803f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", __func__, fail); 4804f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq); 4805f1bc738eSAdrian Chadd 4806f1bc738eSAdrian Chadd /* Remove from BAW */ 4807f1bc738eSAdrian Chadd TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) { 4808f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 4809f1bc738eSAdrian Chadd drops++; 4810f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4811f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4812f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 481383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4814f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 4815f1bc738eSAdrian Chadd __func__, 4816f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4817f1bc738eSAdrian Chadd } 4818f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4819f1bc738eSAdrian Chadd } 4820f1bc738eSAdrian Chadd /* 4821f1bc738eSAdrian Chadd * If any intermediate frames in the BAW were dropped when 4822f1bc738eSAdrian Chadd * handling filtering things, send a BAR. 4823f1bc738eSAdrian Chadd */ 4824f1bc738eSAdrian Chadd if (drops) 4825f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 4826f1bc738eSAdrian Chadd 4827f1bc738eSAdrian Chadd /* 4828f1bc738eSAdrian Chadd * Finish up by sending a BAR if required and freeing 4829f1bc738eSAdrian Chadd * the frames outside of the TX lock. 4830f1bc738eSAdrian Chadd */ 4831f1bc738eSAdrian Chadd goto finish_send_bar; 4832f1bc738eSAdrian Chadd } 4833f1bc738eSAdrian Chadd 4834f1bc738eSAdrian Chadd /* 4835eb6f0de0SAdrian Chadd * XXX for now, use the first frame in the aggregate for 4836eb6f0de0SAdrian Chadd * XXX rate control completion; it's at least consistent. 4837eb6f0de0SAdrian Chadd */ 4838eb6f0de0SAdrian Chadd pktlen = bf_first->bf_state.bfs_pktlen; 4839eb6f0de0SAdrian Chadd 4840eb6f0de0SAdrian Chadd /* 4841e9a6408eSAdrian Chadd * Handle errors first! 4842e9a6408eSAdrian Chadd * 4843e9a6408eSAdrian Chadd * Here, handle _any_ error as a "exceeded retries" error. 4844e9a6408eSAdrian Chadd * Later on (when filtered frames are to be specially handled) 4845e9a6408eSAdrian Chadd * it'll have to be expanded. 4846eb6f0de0SAdrian Chadd */ 4847e9a6408eSAdrian Chadd #if 0 4848eb6f0de0SAdrian Chadd if (ts.ts_status & HAL_TXERR_XRETRY) { 4849e9a6408eSAdrian Chadd #endif 4850e9a6408eSAdrian Chadd if (ts.ts_status != 0) { 4851375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4852eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(sc, bf_first, atid); 4853eb6f0de0SAdrian Chadd return; 4854eb6f0de0SAdrian Chadd } 4855eb6f0de0SAdrian Chadd 4856eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4857eb6f0de0SAdrian Chadd 4858eb6f0de0SAdrian Chadd /* 4859eb6f0de0SAdrian Chadd * extract starting sequence and block-ack bitmap 4860eb6f0de0SAdrian Chadd */ 4861eb6f0de0SAdrian Chadd /* XXX endian-ness of seq_st, ba? */ 4862eb6f0de0SAdrian Chadd seq_st = ts.ts_seqnum; 4863eb6f0de0SAdrian Chadd hasba = !! (ts.ts_flags & HAL_TX_BA); 4864eb6f0de0SAdrian Chadd tx_ok = (ts.ts_status == 0); 4865eb6f0de0SAdrian Chadd isaggr = bf_first->bf_state.bfs_aggr; 4866eb6f0de0SAdrian Chadd ba[0] = ts.ts_ba_low; 4867eb6f0de0SAdrian Chadd ba[1] = ts.ts_ba_high; 4868eb6f0de0SAdrian Chadd 4869eb6f0de0SAdrian Chadd /* 4870eb6f0de0SAdrian Chadd * Copy the TX completion status and the rate control 4871eb6f0de0SAdrian Chadd * series from the first descriptor, as it may be freed 4872eb6f0de0SAdrian Chadd * before the rate control code can get its grubby fingers 4873eb6f0de0SAdrian Chadd * into things. 4874eb6f0de0SAdrian Chadd */ 4875eb6f0de0SAdrian Chadd memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc)); 4876eb6f0de0SAdrian Chadd 4877eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4878d4365d16SAdrian Chadd "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, " 4879d4365d16SAdrian Chadd "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n", 4880eb6f0de0SAdrian Chadd __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags, 4881eb6f0de0SAdrian Chadd isaggr, seq_st, hasba, ba[0], ba[1]); 4882eb6f0de0SAdrian Chadd 4883b3420862SAdrian Chadd /* 4884b3420862SAdrian Chadd * The reference driver doesn't do this; it simply ignores 4885b3420862SAdrian Chadd * this check in its entirety. 4886b3420862SAdrian Chadd * 4887b3420862SAdrian Chadd * I've seen this occur when using iperf to send traffic 4888b3420862SAdrian Chadd * out tid 1 - the aggregate frames are all marked as TID 1, 4889b3420862SAdrian Chadd * but the TXSTATUS has TID=0. So, let's just ignore this 4890b3420862SAdrian Chadd * check. 4891b3420862SAdrian Chadd */ 4892b3420862SAdrian Chadd #if 0 4893eb6f0de0SAdrian Chadd /* Occasionally, the MAC sends a tx status for the wrong TID. */ 4894eb6f0de0SAdrian Chadd if (tid != ts.ts_tid) { 489583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n", 4896eb6f0de0SAdrian Chadd __func__, tid, ts.ts_tid); 4897eb6f0de0SAdrian Chadd tx_ok = 0; 4898eb6f0de0SAdrian Chadd } 4899b3420862SAdrian Chadd #endif 4900eb6f0de0SAdrian Chadd 4901eb6f0de0SAdrian Chadd /* AR5416 BA bug; this requires an interface reset */ 4902eb6f0de0SAdrian Chadd if (isaggr && tx_ok && (! hasba)) { 490383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4904d4365d16SAdrian Chadd "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, " 4905d4365d16SAdrian Chadd "seq_st=%d\n", 4906eb6f0de0SAdrian Chadd __func__, hasba, tx_ok, isaggr, seq_st); 4907eb6f0de0SAdrian Chadd /* XXX TODO: schedule an interface reset */ 49080f078d63SJohn Baldwin #ifdef ATH_DEBUG 49096abbbae5SAdrian Chadd ath_printtxbuf(sc, bf_first, 49106abbbae5SAdrian Chadd sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0); 49110f078d63SJohn Baldwin #endif 4912eb6f0de0SAdrian Chadd } 4913eb6f0de0SAdrian Chadd 4914eb6f0de0SAdrian Chadd /* 4915eb6f0de0SAdrian Chadd * Walk the list of frames, figure out which ones were correctly 4916eb6f0de0SAdrian Chadd * sent and which weren't. 4917eb6f0de0SAdrian Chadd */ 4918eb6f0de0SAdrian Chadd bf = bf_first; 4919eb6f0de0SAdrian Chadd nf = bf_first->bf_state.bfs_nframes; 4920eb6f0de0SAdrian Chadd 4921eb6f0de0SAdrian Chadd /* bf_first is going to be invalid once this list is walked */ 4922eb6f0de0SAdrian Chadd bf_first = NULL; 4923eb6f0de0SAdrian Chadd 4924eb6f0de0SAdrian Chadd /* 4925eb6f0de0SAdrian Chadd * Walk the list of completed frames and determine 4926eb6f0de0SAdrian Chadd * which need to be completed and which need to be 4927eb6f0de0SAdrian Chadd * retransmitted. 4928eb6f0de0SAdrian Chadd * 4929eb6f0de0SAdrian Chadd * For completed frames, the completion functions need 4930eb6f0de0SAdrian Chadd * to be called at the end of this function as the last 4931eb6f0de0SAdrian Chadd * node reference may free the node. 4932eb6f0de0SAdrian Chadd * 4933eb6f0de0SAdrian Chadd * Finally, since the TXQ lock can't be held during the 4934eb6f0de0SAdrian Chadd * completion callback (to avoid lock recursion), 4935eb6f0de0SAdrian Chadd * the completion calls have to be done outside of the 4936eb6f0de0SAdrian Chadd * lock. 4937eb6f0de0SAdrian Chadd */ 4938eb6f0de0SAdrian Chadd while (bf) { 4939eb6f0de0SAdrian Chadd nframes++; 4940d4365d16SAdrian Chadd ba_index = ATH_BA_INDEX(seq_st, 4941d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4942eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4943eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 4944eb6f0de0SAdrian Chadd 4945eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4946eb6f0de0SAdrian Chadd "%s: checking bf=%p seqno=%d; ack=%d\n", 4947eb6f0de0SAdrian Chadd __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 4948eb6f0de0SAdrian Chadd ATH_BA_ISSET(ba, ba_index)); 4949eb6f0de0SAdrian Chadd 4950eb6f0de0SAdrian Chadd if (tx_ok && ATH_BA_ISSET(ba, ba_index)) { 49512d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_ok++; 4952eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4953eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4954eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 495583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4956eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4957eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4958eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4959eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4960eb6f0de0SAdrian Chadd } else { 49612d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 4962eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4963eb6f0de0SAdrian Chadd drops++; 4964eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4965eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4966eb6f0de0SAdrian Chadd } 4967eb6f0de0SAdrian Chadd nbad++; 4968eb6f0de0SAdrian Chadd } 4969eb6f0de0SAdrian Chadd bf = bf_next; 4970eb6f0de0SAdrian Chadd } 4971eb6f0de0SAdrian Chadd 4972eb6f0de0SAdrian Chadd /* 4973eb6f0de0SAdrian Chadd * Now that the BAW updates have been done, unlock 4974eb6f0de0SAdrian Chadd * 4975eb6f0de0SAdrian Chadd * txseq is grabbed before the lock is released so we 4976eb6f0de0SAdrian Chadd * have a consistent view of what -was- in the BAW. 4977eb6f0de0SAdrian Chadd * Anything after this point will not yet have been 4978eb6f0de0SAdrian Chadd * TXed. 4979eb6f0de0SAdrian Chadd */ 4980eb6f0de0SAdrian Chadd txseq = tap->txa_start; 4981375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4982eb6f0de0SAdrian Chadd 4983eb6f0de0SAdrian Chadd if (nframes != nf) 498483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4985eb6f0de0SAdrian Chadd "%s: num frames seen=%d; bf nframes=%d\n", 4986eb6f0de0SAdrian Chadd __func__, nframes, nf); 4987eb6f0de0SAdrian Chadd 4988eb6f0de0SAdrian Chadd /* 4989eb6f0de0SAdrian Chadd * Now we know how many frames were bad, call the rate 4990eb6f0de0SAdrian Chadd * control code. 4991eb6f0de0SAdrian Chadd */ 4992eb6f0de0SAdrian Chadd if (fail == 0) 4993d4365d16SAdrian Chadd ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes, 4994d4365d16SAdrian Chadd nbad); 4995eb6f0de0SAdrian Chadd 4996eb6f0de0SAdrian Chadd /* 4997eb6f0de0SAdrian Chadd * send bar if we dropped any frames 4998eb6f0de0SAdrian Chadd */ 4999eb6f0de0SAdrian Chadd if (drops) { 500088b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 5001375307d4SAdrian Chadd ATH_TX_LOCK(sc); 500288b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 5003375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5004eb6f0de0SAdrian Chadd } 5005eb6f0de0SAdrian Chadd 500639da9d42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 500739da9d42SAdrian Chadd "%s: txa_start now %d\n", __func__, tap->txa_start); 500839da9d42SAdrian Chadd 5009375307d4SAdrian Chadd ATH_TX_LOCK(sc); 501039da9d42SAdrian Chadd 501139da9d42SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 5012eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 5013eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 50143e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 5015eb6f0de0SAdrian Chadd } 5016eb6f0de0SAdrian Chadd 501739da9d42SAdrian Chadd /* 501839da9d42SAdrian Chadd * Reschedule to grab some further frames. 501939da9d42SAdrian Chadd */ 502039da9d42SAdrian Chadd ath_tx_tid_sched(sc, atid); 5021eb6f0de0SAdrian Chadd 502288b3d483SAdrian Chadd /* 5023f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 5024f1bc738eSAdrian Chadd * 5025f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 5026f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 5027f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 5028f1bc738eSAdrian Chadd * (complete or otherwise) frame. 5029f1bc738eSAdrian Chadd * 5030f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 5031f1bc738eSAdrian Chadd */ 5032f1bc738eSAdrian Chadd if (atid->isfiltered) 5033f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5034f1bc738eSAdrian Chadd 5035f1bc738eSAdrian Chadd finish_send_bar: 5036f1bc738eSAdrian Chadd 5037f1bc738eSAdrian Chadd /* 503888b3d483SAdrian Chadd * Send BAR if required 503988b3d483SAdrian Chadd */ 504088b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 504188b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 504239da9d42SAdrian Chadd 5043375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 504488b3d483SAdrian Chadd 5045eb6f0de0SAdrian Chadd /* Do deferred completion */ 5046eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 5047eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 5048eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 5049eb6f0de0SAdrian Chadd } 5050eb6f0de0SAdrian Chadd } 5051eb6f0de0SAdrian Chadd 5052eb6f0de0SAdrian Chadd /* 5053eb6f0de0SAdrian Chadd * Handle completion of unaggregated frames in an ADDBA 5054eb6f0de0SAdrian Chadd * session. 5055eb6f0de0SAdrian Chadd * 5056eb6f0de0SAdrian Chadd * Fail is set to 1 if the entry is being freed via a call to 5057eb6f0de0SAdrian Chadd * ath_tx_draintxq(). 5058eb6f0de0SAdrian Chadd */ 5059eb6f0de0SAdrian Chadd static void 5060eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail) 5061eb6f0de0SAdrian Chadd { 5062eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 5063eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5064eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 5065eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 50660aa5c1bbSAdrian Chadd struct ath_tx_status ts; 5067f1bc738eSAdrian Chadd int drops = 0; 5068eb6f0de0SAdrian Chadd 5069eb6f0de0SAdrian Chadd /* 50700aa5c1bbSAdrian Chadd * Take a copy of this; filtering/cloning the frame may free the 50710aa5c1bbSAdrian Chadd * bf pointer. 50720aa5c1bbSAdrian Chadd */ 50730aa5c1bbSAdrian Chadd ts = bf->bf_status.ds_txstat; 50740aa5c1bbSAdrian Chadd 50750aa5c1bbSAdrian Chadd /* 5076eb6f0de0SAdrian Chadd * Update rate control status here, before we possibly 5077eb6f0de0SAdrian Chadd * punt to retry or cleanup. 5078eb6f0de0SAdrian Chadd * 5079eb6f0de0SAdrian Chadd * Do it outside of the TXQ lock. 5080eb6f0de0SAdrian Chadd */ 5081875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 5082eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 5083eb6f0de0SAdrian Chadd &bf->bf_status.ds_txstat, 5084eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, 50850aa5c1bbSAdrian Chadd 1, (ts.ts_status == 0) ? 0 : 1); 5086eb6f0de0SAdrian Chadd 5087eb6f0de0SAdrian Chadd /* 5088eb6f0de0SAdrian Chadd * This is called early so atid->hwq_depth can be tracked. 5089eb6f0de0SAdrian Chadd * This unfortunately means that it's released and regrabbed 5090eb6f0de0SAdrian Chadd * during retry and cleanup. That's rather inefficient. 5091eb6f0de0SAdrian Chadd */ 5092375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5093eb6f0de0SAdrian Chadd 5094eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 509583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__); 5096eb6f0de0SAdrian Chadd 5097d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 5098d4365d16SAdrian Chadd "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n", 5099d4365d16SAdrian Chadd __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth, 5100d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 5101eb6f0de0SAdrian Chadd 5102eb6f0de0SAdrian Chadd atid->hwq_depth--; 5103eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 510483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 5105eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 5106eb6f0de0SAdrian Chadd 5107eb6f0de0SAdrian Chadd /* 5108f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 5109f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 5110f1bc738eSAdrian Chadd * function. 5111f1bc738eSAdrian Chadd */ 5112f1bc738eSAdrian Chadd if (atid->isfiltered) 5113f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5114f1bc738eSAdrian Chadd 5115f1bc738eSAdrian Chadd /* 5116eb6f0de0SAdrian Chadd * If a cleanup is in progress, punt to comp_cleanup; 5117eb6f0de0SAdrian Chadd * rather than handling it here. It's thus their 5118eb6f0de0SAdrian Chadd * responsibility to clean up, call the completion 5119eb6f0de0SAdrian Chadd * function in net80211, etc. 5120eb6f0de0SAdrian Chadd */ 5121eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 5122f1bc738eSAdrian Chadd if (atid->isfiltered) 512383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5124f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 5125f1bc738eSAdrian Chadd __func__); 5126375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5127d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n", 5128d4365d16SAdrian Chadd __func__); 5129eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(sc, bf); 5130eb6f0de0SAdrian Chadd return; 5131eb6f0de0SAdrian Chadd } 5132eb6f0de0SAdrian Chadd 5133eb6f0de0SAdrian Chadd /* 5134f1bc738eSAdrian Chadd * XXX TODO: how does cleanup, BAR and filtered frame handling 5135f1bc738eSAdrian Chadd * overlap? 5136f1bc738eSAdrian Chadd * 5137f1bc738eSAdrian Chadd * If the frame is filtered OR if it's any failure but 5138f1bc738eSAdrian Chadd * the TID is filtered, the frame must be added to the 5139f1bc738eSAdrian Chadd * filtered frame list. 5140f1bc738eSAdrian Chadd * 5141f1bc738eSAdrian Chadd * However - a busy buffer can't be added to the filtered 5142f1bc738eSAdrian Chadd * list as it will end up being recycled without having 5143f1bc738eSAdrian Chadd * been made available for the hardware. 5144f1bc738eSAdrian Chadd */ 51450aa5c1bbSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 51460aa5c1bbSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 5147f1bc738eSAdrian Chadd int freeframe; 5148f1bc738eSAdrian Chadd 5149f1bc738eSAdrian Chadd if (fail != 0) 515083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5151f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", 515283bbd5ebSRui Paulo __func__, fail); 5153f1bc738eSAdrian Chadd freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf); 515442fdd8e7SAdrian Chadd /* 515542fdd8e7SAdrian Chadd * If freeframe=0 then bf is no longer ours; don't 515642fdd8e7SAdrian Chadd * touch it. 515742fdd8e7SAdrian Chadd */ 5158f1bc738eSAdrian Chadd if (freeframe) { 5159f1bc738eSAdrian Chadd /* Remove from BAW */ 5160f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 5161f1bc738eSAdrian Chadd drops++; 5162f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5163f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5164f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 516583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5166f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 5167f1bc738eSAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5168f1bc738eSAdrian Chadd } 5169f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5170f1bc738eSAdrian Chadd } 5171f1bc738eSAdrian Chadd 5172f1bc738eSAdrian Chadd /* 5173f1bc738eSAdrian Chadd * If the frame couldn't be filtered, treat it as a drop and 5174f1bc738eSAdrian Chadd * prepare to send a BAR. 5175f1bc738eSAdrian Chadd */ 5176f1bc738eSAdrian Chadd if (freeframe && drops) 5177f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 5178f1bc738eSAdrian Chadd 5179f1bc738eSAdrian Chadd /* 5180f1bc738eSAdrian Chadd * Send BAR if required 5181f1bc738eSAdrian Chadd */ 5182f1bc738eSAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 5183f1bc738eSAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 5184f1bc738eSAdrian Chadd 5185375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5186f1bc738eSAdrian Chadd /* 5187f1bc738eSAdrian Chadd * If freeframe is set, then the frame couldn't be 5188f1bc738eSAdrian Chadd * cloned and bf is still valid. Just complete/free it. 5189f1bc738eSAdrian Chadd */ 5190f1bc738eSAdrian Chadd if (freeframe) 5191f1bc738eSAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5192f1bc738eSAdrian Chadd 5193f1bc738eSAdrian Chadd return; 5194f1bc738eSAdrian Chadd } 5195f1bc738eSAdrian Chadd /* 5196eb6f0de0SAdrian Chadd * Don't bother with the retry check if all frames 5197eb6f0de0SAdrian Chadd * are being failed (eg during queue deletion.) 5198eb6f0de0SAdrian Chadd */ 5199e9a6408eSAdrian Chadd #if 0 5200eb6f0de0SAdrian Chadd if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) { 5201e9a6408eSAdrian Chadd #endif 52020aa5c1bbSAdrian Chadd if (fail == 0 && ts.ts_status != 0) { 5203375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5204d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n", 5205d4365d16SAdrian Chadd __func__); 5206eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(sc, bf); 5207eb6f0de0SAdrian Chadd return; 5208eb6f0de0SAdrian Chadd } 5209eb6f0de0SAdrian Chadd 5210eb6f0de0SAdrian Chadd /* Success? Complete */ 5211eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n", 5212eb6f0de0SAdrian Chadd __func__, tid, SEQNO(bf->bf_state.bfs_seqno)); 5213eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5214eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5215eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5216eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 521783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5218eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 5219eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5220eb6f0de0SAdrian Chadd } 5221eb6f0de0SAdrian Chadd 522288b3d483SAdrian Chadd /* 5223f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 5224f1bc738eSAdrian Chadd * 5225f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 5226f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 5227f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 5228f1bc738eSAdrian Chadd * (complete or otherwise) frame. 5229f1bc738eSAdrian Chadd * 5230f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 5231f1bc738eSAdrian Chadd */ 5232f1bc738eSAdrian Chadd if (atid->isfiltered) 5233f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5234f1bc738eSAdrian Chadd 5235f1bc738eSAdrian Chadd /* 523688b3d483SAdrian Chadd * Send BAR if required 523788b3d483SAdrian Chadd */ 523888b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 523988b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 524088b3d483SAdrian Chadd 5241375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5242eb6f0de0SAdrian Chadd 5243eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5244eb6f0de0SAdrian Chadd /* bf is freed at this point */ 5245eb6f0de0SAdrian Chadd } 5246eb6f0de0SAdrian Chadd 5247eb6f0de0SAdrian Chadd void 5248eb6f0de0SAdrian Chadd ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 5249eb6f0de0SAdrian Chadd { 5250eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_aggr) 5251eb6f0de0SAdrian Chadd ath_tx_aggr_comp_aggr(sc, bf, fail); 5252eb6f0de0SAdrian Chadd else 5253eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(sc, bf, fail); 5254eb6f0de0SAdrian Chadd } 5255eb6f0de0SAdrian Chadd 5256eb6f0de0SAdrian Chadd /* 5257eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 5258eb6f0de0SAdrian Chadd * 5259eb6f0de0SAdrian Chadd * This is the aggregate version. 5260eb6f0de0SAdrian Chadd */ 5261eb6f0de0SAdrian Chadd void 5262eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an, 5263eb6f0de0SAdrian Chadd struct ath_tid *tid) 5264eb6f0de0SAdrian Chadd { 5265eb6f0de0SAdrian Chadd struct ath_buf *bf; 5266eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5267eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5268eb6f0de0SAdrian Chadd ATH_AGGR_STATUS status; 5269eb6f0de0SAdrian Chadd ath_bufhead bf_q; 5270eb6f0de0SAdrian Chadd 5271eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid); 5272375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5273eb6f0de0SAdrian Chadd 527422a3aee6SAdrian Chadd /* 527522a3aee6SAdrian Chadd * XXX TODO: If we're called for a queue that we're leaking frames to, 527622a3aee6SAdrian Chadd * ensure we only leak one. 527722a3aee6SAdrian Chadd */ 527822a3aee6SAdrian Chadd 5279eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 5280eb6f0de0SAdrian Chadd 5281eb6f0de0SAdrian Chadd if (tid->tid == IEEE80211_NONQOS_TID) 528283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 528383bbd5ebSRui Paulo "%s: called for TID=NONQOS_TID?\n", __func__); 5284eb6f0de0SAdrian Chadd 5285eb6f0de0SAdrian Chadd for (;;) { 5286eb6f0de0SAdrian Chadd status = ATH_AGGR_DONE; 5287eb6f0de0SAdrian Chadd 5288eb6f0de0SAdrian Chadd /* 5289eb6f0de0SAdrian Chadd * If the upper layer has paused the TID, don't 5290eb6f0de0SAdrian Chadd * queue any further packets. 5291eb6f0de0SAdrian Chadd * 5292eb6f0de0SAdrian Chadd * This can also occur from the completion task because 5293eb6f0de0SAdrian Chadd * of packet loss; but as its serialised with this code, 5294eb6f0de0SAdrian Chadd * it won't "appear" half way through queuing packets. 5295eb6f0de0SAdrian Chadd */ 529622a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5297eb6f0de0SAdrian Chadd break; 5298eb6f0de0SAdrian Chadd 52993e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5300eb6f0de0SAdrian Chadd if (bf == NULL) { 5301eb6f0de0SAdrian Chadd break; 5302eb6f0de0SAdrian Chadd } 5303eb6f0de0SAdrian Chadd 5304eb6f0de0SAdrian Chadd /* 5305eb6f0de0SAdrian Chadd * If the packet doesn't fall within the BAW (eg a NULL 5306eb6f0de0SAdrian Chadd * data frame), schedule it directly; continue. 5307eb6f0de0SAdrian Chadd */ 5308eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 5309d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5310d4365d16SAdrian Chadd "%s: non-baw packet\n", 5311eb6f0de0SAdrian Chadd __func__); 53123e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 53132a9f83afSAdrian Chadd 53142a9f83afSAdrian Chadd if (bf->bf_state.bfs_nframes > 1) 531583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 53162a9f83afSAdrian Chadd "%s: aggr=%d, nframes=%d\n", 53172a9f83afSAdrian Chadd __func__, 53182a9f83afSAdrian Chadd bf->bf_state.bfs_aggr, 53192a9f83afSAdrian Chadd bf->bf_state.bfs_nframes); 53202a9f83afSAdrian Chadd 53212a9f83afSAdrian Chadd /* 53222a9f83afSAdrian Chadd * This shouldn't happen - such frames shouldn't 53232a9f83afSAdrian Chadd * ever have been queued as an aggregate in the 53242a9f83afSAdrian Chadd * first place. However, make sure the fields 53252a9f83afSAdrian Chadd * are correctly setup just to be totally sure. 53262a9f83afSAdrian Chadd */ 5327eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 53282a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 53292a9f83afSAdrian Chadd 53304e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 53314e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 53324e81f27cSAdrian Chadd 5333eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5334e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5335e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5336eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5337e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5338eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5339eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5340eb6f0de0SAdrian Chadd 5341eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_nonbaw_pkt++; 5342eb6f0de0SAdrian Chadd 5343eb6f0de0SAdrian Chadd /* Queue the packet; continue */ 5344eb6f0de0SAdrian Chadd goto queuepkt; 5345eb6f0de0SAdrian Chadd } 5346eb6f0de0SAdrian Chadd 5347eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 5348eb6f0de0SAdrian Chadd 5349eb6f0de0SAdrian Chadd /* 5350eb6f0de0SAdrian Chadd * Do a rate control lookup on the first frame in the 5351eb6f0de0SAdrian Chadd * list. The rate control code needs that to occur 5352eb6f0de0SAdrian Chadd * before it can determine whether to TX. 5353eb6f0de0SAdrian Chadd * It's inaccurate because the rate control code doesn't 5354eb6f0de0SAdrian Chadd * really "do" aggregate lookups, so it only considers 5355eb6f0de0SAdrian Chadd * the size of the first frame. 5356eb6f0de0SAdrian Chadd */ 5357eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5358eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = 0; 5359eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = 0; 5360e2e4a2c2SAdrian Chadd 5361e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5362e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5363e2e4a2c2SAdrian Chadd 5364e2e4a2c2SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5365eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5366eb6f0de0SAdrian Chadd 5367eb6f0de0SAdrian Chadd status = ath_tx_form_aggr(sc, an, tid, &bf_q); 5368eb6f0de0SAdrian Chadd 5369eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5370eb6f0de0SAdrian Chadd "%s: ath_tx_form_aggr() status=%d\n", __func__, status); 5371eb6f0de0SAdrian Chadd 5372eb6f0de0SAdrian Chadd /* 5373eb6f0de0SAdrian Chadd * No frames to be picked up - out of BAW 5374eb6f0de0SAdrian Chadd */ 5375eb6f0de0SAdrian Chadd if (TAILQ_EMPTY(&bf_q)) 5376eb6f0de0SAdrian Chadd break; 5377eb6f0de0SAdrian Chadd 5378eb6f0de0SAdrian Chadd /* 5379eb6f0de0SAdrian Chadd * This assumes that the descriptor list in the ath_bufhead 5380eb6f0de0SAdrian Chadd * are already linked together via bf_next pointers. 5381eb6f0de0SAdrian Chadd */ 5382eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&bf_q); 5383eb6f0de0SAdrian Chadd 5384e2e4a2c2SAdrian Chadd if (status == ATH_AGGR_8K_LIMITED) 5385e2e4a2c2SAdrian Chadd sc->sc_aggr_stats.aggr_rts_aggr_limited++; 5386e2e4a2c2SAdrian Chadd 5387eb6f0de0SAdrian Chadd /* 5388eb6f0de0SAdrian Chadd * If it's the only frame send as non-aggregate 5389eb6f0de0SAdrian Chadd * assume that ath_tx_form_aggr() has checked 5390eb6f0de0SAdrian Chadd * whether it's in the BAW and added it appropriately. 5391eb6f0de0SAdrian Chadd */ 5392eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_nframes == 1) { 5393eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5394eb6f0de0SAdrian Chadd "%s: single-frame aggregate\n", __func__); 53954e81f27cSAdrian Chadd 53964e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 53974e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 53984e81f27cSAdrian Chadd 5399eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 540021840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; 5401eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5402eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5403eb6f0de0SAdrian Chadd if (status == ATH_AGGR_BAW_CLOSED) 5404eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_baw_closed_single_pkt++; 5405eb6f0de0SAdrian Chadd else 5406eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_single_pkt++; 5407eb6f0de0SAdrian Chadd } else { 5408eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5409d4365d16SAdrian Chadd "%s: multi-frame aggregate: %d frames, " 5410d4365d16SAdrian Chadd "length %d\n", 5411eb6f0de0SAdrian Chadd __func__, bf->bf_state.bfs_nframes, 5412eb6f0de0SAdrian Chadd bf->bf_state.bfs_al); 5413eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 1; 5414eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++; 5415eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_aggr_pkt++; 5416eb6f0de0SAdrian Chadd 54174e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 54184e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 54194e81f27cSAdrian Chadd 5420eb6f0de0SAdrian Chadd /* 5421e2e4a2c2SAdrian Chadd * Calculate the duration/protection as required. 5422e2e4a2c2SAdrian Chadd */ 5423e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5424e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5425e2e4a2c2SAdrian Chadd 5426e2e4a2c2SAdrian Chadd /* 5427eb6f0de0SAdrian Chadd * Update the rate and rtscts information based on the 5428eb6f0de0SAdrian Chadd * rate decision made by the rate control code; 5429eb6f0de0SAdrian Chadd * the first frame in the aggregate needs it. 5430eb6f0de0SAdrian Chadd */ 5431eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5432eb6f0de0SAdrian Chadd 5433eb6f0de0SAdrian Chadd /* 5434eb6f0de0SAdrian Chadd * Setup the relevant descriptor fields 5435eb6f0de0SAdrian Chadd * for aggregation. The first descriptor 5436eb6f0de0SAdrian Chadd * already points to the rest in the chain. 5437eb6f0de0SAdrian Chadd */ 5438eb6f0de0SAdrian Chadd ath_tx_setds_11n(sc, bf); 5439eb6f0de0SAdrian Chadd 5440eb6f0de0SAdrian Chadd } 5441eb6f0de0SAdrian Chadd queuepkt: 5442eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 5443eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 5444eb6f0de0SAdrian Chadd 5445eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 544683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__); 5447eb6f0de0SAdrian Chadd 544822a3aee6SAdrian Chadd /* 544922a3aee6SAdrian Chadd * Update leak count and frame config if were leaking frames. 545022a3aee6SAdrian Chadd * 545122a3aee6SAdrian Chadd * XXX TODO: it should update all frames in an aggregate 545222a3aee6SAdrian Chadd * correctly! 545322a3aee6SAdrian Chadd */ 545422a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 545522a3aee6SAdrian Chadd 5456eb6f0de0SAdrian Chadd /* Punt to txq */ 5457eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5458eb6f0de0SAdrian Chadd 5459eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5460eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5461eb6f0de0SAdrian Chadd tid->hwq_depth++; 5462eb6f0de0SAdrian Chadd 5463eb6f0de0SAdrian Chadd /* 5464eb6f0de0SAdrian Chadd * Break out if ath_tx_form_aggr() indicated 5465eb6f0de0SAdrian Chadd * there can't be any further progress (eg BAW is full.) 5466eb6f0de0SAdrian Chadd * Checking for an empty txq is done above. 5467eb6f0de0SAdrian Chadd * 5468eb6f0de0SAdrian Chadd * XXX locking on txq here? 5469eb6f0de0SAdrian Chadd */ 547072910f03SAdrian Chadd /* XXX TXQ locking */ 547172910f03SAdrian Chadd if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr || 547222a3aee6SAdrian Chadd (status == ATH_AGGR_BAW_CLOSED || 547322a3aee6SAdrian Chadd status == ATH_AGGR_LEAK_CLOSED)) 5474eb6f0de0SAdrian Chadd break; 5475eb6f0de0SAdrian Chadd } 5476eb6f0de0SAdrian Chadd } 5477eb6f0de0SAdrian Chadd 5478eb6f0de0SAdrian Chadd /* 5479eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 548072910f03SAdrian Chadd * 548172910f03SAdrian Chadd * XXX TODO: this routine doesn't enforce the maximum TXQ depth. 548272910f03SAdrian Chadd * It just dumps frames into the TXQ. We should limit how deep 548372910f03SAdrian Chadd * the transmit queue can grow for frames dispatched to the given 548472910f03SAdrian Chadd * TXQ. 548572910f03SAdrian Chadd * 548672910f03SAdrian Chadd * To avoid locking issues, either we need to own the TXQ lock 548772910f03SAdrian Chadd * at this point, or we need to pass in the maximum frame count 548872910f03SAdrian Chadd * from the caller. 5489eb6f0de0SAdrian Chadd */ 5490eb6f0de0SAdrian Chadd void 5491eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an, 5492eb6f0de0SAdrian Chadd struct ath_tid *tid) 5493eb6f0de0SAdrian Chadd { 5494eb6f0de0SAdrian Chadd struct ath_buf *bf; 5495eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5496eb6f0de0SAdrian Chadd 5497eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n", 5498eb6f0de0SAdrian Chadd __func__, an, tid->tid); 5499eb6f0de0SAdrian Chadd 5500375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5501eb6f0de0SAdrian Chadd 5502eb6f0de0SAdrian Chadd /* Check - is AMPDU pending or running? then print out something */ 5503eb6f0de0SAdrian Chadd if (ath_tx_ampdu_pending(sc, an, tid->tid)) 550483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n", 5505eb6f0de0SAdrian Chadd __func__, tid->tid); 5506eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid)) 550783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n", 5508eb6f0de0SAdrian Chadd __func__, tid->tid); 5509eb6f0de0SAdrian Chadd 5510eb6f0de0SAdrian Chadd for (;;) { 5511eb6f0de0SAdrian Chadd 5512eb6f0de0SAdrian Chadd /* 5513eb6f0de0SAdrian Chadd * If the upper layers have paused the TID, don't 5514eb6f0de0SAdrian Chadd * queue any further packets. 551522a3aee6SAdrian Chadd * 551622a3aee6SAdrian Chadd * XXX if we are leaking frames, make sure we decrement 551722a3aee6SAdrian Chadd * that counter _and_ we continue here. 5518eb6f0de0SAdrian Chadd */ 551922a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5520eb6f0de0SAdrian Chadd break; 5521eb6f0de0SAdrian Chadd 55223e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5523eb6f0de0SAdrian Chadd if (bf == NULL) { 5524eb6f0de0SAdrian Chadd break; 5525eb6f0de0SAdrian Chadd } 5526eb6f0de0SAdrian Chadd 55273e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 5528eb6f0de0SAdrian Chadd 5529eb6f0de0SAdrian Chadd /* Sanity check! */ 5530eb6f0de0SAdrian Chadd if (tid->tid != bf->bf_state.bfs_tid) { 553183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !=" 553283bbd5ebSRui Paulo " tid %d\n", __func__, bf->bf_state.bfs_tid, 553383bbd5ebSRui Paulo tid->tid); 5534eb6f0de0SAdrian Chadd } 5535eb6f0de0SAdrian Chadd /* Normal completion handler */ 5536eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 5537eb6f0de0SAdrian Chadd 55380c54de88SAdrian Chadd /* 55390c54de88SAdrian Chadd * Override this for now, until the non-aggregate 55400c54de88SAdrian Chadd * completion handler correctly handles software retransmits. 55410c54de88SAdrian Chadd */ 55420c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 55430c54de88SAdrian Chadd 55444e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 55454e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 55464e81f27cSAdrian Chadd 5547eb6f0de0SAdrian Chadd /* Program descriptors + rate control */ 5548eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5549e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5550e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5551eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5552e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5553eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5554eb6f0de0SAdrian Chadd 555522a3aee6SAdrian Chadd /* 555622a3aee6SAdrian Chadd * Update the current leak count if 555722a3aee6SAdrian Chadd * we're leaking frames; and set the 555822a3aee6SAdrian Chadd * MORE flag as appropriate. 555922a3aee6SAdrian Chadd */ 556022a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 556122a3aee6SAdrian Chadd 5562eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5563eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5564eb6f0de0SAdrian Chadd tid->hwq_depth++; 5565eb6f0de0SAdrian Chadd 5566eb6f0de0SAdrian Chadd /* Punt to hardware or software txq */ 5567eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5568eb6f0de0SAdrian Chadd } 5569eb6f0de0SAdrian Chadd } 5570eb6f0de0SAdrian Chadd 5571eb6f0de0SAdrian Chadd /* 5572eb6f0de0SAdrian Chadd * Schedule some packets to the given hardware queue. 5573eb6f0de0SAdrian Chadd * 5574eb6f0de0SAdrian Chadd * This function walks the list of TIDs (ie, ath_node TIDs 5575eb6f0de0SAdrian Chadd * with queued traffic) and attempts to schedule traffic 5576eb6f0de0SAdrian Chadd * from them. 5577eb6f0de0SAdrian Chadd * 5578eb6f0de0SAdrian Chadd * TID scheduling is implemented as a FIFO, with TIDs being 5579eb6f0de0SAdrian Chadd * added to the end of the queue after some frames have been 5580eb6f0de0SAdrian Chadd * scheduled. 5581eb6f0de0SAdrian Chadd */ 5582eb6f0de0SAdrian Chadd void 5583eb6f0de0SAdrian Chadd ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq) 5584eb6f0de0SAdrian Chadd { 5585eb6f0de0SAdrian Chadd struct ath_tid *tid, *next, *last; 5586eb6f0de0SAdrian Chadd 5587375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5588eb6f0de0SAdrian Chadd 5589eb6f0de0SAdrian Chadd /* 5590eb6f0de0SAdrian Chadd * Don't schedule if the hardware queue is busy. 5591eb6f0de0SAdrian Chadd * This (hopefully) gives some more time to aggregate 5592eb6f0de0SAdrian Chadd * some packets in the aggregation queue. 559372910f03SAdrian Chadd * 559472910f03SAdrian Chadd * XXX It doesn't stop a parallel sender from sneaking 559572910f03SAdrian Chadd * in transmitting a frame! 5596eb6f0de0SAdrian Chadd */ 559772910f03SAdrian Chadd /* XXX TXQ locking */ 559872910f03SAdrian Chadd if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 559972910f03SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++; 560072910f03SAdrian Chadd return; 560172910f03SAdrian Chadd } 560272910f03SAdrian Chadd if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5603eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++; 5604eb6f0de0SAdrian Chadd return; 5605eb6f0de0SAdrian Chadd } 5606eb6f0de0SAdrian Chadd 5607eb6f0de0SAdrian Chadd last = TAILQ_LAST(&txq->axq_tidq, axq_t_s); 5608eb6f0de0SAdrian Chadd 5609eb6f0de0SAdrian Chadd TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) { 5610eb6f0de0SAdrian Chadd /* 5611eb6f0de0SAdrian Chadd * Suspend paused queues here; they'll be resumed 5612eb6f0de0SAdrian Chadd * once the addba completes or times out. 5613eb6f0de0SAdrian Chadd */ 5614eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n", 5615eb6f0de0SAdrian Chadd __func__, tid->tid, tid->paused); 5616eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 561722a3aee6SAdrian Chadd /* 561822a3aee6SAdrian Chadd * This node may be in power-save and we're leaking 561922a3aee6SAdrian Chadd * a frame; be careful. 562022a3aee6SAdrian Chadd */ 562122a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 56228ec9220eSAdrian Chadd goto loop_done; 5623eb6f0de0SAdrian Chadd } 5624eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, tid->an, tid->tid)) 5625eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(sc, tid->an, tid); 5626eb6f0de0SAdrian Chadd else 5627eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(sc, tid->an, tid); 5628eb6f0de0SAdrian Chadd 5629eb6f0de0SAdrian Chadd /* Not empty? Re-schedule */ 5630eb6f0de0SAdrian Chadd if (tid->axq_depth != 0) 5631eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 5632eb6f0de0SAdrian Chadd 5633b45a991eSAdrian Chadd /* 5634b45a991eSAdrian Chadd * Give the software queue time to aggregate more 5635b45a991eSAdrian Chadd * packets. If we aren't running aggregation then 5636b45a991eSAdrian Chadd * we should still limit the hardware queue depth. 5637b45a991eSAdrian Chadd */ 563872910f03SAdrian Chadd /* XXX TXQ locking */ 563972910f03SAdrian Chadd if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 564072910f03SAdrian Chadd break; 564172910f03SAdrian Chadd } 564272910f03SAdrian Chadd if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5643eb6f0de0SAdrian Chadd break; 5644eb6f0de0SAdrian Chadd } 56458ec9220eSAdrian Chadd loop_done: 5646eb6f0de0SAdrian Chadd /* 5647eb6f0de0SAdrian Chadd * If this was the last entry on the original list, stop. 5648eb6f0de0SAdrian Chadd * Otherwise nodes that have been rescheduled onto the end 5649eb6f0de0SAdrian Chadd * of the TID FIFO list will just keep being rescheduled. 565022a3aee6SAdrian Chadd * 565122a3aee6SAdrian Chadd * XXX What should we do about nodes that were paused 565222a3aee6SAdrian Chadd * but are pending a leaking frame in response to a ps-poll? 565322a3aee6SAdrian Chadd * They'll be put at the front of the list; so they'll 565422a3aee6SAdrian Chadd * prematurely trigger this condition! Ew. 5655eb6f0de0SAdrian Chadd */ 5656eb6f0de0SAdrian Chadd if (tid == last) 5657eb6f0de0SAdrian Chadd break; 5658eb6f0de0SAdrian Chadd } 5659eb6f0de0SAdrian Chadd } 5660eb6f0de0SAdrian Chadd 5661eb6f0de0SAdrian Chadd /* 5662eb6f0de0SAdrian Chadd * TX addba handling 5663eb6f0de0SAdrian Chadd */ 5664eb6f0de0SAdrian Chadd 5665eb6f0de0SAdrian Chadd /* 5666eb6f0de0SAdrian Chadd * Return net80211 TID struct pointer, or NULL for none 5667eb6f0de0SAdrian Chadd */ 5668eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu * 5669eb6f0de0SAdrian Chadd ath_tx_get_tx_tid(struct ath_node *an, int tid) 5670eb6f0de0SAdrian Chadd { 5671eb6f0de0SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 5672eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5673eb6f0de0SAdrian Chadd 5674eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5675eb6f0de0SAdrian Chadd return NULL; 5676eb6f0de0SAdrian Chadd 56772aa563dfSAdrian Chadd tap = &ni->ni_tx_ampdu[tid]; 5678eb6f0de0SAdrian Chadd return tap; 5679eb6f0de0SAdrian Chadd } 5680eb6f0de0SAdrian Chadd 5681eb6f0de0SAdrian Chadd /* 5682eb6f0de0SAdrian Chadd * Is AMPDU-TX running? 5683eb6f0de0SAdrian Chadd */ 5684eb6f0de0SAdrian Chadd static int 5685eb6f0de0SAdrian Chadd ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid) 5686eb6f0de0SAdrian Chadd { 5687eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5688eb6f0de0SAdrian Chadd 5689eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5690eb6f0de0SAdrian Chadd return 0; 5691eb6f0de0SAdrian Chadd 5692eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5693eb6f0de0SAdrian Chadd if (tap == NULL) 5694eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not running */ 5695eb6f0de0SAdrian Chadd 5696eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING); 5697eb6f0de0SAdrian Chadd } 5698eb6f0de0SAdrian Chadd 5699eb6f0de0SAdrian Chadd /* 5700eb6f0de0SAdrian Chadd * Is AMPDU-TX negotiation pending? 5701eb6f0de0SAdrian Chadd */ 5702eb6f0de0SAdrian Chadd static int 5703eb6f0de0SAdrian Chadd ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid) 5704eb6f0de0SAdrian Chadd { 5705eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5706eb6f0de0SAdrian Chadd 5707eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5708eb6f0de0SAdrian Chadd return 0; 5709eb6f0de0SAdrian Chadd 5710eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5711eb6f0de0SAdrian Chadd if (tap == NULL) 5712eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not pending */ 5713eb6f0de0SAdrian Chadd 5714eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND); 5715eb6f0de0SAdrian Chadd } 5716eb6f0de0SAdrian Chadd 5717eb6f0de0SAdrian Chadd /* 5718eb6f0de0SAdrian Chadd * Is AMPDU-TX pending for the given TID? 5719eb6f0de0SAdrian Chadd */ 5720eb6f0de0SAdrian Chadd 5721eb6f0de0SAdrian Chadd 5722eb6f0de0SAdrian Chadd /* 5723eb6f0de0SAdrian Chadd * Method to handle sending an ADDBA request. 5724eb6f0de0SAdrian Chadd * 5725eb6f0de0SAdrian Chadd * We tap this so the relevant flags can be set to pause the TID 5726eb6f0de0SAdrian Chadd * whilst waiting for the response. 5727eb6f0de0SAdrian Chadd * 5728eb6f0de0SAdrian Chadd * XXX there's no timeout handler we can override? 5729eb6f0de0SAdrian Chadd */ 5730eb6f0de0SAdrian Chadd int 5731eb6f0de0SAdrian Chadd ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5732eb6f0de0SAdrian Chadd int dialogtoken, int baparamset, int batimeout) 5733eb6f0de0SAdrian Chadd { 5734eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 57352aa563dfSAdrian Chadd int tid = tap->txa_tid; 5736eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5737eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5738eb6f0de0SAdrian Chadd 5739eb6f0de0SAdrian Chadd /* 5740eb6f0de0SAdrian Chadd * XXX danger Will Robinson! 5741eb6f0de0SAdrian Chadd * 5742eb6f0de0SAdrian Chadd * Although the taskqueue may be running and scheduling some more 5743eb6f0de0SAdrian Chadd * packets, these should all be _before_ the addba sequence number. 5744eb6f0de0SAdrian Chadd * However, net80211 will keep self-assigning sequence numbers 5745eb6f0de0SAdrian Chadd * until addba has been negotiated. 5746eb6f0de0SAdrian Chadd * 5747eb6f0de0SAdrian Chadd * In the past, these packets would be "paused" (which still works 5748eb6f0de0SAdrian Chadd * fine, as they're being scheduled to the driver in the same 5749eb6f0de0SAdrian Chadd * serialised method which is calling the addba request routine) 5750eb6f0de0SAdrian Chadd * and when the aggregation session begins, they'll be dequeued 5751eb6f0de0SAdrian Chadd * as aggregate packets and added to the BAW. However, now there's 5752eb6f0de0SAdrian Chadd * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these 5753eb6f0de0SAdrian Chadd * packets. Thus they never get included in the BAW tracking and 5754eb6f0de0SAdrian Chadd * this can cause the initial burst of packets after the addba 5755eb6f0de0SAdrian Chadd * negotiation to "hang", as they quickly fall outside the BAW. 5756eb6f0de0SAdrian Chadd * 5757eb6f0de0SAdrian Chadd * The "eventual" solution should be to tag these packets with 5758eb6f0de0SAdrian Chadd * dobaw. Although net80211 has given us a sequence number, 5759eb6f0de0SAdrian Chadd * it'll be "after" the left edge of the BAW and thus it'll 5760eb6f0de0SAdrian Chadd * fall within it. 5761eb6f0de0SAdrian Chadd */ 5762375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5763d3a6425bSAdrian Chadd /* 5764d3a6425bSAdrian Chadd * This is a bit annoying. Until net80211 HT code inherits some 5765d3a6425bSAdrian Chadd * (any) locking, we may have this called in parallel BUT only 5766d3a6425bSAdrian Chadd * one response/timeout will be called. Grr. 5767d3a6425bSAdrian Chadd */ 5768d3a6425bSAdrian Chadd if (atid->addba_tx_pending == 0) { 5769eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 5770d3a6425bSAdrian Chadd atid->addba_tx_pending = 1; 5771d3a6425bSAdrian Chadd } 5772375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5773eb6f0de0SAdrian Chadd 5774eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 57759b48fb4bSAdrian Chadd "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n", 57769b48fb4bSAdrian Chadd __func__, 57779b48fb4bSAdrian Chadd ni->ni_macaddr, 57789b48fb4bSAdrian Chadd ":", 57799b48fb4bSAdrian Chadd dialogtoken, baparamset, batimeout); 5780eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5781eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5782eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5783eb6f0de0SAdrian Chadd 5784eb6f0de0SAdrian Chadd return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, 5785eb6f0de0SAdrian Chadd batimeout); 5786eb6f0de0SAdrian Chadd } 5787eb6f0de0SAdrian Chadd 5788eb6f0de0SAdrian Chadd /* 5789eb6f0de0SAdrian Chadd * Handle an ADDBA response. 5790eb6f0de0SAdrian Chadd * 5791eb6f0de0SAdrian Chadd * We unpause the queue so TX'ing can resume. 5792eb6f0de0SAdrian Chadd * 5793eb6f0de0SAdrian Chadd * Any packets TX'ed from this point should be "aggregate" (whether 5794eb6f0de0SAdrian Chadd * aggregate or not) so the BAW is updated. 5795eb6f0de0SAdrian Chadd * 5796eb6f0de0SAdrian Chadd * Note! net80211 keeps self-assigning sequence numbers until 5797eb6f0de0SAdrian Chadd * ampdu is negotiated. This means the initially-negotiated BAW left 5798eb6f0de0SAdrian Chadd * edge won't match the ni->ni_txseq. 5799eb6f0de0SAdrian Chadd * 5800eb6f0de0SAdrian Chadd * So, being very dirty, the BAW left edge is "slid" here to match 5801eb6f0de0SAdrian Chadd * ni->ni_txseq. 5802eb6f0de0SAdrian Chadd * 5803eb6f0de0SAdrian Chadd * What likely SHOULD happen is that all packets subsequent to the 5804eb6f0de0SAdrian Chadd * addba request should be tagged as aggregate and queued as non-aggregate 5805eb6f0de0SAdrian Chadd * frames; thus updating the BAW. For now though, I'll just slide the 5806eb6f0de0SAdrian Chadd * window. 5807eb6f0de0SAdrian Chadd */ 5808eb6f0de0SAdrian Chadd int 5809eb6f0de0SAdrian Chadd ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5810eb6f0de0SAdrian Chadd int status, int code, int batimeout) 5811eb6f0de0SAdrian Chadd { 5812eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 58132aa563dfSAdrian Chadd int tid = tap->txa_tid; 5814eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5815eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5816eb6f0de0SAdrian Chadd int r; 5817eb6f0de0SAdrian Chadd 5818eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 58199b48fb4bSAdrian Chadd "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__, 58209b48fb4bSAdrian Chadd ni->ni_macaddr, 58219b48fb4bSAdrian Chadd ":", 5822eb6f0de0SAdrian Chadd status, code, batimeout); 5823eb6f0de0SAdrian Chadd 5824eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5825eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5826eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5827eb6f0de0SAdrian Chadd 5828eb6f0de0SAdrian Chadd /* 5829eb6f0de0SAdrian Chadd * Call this first, so the interface flags get updated 5830eb6f0de0SAdrian Chadd * before the TID is unpaused. Otherwise a race condition 5831eb6f0de0SAdrian Chadd * exists where the unpaused TID still doesn't yet have 5832eb6f0de0SAdrian Chadd * IEEE80211_AGGR_RUNNING set. 5833eb6f0de0SAdrian Chadd */ 5834eb6f0de0SAdrian Chadd r = sc->sc_addba_response(ni, tap, status, code, batimeout); 5835eb6f0de0SAdrian Chadd 5836375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5837d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 5838eb6f0de0SAdrian Chadd /* 5839eb6f0de0SAdrian Chadd * XXX dirty! 5840eb6f0de0SAdrian Chadd * Slide the BAW left edge to wherever net80211 left it for us. 5841eb6f0de0SAdrian Chadd * Read above for more information. 5842eb6f0de0SAdrian Chadd */ 5843eb6f0de0SAdrian Chadd tap->txa_start = ni->ni_txseqs[tid]; 5844eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 5845375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5846eb6f0de0SAdrian Chadd return r; 5847eb6f0de0SAdrian Chadd } 5848eb6f0de0SAdrian Chadd 5849eb6f0de0SAdrian Chadd 5850eb6f0de0SAdrian Chadd /* 5851eb6f0de0SAdrian Chadd * Stop ADDBA on a queue. 58528405fe86SAdrian Chadd * 58538405fe86SAdrian Chadd * This can be called whilst BAR TX is currently active on the queue, 58548405fe86SAdrian Chadd * so make sure this is unblocked before continuing. 5855eb6f0de0SAdrian Chadd */ 5856eb6f0de0SAdrian Chadd void 5857eb6f0de0SAdrian Chadd ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 5858eb6f0de0SAdrian Chadd { 5859eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 58602aa563dfSAdrian Chadd int tid = tap->txa_tid; 5861eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5862eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 586322780332SAdrian Chadd ath_bufhead bf_cq; 586422780332SAdrian Chadd struct ath_buf *bf; 5865eb6f0de0SAdrian Chadd 58669b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n", 58679b48fb4bSAdrian Chadd __func__, 58689b48fb4bSAdrian Chadd ni->ni_macaddr, 58699b48fb4bSAdrian Chadd ":"); 5870eb6f0de0SAdrian Chadd 58718405fe86SAdrian Chadd /* 58728405fe86SAdrian Chadd * Pause TID traffic early, so there aren't any races 58738405fe86SAdrian Chadd * Unblock the pending BAR held traffic, if it's currently paused. 58748405fe86SAdrian Chadd */ 5875375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5876eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 58778405fe86SAdrian Chadd if (atid->bar_wait) { 58788405fe86SAdrian Chadd /* 58798405fe86SAdrian Chadd * bar_unsuspend() expects bar_tx == 1, as it should be 58808405fe86SAdrian Chadd * called from the TX completion path. This quietens 58818405fe86SAdrian Chadd * the warning. It's cleared for us anyway. 58828405fe86SAdrian Chadd */ 58838405fe86SAdrian Chadd atid->bar_tx = 1; 58848405fe86SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 58858405fe86SAdrian Chadd } 5886375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5887eb6f0de0SAdrian Chadd 5888eb6f0de0SAdrian Chadd /* There's no need to hold the TXQ lock here */ 5889eb6f0de0SAdrian Chadd sc->sc_addba_stop(ni, tap); 5890eb6f0de0SAdrian Chadd 5891eb6f0de0SAdrian Chadd /* 58924dfd4507SAdrian Chadd * ath_tx_tid_cleanup will resume the TID if possible, otherwise 5893eb6f0de0SAdrian Chadd * it'll set the cleanup flag, and it'll be unpaused once 5894eb6f0de0SAdrian Chadd * things have been cleaned up. 5895eb6f0de0SAdrian Chadd */ 589622780332SAdrian Chadd TAILQ_INIT(&bf_cq); 589722780332SAdrian Chadd ATH_TX_LOCK(sc); 589859fbb530SAdrian Chadd 589959fbb530SAdrian Chadd /* 590059fbb530SAdrian Chadd * In case there's a followup call to this, only call it 590159fbb530SAdrian Chadd * if we don't have a cleanup in progress. 590259fbb530SAdrian Chadd * 590359fbb530SAdrian Chadd * Since we've paused the queue above, we need to make 590459fbb530SAdrian Chadd * sure we unpause if there's already a cleanup in 590559fbb530SAdrian Chadd * progress - it means something else is also doing 590659fbb530SAdrian Chadd * this stuff, so we don't need to also keep it paused. 590759fbb530SAdrian Chadd */ 590859fbb530SAdrian Chadd if (atid->cleanup_inprogress) { 590959fbb530SAdrian Chadd ath_tx_tid_resume(sc, atid); 591059fbb530SAdrian Chadd } else { 591122780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, tid, &bf_cq); 59125da3fc10SAdrian Chadd /* 59135da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required. 59145da3fc10SAdrian Chadd */ 59155da3fc10SAdrian Chadd if (! atid->cleanup_inprogress) 59165da3fc10SAdrian Chadd ath_tx_tid_resume(sc, atid); 591759fbb530SAdrian Chadd } 591822780332SAdrian Chadd ATH_TX_UNLOCK(sc); 591922780332SAdrian Chadd 592022780332SAdrian Chadd /* Handle completing frames and fail them */ 592122780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 592222780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 592322780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 592422780332SAdrian Chadd } 592522a3aee6SAdrian Chadd 592622780332SAdrian Chadd } 592722780332SAdrian Chadd 592822780332SAdrian Chadd /* 592922780332SAdrian Chadd * Handle a node reassociation. 593022780332SAdrian Chadd * 593122780332SAdrian Chadd * We may have a bunch of frames queued to the hardware; those need 593222780332SAdrian Chadd * to be marked as cleanup. 593322780332SAdrian Chadd */ 593422780332SAdrian Chadd void 593522780332SAdrian Chadd ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an) 593622780332SAdrian Chadd { 593722780332SAdrian Chadd struct ath_tid *tid; 593822780332SAdrian Chadd int i; 593922780332SAdrian Chadd ath_bufhead bf_cq; 594022780332SAdrian Chadd struct ath_buf *bf; 594122780332SAdrian Chadd 594222780332SAdrian Chadd TAILQ_INIT(&bf_cq); 594322780332SAdrian Chadd 594422780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 594522780332SAdrian Chadd 594622780332SAdrian Chadd ATH_TX_LOCK(sc); 594722780332SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 594822780332SAdrian Chadd tid = &an->an_tid[i]; 594922780332SAdrian Chadd if (tid->hwq_depth == 0) 595022780332SAdrian Chadd continue; 595122780332SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 595222780332SAdrian Chadd "%s: %6D: TID %d: cleaning up TID\n", 595322780332SAdrian Chadd __func__, 595422780332SAdrian Chadd an->an_node.ni_macaddr, 595522780332SAdrian Chadd ":", 595622780332SAdrian Chadd i); 595759fbb530SAdrian Chadd /* 595859fbb530SAdrian Chadd * In case there's a followup call to this, only call it 595959fbb530SAdrian Chadd * if we don't have a cleanup in progress. 596059fbb530SAdrian Chadd */ 596159fbb530SAdrian Chadd if (! tid->cleanup_inprogress) { 596259fbb530SAdrian Chadd ath_tx_tid_pause(sc, tid); 596322780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, i, &bf_cq); 59645da3fc10SAdrian Chadd /* 59655da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required. 59665da3fc10SAdrian Chadd */ 59675da3fc10SAdrian Chadd if (! tid->cleanup_inprogress) 59685da3fc10SAdrian Chadd ath_tx_tid_resume(sc, tid); 596922780332SAdrian Chadd } 597059fbb530SAdrian Chadd } 597122780332SAdrian Chadd ATH_TX_UNLOCK(sc); 597222780332SAdrian Chadd 597322780332SAdrian Chadd /* Handle completing frames and fail them */ 597422780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 597522780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 597622780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 597722780332SAdrian Chadd } 5978eb6f0de0SAdrian Chadd } 5979eb6f0de0SAdrian Chadd 5980eb6f0de0SAdrian Chadd /* 5981eb6f0de0SAdrian Chadd * Note: net80211 bar_timeout() doesn't call this function on BAR failure; 5982eb6f0de0SAdrian Chadd * it simply tears down the aggregation session. Ew. 5983eb6f0de0SAdrian Chadd * 5984eb6f0de0SAdrian Chadd * It however will call ieee80211_ampdu_stop() which will call 5985eb6f0de0SAdrian Chadd * ic->ic_addba_stop(). 5986eb6f0de0SAdrian Chadd * 5987eb6f0de0SAdrian Chadd * XXX This uses a hard-coded max BAR count value; the whole 5988eb6f0de0SAdrian Chadd * XXX BAR TX success or failure should be better handled! 5989eb6f0de0SAdrian Chadd */ 5990eb6f0de0SAdrian Chadd void 5991eb6f0de0SAdrian Chadd ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5992eb6f0de0SAdrian Chadd int status) 5993eb6f0de0SAdrian Chadd { 5994eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 59952aa563dfSAdrian Chadd int tid = tap->txa_tid; 5996eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5997eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5998eb6f0de0SAdrian Chadd int attempts = tap->txa_attempts; 599942fdd8e7SAdrian Chadd int old_txa_start; 6000eb6f0de0SAdrian Chadd 60010e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 600242fdd8e7SAdrian Chadd "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n", 60030e22ed0eSAdrian Chadd __func__, 60049b48fb4bSAdrian Chadd ni->ni_macaddr, 60059b48fb4bSAdrian Chadd ":", 6006e60c4fc2SAdrian Chadd tap->txa_tid, 6007e60c4fc2SAdrian Chadd atid->tid, 60080e22ed0eSAdrian Chadd status, 600942fdd8e7SAdrian Chadd attempts, 601042fdd8e7SAdrian Chadd tap->txa_start, 601142fdd8e7SAdrian Chadd tap->txa_seqpending); 6012eb6f0de0SAdrian Chadd 6013eb6f0de0SAdrian Chadd /* Note: This may update the BAW details */ 601442fdd8e7SAdrian Chadd /* 601542fdd8e7SAdrian Chadd * XXX What if this does slide the BAW along? We need to somehow 601642fdd8e7SAdrian Chadd * XXX either fix things when it does happen, or prevent the 601742fdd8e7SAdrian Chadd * XXX seqpending value to be anything other than exactly what 601842fdd8e7SAdrian Chadd * XXX the hell we want! 601942fdd8e7SAdrian Chadd * 602042fdd8e7SAdrian Chadd * XXX So for now, how I do this inside the TX lock for now 602142fdd8e7SAdrian Chadd * XXX and just correct it afterwards? The below condition should 602242fdd8e7SAdrian Chadd * XXX never happen and if it does I need to fix all kinds of things. 602342fdd8e7SAdrian Chadd */ 602442fdd8e7SAdrian Chadd ATH_TX_LOCK(sc); 602542fdd8e7SAdrian Chadd old_txa_start = tap->txa_start; 6026eb6f0de0SAdrian Chadd sc->sc_bar_response(ni, tap, status); 602742fdd8e7SAdrian Chadd if (tap->txa_start != old_txa_start) { 602842fdd8e7SAdrian Chadd device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n", 602942fdd8e7SAdrian Chadd __func__, 603042fdd8e7SAdrian Chadd tid, 603142fdd8e7SAdrian Chadd tap->txa_start, 603242fdd8e7SAdrian Chadd old_txa_start); 603342fdd8e7SAdrian Chadd } 603442fdd8e7SAdrian Chadd tap->txa_start = old_txa_start; 603542fdd8e7SAdrian Chadd ATH_TX_UNLOCK(sc); 6036eb6f0de0SAdrian Chadd 6037eb6f0de0SAdrian Chadd /* Unpause the TID */ 6038eb6f0de0SAdrian Chadd /* 6039eb6f0de0SAdrian Chadd * XXX if this is attempt=50, the TID will be downgraded 6040eb6f0de0SAdrian Chadd * XXX to a non-aggregate session. So we must unpause the 6041eb6f0de0SAdrian Chadd * XXX TID here or it'll never be done. 6042088d8b81SAdrian Chadd * 6043088d8b81SAdrian Chadd * Also, don't call it if bar_tx/bar_wait are 0; something 6044088d8b81SAdrian Chadd * has beaten us to the punch? (XXX figure out what?) 6045eb6f0de0SAdrian Chadd */ 6046eb6f0de0SAdrian Chadd if (status == 0 || attempts == 50) { 6047375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6048088d8b81SAdrian Chadd if (atid->bar_tx == 0 || atid->bar_wait == 0) 604983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6050088d8b81SAdrian Chadd "%s: huh? bar_tx=%d, bar_wait=%d\n", 6051088d8b81SAdrian Chadd __func__, 6052088d8b81SAdrian Chadd atid->bar_tx, atid->bar_wait); 6053088d8b81SAdrian Chadd else 605488b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 6055375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6056eb6f0de0SAdrian Chadd } 6057eb6f0de0SAdrian Chadd } 6058eb6f0de0SAdrian Chadd 6059eb6f0de0SAdrian Chadd /* 6060eb6f0de0SAdrian Chadd * This is called whenever the pending ADDBA request times out. 6061eb6f0de0SAdrian Chadd * Unpause and reschedule the TID. 6062eb6f0de0SAdrian Chadd */ 6063eb6f0de0SAdrian Chadd void 6064eb6f0de0SAdrian Chadd ath_addba_response_timeout(struct ieee80211_node *ni, 6065eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap) 6066eb6f0de0SAdrian Chadd { 6067eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 60682aa563dfSAdrian Chadd int tid = tap->txa_tid; 6069eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 6070eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 6071eb6f0de0SAdrian Chadd 6072eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 60736d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called; resuming\n", 60749b48fb4bSAdrian Chadd __func__, 60759b48fb4bSAdrian Chadd ni->ni_macaddr, 60766d07d3e0SAdrian Chadd ":", 60776d07d3e0SAdrian Chadd tid); 6078eb6f0de0SAdrian Chadd 6079375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6080d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 6081375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6082d3a6425bSAdrian Chadd 6083eb6f0de0SAdrian Chadd /* Note: This updates the aggregate state to (again) pending */ 6084eb6f0de0SAdrian Chadd sc->sc_addba_response_timeout(ni, tap); 6085eb6f0de0SAdrian Chadd 6086eb6f0de0SAdrian Chadd /* Unpause the TID; which reschedules it */ 6087375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6088eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 6089375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6090eb6f0de0SAdrian Chadd } 60913fdfc330SAdrian Chadd 60920eb81626SAdrian Chadd /* 60930eb81626SAdrian Chadd * Check if a node is asleep or not. 60940eb81626SAdrian Chadd */ 6095548a605dSAdrian Chadd int 60960eb81626SAdrian Chadd ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an) 60970eb81626SAdrian Chadd { 60980eb81626SAdrian Chadd 609922780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 61000eb81626SAdrian Chadd 61010eb81626SAdrian Chadd return (an->an_is_powersave); 61020eb81626SAdrian Chadd } 61030eb81626SAdrian Chadd 61040eb81626SAdrian Chadd /* 61050eb81626SAdrian Chadd * Mark a node as currently "in powersaving." 61060eb81626SAdrian Chadd * This suspends all traffic on the node. 61070eb81626SAdrian Chadd * 61080eb81626SAdrian Chadd * This must be called with the node/tx locks free. 61090eb81626SAdrian Chadd * 61100eb81626SAdrian Chadd * XXX TODO: the locking silliness below is due to how the node 61110eb81626SAdrian Chadd * locking currently works. Right now, the node lock is grabbed 61120eb81626SAdrian Chadd * to do rate control lookups and these are done with the TX 61130eb81626SAdrian Chadd * queue lock held. This means the node lock can't be grabbed 61140eb81626SAdrian Chadd * first here or a LOR will occur. 61150eb81626SAdrian Chadd * 61160eb81626SAdrian Chadd * Eventually (hopefully!) the TX path code will only grab 61170eb81626SAdrian Chadd * the TXQ lock when transmitting and the ath_node lock when 61180eb81626SAdrian Chadd * doing node/TID operations. There are other complications - 61190eb81626SAdrian Chadd * the sched/unsched operations involve walking the per-txq 61200eb81626SAdrian Chadd * 'active tid' list and this requires both locks to be held. 61210eb81626SAdrian Chadd */ 61220eb81626SAdrian Chadd void 61230eb81626SAdrian Chadd ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an) 61240eb81626SAdrian Chadd { 61250eb81626SAdrian Chadd struct ath_tid *atid; 61260eb81626SAdrian Chadd struct ath_txq *txq; 61270eb81626SAdrian Chadd int tid; 61280eb81626SAdrian Chadd 612922780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 61300eb81626SAdrian Chadd 61310eb81626SAdrian Chadd /* Suspend all traffic on the node */ 6132375307d4SAdrian Chadd ATH_TX_LOCK(sc); 613322a3aee6SAdrian Chadd 613422a3aee6SAdrian Chadd if (an->an_is_powersave) { 613583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 613622a3aee6SAdrian Chadd "%s: %6D: node was already asleep!\n", 613783bbd5ebSRui Paulo __func__, an->an_node.ni_macaddr, ":"); 613822a3aee6SAdrian Chadd ATH_TX_UNLOCK(sc); 613922a3aee6SAdrian Chadd return; 614022a3aee6SAdrian Chadd } 614122a3aee6SAdrian Chadd 61420eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 61430eb81626SAdrian Chadd atid = &an->an_tid[tid]; 61440eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 61450eb81626SAdrian Chadd 61460eb81626SAdrian Chadd ath_tx_tid_pause(sc, atid); 61470eb81626SAdrian Chadd } 61480eb81626SAdrian Chadd 61490eb81626SAdrian Chadd /* Mark node as in powersaving */ 61500eb81626SAdrian Chadd an->an_is_powersave = 1; 61510eb81626SAdrian Chadd 615222780332SAdrian Chadd ATH_TX_UNLOCK(sc); 61530eb81626SAdrian Chadd } 61540eb81626SAdrian Chadd 61550eb81626SAdrian Chadd /* 61560eb81626SAdrian Chadd * Mark a node as currently "awake." 61570eb81626SAdrian Chadd * This resumes all traffic to the node. 61580eb81626SAdrian Chadd */ 61590eb81626SAdrian Chadd void 61600eb81626SAdrian Chadd ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an) 61610eb81626SAdrian Chadd { 61620eb81626SAdrian Chadd struct ath_tid *atid; 61630eb81626SAdrian Chadd struct ath_txq *txq; 61640eb81626SAdrian Chadd int tid; 61650eb81626SAdrian Chadd 616622780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 616722780332SAdrian Chadd 616822780332SAdrian Chadd ATH_TX_LOCK(sc); 61690eb81626SAdrian Chadd 617022a3aee6SAdrian Chadd /* !? */ 61710eb81626SAdrian Chadd if (an->an_is_powersave == 0) { 617222780332SAdrian Chadd ATH_TX_UNLOCK(sc); 617383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 61740eb81626SAdrian Chadd "%s: an=%p: node was already awake\n", 61750eb81626SAdrian Chadd __func__, an); 61760eb81626SAdrian Chadd return; 61770eb81626SAdrian Chadd } 61780eb81626SAdrian Chadd 61790eb81626SAdrian Chadd /* Mark node as awake */ 61800eb81626SAdrian Chadd an->an_is_powersave = 0; 618122a3aee6SAdrian Chadd /* 618222a3aee6SAdrian Chadd * Clear any pending leaked frame requests 618322a3aee6SAdrian Chadd */ 618422a3aee6SAdrian Chadd an->an_leak_count = 0; 61850eb81626SAdrian Chadd 61860eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 61870eb81626SAdrian Chadd atid = &an->an_tid[tid]; 61880eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 61890eb81626SAdrian Chadd 61900eb81626SAdrian Chadd ath_tx_tid_resume(sc, atid); 61910eb81626SAdrian Chadd } 6192375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 61930eb81626SAdrian Chadd } 61940eb81626SAdrian Chadd 61953fdfc330SAdrian Chadd static int 61963fdfc330SAdrian Chadd ath_legacy_dma_txsetup(struct ath_softc *sc) 61973fdfc330SAdrian Chadd { 61983fdfc330SAdrian Chadd 61993fdfc330SAdrian Chadd /* nothing new needed */ 62003fdfc330SAdrian Chadd return (0); 62013fdfc330SAdrian Chadd } 62023fdfc330SAdrian Chadd 62033fdfc330SAdrian Chadd static int 62043fdfc330SAdrian Chadd ath_legacy_dma_txteardown(struct ath_softc *sc) 62053fdfc330SAdrian Chadd { 62063fdfc330SAdrian Chadd 62073fdfc330SAdrian Chadd /* nothing new needed */ 62083fdfc330SAdrian Chadd return (0); 62093fdfc330SAdrian Chadd } 62103fdfc330SAdrian Chadd 62113fdfc330SAdrian Chadd void 62123fdfc330SAdrian Chadd ath_xmit_setup_legacy(struct ath_softc *sc) 62133fdfc330SAdrian Chadd { 62141006fc0cSAdrian Chadd /* 62151006fc0cSAdrian Chadd * For now, just set the descriptor length to sizeof(ath_desc); 62161006fc0cSAdrian Chadd * worry about extracting the real length out of the HAL later. 62171006fc0cSAdrian Chadd */ 62181006fc0cSAdrian Chadd sc->sc_tx_desclen = sizeof(struct ath_desc); 6219bb327d28SAdrian Chadd sc->sc_tx_statuslen = sizeof(struct ath_desc); 62201006fc0cSAdrian Chadd sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */ 62213fdfc330SAdrian Chadd 62223fdfc330SAdrian Chadd sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup; 62233fdfc330SAdrian Chadd sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown; 6224f8418db5SAdrian Chadd sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func; 6225746bab5bSAdrian Chadd 6226746bab5bSAdrian Chadd sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart; 6227746bab5bSAdrian Chadd sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff; 6228788e6aa9SAdrian Chadd 6229788e6aa9SAdrian Chadd sc->sc_tx.xmit_drain = ath_legacy_tx_drain; 62303fdfc330SAdrian Chadd } 6231