xref: /freebsd/sys/dev/ath/if_ath_tx.c (revision c5940c30a7fcb5f49c1c556d5bce22fb7261d083)
1b8e788a5SAdrian Chadd /*-
2b8e788a5SAdrian Chadd  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3b8e788a5SAdrian Chadd  * All rights reserved.
4b8e788a5SAdrian Chadd  *
5b8e788a5SAdrian Chadd  * Redistribution and use in source and binary forms, with or without
6b8e788a5SAdrian Chadd  * modification, are permitted provided that the following conditions
7b8e788a5SAdrian Chadd  * are met:
8b8e788a5SAdrian Chadd  * 1. Redistributions of source code must retain the above copyright
9b8e788a5SAdrian Chadd  *    notice, this list of conditions and the following disclaimer,
10b8e788a5SAdrian Chadd  *    without modification.
11b8e788a5SAdrian Chadd  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12b8e788a5SAdrian Chadd  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13b8e788a5SAdrian Chadd  *    redistribution must be conditioned upon including a substantially
14b8e788a5SAdrian Chadd  *    similar Disclaimer requirement for further binary redistribution.
15b8e788a5SAdrian Chadd  *
16b8e788a5SAdrian Chadd  * NO WARRANTY
17b8e788a5SAdrian Chadd  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18b8e788a5SAdrian Chadd  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19b8e788a5SAdrian Chadd  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20b8e788a5SAdrian Chadd  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21b8e788a5SAdrian Chadd  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22b8e788a5SAdrian Chadd  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23b8e788a5SAdrian Chadd  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24b8e788a5SAdrian Chadd  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25b8e788a5SAdrian Chadd  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26b8e788a5SAdrian Chadd  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27b8e788a5SAdrian Chadd  * THE POSSIBILITY OF SUCH DAMAGES.
28b8e788a5SAdrian Chadd  */
29b8e788a5SAdrian Chadd 
30b8e788a5SAdrian Chadd #include <sys/cdefs.h>
31b8e788a5SAdrian Chadd __FBSDID("$FreeBSD$");
32b8e788a5SAdrian Chadd 
33b8e788a5SAdrian Chadd /*
34b8e788a5SAdrian Chadd  * Driver for the Atheros Wireless LAN controller.
35b8e788a5SAdrian Chadd  *
36b8e788a5SAdrian Chadd  * This software is derived from work of Atsushi Onoe; his contribution
37b8e788a5SAdrian Chadd  * is greatly appreciated.
38b8e788a5SAdrian Chadd  */
39b8e788a5SAdrian Chadd 
40b8e788a5SAdrian Chadd #include "opt_inet.h"
41b8e788a5SAdrian Chadd #include "opt_ath.h"
42b8e788a5SAdrian Chadd #include "opt_wlan.h"
43b8e788a5SAdrian Chadd 
44b8e788a5SAdrian Chadd #include <sys/param.h>
45b8e788a5SAdrian Chadd #include <sys/systm.h>
46b8e788a5SAdrian Chadd #include <sys/sysctl.h>
47b8e788a5SAdrian Chadd #include <sys/mbuf.h>
48b8e788a5SAdrian Chadd #include <sys/malloc.h>
49b8e788a5SAdrian Chadd #include <sys/lock.h>
50b8e788a5SAdrian Chadd #include <sys/mutex.h>
51b8e788a5SAdrian Chadd #include <sys/kernel.h>
52b8e788a5SAdrian Chadd #include <sys/socket.h>
53b8e788a5SAdrian Chadd #include <sys/sockio.h>
54b8e788a5SAdrian Chadd #include <sys/errno.h>
55b8e788a5SAdrian Chadd #include <sys/callout.h>
56b8e788a5SAdrian Chadd #include <sys/bus.h>
57b8e788a5SAdrian Chadd #include <sys/endian.h>
58b8e788a5SAdrian Chadd #include <sys/kthread.h>
59b8e788a5SAdrian Chadd #include <sys/taskqueue.h>
60b8e788a5SAdrian Chadd #include <sys/priv.h>
61b8e788a5SAdrian Chadd 
62b8e788a5SAdrian Chadd #include <machine/bus.h>
63b8e788a5SAdrian Chadd 
64b8e788a5SAdrian Chadd #include <net/if.h>
65b8e788a5SAdrian Chadd #include <net/if_dl.h>
66b8e788a5SAdrian Chadd #include <net/if_media.h>
67b8e788a5SAdrian Chadd #include <net/if_types.h>
68b8e788a5SAdrian Chadd #include <net/if_arp.h>
69b8e788a5SAdrian Chadd #include <net/ethernet.h>
70b8e788a5SAdrian Chadd #include <net/if_llc.h>
71b8e788a5SAdrian Chadd 
72b8e788a5SAdrian Chadd #include <net80211/ieee80211_var.h>
73b8e788a5SAdrian Chadd #include <net80211/ieee80211_regdomain.h>
74b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_SUPERG
75b8e788a5SAdrian Chadd #include <net80211/ieee80211_superg.h>
76b8e788a5SAdrian Chadd #endif
77b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
78b8e788a5SAdrian Chadd #include <net80211/ieee80211_tdma.h>
79b8e788a5SAdrian Chadd #endif
80eb6f0de0SAdrian Chadd #include <net80211/ieee80211_ht.h>
81b8e788a5SAdrian Chadd 
82b8e788a5SAdrian Chadd #include <net/bpf.h>
83b8e788a5SAdrian Chadd 
84b8e788a5SAdrian Chadd #ifdef INET
85b8e788a5SAdrian Chadd #include <netinet/in.h>
86b8e788a5SAdrian Chadd #include <netinet/if_ether.h>
87b8e788a5SAdrian Chadd #endif
88b8e788a5SAdrian Chadd 
89b8e788a5SAdrian Chadd #include <dev/ath/if_athvar.h>
90b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
91b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_diagcodes.h>
92b8e788a5SAdrian Chadd 
93b8e788a5SAdrian Chadd #include <dev/ath/if_ath_debug.h>
94b8e788a5SAdrian Chadd 
95b8e788a5SAdrian Chadd #ifdef ATH_TX99_DIAG
96b8e788a5SAdrian Chadd #include <dev/ath/ath_tx99/ath_tx99.h>
97b8e788a5SAdrian Chadd #endif
98b8e788a5SAdrian Chadd 
99b8e788a5SAdrian Chadd #include <dev/ath/if_ath_misc.h>
100b8e788a5SAdrian Chadd #include <dev/ath/if_ath_tx.h>
101c1782ce0SAdrian Chadd #include <dev/ath/if_ath_tx_ht.h>
102b8e788a5SAdrian Chadd 
10381a82688SAdrian Chadd /*
104eb6f0de0SAdrian Chadd  * How many retries to perform in software
105eb6f0de0SAdrian Chadd  */
106eb6f0de0SAdrian Chadd #define	SWMAX_RETRIES		10
107eb6f0de0SAdrian Chadd 
108eb6f0de0SAdrian Chadd static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
109eb6f0de0SAdrian Chadd     int tid);
110eb6f0de0SAdrian Chadd static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
111eb6f0de0SAdrian Chadd     int tid);
112eb6f0de0SAdrian Chadd static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
113eb6f0de0SAdrian Chadd     struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
114eb6f0de0SAdrian Chadd static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
115eb6f0de0SAdrian Chadd     struct ieee80211_node *ni, struct mbuf *m0, int *tid);
116eb6f0de0SAdrian Chadd 
117eb6f0de0SAdrian Chadd /*
11881a82688SAdrian Chadd  * Whether to use the 11n rate scenario functions or not
11981a82688SAdrian Chadd  */
12081a82688SAdrian Chadd static inline int
12181a82688SAdrian Chadd ath_tx_is_11n(struct ath_softc *sc)
12281a82688SAdrian Chadd {
12381a82688SAdrian Chadd 	return (sc->sc_ah->ah_magic == 0x20065416);
12481a82688SAdrian Chadd }
12581a82688SAdrian Chadd 
126eb6f0de0SAdrian Chadd /*
127eb6f0de0SAdrian Chadd  * Obtain the current TID from the given frame.
128eb6f0de0SAdrian Chadd  *
129eb6f0de0SAdrian Chadd  * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.)
130eb6f0de0SAdrian Chadd  * This has implications for which AC/priority the packet is placed
131eb6f0de0SAdrian Chadd  * in.
132eb6f0de0SAdrian Chadd  */
133eb6f0de0SAdrian Chadd static int
134eb6f0de0SAdrian Chadd ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
135eb6f0de0SAdrian Chadd {
136eb6f0de0SAdrian Chadd 	const struct ieee80211_frame *wh;
137eb6f0de0SAdrian Chadd 	int pri = M_WME_GETAC(m0);
138eb6f0de0SAdrian Chadd 
139eb6f0de0SAdrian Chadd 	wh = mtod(m0, const struct ieee80211_frame *);
140eb6f0de0SAdrian Chadd 	if (! IEEE80211_QOS_HAS_SEQ(wh))
141eb6f0de0SAdrian Chadd 		return IEEE80211_NONQOS_TID;
142eb6f0de0SAdrian Chadd 	else
143eb6f0de0SAdrian Chadd 		return WME_AC_TO_TID(pri);
144eb6f0de0SAdrian Chadd }
145eb6f0de0SAdrian Chadd 
146eb6f0de0SAdrian Chadd /*
147eb6f0de0SAdrian Chadd  * Determine what the correct AC queue for the given frame
148eb6f0de0SAdrian Chadd  * should be.
149eb6f0de0SAdrian Chadd  *
150eb6f0de0SAdrian Chadd  * This code assumes that the TIDs map consistently to
151eb6f0de0SAdrian Chadd  * the underlying hardware (or software) ath_txq.
152eb6f0de0SAdrian Chadd  * Since the sender may try to set an AC which is
153eb6f0de0SAdrian Chadd  * arbitrary, non-QoS TIDs may end up being put on
154eb6f0de0SAdrian Chadd  * completely different ACs. There's no way to put a
155eb6f0de0SAdrian Chadd  * TID into multiple ath_txq's for scheduling, so
156eb6f0de0SAdrian Chadd  * for now we override the AC/TXQ selection and set
157eb6f0de0SAdrian Chadd  * non-QOS TID frames into the BE queue.
158eb6f0de0SAdrian Chadd  *
159eb6f0de0SAdrian Chadd  * This may be completely incorrect - specifically,
160eb6f0de0SAdrian Chadd  * some management frames may end up out of order
161eb6f0de0SAdrian Chadd  * compared to the QoS traffic they're controlling.
162eb6f0de0SAdrian Chadd  * I'll look into this later.
163eb6f0de0SAdrian Chadd  */
164eb6f0de0SAdrian Chadd static int
165eb6f0de0SAdrian Chadd ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
166eb6f0de0SAdrian Chadd {
167eb6f0de0SAdrian Chadd 	const struct ieee80211_frame *wh;
168eb6f0de0SAdrian Chadd 	int pri = M_WME_GETAC(m0);
169eb6f0de0SAdrian Chadd 	wh = mtod(m0, const struct ieee80211_frame *);
170eb6f0de0SAdrian Chadd 	if (IEEE80211_QOS_HAS_SEQ(wh))
171eb6f0de0SAdrian Chadd 		return pri;
172eb6f0de0SAdrian Chadd 
173eb6f0de0SAdrian Chadd 	return WME_AC_BE;
174eb6f0de0SAdrian Chadd }
175eb6f0de0SAdrian Chadd 
176b8e788a5SAdrian Chadd void
177b8e788a5SAdrian Chadd ath_txfrag_cleanup(struct ath_softc *sc,
178b8e788a5SAdrian Chadd 	ath_bufhead *frags, struct ieee80211_node *ni)
179b8e788a5SAdrian Chadd {
180b8e788a5SAdrian Chadd 	struct ath_buf *bf, *next;
181b8e788a5SAdrian Chadd 
182b8e788a5SAdrian Chadd 	ATH_TXBUF_LOCK_ASSERT(sc);
183b8e788a5SAdrian Chadd 
1846b349e5aSAdrian Chadd 	TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
185b8e788a5SAdrian Chadd 		/* NB: bf assumed clean */
1866b349e5aSAdrian Chadd 		TAILQ_REMOVE(frags, bf, bf_list);
1876b349e5aSAdrian Chadd 		TAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
188b8e788a5SAdrian Chadd 		ieee80211_node_decref(ni);
189b8e788a5SAdrian Chadd 	}
190b8e788a5SAdrian Chadd }
191b8e788a5SAdrian Chadd 
192b8e788a5SAdrian Chadd /*
193b8e788a5SAdrian Chadd  * Setup xmit of a fragmented frame.  Allocate a buffer
194b8e788a5SAdrian Chadd  * for each frag and bump the node reference count to
195b8e788a5SAdrian Chadd  * reflect the held reference to be setup by ath_tx_start.
196b8e788a5SAdrian Chadd  */
197b8e788a5SAdrian Chadd int
198b8e788a5SAdrian Chadd ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
199b8e788a5SAdrian Chadd 	struct mbuf *m0, struct ieee80211_node *ni)
200b8e788a5SAdrian Chadd {
201b8e788a5SAdrian Chadd 	struct mbuf *m;
202b8e788a5SAdrian Chadd 	struct ath_buf *bf;
203b8e788a5SAdrian Chadd 
204b8e788a5SAdrian Chadd 	ATH_TXBUF_LOCK(sc);
205b8e788a5SAdrian Chadd 	for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
206b8e788a5SAdrian Chadd 		bf = _ath_getbuf_locked(sc);
207b8e788a5SAdrian Chadd 		if (bf == NULL) {	/* out of buffers, cleanup */
208b8e788a5SAdrian Chadd 			ath_txfrag_cleanup(sc, frags, ni);
209b8e788a5SAdrian Chadd 			break;
210b8e788a5SAdrian Chadd 		}
211b8e788a5SAdrian Chadd 		ieee80211_node_incref(ni);
2126b349e5aSAdrian Chadd 		TAILQ_INSERT_TAIL(frags, bf, bf_list);
213b8e788a5SAdrian Chadd 	}
214b8e788a5SAdrian Chadd 	ATH_TXBUF_UNLOCK(sc);
215b8e788a5SAdrian Chadd 
2166b349e5aSAdrian Chadd 	return !TAILQ_EMPTY(frags);
217b8e788a5SAdrian Chadd }
218b8e788a5SAdrian Chadd 
219b8e788a5SAdrian Chadd /*
220b8e788a5SAdrian Chadd  * Reclaim mbuf resources.  For fragmented frames we
221b8e788a5SAdrian Chadd  * need to claim each frag chained with m_nextpkt.
222b8e788a5SAdrian Chadd  */
223b8e788a5SAdrian Chadd void
224b8e788a5SAdrian Chadd ath_freetx(struct mbuf *m)
225b8e788a5SAdrian Chadd {
226b8e788a5SAdrian Chadd 	struct mbuf *next;
227b8e788a5SAdrian Chadd 
228b8e788a5SAdrian Chadd 	do {
229b8e788a5SAdrian Chadd 		next = m->m_nextpkt;
230b8e788a5SAdrian Chadd 		m->m_nextpkt = NULL;
231b8e788a5SAdrian Chadd 		m_freem(m);
232b8e788a5SAdrian Chadd 	} while ((m = next) != NULL);
233b8e788a5SAdrian Chadd }
234b8e788a5SAdrian Chadd 
235b8e788a5SAdrian Chadd static int
236b8e788a5SAdrian Chadd ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
237b8e788a5SAdrian Chadd {
238b8e788a5SAdrian Chadd 	struct mbuf *m;
239b8e788a5SAdrian Chadd 	int error;
240b8e788a5SAdrian Chadd 
241b8e788a5SAdrian Chadd 	/*
242b8e788a5SAdrian Chadd 	 * Load the DMA map so any coalescing is done.  This
243b8e788a5SAdrian Chadd 	 * also calculates the number of descriptors we need.
244b8e788a5SAdrian Chadd 	 */
245b8e788a5SAdrian Chadd 	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
246b8e788a5SAdrian Chadd 				     bf->bf_segs, &bf->bf_nseg,
247b8e788a5SAdrian Chadd 				     BUS_DMA_NOWAIT);
248b8e788a5SAdrian Chadd 	if (error == EFBIG) {
249b8e788a5SAdrian Chadd 		/* XXX packet requires too many descriptors */
250b8e788a5SAdrian Chadd 		bf->bf_nseg = ATH_TXDESC+1;
251b8e788a5SAdrian Chadd 	} else if (error != 0) {
252b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_busdma++;
253b8e788a5SAdrian Chadd 		ath_freetx(m0);
254b8e788a5SAdrian Chadd 		return error;
255b8e788a5SAdrian Chadd 	}
256b8e788a5SAdrian Chadd 	/*
257b8e788a5SAdrian Chadd 	 * Discard null packets and check for packets that
258b8e788a5SAdrian Chadd 	 * require too many TX descriptors.  We try to convert
259b8e788a5SAdrian Chadd 	 * the latter to a cluster.
260b8e788a5SAdrian Chadd 	 */
261b8e788a5SAdrian Chadd 	if (bf->bf_nseg > ATH_TXDESC) {		/* too many desc's, linearize */
262b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_linear++;
263b8e788a5SAdrian Chadd 		m = m_collapse(m0, M_DONTWAIT, ATH_TXDESC);
264b8e788a5SAdrian Chadd 		if (m == NULL) {
265b8e788a5SAdrian Chadd 			ath_freetx(m0);
266b8e788a5SAdrian Chadd 			sc->sc_stats.ast_tx_nombuf++;
267b8e788a5SAdrian Chadd 			return ENOMEM;
268b8e788a5SAdrian Chadd 		}
269b8e788a5SAdrian Chadd 		m0 = m;
270b8e788a5SAdrian Chadd 		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
271b8e788a5SAdrian Chadd 					     bf->bf_segs, &bf->bf_nseg,
272b8e788a5SAdrian Chadd 					     BUS_DMA_NOWAIT);
273b8e788a5SAdrian Chadd 		if (error != 0) {
274b8e788a5SAdrian Chadd 			sc->sc_stats.ast_tx_busdma++;
275b8e788a5SAdrian Chadd 			ath_freetx(m0);
276b8e788a5SAdrian Chadd 			return error;
277b8e788a5SAdrian Chadd 		}
278b8e788a5SAdrian Chadd 		KASSERT(bf->bf_nseg <= ATH_TXDESC,
279b8e788a5SAdrian Chadd 		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
280b8e788a5SAdrian Chadd 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
281b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_nodata++;
282b8e788a5SAdrian Chadd 		ath_freetx(m0);
283b8e788a5SAdrian Chadd 		return EIO;
284b8e788a5SAdrian Chadd 	}
285b8e788a5SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
286b8e788a5SAdrian Chadd 		__func__, m0, m0->m_pkthdr.len);
287b8e788a5SAdrian Chadd 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
288b8e788a5SAdrian Chadd 	bf->bf_m = m0;
289b8e788a5SAdrian Chadd 
290b8e788a5SAdrian Chadd 	return 0;
291b8e788a5SAdrian Chadd }
292b8e788a5SAdrian Chadd 
2936edf1dc7SAdrian Chadd /*
2946edf1dc7SAdrian Chadd  * Chain together segments+descriptors for a non-11n frame.
2956edf1dc7SAdrian Chadd  */
296b8e788a5SAdrian Chadd static void
297eb6f0de0SAdrian Chadd ath_tx_chaindesclist(struct ath_softc *sc, struct ath_buf *bf)
298b8e788a5SAdrian Chadd {
299b8e788a5SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
300b8e788a5SAdrian Chadd 	struct ath_desc *ds, *ds0;
301b8e788a5SAdrian Chadd 	int i;
302b8e788a5SAdrian Chadd 
303b8e788a5SAdrian Chadd 	/*
304b8e788a5SAdrian Chadd 	 * Fillin the remainder of the descriptor info.
305b8e788a5SAdrian Chadd 	 */
306b8e788a5SAdrian Chadd 	ds0 = ds = bf->bf_desc;
307b8e788a5SAdrian Chadd 	for (i = 0; i < bf->bf_nseg; i++, ds++) {
308b8e788a5SAdrian Chadd 		ds->ds_data = bf->bf_segs[i].ds_addr;
309b8e788a5SAdrian Chadd 		if (i == bf->bf_nseg - 1)
310b8e788a5SAdrian Chadd 			ds->ds_link = 0;
311b8e788a5SAdrian Chadd 		else
312b8e788a5SAdrian Chadd 			ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
313b8e788a5SAdrian Chadd 		ath_hal_filltxdesc(ah, ds
314b8e788a5SAdrian Chadd 			, bf->bf_segs[i].ds_len	/* segment length */
315b8e788a5SAdrian Chadd 			, i == 0		/* first segment */
316b8e788a5SAdrian Chadd 			, i == bf->bf_nseg - 1	/* last segment */
317b8e788a5SAdrian Chadd 			, ds0			/* first descriptor */
318b8e788a5SAdrian Chadd 		);
319b8e788a5SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_XMIT,
320b8e788a5SAdrian Chadd 			"%s: %d: %08x %08x %08x %08x %08x %08x\n",
321b8e788a5SAdrian Chadd 			__func__, i, ds->ds_link, ds->ds_data,
322b8e788a5SAdrian Chadd 			ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
3236edf1dc7SAdrian Chadd 		bf->bf_lastds = ds;
324b8e788a5SAdrian Chadd 	}
32581a82688SAdrian Chadd }
32681a82688SAdrian Chadd 
327eb6f0de0SAdrian Chadd /*
328eb6f0de0SAdrian Chadd  * Fill in the descriptor list for a aggregate subframe.
329eb6f0de0SAdrian Chadd  *
330eb6f0de0SAdrian Chadd  * The subframe is returned with the ds_link field in the last subframe
331eb6f0de0SAdrian Chadd  * pointing to 0.
332eb6f0de0SAdrian Chadd  */
33381a82688SAdrian Chadd static void
334eb6f0de0SAdrian Chadd ath_tx_chaindesclist_subframe(struct ath_softc *sc, struct ath_buf *bf)
33581a82688SAdrian Chadd {
33681a82688SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
337eb6f0de0SAdrian Chadd 	struct ath_desc *ds, *ds0;
338eb6f0de0SAdrian Chadd 	int i;
33981a82688SAdrian Chadd 
340eb6f0de0SAdrian Chadd 	ds0 = ds = bf->bf_desc;
341eb6f0de0SAdrian Chadd 
342eb6f0de0SAdrian Chadd 	/*
343eb6f0de0SAdrian Chadd 	 * There's no need to call ath_hal_setupfirsttxdesc here;
344eb6f0de0SAdrian Chadd 	 * That's only going to occur for the first frame in an aggregate.
345eb6f0de0SAdrian Chadd 	 */
346eb6f0de0SAdrian Chadd 	for (i = 0; i < bf->bf_nseg; i++, ds++) {
347eb6f0de0SAdrian Chadd 		ds->ds_data = bf->bf_segs[i].ds_addr;
348eb6f0de0SAdrian Chadd 		if (i == bf->bf_nseg - 1)
349eb6f0de0SAdrian Chadd 			ds->ds_link = 0;
350eb6f0de0SAdrian Chadd 		else
351eb6f0de0SAdrian Chadd 			ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
352eb6f0de0SAdrian Chadd 
353eb6f0de0SAdrian Chadd 		/*
354eb6f0de0SAdrian Chadd 		 * This performs the setup for an aggregate frame.
355eb6f0de0SAdrian Chadd 		 * This includes enabling the aggregate flags if needed.
356eb6f0de0SAdrian Chadd 		 */
357eb6f0de0SAdrian Chadd 		ath_hal_chaintxdesc(ah, ds,
358eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_pktlen,
359eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_hdrlen,
360eb6f0de0SAdrian Chadd 		    HAL_PKT_TYPE_AMPDU,	/* forces aggregate bits to be set */
361eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_keyix,
362eb6f0de0SAdrian Chadd 		    0,			/* cipher, calculated from keyix */
363eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_ndelim,
364eb6f0de0SAdrian Chadd 		    bf->bf_segs[i].ds_len,	/* segment length */
365eb6f0de0SAdrian Chadd 		    i == 0,		/* first segment */
366eb6f0de0SAdrian Chadd 		    i == bf->bf_nseg - 1	/* last segment */
367eb6f0de0SAdrian Chadd 		);
368eb6f0de0SAdrian Chadd 
369eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_XMIT,
370eb6f0de0SAdrian Chadd 			"%s: %d: %08x %08x %08x %08x %08x %08x\n",
371eb6f0de0SAdrian Chadd 			__func__, i, ds->ds_link, ds->ds_data,
372eb6f0de0SAdrian Chadd 			ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
373eb6f0de0SAdrian Chadd 		bf->bf_lastds = ds;
374eb6f0de0SAdrian Chadd 	}
375eb6f0de0SAdrian Chadd }
376eb6f0de0SAdrian Chadd 
377eb6f0de0SAdrian Chadd /*
378eb6f0de0SAdrian Chadd  * Setup segments+descriptors for an 11n aggregate.
379eb6f0de0SAdrian Chadd  * bf_first is the first buffer in the aggregate.
380eb6f0de0SAdrian Chadd  * The descriptor list must already been linked together using
381eb6f0de0SAdrian Chadd  * bf->bf_next.
382eb6f0de0SAdrian Chadd  */
383eb6f0de0SAdrian Chadd static void
384eb6f0de0SAdrian Chadd ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
385eb6f0de0SAdrian Chadd {
386eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_prev = NULL;
387eb6f0de0SAdrian Chadd 
388eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
389eb6f0de0SAdrian Chadd 	    __func__, bf_first->bf_state.bfs_nframes,
390eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_al);
391eb6f0de0SAdrian Chadd 
392eb6f0de0SAdrian Chadd 	/*
393eb6f0de0SAdrian Chadd 	 * Setup all descriptors of all subframes.
394eb6f0de0SAdrian Chadd 	 */
395eb6f0de0SAdrian Chadd 	bf = bf_first;
396eb6f0de0SAdrian Chadd 	while (bf != NULL) {
397eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
398eb6f0de0SAdrian Chadd 		    "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
399eb6f0de0SAdrian Chadd 		    __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
400eb6f0de0SAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno));
401eb6f0de0SAdrian Chadd 
402eb6f0de0SAdrian Chadd 		/* Sub-frame setup */
403eb6f0de0SAdrian Chadd 		ath_tx_chaindesclist_subframe(sc, bf);
404eb6f0de0SAdrian Chadd 
405eb6f0de0SAdrian Chadd 		/*
406eb6f0de0SAdrian Chadd 		 * Link the last descriptor of the previous frame
407eb6f0de0SAdrian Chadd 		 * to the beginning descriptor of this frame.
408eb6f0de0SAdrian Chadd 		 */
409eb6f0de0SAdrian Chadd 		if (bf_prev != NULL)
410eb6f0de0SAdrian Chadd 			bf_prev->bf_lastds->ds_link = bf->bf_daddr;
411eb6f0de0SAdrian Chadd 
412eb6f0de0SAdrian Chadd 		/* Save a copy so we can link the next descriptor in */
413eb6f0de0SAdrian Chadd 		bf_prev = bf;
414eb6f0de0SAdrian Chadd 		bf = bf->bf_next;
415eb6f0de0SAdrian Chadd 	}
416eb6f0de0SAdrian Chadd 
417eb6f0de0SAdrian Chadd 	/*
418eb6f0de0SAdrian Chadd 	 * Setup first descriptor of first frame.
419eb6f0de0SAdrian Chadd 	 * chaintxdesc() overwrites the descriptor entries;
420eb6f0de0SAdrian Chadd 	 * setupfirsttxdesc() merges in things.
421eb6f0de0SAdrian Chadd 	 * Otherwise various fields aren't set correctly (eg flags).
422eb6f0de0SAdrian Chadd 	 */
423eb6f0de0SAdrian Chadd 	ath_hal_setupfirsttxdesc(sc->sc_ah,
424eb6f0de0SAdrian Chadd 	    bf_first->bf_desc,
425eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_al,
426eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_flags | HAL_TXDESC_INTREQ,
427eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_txpower,
428eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_txrate0,
429eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_try0,
430eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_txantenna,
431eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_ctsrate,
432eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_ctsduration);
433eb6f0de0SAdrian Chadd 
434eb6f0de0SAdrian Chadd 	/*
435eb6f0de0SAdrian Chadd 	 * Setup the last descriptor in the list.
436eb6f0de0SAdrian Chadd 	 * bf_prev points to the last; bf is NULL here.
437eb6f0de0SAdrian Chadd 	 */
438d4365d16SAdrian Chadd 	ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_desc,
439d4365d16SAdrian Chadd 	    bf_first->bf_desc);
440eb6f0de0SAdrian Chadd 
441eb6f0de0SAdrian Chadd 	/*
442eb6f0de0SAdrian Chadd 	 * Set the first descriptor bf_lastds field to point to
443eb6f0de0SAdrian Chadd 	 * the last descriptor in the last subframe, that's where
444eb6f0de0SAdrian Chadd 	 * the status update will occur.
445eb6f0de0SAdrian Chadd 	 */
446eb6f0de0SAdrian Chadd 	bf_first->bf_lastds = bf_prev->bf_lastds;
447eb6f0de0SAdrian Chadd 
448eb6f0de0SAdrian Chadd 	/*
449eb6f0de0SAdrian Chadd 	 * And bf_last in the first descriptor points to the end of
450eb6f0de0SAdrian Chadd 	 * the aggregate list.
451eb6f0de0SAdrian Chadd 	 */
452eb6f0de0SAdrian Chadd 	bf_first->bf_last = bf_prev;
453eb6f0de0SAdrian Chadd 
454eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
455eb6f0de0SAdrian Chadd }
456eb6f0de0SAdrian Chadd 
457eb6f0de0SAdrian Chadd static void
458eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
459eb6f0de0SAdrian Chadd     struct ath_buf *bf)
460eb6f0de0SAdrian Chadd {
461eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
462eb6f0de0SAdrian Chadd 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
463eb6f0de0SAdrian Chadd 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
464eb6f0de0SAdrian Chadd 	if (txq->axq_link != NULL) {
465eb6f0de0SAdrian Chadd 		struct ath_buf *last = ATH_TXQ_LAST(txq, axq_q_s);
466eb6f0de0SAdrian Chadd 		struct ieee80211_frame *wh;
467eb6f0de0SAdrian Chadd 
468eb6f0de0SAdrian Chadd 		/* mark previous frame */
469eb6f0de0SAdrian Chadd 		wh = mtod(last->bf_m, struct ieee80211_frame *);
470eb6f0de0SAdrian Chadd 		wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
471eb6f0de0SAdrian Chadd 		bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap,
472eb6f0de0SAdrian Chadd 		    BUS_DMASYNC_PREWRITE);
473eb6f0de0SAdrian Chadd 
474eb6f0de0SAdrian Chadd 		/* link descriptor */
475eb6f0de0SAdrian Chadd 		*txq->axq_link = bf->bf_daddr;
476eb6f0de0SAdrian Chadd 	}
477eb6f0de0SAdrian Chadd 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
478eb6f0de0SAdrian Chadd 	txq->axq_link = &bf->bf_lastds->ds_link;
479eb6f0de0SAdrian Chadd }
480eb6f0de0SAdrian Chadd 
481eb6f0de0SAdrian Chadd /*
482eb6f0de0SAdrian Chadd  * Hand-off packet to a hardware queue.
483eb6f0de0SAdrian Chadd  */
484eb6f0de0SAdrian Chadd static void
485d4365d16SAdrian Chadd ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
486d4365d16SAdrian Chadd     struct ath_buf *bf)
487eb6f0de0SAdrian Chadd {
488eb6f0de0SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
48981a82688SAdrian Chadd 
490b8e788a5SAdrian Chadd 	/*
491b8e788a5SAdrian Chadd 	 * Insert the frame on the outbound list and pass it on
492b8e788a5SAdrian Chadd 	 * to the hardware.  Multicast frames buffered for power
493b8e788a5SAdrian Chadd 	 * save stations and transmit from the CAB queue are stored
494b8e788a5SAdrian Chadd 	 * on a s/w only queue and loaded on to the CAB queue in
495b8e788a5SAdrian Chadd 	 * the SWBA handler since frames only go out on DTIM and
496b8e788a5SAdrian Chadd 	 * to avoid possible races.
497b8e788a5SAdrian Chadd 	 */
498eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
499b8e788a5SAdrian Chadd 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
500eb6f0de0SAdrian Chadd 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
501eb6f0de0SAdrian Chadd 	KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
502eb6f0de0SAdrian Chadd 	     ("ath_tx_handoff_hw called for mcast queue"));
503eb6f0de0SAdrian Chadd 
504ef27340cSAdrian Chadd #if 0
505ef27340cSAdrian Chadd 	/*
506ef27340cSAdrian Chadd 	 * This causes a LOR. Find out where the PCU lock is being
507ef27340cSAdrian Chadd 	 * held whilst the TXQ lock is grabbed - that shouldn't
508ef27340cSAdrian Chadd 	 * be occuring.
509ef27340cSAdrian Chadd 	 */
510ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
511ef27340cSAdrian Chadd 	if (sc->sc_inreset_cnt) {
512ef27340cSAdrian Chadd 		ATH_PCU_UNLOCK(sc);
513ef27340cSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_RESET,
514ef27340cSAdrian Chadd 		    "%s: called with sc_in_reset != 0\n",
515ef27340cSAdrian Chadd 		    __func__);
516ef27340cSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_XMIT,
517ef27340cSAdrian Chadd 		    "%s: queued: TXDP[%u] = %p (%p) depth %d\n",
518ef27340cSAdrian Chadd 		    __func__, txq->axq_qnum,
519ef27340cSAdrian Chadd 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
520ef27340cSAdrian Chadd 		    txq->axq_depth);
521ef27340cSAdrian Chadd 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
522ef27340cSAdrian Chadd 		if (bf->bf_state.bfs_aggr)
523ef27340cSAdrian Chadd 			txq->axq_aggr_depth++;
524ef27340cSAdrian Chadd 		/*
525ef27340cSAdrian Chadd 		 * There's no need to update axq_link; the hardware
526ef27340cSAdrian Chadd 		 * is in reset and once the reset is complete, any
527ef27340cSAdrian Chadd 		 * non-empty queues will simply have DMA restarted.
528ef27340cSAdrian Chadd 		 */
529ef27340cSAdrian Chadd 		return;
530ef27340cSAdrian Chadd 		}
531ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
532ef27340cSAdrian Chadd #endif
533ef27340cSAdrian Chadd 
534eb6f0de0SAdrian Chadd 	/* For now, so not to generate whitespace diffs */
535eb6f0de0SAdrian Chadd 	if (1) {
536b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
537b8e788a5SAdrian Chadd 		int qbusy;
538b8e788a5SAdrian Chadd 
539b8e788a5SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
540b8e788a5SAdrian Chadd 		qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
541b8e788a5SAdrian Chadd 		if (txq->axq_link == NULL) {
542b8e788a5SAdrian Chadd 			/*
543b8e788a5SAdrian Chadd 			 * Be careful writing the address to TXDP.  If
544b8e788a5SAdrian Chadd 			 * the tx q is enabled then this write will be
545b8e788a5SAdrian Chadd 			 * ignored.  Normally this is not an issue but
546b8e788a5SAdrian Chadd 			 * when tdma is in use and the q is beacon gated
547b8e788a5SAdrian Chadd 			 * this race can occur.  If the q is busy then
548b8e788a5SAdrian Chadd 			 * defer the work to later--either when another
549b8e788a5SAdrian Chadd 			 * packet comes along or when we prepare a beacon
550b8e788a5SAdrian Chadd 			 * frame at SWBA.
551b8e788a5SAdrian Chadd 			 */
552b8e788a5SAdrian Chadd 			if (!qbusy) {
553d4365d16SAdrian Chadd 				ath_hal_puttxbuf(ah, txq->axq_qnum,
554d4365d16SAdrian Chadd 				    bf->bf_daddr);
555b8e788a5SAdrian Chadd 				txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
556b8e788a5SAdrian Chadd 				DPRINTF(sc, ATH_DEBUG_XMIT,
557b8e788a5SAdrian Chadd 				    "%s: TXDP[%u] = %p (%p) depth %d\n",
558b8e788a5SAdrian Chadd 				    __func__, txq->axq_qnum,
559b8e788a5SAdrian Chadd 				    (caddr_t)bf->bf_daddr, bf->bf_desc,
560b8e788a5SAdrian Chadd 				    txq->axq_depth);
561b8e788a5SAdrian Chadd 			} else {
562b8e788a5SAdrian Chadd 				txq->axq_flags |= ATH_TXQ_PUTPENDING;
563b8e788a5SAdrian Chadd 				DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
564b8e788a5SAdrian Chadd 				    "%s: Q%u busy, defer enable\n", __func__,
565b8e788a5SAdrian Chadd 				    txq->axq_qnum);
566b8e788a5SAdrian Chadd 			}
567b8e788a5SAdrian Chadd 		} else {
568b8e788a5SAdrian Chadd 			*txq->axq_link = bf->bf_daddr;
569b8e788a5SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_XMIT,
570b8e788a5SAdrian Chadd 			    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
571b8e788a5SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
572d4365d16SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
573d4365d16SAdrian Chadd 			    txq->axq_depth);
574b8e788a5SAdrian Chadd 			if ((txq->axq_flags & ATH_TXQ_PUTPENDING) && !qbusy) {
575b8e788a5SAdrian Chadd 				/*
576b8e788a5SAdrian Chadd 				 * The q was busy when we previously tried
577b8e788a5SAdrian Chadd 				 * to write the address of the first buffer
578b8e788a5SAdrian Chadd 				 * in the chain.  Since it's not busy now
579b8e788a5SAdrian Chadd 				 * handle this chore.  We are certain the
580b8e788a5SAdrian Chadd 				 * buffer at the front is the right one since
581b8e788a5SAdrian Chadd 				 * axq_link is NULL only when the buffer list
582b8e788a5SAdrian Chadd 				 * is/was empty.
583b8e788a5SAdrian Chadd 				 */
584b8e788a5SAdrian Chadd 				ath_hal_puttxbuf(ah, txq->axq_qnum,
5856b349e5aSAdrian Chadd 					TAILQ_FIRST(&txq->axq_q)->bf_daddr);
586b8e788a5SAdrian Chadd 				txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
587b8e788a5SAdrian Chadd 				DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
588b8e788a5SAdrian Chadd 				    "%s: Q%u restarted\n", __func__,
589b8e788a5SAdrian Chadd 				    txq->axq_qnum);
590b8e788a5SAdrian Chadd 			}
591b8e788a5SAdrian Chadd 		}
592b8e788a5SAdrian Chadd #else
593b8e788a5SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
594b8e788a5SAdrian Chadd 		if (txq->axq_link == NULL) {
595b8e788a5SAdrian Chadd 			ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
596b8e788a5SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_XMIT,
597b8e788a5SAdrian Chadd 			    "%s: TXDP[%u] = %p (%p) depth %d\n",
598b8e788a5SAdrian Chadd 			    __func__, txq->axq_qnum,
599b8e788a5SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
600b8e788a5SAdrian Chadd 			    txq->axq_depth);
601b8e788a5SAdrian Chadd 		} else {
602b8e788a5SAdrian Chadd 			*txq->axq_link = bf->bf_daddr;
603b8e788a5SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_XMIT,
604b8e788a5SAdrian Chadd 			    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
605b8e788a5SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
606d4365d16SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
607d4365d16SAdrian Chadd 			    txq->axq_depth);
608b8e788a5SAdrian Chadd 		}
609b8e788a5SAdrian Chadd #endif /* IEEE80211_SUPPORT_TDMA */
6106edf1dc7SAdrian Chadd 		if (bf->bf_state.bfs_aggr)
6116edf1dc7SAdrian Chadd 			txq->axq_aggr_depth++;
6126edf1dc7SAdrian Chadd 		txq->axq_link = &bf->bf_lastds->ds_link;
613b8e788a5SAdrian Chadd 		ath_hal_txstart(ah, txq->axq_qnum);
614b8e788a5SAdrian Chadd 	}
615b8e788a5SAdrian Chadd }
616eb6f0de0SAdrian Chadd 
617eb6f0de0SAdrian Chadd /*
618eb6f0de0SAdrian Chadd  * Restart TX DMA for the given TXQ.
619eb6f0de0SAdrian Chadd  *
620eb6f0de0SAdrian Chadd  * This must be called whether the queue is empty or not.
621eb6f0de0SAdrian Chadd  */
622eb6f0de0SAdrian Chadd void
623eb6f0de0SAdrian Chadd ath_txq_restart_dma(struct ath_softc *sc, struct ath_txq *txq)
624eb6f0de0SAdrian Chadd {
625eb6f0de0SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
626b1f3262cSAdrian Chadd 	struct ath_buf *bf, *bf_last;
627eb6f0de0SAdrian Chadd 
628eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
629eb6f0de0SAdrian Chadd 
630eb6f0de0SAdrian Chadd 	/* This is always going to be cleared, empty or not */
631eb6f0de0SAdrian Chadd 	txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
632eb6f0de0SAdrian Chadd 
633b1f3262cSAdrian Chadd 	/* XXX make this ATH_TXQ_FIRST */
634eb6f0de0SAdrian Chadd 	bf = TAILQ_FIRST(&txq->axq_q);
635b1f3262cSAdrian Chadd 	bf_last = ATH_TXQ_LAST(txq, axq_q_s);
636b1f3262cSAdrian Chadd 
637eb6f0de0SAdrian Chadd 	if (bf == NULL)
638eb6f0de0SAdrian Chadd 		return;
639eb6f0de0SAdrian Chadd 
640eb6f0de0SAdrian Chadd 	ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
641b1f3262cSAdrian Chadd 	txq->axq_link = &bf_last->bf_lastds->ds_link;
642eb6f0de0SAdrian Chadd 	ath_hal_txstart(ah, txq->axq_qnum);
643eb6f0de0SAdrian Chadd }
644eb6f0de0SAdrian Chadd 
645eb6f0de0SAdrian Chadd /*
646eb6f0de0SAdrian Chadd  * Hand off a packet to the hardware (or mcast queue.)
647eb6f0de0SAdrian Chadd  *
648eb6f0de0SAdrian Chadd  * The relevant hardware txq should be locked.
649eb6f0de0SAdrian Chadd  */
650eb6f0de0SAdrian Chadd static void
651eb6f0de0SAdrian Chadd ath_tx_handoff(struct ath_softc *sc, struct ath_txq *txq, struct ath_buf *bf)
652eb6f0de0SAdrian Chadd {
653eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
654eb6f0de0SAdrian Chadd 
655eb6f0de0SAdrian Chadd 	if (txq->axq_qnum == ATH_TXQ_SWQ)
656eb6f0de0SAdrian Chadd 		ath_tx_handoff_mcast(sc, txq, bf);
657eb6f0de0SAdrian Chadd 	else
658eb6f0de0SAdrian Chadd 		ath_tx_handoff_hw(sc, txq, bf);
659b8e788a5SAdrian Chadd }
660b8e788a5SAdrian Chadd 
66181a82688SAdrian Chadd static int
66281a82688SAdrian Chadd ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
663d4365d16SAdrian Chadd     struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
664d4365d16SAdrian Chadd     int *keyix)
66581a82688SAdrian Chadd {
66681a82688SAdrian Chadd 	if (iswep) {
66781a82688SAdrian Chadd 		const struct ieee80211_cipher *cip;
66881a82688SAdrian Chadd 		struct ieee80211_key *k;
66981a82688SAdrian Chadd 
67081a82688SAdrian Chadd 		/*
67181a82688SAdrian Chadd 		 * Construct the 802.11 header+trailer for an encrypted
67281a82688SAdrian Chadd 		 * frame. The only reason this can fail is because of an
67381a82688SAdrian Chadd 		 * unknown or unsupported cipher/key type.
67481a82688SAdrian Chadd 		 */
67581a82688SAdrian Chadd 		k = ieee80211_crypto_encap(ni, m0);
67681a82688SAdrian Chadd 		if (k == NULL) {
67781a82688SAdrian Chadd 			/*
67881a82688SAdrian Chadd 			 * This can happen when the key is yanked after the
67981a82688SAdrian Chadd 			 * frame was queued.  Just discard the frame; the
68081a82688SAdrian Chadd 			 * 802.11 layer counts failures and provides
68181a82688SAdrian Chadd 			 * debugging/diagnostics.
68281a82688SAdrian Chadd 			 */
683d4365d16SAdrian Chadd 			return (0);
68481a82688SAdrian Chadd 		}
68581a82688SAdrian Chadd 		/*
68681a82688SAdrian Chadd 		 * Adjust the packet + header lengths for the crypto
68781a82688SAdrian Chadd 		 * additions and calculate the h/w key index.  When
68881a82688SAdrian Chadd 		 * a s/w mic is done the frame will have had any mic
68981a82688SAdrian Chadd 		 * added to it prior to entry so m0->m_pkthdr.len will
69081a82688SAdrian Chadd 		 * account for it. Otherwise we need to add it to the
69181a82688SAdrian Chadd 		 * packet length.
69281a82688SAdrian Chadd 		 */
69381a82688SAdrian Chadd 		cip = k->wk_cipher;
69481a82688SAdrian Chadd 		(*hdrlen) += cip->ic_header;
69581a82688SAdrian Chadd 		(*pktlen) += cip->ic_header + cip->ic_trailer;
69681a82688SAdrian Chadd 		/* NB: frags always have any TKIP MIC done in s/w */
69781a82688SAdrian Chadd 		if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
69881a82688SAdrian Chadd 			(*pktlen) += cip->ic_miclen;
69981a82688SAdrian Chadd 		(*keyix) = k->wk_keyix;
70081a82688SAdrian Chadd 	} else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
70181a82688SAdrian Chadd 		/*
70281a82688SAdrian Chadd 		 * Use station key cache slot, if assigned.
70381a82688SAdrian Chadd 		 */
70481a82688SAdrian Chadd 		(*keyix) = ni->ni_ucastkey.wk_keyix;
70581a82688SAdrian Chadd 		if ((*keyix) == IEEE80211_KEYIX_NONE)
70681a82688SAdrian Chadd 			(*keyix) = HAL_TXKEYIX_INVALID;
70781a82688SAdrian Chadd 	} else
70881a82688SAdrian Chadd 		(*keyix) = HAL_TXKEYIX_INVALID;
70981a82688SAdrian Chadd 
710d4365d16SAdrian Chadd 	return (1);
71181a82688SAdrian Chadd }
71281a82688SAdrian Chadd 
713e42b5dbaSAdrian Chadd static uint8_t
714e42b5dbaSAdrian Chadd ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
715eb6f0de0SAdrian Chadd     int cix, int shortPreamble)
71679f02dbfSAdrian Chadd {
717e42b5dbaSAdrian Chadd 	uint8_t ctsrate;
718e42b5dbaSAdrian Chadd 
71979f02dbfSAdrian Chadd 	/*
72079f02dbfSAdrian Chadd 	 * CTS transmit rate is derived from the transmit rate
72179f02dbfSAdrian Chadd 	 * by looking in the h/w rate table.  We must also factor
72279f02dbfSAdrian Chadd 	 * in whether or not a short preamble is to be used.
72379f02dbfSAdrian Chadd 	 */
72479f02dbfSAdrian Chadd 	/* NB: cix is set above where RTS/CTS is enabled */
72579f02dbfSAdrian Chadd 	KASSERT(cix != 0xff, ("cix not setup"));
726e42b5dbaSAdrian Chadd 	ctsrate = rt->info[cix].rateCode;
727e42b5dbaSAdrian Chadd 
728e42b5dbaSAdrian Chadd 	/* XXX this should only matter for legacy rates */
729e42b5dbaSAdrian Chadd 	if (shortPreamble)
730e42b5dbaSAdrian Chadd 		ctsrate |= rt->info[cix].shortPreamble;
731e42b5dbaSAdrian Chadd 
732d4365d16SAdrian Chadd 	return (ctsrate);
733e42b5dbaSAdrian Chadd }
734e42b5dbaSAdrian Chadd 
735e42b5dbaSAdrian Chadd /*
736e42b5dbaSAdrian Chadd  * Calculate the RTS/CTS duration for legacy frames.
737e42b5dbaSAdrian Chadd  */
738e42b5dbaSAdrian Chadd static int
739e42b5dbaSAdrian Chadd ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
740e42b5dbaSAdrian Chadd     int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
741e42b5dbaSAdrian Chadd     int flags)
742e42b5dbaSAdrian Chadd {
743e42b5dbaSAdrian Chadd 	int ctsduration = 0;
744e42b5dbaSAdrian Chadd 
745e42b5dbaSAdrian Chadd 	/* This mustn't be called for HT modes */
746e42b5dbaSAdrian Chadd 	if (rt->info[cix].phy == IEEE80211_T_HT) {
747e42b5dbaSAdrian Chadd 		printf("%s: HT rate where it shouldn't be (0x%x)\n",
748e42b5dbaSAdrian Chadd 		    __func__, rt->info[cix].rateCode);
749d4365d16SAdrian Chadd 		return (-1);
750e42b5dbaSAdrian Chadd 	}
751e42b5dbaSAdrian Chadd 
75279f02dbfSAdrian Chadd 	/*
75379f02dbfSAdrian Chadd 	 * Compute the transmit duration based on the frame
75479f02dbfSAdrian Chadd 	 * size and the size of an ACK frame.  We call into the
75579f02dbfSAdrian Chadd 	 * HAL to do the computation since it depends on the
75679f02dbfSAdrian Chadd 	 * characteristics of the actual PHY being used.
75779f02dbfSAdrian Chadd 	 *
75879f02dbfSAdrian Chadd 	 * NB: CTS is assumed the same size as an ACK so we can
75979f02dbfSAdrian Chadd 	 *     use the precalculated ACK durations.
76079f02dbfSAdrian Chadd 	 */
76179f02dbfSAdrian Chadd 	if (shortPreamble) {
76279f02dbfSAdrian Chadd 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
763e42b5dbaSAdrian Chadd 			ctsduration += rt->info[cix].spAckDuration;
764e42b5dbaSAdrian Chadd 		ctsduration += ath_hal_computetxtime(ah,
76579f02dbfSAdrian Chadd 			rt, pktlen, rix, AH_TRUE);
76679f02dbfSAdrian Chadd 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
767e42b5dbaSAdrian Chadd 			ctsduration += rt->info[rix].spAckDuration;
76879f02dbfSAdrian Chadd 	} else {
76979f02dbfSAdrian Chadd 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
770e42b5dbaSAdrian Chadd 			ctsduration += rt->info[cix].lpAckDuration;
771e42b5dbaSAdrian Chadd 		ctsduration += ath_hal_computetxtime(ah,
77279f02dbfSAdrian Chadd 			rt, pktlen, rix, AH_FALSE);
77379f02dbfSAdrian Chadd 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
774e42b5dbaSAdrian Chadd 			ctsduration += rt->info[rix].lpAckDuration;
77579f02dbfSAdrian Chadd 	}
776e42b5dbaSAdrian Chadd 
777d4365d16SAdrian Chadd 	return (ctsduration);
77879f02dbfSAdrian Chadd }
77979f02dbfSAdrian Chadd 
780eb6f0de0SAdrian Chadd /*
781eb6f0de0SAdrian Chadd  * Update the given ath_buf with updated rts/cts setup and duration
782eb6f0de0SAdrian Chadd  * values.
783eb6f0de0SAdrian Chadd  *
784eb6f0de0SAdrian Chadd  * To support rate lookups for each software retry, the rts/cts rate
785eb6f0de0SAdrian Chadd  * and cts duration must be re-calculated.
786eb6f0de0SAdrian Chadd  *
787eb6f0de0SAdrian Chadd  * This function assumes the RTS/CTS flags have been set as needed;
788eb6f0de0SAdrian Chadd  * mrr has been disabled; and the rate control lookup has been done.
789eb6f0de0SAdrian Chadd  *
790eb6f0de0SAdrian Chadd  * XXX TODO: MRR need only be disabled for the pre-11n NICs.
791eb6f0de0SAdrian Chadd  * XXX The 11n NICs support per-rate RTS/CTS configuration.
792eb6f0de0SAdrian Chadd  */
793eb6f0de0SAdrian Chadd static void
794eb6f0de0SAdrian Chadd ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
795eb6f0de0SAdrian Chadd {
796eb6f0de0SAdrian Chadd 	uint16_t ctsduration = 0;
797eb6f0de0SAdrian Chadd 	uint8_t ctsrate = 0;
798eb6f0de0SAdrian Chadd 	uint8_t rix = bf->bf_state.bfs_rc[0].rix;
799eb6f0de0SAdrian Chadd 	uint8_t cix = 0;
800eb6f0de0SAdrian Chadd 	const HAL_RATE_TABLE *rt = sc->sc_currates;
801eb6f0de0SAdrian Chadd 
802eb6f0de0SAdrian Chadd 	/*
803eb6f0de0SAdrian Chadd 	 * No RTS/CTS enabled? Don't bother.
804eb6f0de0SAdrian Chadd 	 */
805eb6f0de0SAdrian Chadd 	if ((bf->bf_state.bfs_flags &
806eb6f0de0SAdrian Chadd 	    (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
807eb6f0de0SAdrian Chadd 		/* XXX is this really needed? */
808eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ctsrate = 0;
809eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ctsduration = 0;
810eb6f0de0SAdrian Chadd 		return;
811eb6f0de0SAdrian Chadd 	}
812eb6f0de0SAdrian Chadd 
813eb6f0de0SAdrian Chadd 	/*
814eb6f0de0SAdrian Chadd 	 * If protection is enabled, use the protection rix control
815eb6f0de0SAdrian Chadd 	 * rate. Otherwise use the rate0 control rate.
816eb6f0de0SAdrian Chadd 	 */
817eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_doprot)
818eb6f0de0SAdrian Chadd 		rix = sc->sc_protrix;
819eb6f0de0SAdrian Chadd 	else
820eb6f0de0SAdrian Chadd 		rix = bf->bf_state.bfs_rc[0].rix;
821eb6f0de0SAdrian Chadd 
822eb6f0de0SAdrian Chadd 	/*
823eb6f0de0SAdrian Chadd 	 * If the raw path has hard-coded ctsrate0 to something,
824eb6f0de0SAdrian Chadd 	 * use it.
825eb6f0de0SAdrian Chadd 	 */
826eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_ctsrate0 != 0)
827eb6f0de0SAdrian Chadd 		cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
828eb6f0de0SAdrian Chadd 	else
829eb6f0de0SAdrian Chadd 		/* Control rate from above */
830eb6f0de0SAdrian Chadd 		cix = rt->info[rix].controlRate;
831eb6f0de0SAdrian Chadd 
832eb6f0de0SAdrian Chadd 	/* Calculate the rtscts rate for the given cix */
833eb6f0de0SAdrian Chadd 	ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
834eb6f0de0SAdrian Chadd 	    bf->bf_state.bfs_shpream);
835eb6f0de0SAdrian Chadd 
836eb6f0de0SAdrian Chadd 	/* The 11n chipsets do ctsduration calculations for you */
837eb6f0de0SAdrian Chadd 	if (! ath_tx_is_11n(sc))
838eb6f0de0SAdrian Chadd 		ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
839eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
840eb6f0de0SAdrian Chadd 		    rt, bf->bf_state.bfs_flags);
841eb6f0de0SAdrian Chadd 
842eb6f0de0SAdrian Chadd 	/* Squirrel away in ath_buf */
843eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate = ctsrate;
844eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsduration = ctsduration;
845eb6f0de0SAdrian Chadd 
846eb6f0de0SAdrian Chadd 	/*
847eb6f0de0SAdrian Chadd 	 * Must disable multi-rate retry when using RTS/CTS.
848eb6f0de0SAdrian Chadd 	 * XXX TODO: only for pre-11n NICs.
849eb6f0de0SAdrian Chadd 	 */
850eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ismrr = 0;
851eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 =
852eb6f0de0SAdrian Chadd 	    bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY;	/* XXX ew */
853eb6f0de0SAdrian Chadd }
854eb6f0de0SAdrian Chadd 
855eb6f0de0SAdrian Chadd /*
856eb6f0de0SAdrian Chadd  * Setup the descriptor chain for a normal or fast-frame
857eb6f0de0SAdrian Chadd  * frame.
858eb6f0de0SAdrian Chadd  */
859eb6f0de0SAdrian Chadd static void
860eb6f0de0SAdrian Chadd ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
861eb6f0de0SAdrian Chadd {
862eb6f0de0SAdrian Chadd 	struct ath_desc *ds = bf->bf_desc;
863eb6f0de0SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
864eb6f0de0SAdrian Chadd 
865eb6f0de0SAdrian Chadd 	ath_hal_setuptxdesc(ah, ds
866eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_pktlen	/* packet length */
867eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_hdrlen	/* header length */
868eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_atype	/* Atheros packet type */
869eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_txpower	/* txpower */
870eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_txrate0
871eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_try0		/* series 0 rate/tries */
872eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_keyix	/* key cache index */
873eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_txantenna	/* antenna mode */
874eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_flags	/* flags */
875eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
876eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
877eb6f0de0SAdrian Chadd 	);
878eb6f0de0SAdrian Chadd 
879eb6f0de0SAdrian Chadd 	/*
880eb6f0de0SAdrian Chadd 	 * This will be overriden when the descriptor chain is written.
881eb6f0de0SAdrian Chadd 	 */
882eb6f0de0SAdrian Chadd 	bf->bf_lastds = ds;
883eb6f0de0SAdrian Chadd 	bf->bf_last = bf;
884eb6f0de0SAdrian Chadd 
885eb6f0de0SAdrian Chadd 	/* XXX TODO: Setup descriptor chain */
886eb6f0de0SAdrian Chadd }
887eb6f0de0SAdrian Chadd 
888eb6f0de0SAdrian Chadd /*
889eb6f0de0SAdrian Chadd  * Do a rate lookup.
890eb6f0de0SAdrian Chadd  *
891eb6f0de0SAdrian Chadd  * This performs a rate lookup for the given ath_buf only if it's required.
892eb6f0de0SAdrian Chadd  * Non-data frames and raw frames don't require it.
893eb6f0de0SAdrian Chadd  *
894eb6f0de0SAdrian Chadd  * This populates the primary and MRR entries; MRR values are
895eb6f0de0SAdrian Chadd  * then disabled later on if something requires it (eg RTS/CTS on
896eb6f0de0SAdrian Chadd  * pre-11n chipsets.
897eb6f0de0SAdrian Chadd  *
898eb6f0de0SAdrian Chadd  * This needs to be done before the RTS/CTS fields are calculated
899eb6f0de0SAdrian Chadd  * as they may depend upon the rate chosen.
900eb6f0de0SAdrian Chadd  */
901eb6f0de0SAdrian Chadd static void
902eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf)
903eb6f0de0SAdrian Chadd {
904eb6f0de0SAdrian Chadd 	uint8_t rate, rix;
905eb6f0de0SAdrian Chadd 	int try0;
906eb6f0de0SAdrian Chadd 
907eb6f0de0SAdrian Chadd 	if (! bf->bf_state.bfs_doratelookup)
908eb6f0de0SAdrian Chadd 		return;
909eb6f0de0SAdrian Chadd 
910eb6f0de0SAdrian Chadd 	/* Get rid of any previous state */
911eb6f0de0SAdrian Chadd 	bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
912eb6f0de0SAdrian Chadd 
913eb6f0de0SAdrian Chadd 	ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
914eb6f0de0SAdrian Chadd 	ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
915eb6f0de0SAdrian Chadd 	    bf->bf_state.bfs_pktlen, &rix, &try0, &rate);
916eb6f0de0SAdrian Chadd 
917eb6f0de0SAdrian Chadd 	/* In case MRR is disabled, make sure rc[0] is setup correctly */
918eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].rix = rix;
919eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].ratecode = rate;
920eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].tries = try0;
921eb6f0de0SAdrian Chadd 
922eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
923eb6f0de0SAdrian Chadd 		ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
924eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_rc);
925eb6f0de0SAdrian Chadd 	ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
926eb6f0de0SAdrian Chadd 
927eb6f0de0SAdrian Chadd 	sc->sc_txrix = rix;	/* for LED blinking */
928eb6f0de0SAdrian Chadd 	sc->sc_lastdatarix = rix;	/* for fast frames */
929eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 = try0;
930eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txrate0 = rate;
931eb6f0de0SAdrian Chadd }
932eb6f0de0SAdrian Chadd 
933eb6f0de0SAdrian Chadd /*
934eb6f0de0SAdrian Chadd  * Set the rate control fields in the given descriptor based on
935eb6f0de0SAdrian Chadd  * the bf_state fields and node state.
936eb6f0de0SAdrian Chadd  *
937eb6f0de0SAdrian Chadd  * The bfs fields should already be set with the relevant rate
938eb6f0de0SAdrian Chadd  * control information, including whether MRR is to be enabled.
939eb6f0de0SAdrian Chadd  *
940eb6f0de0SAdrian Chadd  * Since the FreeBSD HAL currently sets up the first TX rate
941eb6f0de0SAdrian Chadd  * in ath_hal_setuptxdesc(), this will setup the MRR
942eb6f0de0SAdrian Chadd  * conditionally for the pre-11n chips, and call ath_buf_set_rate
943eb6f0de0SAdrian Chadd  * unconditionally for 11n chips. These require the 11n rate
944eb6f0de0SAdrian Chadd  * scenario to be set if MCS rates are enabled, so it's easier
945eb6f0de0SAdrian Chadd  * to just always call it. The caller can then only set rates 2, 3
946eb6f0de0SAdrian Chadd  * and 4 if multi-rate retry is needed.
947eb6f0de0SAdrian Chadd  */
948eb6f0de0SAdrian Chadd static void
949eb6f0de0SAdrian Chadd ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
950eb6f0de0SAdrian Chadd     struct ath_buf *bf)
951eb6f0de0SAdrian Chadd {
952eb6f0de0SAdrian Chadd 	struct ath_rc_series *rc = bf->bf_state.bfs_rc;
953eb6f0de0SAdrian Chadd 
954eb6f0de0SAdrian Chadd 	/* If mrr is disabled, blank tries 1, 2, 3 */
955eb6f0de0SAdrian Chadd 	if (! bf->bf_state.bfs_ismrr)
956eb6f0de0SAdrian Chadd 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
957eb6f0de0SAdrian Chadd 
958eb6f0de0SAdrian Chadd 	/*
959eb6f0de0SAdrian Chadd 	 * Always call - that way a retried descriptor will
960eb6f0de0SAdrian Chadd 	 * have the MRR fields overwritten.
961eb6f0de0SAdrian Chadd 	 *
962eb6f0de0SAdrian Chadd 	 * XXX TODO: see if this is really needed - setting up
963eb6f0de0SAdrian Chadd 	 * the first descriptor should set the MRR fields to 0
964eb6f0de0SAdrian Chadd 	 * for us anyway.
965eb6f0de0SAdrian Chadd 	 */
966eb6f0de0SAdrian Chadd 	if (ath_tx_is_11n(sc)) {
967eb6f0de0SAdrian Chadd 		ath_buf_set_rate(sc, ni, bf);
968eb6f0de0SAdrian Chadd 	} else {
969eb6f0de0SAdrian Chadd 		ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
970eb6f0de0SAdrian Chadd 			, rc[1].ratecode, rc[1].tries
971eb6f0de0SAdrian Chadd 			, rc[2].ratecode, rc[2].tries
972eb6f0de0SAdrian Chadd 			, rc[3].ratecode, rc[3].tries
973eb6f0de0SAdrian Chadd 		);
974eb6f0de0SAdrian Chadd 	}
975eb6f0de0SAdrian Chadd }
976eb6f0de0SAdrian Chadd 
977eb6f0de0SAdrian Chadd /*
978eb6f0de0SAdrian Chadd  * Transmit the given frame to the hardware.
979eb6f0de0SAdrian Chadd  *
980eb6f0de0SAdrian Chadd  * The frame must already be setup; rate control must already have
981eb6f0de0SAdrian Chadd  * been done.
982eb6f0de0SAdrian Chadd  *
983eb6f0de0SAdrian Chadd  * XXX since the TXQ lock is being held here (and I dislike holding
984eb6f0de0SAdrian Chadd  * it for this long when not doing software aggregation), later on
985eb6f0de0SAdrian Chadd  * break this function into "setup_normal" and "xmit_normal". The
986eb6f0de0SAdrian Chadd  * lock only needs to be held for the ath_tx_handoff call.
987eb6f0de0SAdrian Chadd  */
988eb6f0de0SAdrian Chadd static void
989eb6f0de0SAdrian Chadd ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
990eb6f0de0SAdrian Chadd     struct ath_buf *bf)
991eb6f0de0SAdrian Chadd {
992eb6f0de0SAdrian Chadd 
993eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
994eb6f0de0SAdrian Chadd 
995eb6f0de0SAdrian Chadd 	/* Setup the descriptor before handoff */
996eb6f0de0SAdrian Chadd 	ath_tx_do_ratelookup(sc, bf);
997eb6f0de0SAdrian Chadd 	ath_tx_rate_fill_rcflags(sc, bf);
998eb6f0de0SAdrian Chadd 	ath_tx_set_rtscts(sc, bf);
999eb6f0de0SAdrian Chadd 	ath_tx_setds(sc, bf);
1000eb6f0de0SAdrian Chadd 	ath_tx_set_ratectrl(sc, bf->bf_node, bf);
1001eb6f0de0SAdrian Chadd 	ath_tx_chaindesclist(sc, bf);
1002eb6f0de0SAdrian Chadd 
1003eb6f0de0SAdrian Chadd 	/* Hand off to hardware */
1004eb6f0de0SAdrian Chadd 	ath_tx_handoff(sc, txq, bf);
1005eb6f0de0SAdrian Chadd }
1006eb6f0de0SAdrian Chadd 
1007eb6f0de0SAdrian Chadd 
1008eb6f0de0SAdrian Chadd 
1009eb6f0de0SAdrian Chadd static int
1010eb6f0de0SAdrian Chadd ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1011eb6f0de0SAdrian Chadd     struct ath_buf *bf, struct mbuf *m0)
1012b8e788a5SAdrian Chadd {
1013b8e788a5SAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
1014b8e788a5SAdrian Chadd 	struct ath_vap *avp = ATH_VAP(vap);
1015b8e788a5SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
1016b8e788a5SAdrian Chadd 	struct ifnet *ifp = sc->sc_ifp;
1017b8e788a5SAdrian Chadd 	struct ieee80211com *ic = ifp->if_l2com;
1018b8e788a5SAdrian Chadd 	const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
1019b8e788a5SAdrian Chadd 	int error, iswep, ismcast, isfrag, ismrr;
1020eb6f0de0SAdrian Chadd 	int keyix, hdrlen, pktlen, try0 = 0;
1021eb6f0de0SAdrian Chadd 	u_int8_t rix = 0, txrate = 0;
1022b8e788a5SAdrian Chadd 	struct ath_desc *ds;
1023b8e788a5SAdrian Chadd 	struct ath_txq *txq;
1024b8e788a5SAdrian Chadd 	struct ieee80211_frame *wh;
1025eb6f0de0SAdrian Chadd 	u_int subtype, flags;
1026b8e788a5SAdrian Chadd 	HAL_PKT_TYPE atype;
1027b8e788a5SAdrian Chadd 	const HAL_RATE_TABLE *rt;
1028b8e788a5SAdrian Chadd 	HAL_BOOL shortPreamble;
1029b8e788a5SAdrian Chadd 	struct ath_node *an;
1030b8e788a5SAdrian Chadd 	u_int pri;
1031b8e788a5SAdrian Chadd 
1032b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1033b8e788a5SAdrian Chadd 	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
1034b8e788a5SAdrian Chadd 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1035b8e788a5SAdrian Chadd 	isfrag = m0->m_flags & M_FRAG;
1036b8e788a5SAdrian Chadd 	hdrlen = ieee80211_anyhdrsize(wh);
1037b8e788a5SAdrian Chadd 	/*
1038b8e788a5SAdrian Chadd 	 * Packet length must not include any
1039b8e788a5SAdrian Chadd 	 * pad bytes; deduct them here.
1040b8e788a5SAdrian Chadd 	 */
1041b8e788a5SAdrian Chadd 	pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1042b8e788a5SAdrian Chadd 
104381a82688SAdrian Chadd 	/* Handle encryption twiddling if needed */
1044eb6f0de0SAdrian Chadd 	if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1045eb6f0de0SAdrian Chadd 	    &pktlen, &keyix)) {
1046b8e788a5SAdrian Chadd 		ath_freetx(m0);
1047b8e788a5SAdrian Chadd 		return EIO;
1048b8e788a5SAdrian Chadd 	}
1049b8e788a5SAdrian Chadd 
1050b8e788a5SAdrian Chadd 	/* packet header may have moved, reset our local pointer */
1051b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1052b8e788a5SAdrian Chadd 
1053b8e788a5SAdrian Chadd 	pktlen += IEEE80211_CRC_LEN;
1054b8e788a5SAdrian Chadd 
1055b8e788a5SAdrian Chadd 	/*
1056b8e788a5SAdrian Chadd 	 * Load the DMA map so any coalescing is done.  This
1057b8e788a5SAdrian Chadd 	 * also calculates the number of descriptors we need.
1058b8e788a5SAdrian Chadd 	 */
1059b8e788a5SAdrian Chadd 	error = ath_tx_dmasetup(sc, bf, m0);
1060b8e788a5SAdrian Chadd 	if (error != 0)
1061b8e788a5SAdrian Chadd 		return error;
1062b8e788a5SAdrian Chadd 	bf->bf_node = ni;			/* NB: held reference */
1063b8e788a5SAdrian Chadd 	m0 = bf->bf_m;				/* NB: may have changed */
1064b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1065b8e788a5SAdrian Chadd 
1066b8e788a5SAdrian Chadd 	/* setup descriptors */
1067b8e788a5SAdrian Chadd 	ds = bf->bf_desc;
1068b8e788a5SAdrian Chadd 	rt = sc->sc_currates;
1069b8e788a5SAdrian Chadd 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1070b8e788a5SAdrian Chadd 
1071b8e788a5SAdrian Chadd 	/*
1072b8e788a5SAdrian Chadd 	 * NB: the 802.11 layer marks whether or not we should
1073b8e788a5SAdrian Chadd 	 * use short preamble based on the current mode and
1074b8e788a5SAdrian Chadd 	 * negotiated parameters.
1075b8e788a5SAdrian Chadd 	 */
1076b8e788a5SAdrian Chadd 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1077b8e788a5SAdrian Chadd 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1078b8e788a5SAdrian Chadd 		shortPreamble = AH_TRUE;
1079b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_shortpre++;
1080b8e788a5SAdrian Chadd 	} else {
1081b8e788a5SAdrian Chadd 		shortPreamble = AH_FALSE;
1082b8e788a5SAdrian Chadd 	}
1083b8e788a5SAdrian Chadd 
1084b8e788a5SAdrian Chadd 	an = ATH_NODE(ni);
1085b8e788a5SAdrian Chadd 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
1086b8e788a5SAdrian Chadd 	ismrr = 0;				/* default no multi-rate retry*/
1087b8e788a5SAdrian Chadd 	pri = M_WME_GETAC(m0);			/* honor classification */
1088b8e788a5SAdrian Chadd 	/* XXX use txparams instead of fixed values */
1089b8e788a5SAdrian Chadd 	/*
1090b8e788a5SAdrian Chadd 	 * Calculate Atheros packet type from IEEE80211 packet header,
1091b8e788a5SAdrian Chadd 	 * setup for rate calculations, and select h/w transmit queue.
1092b8e788a5SAdrian Chadd 	 */
1093b8e788a5SAdrian Chadd 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1094b8e788a5SAdrian Chadd 	case IEEE80211_FC0_TYPE_MGT:
1095b8e788a5SAdrian Chadd 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1096b8e788a5SAdrian Chadd 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1097b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_BEACON;
1098b8e788a5SAdrian Chadd 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1099b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_PROBE_RESP;
1100b8e788a5SAdrian Chadd 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1101b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_ATIM;
1102b8e788a5SAdrian Chadd 		else
1103b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_NORMAL;	/* XXX */
1104b8e788a5SAdrian Chadd 		rix = an->an_mgmtrix;
1105b8e788a5SAdrian Chadd 		txrate = rt->info[rix].rateCode;
1106b8e788a5SAdrian Chadd 		if (shortPreamble)
1107b8e788a5SAdrian Chadd 			txrate |= rt->info[rix].shortPreamble;
1108b8e788a5SAdrian Chadd 		try0 = ATH_TXMGTTRY;
1109b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1110b8e788a5SAdrian Chadd 		break;
1111b8e788a5SAdrian Chadd 	case IEEE80211_FC0_TYPE_CTL:
1112b8e788a5SAdrian Chadd 		atype = HAL_PKT_TYPE_PSPOLL;	/* stop setting of duration */
1113b8e788a5SAdrian Chadd 		rix = an->an_mgmtrix;
1114b8e788a5SAdrian Chadd 		txrate = rt->info[rix].rateCode;
1115b8e788a5SAdrian Chadd 		if (shortPreamble)
1116b8e788a5SAdrian Chadd 			txrate |= rt->info[rix].shortPreamble;
1117b8e788a5SAdrian Chadd 		try0 = ATH_TXMGTTRY;
1118b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1119b8e788a5SAdrian Chadd 		break;
1120b8e788a5SAdrian Chadd 	case IEEE80211_FC0_TYPE_DATA:
1121b8e788a5SAdrian Chadd 		atype = HAL_PKT_TYPE_NORMAL;		/* default */
1122b8e788a5SAdrian Chadd 		/*
1123b8e788a5SAdrian Chadd 		 * Data frames: multicast frames go out at a fixed rate,
1124b8e788a5SAdrian Chadd 		 * EAPOL frames use the mgmt frame rate; otherwise consult
1125b8e788a5SAdrian Chadd 		 * the rate control module for the rate to use.
1126b8e788a5SAdrian Chadd 		 */
1127b8e788a5SAdrian Chadd 		if (ismcast) {
1128b8e788a5SAdrian Chadd 			rix = an->an_mcastrix;
1129b8e788a5SAdrian Chadd 			txrate = rt->info[rix].rateCode;
1130b8e788a5SAdrian Chadd 			if (shortPreamble)
1131b8e788a5SAdrian Chadd 				txrate |= rt->info[rix].shortPreamble;
1132b8e788a5SAdrian Chadd 			try0 = 1;
1133b8e788a5SAdrian Chadd 		} else if (m0->m_flags & M_EAPOL) {
1134b8e788a5SAdrian Chadd 			/* XXX? maybe always use long preamble? */
1135b8e788a5SAdrian Chadd 			rix = an->an_mgmtrix;
1136b8e788a5SAdrian Chadd 			txrate = rt->info[rix].rateCode;
1137b8e788a5SAdrian Chadd 			if (shortPreamble)
1138b8e788a5SAdrian Chadd 				txrate |= rt->info[rix].shortPreamble;
1139b8e788a5SAdrian Chadd 			try0 = ATH_TXMAXTRY;	/* XXX?too many? */
1140b8e788a5SAdrian Chadd 		} else {
1141eb6f0de0SAdrian Chadd 			/*
1142eb6f0de0SAdrian Chadd 			 * Do rate lookup on each TX, rather than using
1143eb6f0de0SAdrian Chadd 			 * the hard-coded TX information decided here.
1144eb6f0de0SAdrian Chadd 			 */
1145b8e788a5SAdrian Chadd 			ismrr = 1;
1146eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_doratelookup = 1;
1147b8e788a5SAdrian Chadd 		}
1148b8e788a5SAdrian Chadd 		if (cap->cap_wmeParams[pri].wmep_noackPolicy)
1149b8e788a5SAdrian Chadd 			flags |= HAL_TXDESC_NOACK;
1150b8e788a5SAdrian Chadd 		break;
1151b8e788a5SAdrian Chadd 	default:
1152b8e788a5SAdrian Chadd 		if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1153b8e788a5SAdrian Chadd 			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1154b8e788a5SAdrian Chadd 		/* XXX statistic */
1155b8e788a5SAdrian Chadd 		ath_freetx(m0);
1156b8e788a5SAdrian Chadd 		return EIO;
1157b8e788a5SAdrian Chadd 	}
1158b8e788a5SAdrian Chadd 	txq = sc->sc_ac2q[pri];
1159b8e788a5SAdrian Chadd 
1160b8e788a5SAdrian Chadd 	/*
1161b8e788a5SAdrian Chadd 	 * When servicing one or more stations in power-save mode
1162b8e788a5SAdrian Chadd 	 * (or) if there is some mcast data waiting on the mcast
1163b8e788a5SAdrian Chadd 	 * queue (to prevent out of order delivery) multicast
1164b8e788a5SAdrian Chadd 	 * frames must be buffered until after the beacon.
1165*c5940c30SAdrian Chadd 	 *
1166*c5940c30SAdrian Chadd 	 * XXX This likely means that if there's a station in power
1167*c5940c30SAdrian Chadd 	 * save mode, we won't be doing any kind of aggregation towards
1168*c5940c30SAdrian Chadd 	 * anyone.  This is likely a very suboptimal way of dealing
1169*c5940c30SAdrian Chadd 	 * with things.
1170b8e788a5SAdrian Chadd 	 */
1171b8e788a5SAdrian Chadd 	if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth))
1172b8e788a5SAdrian Chadd 		txq = &avp->av_mcastq;
1173b8e788a5SAdrian Chadd 
1174b8e788a5SAdrian Chadd 	/*
1175b8e788a5SAdrian Chadd 	 * Calculate miscellaneous flags.
1176b8e788a5SAdrian Chadd 	 */
1177b8e788a5SAdrian Chadd 	if (ismcast) {
1178b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
1179b8e788a5SAdrian Chadd 	} else if (pktlen > vap->iv_rtsthreshold &&
1180b8e788a5SAdrian Chadd 	    (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1181b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
1182b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_rts++;
1183b8e788a5SAdrian Chadd 	}
1184b8e788a5SAdrian Chadd 	if (flags & HAL_TXDESC_NOACK)		/* NB: avoid double counting */
1185b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_noack++;
1186b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
1187b8e788a5SAdrian Chadd 	if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1188b8e788a5SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_TDMA,
1189b8e788a5SAdrian Chadd 		    "%s: discard frame, ACK required w/ TDMA\n", __func__);
1190b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tdma_ack++;
1191b8e788a5SAdrian Chadd 		ath_freetx(m0);
1192b8e788a5SAdrian Chadd 		return EIO;
1193b8e788a5SAdrian Chadd 	}
1194b8e788a5SAdrian Chadd #endif
1195b8e788a5SAdrian Chadd 
1196b8e788a5SAdrian Chadd 	/*
1197b8e788a5SAdrian Chadd 	 * If 802.11g protection is enabled, determine whether
1198b8e788a5SAdrian Chadd 	 * to use RTS/CTS or just CTS.  Note that this is only
1199b8e788a5SAdrian Chadd 	 * done for OFDM unicast frames.
1200b8e788a5SAdrian Chadd 	 */
1201b8e788a5SAdrian Chadd 	if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1202b8e788a5SAdrian Chadd 	    rt->info[rix].phy == IEEE80211_T_OFDM &&
1203b8e788a5SAdrian Chadd 	    (flags & HAL_TXDESC_NOACK) == 0) {
1204eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_doprot = 1;
1205b8e788a5SAdrian Chadd 		/* XXX fragments must use CCK rates w/ protection */
1206eb6f0de0SAdrian Chadd 		if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
1207b8e788a5SAdrian Chadd 			flags |= HAL_TXDESC_RTSENA;
1208eb6f0de0SAdrian Chadd 		} else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
1209b8e788a5SAdrian Chadd 			flags |= HAL_TXDESC_CTSENA;
1210eb6f0de0SAdrian Chadd 		}
1211b8e788a5SAdrian Chadd 		/*
1212b8e788a5SAdrian Chadd 		 * For frags it would be desirable to use the
1213b8e788a5SAdrian Chadd 		 * highest CCK rate for RTS/CTS.  But stations
1214b8e788a5SAdrian Chadd 		 * farther away may detect it at a lower CCK rate
1215b8e788a5SAdrian Chadd 		 * so use the configured protection rate instead
1216b8e788a5SAdrian Chadd 		 * (for now).
1217b8e788a5SAdrian Chadd 		 */
1218b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_protect++;
1219b8e788a5SAdrian Chadd 	}
1220b8e788a5SAdrian Chadd 
12214f545a2cSAdrian Chadd #if 0
12224f545a2cSAdrian Chadd 	/*
12234f545a2cSAdrian Chadd 	 * If 11n protection is enabled and it's a HT frame,
12244f545a2cSAdrian Chadd 	 * enable RTS.
12254f545a2cSAdrian Chadd 	 *
12264f545a2cSAdrian Chadd 	 * XXX ic_htprotmode or ic_curhtprotmode?
12274f545a2cSAdrian Chadd 	 * XXX should it_htprotmode only matter if ic_curhtprotmode
12284f545a2cSAdrian Chadd 	 * XXX indicates it's not a HT pure environment?
12294f545a2cSAdrian Chadd 	 */
12304f545a2cSAdrian Chadd 	if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
12314f545a2cSAdrian Chadd 	    rt->info[rix].phy == IEEE80211_T_HT &&
12324f545a2cSAdrian Chadd 	    (flags & HAL_TXDESC_NOACK) == 0) {
12334f545a2cSAdrian Chadd 		cix = rt->info[sc->sc_protrix].controlRate;
12344f545a2cSAdrian Chadd 	    	flags |= HAL_TXDESC_RTSENA;
12354f545a2cSAdrian Chadd 		sc->sc_stats.ast_tx_htprotect++;
12364f545a2cSAdrian Chadd 	}
12374f545a2cSAdrian Chadd #endif
12384f545a2cSAdrian Chadd 
1239b8e788a5SAdrian Chadd 	/*
1240b8e788a5SAdrian Chadd 	 * Calculate duration.  This logically belongs in the 802.11
1241b8e788a5SAdrian Chadd 	 * layer but it lacks sufficient information to calculate it.
1242b8e788a5SAdrian Chadd 	 */
1243b8e788a5SAdrian Chadd 	if ((flags & HAL_TXDESC_NOACK) == 0 &&
1244b8e788a5SAdrian Chadd 	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
1245b8e788a5SAdrian Chadd 		u_int16_t dur;
1246b8e788a5SAdrian Chadd 		if (shortPreamble)
1247b8e788a5SAdrian Chadd 			dur = rt->info[rix].spAckDuration;
1248b8e788a5SAdrian Chadd 		else
1249b8e788a5SAdrian Chadd 			dur = rt->info[rix].lpAckDuration;
1250b8e788a5SAdrian Chadd 		if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1251b8e788a5SAdrian Chadd 			dur += dur;		/* additional SIFS+ACK */
1252b8e788a5SAdrian Chadd 			KASSERT(m0->m_nextpkt != NULL, ("no fragment"));
1253b8e788a5SAdrian Chadd 			/*
1254b8e788a5SAdrian Chadd 			 * Include the size of next fragment so NAV is
1255b8e788a5SAdrian Chadd 			 * updated properly.  The last fragment uses only
1256b8e788a5SAdrian Chadd 			 * the ACK duration
1257b8e788a5SAdrian Chadd 			 */
1258b8e788a5SAdrian Chadd 			dur += ath_hal_computetxtime(ah, rt,
1259b8e788a5SAdrian Chadd 					m0->m_nextpkt->m_pkthdr.len,
1260b8e788a5SAdrian Chadd 					rix, shortPreamble);
1261b8e788a5SAdrian Chadd 		}
1262b8e788a5SAdrian Chadd 		if (isfrag) {
1263b8e788a5SAdrian Chadd 			/*
1264b8e788a5SAdrian Chadd 			 * Force hardware to use computed duration for next
1265b8e788a5SAdrian Chadd 			 * fragment by disabling multi-rate retry which updates
1266b8e788a5SAdrian Chadd 			 * duration based on the multi-rate duration table.
1267b8e788a5SAdrian Chadd 			 */
1268b8e788a5SAdrian Chadd 			ismrr = 0;
1269b8e788a5SAdrian Chadd 			try0 = ATH_TXMGTTRY;	/* XXX? */
1270b8e788a5SAdrian Chadd 		}
1271b8e788a5SAdrian Chadd 		*(u_int16_t *)wh->i_dur = htole16(dur);
1272b8e788a5SAdrian Chadd 	}
1273b8e788a5SAdrian Chadd 
1274b8e788a5SAdrian Chadd 	/*
1275eb6f0de0SAdrian Chadd 	 * Determine if a tx interrupt should be generated for
1276eb6f0de0SAdrian Chadd 	 * this descriptor.  We take a tx interrupt to reap
1277eb6f0de0SAdrian Chadd 	 * descriptors when the h/w hits an EOL condition or
1278eb6f0de0SAdrian Chadd 	 * when the descriptor is specifically marked to generate
1279eb6f0de0SAdrian Chadd 	 * an interrupt.  We periodically mark descriptors in this
1280eb6f0de0SAdrian Chadd 	 * way to insure timely replenishing of the supply needed
1281eb6f0de0SAdrian Chadd 	 * for sending frames.  Defering interrupts reduces system
1282eb6f0de0SAdrian Chadd 	 * load and potentially allows more concurrent work to be
1283eb6f0de0SAdrian Chadd 	 * done but if done to aggressively can cause senders to
1284eb6f0de0SAdrian Chadd 	 * backup.
1285eb6f0de0SAdrian Chadd 	 *
1286eb6f0de0SAdrian Chadd 	 * NB: use >= to deal with sc_txintrperiod changing
1287eb6f0de0SAdrian Chadd 	 *     dynamically through sysctl.
1288b8e788a5SAdrian Chadd 	 */
1289eb6f0de0SAdrian Chadd 	if (flags & HAL_TXDESC_INTREQ) {
1290eb6f0de0SAdrian Chadd 		txq->axq_intrcnt = 0;
1291eb6f0de0SAdrian Chadd 	} else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1292eb6f0de0SAdrian Chadd 		flags |= HAL_TXDESC_INTREQ;
1293eb6f0de0SAdrian Chadd 		txq->axq_intrcnt = 0;
1294eb6f0de0SAdrian Chadd 	}
1295e42b5dbaSAdrian Chadd 
1296eb6f0de0SAdrian Chadd 	/* This point forward is actual TX bits */
1297b8e788a5SAdrian Chadd 
1298b8e788a5SAdrian Chadd 	/*
1299b8e788a5SAdrian Chadd 	 * At this point we are committed to sending the frame
1300b8e788a5SAdrian Chadd 	 * and we don't need to look at m_nextpkt; clear it in
1301b8e788a5SAdrian Chadd 	 * case this frame is part of frag chain.
1302b8e788a5SAdrian Chadd 	 */
1303b8e788a5SAdrian Chadd 	m0->m_nextpkt = NULL;
1304b8e788a5SAdrian Chadd 
1305b8e788a5SAdrian Chadd 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1306b8e788a5SAdrian Chadd 		ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1307b8e788a5SAdrian Chadd 		    sc->sc_hwmap[rix].ieeerate, -1);
1308b8e788a5SAdrian Chadd 
1309b8e788a5SAdrian Chadd 	if (ieee80211_radiotap_active_vap(vap)) {
1310b8e788a5SAdrian Chadd 		u_int64_t tsf = ath_hal_gettsf64(ah);
1311b8e788a5SAdrian Chadd 
1312b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_tsf = htole64(tsf);
1313b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1314b8e788a5SAdrian Chadd 		if (iswep)
1315b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1316b8e788a5SAdrian Chadd 		if (isfrag)
1317b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1318b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1319b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_txpower = ni->ni_txpower;
1320b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1321b8e788a5SAdrian Chadd 
1322b8e788a5SAdrian Chadd 		ieee80211_radiotap_tx(vap, m0);
1323b8e788a5SAdrian Chadd 	}
1324b8e788a5SAdrian Chadd 
1325eb6f0de0SAdrian Chadd 	/* Blank the legacy rate array */
1326eb6f0de0SAdrian Chadd 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1327c1782ce0SAdrian Chadd 
1328b8e788a5SAdrian Chadd 	/*
1329eb6f0de0SAdrian Chadd 	 * ath_buf_set_rate needs at least one rate/try to setup
1330eb6f0de0SAdrian Chadd 	 * the rate scenario.
1331b8e788a5SAdrian Chadd 	 */
1332eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].rix = rix;
1333eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].tries = try0;
1334eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].ratecode = txrate;
1335eb6f0de0SAdrian Chadd 
1336eb6f0de0SAdrian Chadd 	/* Store the decided rate index values away */
1337eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_pktlen = pktlen;
1338eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_hdrlen = hdrlen;
1339eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_atype = atype;
1340eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txpower = ni->ni_txpower;
1341eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txrate0 = txrate;
1342eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 = try0;
1343eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_keyix = keyix;
1344eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1345eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_flags = flags;
1346b8e788a5SAdrian Chadd 	bf->bf_txflags = flags;
1347eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_shpream = shortPreamble;
1348eb6f0de0SAdrian Chadd 
1349eb6f0de0SAdrian Chadd 	/* XXX this should be done in ath_tx_setrate() */
1350eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate0 = 0;	/* ie, no hard-coded ctsrate */
1351eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate = 0;	/* calculated later */
1352eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsduration = 0;
1353eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ismrr = ismrr;
1354eb6f0de0SAdrian Chadd 
1355eb6f0de0SAdrian Chadd 	return 0;
1356eb6f0de0SAdrian Chadd }
1357eb6f0de0SAdrian Chadd 
1358b8e788a5SAdrian Chadd /*
1359eb6f0de0SAdrian Chadd  * Direct-dispatch the current frame to the hardware.
1360eb6f0de0SAdrian Chadd  *
1361eb6f0de0SAdrian Chadd  * This can be called by the net80211 code.
1362eb6f0de0SAdrian Chadd  *
1363eb6f0de0SAdrian Chadd  * XXX what about locking? Or, push the seqno assign into the
1364eb6f0de0SAdrian Chadd  * XXX aggregate scheduler so its serialised?
1365b8e788a5SAdrian Chadd  */
1366eb6f0de0SAdrian Chadd int
1367eb6f0de0SAdrian Chadd ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1368eb6f0de0SAdrian Chadd     struct ath_buf *bf, struct mbuf *m0)
1369eb6f0de0SAdrian Chadd {
1370eb6f0de0SAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
1371eb6f0de0SAdrian Chadd 	struct ath_vap *avp = ATH_VAP(vap);
1372eb6f0de0SAdrian Chadd 	int r;
1373eb6f0de0SAdrian Chadd 	u_int pri;
1374eb6f0de0SAdrian Chadd 	int tid;
1375eb6f0de0SAdrian Chadd 	struct ath_txq *txq;
1376eb6f0de0SAdrian Chadd 	int ismcast;
1377eb6f0de0SAdrian Chadd 	const struct ieee80211_frame *wh;
1378eb6f0de0SAdrian Chadd 	int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1379eb6f0de0SAdrian Chadd 	ieee80211_seq seqno;
1380eb6f0de0SAdrian Chadd 	uint8_t type, subtype;
1381eb6f0de0SAdrian Chadd 
1382eb6f0de0SAdrian Chadd 	/*
1383eb6f0de0SAdrian Chadd 	 * Determine the target hardware queue.
1384eb6f0de0SAdrian Chadd 	 *
1385eb6f0de0SAdrian Chadd 	 * For multicast frames, the txq gets overridden to be the
1386eb6f0de0SAdrian Chadd 	 * software TXQ and it's done via direct-dispatch.
1387eb6f0de0SAdrian Chadd 	 *
1388eb6f0de0SAdrian Chadd 	 * For any other frame, we do a TID/QoS lookup inside the frame
1389eb6f0de0SAdrian Chadd 	 * to see what the TID should be. If it's a non-QoS frame, the
1390eb6f0de0SAdrian Chadd 	 * AC and TID are overridden. The TID/TXQ code assumes the
1391eb6f0de0SAdrian Chadd 	 * TID is on a predictable hardware TXQ, so we don't support
1392eb6f0de0SAdrian Chadd 	 * having a node TID queued to multiple hardware TXQs.
1393eb6f0de0SAdrian Chadd 	 * This may change in the future but would require some locking
1394eb6f0de0SAdrian Chadd 	 * fudgery.
1395eb6f0de0SAdrian Chadd 	 */
1396eb6f0de0SAdrian Chadd 	pri = ath_tx_getac(sc, m0);
1397eb6f0de0SAdrian Chadd 	tid = ath_tx_gettid(sc, m0);
1398eb6f0de0SAdrian Chadd 
1399eb6f0de0SAdrian Chadd 	txq = sc->sc_ac2q[pri];
1400eb6f0de0SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1401eb6f0de0SAdrian Chadd 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1402eb6f0de0SAdrian Chadd 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1403eb6f0de0SAdrian Chadd 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1404eb6f0de0SAdrian Chadd 
1405eb6f0de0SAdrian Chadd 	/* A-MPDU TX */
1406eb6f0de0SAdrian Chadd 	is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1407eb6f0de0SAdrian Chadd 	is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1408eb6f0de0SAdrian Chadd 	is_ampdu = is_ampdu_tx | is_ampdu_pending;
1409eb6f0de0SAdrian Chadd 
1410eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
1411eb6f0de0SAdrian Chadd 	    __func__, tid, pri, is_ampdu);
1412eb6f0de0SAdrian Chadd 
1413eb6f0de0SAdrian Chadd 	/* Multicast frames go onto the software multicast queue */
1414eb6f0de0SAdrian Chadd 	if (ismcast)
1415eb6f0de0SAdrian Chadd 		txq = &avp->av_mcastq;
1416eb6f0de0SAdrian Chadd 
1417*c5940c30SAdrian Chadd 	/*
1418*c5940c30SAdrian Chadd 	 * XXX This likely means that if there's a station in power
1419*c5940c30SAdrian Chadd 	 * save mode, we won't be doing any kind of aggregation towards
1420*c5940c30SAdrian Chadd 	 * anyone.  This is likely a very suboptimal way of dealing
1421*c5940c30SAdrian Chadd 	 * with things.
1422*c5940c30SAdrian Chadd 	 */
1423eb6f0de0SAdrian Chadd 	if ((! is_ampdu) && (vap->iv_ps_sta || avp->av_mcastq.axq_depth))
1424eb6f0de0SAdrian Chadd 		txq = &avp->av_mcastq;
1425eb6f0de0SAdrian Chadd 
1426eb6f0de0SAdrian Chadd 	/* Do the generic frame setup */
1427eb6f0de0SAdrian Chadd 	/* XXX should just bzero the bf_state? */
1428eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_dobaw = 0;
1429eb6f0de0SAdrian Chadd 
1430eb6f0de0SAdrian Chadd 	/* A-MPDU TX? Manually set sequence number */
1431eb6f0de0SAdrian Chadd 	/* Don't do it whilst pending; the net80211 layer still assigns them */
1432eb6f0de0SAdrian Chadd 	/* XXX do we need locking here? */
1433eb6f0de0SAdrian Chadd 	if (is_ampdu_tx) {
1434eb6f0de0SAdrian Chadd 		ATH_TXQ_LOCK(txq);
1435eb6f0de0SAdrian Chadd 		/*
1436eb6f0de0SAdrian Chadd 		 * Always call; this function will
1437eb6f0de0SAdrian Chadd 		 * handle making sure that null data frames
1438eb6f0de0SAdrian Chadd 		 * don't get a sequence number from the current
1439eb6f0de0SAdrian Chadd 		 * TID and thus mess with the BAW.
1440eb6f0de0SAdrian Chadd 		 */
1441eb6f0de0SAdrian Chadd 		seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
1442eb6f0de0SAdrian Chadd 		if (IEEE80211_QOS_HAS_SEQ(wh) &&
1443eb6f0de0SAdrian Chadd 		    subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) {
1444eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 1;
1445eb6f0de0SAdrian Chadd 		}
1446eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(txq);
1447c1782ce0SAdrian Chadd 	}
1448c1782ce0SAdrian Chadd 
1449eb6f0de0SAdrian Chadd 	/*
1450eb6f0de0SAdrian Chadd 	 * If needed, the sequence number has been assigned.
1451eb6f0de0SAdrian Chadd 	 * Squirrel it away somewhere easy to get to.
1452eb6f0de0SAdrian Chadd 	 */
1453eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
1454b8e788a5SAdrian Chadd 
1455eb6f0de0SAdrian Chadd 	/* Is ampdu pending? fetch the seqno and print it out */
1456eb6f0de0SAdrian Chadd 	if (is_ampdu_pending)
1457eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1458eb6f0de0SAdrian Chadd 		    "%s: tid %d: ampdu pending, seqno %d\n",
1459eb6f0de0SAdrian Chadd 		    __func__, tid, M_SEQNO_GET(m0));
1460eb6f0de0SAdrian Chadd 
1461eb6f0de0SAdrian Chadd 	/* This also sets up the DMA map */
1462eb6f0de0SAdrian Chadd 	r = ath_tx_normal_setup(sc, ni, bf, m0);
1463eb6f0de0SAdrian Chadd 
1464eb6f0de0SAdrian Chadd 	if (r != 0)
1465eb6f0de0SAdrian Chadd 		return r;
1466eb6f0de0SAdrian Chadd 
1467eb6f0de0SAdrian Chadd 	/* At this point m0 could have changed! */
1468eb6f0de0SAdrian Chadd 	m0 = bf->bf_m;
1469eb6f0de0SAdrian Chadd 
1470eb6f0de0SAdrian Chadd #if 1
1471eb6f0de0SAdrian Chadd 	/*
1472eb6f0de0SAdrian Chadd 	 * If it's a multicast frame, do a direct-dispatch to the
1473eb6f0de0SAdrian Chadd 	 * destination hardware queue. Don't bother software
1474eb6f0de0SAdrian Chadd 	 * queuing it.
1475eb6f0de0SAdrian Chadd 	 */
1476eb6f0de0SAdrian Chadd 	/*
1477eb6f0de0SAdrian Chadd 	 * If it's a BAR frame, do a direct dispatch to the
1478eb6f0de0SAdrian Chadd 	 * destination hardware queue. Don't bother software
1479eb6f0de0SAdrian Chadd 	 * queuing it, as the TID will now be paused.
1480eb6f0de0SAdrian Chadd 	 * Sending a BAR frame can occur from the net80211 txa timer
1481eb6f0de0SAdrian Chadd 	 * (ie, retries) or from the ath txtask (completion call.)
1482eb6f0de0SAdrian Chadd 	 * It queues directly to hardware because the TID is paused
1483eb6f0de0SAdrian Chadd 	 * at this point (and won't be unpaused until the BAR has
1484eb6f0de0SAdrian Chadd 	 * either been TXed successfully or max retries has been
1485eb6f0de0SAdrian Chadd 	 * reached.)
1486eb6f0de0SAdrian Chadd 	 */
1487eb6f0de0SAdrian Chadd 	if (txq == &avp->av_mcastq) {
1488eb6f0de0SAdrian Chadd 		ATH_TXQ_LOCK(txq);
1489eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, txq, bf);
1490eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(txq);
1491eb6f0de0SAdrian Chadd 	} else if (type == IEEE80211_FC0_TYPE_CTL &&
1492eb6f0de0SAdrian Chadd 		    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1493eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
1494eb6f0de0SAdrian Chadd 		    "%s: BAR: TX'ing direct\n", __func__);
1495eb6f0de0SAdrian Chadd 		ATH_TXQ_LOCK(txq);
1496eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, txq, bf);
1497eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(txq);
1498eb6f0de0SAdrian Chadd 	} else {
1499eb6f0de0SAdrian Chadd 		/* add to software queue */
1500eb6f0de0SAdrian Chadd 		ath_tx_swq(sc, ni, txq, bf);
1501eb6f0de0SAdrian Chadd 	}
1502eb6f0de0SAdrian Chadd #else
1503eb6f0de0SAdrian Chadd 	/*
1504eb6f0de0SAdrian Chadd 	 * For now, since there's no software queue,
1505eb6f0de0SAdrian Chadd 	 * direct-dispatch to the hardware.
1506eb6f0de0SAdrian Chadd 	 */
1507eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(txq);
1508eb6f0de0SAdrian Chadd 	ath_tx_xmit_normal(sc, txq, bf);
1509eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(txq);
1510eb6f0de0SAdrian Chadd #endif
1511eb6f0de0SAdrian Chadd 
1512b8e788a5SAdrian Chadd 	return 0;
1513b8e788a5SAdrian Chadd }
1514b8e788a5SAdrian Chadd 
1515b8e788a5SAdrian Chadd static int
1516b8e788a5SAdrian Chadd ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
1517b8e788a5SAdrian Chadd 	struct ath_buf *bf, struct mbuf *m0,
1518b8e788a5SAdrian Chadd 	const struct ieee80211_bpf_params *params)
1519b8e788a5SAdrian Chadd {
1520b8e788a5SAdrian Chadd 	struct ifnet *ifp = sc->sc_ifp;
1521b8e788a5SAdrian Chadd 	struct ieee80211com *ic = ifp->if_l2com;
1522b8e788a5SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
1523b8e788a5SAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
1524b8e788a5SAdrian Chadd 	int error, ismcast, ismrr;
1525b8e788a5SAdrian Chadd 	int keyix, hdrlen, pktlen, try0, txantenna;
1526eb6f0de0SAdrian Chadd 	u_int8_t rix, txrate;
1527b8e788a5SAdrian Chadd 	struct ieee80211_frame *wh;
1528eb6f0de0SAdrian Chadd 	u_int flags;
1529b8e788a5SAdrian Chadd 	HAL_PKT_TYPE atype;
1530b8e788a5SAdrian Chadd 	const HAL_RATE_TABLE *rt;
1531b8e788a5SAdrian Chadd 	struct ath_desc *ds;
1532b8e788a5SAdrian Chadd 	u_int pri;
1533eb6f0de0SAdrian Chadd 	int o_tid = -1;
1534eb6f0de0SAdrian Chadd 	int do_override;
1535b8e788a5SAdrian Chadd 
1536b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1537b8e788a5SAdrian Chadd 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1538b8e788a5SAdrian Chadd 	hdrlen = ieee80211_anyhdrsize(wh);
1539b8e788a5SAdrian Chadd 	/*
1540b8e788a5SAdrian Chadd 	 * Packet length must not include any
1541b8e788a5SAdrian Chadd 	 * pad bytes; deduct them here.
1542b8e788a5SAdrian Chadd 	 */
1543b8e788a5SAdrian Chadd 	/* XXX honor IEEE80211_BPF_DATAPAD */
1544b8e788a5SAdrian Chadd 	pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
1545b8e788a5SAdrian Chadd 
1546eb6f0de0SAdrian Chadd 
1547eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
1548eb6f0de0SAdrian Chadd 	    __func__, ismcast);
1549eb6f0de0SAdrian Chadd 
155081a82688SAdrian Chadd 	/* Handle encryption twiddling if needed */
1551eb6f0de0SAdrian Chadd 	if (! ath_tx_tag_crypto(sc, ni,
1552eb6f0de0SAdrian Chadd 	    m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
1553eb6f0de0SAdrian Chadd 	    &hdrlen, &pktlen, &keyix)) {
1554b8e788a5SAdrian Chadd 		ath_freetx(m0);
1555b8e788a5SAdrian Chadd 		return EIO;
1556b8e788a5SAdrian Chadd 	}
1557b8e788a5SAdrian Chadd 	/* packet header may have moved, reset our local pointer */
1558b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1559b8e788a5SAdrian Chadd 
1560eb6f0de0SAdrian Chadd 	/* Do the generic frame setup */
1561eb6f0de0SAdrian Chadd 	/* XXX should just bzero the bf_state? */
1562eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_dobaw = 0;
1563eb6f0de0SAdrian Chadd 
1564b8e788a5SAdrian Chadd 	error = ath_tx_dmasetup(sc, bf, m0);
1565b8e788a5SAdrian Chadd 	if (error != 0)
1566b8e788a5SAdrian Chadd 		return error;
1567b8e788a5SAdrian Chadd 	m0 = bf->bf_m;				/* NB: may have changed */
1568b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1569b8e788a5SAdrian Chadd 	bf->bf_node = ni;			/* NB: held reference */
1570b8e788a5SAdrian Chadd 
1571b8e788a5SAdrian Chadd 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
1572b8e788a5SAdrian Chadd 	flags |= HAL_TXDESC_INTREQ;		/* force interrupt */
1573b8e788a5SAdrian Chadd 	if (params->ibp_flags & IEEE80211_BPF_RTS)
1574b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_RTSENA;
1575eb6f0de0SAdrian Chadd 	else if (params->ibp_flags & IEEE80211_BPF_CTS) {
1576eb6f0de0SAdrian Chadd 		/* XXX assume 11g/11n protection? */
1577eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_doprot = 1;
1578b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_CTSENA;
1579eb6f0de0SAdrian Chadd 	}
1580b8e788a5SAdrian Chadd 	/* XXX leave ismcast to injector? */
1581b8e788a5SAdrian Chadd 	if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
1582b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_NOACK;
1583b8e788a5SAdrian Chadd 
1584b8e788a5SAdrian Chadd 	rt = sc->sc_currates;
1585b8e788a5SAdrian Chadd 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1586b8e788a5SAdrian Chadd 	rix = ath_tx_findrix(sc, params->ibp_rate0);
1587b8e788a5SAdrian Chadd 	txrate = rt->info[rix].rateCode;
1588b8e788a5SAdrian Chadd 	if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
1589b8e788a5SAdrian Chadd 		txrate |= rt->info[rix].shortPreamble;
1590b8e788a5SAdrian Chadd 	sc->sc_txrix = rix;
1591b8e788a5SAdrian Chadd 	try0 = params->ibp_try0;
1592b8e788a5SAdrian Chadd 	ismrr = (params->ibp_try1 != 0);
1593b8e788a5SAdrian Chadd 	txantenna = params->ibp_pri >> 2;
1594b8e788a5SAdrian Chadd 	if (txantenna == 0)			/* XXX? */
1595b8e788a5SAdrian Chadd 		txantenna = sc->sc_txantenna;
159679f02dbfSAdrian Chadd 
159779f02dbfSAdrian Chadd 	/*
1598eb6f0de0SAdrian Chadd 	 * Since ctsrate is fixed, store it away for later
1599eb6f0de0SAdrian Chadd 	 * use when the descriptor fields are being set.
160079f02dbfSAdrian Chadd 	 */
1601eb6f0de0SAdrian Chadd 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
1602eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
160379f02dbfSAdrian Chadd 
1604b8e788a5SAdrian Chadd 	pri = params->ibp_pri & 3;
1605eb6f0de0SAdrian Chadd 	/* Override pri if the frame isn't a QoS one */
1606eb6f0de0SAdrian Chadd 	if (! IEEE80211_QOS_HAS_SEQ(wh))
1607eb6f0de0SAdrian Chadd 		pri = ath_tx_getac(sc, m0);
1608eb6f0de0SAdrian Chadd 
1609b8e788a5SAdrian Chadd 	/*
1610b8e788a5SAdrian Chadd 	 * NB: we mark all packets as type PSPOLL so the h/w won't
1611b8e788a5SAdrian Chadd 	 * set the sequence number, duration, etc.
1612b8e788a5SAdrian Chadd 	 */
1613b8e788a5SAdrian Chadd 	atype = HAL_PKT_TYPE_PSPOLL;
1614b8e788a5SAdrian Chadd 
1615b8e788a5SAdrian Chadd 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1616b8e788a5SAdrian Chadd 		ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
1617b8e788a5SAdrian Chadd 		    sc->sc_hwmap[rix].ieeerate, -1);
1618b8e788a5SAdrian Chadd 
1619b8e788a5SAdrian Chadd 	if (ieee80211_radiotap_active_vap(vap)) {
1620b8e788a5SAdrian Chadd 		u_int64_t tsf = ath_hal_gettsf64(ah);
1621b8e788a5SAdrian Chadd 
1622b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_tsf = htole64(tsf);
1623b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1624b8e788a5SAdrian Chadd 		if (wh->i_fc[1] & IEEE80211_FC1_WEP)
1625b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1626b8e788a5SAdrian Chadd 		if (m0->m_flags & M_FRAG)
1627b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1628b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1629b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_txpower = ni->ni_txpower;
1630b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1631b8e788a5SAdrian Chadd 
1632b8e788a5SAdrian Chadd 		ieee80211_radiotap_tx(vap, m0);
1633b8e788a5SAdrian Chadd 	}
1634b8e788a5SAdrian Chadd 
1635b8e788a5SAdrian Chadd 	/*
1636b8e788a5SAdrian Chadd 	 * Formulate first tx descriptor with tx controls.
1637b8e788a5SAdrian Chadd 	 */
1638b8e788a5SAdrian Chadd 	ds = bf->bf_desc;
1639b8e788a5SAdrian Chadd 	/* XXX check return value? */
1640eb6f0de0SAdrian Chadd 
1641eb6f0de0SAdrian Chadd 	/* Store the decided rate index values away */
1642eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_pktlen = pktlen;
1643eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_hdrlen = hdrlen;
1644eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_atype = atype;
1645eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txpower = params->ibp_power;
1646eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txrate0 = txrate;
1647eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 = try0;
1648eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_keyix = keyix;
1649eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txantenna = txantenna;
1650eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_flags = flags;
1651b8e788a5SAdrian Chadd 	bf->bf_txflags = flags;
1652eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_shpream =
1653eb6f0de0SAdrian Chadd 	    !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
1654b8e788a5SAdrian Chadd 
1655eb6f0de0SAdrian Chadd 	/* XXX this should be done in ath_tx_setrate() */
1656eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate = 0;
1657eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsduration = 0;
1658eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ismrr = ismrr;
1659eb6f0de0SAdrian Chadd 
1660eb6f0de0SAdrian Chadd 	/* Blank the legacy rate array */
1661eb6f0de0SAdrian Chadd 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1662eb6f0de0SAdrian Chadd 
1663eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].rix =
1664eb6f0de0SAdrian Chadd 	    ath_tx_findrix(sc, params->ibp_rate0);
1665eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].tries = try0;
1666eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].ratecode = txrate;
1667c1782ce0SAdrian Chadd 
1668c1782ce0SAdrian Chadd 	if (ismrr) {
1669eb6f0de0SAdrian Chadd 		int rix;
1670c1782ce0SAdrian Chadd 
1671b8e788a5SAdrian Chadd 		rix = ath_tx_findrix(sc, params->ibp_rate1);
1672eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[1].rix = rix;
1673eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
1674c1782ce0SAdrian Chadd 
1675eb6f0de0SAdrian Chadd 		rix = ath_tx_findrix(sc, params->ibp_rate2);
1676eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[2].rix = rix;
1677eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
1678eb6f0de0SAdrian Chadd 
1679eb6f0de0SAdrian Chadd 		rix = ath_tx_findrix(sc, params->ibp_rate3);
1680eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].rix = rix;
1681eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
1682c1782ce0SAdrian Chadd 	}
1683eb6f0de0SAdrian Chadd 	/*
1684eb6f0de0SAdrian Chadd 	 * All the required rate control decisions have been made;
1685eb6f0de0SAdrian Chadd 	 * fill in the rc flags.
1686eb6f0de0SAdrian Chadd 	 */
1687eb6f0de0SAdrian Chadd 	ath_tx_rate_fill_rcflags(sc, bf);
1688b8e788a5SAdrian Chadd 
1689b8e788a5SAdrian Chadd 	/* NB: no buffered multicast in power save support */
1690eb6f0de0SAdrian Chadd 
1691eb6f0de0SAdrian Chadd 	/* XXX If it's an ADDBA, override the correct queue */
1692eb6f0de0SAdrian Chadd 	do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
1693eb6f0de0SAdrian Chadd 
1694eb6f0de0SAdrian Chadd 	/* Map ADDBA to the correct priority */
1695eb6f0de0SAdrian Chadd 	if (do_override) {
1696eb6f0de0SAdrian Chadd #if 0
1697eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
1698eb6f0de0SAdrian Chadd 		    "%s: overriding tid %d pri %d -> %d\n",
1699eb6f0de0SAdrian Chadd 		    __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
1700eb6f0de0SAdrian Chadd #endif
1701eb6f0de0SAdrian Chadd 		pri = TID_TO_WME_AC(o_tid);
1702eb6f0de0SAdrian Chadd 	}
1703eb6f0de0SAdrian Chadd 
1704eb6f0de0SAdrian Chadd 	/*
1705eb6f0de0SAdrian Chadd 	 * If we're overiding the ADDBA destination, dump directly
1706eb6f0de0SAdrian Chadd 	 * into the hardware queue, right after any pending
1707eb6f0de0SAdrian Chadd 	 * frames to that node are.
1708eb6f0de0SAdrian Chadd 	 */
1709eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
1710eb6f0de0SAdrian Chadd 	    __func__, do_override);
1711eb6f0de0SAdrian Chadd 
1712eb6f0de0SAdrian Chadd 	if (do_override) {
1713eb6f0de0SAdrian Chadd 		ATH_TXQ_LOCK(sc->sc_ac2q[pri]);
1714eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
1715eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(sc->sc_ac2q[pri]);
1716eb6f0de0SAdrian Chadd 	} else {
1717eb6f0de0SAdrian Chadd 		/* Queue to software queue */
1718eb6f0de0SAdrian Chadd 		ath_tx_swq(sc, ni, sc->sc_ac2q[pri], bf);
1719eb6f0de0SAdrian Chadd 	}
1720eb6f0de0SAdrian Chadd 
1721b8e788a5SAdrian Chadd 	return 0;
1722b8e788a5SAdrian Chadd }
1723b8e788a5SAdrian Chadd 
1724eb6f0de0SAdrian Chadd /*
1725eb6f0de0SAdrian Chadd  * Send a raw frame.
1726eb6f0de0SAdrian Chadd  *
1727eb6f0de0SAdrian Chadd  * This can be called by net80211.
1728eb6f0de0SAdrian Chadd  */
1729b8e788a5SAdrian Chadd int
1730b8e788a5SAdrian Chadd ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1731b8e788a5SAdrian Chadd 	const struct ieee80211_bpf_params *params)
1732b8e788a5SAdrian Chadd {
1733b8e788a5SAdrian Chadd 	struct ieee80211com *ic = ni->ni_ic;
1734b8e788a5SAdrian Chadd 	struct ifnet *ifp = ic->ic_ifp;
1735b8e788a5SAdrian Chadd 	struct ath_softc *sc = ifp->if_softc;
1736b8e788a5SAdrian Chadd 	struct ath_buf *bf;
1737b8e788a5SAdrian Chadd 	int error;
1738b8e788a5SAdrian Chadd 
1739ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
1740ef27340cSAdrian Chadd 	if (sc->sc_inreset_cnt > 0) {
1741ef27340cSAdrian Chadd 		device_printf(sc->sc_dev, "%s: sc_inreset_cnt > 0; bailing\n",
1742ef27340cSAdrian Chadd 		    __func__);
1743ef27340cSAdrian Chadd 		error = EIO;
1744ef27340cSAdrian Chadd 		ATH_PCU_UNLOCK(sc);
1745ef27340cSAdrian Chadd 		goto bad0;
1746ef27340cSAdrian Chadd 	}
1747ef27340cSAdrian Chadd 	sc->sc_txstart_cnt++;
1748ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
1749ef27340cSAdrian Chadd 
1750b8e788a5SAdrian Chadd 	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
1751b8e788a5SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
1752b8e788a5SAdrian Chadd 		    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ?
1753b8e788a5SAdrian Chadd 			"!running" : "invalid");
1754b8e788a5SAdrian Chadd 		m_freem(m);
1755b8e788a5SAdrian Chadd 		error = ENETDOWN;
1756b8e788a5SAdrian Chadd 		goto bad;
1757b8e788a5SAdrian Chadd 	}
1758b8e788a5SAdrian Chadd 	/*
1759b8e788a5SAdrian Chadd 	 * Grab a TX buffer and associated resources.
1760b8e788a5SAdrian Chadd 	 */
1761b8e788a5SAdrian Chadd 	bf = ath_getbuf(sc);
1762b8e788a5SAdrian Chadd 	if (bf == NULL) {
1763b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_nobuf++;
1764b8e788a5SAdrian Chadd 		m_freem(m);
1765b8e788a5SAdrian Chadd 		error = ENOBUFS;
1766b8e788a5SAdrian Chadd 		goto bad;
1767b8e788a5SAdrian Chadd 	}
1768b8e788a5SAdrian Chadd 
1769b8e788a5SAdrian Chadd 	if (params == NULL) {
1770b8e788a5SAdrian Chadd 		/*
1771b8e788a5SAdrian Chadd 		 * Legacy path; interpret frame contents to decide
1772b8e788a5SAdrian Chadd 		 * precisely how to send the frame.
1773b8e788a5SAdrian Chadd 		 */
1774b8e788a5SAdrian Chadd 		if (ath_tx_start(sc, ni, bf, m)) {
1775b8e788a5SAdrian Chadd 			error = EIO;		/* XXX */
1776b8e788a5SAdrian Chadd 			goto bad2;
1777b8e788a5SAdrian Chadd 		}
1778b8e788a5SAdrian Chadd 	} else {
1779b8e788a5SAdrian Chadd 		/*
1780b8e788a5SAdrian Chadd 		 * Caller supplied explicit parameters to use in
1781b8e788a5SAdrian Chadd 		 * sending the frame.
1782b8e788a5SAdrian Chadd 		 */
1783b8e788a5SAdrian Chadd 		if (ath_tx_raw_start(sc, ni, bf, m, params)) {
1784b8e788a5SAdrian Chadd 			error = EIO;		/* XXX */
1785b8e788a5SAdrian Chadd 			goto bad2;
1786b8e788a5SAdrian Chadd 		}
1787b8e788a5SAdrian Chadd 	}
1788b8e788a5SAdrian Chadd 	sc->sc_wd_timer = 5;
1789b8e788a5SAdrian Chadd 	ifp->if_opackets++;
1790b8e788a5SAdrian Chadd 	sc->sc_stats.ast_tx_raw++;
1791b8e788a5SAdrian Chadd 
1792ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
1793ef27340cSAdrian Chadd 	sc->sc_txstart_cnt--;
1794ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
1795ef27340cSAdrian Chadd 
1796b8e788a5SAdrian Chadd 	return 0;
1797b8e788a5SAdrian Chadd bad2:
1798b8e788a5SAdrian Chadd 	ATH_TXBUF_LOCK(sc);
17996b349e5aSAdrian Chadd 	TAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1800b8e788a5SAdrian Chadd 	ATH_TXBUF_UNLOCK(sc);
1801b8e788a5SAdrian Chadd bad:
1802ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
1803ef27340cSAdrian Chadd 	sc->sc_txstart_cnt--;
1804ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
1805ef27340cSAdrian Chadd bad0:
1806b8e788a5SAdrian Chadd 	ifp->if_oerrors++;
1807b8e788a5SAdrian Chadd 	sc->sc_stats.ast_tx_raw_fail++;
1808b8e788a5SAdrian Chadd 	ieee80211_free_node(ni);
1809ef27340cSAdrian Chadd 
1810b8e788a5SAdrian Chadd 	return error;
1811b8e788a5SAdrian Chadd }
1812eb6f0de0SAdrian Chadd 
1813eb6f0de0SAdrian Chadd /* Some helper functions */
1814eb6f0de0SAdrian Chadd 
1815eb6f0de0SAdrian Chadd /*
1816eb6f0de0SAdrian Chadd  * ADDBA (and potentially others) need to be placed in the same
1817eb6f0de0SAdrian Chadd  * hardware queue as the TID/node it's relating to. This is so
1818eb6f0de0SAdrian Chadd  * it goes out after any pending non-aggregate frames to the
1819eb6f0de0SAdrian Chadd  * same node/TID.
1820eb6f0de0SAdrian Chadd  *
1821eb6f0de0SAdrian Chadd  * If this isn't done, the ADDBA can go out before the frames
1822eb6f0de0SAdrian Chadd  * queued in hardware. Even though these frames have a sequence
1823eb6f0de0SAdrian Chadd  * number -earlier- than the ADDBA can be transmitted (but
1824eb6f0de0SAdrian Chadd  * no frames whose sequence numbers are after the ADDBA should
1825eb6f0de0SAdrian Chadd  * be!) they'll arrive after the ADDBA - and the receiving end
1826eb6f0de0SAdrian Chadd  * will simply drop them as being out of the BAW.
1827eb6f0de0SAdrian Chadd  *
1828eb6f0de0SAdrian Chadd  * The frames can't be appended to the TID software queue - it'll
1829eb6f0de0SAdrian Chadd  * never be sent out. So these frames have to be directly
1830eb6f0de0SAdrian Chadd  * dispatched to the hardware, rather than queued in software.
1831eb6f0de0SAdrian Chadd  * So if this function returns true, the TXQ has to be
1832eb6f0de0SAdrian Chadd  * overridden and it has to be directly dispatched.
1833eb6f0de0SAdrian Chadd  *
1834eb6f0de0SAdrian Chadd  * It's a dirty hack, but someone's gotta do it.
1835eb6f0de0SAdrian Chadd  */
1836eb6f0de0SAdrian Chadd 
1837eb6f0de0SAdrian Chadd /*
1838eb6f0de0SAdrian Chadd  * XXX doesn't belong here!
1839eb6f0de0SAdrian Chadd  */
1840eb6f0de0SAdrian Chadd static int
1841eb6f0de0SAdrian Chadd ieee80211_is_action(struct ieee80211_frame *wh)
1842eb6f0de0SAdrian Chadd {
1843eb6f0de0SAdrian Chadd 	/* Type: Management frame? */
1844eb6f0de0SAdrian Chadd 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
1845eb6f0de0SAdrian Chadd 	    IEEE80211_FC0_TYPE_MGT)
1846eb6f0de0SAdrian Chadd 		return 0;
1847eb6f0de0SAdrian Chadd 
1848eb6f0de0SAdrian Chadd 	/* Subtype: Action frame? */
1849eb6f0de0SAdrian Chadd 	if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) !=
1850eb6f0de0SAdrian Chadd 	    IEEE80211_FC0_SUBTYPE_ACTION)
1851eb6f0de0SAdrian Chadd 		return 0;
1852eb6f0de0SAdrian Chadd 
1853eb6f0de0SAdrian Chadd 	return 1;
1854eb6f0de0SAdrian Chadd }
1855eb6f0de0SAdrian Chadd 
1856eb6f0de0SAdrian Chadd #define	MS(_v, _f)	(((_v) & _f) >> _f##_S)
1857eb6f0de0SAdrian Chadd /*
1858eb6f0de0SAdrian Chadd  * Return an alternate TID for ADDBA request frames.
1859eb6f0de0SAdrian Chadd  *
1860eb6f0de0SAdrian Chadd  * Yes, this likely should be done in the net80211 layer.
1861eb6f0de0SAdrian Chadd  */
1862eb6f0de0SAdrian Chadd static int
1863eb6f0de0SAdrian Chadd ath_tx_action_frame_override_queue(struct ath_softc *sc,
1864eb6f0de0SAdrian Chadd     struct ieee80211_node *ni,
1865eb6f0de0SAdrian Chadd     struct mbuf *m0, int *tid)
1866eb6f0de0SAdrian Chadd {
1867eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
1868eb6f0de0SAdrian Chadd 	struct ieee80211_action_ba_addbarequest *ia;
1869eb6f0de0SAdrian Chadd 	uint8_t *frm;
1870eb6f0de0SAdrian Chadd 	uint16_t baparamset;
1871eb6f0de0SAdrian Chadd 
1872eb6f0de0SAdrian Chadd 	/* Not action frame? Bail */
1873eb6f0de0SAdrian Chadd 	if (! ieee80211_is_action(wh))
1874eb6f0de0SAdrian Chadd 		return 0;
1875eb6f0de0SAdrian Chadd 
1876eb6f0de0SAdrian Chadd 	/* XXX Not needed for frames we send? */
1877eb6f0de0SAdrian Chadd #if 0
1878eb6f0de0SAdrian Chadd 	/* Correct length? */
1879eb6f0de0SAdrian Chadd 	if (! ieee80211_parse_action(ni, m))
1880eb6f0de0SAdrian Chadd 		return 0;
1881eb6f0de0SAdrian Chadd #endif
1882eb6f0de0SAdrian Chadd 
1883eb6f0de0SAdrian Chadd 	/* Extract out action frame */
1884eb6f0de0SAdrian Chadd 	frm = (u_int8_t *)&wh[1];
1885eb6f0de0SAdrian Chadd 	ia = (struct ieee80211_action_ba_addbarequest *) frm;
1886eb6f0de0SAdrian Chadd 
1887eb6f0de0SAdrian Chadd 	/* Not ADDBA? Bail */
1888eb6f0de0SAdrian Chadd 	if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
1889eb6f0de0SAdrian Chadd 		return 0;
1890eb6f0de0SAdrian Chadd 	if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
1891eb6f0de0SAdrian Chadd 		return 0;
1892eb6f0de0SAdrian Chadd 
1893eb6f0de0SAdrian Chadd 	/* Extract TID, return it */
1894eb6f0de0SAdrian Chadd 	baparamset = le16toh(ia->rq_baparamset);
1895eb6f0de0SAdrian Chadd 	*tid = (int) MS(baparamset, IEEE80211_BAPS_TID);
1896eb6f0de0SAdrian Chadd 
1897eb6f0de0SAdrian Chadd 	return 1;
1898eb6f0de0SAdrian Chadd }
1899eb6f0de0SAdrian Chadd #undef	MS
1900eb6f0de0SAdrian Chadd 
1901eb6f0de0SAdrian Chadd /* Per-node software queue operations */
1902eb6f0de0SAdrian Chadd 
1903eb6f0de0SAdrian Chadd /*
1904eb6f0de0SAdrian Chadd  * Add the current packet to the given BAW.
1905eb6f0de0SAdrian Chadd  * It is assumed that the current packet
1906eb6f0de0SAdrian Chadd  *
1907eb6f0de0SAdrian Chadd  * + fits inside the BAW;
1908eb6f0de0SAdrian Chadd  * + already has had a sequence number allocated.
1909eb6f0de0SAdrian Chadd  *
1910eb6f0de0SAdrian Chadd  * Since the BAW status may be modified by both the ath task and
1911eb6f0de0SAdrian Chadd  * the net80211/ifnet contexts, the TID must be locked.
1912eb6f0de0SAdrian Chadd  */
1913eb6f0de0SAdrian Chadd void
1914eb6f0de0SAdrian Chadd ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
1915eb6f0de0SAdrian Chadd     struct ath_tid *tid, struct ath_buf *bf)
1916eb6f0de0SAdrian Chadd {
1917eb6f0de0SAdrian Chadd 	int index, cindex;
1918eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
1919eb6f0de0SAdrian Chadd 
1920eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
1921eb6f0de0SAdrian Chadd 
1922eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_isretried)
1923eb6f0de0SAdrian Chadd 		return;
1924eb6f0de0SAdrian Chadd 
1925eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
1926eb6f0de0SAdrian Chadd 
1927eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_addedbaw)
1928eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
1929d4365d16SAdrian Chadd 		    "%s: re-added? tid=%d, seqno %d; window %d:%d; "
1930d4365d16SAdrian Chadd 		    "baw head=%d tail=%d\n",
1931eb6f0de0SAdrian Chadd 		    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
1932d4365d16SAdrian Chadd 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
1933d4365d16SAdrian Chadd 		    tid->baw_tail);
1934eb6f0de0SAdrian Chadd 
1935eb6f0de0SAdrian Chadd 	/*
1936eb6f0de0SAdrian Chadd 	 * ni->ni_txseqs[] is the currently allocated seqno.
1937eb6f0de0SAdrian Chadd 	 * the txa state contains the current baw start.
1938eb6f0de0SAdrian Chadd 	 */
1939eb6f0de0SAdrian Chadd 	index  = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
1940eb6f0de0SAdrian Chadd 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
1941eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
1942d4365d16SAdrian Chadd 	    "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
1943d4365d16SAdrian Chadd 	    "baw head=%d tail=%d\n",
1944eb6f0de0SAdrian Chadd 	    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
1945d4365d16SAdrian Chadd 	    tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
1946d4365d16SAdrian Chadd 	    tid->baw_tail);
1947eb6f0de0SAdrian Chadd 
1948eb6f0de0SAdrian Chadd 
1949eb6f0de0SAdrian Chadd #if 0
1950eb6f0de0SAdrian Chadd 	assert(tid->tx_buf[cindex] == NULL);
1951eb6f0de0SAdrian Chadd #endif
1952eb6f0de0SAdrian Chadd 	if (tid->tx_buf[cindex] != NULL) {
1953eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
1954eb6f0de0SAdrian Chadd 		    "%s: ba packet dup (index=%d, cindex=%d, "
1955eb6f0de0SAdrian Chadd 		    "head=%d, tail=%d)\n",
1956eb6f0de0SAdrian Chadd 		    __func__, index, cindex, tid->baw_head, tid->baw_tail);
1957eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
1958eb6f0de0SAdrian Chadd 		    "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
1959eb6f0de0SAdrian Chadd 		    __func__,
1960eb6f0de0SAdrian Chadd 		    tid->tx_buf[cindex],
1961eb6f0de0SAdrian Chadd 		    SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
1962eb6f0de0SAdrian Chadd 		    bf,
1963eb6f0de0SAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno)
1964eb6f0de0SAdrian Chadd 		);
1965eb6f0de0SAdrian Chadd 	}
1966eb6f0de0SAdrian Chadd 	tid->tx_buf[cindex] = bf;
1967eb6f0de0SAdrian Chadd 
1968d4365d16SAdrian Chadd 	if (index >= ((tid->baw_tail - tid->baw_head) &
1969d4365d16SAdrian Chadd 	    (ATH_TID_MAX_BUFS - 1))) {
1970eb6f0de0SAdrian Chadd 		tid->baw_tail = cindex;
1971eb6f0de0SAdrian Chadd 		INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
1972eb6f0de0SAdrian Chadd 	}
1973eb6f0de0SAdrian Chadd }
1974eb6f0de0SAdrian Chadd 
1975eb6f0de0SAdrian Chadd /*
197638962489SAdrian Chadd  * Flip the BAW buffer entry over from the existing one to the new one.
197738962489SAdrian Chadd  *
197838962489SAdrian Chadd  * When software retransmitting a (sub-)frame, it is entirely possible that
197938962489SAdrian Chadd  * the frame ath_buf is marked as BUSY and can't be immediately reused.
198038962489SAdrian Chadd  * In that instance the buffer is cloned and the new buffer is used for
198138962489SAdrian Chadd  * retransmit. We thus need to update the ath_buf slot in the BAW buf
198238962489SAdrian Chadd  * tracking array to maintain consistency.
198338962489SAdrian Chadd  */
198438962489SAdrian Chadd static void
198538962489SAdrian Chadd ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
198638962489SAdrian Chadd     struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
198738962489SAdrian Chadd {
198838962489SAdrian Chadd 	int index, cindex;
198938962489SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
199038962489SAdrian Chadd 	int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
199138962489SAdrian Chadd 
199238962489SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
199338962489SAdrian Chadd 
199438962489SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
199538962489SAdrian Chadd 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
199638962489SAdrian Chadd 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
199738962489SAdrian Chadd 
199838962489SAdrian Chadd 	/*
199938962489SAdrian Chadd 	 * Just warn for now; if it happens then we should find out
200038962489SAdrian Chadd 	 * about it. It's highly likely the aggregation session will
200138962489SAdrian Chadd 	 * soon hang.
200238962489SAdrian Chadd 	 */
200338962489SAdrian Chadd 	if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
200438962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: retransmitted buffer"
200538962489SAdrian Chadd 		    " has mismatching seqno's, BA session may hang.\n",
200638962489SAdrian Chadd 		    __func__);
200738962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: old seqno=%d, new_seqno=%d\n",
200838962489SAdrian Chadd 		    __func__,
200938962489SAdrian Chadd 		    old_bf->bf_state.bfs_seqno,
201038962489SAdrian Chadd 		    new_bf->bf_state.bfs_seqno);
201138962489SAdrian Chadd 	}
201238962489SAdrian Chadd 
201338962489SAdrian Chadd 	if (tid->tx_buf[cindex] != old_bf) {
201438962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: ath_buf pointer incorrect; "
201538962489SAdrian Chadd 		    " has m BA session may hang.\n",
201638962489SAdrian Chadd 		    __func__);
201738962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: old bf=%p, new bf=%p\n",
201838962489SAdrian Chadd 		    __func__,
201938962489SAdrian Chadd 		    old_bf, new_bf);
202038962489SAdrian Chadd 	}
202138962489SAdrian Chadd 
202238962489SAdrian Chadd 	tid->tx_buf[cindex] = new_bf;
202338962489SAdrian Chadd }
202438962489SAdrian Chadd 
202538962489SAdrian Chadd /*
2026eb6f0de0SAdrian Chadd  * seq_start - left edge of BAW
2027eb6f0de0SAdrian Chadd  * seq_next - current/next sequence number to allocate
2028eb6f0de0SAdrian Chadd  *
2029eb6f0de0SAdrian Chadd  * Since the BAW status may be modified by both the ath task and
2030eb6f0de0SAdrian Chadd  * the net80211/ifnet contexts, the TID must be locked.
2031eb6f0de0SAdrian Chadd  */
2032eb6f0de0SAdrian Chadd static void
2033eb6f0de0SAdrian Chadd ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2034eb6f0de0SAdrian Chadd     struct ath_tid *tid, const struct ath_buf *bf)
2035eb6f0de0SAdrian Chadd {
2036eb6f0de0SAdrian Chadd 	int index, cindex;
2037eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2038eb6f0de0SAdrian Chadd 	int seqno = SEQNO(bf->bf_state.bfs_seqno);
2039eb6f0de0SAdrian Chadd 
2040eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2041eb6f0de0SAdrian Chadd 
2042eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
2043eb6f0de0SAdrian Chadd 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2044eb6f0de0SAdrian Chadd 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2045eb6f0de0SAdrian Chadd 
2046eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2047d4365d16SAdrian Chadd 	    "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2048d4365d16SAdrian Chadd 	    "baw head=%d, tail=%d\n",
2049eb6f0de0SAdrian Chadd 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2050eb6f0de0SAdrian Chadd 	    cindex, tid->baw_head, tid->baw_tail);
2051eb6f0de0SAdrian Chadd 
2052eb6f0de0SAdrian Chadd 	/*
2053eb6f0de0SAdrian Chadd 	 * If this occurs then we have a big problem - something else
2054eb6f0de0SAdrian Chadd 	 * has slid tap->txa_start along without updating the BAW
2055eb6f0de0SAdrian Chadd 	 * tracking start/end pointers. Thus the TX BAW state is now
2056eb6f0de0SAdrian Chadd 	 * completely busted.
2057eb6f0de0SAdrian Chadd 	 *
2058eb6f0de0SAdrian Chadd 	 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2059eb6f0de0SAdrian Chadd 	 * it's quite possible that a cloned buffer is making its way
2060eb6f0de0SAdrian Chadd 	 * here and causing it to fire off. Disable TDMA for now.
2061eb6f0de0SAdrian Chadd 	 */
2062eb6f0de0SAdrian Chadd 	if (tid->tx_buf[cindex] != bf) {
2063eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2064eb6f0de0SAdrian Chadd 		    "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2065eb6f0de0SAdrian Chadd 		    __func__,
2066eb6f0de0SAdrian Chadd 		    bf, SEQNO(bf->bf_state.bfs_seqno),
2067eb6f0de0SAdrian Chadd 		    tid->tx_buf[cindex],
2068eb6f0de0SAdrian Chadd 		    SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno));
2069eb6f0de0SAdrian Chadd 	}
2070eb6f0de0SAdrian Chadd 
2071eb6f0de0SAdrian Chadd 	tid->tx_buf[cindex] = NULL;
2072eb6f0de0SAdrian Chadd 
2073d4365d16SAdrian Chadd 	while (tid->baw_head != tid->baw_tail &&
2074d4365d16SAdrian Chadd 	    !tid->tx_buf[tid->baw_head]) {
2075eb6f0de0SAdrian Chadd 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2076eb6f0de0SAdrian Chadd 		INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2077eb6f0de0SAdrian Chadd 	}
2078d4365d16SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2079d4365d16SAdrian Chadd 	    "%s: baw is now %d:%d, baw head=%d\n",
2080eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, tap->txa_wnd, tid->baw_head);
2081eb6f0de0SAdrian Chadd }
2082eb6f0de0SAdrian Chadd 
2083eb6f0de0SAdrian Chadd /*
2084eb6f0de0SAdrian Chadd  * Mark the current node/TID as ready to TX.
2085eb6f0de0SAdrian Chadd  *
2086eb6f0de0SAdrian Chadd  * This is done to make it easy for the software scheduler to
2087eb6f0de0SAdrian Chadd  * find which nodes have data to send.
2088eb6f0de0SAdrian Chadd  *
2089eb6f0de0SAdrian Chadd  * The TXQ lock must be held.
2090eb6f0de0SAdrian Chadd  */
2091eb6f0de0SAdrian Chadd static void
2092eb6f0de0SAdrian Chadd ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2093eb6f0de0SAdrian Chadd {
2094eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2095eb6f0de0SAdrian Chadd 
2096eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
2097eb6f0de0SAdrian Chadd 
2098eb6f0de0SAdrian Chadd 	if (tid->paused)
2099eb6f0de0SAdrian Chadd 		return;		/* paused, can't schedule yet */
2100eb6f0de0SAdrian Chadd 
2101eb6f0de0SAdrian Chadd 	if (tid->sched)
2102eb6f0de0SAdrian Chadd 		return;		/* already scheduled */
2103eb6f0de0SAdrian Chadd 
2104eb6f0de0SAdrian Chadd 	tid->sched = 1;
2105eb6f0de0SAdrian Chadd 
2106eb6f0de0SAdrian Chadd 	TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2107eb6f0de0SAdrian Chadd }
2108eb6f0de0SAdrian Chadd 
2109eb6f0de0SAdrian Chadd /*
2110eb6f0de0SAdrian Chadd  * Mark the current node as no longer needing to be polled for
2111eb6f0de0SAdrian Chadd  * TX packets.
2112eb6f0de0SAdrian Chadd  *
2113eb6f0de0SAdrian Chadd  * The TXQ lock must be held.
2114eb6f0de0SAdrian Chadd  */
2115eb6f0de0SAdrian Chadd static void
2116eb6f0de0SAdrian Chadd ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2117eb6f0de0SAdrian Chadd {
2118eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2119eb6f0de0SAdrian Chadd 
2120eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
2121eb6f0de0SAdrian Chadd 
2122eb6f0de0SAdrian Chadd 	if (tid->sched == 0)
2123eb6f0de0SAdrian Chadd 		return;
2124eb6f0de0SAdrian Chadd 
2125eb6f0de0SAdrian Chadd 	tid->sched = 0;
2126eb6f0de0SAdrian Chadd 	TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2127eb6f0de0SAdrian Chadd }
2128eb6f0de0SAdrian Chadd 
2129eb6f0de0SAdrian Chadd /*
2130eb6f0de0SAdrian Chadd  * Assign a sequence number manually to the given frame.
2131eb6f0de0SAdrian Chadd  *
2132eb6f0de0SAdrian Chadd  * This should only be called for A-MPDU TX frames.
2133eb6f0de0SAdrian Chadd  */
2134eb6f0de0SAdrian Chadd static ieee80211_seq
2135eb6f0de0SAdrian Chadd ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2136eb6f0de0SAdrian Chadd     struct ath_buf *bf, struct mbuf *m0)
2137eb6f0de0SAdrian Chadd {
2138eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh;
2139eb6f0de0SAdrian Chadd 	int tid, pri;
2140eb6f0de0SAdrian Chadd 	ieee80211_seq seqno;
2141eb6f0de0SAdrian Chadd 	uint8_t subtype;
2142eb6f0de0SAdrian Chadd 
2143eb6f0de0SAdrian Chadd 	/* TID lookup */
2144eb6f0de0SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2145eb6f0de0SAdrian Chadd 	pri = M_WME_GETAC(m0);			/* honor classification */
2146eb6f0de0SAdrian Chadd 	tid = WME_AC_TO_TID(pri);
2147eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n",
2148eb6f0de0SAdrian Chadd 	    __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2149eb6f0de0SAdrian Chadd 
2150eb6f0de0SAdrian Chadd 	/* XXX Is it a control frame? Ignore */
2151eb6f0de0SAdrian Chadd 
2152eb6f0de0SAdrian Chadd 	/* Does the packet require a sequence number? */
2153eb6f0de0SAdrian Chadd 	if (! IEEE80211_QOS_HAS_SEQ(wh))
2154eb6f0de0SAdrian Chadd 		return -1;
2155eb6f0de0SAdrian Chadd 
2156eb6f0de0SAdrian Chadd 	/*
2157eb6f0de0SAdrian Chadd 	 * Is it a QOS NULL Data frame? Give it a sequence number from
2158eb6f0de0SAdrian Chadd 	 * the default TID (IEEE80211_NONQOS_TID.)
2159eb6f0de0SAdrian Chadd 	 *
2160eb6f0de0SAdrian Chadd 	 * The RX path of everything I've looked at doesn't include the NULL
2161eb6f0de0SAdrian Chadd 	 * data frame sequence number in the aggregation state updates, so
2162eb6f0de0SAdrian Chadd 	 * assigning it a sequence number there will cause a BAW hole on the
2163eb6f0de0SAdrian Chadd 	 * RX side.
2164eb6f0de0SAdrian Chadd 	 */
2165eb6f0de0SAdrian Chadd 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2166eb6f0de0SAdrian Chadd 	if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) {
2167eb6f0de0SAdrian Chadd 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
2168eb6f0de0SAdrian Chadd 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
2169eb6f0de0SAdrian Chadd 	} else {
2170eb6f0de0SAdrian Chadd 		/* Manually assign sequence number */
2171eb6f0de0SAdrian Chadd 		seqno = ni->ni_txseqs[tid];
2172eb6f0de0SAdrian Chadd 		INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
2173eb6f0de0SAdrian Chadd 	}
2174eb6f0de0SAdrian Chadd 	*(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
2175eb6f0de0SAdrian Chadd 	M_SEQNO_SET(m0, seqno);
2176eb6f0de0SAdrian Chadd 
2177eb6f0de0SAdrian Chadd 	/* Return so caller can do something with it if needed */
2178eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s:  -> seqno=%d\n", __func__, seqno);
2179eb6f0de0SAdrian Chadd 	return seqno;
2180eb6f0de0SAdrian Chadd }
2181eb6f0de0SAdrian Chadd 
2182eb6f0de0SAdrian Chadd /*
2183eb6f0de0SAdrian Chadd  * Attempt to direct dispatch an aggregate frame to hardware.
2184eb6f0de0SAdrian Chadd  * If the frame is out of BAW, queue.
2185eb6f0de0SAdrian Chadd  * Otherwise, schedule it as a single frame.
2186eb6f0de0SAdrian Chadd  */
2187eb6f0de0SAdrian Chadd static void
2188eb6f0de0SAdrian Chadd ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, struct ath_buf *bf)
2189eb6f0de0SAdrian Chadd {
2190eb6f0de0SAdrian Chadd 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
2191eb6f0de0SAdrian Chadd 	struct ath_txq *txq = bf->bf_state.bfs_txq;
2192eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2193eb6f0de0SAdrian Chadd 
2194eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
2195eb6f0de0SAdrian Chadd 
2196eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
2197eb6f0de0SAdrian Chadd 
2198eb6f0de0SAdrian Chadd 	/* paused? queue */
2199eb6f0de0SAdrian Chadd 	if (tid->paused) {
2200eb6f0de0SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(tid, bf, bf_list);
2201eb6f0de0SAdrian Chadd 		return;
2202eb6f0de0SAdrian Chadd 	}
2203eb6f0de0SAdrian Chadd 
2204eb6f0de0SAdrian Chadd 	/* outside baw? queue */
2205eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_dobaw &&
2206eb6f0de0SAdrian Chadd 	    (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2207eb6f0de0SAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno)))) {
2208eb6f0de0SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(tid, bf, bf_list);
2209eb6f0de0SAdrian Chadd 		ath_tx_tid_sched(sc, tid);
2210eb6f0de0SAdrian Chadd 		return;
2211eb6f0de0SAdrian Chadd 	}
2212eb6f0de0SAdrian Chadd 
2213eb6f0de0SAdrian Chadd 	/* Direct dispatch to hardware */
2214eb6f0de0SAdrian Chadd 	ath_tx_do_ratelookup(sc, bf);
2215eb6f0de0SAdrian Chadd 	ath_tx_rate_fill_rcflags(sc, bf);
2216eb6f0de0SAdrian Chadd 	ath_tx_set_rtscts(sc, bf);
2217eb6f0de0SAdrian Chadd 	ath_tx_setds(sc, bf);
2218eb6f0de0SAdrian Chadd 	ath_tx_set_ratectrl(sc, bf->bf_node, bf);
2219eb6f0de0SAdrian Chadd 	ath_tx_chaindesclist(sc, bf);
2220eb6f0de0SAdrian Chadd 
2221eb6f0de0SAdrian Chadd 	/* Statistics */
2222eb6f0de0SAdrian Chadd 	sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
2223eb6f0de0SAdrian Chadd 
2224eb6f0de0SAdrian Chadd 	/* Track per-TID hardware queue depth correctly */
2225eb6f0de0SAdrian Chadd 	tid->hwq_depth++;
2226eb6f0de0SAdrian Chadd 
2227eb6f0de0SAdrian Chadd 	/* Add to BAW */
2228eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_dobaw) {
2229eb6f0de0SAdrian Chadd 		ath_tx_addto_baw(sc, an, tid, bf);
2230eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_addedbaw = 1;
2231eb6f0de0SAdrian Chadd 	}
2232eb6f0de0SAdrian Chadd 
2233eb6f0de0SAdrian Chadd 	/* Set completion handler, multi-frame aggregate or not */
2234eb6f0de0SAdrian Chadd 	bf->bf_comp = ath_tx_aggr_comp;
2235eb6f0de0SAdrian Chadd 
2236eb6f0de0SAdrian Chadd 	/* Hand off to hardware */
2237eb6f0de0SAdrian Chadd 	ath_tx_handoff(sc, txq, bf);
2238eb6f0de0SAdrian Chadd }
2239eb6f0de0SAdrian Chadd 
2240eb6f0de0SAdrian Chadd /*
2241eb6f0de0SAdrian Chadd  * Attempt to send the packet.
2242eb6f0de0SAdrian Chadd  * If the queue isn't busy, direct-dispatch.
2243eb6f0de0SAdrian Chadd  * If the queue is busy enough, queue the given packet on the
2244eb6f0de0SAdrian Chadd  *  relevant software queue.
2245eb6f0de0SAdrian Chadd  */
2246eb6f0de0SAdrian Chadd void
2247eb6f0de0SAdrian Chadd ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_txq *txq,
2248eb6f0de0SAdrian Chadd     struct ath_buf *bf)
2249eb6f0de0SAdrian Chadd {
2250eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
2251eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh;
2252eb6f0de0SAdrian Chadd 	struct ath_tid *atid;
2253eb6f0de0SAdrian Chadd 	int pri, tid;
2254eb6f0de0SAdrian Chadd 	struct mbuf *m0 = bf->bf_m;
2255eb6f0de0SAdrian Chadd 
2256eb6f0de0SAdrian Chadd 	/* Fetch the TID - non-QoS frames get assigned to TID 16 */
2257eb6f0de0SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2258eb6f0de0SAdrian Chadd 	pri = ath_tx_getac(sc, m0);
2259eb6f0de0SAdrian Chadd 	tid = ath_tx_gettid(sc, m0);
2260eb6f0de0SAdrian Chadd 	atid = &an->an_tid[tid];
2261eb6f0de0SAdrian Chadd 
2262eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
2263eb6f0de0SAdrian Chadd 	    __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2264eb6f0de0SAdrian Chadd 
2265eb6f0de0SAdrian Chadd 	/* Set local packet state, used to queue packets to hardware */
2266eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_tid = tid;
2267eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txq = txq;
2268eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_pri = pri;
2269eb6f0de0SAdrian Chadd 
2270eb6f0de0SAdrian Chadd 	/*
2271eb6f0de0SAdrian Chadd 	 * If the hardware queue isn't busy, queue it directly.
2272eb6f0de0SAdrian Chadd 	 * If the hardware queue is busy, queue it.
2273eb6f0de0SAdrian Chadd 	 * If the TID is paused or the traffic it outside BAW, software
2274eb6f0de0SAdrian Chadd 	 * queue it.
2275eb6f0de0SAdrian Chadd 	 */
2276eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(txq);
2277eb6f0de0SAdrian Chadd 	if (atid->paused) {
2278eb6f0de0SAdrian Chadd 		/* TID is paused, queue */
2279d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
2280eb6f0de0SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2281eb6f0de0SAdrian Chadd 	} else if (ath_tx_ampdu_pending(sc, an, tid)) {
2282eb6f0de0SAdrian Chadd 		/* AMPDU pending; queue */
2283d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
2284eb6f0de0SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2285eb6f0de0SAdrian Chadd 		/* XXX sched? */
2286eb6f0de0SAdrian Chadd 	} else if (ath_tx_ampdu_running(sc, an, tid)) {
2287eb6f0de0SAdrian Chadd 		/* AMPDU running, attempt direct dispatch if possible */
2288d4365d16SAdrian Chadd 		if (txq->axq_depth < sc->sc_hwq_limit) {
2289eb6f0de0SAdrian Chadd 			ath_tx_xmit_aggr(sc, an, bf);
2290d4365d16SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX,
2291d4365d16SAdrian Chadd 			    "%s: xmit_aggr\n",
2292d4365d16SAdrian Chadd 			    __func__);
2293d4365d16SAdrian Chadd 		} else {
2294d4365d16SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX,
2295d4365d16SAdrian Chadd 			    "%s: ampdu; swq'ing\n",
2296d4365d16SAdrian Chadd 			    __func__);
2297eb6f0de0SAdrian Chadd 			ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2298eb6f0de0SAdrian Chadd 			ath_tx_tid_sched(sc, atid);
2299eb6f0de0SAdrian Chadd 		}
2300eb6f0de0SAdrian Chadd 	} else if (txq->axq_depth < sc->sc_hwq_limit) {
2301eb6f0de0SAdrian Chadd 		/* AMPDU not running, attempt direct dispatch */
2302d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
2303eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, txq, bf);
2304eb6f0de0SAdrian Chadd 	} else {
2305eb6f0de0SAdrian Chadd 		/* Busy; queue */
2306d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
2307eb6f0de0SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(atid, bf, bf_list);
2308eb6f0de0SAdrian Chadd 		ath_tx_tid_sched(sc, atid);
2309eb6f0de0SAdrian Chadd 	}
2310eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(txq);
2311eb6f0de0SAdrian Chadd }
2312eb6f0de0SAdrian Chadd 
2313eb6f0de0SAdrian Chadd /*
2314eb6f0de0SAdrian Chadd  * Do the basic frame setup stuff that's required before the frame
2315eb6f0de0SAdrian Chadd  * is added to a software queue.
2316eb6f0de0SAdrian Chadd  *
2317eb6f0de0SAdrian Chadd  * All frames get mostly the same treatment and it's done once.
2318eb6f0de0SAdrian Chadd  * Retransmits fiddle with things like the rate control setup,
2319eb6f0de0SAdrian Chadd  * setting the retransmit bit in the packet; doing relevant DMA/bus
2320eb6f0de0SAdrian Chadd  * syncing and relinking it (back) into the hardware TX queue.
2321eb6f0de0SAdrian Chadd  *
2322eb6f0de0SAdrian Chadd  * Note that this may cause the mbuf to be reallocated, so
2323eb6f0de0SAdrian Chadd  * m0 may not be valid.
2324eb6f0de0SAdrian Chadd  */
2325eb6f0de0SAdrian Chadd 
2326eb6f0de0SAdrian Chadd 
2327eb6f0de0SAdrian Chadd /*
2328eb6f0de0SAdrian Chadd  * Configure the per-TID node state.
2329eb6f0de0SAdrian Chadd  *
2330eb6f0de0SAdrian Chadd  * This likely belongs in if_ath_node.c but I can't think of anywhere
2331eb6f0de0SAdrian Chadd  * else to put it just yet.
2332eb6f0de0SAdrian Chadd  *
2333eb6f0de0SAdrian Chadd  * This sets up the SLISTs and the mutex as appropriate.
2334eb6f0de0SAdrian Chadd  */
2335eb6f0de0SAdrian Chadd void
2336eb6f0de0SAdrian Chadd ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
2337eb6f0de0SAdrian Chadd {
2338eb6f0de0SAdrian Chadd 	int i, j;
2339eb6f0de0SAdrian Chadd 	struct ath_tid *atid;
2340eb6f0de0SAdrian Chadd 
2341eb6f0de0SAdrian Chadd 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
2342eb6f0de0SAdrian Chadd 		atid = &an->an_tid[i];
2343eb6f0de0SAdrian Chadd 		TAILQ_INIT(&atid->axq_q);
2344eb6f0de0SAdrian Chadd 		atid->tid = i;
2345eb6f0de0SAdrian Chadd 		atid->an = an;
2346eb6f0de0SAdrian Chadd 		for (j = 0; j < ATH_TID_MAX_BUFS; j++)
2347eb6f0de0SAdrian Chadd 			atid->tx_buf[j] = NULL;
2348eb6f0de0SAdrian Chadd 		atid->baw_head = atid->baw_tail = 0;
2349eb6f0de0SAdrian Chadd 		atid->paused = 0;
2350eb6f0de0SAdrian Chadd 		atid->sched = 0;
2351eb6f0de0SAdrian Chadd 		atid->hwq_depth = 0;
2352eb6f0de0SAdrian Chadd 		atid->cleanup_inprogress = 0;
2353eb6f0de0SAdrian Chadd 		if (i == IEEE80211_NONQOS_TID)
2354eb6f0de0SAdrian Chadd 			atid->ac = WME_AC_BE;
2355eb6f0de0SAdrian Chadd 		else
2356eb6f0de0SAdrian Chadd 			atid->ac = TID_TO_WME_AC(i);
2357eb6f0de0SAdrian Chadd 	}
2358eb6f0de0SAdrian Chadd }
2359eb6f0de0SAdrian Chadd 
2360eb6f0de0SAdrian Chadd /*
2361eb6f0de0SAdrian Chadd  * Pause the current TID. This stops packets from being transmitted
2362eb6f0de0SAdrian Chadd  * on it.
2363eb6f0de0SAdrian Chadd  *
2364eb6f0de0SAdrian Chadd  * Since this is also called from upper layers as well as the driver,
2365eb6f0de0SAdrian Chadd  * it will get the TID lock.
2366eb6f0de0SAdrian Chadd  */
2367eb6f0de0SAdrian Chadd static void
2368eb6f0de0SAdrian Chadd ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
2369eb6f0de0SAdrian Chadd {
2370eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[tid->ac]);
2371eb6f0de0SAdrian Chadd 	tid->paused++;
2372eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: paused = %d\n",
2373eb6f0de0SAdrian Chadd 	    __func__, tid->paused);
2374eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[tid->ac]);
2375eb6f0de0SAdrian Chadd }
2376eb6f0de0SAdrian Chadd 
2377eb6f0de0SAdrian Chadd /*
2378eb6f0de0SAdrian Chadd  * Unpause the current TID, and schedule it if needed.
2379eb6f0de0SAdrian Chadd  */
2380eb6f0de0SAdrian Chadd static void
2381eb6f0de0SAdrian Chadd ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
2382eb6f0de0SAdrian Chadd {
2383eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2384eb6f0de0SAdrian Chadd 
2385eb6f0de0SAdrian Chadd 	tid->paused--;
2386eb6f0de0SAdrian Chadd 
2387eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: unpaused = %d\n",
2388eb6f0de0SAdrian Chadd 	    __func__, tid->paused);
2389eb6f0de0SAdrian Chadd 
2390eb6f0de0SAdrian Chadd 	if (tid->paused || tid->axq_depth == 0) {
2391eb6f0de0SAdrian Chadd 		return;
2392eb6f0de0SAdrian Chadd 	}
2393eb6f0de0SAdrian Chadd 
2394eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, tid);
2395eb6f0de0SAdrian Chadd 	/* Punt some frames to the hardware if needed */
2396eb6f0de0SAdrian Chadd 	ath_txq_sched(sc, sc->sc_ac2q[tid->ac]);
2397eb6f0de0SAdrian Chadd }
2398eb6f0de0SAdrian Chadd 
2399eb6f0de0SAdrian Chadd /*
2400eb6f0de0SAdrian Chadd  * Free any packets currently pending in the software TX queue.
2401eb6f0de0SAdrian Chadd  *
2402eb6f0de0SAdrian Chadd  * This will be called when a node is being deleted.
2403eb6f0de0SAdrian Chadd  *
2404eb6f0de0SAdrian Chadd  * It can also be called on an active node during an interface
2405eb6f0de0SAdrian Chadd  * reset or state transition.
2406eb6f0de0SAdrian Chadd  *
2407eb6f0de0SAdrian Chadd  * (From Linux/reference):
2408eb6f0de0SAdrian Chadd  *
2409eb6f0de0SAdrian Chadd  * TODO: For frame(s) that are in the retry state, we will reuse the
2410eb6f0de0SAdrian Chadd  * sequence number(s) without setting the retry bit. The
2411eb6f0de0SAdrian Chadd  * alternative is to give up on these and BAR the receiver's window
2412eb6f0de0SAdrian Chadd  * forward.
2413eb6f0de0SAdrian Chadd  */
2414eb6f0de0SAdrian Chadd static void
2415d4365d16SAdrian Chadd ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
2416d4365d16SAdrian Chadd     struct ath_tid *tid, ath_bufhead *bf_cq)
2417eb6f0de0SAdrian Chadd {
2418eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
2419eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2420eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
2421eb6f0de0SAdrian Chadd 	int t = 0;
2422eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2423eb6f0de0SAdrian Chadd 
2424eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
2425eb6f0de0SAdrian Chadd 
2426eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
2427eb6f0de0SAdrian Chadd 
2428eb6f0de0SAdrian Chadd 	/* Walk the queue, free frames */
2429eb6f0de0SAdrian Chadd 	for (;;) {
2430eb6f0de0SAdrian Chadd 		bf = TAILQ_FIRST(&tid->axq_q);
2431eb6f0de0SAdrian Chadd 		if (bf == NULL) {
2432eb6f0de0SAdrian Chadd 			break;
2433eb6f0de0SAdrian Chadd 		}
2434eb6f0de0SAdrian Chadd 
2435eb6f0de0SAdrian Chadd 		if (t == 0) {
2436eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev,
2437eb6f0de0SAdrian Chadd 			    "%s: node %p: tid %d: txq_depth=%d, "
2438eb6f0de0SAdrian Chadd 			    "txq_aggr_depth=%d, sched=%d, paused=%d, "
2439d4365d16SAdrian Chadd 			    "hwq_depth=%d, incomp=%d, baw_head=%d, "
2440d4365d16SAdrian Chadd 			    "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
2441eb6f0de0SAdrian Chadd 			     __func__, ni, tid->tid, txq->axq_depth,
2442eb6f0de0SAdrian Chadd 			     txq->axq_aggr_depth, tid->sched, tid->paused,
2443eb6f0de0SAdrian Chadd 			     tid->hwq_depth, tid->incomp, tid->baw_head,
2444eb6f0de0SAdrian Chadd 			     tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
2445eb6f0de0SAdrian Chadd 			     ni->ni_txseqs[tid->tid]);
2446c0711b97SAdrian Chadd 
2447c0711b97SAdrian Chadd 			/* XXX Dump the frame, see what it is? */
2448c0711b97SAdrian Chadd 			ieee80211_dump_pkt(ni->ni_ic,
2449c0711b97SAdrian Chadd 			    mtod(bf->bf_m, const uint8_t *),
2450c0711b97SAdrian Chadd 			    bf->bf_m->m_len, 0, -1);
2451c0711b97SAdrian Chadd 
2452eb6f0de0SAdrian Chadd 			t = 1;
2453eb6f0de0SAdrian Chadd 		}
2454eb6f0de0SAdrian Chadd 
2455eb6f0de0SAdrian Chadd 
2456eb6f0de0SAdrian Chadd 		/*
2457eb6f0de0SAdrian Chadd 		 * If the current TID is running AMPDU, update
2458eb6f0de0SAdrian Chadd 		 * the BAW.
2459eb6f0de0SAdrian Chadd 		 */
2460eb6f0de0SAdrian Chadd 		if (ath_tx_ampdu_running(sc, an, tid->tid) &&
2461eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_dobaw) {
2462eb6f0de0SAdrian Chadd 			/*
2463eb6f0de0SAdrian Chadd 			 * Only remove the frame from the BAW if it's
2464eb6f0de0SAdrian Chadd 			 * been transmitted at least once; this means
2465eb6f0de0SAdrian Chadd 			 * the frame was in the BAW to begin with.
2466eb6f0de0SAdrian Chadd 			 */
2467eb6f0de0SAdrian Chadd 			if (bf->bf_state.bfs_retries > 0) {
2468eb6f0de0SAdrian Chadd 				ath_tx_update_baw(sc, an, tid, bf);
2469eb6f0de0SAdrian Chadd 				bf->bf_state.bfs_dobaw = 0;
2470eb6f0de0SAdrian Chadd 			}
2471eb6f0de0SAdrian Chadd 			/*
2472eb6f0de0SAdrian Chadd 			 * This has become a non-fatal error now
2473eb6f0de0SAdrian Chadd 			 */
2474eb6f0de0SAdrian Chadd 			if (! bf->bf_state.bfs_addedbaw)
2475eb6f0de0SAdrian Chadd 				device_printf(sc->sc_dev,
2476eb6f0de0SAdrian Chadd 				    "%s: wasn't added: seqno %d\n",
2477eb6f0de0SAdrian Chadd 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
2478eb6f0de0SAdrian Chadd 		}
2479eb6f0de0SAdrian Chadd 		ATH_TXQ_REMOVE(tid, bf, bf_list);
2480eb6f0de0SAdrian Chadd 		TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
2481eb6f0de0SAdrian Chadd 	}
2482eb6f0de0SAdrian Chadd 
2483eb6f0de0SAdrian Chadd 	/*
2484eb6f0de0SAdrian Chadd 	 * Now that it's completed, grab the TID lock and update
2485eb6f0de0SAdrian Chadd 	 * the sequence number and BAW window.
2486eb6f0de0SAdrian Chadd 	 * Because sequence numbers have been assigned to frames
2487eb6f0de0SAdrian Chadd 	 * that haven't been sent yet, it's entirely possible
2488eb6f0de0SAdrian Chadd 	 * we'll be called with some pending frames that have not
2489eb6f0de0SAdrian Chadd 	 * been transmitted.
2490eb6f0de0SAdrian Chadd 	 *
2491eb6f0de0SAdrian Chadd 	 * The cleaner solution is to do the sequence number allocation
2492eb6f0de0SAdrian Chadd 	 * when the packet is first transmitted - and thus the "retries"
2493eb6f0de0SAdrian Chadd 	 * check above would be enough to update the BAW/seqno.
2494eb6f0de0SAdrian Chadd 	 */
2495eb6f0de0SAdrian Chadd 
2496eb6f0de0SAdrian Chadd 	/* But don't do it for non-QoS TIDs */
2497eb6f0de0SAdrian Chadd 	if (tap) {
2498eb6f0de0SAdrian Chadd #if 0
2499eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
2500eb6f0de0SAdrian Chadd 		    "%s: node %p: TID %d: sliding BAW left edge to %d\n",
2501eb6f0de0SAdrian Chadd 		    __func__, an, tid->tid, tap->txa_start);
2502eb6f0de0SAdrian Chadd #endif
2503eb6f0de0SAdrian Chadd 		ni->ni_txseqs[tid->tid] = tap->txa_start;
2504eb6f0de0SAdrian Chadd 		tid->baw_tail = tid->baw_head;
2505eb6f0de0SAdrian Chadd 	}
2506eb6f0de0SAdrian Chadd }
2507eb6f0de0SAdrian Chadd 
2508eb6f0de0SAdrian Chadd /*
2509eb6f0de0SAdrian Chadd  * Flush all software queued packets for the given node.
2510eb6f0de0SAdrian Chadd  *
2511eb6f0de0SAdrian Chadd  * This occurs when a completion handler frees the last buffer
2512eb6f0de0SAdrian Chadd  * for a node, and the node is thus freed. This causes the node
2513eb6f0de0SAdrian Chadd  * to be cleaned up, which ends up calling ath_tx_node_flush.
2514eb6f0de0SAdrian Chadd  */
2515eb6f0de0SAdrian Chadd void
2516eb6f0de0SAdrian Chadd ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
2517eb6f0de0SAdrian Chadd {
2518eb6f0de0SAdrian Chadd 	int tid;
2519eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
2520eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
2521eb6f0de0SAdrian Chadd 
2522eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
2523eb6f0de0SAdrian Chadd 
2524eb6f0de0SAdrian Chadd 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
2525eb6f0de0SAdrian Chadd 		struct ath_tid *atid = &an->an_tid[tid];
2526eb6f0de0SAdrian Chadd 		struct ath_txq *txq = sc->sc_ac2q[atid->ac];
2527eb6f0de0SAdrian Chadd 
2528eb6f0de0SAdrian Chadd 		/* Remove this tid from the list of active tids */
2529eb6f0de0SAdrian Chadd 		ATH_TXQ_LOCK(txq);
2530eb6f0de0SAdrian Chadd 		ath_tx_tid_unsched(sc, atid);
2531eb6f0de0SAdrian Chadd 
2532eb6f0de0SAdrian Chadd 		/* Free packets */
2533eb6f0de0SAdrian Chadd 		ath_tx_tid_drain(sc, an, atid, &bf_cq);
2534eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(txq);
2535eb6f0de0SAdrian Chadd 	}
2536eb6f0de0SAdrian Chadd 
2537eb6f0de0SAdrian Chadd 	/* Handle completed frames */
2538eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
2539eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
2540eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
2541eb6f0de0SAdrian Chadd 	}
2542eb6f0de0SAdrian Chadd }
2543eb6f0de0SAdrian Chadd 
2544eb6f0de0SAdrian Chadd /*
2545eb6f0de0SAdrian Chadd  * Drain all the software TXQs currently with traffic queued.
2546eb6f0de0SAdrian Chadd  */
2547eb6f0de0SAdrian Chadd void
2548eb6f0de0SAdrian Chadd ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
2549eb6f0de0SAdrian Chadd {
2550eb6f0de0SAdrian Chadd 	struct ath_tid *tid;
2551eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
2552eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
2553eb6f0de0SAdrian Chadd 
2554eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
2555eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(txq);
2556eb6f0de0SAdrian Chadd 
2557eb6f0de0SAdrian Chadd 	/*
2558eb6f0de0SAdrian Chadd 	 * Iterate over all active tids for the given txq,
2559eb6f0de0SAdrian Chadd 	 * flushing and unsched'ing them
2560eb6f0de0SAdrian Chadd 	 */
2561eb6f0de0SAdrian Chadd 	while (! TAILQ_EMPTY(&txq->axq_tidq)) {
2562eb6f0de0SAdrian Chadd 		tid = TAILQ_FIRST(&txq->axq_tidq);
2563eb6f0de0SAdrian Chadd 		ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
2564eb6f0de0SAdrian Chadd 		ath_tx_tid_unsched(sc, tid);
2565eb6f0de0SAdrian Chadd 	}
2566eb6f0de0SAdrian Chadd 
2567eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(txq);
2568eb6f0de0SAdrian Chadd 
2569eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
2570eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
2571eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
2572eb6f0de0SAdrian Chadd 	}
2573eb6f0de0SAdrian Chadd }
2574eb6f0de0SAdrian Chadd 
2575eb6f0de0SAdrian Chadd /*
2576eb6f0de0SAdrian Chadd  * Handle completion of non-aggregate session frames.
2577eb6f0de0SAdrian Chadd  */
2578eb6f0de0SAdrian Chadd void
2579eb6f0de0SAdrian Chadd ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
2580eb6f0de0SAdrian Chadd {
2581eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
2582eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
2583eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
2584eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
2585eb6f0de0SAdrian Chadd 	struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
2586eb6f0de0SAdrian Chadd 
2587eb6f0de0SAdrian Chadd 	/* The TID state is protected behind the TXQ lock */
2588eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
2589eb6f0de0SAdrian Chadd 
2590eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
2591eb6f0de0SAdrian Chadd 	    __func__, bf, fail, atid->hwq_depth - 1);
2592eb6f0de0SAdrian Chadd 
2593eb6f0de0SAdrian Chadd 	atid->hwq_depth--;
2594eb6f0de0SAdrian Chadd 	if (atid->hwq_depth < 0)
2595eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
2596eb6f0de0SAdrian Chadd 		    __func__, atid->hwq_depth);
2597eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
2598eb6f0de0SAdrian Chadd 
2599eb6f0de0SAdrian Chadd 	/*
2600eb6f0de0SAdrian Chadd 	 * punt to rate control if we're not being cleaned up
2601eb6f0de0SAdrian Chadd 	 * during a hw queue drain and the frame wanted an ACK.
2602eb6f0de0SAdrian Chadd 	 */
2603eb6f0de0SAdrian Chadd 	if (fail == 0 && ((bf->bf_txflags & HAL_TXDESC_NOACK) == 0))
2604eb6f0de0SAdrian Chadd 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
2605eb6f0de0SAdrian Chadd 		    ts, bf->bf_state.bfs_pktlen,
2606eb6f0de0SAdrian Chadd 		    1, (ts->ts_status == 0) ? 0 : 1);
2607eb6f0de0SAdrian Chadd 
2608eb6f0de0SAdrian Chadd 	ath_tx_default_comp(sc, bf, fail);
2609eb6f0de0SAdrian Chadd }
2610eb6f0de0SAdrian Chadd 
2611eb6f0de0SAdrian Chadd /*
2612eb6f0de0SAdrian Chadd  * Handle cleanup of aggregate session packets that aren't
2613eb6f0de0SAdrian Chadd  * an A-MPDU.
2614eb6f0de0SAdrian Chadd  *
2615eb6f0de0SAdrian Chadd  * There's no need to update the BAW here - the session is being
2616eb6f0de0SAdrian Chadd  * torn down.
2617eb6f0de0SAdrian Chadd  */
2618eb6f0de0SAdrian Chadd static void
2619eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
2620eb6f0de0SAdrian Chadd {
2621eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
2622eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
2623eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
2624eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
2625eb6f0de0SAdrian Chadd 
2626eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
2627eb6f0de0SAdrian Chadd 	    __func__, tid, atid->incomp);
2628eb6f0de0SAdrian Chadd 
2629eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
2630eb6f0de0SAdrian Chadd 	atid->incomp--;
2631eb6f0de0SAdrian Chadd 	if (atid->incomp == 0) {
2632eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
2633eb6f0de0SAdrian Chadd 		    "%s: TID %d: cleaned up! resume!\n",
2634eb6f0de0SAdrian Chadd 		    __func__, tid);
2635eb6f0de0SAdrian Chadd 		atid->cleanup_inprogress = 0;
2636eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
2637eb6f0de0SAdrian Chadd 	}
2638eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
2639eb6f0de0SAdrian Chadd 
2640eb6f0de0SAdrian Chadd 	ath_tx_default_comp(sc, bf, 0);
2641eb6f0de0SAdrian Chadd }
2642eb6f0de0SAdrian Chadd 
2643eb6f0de0SAdrian Chadd /*
2644eb6f0de0SAdrian Chadd  * Performs transmit side cleanup when TID changes from aggregated to
2645eb6f0de0SAdrian Chadd  * unaggregated.
2646eb6f0de0SAdrian Chadd  *
2647eb6f0de0SAdrian Chadd  * - Discard all retry frames from the s/w queue.
2648eb6f0de0SAdrian Chadd  * - Fix the tx completion function for all buffers in s/w queue.
2649eb6f0de0SAdrian Chadd  * - Count the number of unacked frames, and let transmit completion
2650eb6f0de0SAdrian Chadd  *   handle it later.
2651eb6f0de0SAdrian Chadd  *
2652eb6f0de0SAdrian Chadd  * The caller is responsible for pausing the TID.
2653eb6f0de0SAdrian Chadd  */
2654eb6f0de0SAdrian Chadd static void
2655eb6f0de0SAdrian Chadd ath_tx_cleanup(struct ath_softc *sc, struct ath_node *an, int tid)
2656eb6f0de0SAdrian Chadd {
2657eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
2658eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2659eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_next;
2660eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
2661eb6f0de0SAdrian Chadd 
2662eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
2663eb6f0de0SAdrian Chadd 	    "%s: TID %d: called\n", __func__, tid);
2664eb6f0de0SAdrian Chadd 
2665eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
2666eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
2667eb6f0de0SAdrian Chadd 
2668eb6f0de0SAdrian Chadd 	/*
2669eb6f0de0SAdrian Chadd 	 * Update the frames in the software TX queue:
2670eb6f0de0SAdrian Chadd 	 *
2671eb6f0de0SAdrian Chadd 	 * + Discard retry frames in the queue
2672eb6f0de0SAdrian Chadd 	 * + Fix the completion function to be non-aggregate
2673eb6f0de0SAdrian Chadd 	 */
2674eb6f0de0SAdrian Chadd 	bf = TAILQ_FIRST(&atid->axq_q);
2675eb6f0de0SAdrian Chadd 	while (bf) {
2676eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_isretried) {
2677eb6f0de0SAdrian Chadd 			bf_next = TAILQ_NEXT(bf, bf_list);
2678eb6f0de0SAdrian Chadd 			TAILQ_REMOVE(&atid->axq_q, bf, bf_list);
2679eb6f0de0SAdrian Chadd 			atid->axq_depth--;
2680eb6f0de0SAdrian Chadd 			if (bf->bf_state.bfs_dobaw) {
2681eb6f0de0SAdrian Chadd 				ath_tx_update_baw(sc, an, atid, bf);
2682eb6f0de0SAdrian Chadd 				if (! bf->bf_state.bfs_addedbaw)
2683eb6f0de0SAdrian Chadd 					device_printf(sc->sc_dev,
2684eb6f0de0SAdrian Chadd 					    "%s: wasn't added: seqno %d\n",
2685d4365d16SAdrian Chadd 					    __func__,
2686d4365d16SAdrian Chadd 					    SEQNO(bf->bf_state.bfs_seqno));
2687eb6f0de0SAdrian Chadd 			}
2688eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
2689eb6f0de0SAdrian Chadd 			/*
2690eb6f0de0SAdrian Chadd 			 * Call the default completion handler with "fail" just
2691eb6f0de0SAdrian Chadd 			 * so upper levels are suitably notified about this.
2692eb6f0de0SAdrian Chadd 			 */
2693eb6f0de0SAdrian Chadd 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
2694eb6f0de0SAdrian Chadd 			bf = bf_next;
2695eb6f0de0SAdrian Chadd 			continue;
2696eb6f0de0SAdrian Chadd 		}
2697eb6f0de0SAdrian Chadd 		/* Give these the default completion handler */
2698eb6f0de0SAdrian Chadd 		bf->bf_comp = ath_tx_normal_comp;
2699eb6f0de0SAdrian Chadd 		bf = TAILQ_NEXT(bf, bf_list);
2700eb6f0de0SAdrian Chadd 	}
2701eb6f0de0SAdrian Chadd 
2702eb6f0de0SAdrian Chadd 	/* The caller is required to pause the TID */
2703eb6f0de0SAdrian Chadd #if 0
2704eb6f0de0SAdrian Chadd 	/* Pause the TID */
2705eb6f0de0SAdrian Chadd 	ath_tx_tid_pause(sc, atid);
2706eb6f0de0SAdrian Chadd #endif
2707eb6f0de0SAdrian Chadd 
2708eb6f0de0SAdrian Chadd 	/*
2709eb6f0de0SAdrian Chadd 	 * Calculate what hardware-queued frames exist based
2710eb6f0de0SAdrian Chadd 	 * on the current BAW size. Ie, what frames have been
2711eb6f0de0SAdrian Chadd 	 * added to the TX hardware queue for this TID but
2712eb6f0de0SAdrian Chadd 	 * not yet ACKed.
2713eb6f0de0SAdrian Chadd 	 */
2714eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
2715eb6f0de0SAdrian Chadd 	/* Need the lock - fiddling with BAW */
2716eb6f0de0SAdrian Chadd 	while (atid->baw_head != atid->baw_tail) {
2717eb6f0de0SAdrian Chadd 		if (atid->tx_buf[atid->baw_head]) {
2718eb6f0de0SAdrian Chadd 			atid->incomp++;
2719eb6f0de0SAdrian Chadd 			atid->cleanup_inprogress = 1;
2720eb6f0de0SAdrian Chadd 			atid->tx_buf[atid->baw_head] = NULL;
2721eb6f0de0SAdrian Chadd 		}
2722eb6f0de0SAdrian Chadd 		INCR(atid->baw_head, ATH_TID_MAX_BUFS);
2723eb6f0de0SAdrian Chadd 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2724eb6f0de0SAdrian Chadd 	}
2725eb6f0de0SAdrian Chadd 
2726eb6f0de0SAdrian Chadd 	/*
2727eb6f0de0SAdrian Chadd 	 * If cleanup is required, defer TID scheduling
2728eb6f0de0SAdrian Chadd 	 * until all the HW queued packets have been
2729eb6f0de0SAdrian Chadd 	 * sent.
2730eb6f0de0SAdrian Chadd 	 */
2731eb6f0de0SAdrian Chadd 	if (! atid->cleanup_inprogress)
2732eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
2733eb6f0de0SAdrian Chadd 
2734eb6f0de0SAdrian Chadd 	if (atid->cleanup_inprogress)
2735eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
2736eb6f0de0SAdrian Chadd 		    "%s: TID %d: cleanup needed: %d packets\n",
2737eb6f0de0SAdrian Chadd 		    __func__, tid, atid->incomp);
2738eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
2739eb6f0de0SAdrian Chadd 
2740eb6f0de0SAdrian Chadd 	/* Handle completing frames and fail them */
2741eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
2742eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
2743eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 1);
2744eb6f0de0SAdrian Chadd 	}
2745eb6f0de0SAdrian Chadd }
2746eb6f0de0SAdrian Chadd 
2747eb6f0de0SAdrian Chadd static void
2748eb6f0de0SAdrian Chadd ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
2749eb6f0de0SAdrian Chadd {
2750eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh;
2751eb6f0de0SAdrian Chadd 
2752eb6f0de0SAdrian Chadd 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
2753eb6f0de0SAdrian Chadd 	/* Only update/resync if needed */
2754eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_isretried == 0) {
2755eb6f0de0SAdrian Chadd 		wh->i_fc[1] |= IEEE80211_FC1_RETRY;
2756eb6f0de0SAdrian Chadd 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
2757eb6f0de0SAdrian Chadd 		    BUS_DMASYNC_PREWRITE);
2758eb6f0de0SAdrian Chadd 	}
2759eb6f0de0SAdrian Chadd 	sc->sc_stats.ast_tx_swretries++;
2760eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_isretried = 1;
2761eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_retries ++;
2762eb6f0de0SAdrian Chadd }
2763eb6f0de0SAdrian Chadd 
2764eb6f0de0SAdrian Chadd static struct ath_buf *
276538962489SAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
276638962489SAdrian Chadd     struct ath_tid *tid, struct ath_buf *bf)
2767eb6f0de0SAdrian Chadd {
2768eb6f0de0SAdrian Chadd 	struct ath_buf *nbf;
2769eb6f0de0SAdrian Chadd 	int error;
2770eb6f0de0SAdrian Chadd 
2771eb6f0de0SAdrian Chadd 	nbf = ath_buf_clone(sc, bf);
2772eb6f0de0SAdrian Chadd 
2773eb6f0de0SAdrian Chadd #if 0
2774eb6f0de0SAdrian Chadd 	device_printf(sc->sc_dev, "%s: ATH_BUF_BUSY; cloning\n",
2775eb6f0de0SAdrian Chadd 	    __func__);
2776eb6f0de0SAdrian Chadd #endif
2777eb6f0de0SAdrian Chadd 
2778eb6f0de0SAdrian Chadd 	if (nbf == NULL) {
2779eb6f0de0SAdrian Chadd 		/* Failed to clone */
2780eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2781eb6f0de0SAdrian Chadd 		    "%s: failed to clone a busy buffer\n",
2782eb6f0de0SAdrian Chadd 		    __func__);
2783eb6f0de0SAdrian Chadd 		return NULL;
2784eb6f0de0SAdrian Chadd 	}
2785eb6f0de0SAdrian Chadd 
2786eb6f0de0SAdrian Chadd 	/* Setup the dma for the new buffer */
2787eb6f0de0SAdrian Chadd 	error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
2788eb6f0de0SAdrian Chadd 	if (error != 0) {
2789eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2790eb6f0de0SAdrian Chadd 		    "%s: failed to setup dma for clone\n",
2791eb6f0de0SAdrian Chadd 		    __func__);
2792eb6f0de0SAdrian Chadd 		/*
2793eb6f0de0SAdrian Chadd 		 * Put this at the head of the list, not tail;
2794eb6f0de0SAdrian Chadd 		 * that way it doesn't interfere with the
2795eb6f0de0SAdrian Chadd 		 * busy buffer logic (which uses the tail of
2796eb6f0de0SAdrian Chadd 		 * the list.)
2797eb6f0de0SAdrian Chadd 		 */
2798eb6f0de0SAdrian Chadd 		ATH_TXBUF_LOCK(sc);
2799eb6f0de0SAdrian Chadd 		TAILQ_INSERT_HEAD(&sc->sc_txbuf, nbf, bf_list);
2800eb6f0de0SAdrian Chadd 		ATH_TXBUF_UNLOCK(sc);
2801eb6f0de0SAdrian Chadd 		return NULL;
2802eb6f0de0SAdrian Chadd 	}
2803eb6f0de0SAdrian Chadd 
280438962489SAdrian Chadd 	/* Update BAW if required, before we free the original buf */
280538962489SAdrian Chadd 	if (bf->bf_state.bfs_dobaw)
280638962489SAdrian Chadd 		ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
280738962489SAdrian Chadd 
2808eb6f0de0SAdrian Chadd 	/* Free current buffer; return the older buffer */
2809eb6f0de0SAdrian Chadd 	bf->bf_m = NULL;
2810eb6f0de0SAdrian Chadd 	bf->bf_node = NULL;
2811eb6f0de0SAdrian Chadd 	ath_freebuf(sc, bf);
2812eb6f0de0SAdrian Chadd 	return nbf;
2813eb6f0de0SAdrian Chadd }
2814eb6f0de0SAdrian Chadd 
2815eb6f0de0SAdrian Chadd /*
2816eb6f0de0SAdrian Chadd  * Handle retrying an unaggregate frame in an aggregate
2817eb6f0de0SAdrian Chadd  * session.
2818eb6f0de0SAdrian Chadd  *
2819eb6f0de0SAdrian Chadd  * If too many retries occur, pause the TID, wait for
2820eb6f0de0SAdrian Chadd  * any further retransmits (as there's no reason why
2821eb6f0de0SAdrian Chadd  * non-aggregate frames in an aggregate session are
2822eb6f0de0SAdrian Chadd  * transmitted in-order; they just have to be in-BAW)
2823eb6f0de0SAdrian Chadd  * and then queue a BAR.
2824eb6f0de0SAdrian Chadd  */
2825eb6f0de0SAdrian Chadd static void
2826eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
2827eb6f0de0SAdrian Chadd {
2828eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
2829eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
2830eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
2831eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
2832eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2833eb6f0de0SAdrian Chadd 	int txseq;
2834eb6f0de0SAdrian Chadd 
2835eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
2836eb6f0de0SAdrian Chadd 
2837eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
2838eb6f0de0SAdrian Chadd 
2839eb6f0de0SAdrian Chadd 	/*
2840eb6f0de0SAdrian Chadd 	 * If the buffer is marked as busy, we can't directly
2841eb6f0de0SAdrian Chadd 	 * reuse it. Instead, try to clone the buffer.
2842eb6f0de0SAdrian Chadd 	 * If the clone is successful, recycle the old buffer.
2843eb6f0de0SAdrian Chadd 	 * If the clone is unsuccessful, set bfs_retries to max
2844eb6f0de0SAdrian Chadd 	 * to force the next bit of code to free the buffer
2845eb6f0de0SAdrian Chadd 	 * for us.
2846eb6f0de0SAdrian Chadd 	 */
2847eb6f0de0SAdrian Chadd 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
2848eb6f0de0SAdrian Chadd 	    (bf->bf_flags & ATH_BUF_BUSY)) {
2849eb6f0de0SAdrian Chadd 		struct ath_buf *nbf;
285038962489SAdrian Chadd 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
2851eb6f0de0SAdrian Chadd 		if (nbf)
2852eb6f0de0SAdrian Chadd 			/* bf has been freed at this point */
2853eb6f0de0SAdrian Chadd 			bf = nbf;
2854eb6f0de0SAdrian Chadd 		else
2855eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
2856eb6f0de0SAdrian Chadd 	}
2857eb6f0de0SAdrian Chadd 
2858eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
2859eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
2860eb6f0de0SAdrian Chadd 		    "%s: exceeded retries; seqno %d\n",
2861eb6f0de0SAdrian Chadd 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
2862eb6f0de0SAdrian Chadd 		sc->sc_stats.ast_tx_swretrymax++;
2863eb6f0de0SAdrian Chadd 
2864eb6f0de0SAdrian Chadd 		/* Update BAW anyway */
2865eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_dobaw) {
2866eb6f0de0SAdrian Chadd 			ath_tx_update_baw(sc, an, atid, bf);
2867eb6f0de0SAdrian Chadd 			if (! bf->bf_state.bfs_addedbaw)
2868eb6f0de0SAdrian Chadd 				device_printf(sc->sc_dev,
2869eb6f0de0SAdrian Chadd 				    "%s: wasn't added: seqno %d\n",
2870eb6f0de0SAdrian Chadd 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
2871eb6f0de0SAdrian Chadd 		}
2872eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_dobaw = 0;
2873eb6f0de0SAdrian Chadd 
2874eb6f0de0SAdrian Chadd 		/* Send BAR frame */
2875eb6f0de0SAdrian Chadd 		/*
2876eb6f0de0SAdrian Chadd 		 * This'll end up going into net80211 and back out
2877eb6f0de0SAdrian Chadd 		 * again, via ic->ic_raw_xmit().
2878eb6f0de0SAdrian Chadd 		 */
2879eb6f0de0SAdrian Chadd 		txseq = tap->txa_start;
2880eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
2881eb6f0de0SAdrian Chadd 
2882eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2883eb6f0de0SAdrian Chadd 		    "%s: TID %d: send BAR; seq %d\n", __func__, tid, txseq);
2884eb6f0de0SAdrian Chadd 
2885eb6f0de0SAdrian Chadd 		/* XXX TODO: send BAR */
2886eb6f0de0SAdrian Chadd 
2887eb6f0de0SAdrian Chadd 		/* Free buffer, bf is free after this call */
2888eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
2889eb6f0de0SAdrian Chadd 		return;
2890eb6f0de0SAdrian Chadd 	}
2891eb6f0de0SAdrian Chadd 
2892eb6f0de0SAdrian Chadd 	/*
2893eb6f0de0SAdrian Chadd 	 * This increments the retry counter as well as
2894eb6f0de0SAdrian Chadd 	 * sets the retry flag in the ath_buf and packet
2895eb6f0de0SAdrian Chadd 	 * body.
2896eb6f0de0SAdrian Chadd 	 */
2897eb6f0de0SAdrian Chadd 	ath_tx_set_retry(sc, bf);
2898eb6f0de0SAdrian Chadd 
2899eb6f0de0SAdrian Chadd 	/*
2900eb6f0de0SAdrian Chadd 	 * Insert this at the head of the queue, so it's
2901eb6f0de0SAdrian Chadd 	 * retried before any current/subsequent frames.
2902eb6f0de0SAdrian Chadd 	 */
2903eb6f0de0SAdrian Chadd 	ATH_TXQ_INSERT_HEAD(atid, bf, bf_list);
2904eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, atid);
2905eb6f0de0SAdrian Chadd 
2906eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
2907eb6f0de0SAdrian Chadd }
2908eb6f0de0SAdrian Chadd 
2909eb6f0de0SAdrian Chadd /*
2910eb6f0de0SAdrian Chadd  * Common code for aggregate excessive retry/subframe retry.
2911eb6f0de0SAdrian Chadd  * If retrying, queues buffers to bf_q. If not, frees the
2912eb6f0de0SAdrian Chadd  * buffers.
2913eb6f0de0SAdrian Chadd  *
2914eb6f0de0SAdrian Chadd  * XXX should unify this with ath_tx_aggr_retry_unaggr()
2915eb6f0de0SAdrian Chadd  */
2916eb6f0de0SAdrian Chadd static int
2917eb6f0de0SAdrian Chadd ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
2918eb6f0de0SAdrian Chadd     ath_bufhead *bf_q)
2919eb6f0de0SAdrian Chadd {
2920eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
2921eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
2922eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
2923eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
2924eb6f0de0SAdrian Chadd 
2925eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[atid->ac]);
2926eb6f0de0SAdrian Chadd 
2927eb6f0de0SAdrian Chadd 	ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
2928eb6f0de0SAdrian Chadd 	ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
2929eb6f0de0SAdrian Chadd 	/* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
2930eb6f0de0SAdrian Chadd 
2931eb6f0de0SAdrian Chadd 	/*
2932eb6f0de0SAdrian Chadd 	 * If the buffer is marked as busy, we can't directly
2933eb6f0de0SAdrian Chadd 	 * reuse it. Instead, try to clone the buffer.
2934eb6f0de0SAdrian Chadd 	 * If the clone is successful, recycle the old buffer.
2935eb6f0de0SAdrian Chadd 	 * If the clone is unsuccessful, set bfs_retries to max
2936eb6f0de0SAdrian Chadd 	 * to force the next bit of code to free the buffer
2937eb6f0de0SAdrian Chadd 	 * for us.
2938eb6f0de0SAdrian Chadd 	 */
2939eb6f0de0SAdrian Chadd 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
2940eb6f0de0SAdrian Chadd 	    (bf->bf_flags & ATH_BUF_BUSY)) {
2941eb6f0de0SAdrian Chadd 		struct ath_buf *nbf;
294238962489SAdrian Chadd 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
2943eb6f0de0SAdrian Chadd 		if (nbf)
2944eb6f0de0SAdrian Chadd 			/* bf has been freed at this point */
2945eb6f0de0SAdrian Chadd 			bf = nbf;
2946eb6f0de0SAdrian Chadd 		else
2947eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
2948eb6f0de0SAdrian Chadd 	}
2949eb6f0de0SAdrian Chadd 
2950eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
2951eb6f0de0SAdrian Chadd 		sc->sc_stats.ast_tx_swretrymax++;
2952eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
2953eb6f0de0SAdrian Chadd 		    "%s: max retries: seqno %d\n",
2954eb6f0de0SAdrian Chadd 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
2955eb6f0de0SAdrian Chadd 		ath_tx_update_baw(sc, an, atid, bf);
2956eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_addedbaw)
2957eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev,
2958eb6f0de0SAdrian Chadd 			    "%s: wasn't added: seqno %d\n",
2959eb6f0de0SAdrian Chadd 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
2960eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_dobaw = 0;
2961eb6f0de0SAdrian Chadd 		return 1;
2962eb6f0de0SAdrian Chadd 	}
2963eb6f0de0SAdrian Chadd 
2964eb6f0de0SAdrian Chadd 	ath_tx_set_retry(sc, bf);
2965eb6f0de0SAdrian Chadd 	bf->bf_next = NULL;		/* Just to make sure */
2966eb6f0de0SAdrian Chadd 
2967eb6f0de0SAdrian Chadd 	TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
2968eb6f0de0SAdrian Chadd 	return 0;
2969eb6f0de0SAdrian Chadd }
2970eb6f0de0SAdrian Chadd 
2971eb6f0de0SAdrian Chadd /*
2972eb6f0de0SAdrian Chadd  * error pkt completion for an aggregate destination
2973eb6f0de0SAdrian Chadd  */
2974eb6f0de0SAdrian Chadd static void
2975eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
2976eb6f0de0SAdrian Chadd     struct ath_tid *tid)
2977eb6f0de0SAdrian Chadd {
2978eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf_first->bf_node;
2979eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
2980eb6f0de0SAdrian Chadd 	struct ath_buf *bf_next, *bf;
2981eb6f0de0SAdrian Chadd 	ath_bufhead bf_q;
2982eb6f0de0SAdrian Chadd 	int drops = 0;
2983eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2984eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
2985eb6f0de0SAdrian Chadd 
2986eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_q);
2987eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
2988eb6f0de0SAdrian Chadd 
2989eb6f0de0SAdrian Chadd 	/*
2990eb6f0de0SAdrian Chadd 	 * Update rate control - all frames have failed.
2991eb6f0de0SAdrian Chadd 	 *
2992eb6f0de0SAdrian Chadd 	 * XXX use the length in the first frame in the series;
2993eb6f0de0SAdrian Chadd 	 * XXX just so things are consistent for now.
2994eb6f0de0SAdrian Chadd 	 */
2995eb6f0de0SAdrian Chadd 	ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
2996eb6f0de0SAdrian Chadd 	    &bf_first->bf_status.ds_txstat,
2997eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_pktlen,
2998eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
2999eb6f0de0SAdrian Chadd 
3000eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[tid->ac]);
3001eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
30022d3d4776SAdrian Chadd 	sc->sc_stats.ast_tx_aggr_failall++;
3003eb6f0de0SAdrian Chadd 
3004eb6f0de0SAdrian Chadd 	/* Retry all subframes */
3005eb6f0de0SAdrian Chadd 	bf = bf_first;
3006eb6f0de0SAdrian Chadd 	while (bf) {
3007eb6f0de0SAdrian Chadd 		bf_next = bf->bf_next;
3008eb6f0de0SAdrian Chadd 		bf->bf_next = NULL;	/* Remove it from the aggr list */
30092d3d4776SAdrian Chadd 		sc->sc_stats.ast_tx_aggr_fail++;
3010eb6f0de0SAdrian Chadd 		if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
3011eb6f0de0SAdrian Chadd 			drops++;
3012eb6f0de0SAdrian Chadd 			bf->bf_next = NULL;
3013eb6f0de0SAdrian Chadd 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
3014eb6f0de0SAdrian Chadd 		}
3015eb6f0de0SAdrian Chadd 		bf = bf_next;
3016eb6f0de0SAdrian Chadd 	}
3017eb6f0de0SAdrian Chadd 
3018eb6f0de0SAdrian Chadd 	/* Prepend all frames to the beginning of the queue */
3019eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
3020eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_q, bf, bf_list);
3021eb6f0de0SAdrian Chadd 		ATH_TXQ_INSERT_HEAD(tid, bf, bf_list);
3022eb6f0de0SAdrian Chadd 	}
3023eb6f0de0SAdrian Chadd 
3024eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, tid);
3025eb6f0de0SAdrian Chadd 
3026eb6f0de0SAdrian Chadd 	/*
3027eb6f0de0SAdrian Chadd 	 * send bar if we dropped any frames
3028eb6f0de0SAdrian Chadd 	 *
3029eb6f0de0SAdrian Chadd 	 * Keep the txq lock held for now, as we need to ensure
3030eb6f0de0SAdrian Chadd 	 * that ni_txseqs[] is consistent (as it's being updated
3031eb6f0de0SAdrian Chadd 	 * in the ifnet TX context or raw TX context.)
3032eb6f0de0SAdrian Chadd 	 */
3033eb6f0de0SAdrian Chadd 	if (drops) {
3034eb6f0de0SAdrian Chadd 		int txseq = tap->txa_start;
3035eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(sc->sc_ac2q[tid->ac]);
3036eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
3037eb6f0de0SAdrian Chadd 		    "%s: TID %d: send BAR; seq %d\n",
3038eb6f0de0SAdrian Chadd 		    __func__, tid->tid, txseq);
3039eb6f0de0SAdrian Chadd 
3040eb6f0de0SAdrian Chadd 		/* XXX TODO: send BAR */
3041eb6f0de0SAdrian Chadd 	} else {
3042eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(sc->sc_ac2q[tid->ac]);
3043eb6f0de0SAdrian Chadd 	}
3044eb6f0de0SAdrian Chadd 
3045eb6f0de0SAdrian Chadd 	/* Complete frames which errored out */
3046eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3047eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
3048eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
3049eb6f0de0SAdrian Chadd 	}
3050eb6f0de0SAdrian Chadd }
3051eb6f0de0SAdrian Chadd 
3052eb6f0de0SAdrian Chadd /*
3053eb6f0de0SAdrian Chadd  * Handle clean-up of packets from an aggregate list.
3054eb6f0de0SAdrian Chadd  *
3055eb6f0de0SAdrian Chadd  * There's no need to update the BAW here - the session is being
3056eb6f0de0SAdrian Chadd  * torn down.
3057eb6f0de0SAdrian Chadd  */
3058eb6f0de0SAdrian Chadd static void
3059eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
3060eb6f0de0SAdrian Chadd {
3061eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_next;
3062eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf_first->bf_node;
3063eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3064eb6f0de0SAdrian Chadd 	int tid = bf_first->bf_state.bfs_tid;
3065eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3066eb6f0de0SAdrian Chadd 
3067eb6f0de0SAdrian Chadd 	bf = bf_first;
3068eb6f0de0SAdrian Chadd 
3069eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3070eb6f0de0SAdrian Chadd 
3071eb6f0de0SAdrian Chadd 	/* update incomp */
3072eb6f0de0SAdrian Chadd 	while (bf) {
3073eb6f0de0SAdrian Chadd 		atid->incomp--;
3074eb6f0de0SAdrian Chadd 		bf = bf->bf_next;
3075eb6f0de0SAdrian Chadd 	}
3076eb6f0de0SAdrian Chadd 
3077eb6f0de0SAdrian Chadd 	if (atid->incomp == 0) {
3078eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3079eb6f0de0SAdrian Chadd 		    "%s: TID %d: cleaned up! resume!\n",
3080eb6f0de0SAdrian Chadd 		    __func__, tid);
3081eb6f0de0SAdrian Chadd 		atid->cleanup_inprogress = 0;
3082eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
3083eb6f0de0SAdrian Chadd 	}
3084eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3085eb6f0de0SAdrian Chadd 
3086eb6f0de0SAdrian Chadd 	/* Handle frame completion */
3087eb6f0de0SAdrian Chadd 	while (bf) {
3088eb6f0de0SAdrian Chadd 		bf_next = bf->bf_next;
3089eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 1);
3090eb6f0de0SAdrian Chadd 		bf = bf_next;
3091eb6f0de0SAdrian Chadd 	}
3092eb6f0de0SAdrian Chadd }
3093eb6f0de0SAdrian Chadd 
3094eb6f0de0SAdrian Chadd /*
3095eb6f0de0SAdrian Chadd  * Handle completion of an set of aggregate frames.
3096eb6f0de0SAdrian Chadd  *
3097eb6f0de0SAdrian Chadd  * XXX for now, simply complete each sub-frame.
3098eb6f0de0SAdrian Chadd  *
3099eb6f0de0SAdrian Chadd  * Note: the completion handler is the last descriptor in the aggregate,
3100eb6f0de0SAdrian Chadd  * not the last descriptor in the first frame.
3101eb6f0de0SAdrian Chadd  */
3102eb6f0de0SAdrian Chadd static void
3103d4365d16SAdrian Chadd ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
3104d4365d16SAdrian Chadd     int fail)
3105eb6f0de0SAdrian Chadd {
3106eb6f0de0SAdrian Chadd 	//struct ath_desc *ds = bf->bf_lastds;
3107eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf_first->bf_node;
3108eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3109eb6f0de0SAdrian Chadd 	int tid = bf_first->bf_state.bfs_tid;
3110eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3111eb6f0de0SAdrian Chadd 	struct ath_tx_status ts;
3112eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3113eb6f0de0SAdrian Chadd 	ath_bufhead bf_q;
3114eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
3115eb6f0de0SAdrian Chadd 	int seq_st, tx_ok;
3116eb6f0de0SAdrian Chadd 	int hasba, isaggr;
3117eb6f0de0SAdrian Chadd 	uint32_t ba[2];
3118eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_next;
3119eb6f0de0SAdrian Chadd 	int ba_index;
3120eb6f0de0SAdrian Chadd 	int drops = 0;
3121eb6f0de0SAdrian Chadd 	int nframes = 0, nbad = 0, nf;
3122eb6f0de0SAdrian Chadd 	int pktlen;
3123eb6f0de0SAdrian Chadd 	/* XXX there's too much on the stack? */
3124eb6f0de0SAdrian Chadd 	struct ath_rc_series rc[4];
3125eb6f0de0SAdrian Chadd 	int txseq;
3126eb6f0de0SAdrian Chadd 
3127eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
3128eb6f0de0SAdrian Chadd 	    __func__, atid->hwq_depth);
3129eb6f0de0SAdrian Chadd 
3130eb6f0de0SAdrian Chadd 	/* The TID state is kept behind the TXQ lock */
3131eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3132eb6f0de0SAdrian Chadd 
3133eb6f0de0SAdrian Chadd 	atid->hwq_depth--;
3134eb6f0de0SAdrian Chadd 	if (atid->hwq_depth < 0)
3135eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
3136eb6f0de0SAdrian Chadd 		    __func__, atid->hwq_depth);
3137eb6f0de0SAdrian Chadd 
3138eb6f0de0SAdrian Chadd 	/*
3139eb6f0de0SAdrian Chadd 	 * Punt cleanup to the relevant function, not our problem now
3140eb6f0de0SAdrian Chadd 	 */
3141eb6f0de0SAdrian Chadd 	if (atid->cleanup_inprogress) {
3142eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3143eb6f0de0SAdrian Chadd 		ath_tx_comp_cleanup_aggr(sc, bf_first);
3144eb6f0de0SAdrian Chadd 		return;
3145eb6f0de0SAdrian Chadd 	}
3146eb6f0de0SAdrian Chadd 
3147eb6f0de0SAdrian Chadd 	/*
3148eb6f0de0SAdrian Chadd 	 * Take a copy; this may be needed -after- bf_first
3149eb6f0de0SAdrian Chadd 	 * has been completed and freed.
3150eb6f0de0SAdrian Chadd 	 */
3151eb6f0de0SAdrian Chadd 	ts = bf_first->bf_status.ds_txstat;
3152eb6f0de0SAdrian Chadd 	/*
3153eb6f0de0SAdrian Chadd 	 * XXX for now, use the first frame in the aggregate for
3154eb6f0de0SAdrian Chadd 	 * XXX rate control completion; it's at least consistent.
3155eb6f0de0SAdrian Chadd 	 */
3156eb6f0de0SAdrian Chadd 	pktlen = bf_first->bf_state.bfs_pktlen;
3157eb6f0de0SAdrian Chadd 
3158eb6f0de0SAdrian Chadd 	/*
3159eb6f0de0SAdrian Chadd 	 * handle errors first
3160eb6f0de0SAdrian Chadd 	 */
3161eb6f0de0SAdrian Chadd 	if (ts.ts_status & HAL_TXERR_XRETRY) {
3162eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3163eb6f0de0SAdrian Chadd 		ath_tx_comp_aggr_error(sc, bf_first, atid);
3164eb6f0de0SAdrian Chadd 		return;
3165eb6f0de0SAdrian Chadd 	}
3166eb6f0de0SAdrian Chadd 
3167eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_q);
3168eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
3169eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
3170eb6f0de0SAdrian Chadd 
3171eb6f0de0SAdrian Chadd 	/*
3172eb6f0de0SAdrian Chadd 	 * extract starting sequence and block-ack bitmap
3173eb6f0de0SAdrian Chadd 	 */
3174eb6f0de0SAdrian Chadd 	/* XXX endian-ness of seq_st, ba? */
3175eb6f0de0SAdrian Chadd 	seq_st = ts.ts_seqnum;
3176eb6f0de0SAdrian Chadd 	hasba = !! (ts.ts_flags & HAL_TX_BA);
3177eb6f0de0SAdrian Chadd 	tx_ok = (ts.ts_status == 0);
3178eb6f0de0SAdrian Chadd 	isaggr = bf_first->bf_state.bfs_aggr;
3179eb6f0de0SAdrian Chadd 	ba[0] = ts.ts_ba_low;
3180eb6f0de0SAdrian Chadd 	ba[1] = ts.ts_ba_high;
3181eb6f0de0SAdrian Chadd 
3182eb6f0de0SAdrian Chadd 	/*
3183eb6f0de0SAdrian Chadd 	 * Copy the TX completion status and the rate control
3184eb6f0de0SAdrian Chadd 	 * series from the first descriptor, as it may be freed
3185eb6f0de0SAdrian Chadd 	 * before the rate control code can get its grubby fingers
3186eb6f0de0SAdrian Chadd 	 * into things.
3187eb6f0de0SAdrian Chadd 	 */
3188eb6f0de0SAdrian Chadd 	memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
3189eb6f0de0SAdrian Chadd 
3190eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3191d4365d16SAdrian Chadd 	    "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
3192d4365d16SAdrian Chadd 	    "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
3193eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
3194eb6f0de0SAdrian Chadd 	    isaggr, seq_st, hasba, ba[0], ba[1]);
3195eb6f0de0SAdrian Chadd 
3196eb6f0de0SAdrian Chadd 	/* Occasionally, the MAC sends a tx status for the wrong TID. */
3197eb6f0de0SAdrian Chadd 	if (tid != ts.ts_tid) {
3198eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: tid %d != hw tid %d\n",
3199eb6f0de0SAdrian Chadd 		    __func__, tid, ts.ts_tid);
3200eb6f0de0SAdrian Chadd 		tx_ok = 0;
3201eb6f0de0SAdrian Chadd 	}
3202eb6f0de0SAdrian Chadd 
3203eb6f0de0SAdrian Chadd 	/* AR5416 BA bug; this requires an interface reset */
3204eb6f0de0SAdrian Chadd 	if (isaggr && tx_ok && (! hasba)) {
3205eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
3206d4365d16SAdrian Chadd 		    "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
3207d4365d16SAdrian Chadd 		    "seq_st=%d\n",
3208eb6f0de0SAdrian Chadd 		    __func__, hasba, tx_ok, isaggr, seq_st);
3209eb6f0de0SAdrian Chadd 		/* XXX TODO: schedule an interface reset */
3210eb6f0de0SAdrian Chadd 	}
3211eb6f0de0SAdrian Chadd 
3212eb6f0de0SAdrian Chadd 	/*
3213eb6f0de0SAdrian Chadd 	 * Walk the list of frames, figure out which ones were correctly
3214eb6f0de0SAdrian Chadd 	 * sent and which weren't.
3215eb6f0de0SAdrian Chadd 	 */
3216eb6f0de0SAdrian Chadd 	bf = bf_first;
3217eb6f0de0SAdrian Chadd 	nf = bf_first->bf_state.bfs_nframes;
3218eb6f0de0SAdrian Chadd 
3219eb6f0de0SAdrian Chadd 	/* bf_first is going to be invalid once this list is walked */
3220eb6f0de0SAdrian Chadd 	bf_first = NULL;
3221eb6f0de0SAdrian Chadd 
3222eb6f0de0SAdrian Chadd 	/*
3223eb6f0de0SAdrian Chadd 	 * Walk the list of completed frames and determine
3224eb6f0de0SAdrian Chadd 	 * which need to be completed and which need to be
3225eb6f0de0SAdrian Chadd 	 * retransmitted.
3226eb6f0de0SAdrian Chadd 	 *
3227eb6f0de0SAdrian Chadd 	 * For completed frames, the completion functions need
3228eb6f0de0SAdrian Chadd 	 * to be called at the end of this function as the last
3229eb6f0de0SAdrian Chadd 	 * node reference may free the node.
3230eb6f0de0SAdrian Chadd 	 *
3231eb6f0de0SAdrian Chadd 	 * Finally, since the TXQ lock can't be held during the
3232eb6f0de0SAdrian Chadd 	 * completion callback (to avoid lock recursion),
3233eb6f0de0SAdrian Chadd 	 * the completion calls have to be done outside of the
3234eb6f0de0SAdrian Chadd 	 * lock.
3235eb6f0de0SAdrian Chadd 	 */
3236eb6f0de0SAdrian Chadd 	while (bf) {
3237eb6f0de0SAdrian Chadd 		nframes++;
3238d4365d16SAdrian Chadd 		ba_index = ATH_BA_INDEX(seq_st,
3239d4365d16SAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno));
3240eb6f0de0SAdrian Chadd 		bf_next = bf->bf_next;
3241eb6f0de0SAdrian Chadd 		bf->bf_next = NULL;	/* Remove it from the aggr list */
3242eb6f0de0SAdrian Chadd 
3243eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3244eb6f0de0SAdrian Chadd 		    "%s: checking bf=%p seqno=%d; ack=%d\n",
3245eb6f0de0SAdrian Chadd 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
3246eb6f0de0SAdrian Chadd 		    ATH_BA_ISSET(ba, ba_index));
3247eb6f0de0SAdrian Chadd 
3248eb6f0de0SAdrian Chadd 		if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
32492d3d4776SAdrian Chadd 			sc->sc_stats.ast_tx_aggr_ok++;
3250eb6f0de0SAdrian Chadd 			ath_tx_update_baw(sc, an, atid, bf);
3251eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
3252eb6f0de0SAdrian Chadd 			if (! bf->bf_state.bfs_addedbaw)
3253eb6f0de0SAdrian Chadd 				device_printf(sc->sc_dev,
3254eb6f0de0SAdrian Chadd 				    "%s: wasn't added: seqno %d\n",
3255eb6f0de0SAdrian Chadd 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
3256eb6f0de0SAdrian Chadd 			bf->bf_next = NULL;
3257eb6f0de0SAdrian Chadd 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
3258eb6f0de0SAdrian Chadd 		} else {
32592d3d4776SAdrian Chadd 			sc->sc_stats.ast_tx_aggr_fail++;
3260eb6f0de0SAdrian Chadd 			if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
3261eb6f0de0SAdrian Chadd 				drops++;
3262eb6f0de0SAdrian Chadd 				bf->bf_next = NULL;
3263eb6f0de0SAdrian Chadd 				TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
3264eb6f0de0SAdrian Chadd 			}
3265eb6f0de0SAdrian Chadd 			nbad++;
3266eb6f0de0SAdrian Chadd 		}
3267eb6f0de0SAdrian Chadd 		bf = bf_next;
3268eb6f0de0SAdrian Chadd 	}
3269eb6f0de0SAdrian Chadd 
3270eb6f0de0SAdrian Chadd 	/*
3271eb6f0de0SAdrian Chadd 	 * Now that the BAW updates have been done, unlock
3272eb6f0de0SAdrian Chadd 	 *
3273eb6f0de0SAdrian Chadd 	 * txseq is grabbed before the lock is released so we
3274eb6f0de0SAdrian Chadd 	 * have a consistent view of what -was- in the BAW.
3275eb6f0de0SAdrian Chadd 	 * Anything after this point will not yet have been
3276eb6f0de0SAdrian Chadd 	 * TXed.
3277eb6f0de0SAdrian Chadd 	 */
3278eb6f0de0SAdrian Chadd 	txseq = tap->txa_start;
3279eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3280eb6f0de0SAdrian Chadd 
3281eb6f0de0SAdrian Chadd 	if (nframes != nf)
3282eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
3283eb6f0de0SAdrian Chadd 		    "%s: num frames seen=%d; bf nframes=%d\n",
3284eb6f0de0SAdrian Chadd 		    __func__, nframes, nf);
3285eb6f0de0SAdrian Chadd 
3286eb6f0de0SAdrian Chadd 	/*
3287eb6f0de0SAdrian Chadd 	 * Now we know how many frames were bad, call the rate
3288eb6f0de0SAdrian Chadd 	 * control code.
3289eb6f0de0SAdrian Chadd 	 */
3290eb6f0de0SAdrian Chadd 	if (fail == 0)
3291d4365d16SAdrian Chadd 		ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes,
3292d4365d16SAdrian Chadd 		    nbad);
3293eb6f0de0SAdrian Chadd 
3294eb6f0de0SAdrian Chadd 	/*
3295eb6f0de0SAdrian Chadd 	 * send bar if we dropped any frames
3296eb6f0de0SAdrian Chadd 	 */
3297eb6f0de0SAdrian Chadd 	if (drops) {
3298eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
3299eb6f0de0SAdrian Chadd 		    "%s: TID %d: send BAR; seq %d\n", __func__, tid, txseq);
3300eb6f0de0SAdrian Chadd 		/* XXX TODO: send BAR */
3301eb6f0de0SAdrian Chadd 	}
3302eb6f0de0SAdrian Chadd 
3303eb6f0de0SAdrian Chadd 	/* Prepend all frames to the beginning of the queue */
3304eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3305eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
3306eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_q, bf, bf_list);
3307eb6f0de0SAdrian Chadd 		ATH_TXQ_INSERT_HEAD(atid, bf, bf_list);
3308eb6f0de0SAdrian Chadd 	}
3309eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, atid);
3310eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3311eb6f0de0SAdrian Chadd 
3312eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3313eb6f0de0SAdrian Chadd 	    "%s: txa_start now %d\n", __func__, tap->txa_start);
3314eb6f0de0SAdrian Chadd 
3315eb6f0de0SAdrian Chadd 	/* Do deferred completion */
3316eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3317eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
3318eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
3319eb6f0de0SAdrian Chadd 	}
3320eb6f0de0SAdrian Chadd }
3321eb6f0de0SAdrian Chadd 
3322eb6f0de0SAdrian Chadd /*
3323eb6f0de0SAdrian Chadd  * Handle completion of unaggregated frames in an ADDBA
3324eb6f0de0SAdrian Chadd  * session.
3325eb6f0de0SAdrian Chadd  *
3326eb6f0de0SAdrian Chadd  * Fail is set to 1 if the entry is being freed via a call to
3327eb6f0de0SAdrian Chadd  * ath_tx_draintxq().
3328eb6f0de0SAdrian Chadd  */
3329eb6f0de0SAdrian Chadd static void
3330eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
3331eb6f0de0SAdrian Chadd {
3332eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
3333eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3334eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
3335eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3336eb6f0de0SAdrian Chadd 	struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
3337eb6f0de0SAdrian Chadd 
3338eb6f0de0SAdrian Chadd 	/*
3339eb6f0de0SAdrian Chadd 	 * Update rate control status here, before we possibly
3340eb6f0de0SAdrian Chadd 	 * punt to retry or cleanup.
3341eb6f0de0SAdrian Chadd 	 *
3342eb6f0de0SAdrian Chadd 	 * Do it outside of the TXQ lock.
3343eb6f0de0SAdrian Chadd 	 */
3344eb6f0de0SAdrian Chadd 	if (fail == 0 && ((bf->bf_txflags & HAL_TXDESC_NOACK) == 0))
3345eb6f0de0SAdrian Chadd 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
3346eb6f0de0SAdrian Chadd 		    &bf->bf_status.ds_txstat,
3347eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_pktlen,
3348eb6f0de0SAdrian Chadd 		    1, (ts->ts_status == 0) ? 0 : 1);
3349eb6f0de0SAdrian Chadd 
3350eb6f0de0SAdrian Chadd 	/*
3351eb6f0de0SAdrian Chadd 	 * This is called early so atid->hwq_depth can be tracked.
3352eb6f0de0SAdrian Chadd 	 * This unfortunately means that it's released and regrabbed
3353eb6f0de0SAdrian Chadd 	 * during retry and cleanup. That's rather inefficient.
3354eb6f0de0SAdrian Chadd 	 */
3355eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3356eb6f0de0SAdrian Chadd 
3357eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
3358eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: TID=16!\n", __func__);
3359eb6f0de0SAdrian Chadd 
3360d4365d16SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX,
3361d4365d16SAdrian Chadd 	    "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
3362d4365d16SAdrian Chadd 	    __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
3363d4365d16SAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno));
3364eb6f0de0SAdrian Chadd 
3365eb6f0de0SAdrian Chadd 	atid->hwq_depth--;
3366eb6f0de0SAdrian Chadd 	if (atid->hwq_depth < 0)
3367eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
3368eb6f0de0SAdrian Chadd 		    __func__, atid->hwq_depth);
3369eb6f0de0SAdrian Chadd 
3370eb6f0de0SAdrian Chadd 	/*
3371eb6f0de0SAdrian Chadd 	 * If a cleanup is in progress, punt to comp_cleanup;
3372eb6f0de0SAdrian Chadd 	 * rather than handling it here. It's thus their
3373eb6f0de0SAdrian Chadd 	 * responsibility to clean up, call the completion
3374eb6f0de0SAdrian Chadd 	 * function in net80211, etc.
3375eb6f0de0SAdrian Chadd 	 */
3376eb6f0de0SAdrian Chadd 	if (atid->cleanup_inprogress) {
3377eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3378d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
3379d4365d16SAdrian Chadd 		    __func__);
3380eb6f0de0SAdrian Chadd 		ath_tx_comp_cleanup_unaggr(sc, bf);
3381eb6f0de0SAdrian Chadd 		return;
3382eb6f0de0SAdrian Chadd 	}
3383eb6f0de0SAdrian Chadd 
3384eb6f0de0SAdrian Chadd 	/*
3385eb6f0de0SAdrian Chadd 	 * Don't bother with the retry check if all frames
3386eb6f0de0SAdrian Chadd 	 * are being failed (eg during queue deletion.)
3387eb6f0de0SAdrian Chadd 	 */
3388eb6f0de0SAdrian Chadd 	if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
3389eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3390d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
3391d4365d16SAdrian Chadd 		    __func__);
3392eb6f0de0SAdrian Chadd 		ath_tx_aggr_retry_unaggr(sc, bf);
3393eb6f0de0SAdrian Chadd 		return;
3394eb6f0de0SAdrian Chadd 	}
3395eb6f0de0SAdrian Chadd 
3396eb6f0de0SAdrian Chadd 	/* Success? Complete */
3397eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
3398eb6f0de0SAdrian Chadd 	    __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
3399eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_dobaw) {
3400eb6f0de0SAdrian Chadd 		ath_tx_update_baw(sc, an, atid, bf);
3401eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_dobaw = 0;
3402eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_addedbaw)
3403eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev,
3404eb6f0de0SAdrian Chadd 			    "%s: wasn't added: seqno %d\n",
3405eb6f0de0SAdrian Chadd 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
3406eb6f0de0SAdrian Chadd 	}
3407eb6f0de0SAdrian Chadd 
3408eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3409eb6f0de0SAdrian Chadd 
3410eb6f0de0SAdrian Chadd 	ath_tx_default_comp(sc, bf, fail);
3411eb6f0de0SAdrian Chadd 	/* bf is freed at this point */
3412eb6f0de0SAdrian Chadd }
3413eb6f0de0SAdrian Chadd 
3414eb6f0de0SAdrian Chadd void
3415eb6f0de0SAdrian Chadd ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
3416eb6f0de0SAdrian Chadd {
3417eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_aggr)
3418eb6f0de0SAdrian Chadd 		ath_tx_aggr_comp_aggr(sc, bf, fail);
3419eb6f0de0SAdrian Chadd 	else
3420eb6f0de0SAdrian Chadd 		ath_tx_aggr_comp_unaggr(sc, bf, fail);
3421eb6f0de0SAdrian Chadd }
3422eb6f0de0SAdrian Chadd 
3423eb6f0de0SAdrian Chadd /*
3424eb6f0de0SAdrian Chadd  * Schedule some packets from the given node/TID to the hardware.
3425eb6f0de0SAdrian Chadd  *
3426eb6f0de0SAdrian Chadd  * This is the aggregate version.
3427eb6f0de0SAdrian Chadd  */
3428eb6f0de0SAdrian Chadd void
3429eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
3430eb6f0de0SAdrian Chadd     struct ath_tid *tid)
3431eb6f0de0SAdrian Chadd {
3432eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
3433eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
3434eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3435eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
3436eb6f0de0SAdrian Chadd 	ATH_AGGR_STATUS status;
3437eb6f0de0SAdrian Chadd 	ath_bufhead bf_q;
3438eb6f0de0SAdrian Chadd 
3439eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
3440eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
3441eb6f0de0SAdrian Chadd 
3442eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
3443eb6f0de0SAdrian Chadd 
3444eb6f0de0SAdrian Chadd 	if (tid->tid == IEEE80211_NONQOS_TID)
3445eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: called for TID=NONQOS_TID?\n",
3446eb6f0de0SAdrian Chadd 		    __func__);
3447eb6f0de0SAdrian Chadd 
3448eb6f0de0SAdrian Chadd 	for (;;) {
3449eb6f0de0SAdrian Chadd 		status = ATH_AGGR_DONE;
3450eb6f0de0SAdrian Chadd 
3451eb6f0de0SAdrian Chadd 		/*
3452eb6f0de0SAdrian Chadd 		 * If the upper layer has paused the TID, don't
3453eb6f0de0SAdrian Chadd 		 * queue any further packets.
3454eb6f0de0SAdrian Chadd 		 *
3455eb6f0de0SAdrian Chadd 		 * This can also occur from the completion task because
3456eb6f0de0SAdrian Chadd 		 * of packet loss; but as its serialised with this code,
3457eb6f0de0SAdrian Chadd 		 * it won't "appear" half way through queuing packets.
3458eb6f0de0SAdrian Chadd 		 */
3459eb6f0de0SAdrian Chadd 		if (tid->paused)
3460eb6f0de0SAdrian Chadd 			break;
3461eb6f0de0SAdrian Chadd 
3462eb6f0de0SAdrian Chadd 		bf = TAILQ_FIRST(&tid->axq_q);
3463eb6f0de0SAdrian Chadd 		if (bf == NULL) {
3464eb6f0de0SAdrian Chadd 			break;
3465eb6f0de0SAdrian Chadd 		}
3466eb6f0de0SAdrian Chadd 
3467eb6f0de0SAdrian Chadd 		/*
3468eb6f0de0SAdrian Chadd 		 * If the packet doesn't fall within the BAW (eg a NULL
3469eb6f0de0SAdrian Chadd 		 * data frame), schedule it directly; continue.
3470eb6f0de0SAdrian Chadd 		 */
3471eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_dobaw) {
3472d4365d16SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3473d4365d16SAdrian Chadd 			    "%s: non-baw packet\n",
3474eb6f0de0SAdrian Chadd 			    __func__);
3475eb6f0de0SAdrian Chadd 			ATH_TXQ_REMOVE(tid, bf, bf_list);
3476eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_aggr = 0;
3477eb6f0de0SAdrian Chadd 			ath_tx_do_ratelookup(sc, bf);
3478eb6f0de0SAdrian Chadd 			ath_tx_rate_fill_rcflags(sc, bf);
3479eb6f0de0SAdrian Chadd 			ath_tx_set_rtscts(sc, bf);
3480eb6f0de0SAdrian Chadd 			ath_tx_setds(sc, bf);
3481eb6f0de0SAdrian Chadd 			ath_tx_chaindesclist(sc, bf);
3482eb6f0de0SAdrian Chadd 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
3483eb6f0de0SAdrian Chadd 			ath_tx_set_ratectrl(sc, ni, bf);
3484eb6f0de0SAdrian Chadd 
3485eb6f0de0SAdrian Chadd 			sc->sc_aggr_stats.aggr_nonbaw_pkt++;
3486eb6f0de0SAdrian Chadd 
3487eb6f0de0SAdrian Chadd 			/* Queue the packet; continue */
3488eb6f0de0SAdrian Chadd 			goto queuepkt;
3489eb6f0de0SAdrian Chadd 		}
3490eb6f0de0SAdrian Chadd 
3491eb6f0de0SAdrian Chadd 		TAILQ_INIT(&bf_q);
3492eb6f0de0SAdrian Chadd 
3493eb6f0de0SAdrian Chadd 		/*
3494eb6f0de0SAdrian Chadd 		 * Do a rate control lookup on the first frame in the
3495eb6f0de0SAdrian Chadd 		 * list. The rate control code needs that to occur
3496eb6f0de0SAdrian Chadd 		 * before it can determine whether to TX.
3497eb6f0de0SAdrian Chadd 		 * It's inaccurate because the rate control code doesn't
3498eb6f0de0SAdrian Chadd 		 * really "do" aggregate lookups, so it only considers
3499eb6f0de0SAdrian Chadd 		 * the size of the first frame.
3500eb6f0de0SAdrian Chadd 		 */
3501eb6f0de0SAdrian Chadd 		ath_tx_do_ratelookup(sc, bf);
3502eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].rix = 0;
3503eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].tries = 0;
3504eb6f0de0SAdrian Chadd 		ath_tx_rate_fill_rcflags(sc, bf);
3505eb6f0de0SAdrian Chadd 
3506eb6f0de0SAdrian Chadd 		status = ath_tx_form_aggr(sc, an, tid, &bf_q);
3507eb6f0de0SAdrian Chadd 
3508eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3509eb6f0de0SAdrian Chadd 		    "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
3510eb6f0de0SAdrian Chadd 
3511eb6f0de0SAdrian Chadd 		/*
3512eb6f0de0SAdrian Chadd 		 * No frames to be picked up - out of BAW
3513eb6f0de0SAdrian Chadd 		 */
3514eb6f0de0SAdrian Chadd 		if (TAILQ_EMPTY(&bf_q))
3515eb6f0de0SAdrian Chadd 			break;
3516eb6f0de0SAdrian Chadd 
3517eb6f0de0SAdrian Chadd 		/*
3518eb6f0de0SAdrian Chadd 		 * This assumes that the descriptor list in the ath_bufhead
3519eb6f0de0SAdrian Chadd 		 * are already linked together via bf_next pointers.
3520eb6f0de0SAdrian Chadd 		 */
3521eb6f0de0SAdrian Chadd 		bf = TAILQ_FIRST(&bf_q);
3522eb6f0de0SAdrian Chadd 
3523eb6f0de0SAdrian Chadd 		/*
3524eb6f0de0SAdrian Chadd 		 * If it's the only frame send as non-aggregate
3525eb6f0de0SAdrian Chadd 		 * assume that ath_tx_form_aggr() has checked
3526eb6f0de0SAdrian Chadd 		 * whether it's in the BAW and added it appropriately.
3527eb6f0de0SAdrian Chadd 		 */
3528eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_nframes == 1) {
3529eb6f0de0SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3530eb6f0de0SAdrian Chadd 			    "%s: single-frame aggregate\n", __func__);
3531eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_aggr = 0;
3532eb6f0de0SAdrian Chadd 			ath_tx_set_rtscts(sc, bf);
3533eb6f0de0SAdrian Chadd 			ath_tx_setds(sc, bf);
3534eb6f0de0SAdrian Chadd 			ath_tx_chaindesclist(sc, bf);
3535eb6f0de0SAdrian Chadd 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
3536eb6f0de0SAdrian Chadd 			ath_tx_set_ratectrl(sc, ni, bf);
3537eb6f0de0SAdrian Chadd 			if (status == ATH_AGGR_BAW_CLOSED)
3538eb6f0de0SAdrian Chadd 				sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
3539eb6f0de0SAdrian Chadd 			else
3540eb6f0de0SAdrian Chadd 				sc->sc_aggr_stats.aggr_single_pkt++;
3541eb6f0de0SAdrian Chadd 		} else {
3542eb6f0de0SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3543d4365d16SAdrian Chadd 			    "%s: multi-frame aggregate: %d frames, "
3544d4365d16SAdrian Chadd 			    "length %d\n",
3545eb6f0de0SAdrian Chadd 			     __func__, bf->bf_state.bfs_nframes,
3546eb6f0de0SAdrian Chadd 			    bf->bf_state.bfs_al);
3547eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_aggr = 1;
3548eb6f0de0SAdrian Chadd 			sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
3549eb6f0de0SAdrian Chadd 			sc->sc_aggr_stats.aggr_aggr_pkt++;
3550eb6f0de0SAdrian Chadd 
3551eb6f0de0SAdrian Chadd 			/*
3552eb6f0de0SAdrian Chadd 			 * Update the rate and rtscts information based on the
3553eb6f0de0SAdrian Chadd 			 * rate decision made by the rate control code;
3554eb6f0de0SAdrian Chadd 			 * the first frame in the aggregate needs it.
3555eb6f0de0SAdrian Chadd 			 */
3556eb6f0de0SAdrian Chadd 			ath_tx_set_rtscts(sc, bf);
3557eb6f0de0SAdrian Chadd 
3558eb6f0de0SAdrian Chadd 			/*
3559eb6f0de0SAdrian Chadd 			 * Setup the relevant descriptor fields
3560eb6f0de0SAdrian Chadd 			 * for aggregation. The first descriptor
3561eb6f0de0SAdrian Chadd 			 * already points to the rest in the chain.
3562eb6f0de0SAdrian Chadd 			 */
3563eb6f0de0SAdrian Chadd 			ath_tx_setds_11n(sc, bf);
3564eb6f0de0SAdrian Chadd 
3565eb6f0de0SAdrian Chadd 			/*
3566eb6f0de0SAdrian Chadd 			 * setup first desc with rate and aggr info
3567eb6f0de0SAdrian Chadd 			 */
3568eb6f0de0SAdrian Chadd 			ath_tx_set_ratectrl(sc, ni, bf);
3569eb6f0de0SAdrian Chadd 		}
3570eb6f0de0SAdrian Chadd 	queuepkt:
3571eb6f0de0SAdrian Chadd 		//txq = bf->bf_state.bfs_txq;
3572eb6f0de0SAdrian Chadd 
3573eb6f0de0SAdrian Chadd 		/* Set completion handler, multi-frame aggregate or not */
3574eb6f0de0SAdrian Chadd 		bf->bf_comp = ath_tx_aggr_comp;
3575eb6f0de0SAdrian Chadd 
3576eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
3577eb6f0de0SAdrian Chadd 		    device_printf(sc->sc_dev, "%s: TID=16?\n", __func__);
3578eb6f0de0SAdrian Chadd 
3579eb6f0de0SAdrian Chadd 		/* Punt to txq */
3580eb6f0de0SAdrian Chadd 		ath_tx_handoff(sc, txq, bf);
3581eb6f0de0SAdrian Chadd 
3582eb6f0de0SAdrian Chadd 		/* Track outstanding buffer count to hardware */
3583eb6f0de0SAdrian Chadd 		/* aggregates are "one" buffer */
3584eb6f0de0SAdrian Chadd 		tid->hwq_depth++;
3585eb6f0de0SAdrian Chadd 
3586eb6f0de0SAdrian Chadd 		/*
3587eb6f0de0SAdrian Chadd 		 * Break out if ath_tx_form_aggr() indicated
3588eb6f0de0SAdrian Chadd 		 * there can't be any further progress (eg BAW is full.)
3589eb6f0de0SAdrian Chadd 		 * Checking for an empty txq is done above.
3590eb6f0de0SAdrian Chadd 		 *
3591eb6f0de0SAdrian Chadd 		 * XXX locking on txq here?
3592eb6f0de0SAdrian Chadd 		 */
3593eb6f0de0SAdrian Chadd 		if (txq->axq_aggr_depth >= sc->sc_hwq_limit ||
3594eb6f0de0SAdrian Chadd 		    status == ATH_AGGR_BAW_CLOSED)
3595eb6f0de0SAdrian Chadd 			break;
3596eb6f0de0SAdrian Chadd 	}
3597eb6f0de0SAdrian Chadd }
3598eb6f0de0SAdrian Chadd 
3599eb6f0de0SAdrian Chadd /*
3600eb6f0de0SAdrian Chadd  * Schedule some packets from the given node/TID to the hardware.
3601eb6f0de0SAdrian Chadd  */
3602eb6f0de0SAdrian Chadd void
3603eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
3604eb6f0de0SAdrian Chadd     struct ath_tid *tid)
3605eb6f0de0SAdrian Chadd {
3606eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
3607eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
3608eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
3609eb6f0de0SAdrian Chadd 
3610eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
3611eb6f0de0SAdrian Chadd 	    __func__, an, tid->tid);
3612eb6f0de0SAdrian Chadd 
3613eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
3614eb6f0de0SAdrian Chadd 
3615eb6f0de0SAdrian Chadd 	/* Check - is AMPDU pending or running? then print out something */
3616eb6f0de0SAdrian Chadd 	if (ath_tx_ampdu_pending(sc, an, tid->tid))
3617eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: tid=%d, ampdu pending?\n",
3618eb6f0de0SAdrian Chadd 		    __func__, tid->tid);
3619eb6f0de0SAdrian Chadd 	if (ath_tx_ampdu_running(sc, an, tid->tid))
3620eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: tid=%d, ampdu running?\n",
3621eb6f0de0SAdrian Chadd 		    __func__, tid->tid);
3622eb6f0de0SAdrian Chadd 
3623eb6f0de0SAdrian Chadd 	for (;;) {
3624eb6f0de0SAdrian Chadd 
3625eb6f0de0SAdrian Chadd 		/*
3626eb6f0de0SAdrian Chadd 		 * If the upper layers have paused the TID, don't
3627eb6f0de0SAdrian Chadd 		 * queue any further packets.
3628eb6f0de0SAdrian Chadd 		 */
3629eb6f0de0SAdrian Chadd 		if (tid->paused)
3630eb6f0de0SAdrian Chadd 			break;
3631eb6f0de0SAdrian Chadd 
3632eb6f0de0SAdrian Chadd 		bf = TAILQ_FIRST(&tid->axq_q);
3633eb6f0de0SAdrian Chadd 		if (bf == NULL) {
3634eb6f0de0SAdrian Chadd 			break;
3635eb6f0de0SAdrian Chadd 		}
3636eb6f0de0SAdrian Chadd 
3637eb6f0de0SAdrian Chadd 		ATH_TXQ_REMOVE(tid, bf, bf_list);
3638eb6f0de0SAdrian Chadd 
3639eb6f0de0SAdrian Chadd 		KASSERT(txq == bf->bf_state.bfs_txq, ("txqs not equal!\n"));
3640eb6f0de0SAdrian Chadd 
3641eb6f0de0SAdrian Chadd 		/* Sanity check! */
3642eb6f0de0SAdrian Chadd 		if (tid->tid != bf->bf_state.bfs_tid) {
3643eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev, "%s: bfs_tid %d !="
3644eb6f0de0SAdrian Chadd 			    " tid %d\n",
3645eb6f0de0SAdrian Chadd 			    __func__, bf->bf_state.bfs_tid, tid->tid);
3646eb6f0de0SAdrian Chadd 		}
3647eb6f0de0SAdrian Chadd 		/* Normal completion handler */
3648eb6f0de0SAdrian Chadd 		bf->bf_comp = ath_tx_normal_comp;
3649eb6f0de0SAdrian Chadd 
3650eb6f0de0SAdrian Chadd 		/* Program descriptors + rate control */
3651eb6f0de0SAdrian Chadd 		ath_tx_do_ratelookup(sc, bf);
3652eb6f0de0SAdrian Chadd 		ath_tx_rate_fill_rcflags(sc, bf);
3653eb6f0de0SAdrian Chadd 		ath_tx_set_rtscts(sc, bf);
3654eb6f0de0SAdrian Chadd 		ath_tx_setds(sc, bf);
3655eb6f0de0SAdrian Chadd 		ath_tx_chaindesclist(sc, bf);
3656eb6f0de0SAdrian Chadd 		ath_tx_set_ratectrl(sc, ni, bf);
3657eb6f0de0SAdrian Chadd 
3658eb6f0de0SAdrian Chadd 		/* Track outstanding buffer count to hardware */
3659eb6f0de0SAdrian Chadd 		/* aggregates are "one" buffer */
3660eb6f0de0SAdrian Chadd 		tid->hwq_depth++;
3661eb6f0de0SAdrian Chadd 
3662eb6f0de0SAdrian Chadd 		/* Punt to hardware or software txq */
3663eb6f0de0SAdrian Chadd 		ath_tx_handoff(sc, txq, bf);
3664eb6f0de0SAdrian Chadd 	}
3665eb6f0de0SAdrian Chadd }
3666eb6f0de0SAdrian Chadd 
3667eb6f0de0SAdrian Chadd /*
3668eb6f0de0SAdrian Chadd  * Schedule some packets to the given hardware queue.
3669eb6f0de0SAdrian Chadd  *
3670eb6f0de0SAdrian Chadd  * This function walks the list of TIDs (ie, ath_node TIDs
3671eb6f0de0SAdrian Chadd  * with queued traffic) and attempts to schedule traffic
3672eb6f0de0SAdrian Chadd  * from them.
3673eb6f0de0SAdrian Chadd  *
3674eb6f0de0SAdrian Chadd  * TID scheduling is implemented as a FIFO, with TIDs being
3675eb6f0de0SAdrian Chadd  * added to the end of the queue after some frames have been
3676eb6f0de0SAdrian Chadd  * scheduled.
3677eb6f0de0SAdrian Chadd  */
3678eb6f0de0SAdrian Chadd void
3679eb6f0de0SAdrian Chadd ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
3680eb6f0de0SAdrian Chadd {
3681eb6f0de0SAdrian Chadd 	struct ath_tid *tid, *next, *last;
3682eb6f0de0SAdrian Chadd 
3683eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
3684eb6f0de0SAdrian Chadd 
3685eb6f0de0SAdrian Chadd 	/*
3686eb6f0de0SAdrian Chadd 	 * Don't schedule if the hardware queue is busy.
3687eb6f0de0SAdrian Chadd 	 * This (hopefully) gives some more time to aggregate
3688eb6f0de0SAdrian Chadd 	 * some packets in the aggregation queue.
3689eb6f0de0SAdrian Chadd 	 */
3690eb6f0de0SAdrian Chadd 	if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
3691eb6f0de0SAdrian Chadd 		sc->sc_aggr_stats.aggr_sched_nopkt++;
3692eb6f0de0SAdrian Chadd 		return;
3693eb6f0de0SAdrian Chadd 	}
3694eb6f0de0SAdrian Chadd 
3695eb6f0de0SAdrian Chadd 	last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
3696eb6f0de0SAdrian Chadd 
3697eb6f0de0SAdrian Chadd 	TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
3698eb6f0de0SAdrian Chadd 		/*
3699eb6f0de0SAdrian Chadd 		 * Suspend paused queues here; they'll be resumed
3700eb6f0de0SAdrian Chadd 		 * once the addba completes or times out.
3701eb6f0de0SAdrian Chadd 		 */
3702eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
3703eb6f0de0SAdrian Chadd 		    __func__, tid->tid, tid->paused);
3704eb6f0de0SAdrian Chadd 		ath_tx_tid_unsched(sc, tid);
3705eb6f0de0SAdrian Chadd 		if (tid->paused) {
3706eb6f0de0SAdrian Chadd 			continue;
3707eb6f0de0SAdrian Chadd 		}
3708eb6f0de0SAdrian Chadd 		if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
3709eb6f0de0SAdrian Chadd 			ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
3710eb6f0de0SAdrian Chadd 		else
3711eb6f0de0SAdrian Chadd 			ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
3712eb6f0de0SAdrian Chadd 
3713eb6f0de0SAdrian Chadd 		/* Not empty? Re-schedule */
3714eb6f0de0SAdrian Chadd 		if (tid->axq_depth != 0)
3715eb6f0de0SAdrian Chadd 			ath_tx_tid_sched(sc, tid);
3716eb6f0de0SAdrian Chadd 
3717eb6f0de0SAdrian Chadd 		/* Give the software queue time to aggregate more packets */
3718eb6f0de0SAdrian Chadd 		if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
3719eb6f0de0SAdrian Chadd 			break;
3720eb6f0de0SAdrian Chadd 		}
3721eb6f0de0SAdrian Chadd 
3722eb6f0de0SAdrian Chadd 		/*
3723eb6f0de0SAdrian Chadd 		 * If this was the last entry on the original list, stop.
3724eb6f0de0SAdrian Chadd 		 * Otherwise nodes that have been rescheduled onto the end
3725eb6f0de0SAdrian Chadd 		 * of the TID FIFO list will just keep being rescheduled.
3726eb6f0de0SAdrian Chadd 		 */
3727eb6f0de0SAdrian Chadd 		if (tid == last)
3728eb6f0de0SAdrian Chadd 			break;
3729eb6f0de0SAdrian Chadd 	}
3730eb6f0de0SAdrian Chadd }
3731eb6f0de0SAdrian Chadd 
3732eb6f0de0SAdrian Chadd /*
3733eb6f0de0SAdrian Chadd  * TX addba handling
3734eb6f0de0SAdrian Chadd  */
3735eb6f0de0SAdrian Chadd 
3736eb6f0de0SAdrian Chadd /*
3737eb6f0de0SAdrian Chadd  * Return net80211 TID struct pointer, or NULL for none
3738eb6f0de0SAdrian Chadd  */
3739eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *
3740eb6f0de0SAdrian Chadd ath_tx_get_tx_tid(struct ath_node *an, int tid)
3741eb6f0de0SAdrian Chadd {
3742eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
3743eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3744eb6f0de0SAdrian Chadd 	int ac;
3745eb6f0de0SAdrian Chadd 
3746eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
3747eb6f0de0SAdrian Chadd 		return NULL;
3748eb6f0de0SAdrian Chadd 
3749eb6f0de0SAdrian Chadd 	ac = TID_TO_WME_AC(tid);
3750eb6f0de0SAdrian Chadd 
3751eb6f0de0SAdrian Chadd 	tap = &ni->ni_tx_ampdu[ac];
3752eb6f0de0SAdrian Chadd 	return tap;
3753eb6f0de0SAdrian Chadd }
3754eb6f0de0SAdrian Chadd 
3755eb6f0de0SAdrian Chadd /*
3756eb6f0de0SAdrian Chadd  * Is AMPDU-TX running?
3757eb6f0de0SAdrian Chadd  */
3758eb6f0de0SAdrian Chadd static int
3759eb6f0de0SAdrian Chadd ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
3760eb6f0de0SAdrian Chadd {
3761eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3762eb6f0de0SAdrian Chadd 
3763eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
3764eb6f0de0SAdrian Chadd 		return 0;
3765eb6f0de0SAdrian Chadd 
3766eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
3767eb6f0de0SAdrian Chadd 	if (tap == NULL)
3768eb6f0de0SAdrian Chadd 		return 0;	/* Not valid; default to not running */
3769eb6f0de0SAdrian Chadd 
3770eb6f0de0SAdrian Chadd 	return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
3771eb6f0de0SAdrian Chadd }
3772eb6f0de0SAdrian Chadd 
3773eb6f0de0SAdrian Chadd /*
3774eb6f0de0SAdrian Chadd  * Is AMPDU-TX negotiation pending?
3775eb6f0de0SAdrian Chadd  */
3776eb6f0de0SAdrian Chadd static int
3777eb6f0de0SAdrian Chadd ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
3778eb6f0de0SAdrian Chadd {
3779eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3780eb6f0de0SAdrian Chadd 
3781eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
3782eb6f0de0SAdrian Chadd 		return 0;
3783eb6f0de0SAdrian Chadd 
3784eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
3785eb6f0de0SAdrian Chadd 	if (tap == NULL)
3786eb6f0de0SAdrian Chadd 		return 0;	/* Not valid; default to not pending */
3787eb6f0de0SAdrian Chadd 
3788eb6f0de0SAdrian Chadd 	return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
3789eb6f0de0SAdrian Chadd }
3790eb6f0de0SAdrian Chadd 
3791eb6f0de0SAdrian Chadd /*
3792eb6f0de0SAdrian Chadd  * Is AMPDU-TX pending for the given TID?
3793eb6f0de0SAdrian Chadd  */
3794eb6f0de0SAdrian Chadd 
3795eb6f0de0SAdrian Chadd 
3796eb6f0de0SAdrian Chadd /*
3797eb6f0de0SAdrian Chadd  * Method to handle sending an ADDBA request.
3798eb6f0de0SAdrian Chadd  *
3799eb6f0de0SAdrian Chadd  * We tap this so the relevant flags can be set to pause the TID
3800eb6f0de0SAdrian Chadd  * whilst waiting for the response.
3801eb6f0de0SAdrian Chadd  *
3802eb6f0de0SAdrian Chadd  * XXX there's no timeout handler we can override?
3803eb6f0de0SAdrian Chadd  */
3804eb6f0de0SAdrian Chadd int
3805eb6f0de0SAdrian Chadd ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
3806eb6f0de0SAdrian Chadd     int dialogtoken, int baparamset, int batimeout)
3807eb6f0de0SAdrian Chadd {
3808eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3809eb6f0de0SAdrian Chadd 	int tid = WME_AC_TO_TID(tap->txa_ac);
3810eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3811eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3812eb6f0de0SAdrian Chadd 
3813eb6f0de0SAdrian Chadd 	/*
3814eb6f0de0SAdrian Chadd 	 * XXX danger Will Robinson!
3815eb6f0de0SAdrian Chadd 	 *
3816eb6f0de0SAdrian Chadd 	 * Although the taskqueue may be running and scheduling some more
3817eb6f0de0SAdrian Chadd 	 * packets, these should all be _before_ the addba sequence number.
3818eb6f0de0SAdrian Chadd 	 * However, net80211 will keep self-assigning sequence numbers
3819eb6f0de0SAdrian Chadd 	 * until addba has been negotiated.
3820eb6f0de0SAdrian Chadd 	 *
3821eb6f0de0SAdrian Chadd 	 * In the past, these packets would be "paused" (which still works
3822eb6f0de0SAdrian Chadd 	 * fine, as they're being scheduled to the driver in the same
3823eb6f0de0SAdrian Chadd 	 * serialised method which is calling the addba request routine)
3824eb6f0de0SAdrian Chadd 	 * and when the aggregation session begins, they'll be dequeued
3825eb6f0de0SAdrian Chadd 	 * as aggregate packets and added to the BAW. However, now there's
3826eb6f0de0SAdrian Chadd 	 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
3827eb6f0de0SAdrian Chadd 	 * packets. Thus they never get included in the BAW tracking and
3828eb6f0de0SAdrian Chadd 	 * this can cause the initial burst of packets after the addba
3829eb6f0de0SAdrian Chadd 	 * negotiation to "hang", as they quickly fall outside the BAW.
3830eb6f0de0SAdrian Chadd 	 *
3831eb6f0de0SAdrian Chadd 	 * The "eventual" solution should be to tag these packets with
3832eb6f0de0SAdrian Chadd 	 * dobaw. Although net80211 has given us a sequence number,
3833eb6f0de0SAdrian Chadd 	 * it'll be "after" the left edge of the BAW and thus it'll
3834eb6f0de0SAdrian Chadd 	 * fall within it.
3835eb6f0de0SAdrian Chadd 	 */
3836eb6f0de0SAdrian Chadd 	ath_tx_tid_pause(sc, atid);
3837eb6f0de0SAdrian Chadd 
3838eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3839eb6f0de0SAdrian Chadd 	    "%s: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
3840eb6f0de0SAdrian Chadd 	    __func__, dialogtoken, baparamset, batimeout);
3841eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3842eb6f0de0SAdrian Chadd 	    "%s: txa_start=%d, ni_txseqs=%d\n",
3843eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
3844eb6f0de0SAdrian Chadd 
3845eb6f0de0SAdrian Chadd 	return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
3846eb6f0de0SAdrian Chadd 	    batimeout);
3847eb6f0de0SAdrian Chadd }
3848eb6f0de0SAdrian Chadd 
3849eb6f0de0SAdrian Chadd /*
3850eb6f0de0SAdrian Chadd  * Handle an ADDBA response.
3851eb6f0de0SAdrian Chadd  *
3852eb6f0de0SAdrian Chadd  * We unpause the queue so TX'ing can resume.
3853eb6f0de0SAdrian Chadd  *
3854eb6f0de0SAdrian Chadd  * Any packets TX'ed from this point should be "aggregate" (whether
3855eb6f0de0SAdrian Chadd  * aggregate or not) so the BAW is updated.
3856eb6f0de0SAdrian Chadd  *
3857eb6f0de0SAdrian Chadd  * Note! net80211 keeps self-assigning sequence numbers until
3858eb6f0de0SAdrian Chadd  * ampdu is negotiated. This means the initially-negotiated BAW left
3859eb6f0de0SAdrian Chadd  * edge won't match the ni->ni_txseq.
3860eb6f0de0SAdrian Chadd  *
3861eb6f0de0SAdrian Chadd  * So, being very dirty, the BAW left edge is "slid" here to match
3862eb6f0de0SAdrian Chadd  * ni->ni_txseq.
3863eb6f0de0SAdrian Chadd  *
3864eb6f0de0SAdrian Chadd  * What likely SHOULD happen is that all packets subsequent to the
3865eb6f0de0SAdrian Chadd  * addba request should be tagged as aggregate and queued as non-aggregate
3866eb6f0de0SAdrian Chadd  * frames; thus updating the BAW. For now though, I'll just slide the
3867eb6f0de0SAdrian Chadd  * window.
3868eb6f0de0SAdrian Chadd  */
3869eb6f0de0SAdrian Chadd int
3870eb6f0de0SAdrian Chadd ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
3871eb6f0de0SAdrian Chadd     int status, int code, int batimeout)
3872eb6f0de0SAdrian Chadd {
3873eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3874eb6f0de0SAdrian Chadd 	int tid = WME_AC_TO_TID(tap->txa_ac);
3875eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3876eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3877eb6f0de0SAdrian Chadd 	int r;
3878eb6f0de0SAdrian Chadd 
3879eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3880eb6f0de0SAdrian Chadd 	    "%s: called; status=%d, code=%d, batimeout=%d\n", __func__,
3881eb6f0de0SAdrian Chadd 	    status, code, batimeout);
3882eb6f0de0SAdrian Chadd 
3883eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3884eb6f0de0SAdrian Chadd 	    "%s: txa_start=%d, ni_txseqs=%d\n",
3885eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
3886eb6f0de0SAdrian Chadd 
3887eb6f0de0SAdrian Chadd 	/*
3888eb6f0de0SAdrian Chadd 	 * Call this first, so the interface flags get updated
3889eb6f0de0SAdrian Chadd 	 * before the TID is unpaused. Otherwise a race condition
3890eb6f0de0SAdrian Chadd 	 * exists where the unpaused TID still doesn't yet have
3891eb6f0de0SAdrian Chadd 	 * IEEE80211_AGGR_RUNNING set.
3892eb6f0de0SAdrian Chadd 	 */
3893eb6f0de0SAdrian Chadd 	r = sc->sc_addba_response(ni, tap, status, code, batimeout);
3894eb6f0de0SAdrian Chadd 
3895eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3896eb6f0de0SAdrian Chadd 	/*
3897eb6f0de0SAdrian Chadd 	 * XXX dirty!
3898eb6f0de0SAdrian Chadd 	 * Slide the BAW left edge to wherever net80211 left it for us.
3899eb6f0de0SAdrian Chadd 	 * Read above for more information.
3900eb6f0de0SAdrian Chadd 	 */
3901eb6f0de0SAdrian Chadd 	tap->txa_start = ni->ni_txseqs[tid];
3902eb6f0de0SAdrian Chadd 	ath_tx_tid_resume(sc, atid);
3903eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3904eb6f0de0SAdrian Chadd 	return r;
3905eb6f0de0SAdrian Chadd }
3906eb6f0de0SAdrian Chadd 
3907eb6f0de0SAdrian Chadd 
3908eb6f0de0SAdrian Chadd /*
3909eb6f0de0SAdrian Chadd  * Stop ADDBA on a queue.
3910eb6f0de0SAdrian Chadd  */
3911eb6f0de0SAdrian Chadd void
3912eb6f0de0SAdrian Chadd ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
3913eb6f0de0SAdrian Chadd {
3914eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3915eb6f0de0SAdrian Chadd 	int tid = WME_AC_TO_TID(tap->txa_ac);
3916eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3917eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3918eb6f0de0SAdrian Chadd 
3919eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: called\n", __func__);
3920eb6f0de0SAdrian Chadd 
3921eb6f0de0SAdrian Chadd 	/* Pause TID traffic early, so there aren't any races */
3922eb6f0de0SAdrian Chadd 	ath_tx_tid_pause(sc, atid);
3923eb6f0de0SAdrian Chadd 
3924eb6f0de0SAdrian Chadd 	/* There's no need to hold the TXQ lock here */
3925eb6f0de0SAdrian Chadd 	sc->sc_addba_stop(ni, tap);
3926eb6f0de0SAdrian Chadd 
3927eb6f0de0SAdrian Chadd 	/*
3928eb6f0de0SAdrian Chadd 	 * ath_tx_cleanup will resume the TID if possible, otherwise
3929eb6f0de0SAdrian Chadd 	 * it'll set the cleanup flag, and it'll be unpaused once
3930eb6f0de0SAdrian Chadd 	 * things have been cleaned up.
3931eb6f0de0SAdrian Chadd 	 */
3932eb6f0de0SAdrian Chadd 	ath_tx_cleanup(sc, an, tid);
3933eb6f0de0SAdrian Chadd }
3934eb6f0de0SAdrian Chadd 
3935eb6f0de0SAdrian Chadd /*
3936eb6f0de0SAdrian Chadd  * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
3937eb6f0de0SAdrian Chadd  * it simply tears down the aggregation session. Ew.
3938eb6f0de0SAdrian Chadd  *
3939eb6f0de0SAdrian Chadd  * It however will call ieee80211_ampdu_stop() which will call
3940eb6f0de0SAdrian Chadd  * ic->ic_addba_stop().
3941eb6f0de0SAdrian Chadd  *
3942eb6f0de0SAdrian Chadd  * XXX This uses a hard-coded max BAR count value; the whole
3943eb6f0de0SAdrian Chadd  * XXX BAR TX success or failure should be better handled!
3944eb6f0de0SAdrian Chadd  */
3945eb6f0de0SAdrian Chadd void
3946eb6f0de0SAdrian Chadd ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
3947eb6f0de0SAdrian Chadd     int status)
3948eb6f0de0SAdrian Chadd {
3949eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3950eb6f0de0SAdrian Chadd 	int tid = WME_AC_TO_TID(tap->txa_ac);
3951eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3952eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3953eb6f0de0SAdrian Chadd 	int attempts = tap->txa_attempts;
3954eb6f0de0SAdrian Chadd 
3955eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3956eb6f0de0SAdrian Chadd 	    "%s: called; status=%d\n", __func__, status);
3957eb6f0de0SAdrian Chadd 
3958eb6f0de0SAdrian Chadd 	/* Note: This may update the BAW details */
3959eb6f0de0SAdrian Chadd 	sc->sc_bar_response(ni, tap, status);
3960eb6f0de0SAdrian Chadd 
3961eb6f0de0SAdrian Chadd 	/* Unpause the TID */
3962eb6f0de0SAdrian Chadd 	/*
3963eb6f0de0SAdrian Chadd 	 * XXX if this is attempt=50, the TID will be downgraded
3964eb6f0de0SAdrian Chadd 	 * XXX to a non-aggregate session. So we must unpause the
3965eb6f0de0SAdrian Chadd 	 * XXX TID here or it'll never be done.
3966eb6f0de0SAdrian Chadd 	 */
3967eb6f0de0SAdrian Chadd 	if (status == 0 || attempts == 50) {
3968eb6f0de0SAdrian Chadd 		ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3969eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
3970eb6f0de0SAdrian Chadd 		ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3971eb6f0de0SAdrian Chadd 	}
3972eb6f0de0SAdrian Chadd }
3973eb6f0de0SAdrian Chadd 
3974eb6f0de0SAdrian Chadd /*
3975eb6f0de0SAdrian Chadd  * This is called whenever the pending ADDBA request times out.
3976eb6f0de0SAdrian Chadd  * Unpause and reschedule the TID.
3977eb6f0de0SAdrian Chadd  */
3978eb6f0de0SAdrian Chadd void
3979eb6f0de0SAdrian Chadd ath_addba_response_timeout(struct ieee80211_node *ni,
3980eb6f0de0SAdrian Chadd     struct ieee80211_tx_ampdu *tap)
3981eb6f0de0SAdrian Chadd {
3982eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3983eb6f0de0SAdrian Chadd 	int tid = WME_AC_TO_TID(tap->txa_ac);
3984eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3985eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3986eb6f0de0SAdrian Chadd 
3987eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3988eb6f0de0SAdrian Chadd 	    "%s: called; resuming\n", __func__);
3989eb6f0de0SAdrian Chadd 
3990eb6f0de0SAdrian Chadd 	/* Note: This updates the aggregate state to (again) pending */
3991eb6f0de0SAdrian Chadd 	sc->sc_addba_response_timeout(ni, tap);
3992eb6f0de0SAdrian Chadd 
3993eb6f0de0SAdrian Chadd 	/* Unpause the TID; which reschedules it */
3994eb6f0de0SAdrian Chadd 	ATH_TXQ_LOCK(sc->sc_ac2q[atid->ac]);
3995eb6f0de0SAdrian Chadd 	ath_tx_tid_resume(sc, atid);
3996eb6f0de0SAdrian Chadd 	ATH_TXQ_UNLOCK(sc->sc_ac2q[atid->ac]);
3997eb6f0de0SAdrian Chadd }
3998