xref: /freebsd/sys/dev/ath/if_ath_tx.c (revision b45a991e9299694101feee12818c7b12c9b29daf)
1b8e788a5SAdrian Chadd /*-
2b8e788a5SAdrian Chadd  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3c6e9cee2SAdrian Chadd  * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
4b8e788a5SAdrian Chadd  * All rights reserved.
5b8e788a5SAdrian Chadd  *
6b8e788a5SAdrian Chadd  * Redistribution and use in source and binary forms, with or without
7b8e788a5SAdrian Chadd  * modification, are permitted provided that the following conditions
8b8e788a5SAdrian Chadd  * are met:
9b8e788a5SAdrian Chadd  * 1. Redistributions of source code must retain the above copyright
10b8e788a5SAdrian Chadd  *    notice, this list of conditions and the following disclaimer,
11b8e788a5SAdrian Chadd  *    without modification.
12b8e788a5SAdrian Chadd  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
13b8e788a5SAdrian Chadd  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
14b8e788a5SAdrian Chadd  *    redistribution must be conditioned upon including a substantially
15b8e788a5SAdrian Chadd  *    similar Disclaimer requirement for further binary redistribution.
16b8e788a5SAdrian Chadd  *
17b8e788a5SAdrian Chadd  * NO WARRANTY
18b8e788a5SAdrian Chadd  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19b8e788a5SAdrian Chadd  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20b8e788a5SAdrian Chadd  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
21b8e788a5SAdrian Chadd  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
22b8e788a5SAdrian Chadd  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
23b8e788a5SAdrian Chadd  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24b8e788a5SAdrian Chadd  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25b8e788a5SAdrian Chadd  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
26b8e788a5SAdrian Chadd  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27b8e788a5SAdrian Chadd  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28b8e788a5SAdrian Chadd  * THE POSSIBILITY OF SUCH DAMAGES.
29b8e788a5SAdrian Chadd  */
30b8e788a5SAdrian Chadd 
31b8e788a5SAdrian Chadd #include <sys/cdefs.h>
32b8e788a5SAdrian Chadd __FBSDID("$FreeBSD$");
33b8e788a5SAdrian Chadd 
34b8e788a5SAdrian Chadd /*
35b8e788a5SAdrian Chadd  * Driver for the Atheros Wireless LAN controller.
36b8e788a5SAdrian Chadd  *
37b8e788a5SAdrian Chadd  * This software is derived from work of Atsushi Onoe; his contribution
38b8e788a5SAdrian Chadd  * is greatly appreciated.
39b8e788a5SAdrian Chadd  */
40b8e788a5SAdrian Chadd 
41b8e788a5SAdrian Chadd #include "opt_inet.h"
42b8e788a5SAdrian Chadd #include "opt_ath.h"
43b8e788a5SAdrian Chadd #include "opt_wlan.h"
44b8e788a5SAdrian Chadd 
45b8e788a5SAdrian Chadd #include <sys/param.h>
46b8e788a5SAdrian Chadd #include <sys/systm.h>
47b8e788a5SAdrian Chadd #include <sys/sysctl.h>
48b8e788a5SAdrian Chadd #include <sys/mbuf.h>
49b8e788a5SAdrian Chadd #include <sys/malloc.h>
50b8e788a5SAdrian Chadd #include <sys/lock.h>
51b8e788a5SAdrian Chadd #include <sys/mutex.h>
52b8e788a5SAdrian Chadd #include <sys/kernel.h>
53b8e788a5SAdrian Chadd #include <sys/socket.h>
54b8e788a5SAdrian Chadd #include <sys/sockio.h>
55b8e788a5SAdrian Chadd #include <sys/errno.h>
56b8e788a5SAdrian Chadd #include <sys/callout.h>
57b8e788a5SAdrian Chadd #include <sys/bus.h>
58b8e788a5SAdrian Chadd #include <sys/endian.h>
59b8e788a5SAdrian Chadd #include <sys/kthread.h>
60b8e788a5SAdrian Chadd #include <sys/taskqueue.h>
61b8e788a5SAdrian Chadd #include <sys/priv.h>
62b8e788a5SAdrian Chadd 
63b8e788a5SAdrian Chadd #include <machine/bus.h>
64b8e788a5SAdrian Chadd 
65b8e788a5SAdrian Chadd #include <net/if.h>
66b8e788a5SAdrian Chadd #include <net/if_dl.h>
67b8e788a5SAdrian Chadd #include <net/if_media.h>
68b8e788a5SAdrian Chadd #include <net/if_types.h>
69b8e788a5SAdrian Chadd #include <net/if_arp.h>
70b8e788a5SAdrian Chadd #include <net/ethernet.h>
71b8e788a5SAdrian Chadd #include <net/if_llc.h>
72b8e788a5SAdrian Chadd 
73b8e788a5SAdrian Chadd #include <net80211/ieee80211_var.h>
74b8e788a5SAdrian Chadd #include <net80211/ieee80211_regdomain.h>
75b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_SUPERG
76b8e788a5SAdrian Chadd #include <net80211/ieee80211_superg.h>
77b8e788a5SAdrian Chadd #endif
78b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
79b8e788a5SAdrian Chadd #include <net80211/ieee80211_tdma.h>
80b8e788a5SAdrian Chadd #endif
81eb6f0de0SAdrian Chadd #include <net80211/ieee80211_ht.h>
82b8e788a5SAdrian Chadd 
83b8e788a5SAdrian Chadd #include <net/bpf.h>
84b8e788a5SAdrian Chadd 
85b8e788a5SAdrian Chadd #ifdef INET
86b8e788a5SAdrian Chadd #include <netinet/in.h>
87b8e788a5SAdrian Chadd #include <netinet/if_ether.h>
88b8e788a5SAdrian Chadd #endif
89b8e788a5SAdrian Chadd 
90b8e788a5SAdrian Chadd #include <dev/ath/if_athvar.h>
91b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
92b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_diagcodes.h>
93b8e788a5SAdrian Chadd 
94b8e788a5SAdrian Chadd #include <dev/ath/if_ath_debug.h>
95b8e788a5SAdrian Chadd 
96b8e788a5SAdrian Chadd #ifdef ATH_TX99_DIAG
97b8e788a5SAdrian Chadd #include <dev/ath/ath_tx99/ath_tx99.h>
98b8e788a5SAdrian Chadd #endif
99b8e788a5SAdrian Chadd 
100b8e788a5SAdrian Chadd #include <dev/ath/if_ath_misc.h>
101b8e788a5SAdrian Chadd #include <dev/ath/if_ath_tx.h>
102c1782ce0SAdrian Chadd #include <dev/ath/if_ath_tx_ht.h>
103b8e788a5SAdrian Chadd 
104b69b0dccSAdrian Chadd #ifdef	ATH_DEBUG_ALQ
105b69b0dccSAdrian Chadd #include <dev/ath/if_ath_alq.h>
106b69b0dccSAdrian Chadd #endif
107b69b0dccSAdrian Chadd 
10881a82688SAdrian Chadd /*
109eb6f0de0SAdrian Chadd  * How many retries to perform in software
110eb6f0de0SAdrian Chadd  */
111eb6f0de0SAdrian Chadd #define	SWMAX_RETRIES		10
112eb6f0de0SAdrian Chadd 
1137403d1b9SAdrian Chadd /*
1147403d1b9SAdrian Chadd  * What queue to throw the non-QoS TID traffic into
1157403d1b9SAdrian Chadd  */
1167403d1b9SAdrian Chadd #define	ATH_NONQOS_TID_AC	WME_AC_VO
1177403d1b9SAdrian Chadd 
1180eb81626SAdrian Chadd #if 0
1190eb81626SAdrian Chadd static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an);
1200eb81626SAdrian Chadd #endif
121eb6f0de0SAdrian Chadd static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
122eb6f0de0SAdrian Chadd     int tid);
123eb6f0de0SAdrian Chadd static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
124eb6f0de0SAdrian Chadd     int tid);
125a108d2d6SAdrian Chadd static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
126a108d2d6SAdrian Chadd     struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
127eb6f0de0SAdrian Chadd static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
128eb6f0de0SAdrian Chadd     struct ieee80211_node *ni, struct mbuf *m0, int *tid);
129f1bc738eSAdrian Chadd static struct ath_buf *
130f1bc738eSAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
131f1bc738eSAdrian Chadd     struct ath_tid *tid, struct ath_buf *bf);
132eb6f0de0SAdrian Chadd 
133bb327d28SAdrian Chadd #ifdef	ATH_DEBUG_ALQ
134bb327d28SAdrian Chadd void
135bb327d28SAdrian Chadd ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first)
136bb327d28SAdrian Chadd {
137bb327d28SAdrian Chadd 	struct ath_buf *bf;
138bb327d28SAdrian Chadd 	int i, n;
139bb327d28SAdrian Chadd 	const char *ds;
140bb327d28SAdrian Chadd 
141bb327d28SAdrian Chadd 	/* XXX we should skip out early if debugging isn't enabled! */
142bb327d28SAdrian Chadd 	bf = bf_first;
143bb327d28SAdrian Chadd 
144bb327d28SAdrian Chadd 	while (bf != NULL) {
145bb327d28SAdrian Chadd 		/* XXX should ensure bf_nseg > 0! */
146bb327d28SAdrian Chadd 		if (bf->bf_nseg == 0)
147bb327d28SAdrian Chadd 			break;
148bb327d28SAdrian Chadd 		n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1;
149bb327d28SAdrian Chadd 		for (i = 0, ds = (const char *) bf->bf_desc;
150bb327d28SAdrian Chadd 		    i < n;
151bb327d28SAdrian Chadd 		    i++, ds += sc->sc_tx_desclen) {
152bb327d28SAdrian Chadd 			if_ath_alq_post(&sc->sc_alq,
153bb327d28SAdrian Chadd 			    ATH_ALQ_EDMA_TXDESC,
154bb327d28SAdrian Chadd 			    sc->sc_tx_desclen,
155bb327d28SAdrian Chadd 			    ds);
156bb327d28SAdrian Chadd 		}
157bb327d28SAdrian Chadd 		bf = bf->bf_next;
158bb327d28SAdrian Chadd 	}
159bb327d28SAdrian Chadd }
160bb327d28SAdrian Chadd #endif /* ATH_DEBUG_ALQ */
161bb327d28SAdrian Chadd 
162eb6f0de0SAdrian Chadd /*
16381a82688SAdrian Chadd  * Whether to use the 11n rate scenario functions or not
16481a82688SAdrian Chadd  */
16581a82688SAdrian Chadd static inline int
16681a82688SAdrian Chadd ath_tx_is_11n(struct ath_softc *sc)
16781a82688SAdrian Chadd {
1684ddf2cc3SAdrian Chadd 	return ((sc->sc_ah->ah_magic == 0x20065416) ||
1694ddf2cc3SAdrian Chadd 		    (sc->sc_ah->ah_magic == 0x19741014));
17081a82688SAdrian Chadd }
17181a82688SAdrian Chadd 
172eb6f0de0SAdrian Chadd /*
173eb6f0de0SAdrian Chadd  * Obtain the current TID from the given frame.
174eb6f0de0SAdrian Chadd  *
175eb6f0de0SAdrian Chadd  * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.)
176eb6f0de0SAdrian Chadd  * This has implications for which AC/priority the packet is placed
177eb6f0de0SAdrian Chadd  * in.
178eb6f0de0SAdrian Chadd  */
179eb6f0de0SAdrian Chadd static int
180eb6f0de0SAdrian Chadd ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
181eb6f0de0SAdrian Chadd {
182eb6f0de0SAdrian Chadd 	const struct ieee80211_frame *wh;
183eb6f0de0SAdrian Chadd 	int pri = M_WME_GETAC(m0);
184eb6f0de0SAdrian Chadd 
185eb6f0de0SAdrian Chadd 	wh = mtod(m0, const struct ieee80211_frame *);
186eb6f0de0SAdrian Chadd 	if (! IEEE80211_QOS_HAS_SEQ(wh))
187eb6f0de0SAdrian Chadd 		return IEEE80211_NONQOS_TID;
188eb6f0de0SAdrian Chadd 	else
189eb6f0de0SAdrian Chadd 		return WME_AC_TO_TID(pri);
190eb6f0de0SAdrian Chadd }
191eb6f0de0SAdrian Chadd 
192f1bc738eSAdrian Chadd static void
193f1bc738eSAdrian Chadd ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
194f1bc738eSAdrian Chadd {
195f1bc738eSAdrian Chadd 	struct ieee80211_frame *wh;
196f1bc738eSAdrian Chadd 
197f1bc738eSAdrian Chadd 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
198f1bc738eSAdrian Chadd 	/* Only update/resync if needed */
199f1bc738eSAdrian Chadd 	if (bf->bf_state.bfs_isretried == 0) {
200f1bc738eSAdrian Chadd 		wh->i_fc[1] |= IEEE80211_FC1_RETRY;
201f1bc738eSAdrian Chadd 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
202f1bc738eSAdrian Chadd 		    BUS_DMASYNC_PREWRITE);
203f1bc738eSAdrian Chadd 	}
204f1bc738eSAdrian Chadd 	bf->bf_state.bfs_isretried = 1;
205f1bc738eSAdrian Chadd 	bf->bf_state.bfs_retries ++;
206f1bc738eSAdrian Chadd }
207f1bc738eSAdrian Chadd 
208eb6f0de0SAdrian Chadd /*
209eb6f0de0SAdrian Chadd  * Determine what the correct AC queue for the given frame
210eb6f0de0SAdrian Chadd  * should be.
211eb6f0de0SAdrian Chadd  *
212eb6f0de0SAdrian Chadd  * This code assumes that the TIDs map consistently to
213eb6f0de0SAdrian Chadd  * the underlying hardware (or software) ath_txq.
214eb6f0de0SAdrian Chadd  * Since the sender may try to set an AC which is
215eb6f0de0SAdrian Chadd  * arbitrary, non-QoS TIDs may end up being put on
216eb6f0de0SAdrian Chadd  * completely different ACs. There's no way to put a
217eb6f0de0SAdrian Chadd  * TID into multiple ath_txq's for scheduling, so
218eb6f0de0SAdrian Chadd  * for now we override the AC/TXQ selection and set
219eb6f0de0SAdrian Chadd  * non-QOS TID frames into the BE queue.
220eb6f0de0SAdrian Chadd  *
221eb6f0de0SAdrian Chadd  * This may be completely incorrect - specifically,
222eb6f0de0SAdrian Chadd  * some management frames may end up out of order
223eb6f0de0SAdrian Chadd  * compared to the QoS traffic they're controlling.
224eb6f0de0SAdrian Chadd  * I'll look into this later.
225eb6f0de0SAdrian Chadd  */
226eb6f0de0SAdrian Chadd static int
227eb6f0de0SAdrian Chadd ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
228eb6f0de0SAdrian Chadd {
229eb6f0de0SAdrian Chadd 	const struct ieee80211_frame *wh;
230eb6f0de0SAdrian Chadd 	int pri = M_WME_GETAC(m0);
231eb6f0de0SAdrian Chadd 	wh = mtod(m0, const struct ieee80211_frame *);
232eb6f0de0SAdrian Chadd 	if (IEEE80211_QOS_HAS_SEQ(wh))
233eb6f0de0SAdrian Chadd 		return pri;
234eb6f0de0SAdrian Chadd 
2357403d1b9SAdrian Chadd 	return ATH_NONQOS_TID_AC;
236eb6f0de0SAdrian Chadd }
237eb6f0de0SAdrian Chadd 
238b8e788a5SAdrian Chadd void
239b8e788a5SAdrian Chadd ath_txfrag_cleanup(struct ath_softc *sc,
240b8e788a5SAdrian Chadd 	ath_bufhead *frags, struct ieee80211_node *ni)
241b8e788a5SAdrian Chadd {
242b8e788a5SAdrian Chadd 	struct ath_buf *bf, *next;
243b8e788a5SAdrian Chadd 
244b8e788a5SAdrian Chadd 	ATH_TXBUF_LOCK_ASSERT(sc);
245b8e788a5SAdrian Chadd 
2466b349e5aSAdrian Chadd 	TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
247b8e788a5SAdrian Chadd 		/* NB: bf assumed clean */
2486b349e5aSAdrian Chadd 		TAILQ_REMOVE(frags, bf, bf_list);
249e1a50456SAdrian Chadd 		ath_returnbuf_head(sc, bf);
250b8e788a5SAdrian Chadd 		ieee80211_node_decref(ni);
251b8e788a5SAdrian Chadd 	}
252b8e788a5SAdrian Chadd }
253b8e788a5SAdrian Chadd 
254b8e788a5SAdrian Chadd /*
255b8e788a5SAdrian Chadd  * Setup xmit of a fragmented frame.  Allocate a buffer
256b8e788a5SAdrian Chadd  * for each frag and bump the node reference count to
257b8e788a5SAdrian Chadd  * reflect the held reference to be setup by ath_tx_start.
258b8e788a5SAdrian Chadd  */
259b8e788a5SAdrian Chadd int
260b8e788a5SAdrian Chadd ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
261b8e788a5SAdrian Chadd 	struct mbuf *m0, struct ieee80211_node *ni)
262b8e788a5SAdrian Chadd {
263b8e788a5SAdrian Chadd 	struct mbuf *m;
264b8e788a5SAdrian Chadd 	struct ath_buf *bf;
265b8e788a5SAdrian Chadd 
266b8e788a5SAdrian Chadd 	ATH_TXBUF_LOCK(sc);
267b8e788a5SAdrian Chadd 	for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
268af33d486SAdrian Chadd 		/* XXX non-management? */
269af33d486SAdrian Chadd 		bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL);
270b8e788a5SAdrian Chadd 		if (bf == NULL) {	/* out of buffers, cleanup */
271b43facbfSAdrian Chadd 			device_printf(sc->sc_dev, "%s: no buffer?\n",
272b43facbfSAdrian Chadd 			    __func__);
273b8e788a5SAdrian Chadd 			ath_txfrag_cleanup(sc, frags, ni);
274b8e788a5SAdrian Chadd 			break;
275b8e788a5SAdrian Chadd 		}
276b8e788a5SAdrian Chadd 		ieee80211_node_incref(ni);
2776b349e5aSAdrian Chadd 		TAILQ_INSERT_TAIL(frags, bf, bf_list);
278b8e788a5SAdrian Chadd 	}
279b8e788a5SAdrian Chadd 	ATH_TXBUF_UNLOCK(sc);
280b8e788a5SAdrian Chadd 
2816b349e5aSAdrian Chadd 	return !TAILQ_EMPTY(frags);
282b8e788a5SAdrian Chadd }
283b8e788a5SAdrian Chadd 
284b8e788a5SAdrian Chadd /*
285b8e788a5SAdrian Chadd  * Reclaim mbuf resources.  For fragmented frames we
286b8e788a5SAdrian Chadd  * need to claim each frag chained with m_nextpkt.
287b8e788a5SAdrian Chadd  */
288b8e788a5SAdrian Chadd void
289b8e788a5SAdrian Chadd ath_freetx(struct mbuf *m)
290b8e788a5SAdrian Chadd {
291b8e788a5SAdrian Chadd 	struct mbuf *next;
292b8e788a5SAdrian Chadd 
293b8e788a5SAdrian Chadd 	do {
294b8e788a5SAdrian Chadd 		next = m->m_nextpkt;
295b8e788a5SAdrian Chadd 		m->m_nextpkt = NULL;
296b8e788a5SAdrian Chadd 		m_freem(m);
297b8e788a5SAdrian Chadd 	} while ((m = next) != NULL);
298b8e788a5SAdrian Chadd }
299b8e788a5SAdrian Chadd 
300b8e788a5SAdrian Chadd static int
301b8e788a5SAdrian Chadd ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
302b8e788a5SAdrian Chadd {
303b8e788a5SAdrian Chadd 	struct mbuf *m;
304b8e788a5SAdrian Chadd 	int error;
305b8e788a5SAdrian Chadd 
306b8e788a5SAdrian Chadd 	/*
307b8e788a5SAdrian Chadd 	 * Load the DMA map so any coalescing is done.  This
308b8e788a5SAdrian Chadd 	 * also calculates the number of descriptors we need.
309b8e788a5SAdrian Chadd 	 */
310b8e788a5SAdrian Chadd 	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
311b8e788a5SAdrian Chadd 				     bf->bf_segs, &bf->bf_nseg,
312b8e788a5SAdrian Chadd 				     BUS_DMA_NOWAIT);
313b8e788a5SAdrian Chadd 	if (error == EFBIG) {
314b8e788a5SAdrian Chadd 		/* XXX packet requires too many descriptors */
31509067b6eSAdrian Chadd 		bf->bf_nseg = ATH_MAX_SCATTER + 1;
316b8e788a5SAdrian Chadd 	} else if (error != 0) {
317b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_busdma++;
318b8e788a5SAdrian Chadd 		ath_freetx(m0);
319b8e788a5SAdrian Chadd 		return error;
320b8e788a5SAdrian Chadd 	}
321b8e788a5SAdrian Chadd 	/*
322b8e788a5SAdrian Chadd 	 * Discard null packets and check for packets that
323b8e788a5SAdrian Chadd 	 * require too many TX descriptors.  We try to convert
324b8e788a5SAdrian Chadd 	 * the latter to a cluster.
325b8e788a5SAdrian Chadd 	 */
32609067b6eSAdrian Chadd 	if (bf->bf_nseg > ATH_MAX_SCATTER) {		/* too many desc's, linearize */
327b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_linear++;
32809067b6eSAdrian Chadd 		m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER);
329b8e788a5SAdrian Chadd 		if (m == NULL) {
330b8e788a5SAdrian Chadd 			ath_freetx(m0);
331b8e788a5SAdrian Chadd 			sc->sc_stats.ast_tx_nombuf++;
332b8e788a5SAdrian Chadd 			return ENOMEM;
333b8e788a5SAdrian Chadd 		}
334b8e788a5SAdrian Chadd 		m0 = m;
335b8e788a5SAdrian Chadd 		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
336b8e788a5SAdrian Chadd 					     bf->bf_segs, &bf->bf_nseg,
337b8e788a5SAdrian Chadd 					     BUS_DMA_NOWAIT);
338b8e788a5SAdrian Chadd 		if (error != 0) {
339b8e788a5SAdrian Chadd 			sc->sc_stats.ast_tx_busdma++;
340b8e788a5SAdrian Chadd 			ath_freetx(m0);
341b8e788a5SAdrian Chadd 			return error;
342b8e788a5SAdrian Chadd 		}
34309067b6eSAdrian Chadd 		KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER,
344b8e788a5SAdrian Chadd 		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
345b8e788a5SAdrian Chadd 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
346b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_nodata++;
347b8e788a5SAdrian Chadd 		ath_freetx(m0);
348b8e788a5SAdrian Chadd 		return EIO;
349b8e788a5SAdrian Chadd 	}
350b8e788a5SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
351b8e788a5SAdrian Chadd 		__func__, m0, m0->m_pkthdr.len);
352b8e788a5SAdrian Chadd 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
353b8e788a5SAdrian Chadd 	bf->bf_m = m0;
354b8e788a5SAdrian Chadd 
355b8e788a5SAdrian Chadd 	return 0;
356b8e788a5SAdrian Chadd }
357b8e788a5SAdrian Chadd 
3586edf1dc7SAdrian Chadd /*
3596e84772fSAdrian Chadd  * Chain together segments+descriptors for a frame - 11n or otherwise.
3606e84772fSAdrian Chadd  *
3616e84772fSAdrian Chadd  * For aggregates, this is called on each frame in the aggregate.
3626edf1dc7SAdrian Chadd  */
363b8e788a5SAdrian Chadd static void
3646e84772fSAdrian Chadd ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0,
3656e84772fSAdrian Chadd     struct ath_buf *bf, int is_aggr, int is_first_subframe,
3666e84772fSAdrian Chadd     int is_last_subframe)
367b8e788a5SAdrian Chadd {
368b8e788a5SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
3696e84772fSAdrian Chadd 	char *ds;
3702b200bb4SAdrian Chadd 	int i, bp, dsp;
37146634305SAdrian Chadd 	HAL_DMA_ADDR bufAddrList[4];
37246634305SAdrian Chadd 	uint32_t segLenList[4];
3732b200bb4SAdrian Chadd 	int numTxMaps = 1;
374e2137b86SAdrian Chadd 	int isFirstDesc = 1;
37546634305SAdrian Chadd 
3763d9b1596SAdrian Chadd 	/*
3773d9b1596SAdrian Chadd 	 * XXX There's txdma and txdma_mgmt; the descriptor
3783d9b1596SAdrian Chadd 	 * sizes must match.
3793d9b1596SAdrian Chadd 	 */
3803d9b1596SAdrian Chadd 	struct ath_descdma *dd = &sc->sc_txdma;
381b8e788a5SAdrian Chadd 
382b8e788a5SAdrian Chadd 	/*
383b8e788a5SAdrian Chadd 	 * Fillin the remainder of the descriptor info.
384b8e788a5SAdrian Chadd 	 */
38546634305SAdrian Chadd 
3862b200bb4SAdrian Chadd 	/*
387378a752fSAdrian Chadd 	 * We need the number of TX data pointers in each descriptor.
388378a752fSAdrian Chadd 	 * EDMA and later chips support 4 TX buffers per descriptor;
389378a752fSAdrian Chadd 	 * previous chips just support one.
3902b200bb4SAdrian Chadd 	 */
391378a752fSAdrian Chadd 	numTxMaps = sc->sc_tx_nmaps;
3922b200bb4SAdrian Chadd 
3932b200bb4SAdrian Chadd 	/*
3942b200bb4SAdrian Chadd 	 * For EDMA and later chips ensure the TX map is fully populated
3952b200bb4SAdrian Chadd 	 * before advancing to the next descriptor.
3962b200bb4SAdrian Chadd 	 */
3976e84772fSAdrian Chadd 	ds = (char *) bf->bf_desc;
3982b200bb4SAdrian Chadd 	bp = dsp = 0;
3992b200bb4SAdrian Chadd 	bzero(bufAddrList, sizeof(bufAddrList));
4002b200bb4SAdrian Chadd 	bzero(segLenList, sizeof(segLenList));
4012b200bb4SAdrian Chadd 	for (i = 0; i < bf->bf_nseg; i++) {
4022b200bb4SAdrian Chadd 		bufAddrList[bp] = bf->bf_segs[i].ds_addr;
4032b200bb4SAdrian Chadd 		segLenList[bp] = bf->bf_segs[i].ds_len;
4042b200bb4SAdrian Chadd 		bp++;
4052b200bb4SAdrian Chadd 
4062b200bb4SAdrian Chadd 		/*
4072b200bb4SAdrian Chadd 		 * Go to the next segment if this isn't the last segment
4082b200bb4SAdrian Chadd 		 * and there's space in the current TX map.
4092b200bb4SAdrian Chadd 		 */
4102b200bb4SAdrian Chadd 		if ((i != bf->bf_nseg - 1) && (bp < numTxMaps))
4112b200bb4SAdrian Chadd 			continue;
4122b200bb4SAdrian Chadd 
4132b200bb4SAdrian Chadd 		/*
4142b200bb4SAdrian Chadd 		 * Last segment or we're out of buffer pointers.
4152b200bb4SAdrian Chadd 		 */
4162b200bb4SAdrian Chadd 		bp = 0;
41746634305SAdrian Chadd 
418b8e788a5SAdrian Chadd 		if (i == bf->bf_nseg - 1)
41942083b3dSAdrian Chadd 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0);
420b8e788a5SAdrian Chadd 		else
42142083b3dSAdrian Chadd 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds,
4222b200bb4SAdrian Chadd 			    bf->bf_daddr + dd->dd_descsize * (dsp + 1));
42346634305SAdrian Chadd 
42446634305SAdrian Chadd 		/*
425fc56c9c5SAdrian Chadd 		 * XXX This assumes that bfs_txq is the actual destination
426fc56c9c5SAdrian Chadd 		 * hardware queue at this point.  It may not have been
427fc56c9c5SAdrian Chadd 		 * assigned, it may actually be pointing to the multicast
428fc56c9c5SAdrian Chadd 		 * software TXQ id.  These must be fixed!
42946634305SAdrian Chadd 		 */
43042083b3dSAdrian Chadd 		ath_hal_filltxdesc(ah, (struct ath_desc *) ds
43146634305SAdrian Chadd 			, bufAddrList
43246634305SAdrian Chadd 			, segLenList
4332b200bb4SAdrian Chadd 			, bf->bf_descid		/* XXX desc id */
434fc56c9c5SAdrian Chadd 			, bf->bf_state.bfs_tx_queue
435e2137b86SAdrian Chadd 			, isFirstDesc		/* first segment */
436b8e788a5SAdrian Chadd 			, i == bf->bf_nseg - 1	/* last segment */
43742083b3dSAdrian Chadd 			, (struct ath_desc *) ds0	/* first descriptor */
438b8e788a5SAdrian Chadd 		);
43921840808SAdrian Chadd 
4406e84772fSAdrian Chadd 		/*
4416e84772fSAdrian Chadd 		 * Make sure the 11n aggregate fields are cleared.
4426e84772fSAdrian Chadd 		 *
4436e84772fSAdrian Chadd 		 * XXX TODO: this doesn't need to be called for
4446e84772fSAdrian Chadd 		 * aggregate frames; as it'll be called on all
4456e84772fSAdrian Chadd 		 * sub-frames.  Since the descriptors are in
4466e84772fSAdrian Chadd 		 * non-cacheable memory, this leads to some
4476e84772fSAdrian Chadd 		 * rather slow writes on MIPS/ARM platforms.
4486e84772fSAdrian Chadd 		 */
44921840808SAdrian Chadd 		if (ath_tx_is_11n(sc))
4505d9b19f7SAdrian Chadd 			ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds);
45121840808SAdrian Chadd 
4526e84772fSAdrian Chadd 		/*
4536e84772fSAdrian Chadd 		 * If 11n is enabled, set it up as if it's an aggregate
4546e84772fSAdrian Chadd 		 * frame.
4556e84772fSAdrian Chadd 		 */
4566e84772fSAdrian Chadd 		if (is_last_subframe) {
4576e84772fSAdrian Chadd 			ath_hal_set11n_aggr_last(sc->sc_ah,
4586e84772fSAdrian Chadd 			    (struct ath_desc *) ds);
4596e84772fSAdrian Chadd 		} else if (is_aggr) {
4606e84772fSAdrian Chadd 			/*
4616e84772fSAdrian Chadd 			 * This clears the aggrlen field; so
4626e84772fSAdrian Chadd 			 * the caller needs to call set_aggr_first()!
4636e84772fSAdrian Chadd 			 *
4646e84772fSAdrian Chadd 			 * XXX TODO: don't call this for the first
4656e84772fSAdrian Chadd 			 * descriptor in the first frame in an
4666e84772fSAdrian Chadd 			 * aggregate!
4676e84772fSAdrian Chadd 			 */
4686e84772fSAdrian Chadd 			ath_hal_set11n_aggr_middle(sc->sc_ah,
4696e84772fSAdrian Chadd 			    (struct ath_desc *) ds,
4706e84772fSAdrian Chadd 			    bf->bf_state.bfs_ndelim);
4716e84772fSAdrian Chadd 		}
472e2137b86SAdrian Chadd 		isFirstDesc = 0;
47342083b3dSAdrian Chadd 		bf->bf_lastds = (struct ath_desc *) ds;
4742b200bb4SAdrian Chadd 
4752b200bb4SAdrian Chadd 		/*
4762b200bb4SAdrian Chadd 		 * Don't forget to skip to the next descriptor.
4772b200bb4SAdrian Chadd 		 */
47842083b3dSAdrian Chadd 		ds += sc->sc_tx_desclen;
4792b200bb4SAdrian Chadd 		dsp++;
4802b200bb4SAdrian Chadd 
4812b200bb4SAdrian Chadd 		/*
4822b200bb4SAdrian Chadd 		 * .. and don't forget to blank these out!
4832b200bb4SAdrian Chadd 		 */
4842b200bb4SAdrian Chadd 		bzero(bufAddrList, sizeof(bufAddrList));
4852b200bb4SAdrian Chadd 		bzero(segLenList, sizeof(segLenList));
486b8e788a5SAdrian Chadd 	}
4874d7f8837SAdrian Chadd 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
48881a82688SAdrian Chadd }
48981a82688SAdrian Chadd 
490eb6f0de0SAdrian Chadd /*
491d34a7347SAdrian Chadd  * Set the rate control fields in the given descriptor based on
492d34a7347SAdrian Chadd  * the bf_state fields and node state.
493d34a7347SAdrian Chadd  *
494d34a7347SAdrian Chadd  * The bfs fields should already be set with the relevant rate
495d34a7347SAdrian Chadd  * control information, including whether MRR is to be enabled.
496d34a7347SAdrian Chadd  *
497d34a7347SAdrian Chadd  * Since the FreeBSD HAL currently sets up the first TX rate
498d34a7347SAdrian Chadd  * in ath_hal_setuptxdesc(), this will setup the MRR
499d34a7347SAdrian Chadd  * conditionally for the pre-11n chips, and call ath_buf_set_rate
500d34a7347SAdrian Chadd  * unconditionally for 11n chips. These require the 11n rate
501d34a7347SAdrian Chadd  * scenario to be set if MCS rates are enabled, so it's easier
502d34a7347SAdrian Chadd  * to just always call it. The caller can then only set rates 2, 3
503d34a7347SAdrian Chadd  * and 4 if multi-rate retry is needed.
504d34a7347SAdrian Chadd  */
505d34a7347SAdrian Chadd static void
506d34a7347SAdrian Chadd ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
507d34a7347SAdrian Chadd     struct ath_buf *bf)
508d34a7347SAdrian Chadd {
509d34a7347SAdrian Chadd 	struct ath_rc_series *rc = bf->bf_state.bfs_rc;
510d34a7347SAdrian Chadd 
511d34a7347SAdrian Chadd 	/* If mrr is disabled, blank tries 1, 2, 3 */
512d34a7347SAdrian Chadd 	if (! bf->bf_state.bfs_ismrr)
513d34a7347SAdrian Chadd 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
514d34a7347SAdrian Chadd 
515491e1248SAdrian Chadd #if 0
516491e1248SAdrian Chadd 	/*
517491e1248SAdrian Chadd 	 * If NOACK is set, just set ntries=1.
518491e1248SAdrian Chadd 	 */
519491e1248SAdrian Chadd 	else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) {
520491e1248SAdrian Chadd 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
521491e1248SAdrian Chadd 		rc[0].tries = 1;
522491e1248SAdrian Chadd 	}
523491e1248SAdrian Chadd #endif
524491e1248SAdrian Chadd 
525d34a7347SAdrian Chadd 	/*
526d34a7347SAdrian Chadd 	 * Always call - that way a retried descriptor will
527d34a7347SAdrian Chadd 	 * have the MRR fields overwritten.
528d34a7347SAdrian Chadd 	 *
529d34a7347SAdrian Chadd 	 * XXX TODO: see if this is really needed - setting up
530d34a7347SAdrian Chadd 	 * the first descriptor should set the MRR fields to 0
531d34a7347SAdrian Chadd 	 * for us anyway.
532d34a7347SAdrian Chadd 	 */
533d34a7347SAdrian Chadd 	if (ath_tx_is_11n(sc)) {
534d34a7347SAdrian Chadd 		ath_buf_set_rate(sc, ni, bf);
535d34a7347SAdrian Chadd 	} else {
536d34a7347SAdrian Chadd 		ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
537d34a7347SAdrian Chadd 			, rc[1].ratecode, rc[1].tries
538d34a7347SAdrian Chadd 			, rc[2].ratecode, rc[2].tries
539d34a7347SAdrian Chadd 			, rc[3].ratecode, rc[3].tries
540d34a7347SAdrian Chadd 		);
541d34a7347SAdrian Chadd 	}
542d34a7347SAdrian Chadd }
543d34a7347SAdrian Chadd 
544d34a7347SAdrian Chadd /*
545eb6f0de0SAdrian Chadd  * Setup segments+descriptors for an 11n aggregate.
546eb6f0de0SAdrian Chadd  * bf_first is the first buffer in the aggregate.
547eb6f0de0SAdrian Chadd  * The descriptor list must already been linked together using
548eb6f0de0SAdrian Chadd  * bf->bf_next.
549eb6f0de0SAdrian Chadd  */
550eb6f0de0SAdrian Chadd static void
551eb6f0de0SAdrian Chadd ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
552eb6f0de0SAdrian Chadd {
553eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_prev = NULL;
5546e84772fSAdrian Chadd 	struct ath_desc *ds0 = bf_first->bf_desc;
555eb6f0de0SAdrian Chadd 
556eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
557eb6f0de0SAdrian Chadd 	    __func__, bf_first->bf_state.bfs_nframes,
558eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_al);
559eb6f0de0SAdrian Chadd 
5607d9dd2acSAdrian Chadd 	bf = bf_first;
5617d9dd2acSAdrian Chadd 
5627d9dd2acSAdrian Chadd 	if (bf->bf_state.bfs_txrate0 == 0)
5637d9dd2acSAdrian Chadd 		device_printf(sc->sc_dev, "%s: bf=%p, txrate0=%d\n",
5647d9dd2acSAdrian Chadd 		    __func__, bf, 0);
5657d9dd2acSAdrian Chadd 	if (bf->bf_state.bfs_rc[0].ratecode == 0)
5667d9dd2acSAdrian Chadd 		device_printf(sc->sc_dev, "%s: bf=%p, rix0=%d\n",
5677d9dd2acSAdrian Chadd 		    __func__, bf, 0);
5687d9dd2acSAdrian Chadd 
569eb6f0de0SAdrian Chadd 	/*
5706e84772fSAdrian Chadd 	 * Setup all descriptors of all subframes - this will
5716e84772fSAdrian Chadd 	 * call ath_hal_set11naggrmiddle() on every frame.
572eb6f0de0SAdrian Chadd 	 */
573eb6f0de0SAdrian Chadd 	while (bf != NULL) {
574eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
575eb6f0de0SAdrian Chadd 		    "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
576eb6f0de0SAdrian Chadd 		    __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
577eb6f0de0SAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno));
578eb6f0de0SAdrian Chadd 
5796e84772fSAdrian Chadd 		/*
5806e84772fSAdrian Chadd 		 * Setup the initial fields for the first descriptor - all
5816e84772fSAdrian Chadd 		 * the non-11n specific stuff.
5826e84772fSAdrian Chadd 		 */
5836e84772fSAdrian Chadd 		ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc
5846e84772fSAdrian Chadd 			, bf->bf_state.bfs_pktlen	/* packet length */
5856e84772fSAdrian Chadd 			, bf->bf_state.bfs_hdrlen	/* header length */
5866e84772fSAdrian Chadd 			, bf->bf_state.bfs_atype	/* Atheros packet type */
5876e84772fSAdrian Chadd 			, bf->bf_state.bfs_txpower	/* txpower */
5886e84772fSAdrian Chadd 			, bf->bf_state.bfs_txrate0
5896e84772fSAdrian Chadd 			, bf->bf_state.bfs_try0		/* series 0 rate/tries */
5906e84772fSAdrian Chadd 			, bf->bf_state.bfs_keyix	/* key cache index */
5916e84772fSAdrian Chadd 			, bf->bf_state.bfs_txantenna	/* antenna mode */
5926e84772fSAdrian Chadd 			, bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ	/* flags */
5936e84772fSAdrian Chadd 			, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
5946e84772fSAdrian Chadd 			, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
5956e84772fSAdrian Chadd 		);
5966e84772fSAdrian Chadd 
5976e84772fSAdrian Chadd 		/*
5986e84772fSAdrian Chadd 		 * First descriptor? Setup the rate control and initial
5996e84772fSAdrian Chadd 		 * aggregate header information.
6006e84772fSAdrian Chadd 		 */
6016e84772fSAdrian Chadd 		if (bf == bf_first) {
6026e84772fSAdrian Chadd 			/*
6036e84772fSAdrian Chadd 			 * setup first desc with rate and aggr info
6046e84772fSAdrian Chadd 			 */
6056e84772fSAdrian Chadd 			ath_tx_set_ratectrl(sc, bf->bf_node, bf);
6066e84772fSAdrian Chadd 		}
6076e84772fSAdrian Chadd 
6086e84772fSAdrian Chadd 		/*
6096e84772fSAdrian Chadd 		 * Setup the descriptors for a multi-descriptor frame.
6106e84772fSAdrian Chadd 		 * This is both aggregate and non-aggregate aware.
6116e84772fSAdrian Chadd 		 */
6126e84772fSAdrian Chadd 		ath_tx_chaindesclist(sc, ds0, bf,
6136e84772fSAdrian Chadd 		    1, /* is_aggr */
6146e84772fSAdrian Chadd 		    !! (bf == bf_first), /* is_first_subframe */
6156e84772fSAdrian Chadd 		    !! (bf->bf_next == NULL) /* is_last_subframe */
6166e84772fSAdrian Chadd 		    );
6176e84772fSAdrian Chadd 
6186e84772fSAdrian Chadd 		if (bf == bf_first) {
6196e84772fSAdrian Chadd 			/*
6206e84772fSAdrian Chadd 			 * Initialise the first 11n aggregate with the
6216e84772fSAdrian Chadd 			 * aggregate length and aggregate enable bits.
6226e84772fSAdrian Chadd 			 */
6236e84772fSAdrian Chadd 			ath_hal_set11n_aggr_first(sc->sc_ah,
6246e84772fSAdrian Chadd 			    ds0,
6256e84772fSAdrian Chadd 			    bf->bf_state.bfs_al,
6266e84772fSAdrian Chadd 			    bf->bf_state.bfs_ndelim);
6276e84772fSAdrian Chadd 		}
628eb6f0de0SAdrian Chadd 
629eb6f0de0SAdrian Chadd 		/*
630eb6f0de0SAdrian Chadd 		 * Link the last descriptor of the previous frame
631eb6f0de0SAdrian Chadd 		 * to the beginning descriptor of this frame.
632eb6f0de0SAdrian Chadd 		 */
633eb6f0de0SAdrian Chadd 		if (bf_prev != NULL)
634bb069955SAdrian Chadd 			ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds,
635bb069955SAdrian Chadd 			    bf->bf_daddr);
636eb6f0de0SAdrian Chadd 
637eb6f0de0SAdrian Chadd 		/* Save a copy so we can link the next descriptor in */
638eb6f0de0SAdrian Chadd 		bf_prev = bf;
639eb6f0de0SAdrian Chadd 		bf = bf->bf_next;
640eb6f0de0SAdrian Chadd 	}
641eb6f0de0SAdrian Chadd 
642eb6f0de0SAdrian Chadd 	/*
643eb6f0de0SAdrian Chadd 	 * Set the first descriptor bf_lastds field to point to
644eb6f0de0SAdrian Chadd 	 * the last descriptor in the last subframe, that's where
645eb6f0de0SAdrian Chadd 	 * the status update will occur.
646eb6f0de0SAdrian Chadd 	 */
647eb6f0de0SAdrian Chadd 	bf_first->bf_lastds = bf_prev->bf_lastds;
648eb6f0de0SAdrian Chadd 
649eb6f0de0SAdrian Chadd 	/*
650eb6f0de0SAdrian Chadd 	 * And bf_last in the first descriptor points to the end of
651eb6f0de0SAdrian Chadd 	 * the aggregate list.
652eb6f0de0SAdrian Chadd 	 */
653eb6f0de0SAdrian Chadd 	bf_first->bf_last = bf_prev;
654eb6f0de0SAdrian Chadd 
655bbdf3df1SAdrian Chadd 	/*
656bbdf3df1SAdrian Chadd 	 * For non-AR9300 NICs, which require the rate control
657bbdf3df1SAdrian Chadd 	 * in the final descriptor - let's set that up now.
658bbdf3df1SAdrian Chadd 	 *
659bbdf3df1SAdrian Chadd 	 * This is because the filltxdesc() HAL call doesn't
660bbdf3df1SAdrian Chadd 	 * populate the last segment with rate control information
661bbdf3df1SAdrian Chadd 	 * if firstSeg is also true.  For non-aggregate frames
662bbdf3df1SAdrian Chadd 	 * that is fine, as the first frame already has rate control
663bbdf3df1SAdrian Chadd 	 * info.  But if the last frame in an aggregate has one
664bbdf3df1SAdrian Chadd 	 * descriptor, both firstseg and lastseg will be true and
665bbdf3df1SAdrian Chadd 	 * the rate info isn't copied.
666bbdf3df1SAdrian Chadd 	 *
667bbdf3df1SAdrian Chadd 	 * This is inefficient on MIPS/ARM platforms that have
668bbdf3df1SAdrian Chadd 	 * non-cachable memory for TX descriptors, but we'll just
669bbdf3df1SAdrian Chadd 	 * make do for now.
670bbdf3df1SAdrian Chadd 	 *
671bbdf3df1SAdrian Chadd 	 * As to why the rate table is stashed in the last descriptor
672bbdf3df1SAdrian Chadd 	 * rather than the first descriptor?  Because proctxdesc()
673bbdf3df1SAdrian Chadd 	 * is called on the final descriptor in an MPDU or A-MPDU -
674bbdf3df1SAdrian Chadd 	 * ie, the one that gets updated by the hardware upon
675bbdf3df1SAdrian Chadd 	 * completion.  That way proctxdesc() doesn't need to know
676bbdf3df1SAdrian Chadd 	 * about the first _and_ last TX descriptor.
677bbdf3df1SAdrian Chadd 	 */
678bbdf3df1SAdrian Chadd 	ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0);
679bbdf3df1SAdrian Chadd 
680eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
681eb6f0de0SAdrian Chadd }
682eb6f0de0SAdrian Chadd 
68346634305SAdrian Chadd /*
68446634305SAdrian Chadd  * Hand-off a frame to the multicast TX queue.
68546634305SAdrian Chadd  *
68646634305SAdrian Chadd  * This is a software TXQ which will be appended to the CAB queue
68746634305SAdrian Chadd  * during the beacon setup code.
68846634305SAdrian Chadd  *
68946634305SAdrian Chadd  * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID
690fc56c9c5SAdrian Chadd  * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated
69146634305SAdrian Chadd  * with the actual hardware txq, or all of this will fall apart.
69246634305SAdrian Chadd  *
69346634305SAdrian Chadd  * XXX It may not be a bad idea to just stuff the QCU ID into bf_state
694fc56c9c5SAdrian Chadd  * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated
69546634305SAdrian Chadd  * correctly.
69646634305SAdrian Chadd  */
697eb6f0de0SAdrian Chadd static void
698eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
699eb6f0de0SAdrian Chadd     struct ath_buf *bf)
700eb6f0de0SAdrian Chadd {
701375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
702375307d4SAdrian Chadd 
703eb6f0de0SAdrian Chadd 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
704eb6f0de0SAdrian Chadd 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
70556a85978SAdrian Chadd 
70656a85978SAdrian Chadd 	ATH_TXQ_LOCK(txq);
7070891354cSAdrian Chadd 	if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) {
7080891354cSAdrian Chadd 		struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s);
709eb6f0de0SAdrian Chadd 		struct ieee80211_frame *wh;
710eb6f0de0SAdrian Chadd 
711eb6f0de0SAdrian Chadd 		/* mark previous frame */
7120891354cSAdrian Chadd 		wh = mtod(bf_last->bf_m, struct ieee80211_frame *);
713eb6f0de0SAdrian Chadd 		wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
7140891354cSAdrian Chadd 		bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap,
715eb6f0de0SAdrian Chadd 		    BUS_DMASYNC_PREWRITE);
716eb6f0de0SAdrian Chadd 
717eb6f0de0SAdrian Chadd 		/* link descriptor */
7180891354cSAdrian Chadd 		ath_hal_settxdesclink(sc->sc_ah,
7190891354cSAdrian Chadd 		    bf_last->bf_lastds,
7200891354cSAdrian Chadd 		    bf->bf_daddr);
721eb6f0de0SAdrian Chadd 	}
722eb6f0de0SAdrian Chadd 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
723b837332dSAdrian Chadd 	ATH_TXQ_UNLOCK(txq);
724eb6f0de0SAdrian Chadd }
725eb6f0de0SAdrian Chadd 
726eb6f0de0SAdrian Chadd /*
727eb6f0de0SAdrian Chadd  * Hand-off packet to a hardware queue.
728eb6f0de0SAdrian Chadd  */
729eb6f0de0SAdrian Chadd static void
730d4365d16SAdrian Chadd ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
731d4365d16SAdrian Chadd     struct ath_buf *bf)
732eb6f0de0SAdrian Chadd {
733eb6f0de0SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
73481a82688SAdrian Chadd 
735b8e788a5SAdrian Chadd 	/*
736b8e788a5SAdrian Chadd 	 * Insert the frame on the outbound list and pass it on
737b8e788a5SAdrian Chadd 	 * to the hardware.  Multicast frames buffered for power
738b8e788a5SAdrian Chadd 	 * save stations and transmit from the CAB queue are stored
739b8e788a5SAdrian Chadd 	 * on a s/w only queue and loaded on to the CAB queue in
740b8e788a5SAdrian Chadd 	 * the SWBA handler since frames only go out on DTIM and
741b8e788a5SAdrian Chadd 	 * to avoid possible races.
742b8e788a5SAdrian Chadd 	 */
743375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
744b8e788a5SAdrian Chadd 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
745eb6f0de0SAdrian Chadd 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
746eb6f0de0SAdrian Chadd 	KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
747eb6f0de0SAdrian Chadd 	     ("ath_tx_handoff_hw called for mcast queue"));
748eb6f0de0SAdrian Chadd 
749ef27340cSAdrian Chadd #if 0
750ef27340cSAdrian Chadd 	/*
751ef27340cSAdrian Chadd 	 * This causes a LOR. Find out where the PCU lock is being
752ef27340cSAdrian Chadd 	 * held whilst the TXQ lock is grabbed - that shouldn't
753ef27340cSAdrian Chadd 	 * be occuring.
754ef27340cSAdrian Chadd 	 */
755ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
756ef27340cSAdrian Chadd 	if (sc->sc_inreset_cnt) {
757ef27340cSAdrian Chadd 		ATH_PCU_UNLOCK(sc);
758ef27340cSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_RESET,
759ef27340cSAdrian Chadd 		    "%s: called with sc_in_reset != 0\n",
760ef27340cSAdrian Chadd 		    __func__);
761ef27340cSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_XMIT,
762ef27340cSAdrian Chadd 		    "%s: queued: TXDP[%u] = %p (%p) depth %d\n",
763ef27340cSAdrian Chadd 		    __func__, txq->axq_qnum,
764ef27340cSAdrian Chadd 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
765ef27340cSAdrian Chadd 		    txq->axq_depth);
766ef27340cSAdrian Chadd 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
767ef27340cSAdrian Chadd 		if (bf->bf_state.bfs_aggr)
768ef27340cSAdrian Chadd 			txq->axq_aggr_depth++;
769ef27340cSAdrian Chadd 		/*
770ef27340cSAdrian Chadd 		 * There's no need to update axq_link; the hardware
771ef27340cSAdrian Chadd 		 * is in reset and once the reset is complete, any
772ef27340cSAdrian Chadd 		 * non-empty queues will simply have DMA restarted.
773ef27340cSAdrian Chadd 		 */
774ef27340cSAdrian Chadd 		return;
775ef27340cSAdrian Chadd 		}
776ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
777ef27340cSAdrian Chadd #endif
778ef27340cSAdrian Chadd 
779eb6f0de0SAdrian Chadd 	/* For now, so not to generate whitespace diffs */
780eb6f0de0SAdrian Chadd 	if (1) {
781b837332dSAdrian Chadd 		ATH_TXQ_LOCK(txq);
782b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
783b8e788a5SAdrian Chadd 		int qbusy;
784b8e788a5SAdrian Chadd 
785b8e788a5SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
786b8e788a5SAdrian Chadd 		qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
78703682514SAdrian Chadd 
78803682514SAdrian Chadd 		ATH_KTR(sc, ATH_KTR_TX, 4,
78903682514SAdrian Chadd 		    "ath_tx_handoff: txq=%u, add bf=%p, qbusy=%d, depth=%d",
79003682514SAdrian Chadd 		    txq->axq_qnum, bf, qbusy, txq->axq_depth);
791b8e788a5SAdrian Chadd 		if (txq->axq_link == NULL) {
792b8e788a5SAdrian Chadd 			/*
793b8e788a5SAdrian Chadd 			 * Be careful writing the address to TXDP.  If
794b8e788a5SAdrian Chadd 			 * the tx q is enabled then this write will be
795b8e788a5SAdrian Chadd 			 * ignored.  Normally this is not an issue but
796b8e788a5SAdrian Chadd 			 * when tdma is in use and the q is beacon gated
797b8e788a5SAdrian Chadd 			 * this race can occur.  If the q is busy then
798b8e788a5SAdrian Chadd 			 * defer the work to later--either when another
799b8e788a5SAdrian Chadd 			 * packet comes along or when we prepare a beacon
800b8e788a5SAdrian Chadd 			 * frame at SWBA.
801b8e788a5SAdrian Chadd 			 */
802b8e788a5SAdrian Chadd 			if (!qbusy) {
803d4365d16SAdrian Chadd 				ath_hal_puttxbuf(ah, txq->axq_qnum,
804d4365d16SAdrian Chadd 				    bf->bf_daddr);
805b8e788a5SAdrian Chadd 				txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
806b8e788a5SAdrian Chadd 				DPRINTF(sc, ATH_DEBUG_XMIT,
80703682514SAdrian Chadd 				    "%s: TXDP[%u] = %p (%p) lastds=%p depth %d\n",
808b8e788a5SAdrian Chadd 				    __func__, txq->axq_qnum,
809b8e788a5SAdrian Chadd 				    (caddr_t)bf->bf_daddr, bf->bf_desc,
81003682514SAdrian Chadd 				    bf->bf_lastds,
81103682514SAdrian Chadd 				    txq->axq_depth);
81203682514SAdrian Chadd 				ATH_KTR(sc, ATH_KTR_TX, 5,
81303682514SAdrian Chadd 				    "ath_tx_handoff: TXDP[%u] = %p (%p) "
81403682514SAdrian Chadd 				    "lastds=%p depth %d",
81503682514SAdrian Chadd 				    txq->axq_qnum,
81603682514SAdrian Chadd 				    (caddr_t)bf->bf_daddr, bf->bf_desc,
81703682514SAdrian Chadd 				    bf->bf_lastds,
818b8e788a5SAdrian Chadd 				    txq->axq_depth);
819b8e788a5SAdrian Chadd 			} else {
820b8e788a5SAdrian Chadd 				txq->axq_flags |= ATH_TXQ_PUTPENDING;
821b8e788a5SAdrian Chadd 				DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
822b8e788a5SAdrian Chadd 				    "%s: Q%u busy, defer enable\n", __func__,
823b8e788a5SAdrian Chadd 				    txq->axq_qnum);
82403682514SAdrian Chadd 				ATH_KTR(sc, ATH_KTR_TX, 0, "defer enable");
825b8e788a5SAdrian Chadd 			}
826b8e788a5SAdrian Chadd 		} else {
827b8e788a5SAdrian Chadd 			*txq->axq_link = bf->bf_daddr;
828b8e788a5SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_XMIT,
829b8e788a5SAdrian Chadd 			    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
830b8e788a5SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
831d4365d16SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
832d4365d16SAdrian Chadd 			    txq->axq_depth);
83303682514SAdrian Chadd 			ATH_KTR(sc, ATH_KTR_TX, 5,
83403682514SAdrian Chadd 			    "ath_tx_handoff: link[%u](%p)=%p (%p) lastds=%p",
83503682514SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
83603682514SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
83703682514SAdrian Chadd 			    bf->bf_lastds);
83803682514SAdrian Chadd 
839b8e788a5SAdrian Chadd 			if ((txq->axq_flags & ATH_TXQ_PUTPENDING) && !qbusy) {
840b8e788a5SAdrian Chadd 				/*
841b8e788a5SAdrian Chadd 				 * The q was busy when we previously tried
842b8e788a5SAdrian Chadd 				 * to write the address of the first buffer
843b8e788a5SAdrian Chadd 				 * in the chain.  Since it's not busy now
844b8e788a5SAdrian Chadd 				 * handle this chore.  We are certain the
845b8e788a5SAdrian Chadd 				 * buffer at the front is the right one since
846b8e788a5SAdrian Chadd 				 * axq_link is NULL only when the buffer list
847b8e788a5SAdrian Chadd 				 * is/was empty.
848b8e788a5SAdrian Chadd 				 */
849b8e788a5SAdrian Chadd 				ath_hal_puttxbuf(ah, txq->axq_qnum,
8506b349e5aSAdrian Chadd 					TAILQ_FIRST(&txq->axq_q)->bf_daddr);
851b8e788a5SAdrian Chadd 				txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
852b8e788a5SAdrian Chadd 				DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
853b8e788a5SAdrian Chadd 				    "%s: Q%u restarted\n", __func__,
854b8e788a5SAdrian Chadd 				    txq->axq_qnum);
85503682514SAdrian Chadd 				ATH_KTR(sc, ATH_KTR_TX, 4,
85603682514SAdrian Chadd 				  "ath_tx_handoff: txq[%d] restarted, bf=%p "
85703682514SAdrian Chadd 				  "daddr=%p ds=%p",
85803682514SAdrian Chadd 				    txq->axq_qnum,
85903682514SAdrian Chadd 				    bf,
86003682514SAdrian Chadd 				    (caddr_t)bf->bf_daddr,
86103682514SAdrian Chadd 				    bf->bf_desc);
862b8e788a5SAdrian Chadd 			}
863b8e788a5SAdrian Chadd 		}
864b8e788a5SAdrian Chadd #else
865b8e788a5SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
866b1dddc28SAdrian Chadd 		ATH_KTR(sc, ATH_KTR_TX, 3,
867b1dddc28SAdrian Chadd 		    "ath_tx_handoff: non-tdma: txq=%u, add bf=%p "
86803682514SAdrian Chadd 		    "depth=%d",
86903682514SAdrian Chadd 		    txq->axq_qnum,
87003682514SAdrian Chadd 		    bf,
87103682514SAdrian Chadd 		    txq->axq_depth);
872b8e788a5SAdrian Chadd 		if (txq->axq_link == NULL) {
873b8e788a5SAdrian Chadd 			ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
874b8e788a5SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_XMIT,
875b8e788a5SAdrian Chadd 			    "%s: TXDP[%u] = %p (%p) depth %d\n",
876b8e788a5SAdrian Chadd 			    __func__, txq->axq_qnum,
877b8e788a5SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
878b8e788a5SAdrian Chadd 			    txq->axq_depth);
87903682514SAdrian Chadd 			ATH_KTR(sc, ATH_KTR_TX, 5,
88003682514SAdrian Chadd 			    "ath_tx_handoff: non-tdma: TXDP[%u] = %p (%p) "
88103682514SAdrian Chadd 			    "lastds=%p depth %d",
88203682514SAdrian Chadd 			    txq->axq_qnum,
88303682514SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
88403682514SAdrian Chadd 			    bf->bf_lastds,
88503682514SAdrian Chadd 			    txq->axq_depth);
88603682514SAdrian Chadd 
887b8e788a5SAdrian Chadd 		} else {
888b8e788a5SAdrian Chadd 			*txq->axq_link = bf->bf_daddr;
889b8e788a5SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_XMIT,
890b8e788a5SAdrian Chadd 			    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
891b8e788a5SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
892d4365d16SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
893d4365d16SAdrian Chadd 			    txq->axq_depth);
89403682514SAdrian Chadd 			ATH_KTR(sc, ATH_KTR_TX, 5,
89503682514SAdrian Chadd 			    "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) "
89603682514SAdrian Chadd 			    "lastds=%d",
89703682514SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
89803682514SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
89903682514SAdrian Chadd 			    bf->bf_lastds);
90003682514SAdrian Chadd 
901b8e788a5SAdrian Chadd 		}
902b8e788a5SAdrian Chadd #endif /* IEEE80211_SUPPORT_TDMA */
9036edf1dc7SAdrian Chadd 		if (bf->bf_state.bfs_aggr)
9046edf1dc7SAdrian Chadd 			txq->axq_aggr_depth++;
905bb069955SAdrian Chadd 		ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link);
906b8e788a5SAdrian Chadd 		ath_hal_txstart(ah, txq->axq_qnum);
907b837332dSAdrian Chadd 		ATH_TXQ_UNLOCK(txq);
90803682514SAdrian Chadd 		ATH_KTR(sc, ATH_KTR_TX, 1,
90903682514SAdrian Chadd 		    "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum);
910b8e788a5SAdrian Chadd 	}
911b8e788a5SAdrian Chadd }
912eb6f0de0SAdrian Chadd 
913eb6f0de0SAdrian Chadd /*
914eb6f0de0SAdrian Chadd  * Restart TX DMA for the given TXQ.
915eb6f0de0SAdrian Chadd  *
916eb6f0de0SAdrian Chadd  * This must be called whether the queue is empty or not.
917eb6f0de0SAdrian Chadd  */
918746bab5bSAdrian Chadd static void
919746bab5bSAdrian Chadd ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
920eb6f0de0SAdrian Chadd {
921eb6f0de0SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
922b1f3262cSAdrian Chadd 	struct ath_buf *bf, *bf_last;
923eb6f0de0SAdrian Chadd 
924b837332dSAdrian Chadd 	ATH_TXQ_LOCK_ASSERT(txq);
925eb6f0de0SAdrian Chadd 	/* This is always going to be cleared, empty or not */
926eb6f0de0SAdrian Chadd 	txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
927eb6f0de0SAdrian Chadd 
928b1f3262cSAdrian Chadd 	/* XXX make this ATH_TXQ_FIRST */
929eb6f0de0SAdrian Chadd 	bf = TAILQ_FIRST(&txq->axq_q);
930b1f3262cSAdrian Chadd 	bf_last = ATH_TXQ_LAST(txq, axq_q_s);
931b1f3262cSAdrian Chadd 
932eb6f0de0SAdrian Chadd 	if (bf == NULL)
933eb6f0de0SAdrian Chadd 		return;
934eb6f0de0SAdrian Chadd 
935eb6f0de0SAdrian Chadd 	ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
936d2da5544SAdrian Chadd 	ath_hal_gettxdesclinkptr(ah, bf_last->bf_lastds, &txq->axq_link);
937eb6f0de0SAdrian Chadd 	ath_hal_txstart(ah, txq->axq_qnum);
938eb6f0de0SAdrian Chadd }
939eb6f0de0SAdrian Chadd 
940eb6f0de0SAdrian Chadd /*
941eb6f0de0SAdrian Chadd  * Hand off a packet to the hardware (or mcast queue.)
942eb6f0de0SAdrian Chadd  *
943eb6f0de0SAdrian Chadd  * The relevant hardware txq should be locked.
944eb6f0de0SAdrian Chadd  */
945eb6f0de0SAdrian Chadd static void
946746bab5bSAdrian Chadd ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
947746bab5bSAdrian Chadd     struct ath_buf *bf)
948eb6f0de0SAdrian Chadd {
949375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
950eb6f0de0SAdrian Chadd 
951bb327d28SAdrian Chadd #ifdef	ATH_DEBUG_ALQ
952bb327d28SAdrian Chadd 	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC))
953bb327d28SAdrian Chadd 		ath_tx_alq_post(sc, bf);
954bb327d28SAdrian Chadd #endif
955bb327d28SAdrian Chadd 
956eb6f0de0SAdrian Chadd 	if (txq->axq_qnum == ATH_TXQ_SWQ)
957eb6f0de0SAdrian Chadd 		ath_tx_handoff_mcast(sc, txq, bf);
958eb6f0de0SAdrian Chadd 	else
959eb6f0de0SAdrian Chadd 		ath_tx_handoff_hw(sc, txq, bf);
960b8e788a5SAdrian Chadd }
961b8e788a5SAdrian Chadd 
96281a82688SAdrian Chadd static int
96381a82688SAdrian Chadd ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
964d4365d16SAdrian Chadd     struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
965d4365d16SAdrian Chadd     int *keyix)
96681a82688SAdrian Chadd {
96712be5b9cSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_XMIT,
96812be5b9cSAdrian Chadd 	    "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
96912be5b9cSAdrian Chadd 	    __func__,
97012be5b9cSAdrian Chadd 	    *hdrlen,
97112be5b9cSAdrian Chadd 	    *pktlen,
97212be5b9cSAdrian Chadd 	    isfrag,
97312be5b9cSAdrian Chadd 	    iswep,
97412be5b9cSAdrian Chadd 	    m0);
97512be5b9cSAdrian Chadd 
97681a82688SAdrian Chadd 	if (iswep) {
97781a82688SAdrian Chadd 		const struct ieee80211_cipher *cip;
97881a82688SAdrian Chadd 		struct ieee80211_key *k;
97981a82688SAdrian Chadd 
98081a82688SAdrian Chadd 		/*
98181a82688SAdrian Chadd 		 * Construct the 802.11 header+trailer for an encrypted
98281a82688SAdrian Chadd 		 * frame. The only reason this can fail is because of an
98381a82688SAdrian Chadd 		 * unknown or unsupported cipher/key type.
98481a82688SAdrian Chadd 		 */
98581a82688SAdrian Chadd 		k = ieee80211_crypto_encap(ni, m0);
98681a82688SAdrian Chadd 		if (k == NULL) {
98781a82688SAdrian Chadd 			/*
98881a82688SAdrian Chadd 			 * This can happen when the key is yanked after the
98981a82688SAdrian Chadd 			 * frame was queued.  Just discard the frame; the
99081a82688SAdrian Chadd 			 * 802.11 layer counts failures and provides
99181a82688SAdrian Chadd 			 * debugging/diagnostics.
99281a82688SAdrian Chadd 			 */
993d4365d16SAdrian Chadd 			return (0);
99481a82688SAdrian Chadd 		}
99581a82688SAdrian Chadd 		/*
99681a82688SAdrian Chadd 		 * Adjust the packet + header lengths for the crypto
99781a82688SAdrian Chadd 		 * additions and calculate the h/w key index.  When
99881a82688SAdrian Chadd 		 * a s/w mic is done the frame will have had any mic
99981a82688SAdrian Chadd 		 * added to it prior to entry so m0->m_pkthdr.len will
100081a82688SAdrian Chadd 		 * account for it. Otherwise we need to add it to the
100181a82688SAdrian Chadd 		 * packet length.
100281a82688SAdrian Chadd 		 */
100381a82688SAdrian Chadd 		cip = k->wk_cipher;
100481a82688SAdrian Chadd 		(*hdrlen) += cip->ic_header;
100581a82688SAdrian Chadd 		(*pktlen) += cip->ic_header + cip->ic_trailer;
100681a82688SAdrian Chadd 		/* NB: frags always have any TKIP MIC done in s/w */
100781a82688SAdrian Chadd 		if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
100881a82688SAdrian Chadd 			(*pktlen) += cip->ic_miclen;
100981a82688SAdrian Chadd 		(*keyix) = k->wk_keyix;
101081a82688SAdrian Chadd 	} else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
101181a82688SAdrian Chadd 		/*
101281a82688SAdrian Chadd 		 * Use station key cache slot, if assigned.
101381a82688SAdrian Chadd 		 */
101481a82688SAdrian Chadd 		(*keyix) = ni->ni_ucastkey.wk_keyix;
101581a82688SAdrian Chadd 		if ((*keyix) == IEEE80211_KEYIX_NONE)
101681a82688SAdrian Chadd 			(*keyix) = HAL_TXKEYIX_INVALID;
101781a82688SAdrian Chadd 	} else
101881a82688SAdrian Chadd 		(*keyix) = HAL_TXKEYIX_INVALID;
101981a82688SAdrian Chadd 
1020d4365d16SAdrian Chadd 	return (1);
102181a82688SAdrian Chadd }
102281a82688SAdrian Chadd 
1023e2e4a2c2SAdrian Chadd /*
1024e2e4a2c2SAdrian Chadd  * Calculate whether interoperability protection is required for
1025e2e4a2c2SAdrian Chadd  * this frame.
1026e2e4a2c2SAdrian Chadd  *
1027e2e4a2c2SAdrian Chadd  * This requires the rate control information be filled in,
1028e2e4a2c2SAdrian Chadd  * as the protection requirement depends upon the current
1029e2e4a2c2SAdrian Chadd  * operating mode / PHY.
1030e2e4a2c2SAdrian Chadd  */
1031e2e4a2c2SAdrian Chadd static void
1032e2e4a2c2SAdrian Chadd ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
1033e2e4a2c2SAdrian Chadd {
1034e2e4a2c2SAdrian Chadd 	struct ieee80211_frame *wh;
1035e2e4a2c2SAdrian Chadd 	uint8_t rix;
1036e2e4a2c2SAdrian Chadd 	uint16_t flags;
1037e2e4a2c2SAdrian Chadd 	int shortPreamble;
1038e2e4a2c2SAdrian Chadd 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1039e2e4a2c2SAdrian Chadd 	struct ifnet *ifp = sc->sc_ifp;
1040e2e4a2c2SAdrian Chadd 	struct ieee80211com *ic = ifp->if_l2com;
1041e2e4a2c2SAdrian Chadd 
1042e2e4a2c2SAdrian Chadd 	flags = bf->bf_state.bfs_txflags;
1043e2e4a2c2SAdrian Chadd 	rix = bf->bf_state.bfs_rc[0].rix;
1044e2e4a2c2SAdrian Chadd 	shortPreamble = bf->bf_state.bfs_shpream;
1045e2e4a2c2SAdrian Chadd 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1046e2e4a2c2SAdrian Chadd 
1047e2e4a2c2SAdrian Chadd 	/*
1048e2e4a2c2SAdrian Chadd 	 * If 802.11g protection is enabled, determine whether
1049e2e4a2c2SAdrian Chadd 	 * to use RTS/CTS or just CTS.  Note that this is only
1050e2e4a2c2SAdrian Chadd 	 * done for OFDM unicast frames.
1051e2e4a2c2SAdrian Chadd 	 */
1052e2e4a2c2SAdrian Chadd 	if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1053e2e4a2c2SAdrian Chadd 	    rt->info[rix].phy == IEEE80211_T_OFDM &&
1054e2e4a2c2SAdrian Chadd 	    (flags & HAL_TXDESC_NOACK) == 0) {
1055e2e4a2c2SAdrian Chadd 		bf->bf_state.bfs_doprot = 1;
1056e2e4a2c2SAdrian Chadd 		/* XXX fragments must use CCK rates w/ protection */
1057e2e4a2c2SAdrian Chadd 		if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
1058e2e4a2c2SAdrian Chadd 			flags |= HAL_TXDESC_RTSENA;
1059e2e4a2c2SAdrian Chadd 		} else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
1060e2e4a2c2SAdrian Chadd 			flags |= HAL_TXDESC_CTSENA;
1061e2e4a2c2SAdrian Chadd 		}
1062e2e4a2c2SAdrian Chadd 		/*
1063e2e4a2c2SAdrian Chadd 		 * For frags it would be desirable to use the
1064e2e4a2c2SAdrian Chadd 		 * highest CCK rate for RTS/CTS.  But stations
1065e2e4a2c2SAdrian Chadd 		 * farther away may detect it at a lower CCK rate
1066e2e4a2c2SAdrian Chadd 		 * so use the configured protection rate instead
1067e2e4a2c2SAdrian Chadd 		 * (for now).
1068e2e4a2c2SAdrian Chadd 		 */
1069e2e4a2c2SAdrian Chadd 		sc->sc_stats.ast_tx_protect++;
1070e2e4a2c2SAdrian Chadd 	}
1071e2e4a2c2SAdrian Chadd 
1072e2e4a2c2SAdrian Chadd 	/*
1073e2e4a2c2SAdrian Chadd 	 * If 11n protection is enabled and it's a HT frame,
1074e2e4a2c2SAdrian Chadd 	 * enable RTS.
1075e2e4a2c2SAdrian Chadd 	 *
1076e2e4a2c2SAdrian Chadd 	 * XXX ic_htprotmode or ic_curhtprotmode?
1077e2e4a2c2SAdrian Chadd 	 * XXX should it_htprotmode only matter if ic_curhtprotmode
1078e2e4a2c2SAdrian Chadd 	 * XXX indicates it's not a HT pure environment?
1079e2e4a2c2SAdrian Chadd 	 */
1080e2e4a2c2SAdrian Chadd 	if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
1081e2e4a2c2SAdrian Chadd 	    rt->info[rix].phy == IEEE80211_T_HT &&
1082e2e4a2c2SAdrian Chadd 	    (flags & HAL_TXDESC_NOACK) == 0) {
1083e2e4a2c2SAdrian Chadd 		flags |= HAL_TXDESC_RTSENA;
1084e2e4a2c2SAdrian Chadd 		sc->sc_stats.ast_tx_htprotect++;
1085e2e4a2c2SAdrian Chadd 	}
1086e2e4a2c2SAdrian Chadd 	bf->bf_state.bfs_txflags = flags;
1087e2e4a2c2SAdrian Chadd }
1088e2e4a2c2SAdrian Chadd 
1089e2e4a2c2SAdrian Chadd /*
1090e2e4a2c2SAdrian Chadd  * Update the frame duration given the currently selected rate.
1091e2e4a2c2SAdrian Chadd  *
1092e2e4a2c2SAdrian Chadd  * This also updates the frame duration value, so it will require
1093e2e4a2c2SAdrian Chadd  * a DMA flush.
1094e2e4a2c2SAdrian Chadd  */
1095e2e4a2c2SAdrian Chadd static void
1096e2e4a2c2SAdrian Chadd ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
1097e2e4a2c2SAdrian Chadd {
1098e2e4a2c2SAdrian Chadd 	struct ieee80211_frame *wh;
1099e2e4a2c2SAdrian Chadd 	uint8_t rix;
1100e2e4a2c2SAdrian Chadd 	uint16_t flags;
1101e2e4a2c2SAdrian Chadd 	int shortPreamble;
1102e2e4a2c2SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
1103e2e4a2c2SAdrian Chadd 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1104e2e4a2c2SAdrian Chadd 	int isfrag = bf->bf_m->m_flags & M_FRAG;
1105e2e4a2c2SAdrian Chadd 
1106e2e4a2c2SAdrian Chadd 	flags = bf->bf_state.bfs_txflags;
1107e2e4a2c2SAdrian Chadd 	rix = bf->bf_state.bfs_rc[0].rix;
1108e2e4a2c2SAdrian Chadd 	shortPreamble = bf->bf_state.bfs_shpream;
1109e2e4a2c2SAdrian Chadd 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1110e2e4a2c2SAdrian Chadd 
1111e2e4a2c2SAdrian Chadd 	/*
1112e2e4a2c2SAdrian Chadd 	 * Calculate duration.  This logically belongs in the 802.11
1113e2e4a2c2SAdrian Chadd 	 * layer but it lacks sufficient information to calculate it.
1114e2e4a2c2SAdrian Chadd 	 */
1115e2e4a2c2SAdrian Chadd 	if ((flags & HAL_TXDESC_NOACK) == 0 &&
1116e2e4a2c2SAdrian Chadd 	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
1117e2e4a2c2SAdrian Chadd 		u_int16_t dur;
1118e2e4a2c2SAdrian Chadd 		if (shortPreamble)
1119e2e4a2c2SAdrian Chadd 			dur = rt->info[rix].spAckDuration;
1120e2e4a2c2SAdrian Chadd 		else
1121e2e4a2c2SAdrian Chadd 			dur = rt->info[rix].lpAckDuration;
1122e2e4a2c2SAdrian Chadd 		if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1123e2e4a2c2SAdrian Chadd 			dur += dur;		/* additional SIFS+ACK */
11241a85141aSAdrian Chadd 			KASSERT(bf->bf_m->m_nextpkt != NULL, ("no fragment"));
1125e2e4a2c2SAdrian Chadd 			/*
1126e2e4a2c2SAdrian Chadd 			 * Include the size of next fragment so NAV is
1127e2e4a2c2SAdrian Chadd 			 * updated properly.  The last fragment uses only
1128e2e4a2c2SAdrian Chadd 			 * the ACK duration
11299572684aSAdrian Chadd 			 *
11309572684aSAdrian Chadd 			 * XXX TODO: ensure that the rate lookup for each
11319572684aSAdrian Chadd 			 * fragment is the same as the rate used by the
11329572684aSAdrian Chadd 			 * first fragment!
1133e2e4a2c2SAdrian Chadd 			 */
1134e2e4a2c2SAdrian Chadd 			dur += ath_hal_computetxtime(ah, rt,
11351a85141aSAdrian Chadd 					bf->bf_m->m_nextpkt->m_pkthdr.len,
1136e2e4a2c2SAdrian Chadd 					rix, shortPreamble);
1137e2e4a2c2SAdrian Chadd 		}
1138e2e4a2c2SAdrian Chadd 		if (isfrag) {
1139e2e4a2c2SAdrian Chadd 			/*
1140e2e4a2c2SAdrian Chadd 			 * Force hardware to use computed duration for next
1141e2e4a2c2SAdrian Chadd 			 * fragment by disabling multi-rate retry which updates
1142e2e4a2c2SAdrian Chadd 			 * duration based on the multi-rate duration table.
1143e2e4a2c2SAdrian Chadd 			 */
1144e2e4a2c2SAdrian Chadd 			bf->bf_state.bfs_ismrr = 0;
1145e2e4a2c2SAdrian Chadd 			bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
1146e2e4a2c2SAdrian Chadd 			/* XXX update bfs_rc[0].try? */
1147e2e4a2c2SAdrian Chadd 		}
1148e2e4a2c2SAdrian Chadd 
1149e2e4a2c2SAdrian Chadd 		/* Update the duration field itself */
1150e2e4a2c2SAdrian Chadd 		*(u_int16_t *)wh->i_dur = htole16(dur);
1151e2e4a2c2SAdrian Chadd 	}
1152e2e4a2c2SAdrian Chadd }
1153e2e4a2c2SAdrian Chadd 
1154e42b5dbaSAdrian Chadd static uint8_t
1155e42b5dbaSAdrian Chadd ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
1156eb6f0de0SAdrian Chadd     int cix, int shortPreamble)
115779f02dbfSAdrian Chadd {
1158e42b5dbaSAdrian Chadd 	uint8_t ctsrate;
1159e42b5dbaSAdrian Chadd 
116079f02dbfSAdrian Chadd 	/*
116179f02dbfSAdrian Chadd 	 * CTS transmit rate is derived from the transmit rate
116279f02dbfSAdrian Chadd 	 * by looking in the h/w rate table.  We must also factor
116379f02dbfSAdrian Chadd 	 * in whether or not a short preamble is to be used.
116479f02dbfSAdrian Chadd 	 */
116579f02dbfSAdrian Chadd 	/* NB: cix is set above where RTS/CTS is enabled */
116679f02dbfSAdrian Chadd 	KASSERT(cix != 0xff, ("cix not setup"));
1167e42b5dbaSAdrian Chadd 	ctsrate = rt->info[cix].rateCode;
1168e42b5dbaSAdrian Chadd 
1169e42b5dbaSAdrian Chadd 	/* XXX this should only matter for legacy rates */
1170e42b5dbaSAdrian Chadd 	if (shortPreamble)
1171e42b5dbaSAdrian Chadd 		ctsrate |= rt->info[cix].shortPreamble;
1172e42b5dbaSAdrian Chadd 
1173d4365d16SAdrian Chadd 	return (ctsrate);
1174e42b5dbaSAdrian Chadd }
1175e42b5dbaSAdrian Chadd 
1176e42b5dbaSAdrian Chadd /*
1177e42b5dbaSAdrian Chadd  * Calculate the RTS/CTS duration for legacy frames.
1178e42b5dbaSAdrian Chadd  */
1179e42b5dbaSAdrian Chadd static int
1180e42b5dbaSAdrian Chadd ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
1181e42b5dbaSAdrian Chadd     int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
1182e42b5dbaSAdrian Chadd     int flags)
1183e42b5dbaSAdrian Chadd {
1184e42b5dbaSAdrian Chadd 	int ctsduration = 0;
1185e42b5dbaSAdrian Chadd 
1186e42b5dbaSAdrian Chadd 	/* This mustn't be called for HT modes */
1187e42b5dbaSAdrian Chadd 	if (rt->info[cix].phy == IEEE80211_T_HT) {
1188e42b5dbaSAdrian Chadd 		printf("%s: HT rate where it shouldn't be (0x%x)\n",
1189e42b5dbaSAdrian Chadd 		    __func__, rt->info[cix].rateCode);
1190d4365d16SAdrian Chadd 		return (-1);
1191e42b5dbaSAdrian Chadd 	}
1192e42b5dbaSAdrian Chadd 
119379f02dbfSAdrian Chadd 	/*
119479f02dbfSAdrian Chadd 	 * Compute the transmit duration based on the frame
119579f02dbfSAdrian Chadd 	 * size and the size of an ACK frame.  We call into the
119679f02dbfSAdrian Chadd 	 * HAL to do the computation since it depends on the
119779f02dbfSAdrian Chadd 	 * characteristics of the actual PHY being used.
119879f02dbfSAdrian Chadd 	 *
119979f02dbfSAdrian Chadd 	 * NB: CTS is assumed the same size as an ACK so we can
120079f02dbfSAdrian Chadd 	 *     use the precalculated ACK durations.
120179f02dbfSAdrian Chadd 	 */
120279f02dbfSAdrian Chadd 	if (shortPreamble) {
120379f02dbfSAdrian Chadd 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1204e42b5dbaSAdrian Chadd 			ctsduration += rt->info[cix].spAckDuration;
1205e42b5dbaSAdrian Chadd 		ctsduration += ath_hal_computetxtime(ah,
120679f02dbfSAdrian Chadd 			rt, pktlen, rix, AH_TRUE);
120779f02dbfSAdrian Chadd 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1208e42b5dbaSAdrian Chadd 			ctsduration += rt->info[rix].spAckDuration;
120979f02dbfSAdrian Chadd 	} else {
121079f02dbfSAdrian Chadd 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1211e42b5dbaSAdrian Chadd 			ctsduration += rt->info[cix].lpAckDuration;
1212e42b5dbaSAdrian Chadd 		ctsduration += ath_hal_computetxtime(ah,
121379f02dbfSAdrian Chadd 			rt, pktlen, rix, AH_FALSE);
121479f02dbfSAdrian Chadd 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1215e42b5dbaSAdrian Chadd 			ctsduration += rt->info[rix].lpAckDuration;
121679f02dbfSAdrian Chadd 	}
1217e42b5dbaSAdrian Chadd 
1218d4365d16SAdrian Chadd 	return (ctsduration);
121979f02dbfSAdrian Chadd }
122079f02dbfSAdrian Chadd 
1221eb6f0de0SAdrian Chadd /*
1222eb6f0de0SAdrian Chadd  * Update the given ath_buf with updated rts/cts setup and duration
1223eb6f0de0SAdrian Chadd  * values.
1224eb6f0de0SAdrian Chadd  *
1225eb6f0de0SAdrian Chadd  * To support rate lookups for each software retry, the rts/cts rate
1226eb6f0de0SAdrian Chadd  * and cts duration must be re-calculated.
1227eb6f0de0SAdrian Chadd  *
1228eb6f0de0SAdrian Chadd  * This function assumes the RTS/CTS flags have been set as needed;
1229eb6f0de0SAdrian Chadd  * mrr has been disabled; and the rate control lookup has been done.
1230eb6f0de0SAdrian Chadd  *
1231eb6f0de0SAdrian Chadd  * XXX TODO: MRR need only be disabled for the pre-11n NICs.
1232eb6f0de0SAdrian Chadd  * XXX The 11n NICs support per-rate RTS/CTS configuration.
1233eb6f0de0SAdrian Chadd  */
1234eb6f0de0SAdrian Chadd static void
1235eb6f0de0SAdrian Chadd ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
1236eb6f0de0SAdrian Chadd {
1237eb6f0de0SAdrian Chadd 	uint16_t ctsduration = 0;
1238eb6f0de0SAdrian Chadd 	uint8_t ctsrate = 0;
1239eb6f0de0SAdrian Chadd 	uint8_t rix = bf->bf_state.bfs_rc[0].rix;
1240eb6f0de0SAdrian Chadd 	uint8_t cix = 0;
1241eb6f0de0SAdrian Chadd 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1242eb6f0de0SAdrian Chadd 
1243eb6f0de0SAdrian Chadd 	/*
1244eb6f0de0SAdrian Chadd 	 * No RTS/CTS enabled? Don't bother.
1245eb6f0de0SAdrian Chadd 	 */
1246875a9451SAdrian Chadd 	if ((bf->bf_state.bfs_txflags &
1247eb6f0de0SAdrian Chadd 	    (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
1248eb6f0de0SAdrian Chadd 		/* XXX is this really needed? */
1249eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ctsrate = 0;
1250eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ctsduration = 0;
1251eb6f0de0SAdrian Chadd 		return;
1252eb6f0de0SAdrian Chadd 	}
1253eb6f0de0SAdrian Chadd 
1254eb6f0de0SAdrian Chadd 	/*
1255eb6f0de0SAdrian Chadd 	 * If protection is enabled, use the protection rix control
1256eb6f0de0SAdrian Chadd 	 * rate. Otherwise use the rate0 control rate.
1257eb6f0de0SAdrian Chadd 	 */
1258eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_doprot)
1259eb6f0de0SAdrian Chadd 		rix = sc->sc_protrix;
1260eb6f0de0SAdrian Chadd 	else
1261eb6f0de0SAdrian Chadd 		rix = bf->bf_state.bfs_rc[0].rix;
1262eb6f0de0SAdrian Chadd 
1263eb6f0de0SAdrian Chadd 	/*
1264eb6f0de0SAdrian Chadd 	 * If the raw path has hard-coded ctsrate0 to something,
1265eb6f0de0SAdrian Chadd 	 * use it.
1266eb6f0de0SAdrian Chadd 	 */
1267eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_ctsrate0 != 0)
1268eb6f0de0SAdrian Chadd 		cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
1269eb6f0de0SAdrian Chadd 	else
1270eb6f0de0SAdrian Chadd 		/* Control rate from above */
1271eb6f0de0SAdrian Chadd 		cix = rt->info[rix].controlRate;
1272eb6f0de0SAdrian Chadd 
1273eb6f0de0SAdrian Chadd 	/* Calculate the rtscts rate for the given cix */
1274eb6f0de0SAdrian Chadd 	ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
1275eb6f0de0SAdrian Chadd 	    bf->bf_state.bfs_shpream);
1276eb6f0de0SAdrian Chadd 
1277eb6f0de0SAdrian Chadd 	/* The 11n chipsets do ctsduration calculations for you */
1278eb6f0de0SAdrian Chadd 	if (! ath_tx_is_11n(sc))
1279eb6f0de0SAdrian Chadd 		ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
1280eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
1281875a9451SAdrian Chadd 		    rt, bf->bf_state.bfs_txflags);
1282eb6f0de0SAdrian Chadd 
1283eb6f0de0SAdrian Chadd 	/* Squirrel away in ath_buf */
1284eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate = ctsrate;
1285eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsduration = ctsduration;
1286eb6f0de0SAdrian Chadd 
1287eb6f0de0SAdrian Chadd 	/*
1288eb6f0de0SAdrian Chadd 	 * Must disable multi-rate retry when using RTS/CTS.
1289eb6f0de0SAdrian Chadd 	 */
1290af017101SAdrian Chadd 	if (!sc->sc_mrrprot) {
1291eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ismrr = 0;
1292eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_try0 =
1293eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
1294eb6f0de0SAdrian Chadd 	}
1295af017101SAdrian Chadd }
1296eb6f0de0SAdrian Chadd 
1297eb6f0de0SAdrian Chadd /*
1298eb6f0de0SAdrian Chadd  * Setup the descriptor chain for a normal or fast-frame
1299eb6f0de0SAdrian Chadd  * frame.
130046634305SAdrian Chadd  *
130146634305SAdrian Chadd  * XXX TODO: extend to include the destination hardware QCU ID.
130246634305SAdrian Chadd  * Make sure that is correct.  Make sure that when being added
130346634305SAdrian Chadd  * to the mcastq, the CABQ QCUID is set or things will get a bit
130446634305SAdrian Chadd  * odd.
1305eb6f0de0SAdrian Chadd  */
1306eb6f0de0SAdrian Chadd static void
1307eb6f0de0SAdrian Chadd ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1308eb6f0de0SAdrian Chadd {
1309eb6f0de0SAdrian Chadd 	struct ath_desc *ds = bf->bf_desc;
1310eb6f0de0SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
1311eb6f0de0SAdrian Chadd 
13127d9dd2acSAdrian Chadd 	if (bf->bf_state.bfs_txrate0 == 0)
13137d9dd2acSAdrian Chadd 		device_printf(sc->sc_dev, "%s: bf=%p, txrate0=%d\n",
13147d9dd2acSAdrian Chadd 		    __func__, bf, 0);
13157d9dd2acSAdrian Chadd 
1316eb6f0de0SAdrian Chadd 	ath_hal_setuptxdesc(ah, ds
1317eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_pktlen	/* packet length */
1318eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_hdrlen	/* header length */
1319eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_atype	/* Atheros packet type */
1320eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_txpower	/* txpower */
1321eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_txrate0
1322eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_try0		/* series 0 rate/tries */
1323eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_keyix	/* key cache index */
1324eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_txantenna	/* antenna mode */
1325875a9451SAdrian Chadd 		, bf->bf_state.bfs_txflags	/* flags */
1326eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
1327eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
1328eb6f0de0SAdrian Chadd 	);
1329eb6f0de0SAdrian Chadd 
1330eb6f0de0SAdrian Chadd 	/*
1331eb6f0de0SAdrian Chadd 	 * This will be overriden when the descriptor chain is written.
1332eb6f0de0SAdrian Chadd 	 */
1333eb6f0de0SAdrian Chadd 	bf->bf_lastds = ds;
1334eb6f0de0SAdrian Chadd 	bf->bf_last = bf;
1335eb6f0de0SAdrian Chadd 
1336d34a7347SAdrian Chadd 	/* Set rate control and descriptor chain for this frame */
1337d34a7347SAdrian Chadd 	ath_tx_set_ratectrl(sc, bf->bf_node, bf);
13386e84772fSAdrian Chadd 	ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0);
1339eb6f0de0SAdrian Chadd }
1340eb6f0de0SAdrian Chadd 
1341eb6f0de0SAdrian Chadd /*
1342eb6f0de0SAdrian Chadd  * Do a rate lookup.
1343eb6f0de0SAdrian Chadd  *
1344eb6f0de0SAdrian Chadd  * This performs a rate lookup for the given ath_buf only if it's required.
1345eb6f0de0SAdrian Chadd  * Non-data frames and raw frames don't require it.
1346eb6f0de0SAdrian Chadd  *
1347eb6f0de0SAdrian Chadd  * This populates the primary and MRR entries; MRR values are
1348eb6f0de0SAdrian Chadd  * then disabled later on if something requires it (eg RTS/CTS on
1349eb6f0de0SAdrian Chadd  * pre-11n chipsets.
1350eb6f0de0SAdrian Chadd  *
1351eb6f0de0SAdrian Chadd  * This needs to be done before the RTS/CTS fields are calculated
1352eb6f0de0SAdrian Chadd  * as they may depend upon the rate chosen.
1353eb6f0de0SAdrian Chadd  */
1354eb6f0de0SAdrian Chadd static void
1355eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf)
1356eb6f0de0SAdrian Chadd {
1357eb6f0de0SAdrian Chadd 	uint8_t rate, rix;
1358eb6f0de0SAdrian Chadd 	int try0;
1359eb6f0de0SAdrian Chadd 
1360eb6f0de0SAdrian Chadd 	if (! bf->bf_state.bfs_doratelookup)
1361eb6f0de0SAdrian Chadd 		return;
1362eb6f0de0SAdrian Chadd 
1363eb6f0de0SAdrian Chadd 	/* Get rid of any previous state */
1364eb6f0de0SAdrian Chadd 	bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1365eb6f0de0SAdrian Chadd 
1366eb6f0de0SAdrian Chadd 	ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1367eb6f0de0SAdrian Chadd 	ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1368eb6f0de0SAdrian Chadd 	    bf->bf_state.bfs_pktlen, &rix, &try0, &rate);
1369eb6f0de0SAdrian Chadd 
1370eb6f0de0SAdrian Chadd 	/* In case MRR is disabled, make sure rc[0] is setup correctly */
1371eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].rix = rix;
1372eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].ratecode = rate;
1373eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].tries = try0;
1374eb6f0de0SAdrian Chadd 
1375eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1376eb6f0de0SAdrian Chadd 		ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1377eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_rc);
1378eb6f0de0SAdrian Chadd 	ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1379eb6f0de0SAdrian Chadd 
1380eb6f0de0SAdrian Chadd 	sc->sc_txrix = rix;	/* for LED blinking */
1381eb6f0de0SAdrian Chadd 	sc->sc_lastdatarix = rix;	/* for fast frames */
1382eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 = try0;
1383eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txrate0 = rate;
1384eb6f0de0SAdrian Chadd }
1385eb6f0de0SAdrian Chadd 
1386eb6f0de0SAdrian Chadd /*
13870c54de88SAdrian Chadd  * Update the CLRDMASK bit in the ath_buf if it needs to be set.
13880c54de88SAdrian Chadd  */
13890c54de88SAdrian Chadd static void
13900c54de88SAdrian Chadd ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid,
13910c54de88SAdrian Chadd     struct ath_buf *bf)
13920c54de88SAdrian Chadd {
13934f25ddbbSAdrian Chadd 	struct ath_node *an = ATH_NODE(bf->bf_node);
13940c54de88SAdrian Chadd 
1395375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
13960c54de88SAdrian Chadd 
13974f25ddbbSAdrian Chadd 	if (an->clrdmask == 1) {
13980c54de88SAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
13994f25ddbbSAdrian Chadd 		an->clrdmask = 0;
14000c54de88SAdrian Chadd 	}
14010c54de88SAdrian Chadd }
14020c54de88SAdrian Chadd 
14030c54de88SAdrian Chadd /*
140422a3aee6SAdrian Chadd  * Return whether this frame should be software queued or
140522a3aee6SAdrian Chadd  * direct dispatched.
140622a3aee6SAdrian Chadd  *
140722a3aee6SAdrian Chadd  * When doing powersave, BAR frames should be queued but other management
140822a3aee6SAdrian Chadd  * frames should be directly sent.
140922a3aee6SAdrian Chadd  *
141022a3aee6SAdrian Chadd  * When not doing powersave, stick BAR frames into the hardware queue
141122a3aee6SAdrian Chadd  * so it goes out even though the queue is paused.
141222a3aee6SAdrian Chadd  *
141322a3aee6SAdrian Chadd  * For now, management frames are also software queued by default.
141422a3aee6SAdrian Chadd  */
141522a3aee6SAdrian Chadd static int
141622a3aee6SAdrian Chadd ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an,
141722a3aee6SAdrian Chadd     struct mbuf *m0, int *queue_to_head)
141822a3aee6SAdrian Chadd {
141922a3aee6SAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
142022a3aee6SAdrian Chadd 	struct ieee80211_frame *wh;
142122a3aee6SAdrian Chadd 	uint8_t type, subtype;
142222a3aee6SAdrian Chadd 
142322a3aee6SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
142422a3aee6SAdrian Chadd 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
142522a3aee6SAdrian Chadd 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
142622a3aee6SAdrian Chadd 
142722a3aee6SAdrian Chadd 	(*queue_to_head) = 0;
142822a3aee6SAdrian Chadd 
142922a3aee6SAdrian Chadd 	/* If it's not in powersave - direct-dispatch BAR */
143022a3aee6SAdrian Chadd 	if ((ATH_NODE(ni)->an_is_powersave == 0)
143122a3aee6SAdrian Chadd 	    && type == IEEE80211_FC0_TYPE_CTL &&
143222a3aee6SAdrian Chadd 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
143322a3aee6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX,
143422a3aee6SAdrian Chadd 		    "%s: BAR: TX'ing direct\n", __func__);
143522a3aee6SAdrian Chadd 		return (0);
143622a3aee6SAdrian Chadd 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
143722a3aee6SAdrian Chadd 	    && type == IEEE80211_FC0_TYPE_CTL &&
143822a3aee6SAdrian Chadd 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
143922a3aee6SAdrian Chadd 		/* BAR TX whilst asleep; queue */
144022a3aee6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX,
144122a3aee6SAdrian Chadd 		    "%s: swq: TX'ing\n", __func__);
144222a3aee6SAdrian Chadd 		(*queue_to_head) = 1;
144322a3aee6SAdrian Chadd 		return (1);
144422a3aee6SAdrian Chadd 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
144522a3aee6SAdrian Chadd 	    && (type == IEEE80211_FC0_TYPE_MGT ||
144622a3aee6SAdrian Chadd 	        type == IEEE80211_FC0_TYPE_CTL)) {
144722a3aee6SAdrian Chadd 		/*
144822a3aee6SAdrian Chadd 		 * Other control/mgmt frame; bypass software queuing
144922a3aee6SAdrian Chadd 		 * for now!
145022a3aee6SAdrian Chadd 		 */
145122a3aee6SAdrian Chadd 		device_printf(sc->sc_dev,
145222a3aee6SAdrian Chadd 		    "%s: %6D: Node is asleep; sending mgmt "
145322a3aee6SAdrian Chadd 		    "(type=%d, subtype=%d)\n",
145422a3aee6SAdrian Chadd 		    __func__,
145522a3aee6SAdrian Chadd 		    ni->ni_macaddr,
145622a3aee6SAdrian Chadd 		    ":",
145722a3aee6SAdrian Chadd 		    type,
145822a3aee6SAdrian Chadd 		    subtype);
145922a3aee6SAdrian Chadd 		return (0);
146022a3aee6SAdrian Chadd 	} else {
146122a3aee6SAdrian Chadd 		return (1);
146222a3aee6SAdrian Chadd 	}
146322a3aee6SAdrian Chadd }
146422a3aee6SAdrian Chadd 
146522a3aee6SAdrian Chadd 
146622a3aee6SAdrian Chadd /*
1467eb6f0de0SAdrian Chadd  * Transmit the given frame to the hardware.
1468eb6f0de0SAdrian Chadd  *
1469eb6f0de0SAdrian Chadd  * The frame must already be setup; rate control must already have
1470eb6f0de0SAdrian Chadd  * been done.
1471eb6f0de0SAdrian Chadd  *
1472eb6f0de0SAdrian Chadd  * XXX since the TXQ lock is being held here (and I dislike holding
1473eb6f0de0SAdrian Chadd  * it for this long when not doing software aggregation), later on
1474eb6f0de0SAdrian Chadd  * break this function into "setup_normal" and "xmit_normal". The
1475eb6f0de0SAdrian Chadd  * lock only needs to be held for the ath_tx_handoff call.
147622a3aee6SAdrian Chadd  *
147722a3aee6SAdrian Chadd  * XXX we don't update the leak count here - if we're doing
147822a3aee6SAdrian Chadd  * direct frame dispatch, we need to be able to do it without
147922a3aee6SAdrian Chadd  * decrementing the leak count (eg multicast queue frames.)
1480eb6f0de0SAdrian Chadd  */
1481eb6f0de0SAdrian Chadd static void
1482eb6f0de0SAdrian Chadd ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1483eb6f0de0SAdrian Chadd     struct ath_buf *bf)
1484eb6f0de0SAdrian Chadd {
14850c54de88SAdrian Chadd 	struct ath_node *an = ATH_NODE(bf->bf_node);
14860c54de88SAdrian Chadd 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
1487eb6f0de0SAdrian Chadd 
1488375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
1489eb6f0de0SAdrian Chadd 
14900c54de88SAdrian Chadd 	/*
14910c54de88SAdrian Chadd 	 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does
14920c54de88SAdrian Chadd 	 * set a completion handler however it doesn't (yet) properly
14930c54de88SAdrian Chadd 	 * handle the strict ordering requirements needed for normal,
14940c54de88SAdrian Chadd 	 * non-aggregate session frames.
14950c54de88SAdrian Chadd 	 *
14960c54de88SAdrian Chadd 	 * Once this is implemented, only set CLRDMASK like this for
14970c54de88SAdrian Chadd 	 * frames that must go out - eg management/raw frames.
14980c54de88SAdrian Chadd 	 */
14990c54de88SAdrian Chadd 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
15000c54de88SAdrian Chadd 
1501eb6f0de0SAdrian Chadd 	/* Setup the descriptor before handoff */
1502eb6f0de0SAdrian Chadd 	ath_tx_do_ratelookup(sc, bf);
1503e2e4a2c2SAdrian Chadd 	ath_tx_calc_duration(sc, bf);
1504e2e4a2c2SAdrian Chadd 	ath_tx_calc_protection(sc, bf);
1505eb6f0de0SAdrian Chadd 	ath_tx_set_rtscts(sc, bf);
1506e2e4a2c2SAdrian Chadd 	ath_tx_rate_fill_rcflags(sc, bf);
1507eb6f0de0SAdrian Chadd 	ath_tx_setds(sc, bf);
1508eb6f0de0SAdrian Chadd 
15090c54de88SAdrian Chadd 	/* Track per-TID hardware queue depth correctly */
15100c54de88SAdrian Chadd 	tid->hwq_depth++;
15110c54de88SAdrian Chadd 
15120c54de88SAdrian Chadd 	/* Assign the completion handler */
15130c54de88SAdrian Chadd 	bf->bf_comp = ath_tx_normal_comp;
15144e81f27cSAdrian Chadd 
1515eb6f0de0SAdrian Chadd 	/* Hand off to hardware */
1516eb6f0de0SAdrian Chadd 	ath_tx_handoff(sc, txq, bf);
1517eb6f0de0SAdrian Chadd }
1518eb6f0de0SAdrian Chadd 
1519d05b576dSAdrian Chadd /*
1520d05b576dSAdrian Chadd  * Do the basic frame setup stuff that's required before the frame
1521d05b576dSAdrian Chadd  * is added to a software queue.
1522d05b576dSAdrian Chadd  *
1523d05b576dSAdrian Chadd  * All frames get mostly the same treatment and it's done once.
1524d05b576dSAdrian Chadd  * Retransmits fiddle with things like the rate control setup,
1525d05b576dSAdrian Chadd  * setting the retransmit bit in the packet; doing relevant DMA/bus
1526d05b576dSAdrian Chadd  * syncing and relinking it (back) into the hardware TX queue.
1527d05b576dSAdrian Chadd  *
1528d05b576dSAdrian Chadd  * Note that this may cause the mbuf to be reallocated, so
1529d05b576dSAdrian Chadd  * m0 may not be valid.
1530d05b576dSAdrian Chadd  */
1531eb6f0de0SAdrian Chadd static int
1532eb6f0de0SAdrian Chadd ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1533b43facbfSAdrian Chadd     struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1534b8e788a5SAdrian Chadd {
1535b8e788a5SAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
1536b8e788a5SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
1537b8e788a5SAdrian Chadd 	struct ifnet *ifp = sc->sc_ifp;
1538b8e788a5SAdrian Chadd 	struct ieee80211com *ic = ifp->if_l2com;
1539b8e788a5SAdrian Chadd 	const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
1540b8e788a5SAdrian Chadd 	int error, iswep, ismcast, isfrag, ismrr;
1541eb6f0de0SAdrian Chadd 	int keyix, hdrlen, pktlen, try0 = 0;
1542eb6f0de0SAdrian Chadd 	u_int8_t rix = 0, txrate = 0;
1543b8e788a5SAdrian Chadd 	struct ath_desc *ds;
1544b8e788a5SAdrian Chadd 	struct ieee80211_frame *wh;
1545eb6f0de0SAdrian Chadd 	u_int subtype, flags;
1546b8e788a5SAdrian Chadd 	HAL_PKT_TYPE atype;
1547b8e788a5SAdrian Chadd 	const HAL_RATE_TABLE *rt;
1548b8e788a5SAdrian Chadd 	HAL_BOOL shortPreamble;
1549b8e788a5SAdrian Chadd 	struct ath_node *an;
1550b8e788a5SAdrian Chadd 	u_int pri;
1551b8e788a5SAdrian Chadd 
15527561cb5cSAdrian Chadd 	/*
15537561cb5cSAdrian Chadd 	 * To ensure that both sequence numbers and the CCMP PN handling
15547561cb5cSAdrian Chadd 	 * is "correct", make sure that the relevant TID queue is locked.
15557561cb5cSAdrian Chadd 	 * Otherwise the CCMP PN and seqno may appear out of order, causing
15567561cb5cSAdrian Chadd 	 * re-ordered frames to have out of order CCMP PN's, resulting
15577561cb5cSAdrian Chadd 	 * in many, many frame drops.
15587561cb5cSAdrian Chadd 	 */
1559375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
15607561cb5cSAdrian Chadd 
1561b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1562b8e788a5SAdrian Chadd 	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
1563b8e788a5SAdrian Chadd 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1564b8e788a5SAdrian Chadd 	isfrag = m0->m_flags & M_FRAG;
1565b8e788a5SAdrian Chadd 	hdrlen = ieee80211_anyhdrsize(wh);
1566b8e788a5SAdrian Chadd 	/*
1567b8e788a5SAdrian Chadd 	 * Packet length must not include any
1568b8e788a5SAdrian Chadd 	 * pad bytes; deduct them here.
1569b8e788a5SAdrian Chadd 	 */
1570b8e788a5SAdrian Chadd 	pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1571b8e788a5SAdrian Chadd 
157281a82688SAdrian Chadd 	/* Handle encryption twiddling if needed */
1573eb6f0de0SAdrian Chadd 	if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1574eb6f0de0SAdrian Chadd 	    &pktlen, &keyix)) {
1575b8e788a5SAdrian Chadd 		ath_freetx(m0);
1576b8e788a5SAdrian Chadd 		return EIO;
1577b8e788a5SAdrian Chadd 	}
1578b8e788a5SAdrian Chadd 
1579b8e788a5SAdrian Chadd 	/* packet header may have moved, reset our local pointer */
1580b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1581b8e788a5SAdrian Chadd 
1582b8e788a5SAdrian Chadd 	pktlen += IEEE80211_CRC_LEN;
1583b8e788a5SAdrian Chadd 
1584b8e788a5SAdrian Chadd 	/*
1585b8e788a5SAdrian Chadd 	 * Load the DMA map so any coalescing is done.  This
1586b8e788a5SAdrian Chadd 	 * also calculates the number of descriptors we need.
1587b8e788a5SAdrian Chadd 	 */
1588b8e788a5SAdrian Chadd 	error = ath_tx_dmasetup(sc, bf, m0);
1589b8e788a5SAdrian Chadd 	if (error != 0)
1590b8e788a5SAdrian Chadd 		return error;
1591b8e788a5SAdrian Chadd 	bf->bf_node = ni;			/* NB: held reference */
1592b8e788a5SAdrian Chadd 	m0 = bf->bf_m;				/* NB: may have changed */
1593b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1594b8e788a5SAdrian Chadd 
1595b8e788a5SAdrian Chadd 	/* setup descriptors */
1596b8e788a5SAdrian Chadd 	ds = bf->bf_desc;
1597b8e788a5SAdrian Chadd 	rt = sc->sc_currates;
1598b8e788a5SAdrian Chadd 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1599b8e788a5SAdrian Chadd 
1600b8e788a5SAdrian Chadd 	/*
1601b8e788a5SAdrian Chadd 	 * NB: the 802.11 layer marks whether or not we should
1602b8e788a5SAdrian Chadd 	 * use short preamble based on the current mode and
1603b8e788a5SAdrian Chadd 	 * negotiated parameters.
1604b8e788a5SAdrian Chadd 	 */
1605b8e788a5SAdrian Chadd 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1606b8e788a5SAdrian Chadd 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1607b8e788a5SAdrian Chadd 		shortPreamble = AH_TRUE;
1608b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_shortpre++;
1609b8e788a5SAdrian Chadd 	} else {
1610b8e788a5SAdrian Chadd 		shortPreamble = AH_FALSE;
1611b8e788a5SAdrian Chadd 	}
1612b8e788a5SAdrian Chadd 
1613b8e788a5SAdrian Chadd 	an = ATH_NODE(ni);
16144e81f27cSAdrian Chadd 	//flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
16154e81f27cSAdrian Chadd 	flags = 0;
1616b8e788a5SAdrian Chadd 	ismrr = 0;				/* default no multi-rate retry*/
1617b8e788a5SAdrian Chadd 	pri = M_WME_GETAC(m0);			/* honor classification */
1618b8e788a5SAdrian Chadd 	/* XXX use txparams instead of fixed values */
1619b8e788a5SAdrian Chadd 	/*
1620b8e788a5SAdrian Chadd 	 * Calculate Atheros packet type from IEEE80211 packet header,
1621b8e788a5SAdrian Chadd 	 * setup for rate calculations, and select h/w transmit queue.
1622b8e788a5SAdrian Chadd 	 */
1623b8e788a5SAdrian Chadd 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1624b8e788a5SAdrian Chadd 	case IEEE80211_FC0_TYPE_MGT:
1625b8e788a5SAdrian Chadd 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1626b8e788a5SAdrian Chadd 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1627b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_BEACON;
1628b8e788a5SAdrian Chadd 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1629b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_PROBE_RESP;
1630b8e788a5SAdrian Chadd 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1631b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_ATIM;
1632b8e788a5SAdrian Chadd 		else
1633b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_NORMAL;	/* XXX */
1634b8e788a5SAdrian Chadd 		rix = an->an_mgmtrix;
1635b8e788a5SAdrian Chadd 		txrate = rt->info[rix].rateCode;
1636b8e788a5SAdrian Chadd 		if (shortPreamble)
1637b8e788a5SAdrian Chadd 			txrate |= rt->info[rix].shortPreamble;
1638b8e788a5SAdrian Chadd 		try0 = ATH_TXMGTTRY;
1639b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1640b8e788a5SAdrian Chadd 		break;
1641b8e788a5SAdrian Chadd 	case IEEE80211_FC0_TYPE_CTL:
1642b8e788a5SAdrian Chadd 		atype = HAL_PKT_TYPE_PSPOLL;	/* stop setting of duration */
1643b8e788a5SAdrian Chadd 		rix = an->an_mgmtrix;
1644b8e788a5SAdrian Chadd 		txrate = rt->info[rix].rateCode;
1645b8e788a5SAdrian Chadd 		if (shortPreamble)
1646b8e788a5SAdrian Chadd 			txrate |= rt->info[rix].shortPreamble;
1647b8e788a5SAdrian Chadd 		try0 = ATH_TXMGTTRY;
1648b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1649b8e788a5SAdrian Chadd 		break;
1650b8e788a5SAdrian Chadd 	case IEEE80211_FC0_TYPE_DATA:
1651b8e788a5SAdrian Chadd 		atype = HAL_PKT_TYPE_NORMAL;		/* default */
1652b8e788a5SAdrian Chadd 		/*
1653b8e788a5SAdrian Chadd 		 * Data frames: multicast frames go out at a fixed rate,
1654b8e788a5SAdrian Chadd 		 * EAPOL frames use the mgmt frame rate; otherwise consult
1655b8e788a5SAdrian Chadd 		 * the rate control module for the rate to use.
1656b8e788a5SAdrian Chadd 		 */
1657b8e788a5SAdrian Chadd 		if (ismcast) {
1658b8e788a5SAdrian Chadd 			rix = an->an_mcastrix;
1659b8e788a5SAdrian Chadd 			txrate = rt->info[rix].rateCode;
1660b8e788a5SAdrian Chadd 			if (shortPreamble)
1661b8e788a5SAdrian Chadd 				txrate |= rt->info[rix].shortPreamble;
1662b8e788a5SAdrian Chadd 			try0 = 1;
1663b8e788a5SAdrian Chadd 		} else if (m0->m_flags & M_EAPOL) {
1664b8e788a5SAdrian Chadd 			/* XXX? maybe always use long preamble? */
1665b8e788a5SAdrian Chadd 			rix = an->an_mgmtrix;
1666b8e788a5SAdrian Chadd 			txrate = rt->info[rix].rateCode;
1667b8e788a5SAdrian Chadd 			if (shortPreamble)
1668b8e788a5SAdrian Chadd 				txrate |= rt->info[rix].shortPreamble;
1669b8e788a5SAdrian Chadd 			try0 = ATH_TXMAXTRY;	/* XXX?too many? */
1670b8e788a5SAdrian Chadd 		} else {
1671eb6f0de0SAdrian Chadd 			/*
1672eb6f0de0SAdrian Chadd 			 * Do rate lookup on each TX, rather than using
1673eb6f0de0SAdrian Chadd 			 * the hard-coded TX information decided here.
1674eb6f0de0SAdrian Chadd 			 */
1675b8e788a5SAdrian Chadd 			ismrr = 1;
1676eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_doratelookup = 1;
1677b8e788a5SAdrian Chadd 		}
1678b8e788a5SAdrian Chadd 		if (cap->cap_wmeParams[pri].wmep_noackPolicy)
1679b8e788a5SAdrian Chadd 			flags |= HAL_TXDESC_NOACK;
1680b8e788a5SAdrian Chadd 		break;
1681b8e788a5SAdrian Chadd 	default:
1682b8e788a5SAdrian Chadd 		if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1683b8e788a5SAdrian Chadd 			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1684b8e788a5SAdrian Chadd 		/* XXX statistic */
1685c23a9d98SAdrian Chadd 		/* XXX free tx dmamap */
1686b8e788a5SAdrian Chadd 		ath_freetx(m0);
1687b8e788a5SAdrian Chadd 		return EIO;
1688b8e788a5SAdrian Chadd 	}
1689b8e788a5SAdrian Chadd 
1690447fd44aSAdrian Chadd 	/*
1691447fd44aSAdrian Chadd 	 * There are two known scenarios where the frame AC doesn't match
1692447fd44aSAdrian Chadd 	 * what the destination TXQ is.
1693447fd44aSAdrian Chadd 	 *
1694447fd44aSAdrian Chadd 	 * + non-QoS frames (eg management?) that the net80211 stack has
1695447fd44aSAdrian Chadd 	 *   assigned a higher AC to, but since it's a non-QoS TID, it's
1696447fd44aSAdrian Chadd 	 *   being thrown into TID 16.  TID 16 gets the AC_BE queue.
1697447fd44aSAdrian Chadd 	 *   It's quite possible that management frames should just be
1698447fd44aSAdrian Chadd 	 *   direct dispatched to hardware rather than go via the software
1699447fd44aSAdrian Chadd 	 *   queue; that should be investigated in the future.  There are
1700447fd44aSAdrian Chadd 	 *   some specific scenarios where this doesn't make sense, mostly
1701447fd44aSAdrian Chadd 	 *   surrounding ADDBA request/response - hence why that is special
1702447fd44aSAdrian Chadd 	 *   cased.
1703447fd44aSAdrian Chadd 	 *
1704447fd44aSAdrian Chadd 	 * + Multicast frames going into the VAP mcast queue.  That shows up
1705447fd44aSAdrian Chadd 	 *   as "TXQ 11".
1706447fd44aSAdrian Chadd 	 *
1707447fd44aSAdrian Chadd 	 * This driver should eventually support separate TID and TXQ locking,
1708447fd44aSAdrian Chadd 	 * allowing for arbitrary AC frames to appear on arbitrary software
1709447fd44aSAdrian Chadd 	 * queues, being queued to the "correct" hardware queue when needed.
1710447fd44aSAdrian Chadd 	 */
1711447fd44aSAdrian Chadd #if 0
17126deb7f32SAdrian Chadd 	if (txq != sc->sc_ac2q[pri]) {
17136deb7f32SAdrian Chadd 		device_printf(sc->sc_dev,
17146deb7f32SAdrian Chadd 		    "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
17156deb7f32SAdrian Chadd 		    __func__,
17166deb7f32SAdrian Chadd 		    txq,
17176deb7f32SAdrian Chadd 		    txq->axq_qnum,
17186deb7f32SAdrian Chadd 		    pri,
17196deb7f32SAdrian Chadd 		    sc->sc_ac2q[pri],
17206deb7f32SAdrian Chadd 		    sc->sc_ac2q[pri]->axq_qnum);
17216deb7f32SAdrian Chadd 	}
1722447fd44aSAdrian Chadd #endif
17236deb7f32SAdrian Chadd 
1724b8e788a5SAdrian Chadd 	/*
1725b8e788a5SAdrian Chadd 	 * Calculate miscellaneous flags.
1726b8e788a5SAdrian Chadd 	 */
1727b8e788a5SAdrian Chadd 	if (ismcast) {
1728b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
1729b8e788a5SAdrian Chadd 	} else if (pktlen > vap->iv_rtsthreshold &&
1730b8e788a5SAdrian Chadd 	    (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1731b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
1732b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_rts++;
1733b8e788a5SAdrian Chadd 	}
1734b8e788a5SAdrian Chadd 	if (flags & HAL_TXDESC_NOACK)		/* NB: avoid double counting */
1735b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_noack++;
1736b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
1737b8e788a5SAdrian Chadd 	if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1738b8e788a5SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_TDMA,
1739b8e788a5SAdrian Chadd 		    "%s: discard frame, ACK required w/ TDMA\n", __func__);
1740b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tdma_ack++;
1741c23a9d98SAdrian Chadd 		/* XXX free tx dmamap */
1742b8e788a5SAdrian Chadd 		ath_freetx(m0);
1743b8e788a5SAdrian Chadd 		return EIO;
1744b8e788a5SAdrian Chadd 	}
1745b8e788a5SAdrian Chadd #endif
1746b8e788a5SAdrian Chadd 
1747b8e788a5SAdrian Chadd 	/*
1748eb6f0de0SAdrian Chadd 	 * Determine if a tx interrupt should be generated for
1749eb6f0de0SAdrian Chadd 	 * this descriptor.  We take a tx interrupt to reap
1750eb6f0de0SAdrian Chadd 	 * descriptors when the h/w hits an EOL condition or
1751eb6f0de0SAdrian Chadd 	 * when the descriptor is specifically marked to generate
1752eb6f0de0SAdrian Chadd 	 * an interrupt.  We periodically mark descriptors in this
1753eb6f0de0SAdrian Chadd 	 * way to insure timely replenishing of the supply needed
1754eb6f0de0SAdrian Chadd 	 * for sending frames.  Defering interrupts reduces system
1755eb6f0de0SAdrian Chadd 	 * load and potentially allows more concurrent work to be
1756eb6f0de0SAdrian Chadd 	 * done but if done to aggressively can cause senders to
1757eb6f0de0SAdrian Chadd 	 * backup.
1758eb6f0de0SAdrian Chadd 	 *
1759eb6f0de0SAdrian Chadd 	 * NB: use >= to deal with sc_txintrperiod changing
1760eb6f0de0SAdrian Chadd 	 *     dynamically through sysctl.
1761b8e788a5SAdrian Chadd 	 */
1762eb6f0de0SAdrian Chadd 	if (flags & HAL_TXDESC_INTREQ) {
1763eb6f0de0SAdrian Chadd 		txq->axq_intrcnt = 0;
1764eb6f0de0SAdrian Chadd 	} else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1765eb6f0de0SAdrian Chadd 		flags |= HAL_TXDESC_INTREQ;
1766eb6f0de0SAdrian Chadd 		txq->axq_intrcnt = 0;
1767eb6f0de0SAdrian Chadd 	}
1768e42b5dbaSAdrian Chadd 
1769eb6f0de0SAdrian Chadd 	/* This point forward is actual TX bits */
1770b8e788a5SAdrian Chadd 
1771b8e788a5SAdrian Chadd 	/*
1772b8e788a5SAdrian Chadd 	 * At this point we are committed to sending the frame
1773b8e788a5SAdrian Chadd 	 * and we don't need to look at m_nextpkt; clear it in
1774b8e788a5SAdrian Chadd 	 * case this frame is part of frag chain.
1775b8e788a5SAdrian Chadd 	 */
1776b8e788a5SAdrian Chadd 	m0->m_nextpkt = NULL;
1777b8e788a5SAdrian Chadd 
1778b8e788a5SAdrian Chadd 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1779b8e788a5SAdrian Chadd 		ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1780b8e788a5SAdrian Chadd 		    sc->sc_hwmap[rix].ieeerate, -1);
1781b8e788a5SAdrian Chadd 
1782b8e788a5SAdrian Chadd 	if (ieee80211_radiotap_active_vap(vap)) {
1783b8e788a5SAdrian Chadd 		u_int64_t tsf = ath_hal_gettsf64(ah);
1784b8e788a5SAdrian Chadd 
1785b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_tsf = htole64(tsf);
1786b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1787b8e788a5SAdrian Chadd 		if (iswep)
1788b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1789b8e788a5SAdrian Chadd 		if (isfrag)
1790b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1791b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
179212087a07SAdrian Chadd 		sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni);
1793b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1794b8e788a5SAdrian Chadd 
1795b8e788a5SAdrian Chadd 		ieee80211_radiotap_tx(vap, m0);
1796b8e788a5SAdrian Chadd 	}
1797b8e788a5SAdrian Chadd 
1798eb6f0de0SAdrian Chadd 	/* Blank the legacy rate array */
1799eb6f0de0SAdrian Chadd 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1800c1782ce0SAdrian Chadd 
1801b8e788a5SAdrian Chadd 	/*
1802eb6f0de0SAdrian Chadd 	 * ath_buf_set_rate needs at least one rate/try to setup
1803eb6f0de0SAdrian Chadd 	 * the rate scenario.
1804b8e788a5SAdrian Chadd 	 */
1805eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].rix = rix;
1806eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].tries = try0;
1807eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].ratecode = txrate;
1808eb6f0de0SAdrian Chadd 
1809eb6f0de0SAdrian Chadd 	/* Store the decided rate index values away */
1810eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_pktlen = pktlen;
1811eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_hdrlen = hdrlen;
1812eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_atype = atype;
181312087a07SAdrian Chadd 	bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni);
1814eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txrate0 = txrate;
1815eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 = try0;
1816eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_keyix = keyix;
1817eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1818875a9451SAdrian Chadd 	bf->bf_state.bfs_txflags = flags;
1819eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_shpream = shortPreamble;
1820eb6f0de0SAdrian Chadd 
1821eb6f0de0SAdrian Chadd 	/* XXX this should be done in ath_tx_setrate() */
1822eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate0 = 0;	/* ie, no hard-coded ctsrate */
1823eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate = 0;	/* calculated later */
1824eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsduration = 0;
1825eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ismrr = ismrr;
1826eb6f0de0SAdrian Chadd 
1827eb6f0de0SAdrian Chadd 	return 0;
1828eb6f0de0SAdrian Chadd }
1829eb6f0de0SAdrian Chadd 
1830b8e788a5SAdrian Chadd /*
18314e81f27cSAdrian Chadd  * Queue a frame to the hardware or software queue.
1832eb6f0de0SAdrian Chadd  *
1833eb6f0de0SAdrian Chadd  * This can be called by the net80211 code.
1834eb6f0de0SAdrian Chadd  *
1835eb6f0de0SAdrian Chadd  * XXX what about locking? Or, push the seqno assign into the
1836eb6f0de0SAdrian Chadd  * XXX aggregate scheduler so its serialised?
18374e81f27cSAdrian Chadd  *
18384e81f27cSAdrian Chadd  * XXX When sending management frames via ath_raw_xmit(),
18394e81f27cSAdrian Chadd  *     should CLRDMASK be set unconditionally?
1840b8e788a5SAdrian Chadd  */
1841eb6f0de0SAdrian Chadd int
1842eb6f0de0SAdrian Chadd ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1843eb6f0de0SAdrian Chadd     struct ath_buf *bf, struct mbuf *m0)
1844eb6f0de0SAdrian Chadd {
1845eb6f0de0SAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
1846eb6f0de0SAdrian Chadd 	struct ath_vap *avp = ATH_VAP(vap);
18479c85ff91SAdrian Chadd 	int r = 0;
1848eb6f0de0SAdrian Chadd 	u_int pri;
1849eb6f0de0SAdrian Chadd 	int tid;
1850eb6f0de0SAdrian Chadd 	struct ath_txq *txq;
1851eb6f0de0SAdrian Chadd 	int ismcast;
1852eb6f0de0SAdrian Chadd 	const struct ieee80211_frame *wh;
1853eb6f0de0SAdrian Chadd 	int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1854a108d2d6SAdrian Chadd 	ieee80211_seq seqno;
1855eb6f0de0SAdrian Chadd 	uint8_t type, subtype;
185622a3aee6SAdrian Chadd 	int queue_to_head;
1857eb6f0de0SAdrian Chadd 
1858375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
1859375307d4SAdrian Chadd 
1860eb6f0de0SAdrian Chadd 	/*
1861eb6f0de0SAdrian Chadd 	 * Determine the target hardware queue.
1862eb6f0de0SAdrian Chadd 	 *
1863b43facbfSAdrian Chadd 	 * For multicast frames, the txq gets overridden appropriately
1864b43facbfSAdrian Chadd 	 * depending upon the state of PS.
1865eb6f0de0SAdrian Chadd 	 *
1866eb6f0de0SAdrian Chadd 	 * For any other frame, we do a TID/QoS lookup inside the frame
1867eb6f0de0SAdrian Chadd 	 * to see what the TID should be. If it's a non-QoS frame, the
1868eb6f0de0SAdrian Chadd 	 * AC and TID are overridden. The TID/TXQ code assumes the
1869eb6f0de0SAdrian Chadd 	 * TID is on a predictable hardware TXQ, so we don't support
1870eb6f0de0SAdrian Chadd 	 * having a node TID queued to multiple hardware TXQs.
1871eb6f0de0SAdrian Chadd 	 * This may change in the future but would require some locking
1872eb6f0de0SAdrian Chadd 	 * fudgery.
1873eb6f0de0SAdrian Chadd 	 */
1874eb6f0de0SAdrian Chadd 	pri = ath_tx_getac(sc, m0);
1875eb6f0de0SAdrian Chadd 	tid = ath_tx_gettid(sc, m0);
1876eb6f0de0SAdrian Chadd 
1877eb6f0de0SAdrian Chadd 	txq = sc->sc_ac2q[pri];
1878eb6f0de0SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1879eb6f0de0SAdrian Chadd 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1880eb6f0de0SAdrian Chadd 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1881eb6f0de0SAdrian Chadd 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1882eb6f0de0SAdrian Chadd 
18839c85ff91SAdrian Chadd 	/*
18849c85ff91SAdrian Chadd 	 * Enforce how deep the multicast queue can grow.
18859c85ff91SAdrian Chadd 	 *
18869c85ff91SAdrian Chadd 	 * XXX duplicated in ath_raw_xmit().
18879c85ff91SAdrian Chadd 	 */
18889c85ff91SAdrian Chadd 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
188992e84e43SAdrian Chadd 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
189092e84e43SAdrian Chadd 		    > sc->sc_txq_mcastq_maxdepth) {
18919c85ff91SAdrian Chadd 			sc->sc_stats.ast_tx_mcastq_overflow++;
18929c85ff91SAdrian Chadd 			m_freem(m0);
189355cf0326SAdrian Chadd 			return (ENOBUFS);
18949c85ff91SAdrian Chadd 		}
18959c85ff91SAdrian Chadd 	}
18969c85ff91SAdrian Chadd 
189722a3aee6SAdrian Chadd 	/*
189822a3aee6SAdrian Chadd 	 * Enforce how deep the unicast queue can grow.
189922a3aee6SAdrian Chadd 	 *
190022a3aee6SAdrian Chadd 	 * If the node is in power save then we don't want
190122a3aee6SAdrian Chadd 	 * the software queue to grow too deep, or a node may
190222a3aee6SAdrian Chadd 	 * end up consuming all of the ath_buf entries.
190322a3aee6SAdrian Chadd 	 *
190422a3aee6SAdrian Chadd 	 * For now, only do this for DATA frames.
190522a3aee6SAdrian Chadd 	 *
190622a3aee6SAdrian Chadd 	 * We will want to cap how many management/control
190722a3aee6SAdrian Chadd 	 * frames get punted to the software queue so it doesn't
190822a3aee6SAdrian Chadd 	 * fill up.  But the correct solution isn't yet obvious.
190922a3aee6SAdrian Chadd 	 * In any case, this check should at least let frames pass
191022a3aee6SAdrian Chadd 	 * that we are direct-dispatching.
191122a3aee6SAdrian Chadd 	 *
191222a3aee6SAdrian Chadd 	 * XXX TODO: duplicate this to the raw xmit path!
191322a3aee6SAdrian Chadd 	 */
191422a3aee6SAdrian Chadd 	if (type == IEEE80211_FC0_TYPE_DATA &&
191522a3aee6SAdrian Chadd 	    ATH_NODE(ni)->an_is_powersave &&
191622a3aee6SAdrian Chadd 	    ATH_NODE(ni)->an_swq_depth >
191722a3aee6SAdrian Chadd 	     sc->sc_txq_node_psq_maxdepth) {
191822a3aee6SAdrian Chadd 		sc->sc_stats.ast_tx_node_psq_overflow++;
191922a3aee6SAdrian Chadd 		m_freem(m0);
192022a3aee6SAdrian Chadd 		return (ENOBUFS);
192122a3aee6SAdrian Chadd 	}
192222a3aee6SAdrian Chadd 
1923eb6f0de0SAdrian Chadd 	/* A-MPDU TX */
1924eb6f0de0SAdrian Chadd 	is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1925eb6f0de0SAdrian Chadd 	is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1926eb6f0de0SAdrian Chadd 	is_ampdu = is_ampdu_tx | is_ampdu_pending;
1927eb6f0de0SAdrian Chadd 
1928a108d2d6SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
1929a108d2d6SAdrian Chadd 	    __func__, tid, pri, is_ampdu);
1930eb6f0de0SAdrian Chadd 
193146634305SAdrian Chadd 	/* Set local packet state, used to queue packets to hardware */
193246634305SAdrian Chadd 	bf->bf_state.bfs_tid = tid;
1933fc56c9c5SAdrian Chadd 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
193446634305SAdrian Chadd 	bf->bf_state.bfs_pri = pri;
193546634305SAdrian Chadd 
1936b837332dSAdrian Chadd #if 1
1937c5940c30SAdrian Chadd 	/*
1938b43facbfSAdrian Chadd 	 * When servicing one or more stations in power-save mode
1939b43facbfSAdrian Chadd 	 * (or) if there is some mcast data waiting on the mcast
1940b43facbfSAdrian Chadd 	 * queue (to prevent out of order delivery) multicast frames
1941b43facbfSAdrian Chadd 	 * must be bufferd until after the beacon.
1942b43facbfSAdrian Chadd 	 *
1943b43facbfSAdrian Chadd 	 * TODO: we should lock the mcastq before we check the length.
1944c5940c30SAdrian Chadd 	 */
1945b837332dSAdrian Chadd 	if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) {
1946eb6f0de0SAdrian Chadd 		txq = &avp->av_mcastq;
194746634305SAdrian Chadd 		/*
194846634305SAdrian Chadd 		 * Mark the frame as eventually belonging on the CAB
194946634305SAdrian Chadd 		 * queue, so the descriptor setup functions will
195046634305SAdrian Chadd 		 * correctly initialise the descriptor 'qcuId' field.
195146634305SAdrian Chadd 		 */
1952fc56c9c5SAdrian Chadd 		bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum;
195346634305SAdrian Chadd 	}
1954b837332dSAdrian Chadd #endif
1955eb6f0de0SAdrian Chadd 
1956eb6f0de0SAdrian Chadd 	/* Do the generic frame setup */
1957eb6f0de0SAdrian Chadd 	/* XXX should just bzero the bf_state? */
1958eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_dobaw = 0;
1959eb6f0de0SAdrian Chadd 
19607561cb5cSAdrian Chadd 	/* A-MPDU TX? Manually set sequence number */
19617561cb5cSAdrian Chadd 	/*
19627561cb5cSAdrian Chadd 	 * Don't do it whilst pending; the net80211 layer still
19637561cb5cSAdrian Chadd 	 * assigns them.
19647561cb5cSAdrian Chadd 	 */
19657561cb5cSAdrian Chadd 	if (is_ampdu_tx) {
1966eb6f0de0SAdrian Chadd 		/*
1967eb6f0de0SAdrian Chadd 		 * Always call; this function will
1968eb6f0de0SAdrian Chadd 		 * handle making sure that null data frames
1969eb6f0de0SAdrian Chadd 		 * don't get a sequence number from the current
1970eb6f0de0SAdrian Chadd 		 * TID and thus mess with the BAW.
1971eb6f0de0SAdrian Chadd 		 */
1972a108d2d6SAdrian Chadd 		seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
197342f4d061SAdrian Chadd 
197442f4d061SAdrian Chadd 		/*
197542f4d061SAdrian Chadd 		 * Don't add QoS NULL frames to the BAW.
197642f4d061SAdrian Chadd 		 */
1977a108d2d6SAdrian Chadd 		if (IEEE80211_QOS_HAS_SEQ(wh) &&
1978a108d2d6SAdrian Chadd 		    subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) {
1979eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 1;
1980eb6f0de0SAdrian Chadd 		}
1981c1782ce0SAdrian Chadd 	}
1982c1782ce0SAdrian Chadd 
1983eb6f0de0SAdrian Chadd 	/*
1984eb6f0de0SAdrian Chadd 	 * If needed, the sequence number has been assigned.
1985eb6f0de0SAdrian Chadd 	 * Squirrel it away somewhere easy to get to.
1986eb6f0de0SAdrian Chadd 	 */
1987a108d2d6SAdrian Chadd 	bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
1988b8e788a5SAdrian Chadd 
1989eb6f0de0SAdrian Chadd 	/* Is ampdu pending? fetch the seqno and print it out */
1990eb6f0de0SAdrian Chadd 	if (is_ampdu_pending)
1991eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1992eb6f0de0SAdrian Chadd 		    "%s: tid %d: ampdu pending, seqno %d\n",
1993eb6f0de0SAdrian Chadd 		    __func__, tid, M_SEQNO_GET(m0));
1994eb6f0de0SAdrian Chadd 
1995eb6f0de0SAdrian Chadd 	/* This also sets up the DMA map */
1996b43facbfSAdrian Chadd 	r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
1997eb6f0de0SAdrian Chadd 
1998eb6f0de0SAdrian Chadd 	if (r != 0)
19997561cb5cSAdrian Chadd 		goto done;
2000eb6f0de0SAdrian Chadd 
2001eb6f0de0SAdrian Chadd 	/* At this point m0 could have changed! */
2002eb6f0de0SAdrian Chadd 	m0 = bf->bf_m;
2003eb6f0de0SAdrian Chadd 
2004eb6f0de0SAdrian Chadd #if 1
2005eb6f0de0SAdrian Chadd 	/*
2006eb6f0de0SAdrian Chadd 	 * If it's a multicast frame, do a direct-dispatch to the
2007eb6f0de0SAdrian Chadd 	 * destination hardware queue. Don't bother software
2008eb6f0de0SAdrian Chadd 	 * queuing it.
2009eb6f0de0SAdrian Chadd 	 */
2010eb6f0de0SAdrian Chadd 	/*
2011eb6f0de0SAdrian Chadd 	 * If it's a BAR frame, do a direct dispatch to the
2012eb6f0de0SAdrian Chadd 	 * destination hardware queue. Don't bother software
2013eb6f0de0SAdrian Chadd 	 * queuing it, as the TID will now be paused.
2014eb6f0de0SAdrian Chadd 	 * Sending a BAR frame can occur from the net80211 txa timer
2015eb6f0de0SAdrian Chadd 	 * (ie, retries) or from the ath txtask (completion call.)
2016eb6f0de0SAdrian Chadd 	 * It queues directly to hardware because the TID is paused
2017eb6f0de0SAdrian Chadd 	 * at this point (and won't be unpaused until the BAR has
2018eb6f0de0SAdrian Chadd 	 * either been TXed successfully or max retries has been
2019eb6f0de0SAdrian Chadd 	 * reached.)
2020eb6f0de0SAdrian Chadd 	 */
202122a3aee6SAdrian Chadd 	/*
202222a3aee6SAdrian Chadd 	 * Until things are better debugged - if this node is asleep
202322a3aee6SAdrian Chadd 	 * and we're sending it a non-BAR frame, direct dispatch it.
202422a3aee6SAdrian Chadd 	 * Why? Because we need to figure out what's actually being
202522a3aee6SAdrian Chadd 	 * sent - eg, during reassociation/reauthentication after
202622a3aee6SAdrian Chadd 	 * the node (last) disappeared whilst asleep, the driver should
202722a3aee6SAdrian Chadd 	 * have unpaused/unsleep'ed the node.  So until that is
202822a3aee6SAdrian Chadd 	 * sorted out, use this workaround.
202922a3aee6SAdrian Chadd 	 */
2030eb6f0de0SAdrian Chadd 	if (txq == &avp->av_mcastq) {
2031d3a6425bSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX,
20320b96ef63SAdrian Chadd 		    "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
20334e81f27cSAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2034eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, txq, bf);
203522a3aee6SAdrian Chadd 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
203622a3aee6SAdrian Chadd 	    &queue_to_head)) {
203722a3aee6SAdrian Chadd 		ath_tx_swq(sc, ni, txq, queue_to_head, bf);
203822a3aee6SAdrian Chadd 	} else {
20394e81f27cSAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2040eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, txq, bf);
2041eb6f0de0SAdrian Chadd 	}
2042eb6f0de0SAdrian Chadd #else
2043eb6f0de0SAdrian Chadd 	/*
2044eb6f0de0SAdrian Chadd 	 * For now, since there's no software queue,
2045eb6f0de0SAdrian Chadd 	 * direct-dispatch to the hardware.
2046eb6f0de0SAdrian Chadd 	 */
20474e81f27cSAdrian Chadd 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
204822a3aee6SAdrian Chadd 	/*
204922a3aee6SAdrian Chadd 	 * Update the current leak count if
205022a3aee6SAdrian Chadd 	 * we're leaking frames; and set the
205122a3aee6SAdrian Chadd 	 * MORE flag as appropriate.
205222a3aee6SAdrian Chadd 	 */
205322a3aee6SAdrian Chadd 	ath_tx_leak_count_update(sc, tid, bf);
2054eb6f0de0SAdrian Chadd 	ath_tx_xmit_normal(sc, txq, bf);
2055eb6f0de0SAdrian Chadd #endif
20567561cb5cSAdrian Chadd done:
2057b8e788a5SAdrian Chadd 	return 0;
2058b8e788a5SAdrian Chadd }
2059b8e788a5SAdrian Chadd 
2060b8e788a5SAdrian Chadd static int
2061b8e788a5SAdrian Chadd ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
2062b8e788a5SAdrian Chadd 	struct ath_buf *bf, struct mbuf *m0,
2063b8e788a5SAdrian Chadd 	const struct ieee80211_bpf_params *params)
2064b8e788a5SAdrian Chadd {
2065b8e788a5SAdrian Chadd 	struct ifnet *ifp = sc->sc_ifp;
2066b8e788a5SAdrian Chadd 	struct ieee80211com *ic = ifp->if_l2com;
2067b8e788a5SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
2068b8e788a5SAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
2069b8e788a5SAdrian Chadd 	int error, ismcast, ismrr;
2070b8e788a5SAdrian Chadd 	int keyix, hdrlen, pktlen, try0, txantenna;
2071eb6f0de0SAdrian Chadd 	u_int8_t rix, txrate;
2072b8e788a5SAdrian Chadd 	struct ieee80211_frame *wh;
2073eb6f0de0SAdrian Chadd 	u_int flags;
2074b8e788a5SAdrian Chadd 	HAL_PKT_TYPE atype;
2075b8e788a5SAdrian Chadd 	const HAL_RATE_TABLE *rt;
2076b8e788a5SAdrian Chadd 	struct ath_desc *ds;
2077b8e788a5SAdrian Chadd 	u_int pri;
2078eb6f0de0SAdrian Chadd 	int o_tid = -1;
2079eb6f0de0SAdrian Chadd 	int do_override;
208022a3aee6SAdrian Chadd 	uint8_t type, subtype;
208122a3aee6SAdrian Chadd 	int queue_to_head;
2082b8e788a5SAdrian Chadd 
2083375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2084375307d4SAdrian Chadd 
2085b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2086b8e788a5SAdrian Chadd 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
2087b8e788a5SAdrian Chadd 	hdrlen = ieee80211_anyhdrsize(wh);
2088b8e788a5SAdrian Chadd 	/*
2089b8e788a5SAdrian Chadd 	 * Packet length must not include any
2090b8e788a5SAdrian Chadd 	 * pad bytes; deduct them here.
2091b8e788a5SAdrian Chadd 	 */
2092b8e788a5SAdrian Chadd 	/* XXX honor IEEE80211_BPF_DATAPAD */
2093b8e788a5SAdrian Chadd 	pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
2094b8e788a5SAdrian Chadd 
209522a3aee6SAdrian Chadd 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
209622a3aee6SAdrian Chadd 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
209722a3aee6SAdrian Chadd 
209803682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_TX, 2,
209903682514SAdrian Chadd 	     "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf);
210003682514SAdrian Chadd 
2101eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
2102eb6f0de0SAdrian Chadd 	    __func__, ismcast);
2103eb6f0de0SAdrian Chadd 
21047561cb5cSAdrian Chadd 	pri = params->ibp_pri & 3;
21057561cb5cSAdrian Chadd 	/* Override pri if the frame isn't a QoS one */
21067561cb5cSAdrian Chadd 	if (! IEEE80211_QOS_HAS_SEQ(wh))
21077561cb5cSAdrian Chadd 		pri = ath_tx_getac(sc, m0);
21087561cb5cSAdrian Chadd 
21097561cb5cSAdrian Chadd 	/* XXX If it's an ADDBA, override the correct queue */
21107561cb5cSAdrian Chadd 	do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
21117561cb5cSAdrian Chadd 
21127561cb5cSAdrian Chadd 	/* Map ADDBA to the correct priority */
21137561cb5cSAdrian Chadd 	if (do_override) {
21147561cb5cSAdrian Chadd #if 0
21157561cb5cSAdrian Chadd 		device_printf(sc->sc_dev,
21167561cb5cSAdrian Chadd 		    "%s: overriding tid %d pri %d -> %d\n",
21177561cb5cSAdrian Chadd 		    __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
21187561cb5cSAdrian Chadd #endif
21197561cb5cSAdrian Chadd 		pri = TID_TO_WME_AC(o_tid);
21207561cb5cSAdrian Chadd 	}
21217561cb5cSAdrian Chadd 
212281a82688SAdrian Chadd 	/* Handle encryption twiddling if needed */
2123eb6f0de0SAdrian Chadd 	if (! ath_tx_tag_crypto(sc, ni,
2124eb6f0de0SAdrian Chadd 	    m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
2125eb6f0de0SAdrian Chadd 	    &hdrlen, &pktlen, &keyix)) {
2126b8e788a5SAdrian Chadd 		ath_freetx(m0);
2127b8e788a5SAdrian Chadd 		return EIO;
2128b8e788a5SAdrian Chadd 	}
2129b8e788a5SAdrian Chadd 	/* packet header may have moved, reset our local pointer */
2130b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2131b8e788a5SAdrian Chadd 
2132eb6f0de0SAdrian Chadd 	/* Do the generic frame setup */
2133eb6f0de0SAdrian Chadd 	/* XXX should just bzero the bf_state? */
2134eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_dobaw = 0;
2135eb6f0de0SAdrian Chadd 
2136b8e788a5SAdrian Chadd 	error = ath_tx_dmasetup(sc, bf, m0);
2137b8e788a5SAdrian Chadd 	if (error != 0)
2138b8e788a5SAdrian Chadd 		return error;
2139b8e788a5SAdrian Chadd 	m0 = bf->bf_m;				/* NB: may have changed */
2140b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2141b8e788a5SAdrian Chadd 	bf->bf_node = ni;			/* NB: held reference */
2142b8e788a5SAdrian Chadd 
21434e81f27cSAdrian Chadd 	/* Always enable CLRDMASK for raw frames for now.. */
2144b8e788a5SAdrian Chadd 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
2145b8e788a5SAdrian Chadd 	flags |= HAL_TXDESC_INTREQ;		/* force interrupt */
2146b8e788a5SAdrian Chadd 	if (params->ibp_flags & IEEE80211_BPF_RTS)
2147b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_RTSENA;
2148eb6f0de0SAdrian Chadd 	else if (params->ibp_flags & IEEE80211_BPF_CTS) {
2149eb6f0de0SAdrian Chadd 		/* XXX assume 11g/11n protection? */
2150eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_doprot = 1;
2151b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_CTSENA;
2152eb6f0de0SAdrian Chadd 	}
2153b8e788a5SAdrian Chadd 	/* XXX leave ismcast to injector? */
2154b8e788a5SAdrian Chadd 	if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
2155b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_NOACK;
2156b8e788a5SAdrian Chadd 
2157b8e788a5SAdrian Chadd 	rt = sc->sc_currates;
2158b8e788a5SAdrian Chadd 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2159b8e788a5SAdrian Chadd 	rix = ath_tx_findrix(sc, params->ibp_rate0);
2160b8e788a5SAdrian Chadd 	txrate = rt->info[rix].rateCode;
2161b8e788a5SAdrian Chadd 	if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
2162b8e788a5SAdrian Chadd 		txrate |= rt->info[rix].shortPreamble;
2163b8e788a5SAdrian Chadd 	sc->sc_txrix = rix;
2164b8e788a5SAdrian Chadd 	try0 = params->ibp_try0;
2165b8e788a5SAdrian Chadd 	ismrr = (params->ibp_try1 != 0);
2166b8e788a5SAdrian Chadd 	txantenna = params->ibp_pri >> 2;
2167b8e788a5SAdrian Chadd 	if (txantenna == 0)			/* XXX? */
2168b8e788a5SAdrian Chadd 		txantenna = sc->sc_txantenna;
216979f02dbfSAdrian Chadd 
217079f02dbfSAdrian Chadd 	/*
2171eb6f0de0SAdrian Chadd 	 * Since ctsrate is fixed, store it away for later
2172eb6f0de0SAdrian Chadd 	 * use when the descriptor fields are being set.
217379f02dbfSAdrian Chadd 	 */
2174eb6f0de0SAdrian Chadd 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
2175eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
217679f02dbfSAdrian Chadd 
2177b8e788a5SAdrian Chadd 	/*
2178b8e788a5SAdrian Chadd 	 * NB: we mark all packets as type PSPOLL so the h/w won't
2179b8e788a5SAdrian Chadd 	 * set the sequence number, duration, etc.
2180b8e788a5SAdrian Chadd 	 */
2181b8e788a5SAdrian Chadd 	atype = HAL_PKT_TYPE_PSPOLL;
2182b8e788a5SAdrian Chadd 
2183b8e788a5SAdrian Chadd 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
2184b8e788a5SAdrian Chadd 		ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
2185b8e788a5SAdrian Chadd 		    sc->sc_hwmap[rix].ieeerate, -1);
2186b8e788a5SAdrian Chadd 
2187b8e788a5SAdrian Chadd 	if (ieee80211_radiotap_active_vap(vap)) {
2188b8e788a5SAdrian Chadd 		u_int64_t tsf = ath_hal_gettsf64(ah);
2189b8e788a5SAdrian Chadd 
2190b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_tsf = htole64(tsf);
2191b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
2192b8e788a5SAdrian Chadd 		if (wh->i_fc[1] & IEEE80211_FC1_WEP)
2193b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2194b8e788a5SAdrian Chadd 		if (m0->m_flags & M_FRAG)
2195b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
2196b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
219712087a07SAdrian Chadd 		sc->sc_tx_th.wt_txpower = MIN(params->ibp_power,
219812087a07SAdrian Chadd 		    ieee80211_get_node_txpower(ni));
2199b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
2200b8e788a5SAdrian Chadd 
2201b8e788a5SAdrian Chadd 		ieee80211_radiotap_tx(vap, m0);
2202b8e788a5SAdrian Chadd 	}
2203b8e788a5SAdrian Chadd 
2204b8e788a5SAdrian Chadd 	/*
2205b8e788a5SAdrian Chadd 	 * Formulate first tx descriptor with tx controls.
2206b8e788a5SAdrian Chadd 	 */
2207b8e788a5SAdrian Chadd 	ds = bf->bf_desc;
2208b8e788a5SAdrian Chadd 	/* XXX check return value? */
2209eb6f0de0SAdrian Chadd 
2210eb6f0de0SAdrian Chadd 	/* Store the decided rate index values away */
2211eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_pktlen = pktlen;
2212eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_hdrlen = hdrlen;
2213eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_atype = atype;
221412087a07SAdrian Chadd 	bf->bf_state.bfs_txpower = MIN(params->ibp_power,
221512087a07SAdrian Chadd 	    ieee80211_get_node_txpower(ni));
2216eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txrate0 = txrate;
2217eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 = try0;
2218eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_keyix = keyix;
2219eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txantenna = txantenna;
2220875a9451SAdrian Chadd 	bf->bf_state.bfs_txflags = flags;
2221eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_shpream =
2222eb6f0de0SAdrian Chadd 	    !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
2223b8e788a5SAdrian Chadd 
222446634305SAdrian Chadd 	/* Set local packet state, used to queue packets to hardware */
222546634305SAdrian Chadd 	bf->bf_state.bfs_tid = WME_AC_TO_TID(pri);
2226fc56c9c5SAdrian Chadd 	bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum;
222746634305SAdrian Chadd 	bf->bf_state.bfs_pri = pri;
222846634305SAdrian Chadd 
2229eb6f0de0SAdrian Chadd 	/* XXX this should be done in ath_tx_setrate() */
2230eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate = 0;
2231eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsduration = 0;
2232eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ismrr = ismrr;
2233eb6f0de0SAdrian Chadd 
2234eb6f0de0SAdrian Chadd 	/* Blank the legacy rate array */
2235eb6f0de0SAdrian Chadd 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
2236eb6f0de0SAdrian Chadd 
2237eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].rix =
2238eb6f0de0SAdrian Chadd 	    ath_tx_findrix(sc, params->ibp_rate0);
2239eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].tries = try0;
2240eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].ratecode = txrate;
2241c1782ce0SAdrian Chadd 
2242c1782ce0SAdrian Chadd 	if (ismrr) {
2243eb6f0de0SAdrian Chadd 		int rix;
2244c1782ce0SAdrian Chadd 
2245b8e788a5SAdrian Chadd 		rix = ath_tx_findrix(sc, params->ibp_rate1);
2246eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[1].rix = rix;
2247eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
2248c1782ce0SAdrian Chadd 
2249eb6f0de0SAdrian Chadd 		rix = ath_tx_findrix(sc, params->ibp_rate2);
2250eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[2].rix = rix;
2251eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
2252eb6f0de0SAdrian Chadd 
2253eb6f0de0SAdrian Chadd 		rix = ath_tx_findrix(sc, params->ibp_rate3);
2254eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].rix = rix;
2255eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
2256c1782ce0SAdrian Chadd 	}
2257eb6f0de0SAdrian Chadd 	/*
2258eb6f0de0SAdrian Chadd 	 * All the required rate control decisions have been made;
2259eb6f0de0SAdrian Chadd 	 * fill in the rc flags.
2260eb6f0de0SAdrian Chadd 	 */
2261eb6f0de0SAdrian Chadd 	ath_tx_rate_fill_rcflags(sc, bf);
2262b8e788a5SAdrian Chadd 
2263b8e788a5SAdrian Chadd 	/* NB: no buffered multicast in power save support */
2264eb6f0de0SAdrian Chadd 
2265eb6f0de0SAdrian Chadd 	/*
2266eb6f0de0SAdrian Chadd 	 * If we're overiding the ADDBA destination, dump directly
2267eb6f0de0SAdrian Chadd 	 * into the hardware queue, right after any pending
2268eb6f0de0SAdrian Chadd 	 * frames to that node are.
2269eb6f0de0SAdrian Chadd 	 */
2270eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
2271eb6f0de0SAdrian Chadd 	    __func__, do_override);
2272eb6f0de0SAdrian Chadd 
227394eefcf1SAdrian Chadd #if 1
227422a3aee6SAdrian Chadd 	/*
227522a3aee6SAdrian Chadd 	 * Put addba frames in the right place in the right TID/HWQ.
227622a3aee6SAdrian Chadd 	 */
2277eb6f0de0SAdrian Chadd 	if (do_override) {
22784e81f27cSAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
227922a3aee6SAdrian Chadd 		/*
228022a3aee6SAdrian Chadd 		 * XXX if it's addba frames, should we be leaking
228122a3aee6SAdrian Chadd 		 * them out via the frame leak method?
228222a3aee6SAdrian Chadd 		 * XXX for now let's not risk it; but we may wish
228322a3aee6SAdrian Chadd 		 * to investigate this later.
228422a3aee6SAdrian Chadd 		 */
2285eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
228622a3aee6SAdrian Chadd 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
228722a3aee6SAdrian Chadd 	    &queue_to_head)) {
2288eb6f0de0SAdrian Chadd 		/* Queue to software queue */
228922a3aee6SAdrian Chadd 		ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf);
229022a3aee6SAdrian Chadd 	} else {
229122a3aee6SAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
229222a3aee6SAdrian Chadd 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2293eb6f0de0SAdrian Chadd 	}
229494eefcf1SAdrian Chadd #else
229594eefcf1SAdrian Chadd 	/* Direct-dispatch to the hardware */
229694eefcf1SAdrian Chadd 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
229722a3aee6SAdrian Chadd 	/*
229822a3aee6SAdrian Chadd 	 * Update the current leak count if
229922a3aee6SAdrian Chadd 	 * we're leaking frames; and set the
230022a3aee6SAdrian Chadd 	 * MORE flag as appropriate.
230122a3aee6SAdrian Chadd 	 */
230222a3aee6SAdrian Chadd 	ath_tx_leak_count_update(sc, tid, bf);
230394eefcf1SAdrian Chadd 	ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
230494eefcf1SAdrian Chadd #endif
2305b8e788a5SAdrian Chadd 	return 0;
2306b8e788a5SAdrian Chadd }
2307b8e788a5SAdrian Chadd 
2308eb6f0de0SAdrian Chadd /*
2309eb6f0de0SAdrian Chadd  * Send a raw frame.
2310eb6f0de0SAdrian Chadd  *
2311eb6f0de0SAdrian Chadd  * This can be called by net80211.
2312eb6f0de0SAdrian Chadd  */
2313b8e788a5SAdrian Chadd int
2314b8e788a5SAdrian Chadd ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2315b8e788a5SAdrian Chadd 	const struct ieee80211_bpf_params *params)
2316b8e788a5SAdrian Chadd {
2317b8e788a5SAdrian Chadd 	struct ieee80211com *ic = ni->ni_ic;
2318b8e788a5SAdrian Chadd 	struct ifnet *ifp = ic->ic_ifp;
2319b8e788a5SAdrian Chadd 	struct ath_softc *sc = ifp->if_softc;
2320b8e788a5SAdrian Chadd 	struct ath_buf *bf;
23219c85ff91SAdrian Chadd 	struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
23229c85ff91SAdrian Chadd 	int error = 0;
2323b8e788a5SAdrian Chadd 
2324ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
2325ef27340cSAdrian Chadd 	if (sc->sc_inreset_cnt > 0) {
2326ef27340cSAdrian Chadd 		device_printf(sc->sc_dev, "%s: sc_inreset_cnt > 0; bailing\n",
2327ef27340cSAdrian Chadd 		    __func__);
2328ef27340cSAdrian Chadd 		error = EIO;
2329ef27340cSAdrian Chadd 		ATH_PCU_UNLOCK(sc);
2330ef27340cSAdrian Chadd 		goto bad0;
2331ef27340cSAdrian Chadd 	}
2332ef27340cSAdrian Chadd 	sc->sc_txstart_cnt++;
2333ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
2334ef27340cSAdrian Chadd 
23351b5c5f5aSAdrian Chadd 	ATH_TX_LOCK(sc);
23361b5c5f5aSAdrian Chadd 
2337b8e788a5SAdrian Chadd 	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
2338b8e788a5SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
2339b8e788a5SAdrian Chadd 		    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ?
2340b8e788a5SAdrian Chadd 			"!running" : "invalid");
2341b8e788a5SAdrian Chadd 		m_freem(m);
2342b8e788a5SAdrian Chadd 		error = ENETDOWN;
2343b8e788a5SAdrian Chadd 		goto bad;
2344b8e788a5SAdrian Chadd 	}
23459c85ff91SAdrian Chadd 
23469c85ff91SAdrian Chadd 	/*
23479c85ff91SAdrian Chadd 	 * Enforce how deep the multicast queue can grow.
23489c85ff91SAdrian Chadd 	 *
23499c85ff91SAdrian Chadd 	 * XXX duplicated in ath_tx_start().
23509c85ff91SAdrian Chadd 	 */
23519c85ff91SAdrian Chadd 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
235292e84e43SAdrian Chadd 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
235392e84e43SAdrian Chadd 		    > sc->sc_txq_mcastq_maxdepth) {
23549c85ff91SAdrian Chadd 			sc->sc_stats.ast_tx_mcastq_overflow++;
23559c85ff91SAdrian Chadd 			error = ENOBUFS;
23569c85ff91SAdrian Chadd 		}
23579c85ff91SAdrian Chadd 
23589c85ff91SAdrian Chadd 		if (error != 0) {
23599c85ff91SAdrian Chadd 			m_freem(m);
23609c85ff91SAdrian Chadd 			goto bad;
23619c85ff91SAdrian Chadd 		}
23629c85ff91SAdrian Chadd 	}
23639c85ff91SAdrian Chadd 
2364b8e788a5SAdrian Chadd 	/*
2365b8e788a5SAdrian Chadd 	 * Grab a TX buffer and associated resources.
2366b8e788a5SAdrian Chadd 	 */
2367af33d486SAdrian Chadd 	bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT);
2368b8e788a5SAdrian Chadd 	if (bf == NULL) {
2369b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_nobuf++;
2370b8e788a5SAdrian Chadd 		m_freem(m);
2371b8e788a5SAdrian Chadd 		error = ENOBUFS;
2372b8e788a5SAdrian Chadd 		goto bad;
2373b8e788a5SAdrian Chadd 	}
237403682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n",
237503682514SAdrian Chadd 	    m, params,  bf);
2376b8e788a5SAdrian Chadd 
2377b8e788a5SAdrian Chadd 	if (params == NULL) {
2378b8e788a5SAdrian Chadd 		/*
2379b8e788a5SAdrian Chadd 		 * Legacy path; interpret frame contents to decide
2380b8e788a5SAdrian Chadd 		 * precisely how to send the frame.
2381b8e788a5SAdrian Chadd 		 */
2382b8e788a5SAdrian Chadd 		if (ath_tx_start(sc, ni, bf, m)) {
2383b8e788a5SAdrian Chadd 			error = EIO;		/* XXX */
2384b8e788a5SAdrian Chadd 			goto bad2;
2385b8e788a5SAdrian Chadd 		}
2386b8e788a5SAdrian Chadd 	} else {
2387b8e788a5SAdrian Chadd 		/*
2388b8e788a5SAdrian Chadd 		 * Caller supplied explicit parameters to use in
2389b8e788a5SAdrian Chadd 		 * sending the frame.
2390b8e788a5SAdrian Chadd 		 */
2391b8e788a5SAdrian Chadd 		if (ath_tx_raw_start(sc, ni, bf, m, params)) {
2392b8e788a5SAdrian Chadd 			error = EIO;		/* XXX */
2393b8e788a5SAdrian Chadd 			goto bad2;
2394b8e788a5SAdrian Chadd 		}
2395b8e788a5SAdrian Chadd 	}
2396b8e788a5SAdrian Chadd 	sc->sc_wd_timer = 5;
2397b8e788a5SAdrian Chadd 	ifp->if_opackets++;
2398b8e788a5SAdrian Chadd 	sc->sc_stats.ast_tx_raw++;
2399b8e788a5SAdrian Chadd 
2400548a605dSAdrian Chadd 	/*
2401548a605dSAdrian Chadd 	 * Update the TIM - if there's anything queued to the
2402548a605dSAdrian Chadd 	 * software queue and power save is enabled, we should
2403548a605dSAdrian Chadd 	 * set the TIM.
2404548a605dSAdrian Chadd 	 */
2405548a605dSAdrian Chadd 	ath_tx_update_tim(sc, ni, 1);
2406548a605dSAdrian Chadd 
2407974185bbSAdrian Chadd 	ATH_TX_UNLOCK(sc);
2408974185bbSAdrian Chadd 
2409ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
2410ef27340cSAdrian Chadd 	sc->sc_txstart_cnt--;
2411ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
2412ef27340cSAdrian Chadd 
2413b8e788a5SAdrian Chadd 	return 0;
2414b8e788a5SAdrian Chadd bad2:
241503682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, "
241603682514SAdrian Chadd 	    "bf=%p",
241703682514SAdrian Chadd 	    m,
241803682514SAdrian Chadd 	    params,
241903682514SAdrian Chadd 	    bf);
2420b8e788a5SAdrian Chadd 	ATH_TXBUF_LOCK(sc);
2421e1a50456SAdrian Chadd 	ath_returnbuf_head(sc, bf);
2422b8e788a5SAdrian Chadd 	ATH_TXBUF_UNLOCK(sc);
2423b8e788a5SAdrian Chadd bad:
24241b5c5f5aSAdrian Chadd 
24251b5c5f5aSAdrian Chadd 	ATH_TX_UNLOCK(sc);
24261b5c5f5aSAdrian Chadd 
2427ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
2428ef27340cSAdrian Chadd 	sc->sc_txstart_cnt--;
2429ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
2430ef27340cSAdrian Chadd bad0:
243103682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p",
243203682514SAdrian Chadd 	    m, params);
2433b8e788a5SAdrian Chadd 	ifp->if_oerrors++;
2434b8e788a5SAdrian Chadd 	sc->sc_stats.ast_tx_raw_fail++;
2435b8e788a5SAdrian Chadd 	ieee80211_free_node(ni);
2436ef27340cSAdrian Chadd 
2437b8e788a5SAdrian Chadd 	return error;
2438b8e788a5SAdrian Chadd }
2439eb6f0de0SAdrian Chadd 
2440eb6f0de0SAdrian Chadd /* Some helper functions */
2441eb6f0de0SAdrian Chadd 
2442eb6f0de0SAdrian Chadd /*
2443eb6f0de0SAdrian Chadd  * ADDBA (and potentially others) need to be placed in the same
2444eb6f0de0SAdrian Chadd  * hardware queue as the TID/node it's relating to. This is so
2445eb6f0de0SAdrian Chadd  * it goes out after any pending non-aggregate frames to the
2446eb6f0de0SAdrian Chadd  * same node/TID.
2447eb6f0de0SAdrian Chadd  *
2448eb6f0de0SAdrian Chadd  * If this isn't done, the ADDBA can go out before the frames
2449eb6f0de0SAdrian Chadd  * queued in hardware. Even though these frames have a sequence
2450eb6f0de0SAdrian Chadd  * number -earlier- than the ADDBA can be transmitted (but
2451eb6f0de0SAdrian Chadd  * no frames whose sequence numbers are after the ADDBA should
2452eb6f0de0SAdrian Chadd  * be!) they'll arrive after the ADDBA - and the receiving end
2453eb6f0de0SAdrian Chadd  * will simply drop them as being out of the BAW.
2454eb6f0de0SAdrian Chadd  *
2455eb6f0de0SAdrian Chadd  * The frames can't be appended to the TID software queue - it'll
2456eb6f0de0SAdrian Chadd  * never be sent out. So these frames have to be directly
2457eb6f0de0SAdrian Chadd  * dispatched to the hardware, rather than queued in software.
2458eb6f0de0SAdrian Chadd  * So if this function returns true, the TXQ has to be
2459eb6f0de0SAdrian Chadd  * overridden and it has to be directly dispatched.
2460eb6f0de0SAdrian Chadd  *
2461eb6f0de0SAdrian Chadd  * It's a dirty hack, but someone's gotta do it.
2462eb6f0de0SAdrian Chadd  */
2463eb6f0de0SAdrian Chadd 
2464eb6f0de0SAdrian Chadd /*
2465eb6f0de0SAdrian Chadd  * XXX doesn't belong here!
2466eb6f0de0SAdrian Chadd  */
2467eb6f0de0SAdrian Chadd static int
2468eb6f0de0SAdrian Chadd ieee80211_is_action(struct ieee80211_frame *wh)
2469eb6f0de0SAdrian Chadd {
2470eb6f0de0SAdrian Chadd 	/* Type: Management frame? */
2471eb6f0de0SAdrian Chadd 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
2472eb6f0de0SAdrian Chadd 	    IEEE80211_FC0_TYPE_MGT)
2473eb6f0de0SAdrian Chadd 		return 0;
2474eb6f0de0SAdrian Chadd 
2475eb6f0de0SAdrian Chadd 	/* Subtype: Action frame? */
2476eb6f0de0SAdrian Chadd 	if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) !=
2477eb6f0de0SAdrian Chadd 	    IEEE80211_FC0_SUBTYPE_ACTION)
2478eb6f0de0SAdrian Chadd 		return 0;
2479eb6f0de0SAdrian Chadd 
2480eb6f0de0SAdrian Chadd 	return 1;
2481eb6f0de0SAdrian Chadd }
2482eb6f0de0SAdrian Chadd 
2483eb6f0de0SAdrian Chadd #define	MS(_v, _f)	(((_v) & _f) >> _f##_S)
2484eb6f0de0SAdrian Chadd /*
2485eb6f0de0SAdrian Chadd  * Return an alternate TID for ADDBA request frames.
2486eb6f0de0SAdrian Chadd  *
2487eb6f0de0SAdrian Chadd  * Yes, this likely should be done in the net80211 layer.
2488eb6f0de0SAdrian Chadd  */
2489eb6f0de0SAdrian Chadd static int
2490eb6f0de0SAdrian Chadd ath_tx_action_frame_override_queue(struct ath_softc *sc,
2491eb6f0de0SAdrian Chadd     struct ieee80211_node *ni,
2492eb6f0de0SAdrian Chadd     struct mbuf *m0, int *tid)
2493eb6f0de0SAdrian Chadd {
2494eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
2495eb6f0de0SAdrian Chadd 	struct ieee80211_action_ba_addbarequest *ia;
2496eb6f0de0SAdrian Chadd 	uint8_t *frm;
2497eb6f0de0SAdrian Chadd 	uint16_t baparamset;
2498eb6f0de0SAdrian Chadd 
2499eb6f0de0SAdrian Chadd 	/* Not action frame? Bail */
2500eb6f0de0SAdrian Chadd 	if (! ieee80211_is_action(wh))
2501eb6f0de0SAdrian Chadd 		return 0;
2502eb6f0de0SAdrian Chadd 
2503eb6f0de0SAdrian Chadd 	/* XXX Not needed for frames we send? */
2504eb6f0de0SAdrian Chadd #if 0
2505eb6f0de0SAdrian Chadd 	/* Correct length? */
2506eb6f0de0SAdrian Chadd 	if (! ieee80211_parse_action(ni, m))
2507eb6f0de0SAdrian Chadd 		return 0;
2508eb6f0de0SAdrian Chadd #endif
2509eb6f0de0SAdrian Chadd 
2510eb6f0de0SAdrian Chadd 	/* Extract out action frame */
2511eb6f0de0SAdrian Chadd 	frm = (u_int8_t *)&wh[1];
2512eb6f0de0SAdrian Chadd 	ia = (struct ieee80211_action_ba_addbarequest *) frm;
2513eb6f0de0SAdrian Chadd 
2514eb6f0de0SAdrian Chadd 	/* Not ADDBA? Bail */
2515eb6f0de0SAdrian Chadd 	if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
2516eb6f0de0SAdrian Chadd 		return 0;
2517eb6f0de0SAdrian Chadd 	if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2518eb6f0de0SAdrian Chadd 		return 0;
2519eb6f0de0SAdrian Chadd 
2520eb6f0de0SAdrian Chadd 	/* Extract TID, return it */
2521eb6f0de0SAdrian Chadd 	baparamset = le16toh(ia->rq_baparamset);
2522eb6f0de0SAdrian Chadd 	*tid = (int) MS(baparamset, IEEE80211_BAPS_TID);
2523eb6f0de0SAdrian Chadd 
2524eb6f0de0SAdrian Chadd 	return 1;
2525eb6f0de0SAdrian Chadd }
2526eb6f0de0SAdrian Chadd #undef	MS
2527eb6f0de0SAdrian Chadd 
2528eb6f0de0SAdrian Chadd /* Per-node software queue operations */
2529eb6f0de0SAdrian Chadd 
2530eb6f0de0SAdrian Chadd /*
2531eb6f0de0SAdrian Chadd  * Add the current packet to the given BAW.
2532eb6f0de0SAdrian Chadd  * It is assumed that the current packet
2533eb6f0de0SAdrian Chadd  *
2534eb6f0de0SAdrian Chadd  * + fits inside the BAW;
2535eb6f0de0SAdrian Chadd  * + already has had a sequence number allocated.
2536eb6f0de0SAdrian Chadd  *
2537eb6f0de0SAdrian Chadd  * Since the BAW status may be modified by both the ath task and
2538eb6f0de0SAdrian Chadd  * the net80211/ifnet contexts, the TID must be locked.
2539eb6f0de0SAdrian Chadd  */
2540eb6f0de0SAdrian Chadd void
2541eb6f0de0SAdrian Chadd ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2542eb6f0de0SAdrian Chadd     struct ath_tid *tid, struct ath_buf *bf)
2543eb6f0de0SAdrian Chadd {
2544eb6f0de0SAdrian Chadd 	int index, cindex;
2545eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2546eb6f0de0SAdrian Chadd 
2547375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2548eb6f0de0SAdrian Chadd 
2549eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_isretried)
2550eb6f0de0SAdrian Chadd 		return;
2551eb6f0de0SAdrian Chadd 
2552c7c07341SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
2553c7c07341SAdrian Chadd 
25547561cb5cSAdrian Chadd 	if (! bf->bf_state.bfs_dobaw) {
25557561cb5cSAdrian Chadd 		device_printf(sc->sc_dev,
25567561cb5cSAdrian Chadd 		    "%s: dobaw=0, seqno=%d, window %d:%d\n",
25577561cb5cSAdrian Chadd 		    __func__,
25587561cb5cSAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno),
25597561cb5cSAdrian Chadd 		    tap->txa_start,
25607561cb5cSAdrian Chadd 		    tap->txa_wnd);
25617561cb5cSAdrian Chadd 	}
25627561cb5cSAdrian Chadd 
2563eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_addedbaw)
2564eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2565a108d2d6SAdrian Chadd 		    "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2566d4365d16SAdrian Chadd 		    "baw head=%d tail=%d\n",
2567a108d2d6SAdrian Chadd 		    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2568d4365d16SAdrian Chadd 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2569d4365d16SAdrian Chadd 		    tid->baw_tail);
2570eb6f0de0SAdrian Chadd 
2571eb6f0de0SAdrian Chadd 	/*
25727561cb5cSAdrian Chadd 	 * Verify that the given sequence number is not outside of the
25737561cb5cSAdrian Chadd 	 * BAW.  Complain loudly if that's the case.
25747561cb5cSAdrian Chadd 	 */
25757561cb5cSAdrian Chadd 	if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
25767561cb5cSAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno))) {
25777561cb5cSAdrian Chadd 		device_printf(sc->sc_dev,
25787561cb5cSAdrian Chadd 		    "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; "
25797561cb5cSAdrian Chadd 		    "baw head=%d tail=%d\n",
25807561cb5cSAdrian Chadd 		    __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
25817561cb5cSAdrian Chadd 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
25827561cb5cSAdrian Chadd 		    tid->baw_tail);
25837561cb5cSAdrian Chadd 	}
25847561cb5cSAdrian Chadd 
25857561cb5cSAdrian Chadd 	/*
2586eb6f0de0SAdrian Chadd 	 * ni->ni_txseqs[] is the currently allocated seqno.
2587eb6f0de0SAdrian Chadd 	 * the txa state contains the current baw start.
2588eb6f0de0SAdrian Chadd 	 */
2589eb6f0de0SAdrian Chadd 	index  = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2590eb6f0de0SAdrian Chadd 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2591eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2592a108d2d6SAdrian Chadd 	    "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2593d4365d16SAdrian Chadd 	    "baw head=%d tail=%d\n",
2594a108d2d6SAdrian Chadd 	    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2595d4365d16SAdrian Chadd 	    tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2596d4365d16SAdrian Chadd 	    tid->baw_tail);
2597eb6f0de0SAdrian Chadd 
2598eb6f0de0SAdrian Chadd 
2599eb6f0de0SAdrian Chadd #if 0
2600eb6f0de0SAdrian Chadd 	assert(tid->tx_buf[cindex] == NULL);
2601eb6f0de0SAdrian Chadd #endif
2602eb6f0de0SAdrian Chadd 	if (tid->tx_buf[cindex] != NULL) {
2603eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2604eb6f0de0SAdrian Chadd 		    "%s: ba packet dup (index=%d, cindex=%d, "
2605eb6f0de0SAdrian Chadd 		    "head=%d, tail=%d)\n",
2606eb6f0de0SAdrian Chadd 		    __func__, index, cindex, tid->baw_head, tid->baw_tail);
2607eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2608eb6f0de0SAdrian Chadd 		    "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2609eb6f0de0SAdrian Chadd 		    __func__,
2610eb6f0de0SAdrian Chadd 		    tid->tx_buf[cindex],
2611eb6f0de0SAdrian Chadd 		    SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2612eb6f0de0SAdrian Chadd 		    bf,
2613eb6f0de0SAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno)
2614eb6f0de0SAdrian Chadd 		);
2615eb6f0de0SAdrian Chadd 	}
2616eb6f0de0SAdrian Chadd 	tid->tx_buf[cindex] = bf;
2617eb6f0de0SAdrian Chadd 
2618d4365d16SAdrian Chadd 	if (index >= ((tid->baw_tail - tid->baw_head) &
2619d4365d16SAdrian Chadd 	    (ATH_TID_MAX_BUFS - 1))) {
2620eb6f0de0SAdrian Chadd 		tid->baw_tail = cindex;
2621eb6f0de0SAdrian Chadd 		INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2622eb6f0de0SAdrian Chadd 	}
2623eb6f0de0SAdrian Chadd }
2624eb6f0de0SAdrian Chadd 
2625eb6f0de0SAdrian Chadd /*
262638962489SAdrian Chadd  * Flip the BAW buffer entry over from the existing one to the new one.
262738962489SAdrian Chadd  *
262838962489SAdrian Chadd  * When software retransmitting a (sub-)frame, it is entirely possible that
262938962489SAdrian Chadd  * the frame ath_buf is marked as BUSY and can't be immediately reused.
263038962489SAdrian Chadd  * In that instance the buffer is cloned and the new buffer is used for
263138962489SAdrian Chadd  * retransmit. We thus need to update the ath_buf slot in the BAW buf
263238962489SAdrian Chadd  * tracking array to maintain consistency.
263338962489SAdrian Chadd  */
263438962489SAdrian Chadd static void
263538962489SAdrian Chadd ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
263638962489SAdrian Chadd     struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
263738962489SAdrian Chadd {
263838962489SAdrian Chadd 	int index, cindex;
263938962489SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
264038962489SAdrian Chadd 	int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
264138962489SAdrian Chadd 
2642375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
264338962489SAdrian Chadd 
264438962489SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
264538962489SAdrian Chadd 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
264638962489SAdrian Chadd 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
264738962489SAdrian Chadd 
264838962489SAdrian Chadd 	/*
264938962489SAdrian Chadd 	 * Just warn for now; if it happens then we should find out
265038962489SAdrian Chadd 	 * about it. It's highly likely the aggregation session will
265138962489SAdrian Chadd 	 * soon hang.
265238962489SAdrian Chadd 	 */
265338962489SAdrian Chadd 	if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
265438962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: retransmitted buffer"
265538962489SAdrian Chadd 		    " has mismatching seqno's, BA session may hang.\n",
265638962489SAdrian Chadd 		    __func__);
265738962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: old seqno=%d, new_seqno=%d\n",
265838962489SAdrian Chadd 		    __func__,
265938962489SAdrian Chadd 		    old_bf->bf_state.bfs_seqno,
266038962489SAdrian Chadd 		    new_bf->bf_state.bfs_seqno);
266138962489SAdrian Chadd 	}
266238962489SAdrian Chadd 
266338962489SAdrian Chadd 	if (tid->tx_buf[cindex] != old_bf) {
266438962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: ath_buf pointer incorrect; "
266538962489SAdrian Chadd 		    " has m BA session may hang.\n",
266638962489SAdrian Chadd 		    __func__);
266738962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: old bf=%p, new bf=%p\n",
266838962489SAdrian Chadd 		    __func__,
266938962489SAdrian Chadd 		    old_bf, new_bf);
267038962489SAdrian Chadd 	}
267138962489SAdrian Chadd 
267238962489SAdrian Chadd 	tid->tx_buf[cindex] = new_bf;
267338962489SAdrian Chadd }
267438962489SAdrian Chadd 
267538962489SAdrian Chadd /*
2676eb6f0de0SAdrian Chadd  * seq_start - left edge of BAW
2677eb6f0de0SAdrian Chadd  * seq_next - current/next sequence number to allocate
2678eb6f0de0SAdrian Chadd  *
2679eb6f0de0SAdrian Chadd  * Since the BAW status may be modified by both the ath task and
2680eb6f0de0SAdrian Chadd  * the net80211/ifnet contexts, the TID must be locked.
2681eb6f0de0SAdrian Chadd  */
2682eb6f0de0SAdrian Chadd static void
2683eb6f0de0SAdrian Chadd ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2684eb6f0de0SAdrian Chadd     struct ath_tid *tid, const struct ath_buf *bf)
2685eb6f0de0SAdrian Chadd {
2686eb6f0de0SAdrian Chadd 	int index, cindex;
2687eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2688eb6f0de0SAdrian Chadd 	int seqno = SEQNO(bf->bf_state.bfs_seqno);
2689eb6f0de0SAdrian Chadd 
2690375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2691eb6f0de0SAdrian Chadd 
2692eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
2693eb6f0de0SAdrian Chadd 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2694eb6f0de0SAdrian Chadd 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2695eb6f0de0SAdrian Chadd 
2696eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2697a108d2d6SAdrian Chadd 	    "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2698d4365d16SAdrian Chadd 	    "baw head=%d, tail=%d\n",
2699a108d2d6SAdrian Chadd 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2700eb6f0de0SAdrian Chadd 	    cindex, tid->baw_head, tid->baw_tail);
2701eb6f0de0SAdrian Chadd 
2702eb6f0de0SAdrian Chadd 	/*
2703eb6f0de0SAdrian Chadd 	 * If this occurs then we have a big problem - something else
2704eb6f0de0SAdrian Chadd 	 * has slid tap->txa_start along without updating the BAW
2705eb6f0de0SAdrian Chadd 	 * tracking start/end pointers. Thus the TX BAW state is now
2706eb6f0de0SAdrian Chadd 	 * completely busted.
2707eb6f0de0SAdrian Chadd 	 *
2708eb6f0de0SAdrian Chadd 	 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2709eb6f0de0SAdrian Chadd 	 * it's quite possible that a cloned buffer is making its way
2710eb6f0de0SAdrian Chadd 	 * here and causing it to fire off. Disable TDMA for now.
2711eb6f0de0SAdrian Chadd 	 */
2712eb6f0de0SAdrian Chadd 	if (tid->tx_buf[cindex] != bf) {
2713eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2714eb6f0de0SAdrian Chadd 		    "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2715eb6f0de0SAdrian Chadd 		    __func__,
2716eb6f0de0SAdrian Chadd 		    bf, SEQNO(bf->bf_state.bfs_seqno),
2717eb6f0de0SAdrian Chadd 		    tid->tx_buf[cindex],
27183527f6a9SAdrian Chadd 		    (tid->tx_buf[cindex] != NULL) ?
27193527f6a9SAdrian Chadd 		      SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1);
2720eb6f0de0SAdrian Chadd 	}
2721eb6f0de0SAdrian Chadd 
2722eb6f0de0SAdrian Chadd 	tid->tx_buf[cindex] = NULL;
2723eb6f0de0SAdrian Chadd 
2724d4365d16SAdrian Chadd 	while (tid->baw_head != tid->baw_tail &&
2725d4365d16SAdrian Chadd 	    !tid->tx_buf[tid->baw_head]) {
2726eb6f0de0SAdrian Chadd 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2727eb6f0de0SAdrian Chadd 		INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2728eb6f0de0SAdrian Chadd 	}
2729d4365d16SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2730d4365d16SAdrian Chadd 	    "%s: baw is now %d:%d, baw head=%d\n",
2731eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, tap->txa_wnd, tid->baw_head);
2732eb6f0de0SAdrian Chadd }
2733eb6f0de0SAdrian Chadd 
273422a3aee6SAdrian Chadd static void
273522a3aee6SAdrian Chadd ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid,
273622a3aee6SAdrian Chadd     struct ath_buf *bf)
273722a3aee6SAdrian Chadd {
273822a3aee6SAdrian Chadd 	struct ieee80211_frame *wh;
273922a3aee6SAdrian Chadd 
274022a3aee6SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
274122a3aee6SAdrian Chadd 
274222a3aee6SAdrian Chadd 	if (tid->an->an_leak_count > 0) {
274322a3aee6SAdrian Chadd 		wh = mtod(bf->bf_m, struct ieee80211_frame *);
274422a3aee6SAdrian Chadd 
274522a3aee6SAdrian Chadd 		/*
274622a3aee6SAdrian Chadd 		 * Update MORE based on the software/net80211 queue states.
274722a3aee6SAdrian Chadd 		 */
274822a3aee6SAdrian Chadd 		if ((tid->an->an_stack_psq > 0)
274922a3aee6SAdrian Chadd 		    || (tid->an->an_swq_depth > 0))
275022a3aee6SAdrian Chadd 			wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
275122a3aee6SAdrian Chadd 		else
275222a3aee6SAdrian Chadd 			wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA;
275322a3aee6SAdrian Chadd 
275422a3aee6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE,
275522a3aee6SAdrian Chadd 		    "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n",
275622a3aee6SAdrian Chadd 		    __func__,
275722a3aee6SAdrian Chadd 		    tid->an->an_node.ni_macaddr,
275822a3aee6SAdrian Chadd 		    ":",
275922a3aee6SAdrian Chadd 		    tid->an->an_leak_count,
276022a3aee6SAdrian Chadd 		    tid->an->an_stack_psq,
276122a3aee6SAdrian Chadd 		    tid->an->an_swq_depth,
276222a3aee6SAdrian Chadd 		    !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA));
276322a3aee6SAdrian Chadd 
276422a3aee6SAdrian Chadd 		/*
276522a3aee6SAdrian Chadd 		 * Re-sync the underlying buffer.
276622a3aee6SAdrian Chadd 		 */
276722a3aee6SAdrian Chadd 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
276822a3aee6SAdrian Chadd 		    BUS_DMASYNC_PREWRITE);
276922a3aee6SAdrian Chadd 
277022a3aee6SAdrian Chadd 		tid->an->an_leak_count --;
277122a3aee6SAdrian Chadd 	}
277222a3aee6SAdrian Chadd }
277322a3aee6SAdrian Chadd 
277422a3aee6SAdrian Chadd static int
277522a3aee6SAdrian Chadd ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid)
277622a3aee6SAdrian Chadd {
277722a3aee6SAdrian Chadd 
277822a3aee6SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
277922a3aee6SAdrian Chadd 
278022a3aee6SAdrian Chadd 	if (tid->an->an_leak_count > 0) {
278122a3aee6SAdrian Chadd 		return (1);
278222a3aee6SAdrian Chadd 	}
278322a3aee6SAdrian Chadd 	if (tid->paused)
278422a3aee6SAdrian Chadd 		return (0);
278522a3aee6SAdrian Chadd 	return (1);
278622a3aee6SAdrian Chadd }
278722a3aee6SAdrian Chadd 
2788eb6f0de0SAdrian Chadd /*
2789eb6f0de0SAdrian Chadd  * Mark the current node/TID as ready to TX.
2790eb6f0de0SAdrian Chadd  *
2791eb6f0de0SAdrian Chadd  * This is done to make it easy for the software scheduler to
2792eb6f0de0SAdrian Chadd  * find which nodes have data to send.
2793eb6f0de0SAdrian Chadd  *
2794eb6f0de0SAdrian Chadd  * The TXQ lock must be held.
2795eb6f0de0SAdrian Chadd  */
279622a3aee6SAdrian Chadd void
2797eb6f0de0SAdrian Chadd ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2798eb6f0de0SAdrian Chadd {
2799eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2800eb6f0de0SAdrian Chadd 
2801375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2802eb6f0de0SAdrian Chadd 
280322a3aee6SAdrian Chadd 	/*
280422a3aee6SAdrian Chadd 	 * If we are leaking out a frame to this destination
280522a3aee6SAdrian Chadd 	 * for PS-POLL, ensure that we allow scheduling to
280622a3aee6SAdrian Chadd 	 * occur.
280722a3aee6SAdrian Chadd 	 */
280822a3aee6SAdrian Chadd 	if (! ath_tx_tid_can_tx_or_sched(sc, tid))
2809eb6f0de0SAdrian Chadd 		return;		/* paused, can't schedule yet */
2810eb6f0de0SAdrian Chadd 
2811eb6f0de0SAdrian Chadd 	if (tid->sched)
2812eb6f0de0SAdrian Chadd 		return;		/* already scheduled */
2813eb6f0de0SAdrian Chadd 
2814eb6f0de0SAdrian Chadd 	tid->sched = 1;
2815eb6f0de0SAdrian Chadd 
281622a3aee6SAdrian Chadd #if 0
281722a3aee6SAdrian Chadd 	/*
281822a3aee6SAdrian Chadd 	 * If this is a sleeping node we're leaking to, given
281922a3aee6SAdrian Chadd 	 * it a higher priority.  This is so bad for QoS it hurts.
282022a3aee6SAdrian Chadd 	 */
282122a3aee6SAdrian Chadd 	if (tid->an->an_leak_count) {
282222a3aee6SAdrian Chadd 		TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem);
282322a3aee6SAdrian Chadd 	} else {
282422a3aee6SAdrian Chadd 		TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
282522a3aee6SAdrian Chadd 	}
282622a3aee6SAdrian Chadd #endif
282722a3aee6SAdrian Chadd 
282822a3aee6SAdrian Chadd 	/*
282922a3aee6SAdrian Chadd 	 * We can't do the above - it'll confuse the TXQ software
283022a3aee6SAdrian Chadd 	 * scheduler which will keep checking the _head_ TID
283122a3aee6SAdrian Chadd 	 * in the list to see if it has traffic.  If we queue
283222a3aee6SAdrian Chadd 	 * a TID to the head of the list and it doesn't transmit,
283322a3aee6SAdrian Chadd 	 * we'll check it again.
283422a3aee6SAdrian Chadd 	 *
283522a3aee6SAdrian Chadd 	 * So, get the rest of this leaking frames support working
283622a3aee6SAdrian Chadd 	 * and reliable first and _then_ optimise it so they're
283722a3aee6SAdrian Chadd 	 * pushed out in front of any other pending software
283822a3aee6SAdrian Chadd 	 * queued nodes.
283922a3aee6SAdrian Chadd 	 */
2840eb6f0de0SAdrian Chadd 	TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2841eb6f0de0SAdrian Chadd }
2842eb6f0de0SAdrian Chadd 
2843eb6f0de0SAdrian Chadd /*
2844eb6f0de0SAdrian Chadd  * Mark the current node as no longer needing to be polled for
2845eb6f0de0SAdrian Chadd  * TX packets.
2846eb6f0de0SAdrian Chadd  *
2847eb6f0de0SAdrian Chadd  * The TXQ lock must be held.
2848eb6f0de0SAdrian Chadd  */
2849eb6f0de0SAdrian Chadd static void
2850eb6f0de0SAdrian Chadd ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2851eb6f0de0SAdrian Chadd {
2852eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2853eb6f0de0SAdrian Chadd 
2854375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2855eb6f0de0SAdrian Chadd 
2856eb6f0de0SAdrian Chadd 	if (tid->sched == 0)
2857eb6f0de0SAdrian Chadd 		return;
2858eb6f0de0SAdrian Chadd 
2859eb6f0de0SAdrian Chadd 	tid->sched = 0;
2860eb6f0de0SAdrian Chadd 	TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2861eb6f0de0SAdrian Chadd }
2862eb6f0de0SAdrian Chadd 
2863eb6f0de0SAdrian Chadd /*
2864eb6f0de0SAdrian Chadd  * Assign a sequence number manually to the given frame.
2865eb6f0de0SAdrian Chadd  *
2866eb6f0de0SAdrian Chadd  * This should only be called for A-MPDU TX frames.
2867eb6f0de0SAdrian Chadd  */
2868a108d2d6SAdrian Chadd static ieee80211_seq
2869eb6f0de0SAdrian Chadd ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2870eb6f0de0SAdrian Chadd     struct ath_buf *bf, struct mbuf *m0)
2871eb6f0de0SAdrian Chadd {
2872eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh;
2873eb6f0de0SAdrian Chadd 	int tid, pri;
2874eb6f0de0SAdrian Chadd 	ieee80211_seq seqno;
2875eb6f0de0SAdrian Chadd 	uint8_t subtype;
2876eb6f0de0SAdrian Chadd 
2877eb6f0de0SAdrian Chadd 	/* TID lookup */
2878eb6f0de0SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2879eb6f0de0SAdrian Chadd 	pri = M_WME_GETAC(m0);			/* honor classification */
2880eb6f0de0SAdrian Chadd 	tid = WME_AC_TO_TID(pri);
2881a108d2d6SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n",
2882a108d2d6SAdrian Chadd 	    __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2883eb6f0de0SAdrian Chadd 
2884eb6f0de0SAdrian Chadd 	/* XXX Is it a control frame? Ignore */
2885eb6f0de0SAdrian Chadd 
2886eb6f0de0SAdrian Chadd 	/* Does the packet require a sequence number? */
2887eb6f0de0SAdrian Chadd 	if (! IEEE80211_QOS_HAS_SEQ(wh))
2888eb6f0de0SAdrian Chadd 		return -1;
2889eb6f0de0SAdrian Chadd 
2890375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
28917561cb5cSAdrian Chadd 
2892eb6f0de0SAdrian Chadd 	/*
2893eb6f0de0SAdrian Chadd 	 * Is it a QOS NULL Data frame? Give it a sequence number from
2894eb6f0de0SAdrian Chadd 	 * the default TID (IEEE80211_NONQOS_TID.)
2895eb6f0de0SAdrian Chadd 	 *
2896eb6f0de0SAdrian Chadd 	 * The RX path of everything I've looked at doesn't include the NULL
2897eb6f0de0SAdrian Chadd 	 * data frame sequence number in the aggregation state updates, so
2898eb6f0de0SAdrian Chadd 	 * assigning it a sequence number there will cause a BAW hole on the
2899eb6f0de0SAdrian Chadd 	 * RX side.
2900eb6f0de0SAdrian Chadd 	 */
2901eb6f0de0SAdrian Chadd 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2902eb6f0de0SAdrian Chadd 	if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) {
29037561cb5cSAdrian Chadd 		/* XXX no locking for this TID? This is a bit of a problem. */
2904eb6f0de0SAdrian Chadd 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
2905eb6f0de0SAdrian Chadd 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
2906eb6f0de0SAdrian Chadd 	} else {
2907eb6f0de0SAdrian Chadd 		/* Manually assign sequence number */
2908eb6f0de0SAdrian Chadd 		seqno = ni->ni_txseqs[tid];
2909eb6f0de0SAdrian Chadd 		INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
2910eb6f0de0SAdrian Chadd 	}
2911eb6f0de0SAdrian Chadd 	*(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
2912eb6f0de0SAdrian Chadd 	M_SEQNO_SET(m0, seqno);
2913eb6f0de0SAdrian Chadd 
2914eb6f0de0SAdrian Chadd 	/* Return so caller can do something with it if needed */
2915a108d2d6SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s:  -> seqno=%d\n", __func__, seqno);
2916eb6f0de0SAdrian Chadd 	return seqno;
2917eb6f0de0SAdrian Chadd }
2918eb6f0de0SAdrian Chadd 
2919eb6f0de0SAdrian Chadd /*
2920eb6f0de0SAdrian Chadd  * Attempt to direct dispatch an aggregate frame to hardware.
2921eb6f0de0SAdrian Chadd  * If the frame is out of BAW, queue.
2922eb6f0de0SAdrian Chadd  * Otherwise, schedule it as a single frame.
2923eb6f0de0SAdrian Chadd  */
2924eb6f0de0SAdrian Chadd static void
292546634305SAdrian Chadd ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an,
292646634305SAdrian Chadd     struct ath_txq *txq, struct ath_buf *bf)
2927eb6f0de0SAdrian Chadd {
2928eb6f0de0SAdrian Chadd 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
2929eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2930eb6f0de0SAdrian Chadd 
2931375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2932eb6f0de0SAdrian Chadd 
2933eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
2934eb6f0de0SAdrian Chadd 
2935eb6f0de0SAdrian Chadd 	/* paused? queue */
293622a3aee6SAdrian Chadd 	if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
29373e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
29380f04c5a2SAdrian Chadd 		/* XXX don't sched - we're paused! */
2939eb6f0de0SAdrian Chadd 		return;
2940eb6f0de0SAdrian Chadd 	}
2941eb6f0de0SAdrian Chadd 
2942eb6f0de0SAdrian Chadd 	/* outside baw? queue */
2943eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_dobaw &&
2944eb6f0de0SAdrian Chadd 	    (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2945eb6f0de0SAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno)))) {
29463e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
2947eb6f0de0SAdrian Chadd 		ath_tx_tid_sched(sc, tid);
2948eb6f0de0SAdrian Chadd 		return;
2949eb6f0de0SAdrian Chadd 	}
2950eb6f0de0SAdrian Chadd 
29512a9f83afSAdrian Chadd 	/*
29522a9f83afSAdrian Chadd 	 * This is a temporary check and should be removed once
29532a9f83afSAdrian Chadd 	 * all the relevant code paths have been fixed.
29542a9f83afSAdrian Chadd 	 *
29552a9f83afSAdrian Chadd 	 * During aggregate retries, it's possible that the head
29562a9f83afSAdrian Chadd 	 * frame will fail (which has the bfs_aggr and bfs_nframes
29572a9f83afSAdrian Chadd 	 * fields set for said aggregate) and will be retried as
29582a9f83afSAdrian Chadd 	 * a single frame.  In this instance, the values should
29592a9f83afSAdrian Chadd 	 * be reset or the completion code will get upset with you.
29602a9f83afSAdrian Chadd 	 */
29612a9f83afSAdrian Chadd 	if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) {
29622a9f83afSAdrian Chadd 		device_printf(sc->sc_dev, "%s: bfs_aggr=%d, bfs_nframes=%d\n",
29632a9f83afSAdrian Chadd 		    __func__,
29642a9f83afSAdrian Chadd 		    bf->bf_state.bfs_aggr,
29652a9f83afSAdrian Chadd 		    bf->bf_state.bfs_nframes);
29662a9f83afSAdrian Chadd 		bf->bf_state.bfs_aggr = 0;
29672a9f83afSAdrian Chadd 		bf->bf_state.bfs_nframes = 1;
29682a9f83afSAdrian Chadd 	}
29692a9f83afSAdrian Chadd 
29704e81f27cSAdrian Chadd 	/* Update CLRDMASK just before this frame is queued */
29714e81f27cSAdrian Chadd 	ath_tx_update_clrdmask(sc, tid, bf);
29724e81f27cSAdrian Chadd 
2973eb6f0de0SAdrian Chadd 	/* Direct dispatch to hardware */
2974eb6f0de0SAdrian Chadd 	ath_tx_do_ratelookup(sc, bf);
2975e2e4a2c2SAdrian Chadd 	ath_tx_calc_duration(sc, bf);
2976e2e4a2c2SAdrian Chadd 	ath_tx_calc_protection(sc, bf);
2977eb6f0de0SAdrian Chadd 	ath_tx_set_rtscts(sc, bf);
2978e2e4a2c2SAdrian Chadd 	ath_tx_rate_fill_rcflags(sc, bf);
2979eb6f0de0SAdrian Chadd 	ath_tx_setds(sc, bf);
2980eb6f0de0SAdrian Chadd 
2981eb6f0de0SAdrian Chadd 	/* Statistics */
2982eb6f0de0SAdrian Chadd 	sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
2983eb6f0de0SAdrian Chadd 
2984eb6f0de0SAdrian Chadd 	/* Track per-TID hardware queue depth correctly */
2985eb6f0de0SAdrian Chadd 	tid->hwq_depth++;
2986eb6f0de0SAdrian Chadd 
2987eb6f0de0SAdrian Chadd 	/* Add to BAW */
2988eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_dobaw) {
2989eb6f0de0SAdrian Chadd 		ath_tx_addto_baw(sc, an, tid, bf);
2990eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_addedbaw = 1;
2991eb6f0de0SAdrian Chadd 	}
2992eb6f0de0SAdrian Chadd 
2993eb6f0de0SAdrian Chadd 	/* Set completion handler, multi-frame aggregate or not */
2994eb6f0de0SAdrian Chadd 	bf->bf_comp = ath_tx_aggr_comp;
2995eb6f0de0SAdrian Chadd 
299622a3aee6SAdrian Chadd 	/*
299722a3aee6SAdrian Chadd 	 * Update the current leak count if
299822a3aee6SAdrian Chadd 	 * we're leaking frames; and set the
299922a3aee6SAdrian Chadd 	 * MORE flag as appropriate.
300022a3aee6SAdrian Chadd 	 */
300122a3aee6SAdrian Chadd 	ath_tx_leak_count_update(sc, tid, bf);
300222a3aee6SAdrian Chadd 
3003eb6f0de0SAdrian Chadd 	/* Hand off to hardware */
3004eb6f0de0SAdrian Chadd 	ath_tx_handoff(sc, txq, bf);
3005eb6f0de0SAdrian Chadd }
3006eb6f0de0SAdrian Chadd 
3007eb6f0de0SAdrian Chadd /*
3008eb6f0de0SAdrian Chadd  * Attempt to send the packet.
3009eb6f0de0SAdrian Chadd  * If the queue isn't busy, direct-dispatch.
3010eb6f0de0SAdrian Chadd  * If the queue is busy enough, queue the given packet on the
3011eb6f0de0SAdrian Chadd  *  relevant software queue.
3012eb6f0de0SAdrian Chadd  */
3013eb6f0de0SAdrian Chadd void
301422a3aee6SAdrian Chadd ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
301522a3aee6SAdrian Chadd     struct ath_txq *txq, int queue_to_head, struct ath_buf *bf)
3016eb6f0de0SAdrian Chadd {
3017eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3018eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh;
3019eb6f0de0SAdrian Chadd 	struct ath_tid *atid;
3020eb6f0de0SAdrian Chadd 	int pri, tid;
3021eb6f0de0SAdrian Chadd 	struct mbuf *m0 = bf->bf_m;
3022eb6f0de0SAdrian Chadd 
3023375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
30247561cb5cSAdrian Chadd 
3025eb6f0de0SAdrian Chadd 	/* Fetch the TID - non-QoS frames get assigned to TID 16 */
3026eb6f0de0SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
3027eb6f0de0SAdrian Chadd 	pri = ath_tx_getac(sc, m0);
3028eb6f0de0SAdrian Chadd 	tid = ath_tx_gettid(sc, m0);
3029eb6f0de0SAdrian Chadd 	atid = &an->an_tid[tid];
3030eb6f0de0SAdrian Chadd 
3031a108d2d6SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
3032a108d2d6SAdrian Chadd 	    __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
3033eb6f0de0SAdrian Chadd 
3034eb6f0de0SAdrian Chadd 	/* Set local packet state, used to queue packets to hardware */
303546634305SAdrian Chadd 	/* XXX potentially duplicate info, re-check */
3036eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_tid = tid;
3037fc56c9c5SAdrian Chadd 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
3038eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_pri = pri;
3039eb6f0de0SAdrian Chadd 
3040eb6f0de0SAdrian Chadd 	/*
3041eb6f0de0SAdrian Chadd 	 * If the hardware queue isn't busy, queue it directly.
3042eb6f0de0SAdrian Chadd 	 * If the hardware queue is busy, queue it.
3043eb6f0de0SAdrian Chadd 	 * If the TID is paused or the traffic it outside BAW, software
3044eb6f0de0SAdrian Chadd 	 * queue it.
304522a3aee6SAdrian Chadd 	 *
304622a3aee6SAdrian Chadd 	 * If the node is in power-save and we're leaking a frame,
304722a3aee6SAdrian Chadd 	 * leak a single frame.
3048eb6f0de0SAdrian Chadd 	 */
304922a3aee6SAdrian Chadd 	if (! ath_tx_tid_can_tx_or_sched(sc, atid)) {
3050eb6f0de0SAdrian Chadd 		/* TID is paused, queue */
3051a108d2d6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
305222a3aee6SAdrian Chadd 		/*
305322a3aee6SAdrian Chadd 		 * If the caller requested that it be sent at a high
305422a3aee6SAdrian Chadd 		 * priority, queue it at the head of the list.
305522a3aee6SAdrian Chadd 		 */
305622a3aee6SAdrian Chadd 		if (queue_to_head)
305722a3aee6SAdrian Chadd 			ATH_TID_INSERT_HEAD(atid, bf, bf_list);
305822a3aee6SAdrian Chadd 		else
30593e6cc97fSAdrian Chadd 			ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3060eb6f0de0SAdrian Chadd 	} else if (ath_tx_ampdu_pending(sc, an, tid)) {
3061eb6f0de0SAdrian Chadd 		/* AMPDU pending; queue */
3062a108d2d6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
30633e6cc97fSAdrian Chadd 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3064eb6f0de0SAdrian Chadd 		/* XXX sched? */
3065eb6f0de0SAdrian Chadd 	} else if (ath_tx_ampdu_running(sc, an, tid)) {
3066eb6f0de0SAdrian Chadd 		/* AMPDU running, attempt direct dispatch if possible */
306739f24578SAdrian Chadd 
306839f24578SAdrian Chadd 		/*
306939f24578SAdrian Chadd 		 * Always queue the frame to the tail of the list.
307039f24578SAdrian Chadd 		 */
30713e6cc97fSAdrian Chadd 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
307239f24578SAdrian Chadd 
307339f24578SAdrian Chadd 		/*
307439f24578SAdrian Chadd 		 * If the hardware queue isn't busy, direct dispatch
307539f24578SAdrian Chadd 		 * the head frame in the list.  Don't schedule the
307639f24578SAdrian Chadd 		 * TID - let it build some more frames first?
307739f24578SAdrian Chadd 		 *
307839f24578SAdrian Chadd 		 * Otherwise, schedule the TID.
307939f24578SAdrian Chadd 		 */
308092e84e43SAdrian Chadd 		if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit) {
30813e6cc97fSAdrian Chadd 			bf = ATH_TID_FIRST(atid);
30823e6cc97fSAdrian Chadd 			ATH_TID_REMOVE(atid, bf, bf_list);
30832a9f83afSAdrian Chadd 
30842a9f83afSAdrian Chadd 			/*
30852a9f83afSAdrian Chadd 			 * Ensure it's definitely treated as a non-AMPDU
30862a9f83afSAdrian Chadd 			 * frame - this information may have been left
30872a9f83afSAdrian Chadd 			 * over from a previous attempt.
30882a9f83afSAdrian Chadd 			 */
30892a9f83afSAdrian Chadd 			bf->bf_state.bfs_aggr = 0;
30902a9f83afSAdrian Chadd 			bf->bf_state.bfs_nframes = 1;
30912a9f83afSAdrian Chadd 
30922a9f83afSAdrian Chadd 			/* Queue to the hardware */
309346634305SAdrian Chadd 			ath_tx_xmit_aggr(sc, an, txq, bf);
3094a108d2d6SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3095a108d2d6SAdrian Chadd 			    "%s: xmit_aggr\n",
3096a108d2d6SAdrian Chadd 			    __func__);
3097d4365d16SAdrian Chadd 		} else {
3098d4365d16SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3099a108d2d6SAdrian Chadd 			    "%s: ampdu; swq'ing\n",
3100a108d2d6SAdrian Chadd 			    __func__);
310103682514SAdrian Chadd 
3102eb6f0de0SAdrian Chadd 			ath_tx_tid_sched(sc, atid);
3103eb6f0de0SAdrian Chadd 		}
310492e84e43SAdrian Chadd 	} else if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit) {
3105eb6f0de0SAdrian Chadd 		/* AMPDU not running, attempt direct dispatch */
3106a108d2d6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
31070a544719SAdrian Chadd 		/* See if clrdmask needs to be set */
31080a544719SAdrian Chadd 		ath_tx_update_clrdmask(sc, atid, bf);
310922a3aee6SAdrian Chadd 
311022a3aee6SAdrian Chadd 		/*
311122a3aee6SAdrian Chadd 		 * Update the current leak count if
311222a3aee6SAdrian Chadd 		 * we're leaking frames; and set the
311322a3aee6SAdrian Chadd 		 * MORE flag as appropriate.
311422a3aee6SAdrian Chadd 		 */
311522a3aee6SAdrian Chadd 		ath_tx_leak_count_update(sc, atid, bf);
311622a3aee6SAdrian Chadd 
311722a3aee6SAdrian Chadd 		/*
311822a3aee6SAdrian Chadd 		 * Dispatch the frame.
311922a3aee6SAdrian Chadd 		 */
3120eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, txq, bf);
3121eb6f0de0SAdrian Chadd 	} else {
3122eb6f0de0SAdrian Chadd 		/* Busy; queue */
3123a108d2d6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
31243e6cc97fSAdrian Chadd 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3125eb6f0de0SAdrian Chadd 		ath_tx_tid_sched(sc, atid);
3126eb6f0de0SAdrian Chadd 	}
3127eb6f0de0SAdrian Chadd }
3128eb6f0de0SAdrian Chadd 
3129eb6f0de0SAdrian Chadd /*
31304f25ddbbSAdrian Chadd  * Only set the clrdmask bit if none of the nodes are currently
31314f25ddbbSAdrian Chadd  * filtered.
31324f25ddbbSAdrian Chadd  *
31334f25ddbbSAdrian Chadd  * XXX TODO: go through all the callers and check to see
31344f25ddbbSAdrian Chadd  * which are being called in the context of looping over all
31354f25ddbbSAdrian Chadd  * TIDs (eg, if all tids are being paused, resumed, etc.)
31364f25ddbbSAdrian Chadd  * That'll avoid O(n^2) complexity here.
31374f25ddbbSAdrian Chadd  */
31384f25ddbbSAdrian Chadd static void
31394f25ddbbSAdrian Chadd ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an)
31404f25ddbbSAdrian Chadd {
31414f25ddbbSAdrian Chadd 	int i;
31424f25ddbbSAdrian Chadd 
31434f25ddbbSAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
31444f25ddbbSAdrian Chadd 
31454f25ddbbSAdrian Chadd 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
31464f25ddbbSAdrian Chadd 		if (an->an_tid[i].isfiltered == 1)
3147f74d878fSAdrian Chadd 			return;
31484f25ddbbSAdrian Chadd 	}
31494f25ddbbSAdrian Chadd 	an->clrdmask = 1;
31504f25ddbbSAdrian Chadd }
31514f25ddbbSAdrian Chadd 
31524f25ddbbSAdrian Chadd /*
3153eb6f0de0SAdrian Chadd  * Configure the per-TID node state.
3154eb6f0de0SAdrian Chadd  *
3155eb6f0de0SAdrian Chadd  * This likely belongs in if_ath_node.c but I can't think of anywhere
3156eb6f0de0SAdrian Chadd  * else to put it just yet.
3157eb6f0de0SAdrian Chadd  *
3158eb6f0de0SAdrian Chadd  * This sets up the SLISTs and the mutex as appropriate.
3159eb6f0de0SAdrian Chadd  */
3160eb6f0de0SAdrian Chadd void
3161eb6f0de0SAdrian Chadd ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
3162eb6f0de0SAdrian Chadd {
3163eb6f0de0SAdrian Chadd 	int i, j;
3164eb6f0de0SAdrian Chadd 	struct ath_tid *atid;
3165eb6f0de0SAdrian Chadd 
3166eb6f0de0SAdrian Chadd 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3167eb6f0de0SAdrian Chadd 		atid = &an->an_tid[i];
3168f1bc738eSAdrian Chadd 
3169f1bc738eSAdrian Chadd 		/* XXX now with this bzer(), is the field 0'ing needed? */
3170f1bc738eSAdrian Chadd 		bzero(atid, sizeof(*atid));
3171f1bc738eSAdrian Chadd 
31723e6cc97fSAdrian Chadd 		TAILQ_INIT(&atid->tid_q);
31733e6cc97fSAdrian Chadd 		TAILQ_INIT(&atid->filtq.tid_q);
3174eb6f0de0SAdrian Chadd 		atid->tid = i;
3175eb6f0de0SAdrian Chadd 		atid->an = an;
3176eb6f0de0SAdrian Chadd 		for (j = 0; j < ATH_TID_MAX_BUFS; j++)
3177eb6f0de0SAdrian Chadd 			atid->tx_buf[j] = NULL;
3178eb6f0de0SAdrian Chadd 		atid->baw_head = atid->baw_tail = 0;
3179eb6f0de0SAdrian Chadd 		atid->paused = 0;
3180eb6f0de0SAdrian Chadd 		atid->sched = 0;
3181eb6f0de0SAdrian Chadd 		atid->hwq_depth = 0;
3182eb6f0de0SAdrian Chadd 		atid->cleanup_inprogress = 0;
3183eb6f0de0SAdrian Chadd 		if (i == IEEE80211_NONQOS_TID)
31847403d1b9SAdrian Chadd 			atid->ac = ATH_NONQOS_TID_AC;
3185eb6f0de0SAdrian Chadd 		else
3186eb6f0de0SAdrian Chadd 			atid->ac = TID_TO_WME_AC(i);
3187eb6f0de0SAdrian Chadd 	}
31884f25ddbbSAdrian Chadd 	an->clrdmask = 1;	/* Always start by setting this bit */
3189eb6f0de0SAdrian Chadd }
3190eb6f0de0SAdrian Chadd 
3191eb6f0de0SAdrian Chadd /*
3192eb6f0de0SAdrian Chadd  * Pause the current TID. This stops packets from being transmitted
3193eb6f0de0SAdrian Chadd  * on it.
3194eb6f0de0SAdrian Chadd  *
3195eb6f0de0SAdrian Chadd  * Since this is also called from upper layers as well as the driver,
3196eb6f0de0SAdrian Chadd  * it will get the TID lock.
3197eb6f0de0SAdrian Chadd  */
3198eb6f0de0SAdrian Chadd static void
3199eb6f0de0SAdrian Chadd ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
3200eb6f0de0SAdrian Chadd {
320188b3d483SAdrian Chadd 
3202375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3203eb6f0de0SAdrian Chadd 	tid->paused++;
3204eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: paused = %d\n",
3205eb6f0de0SAdrian Chadd 	    __func__, tid->paused);
3206eb6f0de0SAdrian Chadd }
3207eb6f0de0SAdrian Chadd 
3208eb6f0de0SAdrian Chadd /*
3209eb6f0de0SAdrian Chadd  * Unpause the current TID, and schedule it if needed.
3210eb6f0de0SAdrian Chadd  */
3211eb6f0de0SAdrian Chadd static void
3212eb6f0de0SAdrian Chadd ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
3213eb6f0de0SAdrian Chadd {
3214375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3215eb6f0de0SAdrian Chadd 
3216dff5bdf4SAdrian Chadd 	/*
3217dff5bdf4SAdrian Chadd 	 * There's some odd places where ath_tx_tid_resume() is called
3218dff5bdf4SAdrian Chadd 	 * when it shouldn't be; this works around that particular issue
3219dff5bdf4SAdrian Chadd 	 * until it's actually resolved.
3220dff5bdf4SAdrian Chadd 	 */
3221dff5bdf4SAdrian Chadd 	if (tid->paused == 0) {
3222dff5bdf4SAdrian Chadd 		device_printf(sc->sc_dev, "%s: %6D: paused=0?\n",
3223dff5bdf4SAdrian Chadd 		    __func__,
3224dff5bdf4SAdrian Chadd 		    tid->an->an_node.ni_macaddr,
3225dff5bdf4SAdrian Chadd 		    ":");
3226dff5bdf4SAdrian Chadd 	} else {
3227eb6f0de0SAdrian Chadd 		tid->paused--;
3228dff5bdf4SAdrian Chadd 	}
3229eb6f0de0SAdrian Chadd 
3230eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: unpaused = %d\n",
3231eb6f0de0SAdrian Chadd 	    __func__, tid->paused);
3232eb6f0de0SAdrian Chadd 
32330eb81626SAdrian Chadd 	if (tid->paused)
3234eb6f0de0SAdrian Chadd 		return;
32350eb81626SAdrian Chadd 
32360eb81626SAdrian Chadd 	/*
32370eb81626SAdrian Chadd 	 * Override the clrdmask configuration for the next frame
32380eb81626SAdrian Chadd 	 * from this TID, just to get the ball rolling.
32390eb81626SAdrian Chadd 	 */
32404f25ddbbSAdrian Chadd 	ath_tx_set_clrdmask(sc, tid->an);
32410eb81626SAdrian Chadd 
32420eb81626SAdrian Chadd 	if (tid->axq_depth == 0)
32430eb81626SAdrian Chadd 		return;
3244eb6f0de0SAdrian Chadd 
3245f1bc738eSAdrian Chadd 	/* XXX isfiltered shouldn't ever be 0 at this point */
3246f1bc738eSAdrian Chadd 	if (tid->isfiltered == 1) {
3247f1bc738eSAdrian Chadd 		device_printf(sc->sc_dev, "%s: filtered?!\n", __func__);
3248f1bc738eSAdrian Chadd 		return;
3249f1bc738eSAdrian Chadd 	}
3250f1bc738eSAdrian Chadd 
3251eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, tid);
325221bca442SAdrian Chadd 
325321bca442SAdrian Chadd 	/*
325421bca442SAdrian Chadd 	 * Queue the software TX scheduler.
325521bca442SAdrian Chadd 	 */
325621bca442SAdrian Chadd 	ath_tx_swq_kick(sc);
3257eb6f0de0SAdrian Chadd }
3258eb6f0de0SAdrian Chadd 
3259eb6f0de0SAdrian Chadd /*
3260f1bc738eSAdrian Chadd  * Add the given ath_buf to the TID filtered frame list.
3261f1bc738eSAdrian Chadd  * This requires the TID be filtered.
3262f1bc738eSAdrian Chadd  */
3263f1bc738eSAdrian Chadd static void
3264f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid,
3265f1bc738eSAdrian Chadd     struct ath_buf *bf)
3266f1bc738eSAdrian Chadd {
3267f1bc738eSAdrian Chadd 
3268375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3269375307d4SAdrian Chadd 
3270f1bc738eSAdrian Chadd 	if (! tid->isfiltered)
3271f1bc738eSAdrian Chadd 		device_printf(sc->sc_dev, "%s: not filtered?!\n", __func__);
3272f1bc738eSAdrian Chadd 
3273f1bc738eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf);
3274f1bc738eSAdrian Chadd 
3275f1bc738eSAdrian Chadd 	/* Set the retry bit and bump the retry counter */
3276f1bc738eSAdrian Chadd 	ath_tx_set_retry(sc, bf);
3277f1bc738eSAdrian Chadd 	sc->sc_stats.ast_tx_swfiltered++;
3278f1bc738eSAdrian Chadd 
327913aa9ee5SAdrian Chadd 	ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list);
3280f1bc738eSAdrian Chadd }
3281f1bc738eSAdrian Chadd 
3282f1bc738eSAdrian Chadd /*
3283f1bc738eSAdrian Chadd  * Handle a completed filtered frame from the given TID.
3284f1bc738eSAdrian Chadd  * This just enables/pauses the filtered frame state if required
3285f1bc738eSAdrian Chadd  * and appends the filtered frame to the filtered queue.
3286f1bc738eSAdrian Chadd  */
3287f1bc738eSAdrian Chadd static void
3288f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid,
3289f1bc738eSAdrian Chadd     struct ath_buf *bf)
3290f1bc738eSAdrian Chadd {
3291f1bc738eSAdrian Chadd 
3292375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3293f1bc738eSAdrian Chadd 
3294f1bc738eSAdrian Chadd 	if (! tid->isfiltered) {
3295f1bc738eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: filter transition\n",
3296f1bc738eSAdrian Chadd 		    __func__);
3297f1bc738eSAdrian Chadd 		tid->isfiltered = 1;
3298f1bc738eSAdrian Chadd 		ath_tx_tid_pause(sc, tid);
3299f1bc738eSAdrian Chadd 	}
3300f1bc738eSAdrian Chadd 
3301f1bc738eSAdrian Chadd 	/* Add the frame to the filter queue */
3302f1bc738eSAdrian Chadd 	ath_tx_tid_filt_addbuf(sc, tid, bf);
3303f1bc738eSAdrian Chadd }
3304f1bc738eSAdrian Chadd 
3305f1bc738eSAdrian Chadd /*
3306f1bc738eSAdrian Chadd  * Complete the filtered frame TX completion.
3307f1bc738eSAdrian Chadd  *
3308f1bc738eSAdrian Chadd  * If there are no more frames in the hardware queue, unpause/unfilter
3309f1bc738eSAdrian Chadd  * the TID if applicable.  Otherwise we will wait for a node PS transition
3310f1bc738eSAdrian Chadd  * to unfilter.
3311f1bc738eSAdrian Chadd  */
3312f1bc738eSAdrian Chadd static void
3313f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid)
3314f1bc738eSAdrian Chadd {
3315f1bc738eSAdrian Chadd 	struct ath_buf *bf;
3316f1bc738eSAdrian Chadd 
3317375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3318f1bc738eSAdrian Chadd 
3319f1bc738eSAdrian Chadd 	if (tid->hwq_depth != 0)
3320f1bc738eSAdrian Chadd 		return;
3321f1bc738eSAdrian Chadd 
3322f1bc738eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: hwq=0, transition back\n",
3323f1bc738eSAdrian Chadd 	    __func__);
3324f1bc738eSAdrian Chadd 	tid->isfiltered = 0;
33254f25ddbbSAdrian Chadd 	/* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */
33264f25ddbbSAdrian Chadd 	ath_tx_set_clrdmask(sc, tid->an);
3327f1bc738eSAdrian Chadd 
3328f1bc738eSAdrian Chadd 	/* XXX this is really quite inefficient */
332913aa9ee5SAdrian Chadd 	while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) {
333013aa9ee5SAdrian Chadd 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
33313e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3332f1bc738eSAdrian Chadd 	}
3333f1bc738eSAdrian Chadd 
3334f1bc738eSAdrian Chadd 	ath_tx_tid_resume(sc, tid);
3335f1bc738eSAdrian Chadd }
3336f1bc738eSAdrian Chadd 
3337f1bc738eSAdrian Chadd /*
3338f1bc738eSAdrian Chadd  * Called when a single (aggregate or otherwise) frame is completed.
3339f1bc738eSAdrian Chadd  *
3340f1bc738eSAdrian Chadd  * Returns 1 if the buffer could be added to the filtered list
3341f1bc738eSAdrian Chadd  * (cloned or otherwise), 0 if the buffer couldn't be added to the
3342f1bc738eSAdrian Chadd  * filtered list (failed clone; expired retry) and the caller should
3343f1bc738eSAdrian Chadd  * free it and handle it like a failure (eg by sending a BAR.)
3344f1bc738eSAdrian Chadd  */
3345f1bc738eSAdrian Chadd static int
3346f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid,
3347f1bc738eSAdrian Chadd     struct ath_buf *bf)
3348f1bc738eSAdrian Chadd {
3349f1bc738eSAdrian Chadd 	struct ath_buf *nbf;
3350f1bc738eSAdrian Chadd 	int retval;
3351f1bc738eSAdrian Chadd 
3352375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3353f1bc738eSAdrian Chadd 
3354f1bc738eSAdrian Chadd 	/*
3355f1bc738eSAdrian Chadd 	 * Don't allow a filtered frame to live forever.
3356f1bc738eSAdrian Chadd 	 */
3357f1bc738eSAdrian Chadd 	if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
33580eb81626SAdrian Chadd 		sc->sc_stats.ast_tx_swretrymax++;
3359f1bc738eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3360f1bc738eSAdrian Chadd 		    "%s: bf=%p, seqno=%d, exceeded retries\n",
3361f1bc738eSAdrian Chadd 		    __func__,
3362f1bc738eSAdrian Chadd 		    bf,
3363f1bc738eSAdrian Chadd 		    bf->bf_state.bfs_seqno);
3364f1bc738eSAdrian Chadd 		return (0);
3365f1bc738eSAdrian Chadd 	}
3366f1bc738eSAdrian Chadd 
3367f1bc738eSAdrian Chadd 	/*
3368f1bc738eSAdrian Chadd 	 * A busy buffer can't be added to the retry list.
3369f1bc738eSAdrian Chadd 	 * It needs to be cloned.
3370f1bc738eSAdrian Chadd 	 */
3371f1bc738eSAdrian Chadd 	if (bf->bf_flags & ATH_BUF_BUSY) {
3372f1bc738eSAdrian Chadd 		nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3373f1bc738eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3374f1bc738eSAdrian Chadd 		    "%s: busy buffer clone: %p -> %p\n",
3375f1bc738eSAdrian Chadd 		    __func__, bf, nbf);
3376f1bc738eSAdrian Chadd 	} else {
3377f1bc738eSAdrian Chadd 		nbf = bf;
3378f1bc738eSAdrian Chadd 	}
3379f1bc738eSAdrian Chadd 
3380f1bc738eSAdrian Chadd 	if (nbf == NULL) {
3381f1bc738eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3382f1bc738eSAdrian Chadd 		    "%s: busy buffer couldn't be cloned (%p)!\n",
3383f1bc738eSAdrian Chadd 		    __func__, bf);
3384f1bc738eSAdrian Chadd 		retval = 1;
3385f1bc738eSAdrian Chadd 	} else {
3386f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3387f1bc738eSAdrian Chadd 		retval = 0;
3388f1bc738eSAdrian Chadd 	}
3389f1bc738eSAdrian Chadd 	ath_tx_tid_filt_comp_complete(sc, tid);
3390f1bc738eSAdrian Chadd 
3391f1bc738eSAdrian Chadd 	return (retval);
3392f1bc738eSAdrian Chadd }
3393f1bc738eSAdrian Chadd 
3394f1bc738eSAdrian Chadd static void
3395f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid,
3396f1bc738eSAdrian Chadd     struct ath_buf *bf_first, ath_bufhead *bf_q)
3397f1bc738eSAdrian Chadd {
3398f1bc738eSAdrian Chadd 	struct ath_buf *bf, *bf_next, *nbf;
3399f1bc738eSAdrian Chadd 
3400375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3401f1bc738eSAdrian Chadd 
3402f1bc738eSAdrian Chadd 	bf = bf_first;
3403f1bc738eSAdrian Chadd 	while (bf) {
3404f1bc738eSAdrian Chadd 		bf_next = bf->bf_next;
3405f1bc738eSAdrian Chadd 		bf->bf_next = NULL;	/* Remove it from the aggr list */
3406f1bc738eSAdrian Chadd 
3407f1bc738eSAdrian Chadd 		/*
3408f1bc738eSAdrian Chadd 		 * Don't allow a filtered frame to live forever.
3409f1bc738eSAdrian Chadd 		 */
3410f1bc738eSAdrian Chadd 		if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
34110eb81626SAdrian Chadd 			sc->sc_stats.ast_tx_swretrymax++;
3412f1bc738eSAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3413f1bc738eSAdrian Chadd 			    "%s: bf=%p, seqno=%d, exceeded retries\n",
3414f1bc738eSAdrian Chadd 			    __func__,
3415f1bc738eSAdrian Chadd 			    bf,
3416f1bc738eSAdrian Chadd 			    bf->bf_state.bfs_seqno);
3417f1bc738eSAdrian Chadd 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3418f1bc738eSAdrian Chadd 			goto next;
3419f1bc738eSAdrian Chadd 		}
3420f1bc738eSAdrian Chadd 
3421f1bc738eSAdrian Chadd 		if (bf->bf_flags & ATH_BUF_BUSY) {
3422f1bc738eSAdrian Chadd 			nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3423f1bc738eSAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3424f1bc738eSAdrian Chadd 			    "%s: busy buffer cloned: %p -> %p",
3425f1bc738eSAdrian Chadd 			    __func__, bf, nbf);
3426f1bc738eSAdrian Chadd 		} else {
3427f1bc738eSAdrian Chadd 			nbf = bf;
3428f1bc738eSAdrian Chadd 		}
3429f1bc738eSAdrian Chadd 
3430f1bc738eSAdrian Chadd 		/*
3431f1bc738eSAdrian Chadd 		 * If the buffer couldn't be cloned, add it to bf_q;
3432f1bc738eSAdrian Chadd 		 * the caller will free the buffer(s) as required.
3433f1bc738eSAdrian Chadd 		 */
3434f1bc738eSAdrian Chadd 		if (nbf == NULL) {
3435f1bc738eSAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3436f1bc738eSAdrian Chadd 			    "%s: buffer couldn't be cloned! (%p)\n",
3437f1bc738eSAdrian Chadd 			    __func__, bf);
3438f1bc738eSAdrian Chadd 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3439f1bc738eSAdrian Chadd 		} else {
3440f1bc738eSAdrian Chadd 			ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3441f1bc738eSAdrian Chadd 		}
3442f1bc738eSAdrian Chadd next:
3443f1bc738eSAdrian Chadd 		bf = bf_next;
3444f1bc738eSAdrian Chadd 	}
3445f1bc738eSAdrian Chadd 
3446f1bc738eSAdrian Chadd 	ath_tx_tid_filt_comp_complete(sc, tid);
3447f1bc738eSAdrian Chadd }
3448f1bc738eSAdrian Chadd 
3449f1bc738eSAdrian Chadd /*
345088b3d483SAdrian Chadd  * Suspend the queue because we need to TX a BAR.
345188b3d483SAdrian Chadd  */
345288b3d483SAdrian Chadd static void
345388b3d483SAdrian Chadd ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
345488b3d483SAdrian Chadd {
3455375307d4SAdrian Chadd 
3456375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
345788b3d483SAdrian Chadd 
34580e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3459e60c4fc2SAdrian Chadd 	    "%s: tid=%p, bar_wait=%d, bar_tx=%d, called\n",
346088b3d483SAdrian Chadd 	    __func__,
3461e60c4fc2SAdrian Chadd 	    tid,
3462e60c4fc2SAdrian Chadd 	    tid->bar_wait,
3463e60c4fc2SAdrian Chadd 	    tid->bar_tx);
346488b3d483SAdrian Chadd 
346588b3d483SAdrian Chadd 	/* We shouldn't be called when bar_tx is 1 */
346688b3d483SAdrian Chadd 	if (tid->bar_tx) {
346788b3d483SAdrian Chadd 		device_printf(sc->sc_dev, "%s: bar_tx is 1?!\n",
346888b3d483SAdrian Chadd 		    __func__);
346988b3d483SAdrian Chadd 	}
347088b3d483SAdrian Chadd 
347188b3d483SAdrian Chadd 	/* If we've already been called, just be patient. */
347288b3d483SAdrian Chadd 	if (tid->bar_wait)
347388b3d483SAdrian Chadd 		return;
347488b3d483SAdrian Chadd 
347588b3d483SAdrian Chadd 	/* Wait! */
347688b3d483SAdrian Chadd 	tid->bar_wait = 1;
347788b3d483SAdrian Chadd 
347888b3d483SAdrian Chadd 	/* Only one pause, no matter how many frames fail */
347988b3d483SAdrian Chadd 	ath_tx_tid_pause(sc, tid);
348088b3d483SAdrian Chadd }
348188b3d483SAdrian Chadd 
348288b3d483SAdrian Chadd /*
348388b3d483SAdrian Chadd  * We've finished with BAR handling - either we succeeded or
348488b3d483SAdrian Chadd  * failed. Either way, unsuspend TX.
348588b3d483SAdrian Chadd  */
348688b3d483SAdrian Chadd static void
348788b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
348888b3d483SAdrian Chadd {
3489375307d4SAdrian Chadd 
3490375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
349188b3d483SAdrian Chadd 
34920e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
34939b48fb4bSAdrian Chadd 	    "%s: %6D: tid=%p, called\n",
349488b3d483SAdrian Chadd 	    __func__,
34959b48fb4bSAdrian Chadd 	    tid->an->an_node.ni_macaddr,
34969b48fb4bSAdrian Chadd 	    ":",
349788b3d483SAdrian Chadd 	    tid);
349888b3d483SAdrian Chadd 
349988b3d483SAdrian Chadd 	if (tid->bar_tx == 0 || tid->bar_wait == 0) {
35009b48fb4bSAdrian Chadd 		device_printf(sc->sc_dev,
35019b48fb4bSAdrian Chadd 		    "%s: %6D: bar_tx=%d, bar_wait=%d: ?\n",
35029b48fb4bSAdrian Chadd 		    __func__,
35039b48fb4bSAdrian Chadd 		    tid->an->an_node.ni_macaddr,
35049b48fb4bSAdrian Chadd 		    ":",
35059b48fb4bSAdrian Chadd 		    tid->bar_tx, tid->bar_wait);
350688b3d483SAdrian Chadd 	}
350788b3d483SAdrian Chadd 
350888b3d483SAdrian Chadd 	tid->bar_tx = tid->bar_wait = 0;
350988b3d483SAdrian Chadd 	ath_tx_tid_resume(sc, tid);
351088b3d483SAdrian Chadd }
351188b3d483SAdrian Chadd 
351288b3d483SAdrian Chadd /*
351388b3d483SAdrian Chadd  * Return whether we're ready to TX a BAR frame.
351488b3d483SAdrian Chadd  *
351588b3d483SAdrian Chadd  * Requires the TID lock be held.
351688b3d483SAdrian Chadd  */
351788b3d483SAdrian Chadd static int
351888b3d483SAdrian Chadd ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
351988b3d483SAdrian Chadd {
352088b3d483SAdrian Chadd 
3521375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
352288b3d483SAdrian Chadd 
352388b3d483SAdrian Chadd 	if (tid->bar_wait == 0 || tid->hwq_depth > 0)
352488b3d483SAdrian Chadd 		return (0);
352588b3d483SAdrian Chadd 
35269b48fb4bSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
35279b48fb4bSAdrian Chadd 	    "%s: %6D: tid=%p (%d), bar ready\n",
35289b48fb4bSAdrian Chadd 	    __func__,
35299b48fb4bSAdrian Chadd 	    tid->an->an_node.ni_macaddr,
35309b48fb4bSAdrian Chadd 	    ":",
35319b48fb4bSAdrian Chadd 	    tid, tid->tid);
35320e22ed0eSAdrian Chadd 
353388b3d483SAdrian Chadd 	return (1);
353488b3d483SAdrian Chadd }
353588b3d483SAdrian Chadd 
353688b3d483SAdrian Chadd /*
353788b3d483SAdrian Chadd  * Check whether the current TID is ready to have a BAR
353888b3d483SAdrian Chadd  * TXed and if so, do the TX.
353988b3d483SAdrian Chadd  *
354088b3d483SAdrian Chadd  * Since the TID/TXQ lock can't be held during a call to
354188b3d483SAdrian Chadd  * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
354288b3d483SAdrian Chadd  * sending the BAR and locking it again.
354388b3d483SAdrian Chadd  *
354488b3d483SAdrian Chadd  * Eventually, the code to send the BAR should be broken out
354588b3d483SAdrian Chadd  * from this routine so the lock doesn't have to be reacquired
354688b3d483SAdrian Chadd  * just to be immediately dropped by the caller.
354788b3d483SAdrian Chadd  */
354888b3d483SAdrian Chadd static void
354988b3d483SAdrian Chadd ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
355088b3d483SAdrian Chadd {
355188b3d483SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
355288b3d483SAdrian Chadd 
3553375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
355488b3d483SAdrian Chadd 
35550e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
35569b48fb4bSAdrian Chadd 	    "%s: %6D: tid=%p, called\n",
355788b3d483SAdrian Chadd 	    __func__,
35589b48fb4bSAdrian Chadd 	    tid->an->an_node.ni_macaddr,
35599b48fb4bSAdrian Chadd 	    ":",
356088b3d483SAdrian Chadd 	    tid);
356188b3d483SAdrian Chadd 
356288b3d483SAdrian Chadd 	tap = ath_tx_get_tx_tid(tid->an, tid->tid);
356388b3d483SAdrian Chadd 
356488b3d483SAdrian Chadd 	/*
356588b3d483SAdrian Chadd 	 * This is an error condition!
356688b3d483SAdrian Chadd 	 */
356788b3d483SAdrian Chadd 	if (tid->bar_wait == 0 || tid->bar_tx == 1) {
356888b3d483SAdrian Chadd 		device_printf(sc->sc_dev,
35699b48fb4bSAdrian Chadd 		    "%s: %6D: tid=%p, bar_tx=%d, bar_wait=%d: ?\n",
357088b3d483SAdrian Chadd 		    __func__,
35719b48fb4bSAdrian Chadd 		    tid->an->an_node.ni_macaddr,
35729b48fb4bSAdrian Chadd 		    ":",
357388b3d483SAdrian Chadd 		    tid,
357488b3d483SAdrian Chadd 		    tid->bar_tx,
357588b3d483SAdrian Chadd 		    tid->bar_wait);
357688b3d483SAdrian Chadd 		return;
357788b3d483SAdrian Chadd 	}
357888b3d483SAdrian Chadd 
357988b3d483SAdrian Chadd 	/* Don't do anything if we still have pending frames */
358088b3d483SAdrian Chadd 	if (tid->hwq_depth > 0) {
35810e22ed0eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
35829b48fb4bSAdrian Chadd 		    "%s: %6D: tid=%p, hwq_depth=%d, waiting\n",
358388b3d483SAdrian Chadd 		    __func__,
35849b48fb4bSAdrian Chadd 		    tid->an->an_node.ni_macaddr,
35859b48fb4bSAdrian Chadd 		    ":",
358688b3d483SAdrian Chadd 		    tid,
358788b3d483SAdrian Chadd 		    tid->hwq_depth);
358888b3d483SAdrian Chadd 		return;
358988b3d483SAdrian Chadd 	}
359088b3d483SAdrian Chadd 
359188b3d483SAdrian Chadd 	/* We're now about to TX */
359288b3d483SAdrian Chadd 	tid->bar_tx = 1;
359388b3d483SAdrian Chadd 
359488b3d483SAdrian Chadd 	/*
35954e81f27cSAdrian Chadd 	 * Override the clrdmask configuration for the next frame,
35964e81f27cSAdrian Chadd 	 * just to get the ball rolling.
35974e81f27cSAdrian Chadd 	 */
35984f25ddbbSAdrian Chadd 	ath_tx_set_clrdmask(sc, tid->an);
35994e81f27cSAdrian Chadd 
36004e81f27cSAdrian Chadd 	/*
360188b3d483SAdrian Chadd 	 * Calculate new BAW left edge, now that all frames have either
360288b3d483SAdrian Chadd 	 * succeeded or failed.
360388b3d483SAdrian Chadd 	 *
360488b3d483SAdrian Chadd 	 * XXX verify this is _actually_ the valid value to begin at!
360588b3d483SAdrian Chadd 	 */
36060e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
36079b48fb4bSAdrian Chadd 	    "%s: %6D: tid=%p, new BAW left edge=%d\n",
360888b3d483SAdrian Chadd 	    __func__,
36099b48fb4bSAdrian Chadd 	    tid->an->an_node.ni_macaddr,
36109b48fb4bSAdrian Chadd 	    ":",
361188b3d483SAdrian Chadd 	    tid,
361288b3d483SAdrian Chadd 	    tap->txa_start);
361388b3d483SAdrian Chadd 
361488b3d483SAdrian Chadd 	/* Try sending the BAR frame */
361588b3d483SAdrian Chadd 	/* We can't hold the lock here! */
361688b3d483SAdrian Chadd 
3617375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
361888b3d483SAdrian Chadd 	if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
361988b3d483SAdrian Chadd 		/* Success? Now we wait for notification that it's done */
3620375307d4SAdrian Chadd 		ATH_TX_LOCK(sc);
362188b3d483SAdrian Chadd 		return;
362288b3d483SAdrian Chadd 	}
362388b3d483SAdrian Chadd 
362488b3d483SAdrian Chadd 	/* Failure? For now, warn loudly and continue */
3625375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
36269b48fb4bSAdrian Chadd 	device_printf(sc->sc_dev,
36279b48fb4bSAdrian Chadd 	    "%s: %6D: tid=%p, failed to TX BAR, continue!\n",
36289b48fb4bSAdrian Chadd 	    __func__,
36299b48fb4bSAdrian Chadd 	    tid->an->an_node.ni_macaddr,
36309b48fb4bSAdrian Chadd 	    ":",
36319b48fb4bSAdrian Chadd 	    tid);
363288b3d483SAdrian Chadd 	ath_tx_tid_bar_unsuspend(sc, tid);
363388b3d483SAdrian Chadd }
363488b3d483SAdrian Chadd 
3635eb6f0de0SAdrian Chadd static void
3636f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an,
3637f1bc738eSAdrian Chadd     struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf)
3638eb6f0de0SAdrian Chadd {
3639eb6f0de0SAdrian Chadd 
3640375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3641eb6f0de0SAdrian Chadd 
3642eb6f0de0SAdrian Chadd 	/*
3643eb6f0de0SAdrian Chadd 	 * If the current TID is running AMPDU, update
3644eb6f0de0SAdrian Chadd 	 * the BAW.
3645eb6f0de0SAdrian Chadd 	 */
3646eb6f0de0SAdrian Chadd 	if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3647eb6f0de0SAdrian Chadd 	    bf->bf_state.bfs_dobaw) {
3648eb6f0de0SAdrian Chadd 		/*
3649eb6f0de0SAdrian Chadd 		 * Only remove the frame from the BAW if it's
3650eb6f0de0SAdrian Chadd 		 * been transmitted at least once; this means
3651eb6f0de0SAdrian Chadd 		 * the frame was in the BAW to begin with.
3652eb6f0de0SAdrian Chadd 		 */
3653eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_retries > 0) {
3654eb6f0de0SAdrian Chadd 			ath_tx_update_baw(sc, an, tid, bf);
3655eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
3656eb6f0de0SAdrian Chadd 		}
3657ce597531SAdrian Chadd #if 0
3658eb6f0de0SAdrian Chadd 		/*
3659eb6f0de0SAdrian Chadd 		 * This has become a non-fatal error now
3660eb6f0de0SAdrian Chadd 		 */
3661eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_addedbaw)
3662eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev,
3663eb6f0de0SAdrian Chadd 			    "%s: wasn't added: seqno %d\n",
3664eb6f0de0SAdrian Chadd 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
3665ce597531SAdrian Chadd #endif
3666eb6f0de0SAdrian Chadd 	}
3667b837332dSAdrian Chadd 
3668b837332dSAdrian Chadd 	/* Strip it out of an aggregate list if it was in one */
3669b837332dSAdrian Chadd 	bf->bf_next = NULL;
3670b837332dSAdrian Chadd 
3671b837332dSAdrian Chadd 	/* Insert on the free queue to be freed by the caller */
3672eb6f0de0SAdrian Chadd 	TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
3673eb6f0de0SAdrian Chadd }
3674eb6f0de0SAdrian Chadd 
3675f1bc738eSAdrian Chadd static void
3676f1bc738eSAdrian Chadd ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an,
367703682514SAdrian Chadd     const char *pfx, struct ath_tid *tid, struct ath_buf *bf)
3678f1bc738eSAdrian Chadd {
3679f1bc738eSAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
3680f1bc738eSAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
3681f1bc738eSAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3682f1bc738eSAdrian Chadd 
3683f1bc738eSAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
3684f1bc738eSAdrian Chadd 
3685f1bc738eSAdrian Chadd 	device_printf(sc->sc_dev,
368603682514SAdrian Chadd 	    "%s: %s: node %p: bf=%p: addbaw=%d, dobaw=%d, "
3687f1bc738eSAdrian Chadd 	    "seqno=%d, retry=%d\n",
368803682514SAdrian Chadd 	    __func__, pfx, ni, bf,
3689f1bc738eSAdrian Chadd 	    bf->bf_state.bfs_addedbaw,
3690f1bc738eSAdrian Chadd 	    bf->bf_state.bfs_dobaw,
3691f1bc738eSAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno),
3692f1bc738eSAdrian Chadd 	    bf->bf_state.bfs_retries);
3693f1bc738eSAdrian Chadd 	device_printf(sc->sc_dev,
369403682514SAdrian Chadd 	    "%s: node %p: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n",
36954e81f27cSAdrian Chadd 	        __func__, ni, bf,
369603682514SAdrian Chadd 	    txq->axq_qnum,
36974e81f27cSAdrian Chadd 	    txq->axq_depth,
36984e81f27cSAdrian Chadd 	    txq->axq_aggr_depth);
36994e81f27cSAdrian Chadd 
37004e81f27cSAdrian Chadd 	device_printf(sc->sc_dev,
3701f1bc738eSAdrian Chadd 	    "%s: node %p: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, isfiltered=%d\n",
3702f1bc738eSAdrian Chadd 	    __func__, ni, bf,
3703f1bc738eSAdrian Chadd 	    tid->axq_depth,
3704f1bc738eSAdrian Chadd 	    tid->hwq_depth,
3705f1bc738eSAdrian Chadd 	    tid->bar_wait,
3706f1bc738eSAdrian Chadd 	    tid->isfiltered);
3707f1bc738eSAdrian Chadd 	device_printf(sc->sc_dev,
37084e81f27cSAdrian Chadd 	    "%s: node %p: tid %d: "
37094e81f27cSAdrian Chadd 	    "sched=%d, paused=%d, "
37104e81f27cSAdrian Chadd 	    "incomp=%d, baw_head=%d, "
3711f1bc738eSAdrian Chadd 	    "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
37124e81f27cSAdrian Chadd 	     __func__, ni, tid->tid,
37134e81f27cSAdrian Chadd 	     tid->sched, tid->paused,
37144e81f27cSAdrian Chadd 	     tid->incomp, tid->baw_head,
3715f1bc738eSAdrian Chadd 	     tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
3716f1bc738eSAdrian Chadd 	     ni->ni_txseqs[tid->tid]);
3717f1bc738eSAdrian Chadd 
3718f1bc738eSAdrian Chadd 	/* XXX Dump the frame, see what it is? */
3719f1bc738eSAdrian Chadd 	ieee80211_dump_pkt(ni->ni_ic,
3720f1bc738eSAdrian Chadd 	    mtod(bf->bf_m, const uint8_t *),
3721f1bc738eSAdrian Chadd 	    bf->bf_m->m_len, 0, -1);
3722f1bc738eSAdrian Chadd }
3723f1bc738eSAdrian Chadd 
3724f1bc738eSAdrian Chadd /*
3725f1bc738eSAdrian Chadd  * Free any packets currently pending in the software TX queue.
3726f1bc738eSAdrian Chadd  *
3727f1bc738eSAdrian Chadd  * This will be called when a node is being deleted.
3728f1bc738eSAdrian Chadd  *
3729f1bc738eSAdrian Chadd  * It can also be called on an active node during an interface
3730f1bc738eSAdrian Chadd  * reset or state transition.
3731f1bc738eSAdrian Chadd  *
3732f1bc738eSAdrian Chadd  * (From Linux/reference):
3733f1bc738eSAdrian Chadd  *
3734f1bc738eSAdrian Chadd  * TODO: For frame(s) that are in the retry state, we will reuse the
3735f1bc738eSAdrian Chadd  * sequence number(s) without setting the retry bit. The
3736f1bc738eSAdrian Chadd  * alternative is to give up on these and BAR the receiver's window
3737f1bc738eSAdrian Chadd  * forward.
3738f1bc738eSAdrian Chadd  */
3739f1bc738eSAdrian Chadd static void
3740f1bc738eSAdrian Chadd ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
3741f1bc738eSAdrian Chadd     struct ath_tid *tid, ath_bufhead *bf_cq)
3742f1bc738eSAdrian Chadd {
3743f1bc738eSAdrian Chadd 	struct ath_buf *bf;
3744f1bc738eSAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3745f1bc738eSAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
3746f1bc738eSAdrian Chadd 	int t;
3747f1bc738eSAdrian Chadd 
3748f1bc738eSAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
3749f1bc738eSAdrian Chadd 
3750375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3751f1bc738eSAdrian Chadd 
3752f1bc738eSAdrian Chadd 	/* Walk the queue, free frames */
3753f1bc738eSAdrian Chadd 	t = 0;
3754f1bc738eSAdrian Chadd 	for (;;) {
37553e6cc97fSAdrian Chadd 		bf = ATH_TID_FIRST(tid);
3756f1bc738eSAdrian Chadd 		if (bf == NULL) {
3757f1bc738eSAdrian Chadd 			break;
3758f1bc738eSAdrian Chadd 		}
3759f1bc738eSAdrian Chadd 
3760f1bc738eSAdrian Chadd 		if (t == 0) {
376103682514SAdrian Chadd 			ath_tx_tid_drain_print(sc, an, "norm", tid, bf);
3762f1bc738eSAdrian Chadd 			t = 1;
3763f1bc738eSAdrian Chadd 		}
3764f1bc738eSAdrian Chadd 
37653e6cc97fSAdrian Chadd 		ATH_TID_REMOVE(tid, bf, bf_list);
3766f1bc738eSAdrian Chadd 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3767f1bc738eSAdrian Chadd 	}
3768f1bc738eSAdrian Chadd 
3769f1bc738eSAdrian Chadd 	/* And now, drain the filtered frame queue */
3770f1bc738eSAdrian Chadd 	t = 0;
3771f1bc738eSAdrian Chadd 	for (;;) {
377213aa9ee5SAdrian Chadd 		bf = ATH_TID_FILT_FIRST(tid);
3773f1bc738eSAdrian Chadd 		if (bf == NULL)
3774f1bc738eSAdrian Chadd 			break;
3775f1bc738eSAdrian Chadd 
3776f1bc738eSAdrian Chadd 		if (t == 0) {
377703682514SAdrian Chadd 			ath_tx_tid_drain_print(sc, an, "filt", tid, bf);
3778f1bc738eSAdrian Chadd 			t = 1;
3779f1bc738eSAdrian Chadd 		}
3780f1bc738eSAdrian Chadd 
378113aa9ee5SAdrian Chadd 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3782f1bc738eSAdrian Chadd 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3783f1bc738eSAdrian Chadd 	}
3784f1bc738eSAdrian Chadd 
3785eb6f0de0SAdrian Chadd 	/*
37864e81f27cSAdrian Chadd 	 * Override the clrdmask configuration for the next frame
37874e81f27cSAdrian Chadd 	 * in case there is some future transmission, just to get
37884e81f27cSAdrian Chadd 	 * the ball rolling.
37894e81f27cSAdrian Chadd 	 *
37904e81f27cSAdrian Chadd 	 * This won't hurt things if the TID is about to be freed.
37914e81f27cSAdrian Chadd 	 */
37924f25ddbbSAdrian Chadd 	ath_tx_set_clrdmask(sc, tid->an);
37934e81f27cSAdrian Chadd 
37944e81f27cSAdrian Chadd 	/*
3795eb6f0de0SAdrian Chadd 	 * Now that it's completed, grab the TID lock and update
3796eb6f0de0SAdrian Chadd 	 * the sequence number and BAW window.
3797eb6f0de0SAdrian Chadd 	 * Because sequence numbers have been assigned to frames
3798eb6f0de0SAdrian Chadd 	 * that haven't been sent yet, it's entirely possible
3799eb6f0de0SAdrian Chadd 	 * we'll be called with some pending frames that have not
3800eb6f0de0SAdrian Chadd 	 * been transmitted.
3801eb6f0de0SAdrian Chadd 	 *
3802eb6f0de0SAdrian Chadd 	 * The cleaner solution is to do the sequence number allocation
3803eb6f0de0SAdrian Chadd 	 * when the packet is first transmitted - and thus the "retries"
3804eb6f0de0SAdrian Chadd 	 * check above would be enough to update the BAW/seqno.
3805eb6f0de0SAdrian Chadd 	 */
3806eb6f0de0SAdrian Chadd 
3807eb6f0de0SAdrian Chadd 	/* But don't do it for non-QoS TIDs */
3808eb6f0de0SAdrian Chadd 	if (tap) {
38099b48fb4bSAdrian Chadd #if 1
3810eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
38119b48fb4bSAdrian Chadd 		    "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n",
38129b48fb4bSAdrian Chadd 		    __func__,
38139b48fb4bSAdrian Chadd 		    ni->ni_macaddr,
38149b48fb4bSAdrian Chadd 		    ":",
38159b48fb4bSAdrian Chadd 		    an,
38169b48fb4bSAdrian Chadd 		    tid->tid,
38179b48fb4bSAdrian Chadd 		    tap->txa_start);
3818eb6f0de0SAdrian Chadd #endif
3819eb6f0de0SAdrian Chadd 		ni->ni_txseqs[tid->tid] = tap->txa_start;
3820eb6f0de0SAdrian Chadd 		tid->baw_tail = tid->baw_head;
3821eb6f0de0SAdrian Chadd 	}
3822eb6f0de0SAdrian Chadd }
3823eb6f0de0SAdrian Chadd 
3824eb6f0de0SAdrian Chadd /*
382522780332SAdrian Chadd  * Reset the TID state.  This must be only called once the node has
382622780332SAdrian Chadd  * had its frames flushed from this TID, to ensure that no other
382722780332SAdrian Chadd  * pause / unpause logic can kick in.
382822780332SAdrian Chadd  */
382922780332SAdrian Chadd static void
383022780332SAdrian Chadd ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid)
383122780332SAdrian Chadd {
383222780332SAdrian Chadd 
383322780332SAdrian Chadd #if 0
383422780332SAdrian Chadd 	tid->bar_wait = tid->bar_tx = tid->isfiltered = 0;
383522780332SAdrian Chadd 	tid->paused = tid->sched = tid->addba_tx_pending = 0;
383622780332SAdrian Chadd 	tid->incomp = tid->cleanup_inprogress = 0;
383722780332SAdrian Chadd #endif
383822780332SAdrian Chadd 
383922780332SAdrian Chadd 	/*
384022780332SAdrian Chadd 	 * If we have a bar_wait set, we need to unpause the TID
384122780332SAdrian Chadd 	 * here.  Otherwise once cleanup has finished, the TID won't
384222780332SAdrian Chadd 	 * have the right paused counter.
384322780332SAdrian Chadd 	 *
384422780332SAdrian Chadd 	 * XXX I'm not going through resume here - I don't want the
384522780332SAdrian Chadd 	 * node to be rescheuled just yet.  This however should be
384622780332SAdrian Chadd 	 * methodized!
384722780332SAdrian Chadd 	 */
384822780332SAdrian Chadd 	if (tid->bar_wait) {
384922780332SAdrian Chadd 		if (tid->paused > 0) {
385022780332SAdrian Chadd 			tid->paused --;
385122780332SAdrian Chadd 		}
385222780332SAdrian Chadd 	}
385322780332SAdrian Chadd 
385422780332SAdrian Chadd 	/*
385522780332SAdrian Chadd 	 * XXX same with a currently filtered TID.
385622780332SAdrian Chadd 	 *
385722780332SAdrian Chadd 	 * Since this is being called during a flush, we assume that
385822780332SAdrian Chadd 	 * the filtered frame list is actually empty.
385922780332SAdrian Chadd 	 *
386022780332SAdrian Chadd 	 * XXX TODO: add in a check to ensure that the filtered queue
386122780332SAdrian Chadd 	 * depth is actually 0!
386222780332SAdrian Chadd 	 */
386322780332SAdrian Chadd 	if (tid->isfiltered) {
386422780332SAdrian Chadd 		if (tid->paused > 0) {
386522780332SAdrian Chadd 			tid->paused --;
386622780332SAdrian Chadd 		}
386722780332SAdrian Chadd 	}
386822780332SAdrian Chadd 
386922780332SAdrian Chadd 	/*
387022780332SAdrian Chadd 	 * Clear BAR, filtered frames, scheduled and ADDBA pending.
387122780332SAdrian Chadd 	 * The TID may be going through cleanup from the last association
387222780332SAdrian Chadd 	 * where things in the BAW are still in the hardware queue.
387322780332SAdrian Chadd 	 */
387422780332SAdrian Chadd 	tid->bar_wait = 0;
387522780332SAdrian Chadd 	tid->bar_tx = 0;
387622780332SAdrian Chadd 	tid->isfiltered = 0;
387722780332SAdrian Chadd 	tid->sched = 0;
387822780332SAdrian Chadd 	tid->addba_tx_pending = 0;
387922780332SAdrian Chadd 
388022780332SAdrian Chadd 	/*
388122780332SAdrian Chadd 	 * XXX TODO: it may just be enough to walk the HWQs and mark
388222780332SAdrian Chadd 	 * frames for that node as non-aggregate; or mark the ath_node
388322780332SAdrian Chadd 	 * with something that indicates that aggregation is no longer
388422780332SAdrian Chadd 	 * occuring.  Then we can just toss the BAW complaints and
388522780332SAdrian Chadd 	 * do a complete hard reset of state here - no pause, no
388622780332SAdrian Chadd 	 * complete counter, etc.
388722780332SAdrian Chadd 	 */
388822a3aee6SAdrian Chadd 
388922780332SAdrian Chadd }
389022780332SAdrian Chadd 
389122780332SAdrian Chadd /*
3892eb6f0de0SAdrian Chadd  * Flush all software queued packets for the given node.
3893eb6f0de0SAdrian Chadd  *
3894eb6f0de0SAdrian Chadd  * This occurs when a completion handler frees the last buffer
3895eb6f0de0SAdrian Chadd  * for a node, and the node is thus freed. This causes the node
3896eb6f0de0SAdrian Chadd  * to be cleaned up, which ends up calling ath_tx_node_flush.
3897eb6f0de0SAdrian Chadd  */
3898eb6f0de0SAdrian Chadd void
3899eb6f0de0SAdrian Chadd ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
3900eb6f0de0SAdrian Chadd {
3901eb6f0de0SAdrian Chadd 	int tid;
3902eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
3903eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
3904eb6f0de0SAdrian Chadd 
3905eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
3906eb6f0de0SAdrian Chadd 
390703682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p",
390803682514SAdrian Chadd 	    &an->an_node);
390903682514SAdrian Chadd 
3910375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
39119b48fb4bSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_NODE,
39129b48fb4bSAdrian Chadd 	    "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, "
391322a3aee6SAdrian Chadd 	    "swq_depth=%d, clrdmask=%d, leak_count=%d\n",
39149b48fb4bSAdrian Chadd 	    __func__,
39159b48fb4bSAdrian Chadd 	    an->an_node.ni_macaddr,
39169b48fb4bSAdrian Chadd 	    ":",
39179b48fb4bSAdrian Chadd 	    an->an_is_powersave,
39189b48fb4bSAdrian Chadd 	    an->an_stack_psq,
39199b48fb4bSAdrian Chadd 	    an->an_tim_set,
39209b48fb4bSAdrian Chadd 	    an->an_swq_depth,
392122a3aee6SAdrian Chadd 	    an->clrdmask,
392222a3aee6SAdrian Chadd 	    an->an_leak_count);
39239b48fb4bSAdrian Chadd 
3924eb6f0de0SAdrian Chadd 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
3925eb6f0de0SAdrian Chadd 		struct ath_tid *atid = &an->an_tid[tid];
3926eb6f0de0SAdrian Chadd 
3927eb6f0de0SAdrian Chadd 		/* Free packets */
3928eb6f0de0SAdrian Chadd 		ath_tx_tid_drain(sc, an, atid, &bf_cq);
392922a3aee6SAdrian Chadd 
393023f44d2bSAdrian Chadd 		/* Remove this tid from the list of active tids */
393123f44d2bSAdrian Chadd 		ath_tx_tid_unsched(sc, atid);
393222a3aee6SAdrian Chadd 
393322780332SAdrian Chadd 		/* Reset the per-TID pause, BAR, etc state */
393422780332SAdrian Chadd 		ath_tx_tid_reset(sc, atid);
3935eb6f0de0SAdrian Chadd 	}
393622a3aee6SAdrian Chadd 
393722a3aee6SAdrian Chadd 	/*
393822a3aee6SAdrian Chadd 	 * Clear global leak count
393922a3aee6SAdrian Chadd 	 */
394022a3aee6SAdrian Chadd 	an->an_leak_count = 0;
3941375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
3942eb6f0de0SAdrian Chadd 
3943eb6f0de0SAdrian Chadd 	/* Handle completed frames */
3944eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3945eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
3946eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
3947eb6f0de0SAdrian Chadd 	}
3948eb6f0de0SAdrian Chadd }
3949eb6f0de0SAdrian Chadd 
3950eb6f0de0SAdrian Chadd /*
3951eb6f0de0SAdrian Chadd  * Drain all the software TXQs currently with traffic queued.
3952eb6f0de0SAdrian Chadd  */
3953eb6f0de0SAdrian Chadd void
3954eb6f0de0SAdrian Chadd ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
3955eb6f0de0SAdrian Chadd {
3956eb6f0de0SAdrian Chadd 	struct ath_tid *tid;
3957eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
3958eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
3959eb6f0de0SAdrian Chadd 
3960eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
3961375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
3962eb6f0de0SAdrian Chadd 
3963eb6f0de0SAdrian Chadd 	/*
3964eb6f0de0SAdrian Chadd 	 * Iterate over all active tids for the given txq,
3965eb6f0de0SAdrian Chadd 	 * flushing and unsched'ing them
3966eb6f0de0SAdrian Chadd 	 */
3967eb6f0de0SAdrian Chadd 	while (! TAILQ_EMPTY(&txq->axq_tidq)) {
3968eb6f0de0SAdrian Chadd 		tid = TAILQ_FIRST(&txq->axq_tidq);
3969eb6f0de0SAdrian Chadd 		ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
3970eb6f0de0SAdrian Chadd 		ath_tx_tid_unsched(sc, tid);
3971eb6f0de0SAdrian Chadd 	}
3972eb6f0de0SAdrian Chadd 
3973375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
3974eb6f0de0SAdrian Chadd 
3975eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3976eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
3977eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
3978eb6f0de0SAdrian Chadd 	}
3979eb6f0de0SAdrian Chadd }
3980eb6f0de0SAdrian Chadd 
3981eb6f0de0SAdrian Chadd /*
3982eb6f0de0SAdrian Chadd  * Handle completion of non-aggregate session frames.
39830c54de88SAdrian Chadd  *
39840c54de88SAdrian Chadd  * This (currently) doesn't implement software retransmission of
39850c54de88SAdrian Chadd  * non-aggregate frames!
39860c54de88SAdrian Chadd  *
39870c54de88SAdrian Chadd  * Software retransmission of non-aggregate frames needs to obey
39880c54de88SAdrian Chadd  * the strict sequence number ordering, and drop any frames that
39890c54de88SAdrian Chadd  * will fail this.
39900c54de88SAdrian Chadd  *
39910c54de88SAdrian Chadd  * For now, filtered frames and frame transmission will cause
39920c54de88SAdrian Chadd  * all kinds of issues.  So we don't support them.
39930c54de88SAdrian Chadd  *
39940c54de88SAdrian Chadd  * So anyone queuing frames via ath_tx_normal_xmit() or
39950c54de88SAdrian Chadd  * ath_tx_hw_queue_norm() must override and set CLRDMASK.
3996eb6f0de0SAdrian Chadd  */
3997eb6f0de0SAdrian Chadd void
3998eb6f0de0SAdrian Chadd ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
3999eb6f0de0SAdrian Chadd {
4000eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
4001eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4002eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
4003eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
4004eb6f0de0SAdrian Chadd 	struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
4005eb6f0de0SAdrian Chadd 
4006eb6f0de0SAdrian Chadd 	/* The TID state is protected behind the TXQ lock */
4007375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4008eb6f0de0SAdrian Chadd 
4009eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
4010eb6f0de0SAdrian Chadd 	    __func__, bf, fail, atid->hwq_depth - 1);
4011eb6f0de0SAdrian Chadd 
4012eb6f0de0SAdrian Chadd 	atid->hwq_depth--;
4013f1bc738eSAdrian Chadd 
40140c54de88SAdrian Chadd #if 0
40150c54de88SAdrian Chadd 	/*
40160c54de88SAdrian Chadd 	 * If the frame was filtered, stick it on the filter frame
40170c54de88SAdrian Chadd 	 * queue and complain about it.  It shouldn't happen!
40180c54de88SAdrian Chadd 	 */
40190c54de88SAdrian Chadd 	if ((ts->ts_status & HAL_TXERR_FILT) ||
40200c54de88SAdrian Chadd 	    (ts->ts_status != 0 && atid->isfiltered)) {
40210c54de88SAdrian Chadd 		device_printf(sc->sc_dev,
40220c54de88SAdrian Chadd 		    "%s: isfiltered=%d, ts_status=%d: huh?\n",
40230c54de88SAdrian Chadd 		    __func__,
40240c54de88SAdrian Chadd 		    atid->isfiltered,
40250c54de88SAdrian Chadd 		    ts->ts_status);
40260c54de88SAdrian Chadd 		ath_tx_tid_filt_comp_buf(sc, atid, bf);
40270c54de88SAdrian Chadd 	}
40280c54de88SAdrian Chadd #endif
4029f1bc738eSAdrian Chadd 	if (atid->isfiltered)
40300c54de88SAdrian Chadd 		device_printf(sc->sc_dev, "%s: filtered?!\n", __func__);
4031eb6f0de0SAdrian Chadd 	if (atid->hwq_depth < 0)
4032eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
4033eb6f0de0SAdrian Chadd 		    __func__, atid->hwq_depth);
4034f1bc738eSAdrian Chadd 
4035f1bc738eSAdrian Chadd 	/*
4036f1bc738eSAdrian Chadd 	 * If the queue is filtered, potentially mark it as complete
4037f1bc738eSAdrian Chadd 	 * and reschedule it as needed.
4038f1bc738eSAdrian Chadd 	 *
4039f1bc738eSAdrian Chadd 	 * This is required as there may be a subsequent TX descriptor
4040f1bc738eSAdrian Chadd 	 * for this end-node that has CLRDMASK set, so it's quite possible
4041f1bc738eSAdrian Chadd 	 * that a filtered frame will be followed by a non-filtered
4042f1bc738eSAdrian Chadd 	 * (complete or otherwise) frame.
4043f1bc738eSAdrian Chadd 	 *
4044f1bc738eSAdrian Chadd 	 * XXX should we do this before we complete the frame?
4045f1bc738eSAdrian Chadd 	 */
4046f1bc738eSAdrian Chadd 	if (atid->isfiltered)
4047f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
4048375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
4049eb6f0de0SAdrian Chadd 
4050eb6f0de0SAdrian Chadd 	/*
4051eb6f0de0SAdrian Chadd 	 * punt to rate control if we're not being cleaned up
4052eb6f0de0SAdrian Chadd 	 * during a hw queue drain and the frame wanted an ACK.
4053eb6f0de0SAdrian Chadd 	 */
4054875a9451SAdrian Chadd 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4055eb6f0de0SAdrian Chadd 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4056eb6f0de0SAdrian Chadd 		    ts, bf->bf_state.bfs_pktlen,
4057eb6f0de0SAdrian Chadd 		    1, (ts->ts_status == 0) ? 0 : 1);
4058eb6f0de0SAdrian Chadd 
4059eb6f0de0SAdrian Chadd 	ath_tx_default_comp(sc, bf, fail);
4060eb6f0de0SAdrian Chadd }
4061eb6f0de0SAdrian Chadd 
4062eb6f0de0SAdrian Chadd /*
4063eb6f0de0SAdrian Chadd  * Handle cleanup of aggregate session packets that aren't
4064eb6f0de0SAdrian Chadd  * an A-MPDU.
4065eb6f0de0SAdrian Chadd  *
4066eb6f0de0SAdrian Chadd  * There's no need to update the BAW here - the session is being
4067eb6f0de0SAdrian Chadd  * torn down.
4068eb6f0de0SAdrian Chadd  */
4069eb6f0de0SAdrian Chadd static void
4070eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4071eb6f0de0SAdrian Chadd {
4072eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
4073eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4074eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
4075eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
4076eb6f0de0SAdrian Chadd 
4077eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
4078eb6f0de0SAdrian Chadd 	    __func__, tid, atid->incomp);
4079eb6f0de0SAdrian Chadd 
4080375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4081eb6f0de0SAdrian Chadd 	atid->incomp--;
4082eb6f0de0SAdrian Chadd 	if (atid->incomp == 0) {
4083eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4084eb6f0de0SAdrian Chadd 		    "%s: TID %d: cleaned up! resume!\n",
4085eb6f0de0SAdrian Chadd 		    __func__, tid);
4086eb6f0de0SAdrian Chadd 		atid->cleanup_inprogress = 0;
4087eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
4088eb6f0de0SAdrian Chadd 	}
4089375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
4090eb6f0de0SAdrian Chadd 
4091eb6f0de0SAdrian Chadd 	ath_tx_default_comp(sc, bf, 0);
4092eb6f0de0SAdrian Chadd }
4093eb6f0de0SAdrian Chadd 
4094eb6f0de0SAdrian Chadd /*
4095eb6f0de0SAdrian Chadd  * Performs transmit side cleanup when TID changes from aggregated to
4096eb6f0de0SAdrian Chadd  * unaggregated.
4097eb6f0de0SAdrian Chadd  *
4098eb6f0de0SAdrian Chadd  * - Discard all retry frames from the s/w queue.
4099eb6f0de0SAdrian Chadd  * - Fix the tx completion function for all buffers in s/w queue.
4100eb6f0de0SAdrian Chadd  * - Count the number of unacked frames, and let transmit completion
4101eb6f0de0SAdrian Chadd  *   handle it later.
4102eb6f0de0SAdrian Chadd  *
4103eb6f0de0SAdrian Chadd  * The caller is responsible for pausing the TID.
4104eb6f0de0SAdrian Chadd  */
4105eb6f0de0SAdrian Chadd static void
410622780332SAdrian Chadd ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid,
410722780332SAdrian Chadd     ath_bufhead *bf_cq)
4108eb6f0de0SAdrian Chadd {
4109eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
4110eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
4111eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_next;
411222780332SAdrian Chadd 
411322780332SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
4114eb6f0de0SAdrian Chadd 
4115d3a6425bSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4116eb6f0de0SAdrian Chadd 	    "%s: TID %d: called\n", __func__, tid);
4117eb6f0de0SAdrian Chadd 
4118eb6f0de0SAdrian Chadd 	/*
4119f1bc738eSAdrian Chadd 	 * Move the filtered frames to the TX queue, before
4120f1bc738eSAdrian Chadd 	 * we run off and discard/process things.
4121f1bc738eSAdrian Chadd 	 */
4122f1bc738eSAdrian Chadd 	/* XXX this is really quite inefficient */
412313aa9ee5SAdrian Chadd 	while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) {
412413aa9ee5SAdrian Chadd 		ATH_TID_FILT_REMOVE(atid, bf, bf_list);
41253e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4126f1bc738eSAdrian Chadd 	}
4127f1bc738eSAdrian Chadd 
4128f1bc738eSAdrian Chadd 	/*
4129eb6f0de0SAdrian Chadd 	 * Update the frames in the software TX queue:
4130eb6f0de0SAdrian Chadd 	 *
4131eb6f0de0SAdrian Chadd 	 * + Discard retry frames in the queue
4132eb6f0de0SAdrian Chadd 	 * + Fix the completion function to be non-aggregate
4133eb6f0de0SAdrian Chadd 	 */
41343e6cc97fSAdrian Chadd 	bf = ATH_TID_FIRST(atid);
4135eb6f0de0SAdrian Chadd 	while (bf) {
4136eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_isretried) {
4137eb6f0de0SAdrian Chadd 			bf_next = TAILQ_NEXT(bf, bf_list);
41383e6cc97fSAdrian Chadd 			ATH_TID_REMOVE(atid, bf, bf_list);
4139eb6f0de0SAdrian Chadd 			if (bf->bf_state.bfs_dobaw) {
4140eb6f0de0SAdrian Chadd 				ath_tx_update_baw(sc, an, atid, bf);
4141eb6f0de0SAdrian Chadd 				if (! bf->bf_state.bfs_addedbaw)
4142eb6f0de0SAdrian Chadd 					device_printf(sc->sc_dev,
4143eb6f0de0SAdrian Chadd 					    "%s: wasn't added: seqno %d\n",
4144d4365d16SAdrian Chadd 					    __func__,
4145d4365d16SAdrian Chadd 					    SEQNO(bf->bf_state.bfs_seqno));
4146eb6f0de0SAdrian Chadd 			}
4147eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
4148eb6f0de0SAdrian Chadd 			/*
4149eb6f0de0SAdrian Chadd 			 * Call the default completion handler with "fail" just
4150eb6f0de0SAdrian Chadd 			 * so upper levels are suitably notified about this.
4151eb6f0de0SAdrian Chadd 			 */
415222780332SAdrian Chadd 			TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
4153eb6f0de0SAdrian Chadd 			bf = bf_next;
4154eb6f0de0SAdrian Chadd 			continue;
4155eb6f0de0SAdrian Chadd 		}
4156eb6f0de0SAdrian Chadd 		/* Give these the default completion handler */
4157eb6f0de0SAdrian Chadd 		bf->bf_comp = ath_tx_normal_comp;
4158eb6f0de0SAdrian Chadd 		bf = TAILQ_NEXT(bf, bf_list);
4159eb6f0de0SAdrian Chadd 	}
4160eb6f0de0SAdrian Chadd 
4161eb6f0de0SAdrian Chadd 	/* The caller is required to pause the TID */
4162eb6f0de0SAdrian Chadd #if 0
4163eb6f0de0SAdrian Chadd 	/* Pause the TID */
4164eb6f0de0SAdrian Chadd 	ath_tx_tid_pause(sc, atid);
4165eb6f0de0SAdrian Chadd #endif
4166eb6f0de0SAdrian Chadd 
4167eb6f0de0SAdrian Chadd 	/*
4168eb6f0de0SAdrian Chadd 	 * Calculate what hardware-queued frames exist based
4169eb6f0de0SAdrian Chadd 	 * on the current BAW size. Ie, what frames have been
4170eb6f0de0SAdrian Chadd 	 * added to the TX hardware queue for this TID but
4171eb6f0de0SAdrian Chadd 	 * not yet ACKed.
4172eb6f0de0SAdrian Chadd 	 */
4173eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
4174eb6f0de0SAdrian Chadd 	/* Need the lock - fiddling with BAW */
4175eb6f0de0SAdrian Chadd 	while (atid->baw_head != atid->baw_tail) {
4176eb6f0de0SAdrian Chadd 		if (atid->tx_buf[atid->baw_head]) {
4177eb6f0de0SAdrian Chadd 			atid->incomp++;
4178eb6f0de0SAdrian Chadd 			atid->cleanup_inprogress = 1;
4179eb6f0de0SAdrian Chadd 			atid->tx_buf[atid->baw_head] = NULL;
4180eb6f0de0SAdrian Chadd 		}
4181eb6f0de0SAdrian Chadd 		INCR(atid->baw_head, ATH_TID_MAX_BUFS);
4182eb6f0de0SAdrian Chadd 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
4183eb6f0de0SAdrian Chadd 	}
4184eb6f0de0SAdrian Chadd 
4185eb6f0de0SAdrian Chadd 	/*
4186eb6f0de0SAdrian Chadd 	 * If cleanup is required, defer TID scheduling
4187eb6f0de0SAdrian Chadd 	 * until all the HW queued packets have been
4188eb6f0de0SAdrian Chadd 	 * sent.
4189eb6f0de0SAdrian Chadd 	 */
4190eb6f0de0SAdrian Chadd 	if (! atid->cleanup_inprogress)
4191eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
4192eb6f0de0SAdrian Chadd 
4193eb6f0de0SAdrian Chadd 	if (atid->cleanup_inprogress)
4194eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4195eb6f0de0SAdrian Chadd 		    "%s: TID %d: cleanup needed: %d packets\n",
4196eb6f0de0SAdrian Chadd 		    __func__, tid, atid->incomp);
4197eb6f0de0SAdrian Chadd 
419822780332SAdrian Chadd 	/* Owner now must free completed frames */
4199eb6f0de0SAdrian Chadd }
4200eb6f0de0SAdrian Chadd 
4201eb6f0de0SAdrian Chadd static struct ath_buf *
420238962489SAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
420338962489SAdrian Chadd     struct ath_tid *tid, struct ath_buf *bf)
4204eb6f0de0SAdrian Chadd {
4205eb6f0de0SAdrian Chadd 	struct ath_buf *nbf;
4206eb6f0de0SAdrian Chadd 	int error;
4207eb6f0de0SAdrian Chadd 
42083f3a5dbdSAdrian Chadd 	/*
42093f3a5dbdSAdrian Chadd 	 * Clone the buffer.  This will handle the dma unmap and
42103f3a5dbdSAdrian Chadd 	 * copy the node reference to the new buffer.  If this
42113f3a5dbdSAdrian Chadd 	 * works out, 'bf' will have no DMA mapping, no mbuf
42123f3a5dbdSAdrian Chadd 	 * pointer and no node reference.
42133f3a5dbdSAdrian Chadd 	 */
4214eb6f0de0SAdrian Chadd 	nbf = ath_buf_clone(sc, bf);
4215eb6f0de0SAdrian Chadd 
4216eb6f0de0SAdrian Chadd #if 0
4217eb6f0de0SAdrian Chadd 	device_printf(sc->sc_dev, "%s: ATH_BUF_BUSY; cloning\n",
4218eb6f0de0SAdrian Chadd 	    __func__);
4219eb6f0de0SAdrian Chadd #endif
4220eb6f0de0SAdrian Chadd 
4221eb6f0de0SAdrian Chadd 	if (nbf == NULL) {
4222eb6f0de0SAdrian Chadd 		/* Failed to clone */
4223eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
4224eb6f0de0SAdrian Chadd 		    "%s: failed to clone a busy buffer\n",
4225eb6f0de0SAdrian Chadd 		    __func__);
4226eb6f0de0SAdrian Chadd 		return NULL;
4227eb6f0de0SAdrian Chadd 	}
4228eb6f0de0SAdrian Chadd 
4229eb6f0de0SAdrian Chadd 	/* Setup the dma for the new buffer */
4230eb6f0de0SAdrian Chadd 	error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
4231eb6f0de0SAdrian Chadd 	if (error != 0) {
4232eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
4233eb6f0de0SAdrian Chadd 		    "%s: failed to setup dma for clone\n",
4234eb6f0de0SAdrian Chadd 		    __func__);
4235eb6f0de0SAdrian Chadd 		/*
4236eb6f0de0SAdrian Chadd 		 * Put this at the head of the list, not tail;
4237eb6f0de0SAdrian Chadd 		 * that way it doesn't interfere with the
4238eb6f0de0SAdrian Chadd 		 * busy buffer logic (which uses the tail of
4239eb6f0de0SAdrian Chadd 		 * the list.)
4240eb6f0de0SAdrian Chadd 		 */
4241eb6f0de0SAdrian Chadd 		ATH_TXBUF_LOCK(sc);
424232c387f7SAdrian Chadd 		ath_returnbuf_head(sc, nbf);
4243eb6f0de0SAdrian Chadd 		ATH_TXBUF_UNLOCK(sc);
4244eb6f0de0SAdrian Chadd 		return NULL;
4245eb6f0de0SAdrian Chadd 	}
4246eb6f0de0SAdrian Chadd 
424738962489SAdrian Chadd 	/* Update BAW if required, before we free the original buf */
424838962489SAdrian Chadd 	if (bf->bf_state.bfs_dobaw)
424938962489SAdrian Chadd 		ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
425038962489SAdrian Chadd 
42513f3a5dbdSAdrian Chadd 	/* Free original buffer; return new buffer */
4252eb6f0de0SAdrian Chadd 	ath_freebuf(sc, bf);
4253f1bc738eSAdrian Chadd 
4254eb6f0de0SAdrian Chadd 	return nbf;
4255eb6f0de0SAdrian Chadd }
4256eb6f0de0SAdrian Chadd 
4257eb6f0de0SAdrian Chadd /*
4258eb6f0de0SAdrian Chadd  * Handle retrying an unaggregate frame in an aggregate
4259eb6f0de0SAdrian Chadd  * session.
4260eb6f0de0SAdrian Chadd  *
4261eb6f0de0SAdrian Chadd  * If too many retries occur, pause the TID, wait for
4262eb6f0de0SAdrian Chadd  * any further retransmits (as there's no reason why
4263eb6f0de0SAdrian Chadd  * non-aggregate frames in an aggregate session are
4264eb6f0de0SAdrian Chadd  * transmitted in-order; they just have to be in-BAW)
4265eb6f0de0SAdrian Chadd  * and then queue a BAR.
4266eb6f0de0SAdrian Chadd  */
4267eb6f0de0SAdrian Chadd static void
4268eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4269eb6f0de0SAdrian Chadd {
4270eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
4271eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4272eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
4273eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
4274eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
4275eb6f0de0SAdrian Chadd 
4276375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4277eb6f0de0SAdrian Chadd 
4278eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
4279eb6f0de0SAdrian Chadd 
4280eb6f0de0SAdrian Chadd 	/*
4281eb6f0de0SAdrian Chadd 	 * If the buffer is marked as busy, we can't directly
4282eb6f0de0SAdrian Chadd 	 * reuse it. Instead, try to clone the buffer.
4283eb6f0de0SAdrian Chadd 	 * If the clone is successful, recycle the old buffer.
4284eb6f0de0SAdrian Chadd 	 * If the clone is unsuccessful, set bfs_retries to max
4285eb6f0de0SAdrian Chadd 	 * to force the next bit of code to free the buffer
4286eb6f0de0SAdrian Chadd 	 * for us.
4287eb6f0de0SAdrian Chadd 	 */
4288eb6f0de0SAdrian Chadd 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4289eb6f0de0SAdrian Chadd 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4290eb6f0de0SAdrian Chadd 		struct ath_buf *nbf;
429138962489SAdrian Chadd 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4292eb6f0de0SAdrian Chadd 		if (nbf)
4293eb6f0de0SAdrian Chadd 			/* bf has been freed at this point */
4294eb6f0de0SAdrian Chadd 			bf = nbf;
4295eb6f0de0SAdrian Chadd 		else
4296eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4297eb6f0de0SAdrian Chadd 	}
4298eb6f0de0SAdrian Chadd 
4299eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4300eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4301eb6f0de0SAdrian Chadd 		    "%s: exceeded retries; seqno %d\n",
4302eb6f0de0SAdrian Chadd 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4303eb6f0de0SAdrian Chadd 		sc->sc_stats.ast_tx_swretrymax++;
4304eb6f0de0SAdrian Chadd 
4305eb6f0de0SAdrian Chadd 		/* Update BAW anyway */
4306eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_dobaw) {
4307eb6f0de0SAdrian Chadd 			ath_tx_update_baw(sc, an, atid, bf);
4308eb6f0de0SAdrian Chadd 			if (! bf->bf_state.bfs_addedbaw)
4309eb6f0de0SAdrian Chadd 				device_printf(sc->sc_dev,
4310eb6f0de0SAdrian Chadd 				    "%s: wasn't added: seqno %d\n",
4311eb6f0de0SAdrian Chadd 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4312eb6f0de0SAdrian Chadd 		}
4313eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_dobaw = 0;
4314eb6f0de0SAdrian Chadd 
431588b3d483SAdrian Chadd 		/* Suspend the TX queue and get ready to send the BAR */
431688b3d483SAdrian Chadd 		ath_tx_tid_bar_suspend(sc, atid);
431788b3d483SAdrian Chadd 
431888b3d483SAdrian Chadd 		/* Send the BAR if there are no other frames waiting */
431988b3d483SAdrian Chadd 		if (ath_tx_tid_bar_tx_ready(sc, atid))
432088b3d483SAdrian Chadd 			ath_tx_tid_bar_tx(sc, atid);
432188b3d483SAdrian Chadd 
4322375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4323eb6f0de0SAdrian Chadd 
4324eb6f0de0SAdrian Chadd 		/* Free buffer, bf is free after this call */
4325eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
4326eb6f0de0SAdrian Chadd 		return;
4327eb6f0de0SAdrian Chadd 	}
4328eb6f0de0SAdrian Chadd 
4329eb6f0de0SAdrian Chadd 	/*
4330eb6f0de0SAdrian Chadd 	 * This increments the retry counter as well as
4331eb6f0de0SAdrian Chadd 	 * sets the retry flag in the ath_buf and packet
4332eb6f0de0SAdrian Chadd 	 * body.
4333eb6f0de0SAdrian Chadd 	 */
4334eb6f0de0SAdrian Chadd 	ath_tx_set_retry(sc, bf);
4335f1bc738eSAdrian Chadd 	sc->sc_stats.ast_tx_swretries++;
4336eb6f0de0SAdrian Chadd 
4337eb6f0de0SAdrian Chadd 	/*
4338eb6f0de0SAdrian Chadd 	 * Insert this at the head of the queue, so it's
4339eb6f0de0SAdrian Chadd 	 * retried before any current/subsequent frames.
4340eb6f0de0SAdrian Chadd 	 */
43413e6cc97fSAdrian Chadd 	ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4342eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, atid);
434388b3d483SAdrian Chadd 	/* Send the BAR if there are no other frames waiting */
434488b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, atid))
434588b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, atid);
4346eb6f0de0SAdrian Chadd 
4347375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
4348eb6f0de0SAdrian Chadd }
4349eb6f0de0SAdrian Chadd 
4350eb6f0de0SAdrian Chadd /*
4351eb6f0de0SAdrian Chadd  * Common code for aggregate excessive retry/subframe retry.
4352eb6f0de0SAdrian Chadd  * If retrying, queues buffers to bf_q. If not, frees the
4353eb6f0de0SAdrian Chadd  * buffers.
4354eb6f0de0SAdrian Chadd  *
4355eb6f0de0SAdrian Chadd  * XXX should unify this with ath_tx_aggr_retry_unaggr()
4356eb6f0de0SAdrian Chadd  */
4357eb6f0de0SAdrian Chadd static int
4358eb6f0de0SAdrian Chadd ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
4359eb6f0de0SAdrian Chadd     ath_bufhead *bf_q)
4360eb6f0de0SAdrian Chadd {
4361eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
4362eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4363eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
4364eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
4365eb6f0de0SAdrian Chadd 
4366375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
4367eb6f0de0SAdrian Chadd 
436821840808SAdrian Chadd 	/* XXX clr11naggr should be done for all subframes */
4369eb6f0de0SAdrian Chadd 	ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4370eb6f0de0SAdrian Chadd 	ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
4371f1bc738eSAdrian Chadd 
4372eb6f0de0SAdrian Chadd 	/* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
4373eb6f0de0SAdrian Chadd 
4374eb6f0de0SAdrian Chadd 	/*
4375eb6f0de0SAdrian Chadd 	 * If the buffer is marked as busy, we can't directly
4376eb6f0de0SAdrian Chadd 	 * reuse it. Instead, try to clone the buffer.
4377eb6f0de0SAdrian Chadd 	 * If the clone is successful, recycle the old buffer.
4378eb6f0de0SAdrian Chadd 	 * If the clone is unsuccessful, set bfs_retries to max
4379eb6f0de0SAdrian Chadd 	 * to force the next bit of code to free the buffer
4380eb6f0de0SAdrian Chadd 	 * for us.
4381eb6f0de0SAdrian Chadd 	 */
4382eb6f0de0SAdrian Chadd 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4383eb6f0de0SAdrian Chadd 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4384eb6f0de0SAdrian Chadd 		struct ath_buf *nbf;
438538962489SAdrian Chadd 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4386eb6f0de0SAdrian Chadd 		if (nbf)
4387eb6f0de0SAdrian Chadd 			/* bf has been freed at this point */
4388eb6f0de0SAdrian Chadd 			bf = nbf;
4389eb6f0de0SAdrian Chadd 		else
4390eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4391eb6f0de0SAdrian Chadd 	}
4392eb6f0de0SAdrian Chadd 
4393eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4394eb6f0de0SAdrian Chadd 		sc->sc_stats.ast_tx_swretrymax++;
4395eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4396eb6f0de0SAdrian Chadd 		    "%s: max retries: seqno %d\n",
4397eb6f0de0SAdrian Chadd 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4398eb6f0de0SAdrian Chadd 		ath_tx_update_baw(sc, an, atid, bf);
4399eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_addedbaw)
4400eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev,
4401eb6f0de0SAdrian Chadd 			    "%s: wasn't added: seqno %d\n",
4402eb6f0de0SAdrian Chadd 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4403eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_dobaw = 0;
4404eb6f0de0SAdrian Chadd 		return 1;
4405eb6f0de0SAdrian Chadd 	}
4406eb6f0de0SAdrian Chadd 
4407eb6f0de0SAdrian Chadd 	ath_tx_set_retry(sc, bf);
4408f1bc738eSAdrian Chadd 	sc->sc_stats.ast_tx_swretries++;
4409eb6f0de0SAdrian Chadd 	bf->bf_next = NULL;		/* Just to make sure */
4410eb6f0de0SAdrian Chadd 
441121840808SAdrian Chadd 	/* Clear the aggregate state */
441221840808SAdrian Chadd 	bf->bf_state.bfs_aggr = 0;
441321840808SAdrian Chadd 	bf->bf_state.bfs_ndelim = 0;	/* ??? needed? */
441421840808SAdrian Chadd 	bf->bf_state.bfs_nframes = 1;
441521840808SAdrian Chadd 
4416eb6f0de0SAdrian Chadd 	TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
4417eb6f0de0SAdrian Chadd 	return 0;
4418eb6f0de0SAdrian Chadd }
4419eb6f0de0SAdrian Chadd 
4420eb6f0de0SAdrian Chadd /*
4421eb6f0de0SAdrian Chadd  * error pkt completion for an aggregate destination
4422eb6f0de0SAdrian Chadd  */
4423eb6f0de0SAdrian Chadd static void
4424eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
4425eb6f0de0SAdrian Chadd     struct ath_tid *tid)
4426eb6f0de0SAdrian Chadd {
4427eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf_first->bf_node;
4428eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4429eb6f0de0SAdrian Chadd 	struct ath_buf *bf_next, *bf;
4430eb6f0de0SAdrian Chadd 	ath_bufhead bf_q;
4431eb6f0de0SAdrian Chadd 	int drops = 0;
4432eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
4433eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
4434eb6f0de0SAdrian Chadd 
4435eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_q);
4436eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
4437eb6f0de0SAdrian Chadd 
4438eb6f0de0SAdrian Chadd 	/*
4439eb6f0de0SAdrian Chadd 	 * Update rate control - all frames have failed.
4440eb6f0de0SAdrian Chadd 	 *
4441eb6f0de0SAdrian Chadd 	 * XXX use the length in the first frame in the series;
4442eb6f0de0SAdrian Chadd 	 * XXX just so things are consistent for now.
4443eb6f0de0SAdrian Chadd 	 */
4444eb6f0de0SAdrian Chadd 	ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
4445eb6f0de0SAdrian Chadd 	    &bf_first->bf_status.ds_txstat,
4446eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_pktlen,
4447eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
4448eb6f0de0SAdrian Chadd 
4449375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4450eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
44512d3d4776SAdrian Chadd 	sc->sc_stats.ast_tx_aggr_failall++;
4452eb6f0de0SAdrian Chadd 
4453eb6f0de0SAdrian Chadd 	/* Retry all subframes */
4454eb6f0de0SAdrian Chadd 	bf = bf_first;
4455eb6f0de0SAdrian Chadd 	while (bf) {
4456eb6f0de0SAdrian Chadd 		bf_next = bf->bf_next;
4457eb6f0de0SAdrian Chadd 		bf->bf_next = NULL;	/* Remove it from the aggr list */
44582d3d4776SAdrian Chadd 		sc->sc_stats.ast_tx_aggr_fail++;
4459eb6f0de0SAdrian Chadd 		if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4460eb6f0de0SAdrian Chadd 			drops++;
4461eb6f0de0SAdrian Chadd 			bf->bf_next = NULL;
4462eb6f0de0SAdrian Chadd 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4463eb6f0de0SAdrian Chadd 		}
4464eb6f0de0SAdrian Chadd 		bf = bf_next;
4465eb6f0de0SAdrian Chadd 	}
4466eb6f0de0SAdrian Chadd 
4467eb6f0de0SAdrian Chadd 	/* Prepend all frames to the beginning of the queue */
4468eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4469eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_q, bf, bf_list);
44703e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
4471eb6f0de0SAdrian Chadd 	}
4472eb6f0de0SAdrian Chadd 
447339da9d42SAdrian Chadd 	/*
447439da9d42SAdrian Chadd 	 * Schedule the TID to be re-tried.
447539da9d42SAdrian Chadd 	 */
4476eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, tid);
4477eb6f0de0SAdrian Chadd 
4478eb6f0de0SAdrian Chadd 	/*
4479eb6f0de0SAdrian Chadd 	 * send bar if we dropped any frames
4480eb6f0de0SAdrian Chadd 	 *
4481eb6f0de0SAdrian Chadd 	 * Keep the txq lock held for now, as we need to ensure
4482eb6f0de0SAdrian Chadd 	 * that ni_txseqs[] is consistent (as it's being updated
4483eb6f0de0SAdrian Chadd 	 * in the ifnet TX context or raw TX context.)
4484eb6f0de0SAdrian Chadd 	 */
4485eb6f0de0SAdrian Chadd 	if (drops) {
448688b3d483SAdrian Chadd 		/* Suspend the TX queue and get ready to send the BAR */
448788b3d483SAdrian Chadd 		ath_tx_tid_bar_suspend(sc, tid);
4488eb6f0de0SAdrian Chadd 	}
4489eb6f0de0SAdrian Chadd 
449088b3d483SAdrian Chadd 	/*
449188b3d483SAdrian Chadd 	 * Send BAR if required
449288b3d483SAdrian Chadd 	 */
449388b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, tid))
449488b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, tid);
4495f1bc738eSAdrian Chadd 
4496375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
449788b3d483SAdrian Chadd 
4498eb6f0de0SAdrian Chadd 	/* Complete frames which errored out */
4499eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4500eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4501eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
4502eb6f0de0SAdrian Chadd 	}
4503eb6f0de0SAdrian Chadd }
4504eb6f0de0SAdrian Chadd 
4505eb6f0de0SAdrian Chadd /*
4506eb6f0de0SAdrian Chadd  * Handle clean-up of packets from an aggregate list.
4507eb6f0de0SAdrian Chadd  *
4508eb6f0de0SAdrian Chadd  * There's no need to update the BAW here - the session is being
4509eb6f0de0SAdrian Chadd  * torn down.
4510eb6f0de0SAdrian Chadd  */
4511eb6f0de0SAdrian Chadd static void
4512eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
4513eb6f0de0SAdrian Chadd {
4514eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_next;
4515eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf_first->bf_node;
4516eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4517eb6f0de0SAdrian Chadd 	int tid = bf_first->bf_state.bfs_tid;
4518eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
4519eb6f0de0SAdrian Chadd 
4520375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4521eb6f0de0SAdrian Chadd 
4522eb6f0de0SAdrian Chadd 	/* update incomp */
4523302868d9SAdrian Chadd 	bf = bf_first;
4524eb6f0de0SAdrian Chadd 	while (bf) {
4525eb6f0de0SAdrian Chadd 		atid->incomp--;
4526eb6f0de0SAdrian Chadd 		bf = bf->bf_next;
4527eb6f0de0SAdrian Chadd 	}
4528eb6f0de0SAdrian Chadd 
4529eb6f0de0SAdrian Chadd 	if (atid->incomp == 0) {
4530eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4531eb6f0de0SAdrian Chadd 		    "%s: TID %d: cleaned up! resume!\n",
4532eb6f0de0SAdrian Chadd 		    __func__, tid);
4533eb6f0de0SAdrian Chadd 		atid->cleanup_inprogress = 0;
4534eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
4535eb6f0de0SAdrian Chadd 	}
453688b3d483SAdrian Chadd 
453788b3d483SAdrian Chadd 	/* Send BAR if required */
4538f1bc738eSAdrian Chadd 	/* XXX why would we send a BAR when transitioning to non-aggregation? */
4539302868d9SAdrian Chadd 	/*
4540302868d9SAdrian Chadd 	 * XXX TODO: we should likely just tear down the BAR state here,
4541302868d9SAdrian Chadd 	 * rather than sending a BAR.
4542302868d9SAdrian Chadd 	 */
454388b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, atid))
454488b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, atid);
4545f1bc738eSAdrian Chadd 
4546375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
4547eb6f0de0SAdrian Chadd 
4548eb6f0de0SAdrian Chadd 	/* Handle frame completion */
4549302868d9SAdrian Chadd 	bf = bf_first;
4550eb6f0de0SAdrian Chadd 	while (bf) {
4551eb6f0de0SAdrian Chadd 		bf_next = bf->bf_next;
4552eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 1);
4553eb6f0de0SAdrian Chadd 		bf = bf_next;
4554eb6f0de0SAdrian Chadd 	}
4555eb6f0de0SAdrian Chadd }
4556eb6f0de0SAdrian Chadd 
4557eb6f0de0SAdrian Chadd /*
4558eb6f0de0SAdrian Chadd  * Handle completion of an set of aggregate frames.
4559eb6f0de0SAdrian Chadd  *
4560eb6f0de0SAdrian Chadd  * Note: the completion handler is the last descriptor in the aggregate,
4561eb6f0de0SAdrian Chadd  * not the last descriptor in the first frame.
4562eb6f0de0SAdrian Chadd  */
4563eb6f0de0SAdrian Chadd static void
4564d4365d16SAdrian Chadd ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
4565d4365d16SAdrian Chadd     int fail)
4566eb6f0de0SAdrian Chadd {
4567eb6f0de0SAdrian Chadd 	//struct ath_desc *ds = bf->bf_lastds;
4568eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf_first->bf_node;
4569eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4570eb6f0de0SAdrian Chadd 	int tid = bf_first->bf_state.bfs_tid;
4571eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
4572eb6f0de0SAdrian Chadd 	struct ath_tx_status ts;
4573eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
4574eb6f0de0SAdrian Chadd 	ath_bufhead bf_q;
4575eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
4576eb6f0de0SAdrian Chadd 	int seq_st, tx_ok;
4577eb6f0de0SAdrian Chadd 	int hasba, isaggr;
4578eb6f0de0SAdrian Chadd 	uint32_t ba[2];
4579eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_next;
4580eb6f0de0SAdrian Chadd 	int ba_index;
4581eb6f0de0SAdrian Chadd 	int drops = 0;
4582eb6f0de0SAdrian Chadd 	int nframes = 0, nbad = 0, nf;
4583eb6f0de0SAdrian Chadd 	int pktlen;
4584eb6f0de0SAdrian Chadd 	/* XXX there's too much on the stack? */
4585b815538dSAdrian Chadd 	struct ath_rc_series rc[ATH_RC_NUM];
4586eb6f0de0SAdrian Chadd 	int txseq;
4587eb6f0de0SAdrian Chadd 
4588eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
4589eb6f0de0SAdrian Chadd 	    __func__, atid->hwq_depth);
4590eb6f0de0SAdrian Chadd 
45910aa5c1bbSAdrian Chadd 	/*
45920aa5c1bbSAdrian Chadd 	 * Take a copy; this may be needed -after- bf_first
45930aa5c1bbSAdrian Chadd 	 * has been completed and freed.
45940aa5c1bbSAdrian Chadd 	 */
45950aa5c1bbSAdrian Chadd 	ts = bf_first->bf_status.ds_txstat;
45960aa5c1bbSAdrian Chadd 
4597f1bc738eSAdrian Chadd 	TAILQ_INIT(&bf_q);
4598f1bc738eSAdrian Chadd 	TAILQ_INIT(&bf_cq);
4599f1bc738eSAdrian Chadd 
4600eb6f0de0SAdrian Chadd 	/* The TID state is kept behind the TXQ lock */
4601375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4602eb6f0de0SAdrian Chadd 
4603eb6f0de0SAdrian Chadd 	atid->hwq_depth--;
4604eb6f0de0SAdrian Chadd 	if (atid->hwq_depth < 0)
4605eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
4606eb6f0de0SAdrian Chadd 		    __func__, atid->hwq_depth);
4607eb6f0de0SAdrian Chadd 
4608eb6f0de0SAdrian Chadd 	/*
4609f1bc738eSAdrian Chadd 	 * If the TID is filtered, handle completing the filter
4610f1bc738eSAdrian Chadd 	 * transition before potentially kicking it to the cleanup
4611f1bc738eSAdrian Chadd 	 * function.
46120aa5c1bbSAdrian Chadd 	 *
46130aa5c1bbSAdrian Chadd 	 * XXX this is duplicate work, ew.
4614f1bc738eSAdrian Chadd 	 */
4615f1bc738eSAdrian Chadd 	if (atid->isfiltered)
4616f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
4617f1bc738eSAdrian Chadd 
4618f1bc738eSAdrian Chadd 	/*
4619eb6f0de0SAdrian Chadd 	 * Punt cleanup to the relevant function, not our problem now
4620eb6f0de0SAdrian Chadd 	 */
4621eb6f0de0SAdrian Chadd 	if (atid->cleanup_inprogress) {
4622f1bc738eSAdrian Chadd 		if (atid->isfiltered)
4623f1bc738eSAdrian Chadd 			device_printf(sc->sc_dev,
4624f1bc738eSAdrian Chadd 			    "%s: isfiltered=1, normal_comp?\n",
4625f1bc738eSAdrian Chadd 			    __func__);
4626375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4627eb6f0de0SAdrian Chadd 		ath_tx_comp_cleanup_aggr(sc, bf_first);
4628eb6f0de0SAdrian Chadd 		return;
4629eb6f0de0SAdrian Chadd 	}
4630eb6f0de0SAdrian Chadd 
4631eb6f0de0SAdrian Chadd 	/*
4632f1bc738eSAdrian Chadd 	 * If the frame is filtered, transition to filtered frame
4633f1bc738eSAdrian Chadd 	 * mode and add this to the filtered frame list.
4634f1bc738eSAdrian Chadd 	 *
4635f1bc738eSAdrian Chadd 	 * XXX TODO: figure out how this interoperates with
4636f1bc738eSAdrian Chadd 	 * BAR, pause and cleanup states.
4637f1bc738eSAdrian Chadd 	 */
4638f1bc738eSAdrian Chadd 	if ((ts.ts_status & HAL_TXERR_FILT) ||
4639f1bc738eSAdrian Chadd 	    (ts.ts_status != 0 && atid->isfiltered)) {
4640f1bc738eSAdrian Chadd 		if (fail != 0)
4641f1bc738eSAdrian Chadd 			device_printf(sc->sc_dev,
4642f1bc738eSAdrian Chadd 			    "%s: isfiltered=1, fail=%d\n", __func__, fail);
4643f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq);
4644f1bc738eSAdrian Chadd 
4645f1bc738eSAdrian Chadd 		/* Remove from BAW */
4646f1bc738eSAdrian Chadd 		TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) {
4647f1bc738eSAdrian Chadd 			if (bf->bf_state.bfs_addedbaw)
4648f1bc738eSAdrian Chadd 				drops++;
4649f1bc738eSAdrian Chadd 			if (bf->bf_state.bfs_dobaw) {
4650f1bc738eSAdrian Chadd 				ath_tx_update_baw(sc, an, atid, bf);
4651f1bc738eSAdrian Chadd 				if (! bf->bf_state.bfs_addedbaw)
4652f1bc738eSAdrian Chadd 					device_printf(sc->sc_dev,
4653f1bc738eSAdrian Chadd 					    "%s: wasn't added: seqno %d\n",
4654f1bc738eSAdrian Chadd 					    __func__,
4655f1bc738eSAdrian Chadd 					    SEQNO(bf->bf_state.bfs_seqno));
4656f1bc738eSAdrian Chadd 			}
4657f1bc738eSAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
4658f1bc738eSAdrian Chadd 		}
4659f1bc738eSAdrian Chadd 		/*
4660f1bc738eSAdrian Chadd 		 * If any intermediate frames in the BAW were dropped when
4661f1bc738eSAdrian Chadd 		 * handling filtering things, send a BAR.
4662f1bc738eSAdrian Chadd 		 */
4663f1bc738eSAdrian Chadd 		if (drops)
4664f1bc738eSAdrian Chadd 			ath_tx_tid_bar_suspend(sc, atid);
4665f1bc738eSAdrian Chadd 
4666f1bc738eSAdrian Chadd 		/*
4667f1bc738eSAdrian Chadd 		 * Finish up by sending a BAR if required and freeing
4668f1bc738eSAdrian Chadd 		 * the frames outside of the TX lock.
4669f1bc738eSAdrian Chadd 		 */
4670f1bc738eSAdrian Chadd 		goto finish_send_bar;
4671f1bc738eSAdrian Chadd 	}
4672f1bc738eSAdrian Chadd 
4673f1bc738eSAdrian Chadd 	/*
4674eb6f0de0SAdrian Chadd 	 * XXX for now, use the first frame in the aggregate for
4675eb6f0de0SAdrian Chadd 	 * XXX rate control completion; it's at least consistent.
4676eb6f0de0SAdrian Chadd 	 */
4677eb6f0de0SAdrian Chadd 	pktlen = bf_first->bf_state.bfs_pktlen;
4678eb6f0de0SAdrian Chadd 
4679eb6f0de0SAdrian Chadd 	/*
4680e9a6408eSAdrian Chadd 	 * Handle errors first!
4681e9a6408eSAdrian Chadd 	 *
4682e9a6408eSAdrian Chadd 	 * Here, handle _any_ error as a "exceeded retries" error.
4683e9a6408eSAdrian Chadd 	 * Later on (when filtered frames are to be specially handled)
4684e9a6408eSAdrian Chadd 	 * it'll have to be expanded.
4685eb6f0de0SAdrian Chadd 	 */
4686e9a6408eSAdrian Chadd #if 0
4687eb6f0de0SAdrian Chadd 	if (ts.ts_status & HAL_TXERR_XRETRY) {
4688e9a6408eSAdrian Chadd #endif
4689e9a6408eSAdrian Chadd 	if (ts.ts_status != 0) {
4690375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4691eb6f0de0SAdrian Chadd 		ath_tx_comp_aggr_error(sc, bf_first, atid);
4692eb6f0de0SAdrian Chadd 		return;
4693eb6f0de0SAdrian Chadd 	}
4694eb6f0de0SAdrian Chadd 
4695eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
4696eb6f0de0SAdrian Chadd 
4697eb6f0de0SAdrian Chadd 	/*
4698eb6f0de0SAdrian Chadd 	 * extract starting sequence and block-ack bitmap
4699eb6f0de0SAdrian Chadd 	 */
4700eb6f0de0SAdrian Chadd 	/* XXX endian-ness of seq_st, ba? */
4701eb6f0de0SAdrian Chadd 	seq_st = ts.ts_seqnum;
4702eb6f0de0SAdrian Chadd 	hasba = !! (ts.ts_flags & HAL_TX_BA);
4703eb6f0de0SAdrian Chadd 	tx_ok = (ts.ts_status == 0);
4704eb6f0de0SAdrian Chadd 	isaggr = bf_first->bf_state.bfs_aggr;
4705eb6f0de0SAdrian Chadd 	ba[0] = ts.ts_ba_low;
4706eb6f0de0SAdrian Chadd 	ba[1] = ts.ts_ba_high;
4707eb6f0de0SAdrian Chadd 
4708eb6f0de0SAdrian Chadd 	/*
4709eb6f0de0SAdrian Chadd 	 * Copy the TX completion status and the rate control
4710eb6f0de0SAdrian Chadd 	 * series from the first descriptor, as it may be freed
4711eb6f0de0SAdrian Chadd 	 * before the rate control code can get its grubby fingers
4712eb6f0de0SAdrian Chadd 	 * into things.
4713eb6f0de0SAdrian Chadd 	 */
4714eb6f0de0SAdrian Chadd 	memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
4715eb6f0de0SAdrian Chadd 
4716eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4717d4365d16SAdrian Chadd 	    "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
4718d4365d16SAdrian Chadd 	    "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
4719eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
4720eb6f0de0SAdrian Chadd 	    isaggr, seq_st, hasba, ba[0], ba[1]);
4721eb6f0de0SAdrian Chadd 
4722b3420862SAdrian Chadd 	/*
4723b3420862SAdrian Chadd 	 * The reference driver doesn't do this; it simply ignores
4724b3420862SAdrian Chadd 	 * this check in its entirety.
4725b3420862SAdrian Chadd 	 *
4726b3420862SAdrian Chadd 	 * I've seen this occur when using iperf to send traffic
4727b3420862SAdrian Chadd 	 * out tid 1 - the aggregate frames are all marked as TID 1,
4728b3420862SAdrian Chadd 	 * but the TXSTATUS has TID=0.  So, let's just ignore this
4729b3420862SAdrian Chadd 	 * check.
4730b3420862SAdrian Chadd 	 */
4731b3420862SAdrian Chadd #if 0
4732eb6f0de0SAdrian Chadd 	/* Occasionally, the MAC sends a tx status for the wrong TID. */
4733eb6f0de0SAdrian Chadd 	if (tid != ts.ts_tid) {
4734eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: tid %d != hw tid %d\n",
4735eb6f0de0SAdrian Chadd 		    __func__, tid, ts.ts_tid);
4736eb6f0de0SAdrian Chadd 		tx_ok = 0;
4737eb6f0de0SAdrian Chadd 	}
4738b3420862SAdrian Chadd #endif
4739eb6f0de0SAdrian Chadd 
4740eb6f0de0SAdrian Chadd 	/* AR5416 BA bug; this requires an interface reset */
4741eb6f0de0SAdrian Chadd 	if (isaggr && tx_ok && (! hasba)) {
4742eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
4743d4365d16SAdrian Chadd 		    "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
4744d4365d16SAdrian Chadd 		    "seq_st=%d\n",
4745eb6f0de0SAdrian Chadd 		    __func__, hasba, tx_ok, isaggr, seq_st);
4746eb6f0de0SAdrian Chadd 		/* XXX TODO: schedule an interface reset */
47470f078d63SJohn Baldwin #ifdef ATH_DEBUG
47486abbbae5SAdrian Chadd 		ath_printtxbuf(sc, bf_first,
47496abbbae5SAdrian Chadd 		    sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0);
47500f078d63SJohn Baldwin #endif
4751eb6f0de0SAdrian Chadd 	}
4752eb6f0de0SAdrian Chadd 
4753eb6f0de0SAdrian Chadd 	/*
4754eb6f0de0SAdrian Chadd 	 * Walk the list of frames, figure out which ones were correctly
4755eb6f0de0SAdrian Chadd 	 * sent and which weren't.
4756eb6f0de0SAdrian Chadd 	 */
4757eb6f0de0SAdrian Chadd 	bf = bf_first;
4758eb6f0de0SAdrian Chadd 	nf = bf_first->bf_state.bfs_nframes;
4759eb6f0de0SAdrian Chadd 
4760eb6f0de0SAdrian Chadd 	/* bf_first is going to be invalid once this list is walked */
4761eb6f0de0SAdrian Chadd 	bf_first = NULL;
4762eb6f0de0SAdrian Chadd 
4763eb6f0de0SAdrian Chadd 	/*
4764eb6f0de0SAdrian Chadd 	 * Walk the list of completed frames and determine
4765eb6f0de0SAdrian Chadd 	 * which need to be completed and which need to be
4766eb6f0de0SAdrian Chadd 	 * retransmitted.
4767eb6f0de0SAdrian Chadd 	 *
4768eb6f0de0SAdrian Chadd 	 * For completed frames, the completion functions need
4769eb6f0de0SAdrian Chadd 	 * to be called at the end of this function as the last
4770eb6f0de0SAdrian Chadd 	 * node reference may free the node.
4771eb6f0de0SAdrian Chadd 	 *
4772eb6f0de0SAdrian Chadd 	 * Finally, since the TXQ lock can't be held during the
4773eb6f0de0SAdrian Chadd 	 * completion callback (to avoid lock recursion),
4774eb6f0de0SAdrian Chadd 	 * the completion calls have to be done outside of the
4775eb6f0de0SAdrian Chadd 	 * lock.
4776eb6f0de0SAdrian Chadd 	 */
4777eb6f0de0SAdrian Chadd 	while (bf) {
4778eb6f0de0SAdrian Chadd 		nframes++;
4779d4365d16SAdrian Chadd 		ba_index = ATH_BA_INDEX(seq_st,
4780d4365d16SAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno));
4781eb6f0de0SAdrian Chadd 		bf_next = bf->bf_next;
4782eb6f0de0SAdrian Chadd 		bf->bf_next = NULL;	/* Remove it from the aggr list */
4783eb6f0de0SAdrian Chadd 
4784eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4785eb6f0de0SAdrian Chadd 		    "%s: checking bf=%p seqno=%d; ack=%d\n",
4786eb6f0de0SAdrian Chadd 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
4787eb6f0de0SAdrian Chadd 		    ATH_BA_ISSET(ba, ba_index));
4788eb6f0de0SAdrian Chadd 
4789eb6f0de0SAdrian Chadd 		if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
47902d3d4776SAdrian Chadd 			sc->sc_stats.ast_tx_aggr_ok++;
4791eb6f0de0SAdrian Chadd 			ath_tx_update_baw(sc, an, atid, bf);
4792eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
4793eb6f0de0SAdrian Chadd 			if (! bf->bf_state.bfs_addedbaw)
4794eb6f0de0SAdrian Chadd 				device_printf(sc->sc_dev,
4795eb6f0de0SAdrian Chadd 				    "%s: wasn't added: seqno %d\n",
4796eb6f0de0SAdrian Chadd 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4797eb6f0de0SAdrian Chadd 			bf->bf_next = NULL;
4798eb6f0de0SAdrian Chadd 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4799eb6f0de0SAdrian Chadd 		} else {
48002d3d4776SAdrian Chadd 			sc->sc_stats.ast_tx_aggr_fail++;
4801eb6f0de0SAdrian Chadd 			if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4802eb6f0de0SAdrian Chadd 				drops++;
4803eb6f0de0SAdrian Chadd 				bf->bf_next = NULL;
4804eb6f0de0SAdrian Chadd 				TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4805eb6f0de0SAdrian Chadd 			}
4806eb6f0de0SAdrian Chadd 			nbad++;
4807eb6f0de0SAdrian Chadd 		}
4808eb6f0de0SAdrian Chadd 		bf = bf_next;
4809eb6f0de0SAdrian Chadd 	}
4810eb6f0de0SAdrian Chadd 
4811eb6f0de0SAdrian Chadd 	/*
4812eb6f0de0SAdrian Chadd 	 * Now that the BAW updates have been done, unlock
4813eb6f0de0SAdrian Chadd 	 *
4814eb6f0de0SAdrian Chadd 	 * txseq is grabbed before the lock is released so we
4815eb6f0de0SAdrian Chadd 	 * have a consistent view of what -was- in the BAW.
4816eb6f0de0SAdrian Chadd 	 * Anything after this point will not yet have been
4817eb6f0de0SAdrian Chadd 	 * TXed.
4818eb6f0de0SAdrian Chadd 	 */
4819eb6f0de0SAdrian Chadd 	txseq = tap->txa_start;
4820375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
4821eb6f0de0SAdrian Chadd 
4822eb6f0de0SAdrian Chadd 	if (nframes != nf)
4823eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
4824eb6f0de0SAdrian Chadd 		    "%s: num frames seen=%d; bf nframes=%d\n",
4825eb6f0de0SAdrian Chadd 		    __func__, nframes, nf);
4826eb6f0de0SAdrian Chadd 
4827eb6f0de0SAdrian Chadd 	/*
4828eb6f0de0SAdrian Chadd 	 * Now we know how many frames were bad, call the rate
4829eb6f0de0SAdrian Chadd 	 * control code.
4830eb6f0de0SAdrian Chadd 	 */
4831eb6f0de0SAdrian Chadd 	if (fail == 0)
4832d4365d16SAdrian Chadd 		ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes,
4833d4365d16SAdrian Chadd 		    nbad);
4834eb6f0de0SAdrian Chadd 
4835eb6f0de0SAdrian Chadd 	/*
4836eb6f0de0SAdrian Chadd 	 * send bar if we dropped any frames
4837eb6f0de0SAdrian Chadd 	 */
4838eb6f0de0SAdrian Chadd 	if (drops) {
483988b3d483SAdrian Chadd 		/* Suspend the TX queue and get ready to send the BAR */
4840375307d4SAdrian Chadd 		ATH_TX_LOCK(sc);
484188b3d483SAdrian Chadd 		ath_tx_tid_bar_suspend(sc, atid);
4842375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4843eb6f0de0SAdrian Chadd 	}
4844eb6f0de0SAdrian Chadd 
484539da9d42SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
484639da9d42SAdrian Chadd 	    "%s: txa_start now %d\n", __func__, tap->txa_start);
484739da9d42SAdrian Chadd 
4848375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
484939da9d42SAdrian Chadd 
485039da9d42SAdrian Chadd 	/* Prepend all frames to the beginning of the queue */
4851eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4852eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_q, bf, bf_list);
48533e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4854eb6f0de0SAdrian Chadd 	}
4855eb6f0de0SAdrian Chadd 
485639da9d42SAdrian Chadd 	/*
485739da9d42SAdrian Chadd 	 * Reschedule to grab some further frames.
485839da9d42SAdrian Chadd 	 */
485939da9d42SAdrian Chadd 	ath_tx_tid_sched(sc, atid);
4860eb6f0de0SAdrian Chadd 
486188b3d483SAdrian Chadd 	/*
4862f1bc738eSAdrian Chadd 	 * If the queue is filtered, re-schedule as required.
4863f1bc738eSAdrian Chadd 	 *
4864f1bc738eSAdrian Chadd 	 * This is required as there may be a subsequent TX descriptor
4865f1bc738eSAdrian Chadd 	 * for this end-node that has CLRDMASK set, so it's quite possible
4866f1bc738eSAdrian Chadd 	 * that a filtered frame will be followed by a non-filtered
4867f1bc738eSAdrian Chadd 	 * (complete or otherwise) frame.
4868f1bc738eSAdrian Chadd 	 *
4869f1bc738eSAdrian Chadd 	 * XXX should we do this before we complete the frame?
4870f1bc738eSAdrian Chadd 	 */
4871f1bc738eSAdrian Chadd 	if (atid->isfiltered)
4872f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
4873f1bc738eSAdrian Chadd 
4874f1bc738eSAdrian Chadd finish_send_bar:
4875f1bc738eSAdrian Chadd 
4876f1bc738eSAdrian Chadd 	/*
487788b3d483SAdrian Chadd 	 * Send BAR if required
487888b3d483SAdrian Chadd 	 */
487988b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, atid))
488088b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, atid);
488139da9d42SAdrian Chadd 
4882375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
488388b3d483SAdrian Chadd 
4884eb6f0de0SAdrian Chadd 	/* Do deferred completion */
4885eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4886eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4887eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
4888eb6f0de0SAdrian Chadd 	}
4889eb6f0de0SAdrian Chadd }
4890eb6f0de0SAdrian Chadd 
4891eb6f0de0SAdrian Chadd /*
4892eb6f0de0SAdrian Chadd  * Handle completion of unaggregated frames in an ADDBA
4893eb6f0de0SAdrian Chadd  * session.
4894eb6f0de0SAdrian Chadd  *
4895eb6f0de0SAdrian Chadd  * Fail is set to 1 if the entry is being freed via a call to
4896eb6f0de0SAdrian Chadd  * ath_tx_draintxq().
4897eb6f0de0SAdrian Chadd  */
4898eb6f0de0SAdrian Chadd static void
4899eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
4900eb6f0de0SAdrian Chadd {
4901eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
4902eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4903eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
4904eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
49050aa5c1bbSAdrian Chadd 	struct ath_tx_status ts;
4906f1bc738eSAdrian Chadd 	int drops = 0;
4907eb6f0de0SAdrian Chadd 
4908eb6f0de0SAdrian Chadd 	/*
49090aa5c1bbSAdrian Chadd 	 * Take a copy of this; filtering/cloning the frame may free the
49100aa5c1bbSAdrian Chadd 	 * bf pointer.
49110aa5c1bbSAdrian Chadd 	 */
49120aa5c1bbSAdrian Chadd 	ts = bf->bf_status.ds_txstat;
49130aa5c1bbSAdrian Chadd 
49140aa5c1bbSAdrian Chadd 	/*
4915eb6f0de0SAdrian Chadd 	 * Update rate control status here, before we possibly
4916eb6f0de0SAdrian Chadd 	 * punt to retry or cleanup.
4917eb6f0de0SAdrian Chadd 	 *
4918eb6f0de0SAdrian Chadd 	 * Do it outside of the TXQ lock.
4919eb6f0de0SAdrian Chadd 	 */
4920875a9451SAdrian Chadd 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4921eb6f0de0SAdrian Chadd 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4922eb6f0de0SAdrian Chadd 		    &bf->bf_status.ds_txstat,
4923eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_pktlen,
49240aa5c1bbSAdrian Chadd 		    1, (ts.ts_status == 0) ? 0 : 1);
4925eb6f0de0SAdrian Chadd 
4926eb6f0de0SAdrian Chadd 	/*
4927eb6f0de0SAdrian Chadd 	 * This is called early so atid->hwq_depth can be tracked.
4928eb6f0de0SAdrian Chadd 	 * This unfortunately means that it's released and regrabbed
4929eb6f0de0SAdrian Chadd 	 * during retry and cleanup. That's rather inefficient.
4930eb6f0de0SAdrian Chadd 	 */
4931375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4932eb6f0de0SAdrian Chadd 
4933eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
4934eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: TID=16!\n", __func__);
4935eb6f0de0SAdrian Chadd 
4936d4365d16SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX,
4937d4365d16SAdrian Chadd 	    "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
4938d4365d16SAdrian Chadd 	    __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
4939d4365d16SAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno));
4940eb6f0de0SAdrian Chadd 
4941eb6f0de0SAdrian Chadd 	atid->hwq_depth--;
4942eb6f0de0SAdrian Chadd 	if (atid->hwq_depth < 0)
4943eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
4944eb6f0de0SAdrian Chadd 		    __func__, atid->hwq_depth);
4945eb6f0de0SAdrian Chadd 
4946eb6f0de0SAdrian Chadd 	/*
4947f1bc738eSAdrian Chadd 	 * If the TID is filtered, handle completing the filter
4948f1bc738eSAdrian Chadd 	 * transition before potentially kicking it to the cleanup
4949f1bc738eSAdrian Chadd 	 * function.
4950f1bc738eSAdrian Chadd 	 */
4951f1bc738eSAdrian Chadd 	if (atid->isfiltered)
4952f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
4953f1bc738eSAdrian Chadd 
4954f1bc738eSAdrian Chadd 	/*
4955eb6f0de0SAdrian Chadd 	 * If a cleanup is in progress, punt to comp_cleanup;
4956eb6f0de0SAdrian Chadd 	 * rather than handling it here. It's thus their
4957eb6f0de0SAdrian Chadd 	 * responsibility to clean up, call the completion
4958eb6f0de0SAdrian Chadd 	 * function in net80211, etc.
4959eb6f0de0SAdrian Chadd 	 */
4960eb6f0de0SAdrian Chadd 	if (atid->cleanup_inprogress) {
4961f1bc738eSAdrian Chadd 		if (atid->isfiltered)
4962f1bc738eSAdrian Chadd 			device_printf(sc->sc_dev,
4963f1bc738eSAdrian Chadd 			    "%s: isfiltered=1, normal_comp?\n",
4964f1bc738eSAdrian Chadd 			    __func__);
4965375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4966d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
4967d4365d16SAdrian Chadd 		    __func__);
4968eb6f0de0SAdrian Chadd 		ath_tx_comp_cleanup_unaggr(sc, bf);
4969eb6f0de0SAdrian Chadd 		return;
4970eb6f0de0SAdrian Chadd 	}
4971eb6f0de0SAdrian Chadd 
4972eb6f0de0SAdrian Chadd 	/*
4973f1bc738eSAdrian Chadd 	 * XXX TODO: how does cleanup, BAR and filtered frame handling
4974f1bc738eSAdrian Chadd 	 * overlap?
4975f1bc738eSAdrian Chadd 	 *
4976f1bc738eSAdrian Chadd 	 * If the frame is filtered OR if it's any failure but
4977f1bc738eSAdrian Chadd 	 * the TID is filtered, the frame must be added to the
4978f1bc738eSAdrian Chadd 	 * filtered frame list.
4979f1bc738eSAdrian Chadd 	 *
4980f1bc738eSAdrian Chadd 	 * However - a busy buffer can't be added to the filtered
4981f1bc738eSAdrian Chadd 	 * list as it will end up being recycled without having
4982f1bc738eSAdrian Chadd 	 * been made available for the hardware.
4983f1bc738eSAdrian Chadd 	 */
49840aa5c1bbSAdrian Chadd 	if ((ts.ts_status & HAL_TXERR_FILT) ||
49850aa5c1bbSAdrian Chadd 	    (ts.ts_status != 0 && atid->isfiltered)) {
4986f1bc738eSAdrian Chadd 		int freeframe;
4987f1bc738eSAdrian Chadd 
4988f1bc738eSAdrian Chadd 		if (fail != 0)
4989f1bc738eSAdrian Chadd 			device_printf(sc->sc_dev,
4990f1bc738eSAdrian Chadd 			    "%s: isfiltered=1, fail=%d\n",
4991f1bc738eSAdrian Chadd 			    __func__,
4992f1bc738eSAdrian Chadd 			    fail);
4993f1bc738eSAdrian Chadd 		freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf);
4994f1bc738eSAdrian Chadd 		if (freeframe) {
4995f1bc738eSAdrian Chadd 			/* Remove from BAW */
4996f1bc738eSAdrian Chadd 			if (bf->bf_state.bfs_addedbaw)
4997f1bc738eSAdrian Chadd 				drops++;
4998f1bc738eSAdrian Chadd 			if (bf->bf_state.bfs_dobaw) {
4999f1bc738eSAdrian Chadd 				ath_tx_update_baw(sc, an, atid, bf);
5000f1bc738eSAdrian Chadd 				if (! bf->bf_state.bfs_addedbaw)
5001f1bc738eSAdrian Chadd 					device_printf(sc->sc_dev,
5002f1bc738eSAdrian Chadd 					    "%s: wasn't added: seqno %d\n",
5003f1bc738eSAdrian Chadd 					    __func__, SEQNO(bf->bf_state.bfs_seqno));
5004f1bc738eSAdrian Chadd 			}
5005f1bc738eSAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
5006f1bc738eSAdrian Chadd 		}
5007f1bc738eSAdrian Chadd 
5008f1bc738eSAdrian Chadd 		/*
5009f1bc738eSAdrian Chadd 		 * If the frame couldn't be filtered, treat it as a drop and
5010f1bc738eSAdrian Chadd 		 * prepare to send a BAR.
5011f1bc738eSAdrian Chadd 		 */
5012f1bc738eSAdrian Chadd 		if (freeframe && drops)
5013f1bc738eSAdrian Chadd 			ath_tx_tid_bar_suspend(sc, atid);
5014f1bc738eSAdrian Chadd 
5015f1bc738eSAdrian Chadd 		/*
5016f1bc738eSAdrian Chadd 		 * Send BAR if required
5017f1bc738eSAdrian Chadd 		 */
5018f1bc738eSAdrian Chadd 		if (ath_tx_tid_bar_tx_ready(sc, atid))
5019f1bc738eSAdrian Chadd 			ath_tx_tid_bar_tx(sc, atid);
5020f1bc738eSAdrian Chadd 
5021375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
5022f1bc738eSAdrian Chadd 		/*
5023f1bc738eSAdrian Chadd 		 * If freeframe is set, then the frame couldn't be
5024f1bc738eSAdrian Chadd 		 * cloned and bf is still valid.  Just complete/free it.
5025f1bc738eSAdrian Chadd 		 */
5026f1bc738eSAdrian Chadd 		if (freeframe)
5027f1bc738eSAdrian Chadd 			ath_tx_default_comp(sc, bf, fail);
5028f1bc738eSAdrian Chadd 
5029f1bc738eSAdrian Chadd 
5030f1bc738eSAdrian Chadd 		return;
5031f1bc738eSAdrian Chadd 	}
5032f1bc738eSAdrian Chadd 	/*
5033eb6f0de0SAdrian Chadd 	 * Don't bother with the retry check if all frames
5034eb6f0de0SAdrian Chadd 	 * are being failed (eg during queue deletion.)
5035eb6f0de0SAdrian Chadd 	 */
5036e9a6408eSAdrian Chadd #if 0
5037eb6f0de0SAdrian Chadd 	if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
5038e9a6408eSAdrian Chadd #endif
50390aa5c1bbSAdrian Chadd 	if (fail == 0 && ts.ts_status != 0) {
5040375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
5041d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
5042d4365d16SAdrian Chadd 		    __func__);
5043eb6f0de0SAdrian Chadd 		ath_tx_aggr_retry_unaggr(sc, bf);
5044eb6f0de0SAdrian Chadd 		return;
5045eb6f0de0SAdrian Chadd 	}
5046eb6f0de0SAdrian Chadd 
5047eb6f0de0SAdrian Chadd 	/* Success? Complete */
5048eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
5049eb6f0de0SAdrian Chadd 	    __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
5050eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_dobaw) {
5051eb6f0de0SAdrian Chadd 		ath_tx_update_baw(sc, an, atid, bf);
5052eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_dobaw = 0;
5053eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_addedbaw)
5054eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev,
5055eb6f0de0SAdrian Chadd 			    "%s: wasn't added: seqno %d\n",
5056eb6f0de0SAdrian Chadd 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
5057eb6f0de0SAdrian Chadd 	}
5058eb6f0de0SAdrian Chadd 
505988b3d483SAdrian Chadd 	/*
5060f1bc738eSAdrian Chadd 	 * If the queue is filtered, re-schedule as required.
5061f1bc738eSAdrian Chadd 	 *
5062f1bc738eSAdrian Chadd 	 * This is required as there may be a subsequent TX descriptor
5063f1bc738eSAdrian Chadd 	 * for this end-node that has CLRDMASK set, so it's quite possible
5064f1bc738eSAdrian Chadd 	 * that a filtered frame will be followed by a non-filtered
5065f1bc738eSAdrian Chadd 	 * (complete or otherwise) frame.
5066f1bc738eSAdrian Chadd 	 *
5067f1bc738eSAdrian Chadd 	 * XXX should we do this before we complete the frame?
5068f1bc738eSAdrian Chadd 	 */
5069f1bc738eSAdrian Chadd 	if (atid->isfiltered)
5070f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
5071f1bc738eSAdrian Chadd 
5072f1bc738eSAdrian Chadd 	/*
507388b3d483SAdrian Chadd 	 * Send BAR if required
507488b3d483SAdrian Chadd 	 */
507588b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, atid))
507688b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, atid);
507788b3d483SAdrian Chadd 
5078375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5079eb6f0de0SAdrian Chadd 
5080eb6f0de0SAdrian Chadd 	ath_tx_default_comp(sc, bf, fail);
5081eb6f0de0SAdrian Chadd 	/* bf is freed at this point */
5082eb6f0de0SAdrian Chadd }
5083eb6f0de0SAdrian Chadd 
5084eb6f0de0SAdrian Chadd void
5085eb6f0de0SAdrian Chadd ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
5086eb6f0de0SAdrian Chadd {
5087eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_aggr)
5088eb6f0de0SAdrian Chadd 		ath_tx_aggr_comp_aggr(sc, bf, fail);
5089eb6f0de0SAdrian Chadd 	else
5090eb6f0de0SAdrian Chadd 		ath_tx_aggr_comp_unaggr(sc, bf, fail);
5091eb6f0de0SAdrian Chadd }
5092eb6f0de0SAdrian Chadd 
5093eb6f0de0SAdrian Chadd /*
5094eb6f0de0SAdrian Chadd  * Schedule some packets from the given node/TID to the hardware.
5095eb6f0de0SAdrian Chadd  *
5096eb6f0de0SAdrian Chadd  * This is the aggregate version.
5097eb6f0de0SAdrian Chadd  */
5098eb6f0de0SAdrian Chadd void
5099eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
5100eb6f0de0SAdrian Chadd     struct ath_tid *tid)
5101eb6f0de0SAdrian Chadd {
5102eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
5103eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5104eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
5105eb6f0de0SAdrian Chadd 	ATH_AGGR_STATUS status;
5106eb6f0de0SAdrian Chadd 	ath_bufhead bf_q;
5107eb6f0de0SAdrian Chadd 
5108eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
5109375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
5110eb6f0de0SAdrian Chadd 
511122a3aee6SAdrian Chadd 	/*
511222a3aee6SAdrian Chadd 	 * XXX TODO: If we're called for a queue that we're leaking frames to,
511322a3aee6SAdrian Chadd 	 * ensure we only leak one.
511422a3aee6SAdrian Chadd 	 */
511522a3aee6SAdrian Chadd 
5116eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
5117eb6f0de0SAdrian Chadd 
5118eb6f0de0SAdrian Chadd 	if (tid->tid == IEEE80211_NONQOS_TID)
5119eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: called for TID=NONQOS_TID?\n",
5120eb6f0de0SAdrian Chadd 		    __func__);
5121eb6f0de0SAdrian Chadd 
5122eb6f0de0SAdrian Chadd 	for (;;) {
5123eb6f0de0SAdrian Chadd 		status = ATH_AGGR_DONE;
5124eb6f0de0SAdrian Chadd 
5125eb6f0de0SAdrian Chadd 		/*
5126eb6f0de0SAdrian Chadd 		 * If the upper layer has paused the TID, don't
5127eb6f0de0SAdrian Chadd 		 * queue any further packets.
5128eb6f0de0SAdrian Chadd 		 *
5129eb6f0de0SAdrian Chadd 		 * This can also occur from the completion task because
5130eb6f0de0SAdrian Chadd 		 * of packet loss; but as its serialised with this code,
5131eb6f0de0SAdrian Chadd 		 * it won't "appear" half way through queuing packets.
5132eb6f0de0SAdrian Chadd 		 */
513322a3aee6SAdrian Chadd 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5134eb6f0de0SAdrian Chadd 			break;
5135eb6f0de0SAdrian Chadd 
51363e6cc97fSAdrian Chadd 		bf = ATH_TID_FIRST(tid);
5137eb6f0de0SAdrian Chadd 		if (bf == NULL) {
5138eb6f0de0SAdrian Chadd 			break;
5139eb6f0de0SAdrian Chadd 		}
5140eb6f0de0SAdrian Chadd 
5141eb6f0de0SAdrian Chadd 		/*
5142eb6f0de0SAdrian Chadd 		 * If the packet doesn't fall within the BAW (eg a NULL
5143eb6f0de0SAdrian Chadd 		 * data frame), schedule it directly; continue.
5144eb6f0de0SAdrian Chadd 		 */
5145eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_dobaw) {
5146d4365d16SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5147d4365d16SAdrian Chadd 			    "%s: non-baw packet\n",
5148eb6f0de0SAdrian Chadd 			    __func__);
51493e6cc97fSAdrian Chadd 			ATH_TID_REMOVE(tid, bf, bf_list);
51502a9f83afSAdrian Chadd 
51512a9f83afSAdrian Chadd 			if (bf->bf_state.bfs_nframes > 1)
51522a9f83afSAdrian Chadd 				device_printf(sc->sc_dev,
51532a9f83afSAdrian Chadd 				    "%s: aggr=%d, nframes=%d\n",
51542a9f83afSAdrian Chadd 				    __func__,
51552a9f83afSAdrian Chadd 				    bf->bf_state.bfs_aggr,
51562a9f83afSAdrian Chadd 				    bf->bf_state.bfs_nframes);
51572a9f83afSAdrian Chadd 
51582a9f83afSAdrian Chadd 			/*
51592a9f83afSAdrian Chadd 			 * This shouldn't happen - such frames shouldn't
51602a9f83afSAdrian Chadd 			 * ever have been queued as an aggregate in the
51612a9f83afSAdrian Chadd 			 * first place.  However, make sure the fields
51622a9f83afSAdrian Chadd 			 * are correctly setup just to be totally sure.
51632a9f83afSAdrian Chadd 			 */
5164eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_aggr = 0;
51652a9f83afSAdrian Chadd 			bf->bf_state.bfs_nframes = 1;
51662a9f83afSAdrian Chadd 
51674e81f27cSAdrian Chadd 			/* Update CLRDMASK just before this frame is queued */
51684e81f27cSAdrian Chadd 			ath_tx_update_clrdmask(sc, tid, bf);
51694e81f27cSAdrian Chadd 
5170eb6f0de0SAdrian Chadd 			ath_tx_do_ratelookup(sc, bf);
5171e2e4a2c2SAdrian Chadd 			ath_tx_calc_duration(sc, bf);
5172e2e4a2c2SAdrian Chadd 			ath_tx_calc_protection(sc, bf);
5173eb6f0de0SAdrian Chadd 			ath_tx_set_rtscts(sc, bf);
5174e2e4a2c2SAdrian Chadd 			ath_tx_rate_fill_rcflags(sc, bf);
5175eb6f0de0SAdrian Chadd 			ath_tx_setds(sc, bf);
5176eb6f0de0SAdrian Chadd 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5177eb6f0de0SAdrian Chadd 
5178eb6f0de0SAdrian Chadd 			sc->sc_aggr_stats.aggr_nonbaw_pkt++;
5179eb6f0de0SAdrian Chadd 
5180eb6f0de0SAdrian Chadd 			/* Queue the packet; continue */
5181eb6f0de0SAdrian Chadd 			goto queuepkt;
5182eb6f0de0SAdrian Chadd 		}
5183eb6f0de0SAdrian Chadd 
5184eb6f0de0SAdrian Chadd 		TAILQ_INIT(&bf_q);
5185eb6f0de0SAdrian Chadd 
5186eb6f0de0SAdrian Chadd 		/*
5187eb6f0de0SAdrian Chadd 		 * Do a rate control lookup on the first frame in the
5188eb6f0de0SAdrian Chadd 		 * list. The rate control code needs that to occur
5189eb6f0de0SAdrian Chadd 		 * before it can determine whether to TX.
5190eb6f0de0SAdrian Chadd 		 * It's inaccurate because the rate control code doesn't
5191eb6f0de0SAdrian Chadd 		 * really "do" aggregate lookups, so it only considers
5192eb6f0de0SAdrian Chadd 		 * the size of the first frame.
5193eb6f0de0SAdrian Chadd 		 */
5194eb6f0de0SAdrian Chadd 		ath_tx_do_ratelookup(sc, bf);
5195eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].rix = 0;
5196eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].tries = 0;
5197e2e4a2c2SAdrian Chadd 
5198e2e4a2c2SAdrian Chadd 		ath_tx_calc_duration(sc, bf);
5199e2e4a2c2SAdrian Chadd 		ath_tx_calc_protection(sc, bf);
5200e2e4a2c2SAdrian Chadd 
5201e2e4a2c2SAdrian Chadd 		ath_tx_set_rtscts(sc, bf);
5202eb6f0de0SAdrian Chadd 		ath_tx_rate_fill_rcflags(sc, bf);
5203eb6f0de0SAdrian Chadd 
5204eb6f0de0SAdrian Chadd 		status = ath_tx_form_aggr(sc, an, tid, &bf_q);
5205eb6f0de0SAdrian Chadd 
5206eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5207eb6f0de0SAdrian Chadd 		    "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
5208eb6f0de0SAdrian Chadd 
5209eb6f0de0SAdrian Chadd 		/*
5210eb6f0de0SAdrian Chadd 		 * No frames to be picked up - out of BAW
5211eb6f0de0SAdrian Chadd 		 */
5212eb6f0de0SAdrian Chadd 		if (TAILQ_EMPTY(&bf_q))
5213eb6f0de0SAdrian Chadd 			break;
5214eb6f0de0SAdrian Chadd 
5215eb6f0de0SAdrian Chadd 		/*
5216eb6f0de0SAdrian Chadd 		 * This assumes that the descriptor list in the ath_bufhead
5217eb6f0de0SAdrian Chadd 		 * are already linked together via bf_next pointers.
5218eb6f0de0SAdrian Chadd 		 */
5219eb6f0de0SAdrian Chadd 		bf = TAILQ_FIRST(&bf_q);
5220eb6f0de0SAdrian Chadd 
5221e2e4a2c2SAdrian Chadd 		if (status == ATH_AGGR_8K_LIMITED)
5222e2e4a2c2SAdrian Chadd 			sc->sc_aggr_stats.aggr_rts_aggr_limited++;
5223e2e4a2c2SAdrian Chadd 
5224eb6f0de0SAdrian Chadd 		/*
5225eb6f0de0SAdrian Chadd 		 * If it's the only frame send as non-aggregate
5226eb6f0de0SAdrian Chadd 		 * assume that ath_tx_form_aggr() has checked
5227eb6f0de0SAdrian Chadd 		 * whether it's in the BAW and added it appropriately.
5228eb6f0de0SAdrian Chadd 		 */
5229eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_nframes == 1) {
5230eb6f0de0SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5231eb6f0de0SAdrian Chadd 			    "%s: single-frame aggregate\n", __func__);
52324e81f27cSAdrian Chadd 
52334e81f27cSAdrian Chadd 			/* Update CLRDMASK just before this frame is queued */
52344e81f27cSAdrian Chadd 			ath_tx_update_clrdmask(sc, tid, bf);
52354e81f27cSAdrian Chadd 
5236eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_aggr = 0;
523721840808SAdrian Chadd 			bf->bf_state.bfs_ndelim = 0;
5238eb6f0de0SAdrian Chadd 			ath_tx_setds(sc, bf);
5239eb6f0de0SAdrian Chadd 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5240eb6f0de0SAdrian Chadd 			if (status == ATH_AGGR_BAW_CLOSED)
5241eb6f0de0SAdrian Chadd 				sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
5242eb6f0de0SAdrian Chadd 			else
5243eb6f0de0SAdrian Chadd 				sc->sc_aggr_stats.aggr_single_pkt++;
5244eb6f0de0SAdrian Chadd 		} else {
5245eb6f0de0SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5246d4365d16SAdrian Chadd 			    "%s: multi-frame aggregate: %d frames, "
5247d4365d16SAdrian Chadd 			    "length %d\n",
5248eb6f0de0SAdrian Chadd 			     __func__, bf->bf_state.bfs_nframes,
5249eb6f0de0SAdrian Chadd 			    bf->bf_state.bfs_al);
5250eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_aggr = 1;
5251eb6f0de0SAdrian Chadd 			sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
5252eb6f0de0SAdrian Chadd 			sc->sc_aggr_stats.aggr_aggr_pkt++;
5253eb6f0de0SAdrian Chadd 
52544e81f27cSAdrian Chadd 			/* Update CLRDMASK just before this frame is queued */
52554e81f27cSAdrian Chadd 			ath_tx_update_clrdmask(sc, tid, bf);
52564e81f27cSAdrian Chadd 
5257eb6f0de0SAdrian Chadd 			/*
5258e2e4a2c2SAdrian Chadd 			 * Calculate the duration/protection as required.
5259e2e4a2c2SAdrian Chadd 			 */
5260e2e4a2c2SAdrian Chadd 			ath_tx_calc_duration(sc, bf);
5261e2e4a2c2SAdrian Chadd 			ath_tx_calc_protection(sc, bf);
5262e2e4a2c2SAdrian Chadd 
5263e2e4a2c2SAdrian Chadd 			/*
5264eb6f0de0SAdrian Chadd 			 * Update the rate and rtscts information based on the
5265eb6f0de0SAdrian Chadd 			 * rate decision made by the rate control code;
5266eb6f0de0SAdrian Chadd 			 * the first frame in the aggregate needs it.
5267eb6f0de0SAdrian Chadd 			 */
5268eb6f0de0SAdrian Chadd 			ath_tx_set_rtscts(sc, bf);
5269eb6f0de0SAdrian Chadd 
5270eb6f0de0SAdrian Chadd 			/*
5271eb6f0de0SAdrian Chadd 			 * Setup the relevant descriptor fields
5272eb6f0de0SAdrian Chadd 			 * for aggregation. The first descriptor
5273eb6f0de0SAdrian Chadd 			 * already points to the rest in the chain.
5274eb6f0de0SAdrian Chadd 			 */
5275eb6f0de0SAdrian Chadd 			ath_tx_setds_11n(sc, bf);
5276eb6f0de0SAdrian Chadd 
5277eb6f0de0SAdrian Chadd 		}
5278eb6f0de0SAdrian Chadd 	queuepkt:
5279eb6f0de0SAdrian Chadd 		/* Set completion handler, multi-frame aggregate or not */
5280eb6f0de0SAdrian Chadd 		bf->bf_comp = ath_tx_aggr_comp;
5281eb6f0de0SAdrian Chadd 
5282eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
5283eb6f0de0SAdrian Chadd 		    device_printf(sc->sc_dev, "%s: TID=16?\n", __func__);
5284eb6f0de0SAdrian Chadd 
528522a3aee6SAdrian Chadd 		/*
528622a3aee6SAdrian Chadd 		 * Update leak count and frame config if were leaking frames.
528722a3aee6SAdrian Chadd 		 *
528822a3aee6SAdrian Chadd 		 * XXX TODO: it should update all frames in an aggregate
528922a3aee6SAdrian Chadd 		 * correctly!
529022a3aee6SAdrian Chadd 		 */
529122a3aee6SAdrian Chadd 		ath_tx_leak_count_update(sc, tid, bf);
529222a3aee6SAdrian Chadd 
5293eb6f0de0SAdrian Chadd 		/* Punt to txq */
5294eb6f0de0SAdrian Chadd 		ath_tx_handoff(sc, txq, bf);
5295eb6f0de0SAdrian Chadd 
5296eb6f0de0SAdrian Chadd 		/* Track outstanding buffer count to hardware */
5297eb6f0de0SAdrian Chadd 		/* aggregates are "one" buffer */
5298eb6f0de0SAdrian Chadd 		tid->hwq_depth++;
5299eb6f0de0SAdrian Chadd 
5300eb6f0de0SAdrian Chadd 		/*
5301eb6f0de0SAdrian Chadd 		 * Break out if ath_tx_form_aggr() indicated
5302eb6f0de0SAdrian Chadd 		 * there can't be any further progress (eg BAW is full.)
5303eb6f0de0SAdrian Chadd 		 * Checking for an empty txq is done above.
5304eb6f0de0SAdrian Chadd 		 *
5305eb6f0de0SAdrian Chadd 		 * XXX locking on txq here?
5306eb6f0de0SAdrian Chadd 		 */
5307eb6f0de0SAdrian Chadd 		if (txq->axq_aggr_depth >= sc->sc_hwq_limit ||
530822a3aee6SAdrian Chadd 		    (status == ATH_AGGR_BAW_CLOSED ||
530922a3aee6SAdrian Chadd 		     status == ATH_AGGR_LEAK_CLOSED))
5310eb6f0de0SAdrian Chadd 			break;
5311eb6f0de0SAdrian Chadd 	}
5312eb6f0de0SAdrian Chadd }
5313eb6f0de0SAdrian Chadd 
5314eb6f0de0SAdrian Chadd /*
5315eb6f0de0SAdrian Chadd  * Schedule some packets from the given node/TID to the hardware.
5316eb6f0de0SAdrian Chadd  */
5317eb6f0de0SAdrian Chadd void
5318eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
5319eb6f0de0SAdrian Chadd     struct ath_tid *tid)
5320eb6f0de0SAdrian Chadd {
5321eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
5322eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5323eb6f0de0SAdrian Chadd 
5324eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
5325eb6f0de0SAdrian Chadd 	    __func__, an, tid->tid);
5326eb6f0de0SAdrian Chadd 
5327375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
5328eb6f0de0SAdrian Chadd 
5329eb6f0de0SAdrian Chadd 	/* Check - is AMPDU pending or running? then print out something */
5330eb6f0de0SAdrian Chadd 	if (ath_tx_ampdu_pending(sc, an, tid->tid))
5331eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: tid=%d, ampdu pending?\n",
5332eb6f0de0SAdrian Chadd 		    __func__, tid->tid);
5333eb6f0de0SAdrian Chadd 	if (ath_tx_ampdu_running(sc, an, tid->tid))
5334eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: tid=%d, ampdu running?\n",
5335eb6f0de0SAdrian Chadd 		    __func__, tid->tid);
5336eb6f0de0SAdrian Chadd 
5337eb6f0de0SAdrian Chadd 	for (;;) {
5338eb6f0de0SAdrian Chadd 
5339eb6f0de0SAdrian Chadd 		/*
5340eb6f0de0SAdrian Chadd 		 * If the upper layers have paused the TID, don't
5341eb6f0de0SAdrian Chadd 		 * queue any further packets.
534222a3aee6SAdrian Chadd 		 *
534322a3aee6SAdrian Chadd 		 * XXX if we are leaking frames, make sure we decrement
534422a3aee6SAdrian Chadd 		 * that counter _and_ we continue here.
5345eb6f0de0SAdrian Chadd 		 */
534622a3aee6SAdrian Chadd 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5347eb6f0de0SAdrian Chadd 			break;
5348eb6f0de0SAdrian Chadd 
53493e6cc97fSAdrian Chadd 		bf = ATH_TID_FIRST(tid);
5350eb6f0de0SAdrian Chadd 		if (bf == NULL) {
5351eb6f0de0SAdrian Chadd 			break;
5352eb6f0de0SAdrian Chadd 		}
5353eb6f0de0SAdrian Chadd 
53543e6cc97fSAdrian Chadd 		ATH_TID_REMOVE(tid, bf, bf_list);
5355eb6f0de0SAdrian Chadd 
5356eb6f0de0SAdrian Chadd 		/* Sanity check! */
5357eb6f0de0SAdrian Chadd 		if (tid->tid != bf->bf_state.bfs_tid) {
5358eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev, "%s: bfs_tid %d !="
5359eb6f0de0SAdrian Chadd 			    " tid %d\n",
5360eb6f0de0SAdrian Chadd 			    __func__, bf->bf_state.bfs_tid, tid->tid);
5361eb6f0de0SAdrian Chadd 		}
5362eb6f0de0SAdrian Chadd 		/* Normal completion handler */
5363eb6f0de0SAdrian Chadd 		bf->bf_comp = ath_tx_normal_comp;
5364eb6f0de0SAdrian Chadd 
53650c54de88SAdrian Chadd 		/*
53660c54de88SAdrian Chadd 		 * Override this for now, until the non-aggregate
53670c54de88SAdrian Chadd 		 * completion handler correctly handles software retransmits.
53680c54de88SAdrian Chadd 		 */
53690c54de88SAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
53700c54de88SAdrian Chadd 
53714e81f27cSAdrian Chadd 		/* Update CLRDMASK just before this frame is queued */
53724e81f27cSAdrian Chadd 		ath_tx_update_clrdmask(sc, tid, bf);
53734e81f27cSAdrian Chadd 
5374eb6f0de0SAdrian Chadd 		/* Program descriptors + rate control */
5375eb6f0de0SAdrian Chadd 		ath_tx_do_ratelookup(sc, bf);
5376e2e4a2c2SAdrian Chadd 		ath_tx_calc_duration(sc, bf);
5377e2e4a2c2SAdrian Chadd 		ath_tx_calc_protection(sc, bf);
5378eb6f0de0SAdrian Chadd 		ath_tx_set_rtscts(sc, bf);
5379e2e4a2c2SAdrian Chadd 		ath_tx_rate_fill_rcflags(sc, bf);
5380eb6f0de0SAdrian Chadd 		ath_tx_setds(sc, bf);
5381eb6f0de0SAdrian Chadd 
538222a3aee6SAdrian Chadd 		/*
538322a3aee6SAdrian Chadd 		 * Update the current leak count if
538422a3aee6SAdrian Chadd 		 * we're leaking frames; and set the
538522a3aee6SAdrian Chadd 		 * MORE flag as appropriate.
538622a3aee6SAdrian Chadd 		 */
538722a3aee6SAdrian Chadd 		ath_tx_leak_count_update(sc, tid, bf);
538822a3aee6SAdrian Chadd 
5389eb6f0de0SAdrian Chadd 		/* Track outstanding buffer count to hardware */
5390eb6f0de0SAdrian Chadd 		/* aggregates are "one" buffer */
5391eb6f0de0SAdrian Chadd 		tid->hwq_depth++;
5392eb6f0de0SAdrian Chadd 
5393eb6f0de0SAdrian Chadd 		/* Punt to hardware or software txq */
5394eb6f0de0SAdrian Chadd 		ath_tx_handoff(sc, txq, bf);
5395eb6f0de0SAdrian Chadd 	}
5396eb6f0de0SAdrian Chadd }
5397eb6f0de0SAdrian Chadd 
5398eb6f0de0SAdrian Chadd /*
5399eb6f0de0SAdrian Chadd  * Schedule some packets to the given hardware queue.
5400eb6f0de0SAdrian Chadd  *
5401eb6f0de0SAdrian Chadd  * This function walks the list of TIDs (ie, ath_node TIDs
5402eb6f0de0SAdrian Chadd  * with queued traffic) and attempts to schedule traffic
5403eb6f0de0SAdrian Chadd  * from them.
5404eb6f0de0SAdrian Chadd  *
5405eb6f0de0SAdrian Chadd  * TID scheduling is implemented as a FIFO, with TIDs being
5406eb6f0de0SAdrian Chadd  * added to the end of the queue after some frames have been
5407eb6f0de0SAdrian Chadd  * scheduled.
5408eb6f0de0SAdrian Chadd  */
5409eb6f0de0SAdrian Chadd void
5410eb6f0de0SAdrian Chadd ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
5411eb6f0de0SAdrian Chadd {
5412eb6f0de0SAdrian Chadd 	struct ath_tid *tid, *next, *last;
5413eb6f0de0SAdrian Chadd 
5414375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
5415eb6f0de0SAdrian Chadd 
5416eb6f0de0SAdrian Chadd 	/*
5417eb6f0de0SAdrian Chadd 	 * Don't schedule if the hardware queue is busy.
5418eb6f0de0SAdrian Chadd 	 * This (hopefully) gives some more time to aggregate
5419eb6f0de0SAdrian Chadd 	 * some packets in the aggregation queue.
5420eb6f0de0SAdrian Chadd 	 */
5421eb6f0de0SAdrian Chadd 	if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
5422eb6f0de0SAdrian Chadd 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5423eb6f0de0SAdrian Chadd 		return;
5424eb6f0de0SAdrian Chadd 	}
5425eb6f0de0SAdrian Chadd 
5426eb6f0de0SAdrian Chadd 	last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
5427eb6f0de0SAdrian Chadd 
5428eb6f0de0SAdrian Chadd 	TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
5429eb6f0de0SAdrian Chadd 		/*
5430eb6f0de0SAdrian Chadd 		 * Suspend paused queues here; they'll be resumed
5431eb6f0de0SAdrian Chadd 		 * once the addba completes or times out.
5432eb6f0de0SAdrian Chadd 		 */
5433eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
5434eb6f0de0SAdrian Chadd 		    __func__, tid->tid, tid->paused);
5435eb6f0de0SAdrian Chadd 		ath_tx_tid_unsched(sc, tid);
543622a3aee6SAdrian Chadd 		/*
543722a3aee6SAdrian Chadd 		 * This node may be in power-save and we're leaking
543822a3aee6SAdrian Chadd 		 * a frame; be careful.
543922a3aee6SAdrian Chadd 		 */
544022a3aee6SAdrian Chadd 		if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
5441eb6f0de0SAdrian Chadd 			continue;
5442eb6f0de0SAdrian Chadd 		}
5443eb6f0de0SAdrian Chadd 		if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
5444eb6f0de0SAdrian Chadd 			ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
5445eb6f0de0SAdrian Chadd 		else
5446eb6f0de0SAdrian Chadd 			ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
5447eb6f0de0SAdrian Chadd 
5448eb6f0de0SAdrian Chadd 		/* Not empty? Re-schedule */
5449eb6f0de0SAdrian Chadd 		if (tid->axq_depth != 0)
5450eb6f0de0SAdrian Chadd 			ath_tx_tid_sched(sc, tid);
5451eb6f0de0SAdrian Chadd 
5452*b45a991eSAdrian Chadd 		/*
5453*b45a991eSAdrian Chadd 		 * Give the software queue time to aggregate more
5454*b45a991eSAdrian Chadd 		 * packets.  If we aren't running aggregation then
5455*b45a991eSAdrian Chadd 		 * we should still limit the hardware queue depth.
5456*b45a991eSAdrian Chadd 		 */
5457*b45a991eSAdrian Chadd 		if (txq->axq_depth >= sc->sc_hwq_limit) {
5458eb6f0de0SAdrian Chadd 			break;
5459eb6f0de0SAdrian Chadd 		}
5460eb6f0de0SAdrian Chadd 
5461eb6f0de0SAdrian Chadd 		/*
5462eb6f0de0SAdrian Chadd 		 * If this was the last entry on the original list, stop.
5463eb6f0de0SAdrian Chadd 		 * Otherwise nodes that have been rescheduled onto the end
5464eb6f0de0SAdrian Chadd 		 * of the TID FIFO list will just keep being rescheduled.
546522a3aee6SAdrian Chadd 		 *
546622a3aee6SAdrian Chadd 		 * XXX What should we do about nodes that were paused
546722a3aee6SAdrian Chadd 		 * but are pending a leaking frame in response to a ps-poll?
546822a3aee6SAdrian Chadd 		 * They'll be put at the front of the list; so they'll
546922a3aee6SAdrian Chadd 		 * prematurely trigger this condition! Ew.
5470eb6f0de0SAdrian Chadd 		 */
5471eb6f0de0SAdrian Chadd 		if (tid == last)
5472eb6f0de0SAdrian Chadd 			break;
5473eb6f0de0SAdrian Chadd 	}
5474eb6f0de0SAdrian Chadd }
5475eb6f0de0SAdrian Chadd 
5476eb6f0de0SAdrian Chadd /*
5477eb6f0de0SAdrian Chadd  * TX addba handling
5478eb6f0de0SAdrian Chadd  */
5479eb6f0de0SAdrian Chadd 
5480eb6f0de0SAdrian Chadd /*
5481eb6f0de0SAdrian Chadd  * Return net80211 TID struct pointer, or NULL for none
5482eb6f0de0SAdrian Chadd  */
5483eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *
5484eb6f0de0SAdrian Chadd ath_tx_get_tx_tid(struct ath_node *an, int tid)
5485eb6f0de0SAdrian Chadd {
5486eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
5487eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
5488eb6f0de0SAdrian Chadd 
5489eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
5490eb6f0de0SAdrian Chadd 		return NULL;
5491eb6f0de0SAdrian Chadd 
54922aa563dfSAdrian Chadd 	tap = &ni->ni_tx_ampdu[tid];
5493eb6f0de0SAdrian Chadd 	return tap;
5494eb6f0de0SAdrian Chadd }
5495eb6f0de0SAdrian Chadd 
5496eb6f0de0SAdrian Chadd /*
5497eb6f0de0SAdrian Chadd  * Is AMPDU-TX running?
5498eb6f0de0SAdrian Chadd  */
5499eb6f0de0SAdrian Chadd static int
5500eb6f0de0SAdrian Chadd ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
5501eb6f0de0SAdrian Chadd {
5502eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
5503eb6f0de0SAdrian Chadd 
5504eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
5505eb6f0de0SAdrian Chadd 		return 0;
5506eb6f0de0SAdrian Chadd 
5507eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
5508eb6f0de0SAdrian Chadd 	if (tap == NULL)
5509eb6f0de0SAdrian Chadd 		return 0;	/* Not valid; default to not running */
5510eb6f0de0SAdrian Chadd 
5511eb6f0de0SAdrian Chadd 	return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
5512eb6f0de0SAdrian Chadd }
5513eb6f0de0SAdrian Chadd 
5514eb6f0de0SAdrian Chadd /*
5515eb6f0de0SAdrian Chadd  * Is AMPDU-TX negotiation pending?
5516eb6f0de0SAdrian Chadd  */
5517eb6f0de0SAdrian Chadd static int
5518eb6f0de0SAdrian Chadd ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
5519eb6f0de0SAdrian Chadd {
5520eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
5521eb6f0de0SAdrian Chadd 
5522eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
5523eb6f0de0SAdrian Chadd 		return 0;
5524eb6f0de0SAdrian Chadd 
5525eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
5526eb6f0de0SAdrian Chadd 	if (tap == NULL)
5527eb6f0de0SAdrian Chadd 		return 0;	/* Not valid; default to not pending */
5528eb6f0de0SAdrian Chadd 
5529eb6f0de0SAdrian Chadd 	return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
5530eb6f0de0SAdrian Chadd }
5531eb6f0de0SAdrian Chadd 
5532eb6f0de0SAdrian Chadd /*
5533eb6f0de0SAdrian Chadd  * Is AMPDU-TX pending for the given TID?
5534eb6f0de0SAdrian Chadd  */
5535eb6f0de0SAdrian Chadd 
5536eb6f0de0SAdrian Chadd 
5537eb6f0de0SAdrian Chadd /*
5538eb6f0de0SAdrian Chadd  * Method to handle sending an ADDBA request.
5539eb6f0de0SAdrian Chadd  *
5540eb6f0de0SAdrian Chadd  * We tap this so the relevant flags can be set to pause the TID
5541eb6f0de0SAdrian Chadd  * whilst waiting for the response.
5542eb6f0de0SAdrian Chadd  *
5543eb6f0de0SAdrian Chadd  * XXX there's no timeout handler we can override?
5544eb6f0de0SAdrian Chadd  */
5545eb6f0de0SAdrian Chadd int
5546eb6f0de0SAdrian Chadd ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5547eb6f0de0SAdrian Chadd     int dialogtoken, int baparamset, int batimeout)
5548eb6f0de0SAdrian Chadd {
5549eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
55502aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5551eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5552eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
5553eb6f0de0SAdrian Chadd 
5554eb6f0de0SAdrian Chadd 	/*
5555eb6f0de0SAdrian Chadd 	 * XXX danger Will Robinson!
5556eb6f0de0SAdrian Chadd 	 *
5557eb6f0de0SAdrian Chadd 	 * Although the taskqueue may be running and scheduling some more
5558eb6f0de0SAdrian Chadd 	 * packets, these should all be _before_ the addba sequence number.
5559eb6f0de0SAdrian Chadd 	 * However, net80211 will keep self-assigning sequence numbers
5560eb6f0de0SAdrian Chadd 	 * until addba has been negotiated.
5561eb6f0de0SAdrian Chadd 	 *
5562eb6f0de0SAdrian Chadd 	 * In the past, these packets would be "paused" (which still works
5563eb6f0de0SAdrian Chadd 	 * fine, as they're being scheduled to the driver in the same
5564eb6f0de0SAdrian Chadd 	 * serialised method which is calling the addba request routine)
5565eb6f0de0SAdrian Chadd 	 * and when the aggregation session begins, they'll be dequeued
5566eb6f0de0SAdrian Chadd 	 * as aggregate packets and added to the BAW. However, now there's
5567eb6f0de0SAdrian Chadd 	 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
5568eb6f0de0SAdrian Chadd 	 * packets. Thus they never get included in the BAW tracking and
5569eb6f0de0SAdrian Chadd 	 * this can cause the initial burst of packets after the addba
5570eb6f0de0SAdrian Chadd 	 * negotiation to "hang", as they quickly fall outside the BAW.
5571eb6f0de0SAdrian Chadd 	 *
5572eb6f0de0SAdrian Chadd 	 * The "eventual" solution should be to tag these packets with
5573eb6f0de0SAdrian Chadd 	 * dobaw. Although net80211 has given us a sequence number,
5574eb6f0de0SAdrian Chadd 	 * it'll be "after" the left edge of the BAW and thus it'll
5575eb6f0de0SAdrian Chadd 	 * fall within it.
5576eb6f0de0SAdrian Chadd 	 */
5577375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5578d3a6425bSAdrian Chadd 	/*
5579d3a6425bSAdrian Chadd 	 * This is a bit annoying.  Until net80211 HT code inherits some
5580d3a6425bSAdrian Chadd 	 * (any) locking, we may have this called in parallel BUT only
5581d3a6425bSAdrian Chadd 	 * one response/timeout will be called.  Grr.
5582d3a6425bSAdrian Chadd 	 */
5583d3a6425bSAdrian Chadd 	if (atid->addba_tx_pending == 0) {
5584eb6f0de0SAdrian Chadd 		ath_tx_tid_pause(sc, atid);
5585d3a6425bSAdrian Chadd 		atid->addba_tx_pending = 1;
5586d3a6425bSAdrian Chadd 	}
5587375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5588eb6f0de0SAdrian Chadd 
5589eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
55909b48fb4bSAdrian Chadd 	    "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
55919b48fb4bSAdrian Chadd 	    __func__,
55929b48fb4bSAdrian Chadd 	    ni->ni_macaddr,
55939b48fb4bSAdrian Chadd 	    ":",
55949b48fb4bSAdrian Chadd 	    dialogtoken, baparamset, batimeout);
5595eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5596eb6f0de0SAdrian Chadd 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5597eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5598eb6f0de0SAdrian Chadd 
5599eb6f0de0SAdrian Chadd 	return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
5600eb6f0de0SAdrian Chadd 	    batimeout);
5601eb6f0de0SAdrian Chadd }
5602eb6f0de0SAdrian Chadd 
5603eb6f0de0SAdrian Chadd /*
5604eb6f0de0SAdrian Chadd  * Handle an ADDBA response.
5605eb6f0de0SAdrian Chadd  *
5606eb6f0de0SAdrian Chadd  * We unpause the queue so TX'ing can resume.
5607eb6f0de0SAdrian Chadd  *
5608eb6f0de0SAdrian Chadd  * Any packets TX'ed from this point should be "aggregate" (whether
5609eb6f0de0SAdrian Chadd  * aggregate or not) so the BAW is updated.
5610eb6f0de0SAdrian Chadd  *
5611eb6f0de0SAdrian Chadd  * Note! net80211 keeps self-assigning sequence numbers until
5612eb6f0de0SAdrian Chadd  * ampdu is negotiated. This means the initially-negotiated BAW left
5613eb6f0de0SAdrian Chadd  * edge won't match the ni->ni_txseq.
5614eb6f0de0SAdrian Chadd  *
5615eb6f0de0SAdrian Chadd  * So, being very dirty, the BAW left edge is "slid" here to match
5616eb6f0de0SAdrian Chadd  * ni->ni_txseq.
5617eb6f0de0SAdrian Chadd  *
5618eb6f0de0SAdrian Chadd  * What likely SHOULD happen is that all packets subsequent to the
5619eb6f0de0SAdrian Chadd  * addba request should be tagged as aggregate and queued as non-aggregate
5620eb6f0de0SAdrian Chadd  * frames; thus updating the BAW. For now though, I'll just slide the
5621eb6f0de0SAdrian Chadd  * window.
5622eb6f0de0SAdrian Chadd  */
5623eb6f0de0SAdrian Chadd int
5624eb6f0de0SAdrian Chadd ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5625eb6f0de0SAdrian Chadd     int status, int code, int batimeout)
5626eb6f0de0SAdrian Chadd {
5627eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
56282aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5629eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5630eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
5631eb6f0de0SAdrian Chadd 	int r;
5632eb6f0de0SAdrian Chadd 
5633eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
56349b48fb4bSAdrian Chadd 	    "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__,
56359b48fb4bSAdrian Chadd 	    ni->ni_macaddr,
56369b48fb4bSAdrian Chadd 	    ":",
5637eb6f0de0SAdrian Chadd 	    status, code, batimeout);
5638eb6f0de0SAdrian Chadd 
5639eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5640eb6f0de0SAdrian Chadd 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5641eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5642eb6f0de0SAdrian Chadd 
5643eb6f0de0SAdrian Chadd 	/*
5644eb6f0de0SAdrian Chadd 	 * Call this first, so the interface flags get updated
5645eb6f0de0SAdrian Chadd 	 * before the TID is unpaused. Otherwise a race condition
5646eb6f0de0SAdrian Chadd 	 * exists where the unpaused TID still doesn't yet have
5647eb6f0de0SAdrian Chadd 	 * IEEE80211_AGGR_RUNNING set.
5648eb6f0de0SAdrian Chadd 	 */
5649eb6f0de0SAdrian Chadd 	r = sc->sc_addba_response(ni, tap, status, code, batimeout);
5650eb6f0de0SAdrian Chadd 
5651375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5652d3a6425bSAdrian Chadd 	atid->addba_tx_pending = 0;
5653eb6f0de0SAdrian Chadd 	/*
5654eb6f0de0SAdrian Chadd 	 * XXX dirty!
5655eb6f0de0SAdrian Chadd 	 * Slide the BAW left edge to wherever net80211 left it for us.
5656eb6f0de0SAdrian Chadd 	 * Read above for more information.
5657eb6f0de0SAdrian Chadd 	 */
5658eb6f0de0SAdrian Chadd 	tap->txa_start = ni->ni_txseqs[tid];
5659eb6f0de0SAdrian Chadd 	ath_tx_tid_resume(sc, atid);
5660375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5661eb6f0de0SAdrian Chadd 	return r;
5662eb6f0de0SAdrian Chadd }
5663eb6f0de0SAdrian Chadd 
5664eb6f0de0SAdrian Chadd 
5665eb6f0de0SAdrian Chadd /*
5666eb6f0de0SAdrian Chadd  * Stop ADDBA on a queue.
56678405fe86SAdrian Chadd  *
56688405fe86SAdrian Chadd  * This can be called whilst BAR TX is currently active on the queue,
56698405fe86SAdrian Chadd  * so make sure this is unblocked before continuing.
5670eb6f0de0SAdrian Chadd  */
5671eb6f0de0SAdrian Chadd void
5672eb6f0de0SAdrian Chadd ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
5673eb6f0de0SAdrian Chadd {
5674eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
56752aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5676eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5677eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
567822780332SAdrian Chadd 	ath_bufhead bf_cq;
567922780332SAdrian Chadd 	struct ath_buf *bf;
5680eb6f0de0SAdrian Chadd 
56819b48fb4bSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n",
56829b48fb4bSAdrian Chadd 	    __func__,
56839b48fb4bSAdrian Chadd 	    ni->ni_macaddr,
56849b48fb4bSAdrian Chadd 	    ":");
5685eb6f0de0SAdrian Chadd 
56868405fe86SAdrian Chadd 	/*
56878405fe86SAdrian Chadd 	 * Pause TID traffic early, so there aren't any races
56888405fe86SAdrian Chadd 	 * Unblock the pending BAR held traffic, if it's currently paused.
56898405fe86SAdrian Chadd 	 */
5690375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5691eb6f0de0SAdrian Chadd 	ath_tx_tid_pause(sc, atid);
56928405fe86SAdrian Chadd 	if (atid->bar_wait) {
56938405fe86SAdrian Chadd 		/*
56948405fe86SAdrian Chadd 		 * bar_unsuspend() expects bar_tx == 1, as it should be
56958405fe86SAdrian Chadd 		 * called from the TX completion path.  This quietens
56968405fe86SAdrian Chadd 		 * the warning.  It's cleared for us anyway.
56978405fe86SAdrian Chadd 		 */
56988405fe86SAdrian Chadd 		atid->bar_tx = 1;
56998405fe86SAdrian Chadd 		ath_tx_tid_bar_unsuspend(sc, atid);
57008405fe86SAdrian Chadd 	}
5701375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5702eb6f0de0SAdrian Chadd 
5703eb6f0de0SAdrian Chadd 	/* There's no need to hold the TXQ lock here */
5704eb6f0de0SAdrian Chadd 	sc->sc_addba_stop(ni, tap);
5705eb6f0de0SAdrian Chadd 
5706eb6f0de0SAdrian Chadd 	/*
57074dfd4507SAdrian Chadd 	 * ath_tx_tid_cleanup will resume the TID if possible, otherwise
5708eb6f0de0SAdrian Chadd 	 * it'll set the cleanup flag, and it'll be unpaused once
5709eb6f0de0SAdrian Chadd 	 * things have been cleaned up.
5710eb6f0de0SAdrian Chadd 	 */
571122780332SAdrian Chadd 	TAILQ_INIT(&bf_cq);
571222780332SAdrian Chadd 	ATH_TX_LOCK(sc);
571322780332SAdrian Chadd 	ath_tx_tid_cleanup(sc, an, tid, &bf_cq);
571422780332SAdrian Chadd 	ATH_TX_UNLOCK(sc);
571522780332SAdrian Chadd 
571622780332SAdrian Chadd 	/* Handle completing frames and fail them */
571722780332SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
571822780332SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
571922780332SAdrian Chadd 		ath_tx_default_comp(sc, bf, 1);
572022780332SAdrian Chadd 	}
572122a3aee6SAdrian Chadd 
572222780332SAdrian Chadd }
572322780332SAdrian Chadd 
572422780332SAdrian Chadd /*
572522780332SAdrian Chadd  * Handle a node reassociation.
572622780332SAdrian Chadd  *
572722780332SAdrian Chadd  * We may have a bunch of frames queued to the hardware; those need
572822780332SAdrian Chadd  * to be marked as cleanup.
572922780332SAdrian Chadd  */
573022780332SAdrian Chadd void
573122780332SAdrian Chadd ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an)
573222780332SAdrian Chadd {
573322780332SAdrian Chadd 	struct ath_tid *tid;
573422780332SAdrian Chadd 	int i;
573522780332SAdrian Chadd 	ath_bufhead bf_cq;
573622780332SAdrian Chadd 	struct ath_buf *bf;
573722780332SAdrian Chadd 
573822780332SAdrian Chadd 	TAILQ_INIT(&bf_cq);
573922780332SAdrian Chadd 
574022780332SAdrian Chadd 	ATH_TX_UNLOCK_ASSERT(sc);
574122780332SAdrian Chadd 
574222780332SAdrian Chadd 	ATH_TX_LOCK(sc);
574322780332SAdrian Chadd 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
574422780332SAdrian Chadd 		tid = &an->an_tid[i];
574522780332SAdrian Chadd 		if (tid->hwq_depth == 0)
574622780332SAdrian Chadd 			continue;
574722780332SAdrian Chadd 		ath_tx_tid_pause(sc, tid);
574822780332SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_NODE,
574922780332SAdrian Chadd 		    "%s: %6D: TID %d: cleaning up TID\n",
575022780332SAdrian Chadd 		    __func__,
575122780332SAdrian Chadd 		    an->an_node.ni_macaddr,
575222780332SAdrian Chadd 		    ":",
575322780332SAdrian Chadd 		    i);
575422780332SAdrian Chadd 		ath_tx_tid_cleanup(sc, an, i, &bf_cq);
575522780332SAdrian Chadd 	}
575622780332SAdrian Chadd 	ATH_TX_UNLOCK(sc);
575722780332SAdrian Chadd 
575822780332SAdrian Chadd 	/* Handle completing frames and fail them */
575922780332SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
576022780332SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
576122780332SAdrian Chadd 		ath_tx_default_comp(sc, bf, 1);
576222780332SAdrian Chadd 	}
5763eb6f0de0SAdrian Chadd }
5764eb6f0de0SAdrian Chadd 
5765eb6f0de0SAdrian Chadd /*
5766eb6f0de0SAdrian Chadd  * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
5767eb6f0de0SAdrian Chadd  * it simply tears down the aggregation session. Ew.
5768eb6f0de0SAdrian Chadd  *
5769eb6f0de0SAdrian Chadd  * It however will call ieee80211_ampdu_stop() which will call
5770eb6f0de0SAdrian Chadd  * ic->ic_addba_stop().
5771eb6f0de0SAdrian Chadd  *
5772eb6f0de0SAdrian Chadd  * XXX This uses a hard-coded max BAR count value; the whole
5773eb6f0de0SAdrian Chadd  * XXX BAR TX success or failure should be better handled!
5774eb6f0de0SAdrian Chadd  */
5775eb6f0de0SAdrian Chadd void
5776eb6f0de0SAdrian Chadd ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5777eb6f0de0SAdrian Chadd     int status)
5778eb6f0de0SAdrian Chadd {
5779eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
57802aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5781eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5782eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
5783eb6f0de0SAdrian Chadd 	int attempts = tap->txa_attempts;
5784eb6f0de0SAdrian Chadd 
57850e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
57869b48fb4bSAdrian Chadd 	    "%s: %6D: called; tap=%p, atid=%p, txa_tid=%d, atid->tid=%d, status=%d, attempts=%d\n",
57870e22ed0eSAdrian Chadd 	    __func__,
57889b48fb4bSAdrian Chadd 	    ni->ni_macaddr,
57899b48fb4bSAdrian Chadd 	    ":",
5790e60c4fc2SAdrian Chadd 	    tap,
5791e60c4fc2SAdrian Chadd 	    atid,
5792e60c4fc2SAdrian Chadd 	    tap->txa_tid,
5793e60c4fc2SAdrian Chadd 	    atid->tid,
57940e22ed0eSAdrian Chadd 	    status,
57950e22ed0eSAdrian Chadd 	    attempts);
5796eb6f0de0SAdrian Chadd 
5797eb6f0de0SAdrian Chadd 	/* Note: This may update the BAW details */
5798eb6f0de0SAdrian Chadd 	sc->sc_bar_response(ni, tap, status);
5799eb6f0de0SAdrian Chadd 
5800eb6f0de0SAdrian Chadd 	/* Unpause the TID */
5801eb6f0de0SAdrian Chadd 	/*
5802eb6f0de0SAdrian Chadd 	 * XXX if this is attempt=50, the TID will be downgraded
5803eb6f0de0SAdrian Chadd 	 * XXX to a non-aggregate session. So we must unpause the
5804eb6f0de0SAdrian Chadd 	 * XXX TID here or it'll never be done.
5805088d8b81SAdrian Chadd 	 *
5806088d8b81SAdrian Chadd 	 * Also, don't call it if bar_tx/bar_wait are 0; something
5807088d8b81SAdrian Chadd 	 * has beaten us to the punch? (XXX figure out what?)
5808eb6f0de0SAdrian Chadd 	 */
5809eb6f0de0SAdrian Chadd 	if (status == 0 || attempts == 50) {
5810375307d4SAdrian Chadd 		ATH_TX_LOCK(sc);
5811088d8b81SAdrian Chadd 		if (atid->bar_tx == 0 || atid->bar_wait == 0)
5812088d8b81SAdrian Chadd 			device_printf(sc->sc_dev,
5813088d8b81SAdrian Chadd 			    "%s: huh? bar_tx=%d, bar_wait=%d\n",
5814088d8b81SAdrian Chadd 			    __func__,
5815088d8b81SAdrian Chadd 			    atid->bar_tx, atid->bar_wait);
5816088d8b81SAdrian Chadd 		else
581788b3d483SAdrian Chadd 			ath_tx_tid_bar_unsuspend(sc, atid);
5818375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
5819eb6f0de0SAdrian Chadd 	}
5820eb6f0de0SAdrian Chadd }
5821eb6f0de0SAdrian Chadd 
5822eb6f0de0SAdrian Chadd /*
5823eb6f0de0SAdrian Chadd  * This is called whenever the pending ADDBA request times out.
5824eb6f0de0SAdrian Chadd  * Unpause and reschedule the TID.
5825eb6f0de0SAdrian Chadd  */
5826eb6f0de0SAdrian Chadd void
5827eb6f0de0SAdrian Chadd ath_addba_response_timeout(struct ieee80211_node *ni,
5828eb6f0de0SAdrian Chadd     struct ieee80211_tx_ampdu *tap)
5829eb6f0de0SAdrian Chadd {
5830eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
58312aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5832eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5833eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
5834eb6f0de0SAdrian Chadd 
5835eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
58369b48fb4bSAdrian Chadd 	    "%s: %6D: called; resuming\n",
58379b48fb4bSAdrian Chadd 	    __func__,
58389b48fb4bSAdrian Chadd 	    ni->ni_macaddr,
58399b48fb4bSAdrian Chadd 	    ":");
5840eb6f0de0SAdrian Chadd 
5841375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5842d3a6425bSAdrian Chadd 	atid->addba_tx_pending = 0;
5843375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5844d3a6425bSAdrian Chadd 
5845eb6f0de0SAdrian Chadd 	/* Note: This updates the aggregate state to (again) pending */
5846eb6f0de0SAdrian Chadd 	sc->sc_addba_response_timeout(ni, tap);
5847eb6f0de0SAdrian Chadd 
5848eb6f0de0SAdrian Chadd 	/* Unpause the TID; which reschedules it */
5849375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5850eb6f0de0SAdrian Chadd 	ath_tx_tid_resume(sc, atid);
5851375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5852eb6f0de0SAdrian Chadd }
58533fdfc330SAdrian Chadd 
58540eb81626SAdrian Chadd /*
58550eb81626SAdrian Chadd  * Check if a node is asleep or not.
58560eb81626SAdrian Chadd  */
5857548a605dSAdrian Chadd int
58580eb81626SAdrian Chadd ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an)
58590eb81626SAdrian Chadd {
58600eb81626SAdrian Chadd 
586122780332SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
58620eb81626SAdrian Chadd 
58630eb81626SAdrian Chadd 	return (an->an_is_powersave);
58640eb81626SAdrian Chadd }
58650eb81626SAdrian Chadd 
58660eb81626SAdrian Chadd /*
58670eb81626SAdrian Chadd  * Mark a node as currently "in powersaving."
58680eb81626SAdrian Chadd  * This suspends all traffic on the node.
58690eb81626SAdrian Chadd  *
58700eb81626SAdrian Chadd  * This must be called with the node/tx locks free.
58710eb81626SAdrian Chadd  *
58720eb81626SAdrian Chadd  * XXX TODO: the locking silliness below is due to how the node
58730eb81626SAdrian Chadd  * locking currently works.  Right now, the node lock is grabbed
58740eb81626SAdrian Chadd  * to do rate control lookups and these are done with the TX
58750eb81626SAdrian Chadd  * queue lock held.  This means the node lock can't be grabbed
58760eb81626SAdrian Chadd  * first here or a LOR will occur.
58770eb81626SAdrian Chadd  *
58780eb81626SAdrian Chadd  * Eventually (hopefully!) the TX path code will only grab
58790eb81626SAdrian Chadd  * the TXQ lock when transmitting and the ath_node lock when
58800eb81626SAdrian Chadd  * doing node/TID operations.  There are other complications -
58810eb81626SAdrian Chadd  * the sched/unsched operations involve walking the per-txq
58820eb81626SAdrian Chadd  * 'active tid' list and this requires both locks to be held.
58830eb81626SAdrian Chadd  */
58840eb81626SAdrian Chadd void
58850eb81626SAdrian Chadd ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an)
58860eb81626SAdrian Chadd {
58870eb81626SAdrian Chadd 	struct ath_tid *atid;
58880eb81626SAdrian Chadd 	struct ath_txq *txq;
58890eb81626SAdrian Chadd 	int tid;
58900eb81626SAdrian Chadd 
589122780332SAdrian Chadd 	ATH_TX_UNLOCK_ASSERT(sc);
58920eb81626SAdrian Chadd 
58930eb81626SAdrian Chadd 	/* Suspend all traffic on the node */
5894375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
589522a3aee6SAdrian Chadd 
589622a3aee6SAdrian Chadd 	if (an->an_is_powersave) {
589722a3aee6SAdrian Chadd 		device_printf(sc->sc_dev,
589822a3aee6SAdrian Chadd 		    "%s: %6D: node was already asleep!\n",
589922a3aee6SAdrian Chadd 		    __func__,
590022a3aee6SAdrian Chadd 		    an->an_node.ni_macaddr,
590122a3aee6SAdrian Chadd 		    ":");
590222a3aee6SAdrian Chadd 		ATH_TX_UNLOCK(sc);
590322a3aee6SAdrian Chadd 		return;
590422a3aee6SAdrian Chadd 	}
590522a3aee6SAdrian Chadd 
59060eb81626SAdrian Chadd 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
59070eb81626SAdrian Chadd 		atid = &an->an_tid[tid];
59080eb81626SAdrian Chadd 		txq = sc->sc_ac2q[atid->ac];
59090eb81626SAdrian Chadd 
59100eb81626SAdrian Chadd 		ath_tx_tid_pause(sc, atid);
59110eb81626SAdrian Chadd 	}
59120eb81626SAdrian Chadd 
59130eb81626SAdrian Chadd 	/* Mark node as in powersaving */
59140eb81626SAdrian Chadd 	an->an_is_powersave = 1;
59150eb81626SAdrian Chadd 
591622780332SAdrian Chadd 	ATH_TX_UNLOCK(sc);
59170eb81626SAdrian Chadd }
59180eb81626SAdrian Chadd 
59190eb81626SAdrian Chadd /*
59200eb81626SAdrian Chadd  * Mark a node as currently "awake."
59210eb81626SAdrian Chadd  * This resumes all traffic to the node.
59220eb81626SAdrian Chadd  */
59230eb81626SAdrian Chadd void
59240eb81626SAdrian Chadd ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an)
59250eb81626SAdrian Chadd {
59260eb81626SAdrian Chadd 	struct ath_tid *atid;
59270eb81626SAdrian Chadd 	struct ath_txq *txq;
59280eb81626SAdrian Chadd 	int tid;
59290eb81626SAdrian Chadd 
593022780332SAdrian Chadd 	ATH_TX_UNLOCK_ASSERT(sc);
593122780332SAdrian Chadd 
593222780332SAdrian Chadd 	ATH_TX_LOCK(sc);
59330eb81626SAdrian Chadd 
593422a3aee6SAdrian Chadd 	/* !? */
59350eb81626SAdrian Chadd 	if (an->an_is_powersave == 0) {
593622780332SAdrian Chadd 		ATH_TX_UNLOCK(sc);
59370eb81626SAdrian Chadd 		device_printf(sc->sc_dev,
59380eb81626SAdrian Chadd 		    "%s: an=%p: node was already awake\n",
59390eb81626SAdrian Chadd 		    __func__, an);
59400eb81626SAdrian Chadd 		return;
59410eb81626SAdrian Chadd 	}
59420eb81626SAdrian Chadd 
59430eb81626SAdrian Chadd 	/* Mark node as awake */
59440eb81626SAdrian Chadd 	an->an_is_powersave = 0;
594522a3aee6SAdrian Chadd 	/*
594622a3aee6SAdrian Chadd 	 * Clear any pending leaked frame requests
594722a3aee6SAdrian Chadd 	 */
594822a3aee6SAdrian Chadd 	an->an_leak_count = 0;
59490eb81626SAdrian Chadd 
59500eb81626SAdrian Chadd 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
59510eb81626SAdrian Chadd 		atid = &an->an_tid[tid];
59520eb81626SAdrian Chadd 		txq = sc->sc_ac2q[atid->ac];
59530eb81626SAdrian Chadd 
59540eb81626SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
59550eb81626SAdrian Chadd 	}
5956375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
59570eb81626SAdrian Chadd }
59580eb81626SAdrian Chadd 
59593fdfc330SAdrian Chadd static int
59603fdfc330SAdrian Chadd ath_legacy_dma_txsetup(struct ath_softc *sc)
59613fdfc330SAdrian Chadd {
59623fdfc330SAdrian Chadd 
59633fdfc330SAdrian Chadd 	/* nothing new needed */
59643fdfc330SAdrian Chadd 	return (0);
59653fdfc330SAdrian Chadd }
59663fdfc330SAdrian Chadd 
59673fdfc330SAdrian Chadd static int
59683fdfc330SAdrian Chadd ath_legacy_dma_txteardown(struct ath_softc *sc)
59693fdfc330SAdrian Chadd {
59703fdfc330SAdrian Chadd 
59713fdfc330SAdrian Chadd 	/* nothing new needed */
59723fdfc330SAdrian Chadd 	return (0);
59733fdfc330SAdrian Chadd }
59743fdfc330SAdrian Chadd 
59753fdfc330SAdrian Chadd void
59763fdfc330SAdrian Chadd ath_xmit_setup_legacy(struct ath_softc *sc)
59773fdfc330SAdrian Chadd {
59781006fc0cSAdrian Chadd 	/*
59791006fc0cSAdrian Chadd 	 * For now, just set the descriptor length to sizeof(ath_desc);
59801006fc0cSAdrian Chadd 	 * worry about extracting the real length out of the HAL later.
59811006fc0cSAdrian Chadd 	 */
59821006fc0cSAdrian Chadd 	sc->sc_tx_desclen = sizeof(struct ath_desc);
5983bb327d28SAdrian Chadd 	sc->sc_tx_statuslen = sizeof(struct ath_desc);
59841006fc0cSAdrian Chadd 	sc->sc_tx_nmaps = 1;	/* only one buffer per TX desc */
59853fdfc330SAdrian Chadd 
59863fdfc330SAdrian Chadd 	sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
59873fdfc330SAdrian Chadd 	sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
5988f8418db5SAdrian Chadd 	sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func;
5989746bab5bSAdrian Chadd 
5990746bab5bSAdrian Chadd 	sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
5991746bab5bSAdrian Chadd 	sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
5992788e6aa9SAdrian Chadd 
5993788e6aa9SAdrian Chadd 	sc->sc_tx.xmit_drain = ath_legacy_tx_drain;
59943fdfc330SAdrian Chadd }
5995