1b8e788a5SAdrian Chadd /*- 2b8e788a5SAdrian Chadd * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3c6e9cee2SAdrian Chadd * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 4b8e788a5SAdrian Chadd * All rights reserved. 5b8e788a5SAdrian Chadd * 6b8e788a5SAdrian Chadd * Redistribution and use in source and binary forms, with or without 7b8e788a5SAdrian Chadd * modification, are permitted provided that the following conditions 8b8e788a5SAdrian Chadd * are met: 9b8e788a5SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 10b8e788a5SAdrian Chadd * notice, this list of conditions and the following disclaimer, 11b8e788a5SAdrian Chadd * without modification. 12b8e788a5SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13b8e788a5SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14b8e788a5SAdrian Chadd * redistribution must be conditioned upon including a substantially 15b8e788a5SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 16b8e788a5SAdrian Chadd * 17b8e788a5SAdrian Chadd * NO WARRANTY 18b8e788a5SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19b8e788a5SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20b8e788a5SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21b8e788a5SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22b8e788a5SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23b8e788a5SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24b8e788a5SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25b8e788a5SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26b8e788a5SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27b8e788a5SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28b8e788a5SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 29b8e788a5SAdrian Chadd */ 30b8e788a5SAdrian Chadd 31b8e788a5SAdrian Chadd #include <sys/cdefs.h> 32b8e788a5SAdrian Chadd __FBSDID("$FreeBSD$"); 33b8e788a5SAdrian Chadd 34b8e788a5SAdrian Chadd /* 35b8e788a5SAdrian Chadd * Driver for the Atheros Wireless LAN controller. 36b8e788a5SAdrian Chadd * 37b8e788a5SAdrian Chadd * This software is derived from work of Atsushi Onoe; his contribution 38b8e788a5SAdrian Chadd * is greatly appreciated. 39b8e788a5SAdrian Chadd */ 40b8e788a5SAdrian Chadd 41b8e788a5SAdrian Chadd #include "opt_inet.h" 42b8e788a5SAdrian Chadd #include "opt_ath.h" 43b8e788a5SAdrian Chadd #include "opt_wlan.h" 44b8e788a5SAdrian Chadd 45b8e788a5SAdrian Chadd #include <sys/param.h> 46b8e788a5SAdrian Chadd #include <sys/systm.h> 47b8e788a5SAdrian Chadd #include <sys/sysctl.h> 48b8e788a5SAdrian Chadd #include <sys/mbuf.h> 49b8e788a5SAdrian Chadd #include <sys/malloc.h> 50b8e788a5SAdrian Chadd #include <sys/lock.h> 51b8e788a5SAdrian Chadd #include <sys/mutex.h> 52b8e788a5SAdrian Chadd #include <sys/kernel.h> 53b8e788a5SAdrian Chadd #include <sys/socket.h> 54b8e788a5SAdrian Chadd #include <sys/sockio.h> 55b8e788a5SAdrian Chadd #include <sys/errno.h> 56b8e788a5SAdrian Chadd #include <sys/callout.h> 57b8e788a5SAdrian Chadd #include <sys/bus.h> 58b8e788a5SAdrian Chadd #include <sys/endian.h> 59b8e788a5SAdrian Chadd #include <sys/kthread.h> 60b8e788a5SAdrian Chadd #include <sys/taskqueue.h> 61b8e788a5SAdrian Chadd #include <sys/priv.h> 62b8e788a5SAdrian Chadd 63b8e788a5SAdrian Chadd #include <machine/bus.h> 64b8e788a5SAdrian Chadd 65b8e788a5SAdrian Chadd #include <net/if.h> 66b8e788a5SAdrian Chadd #include <net/if_dl.h> 67b8e788a5SAdrian Chadd #include <net/if_media.h> 68b8e788a5SAdrian Chadd #include <net/if_types.h> 69b8e788a5SAdrian Chadd #include <net/if_arp.h> 70b8e788a5SAdrian Chadd #include <net/ethernet.h> 71b8e788a5SAdrian Chadd #include <net/if_llc.h> 72b8e788a5SAdrian Chadd 73b8e788a5SAdrian Chadd #include <net80211/ieee80211_var.h> 74b8e788a5SAdrian Chadd #include <net80211/ieee80211_regdomain.h> 75b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_SUPERG 76b8e788a5SAdrian Chadd #include <net80211/ieee80211_superg.h> 77b8e788a5SAdrian Chadd #endif 78b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 79b8e788a5SAdrian Chadd #include <net80211/ieee80211_tdma.h> 80b8e788a5SAdrian Chadd #endif 81eb6f0de0SAdrian Chadd #include <net80211/ieee80211_ht.h> 82b8e788a5SAdrian Chadd 83b8e788a5SAdrian Chadd #include <net/bpf.h> 84b8e788a5SAdrian Chadd 85b8e788a5SAdrian Chadd #ifdef INET 86b8e788a5SAdrian Chadd #include <netinet/in.h> 87b8e788a5SAdrian Chadd #include <netinet/if_ether.h> 88b8e788a5SAdrian Chadd #endif 89b8e788a5SAdrian Chadd 90b8e788a5SAdrian Chadd #include <dev/ath/if_athvar.h> 91b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 92b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_diagcodes.h> 93b8e788a5SAdrian Chadd 94b8e788a5SAdrian Chadd #include <dev/ath/if_ath_debug.h> 95b8e788a5SAdrian Chadd 96b8e788a5SAdrian Chadd #ifdef ATH_TX99_DIAG 97b8e788a5SAdrian Chadd #include <dev/ath/ath_tx99/ath_tx99.h> 98b8e788a5SAdrian Chadd #endif 99b8e788a5SAdrian Chadd 100b8e788a5SAdrian Chadd #include <dev/ath/if_ath_misc.h> 101b8e788a5SAdrian Chadd #include <dev/ath/if_ath_tx.h> 102c1782ce0SAdrian Chadd #include <dev/ath/if_ath_tx_ht.h> 103b8e788a5SAdrian Chadd 104b69b0dccSAdrian Chadd #ifdef ATH_DEBUG_ALQ 105b69b0dccSAdrian Chadd #include <dev/ath/if_ath_alq.h> 106b69b0dccSAdrian Chadd #endif 107b69b0dccSAdrian Chadd 10881a82688SAdrian Chadd /* 109eb6f0de0SAdrian Chadd * How many retries to perform in software 110eb6f0de0SAdrian Chadd */ 111eb6f0de0SAdrian Chadd #define SWMAX_RETRIES 10 112eb6f0de0SAdrian Chadd 1137403d1b9SAdrian Chadd /* 1147403d1b9SAdrian Chadd * What queue to throw the non-QoS TID traffic into 1157403d1b9SAdrian Chadd */ 1167403d1b9SAdrian Chadd #define ATH_NONQOS_TID_AC WME_AC_VO 1177403d1b9SAdrian Chadd 1180eb81626SAdrian Chadd #if 0 1190eb81626SAdrian Chadd static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an); 1200eb81626SAdrian Chadd #endif 121eb6f0de0SAdrian Chadd static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, 122eb6f0de0SAdrian Chadd int tid); 123eb6f0de0SAdrian Chadd static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, 124eb6f0de0SAdrian Chadd int tid); 125a108d2d6SAdrian Chadd static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc, 126a108d2d6SAdrian Chadd struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0); 127eb6f0de0SAdrian Chadd static int ath_tx_action_frame_override_queue(struct ath_softc *sc, 128eb6f0de0SAdrian Chadd struct ieee80211_node *ni, struct mbuf *m0, int *tid); 129f1bc738eSAdrian Chadd static struct ath_buf * 130f1bc738eSAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 131f1bc738eSAdrian Chadd struct ath_tid *tid, struct ath_buf *bf); 132eb6f0de0SAdrian Chadd 133bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 134bb327d28SAdrian Chadd void 135bb327d28SAdrian Chadd ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first) 136bb327d28SAdrian Chadd { 137bb327d28SAdrian Chadd struct ath_buf *bf; 138bb327d28SAdrian Chadd int i, n; 139bb327d28SAdrian Chadd const char *ds; 140bb327d28SAdrian Chadd 141bb327d28SAdrian Chadd /* XXX we should skip out early if debugging isn't enabled! */ 142bb327d28SAdrian Chadd bf = bf_first; 143bb327d28SAdrian Chadd 144bb327d28SAdrian Chadd while (bf != NULL) { 145bb327d28SAdrian Chadd /* XXX should ensure bf_nseg > 0! */ 146bb327d28SAdrian Chadd if (bf->bf_nseg == 0) 147bb327d28SAdrian Chadd break; 148bb327d28SAdrian Chadd n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1; 149bb327d28SAdrian Chadd for (i = 0, ds = (const char *) bf->bf_desc; 150bb327d28SAdrian Chadd i < n; 151bb327d28SAdrian Chadd i++, ds += sc->sc_tx_desclen) { 152bb327d28SAdrian Chadd if_ath_alq_post(&sc->sc_alq, 153bb327d28SAdrian Chadd ATH_ALQ_EDMA_TXDESC, 154bb327d28SAdrian Chadd sc->sc_tx_desclen, 155bb327d28SAdrian Chadd ds); 156bb327d28SAdrian Chadd } 157bb327d28SAdrian Chadd bf = bf->bf_next; 158bb327d28SAdrian Chadd } 159bb327d28SAdrian Chadd } 160bb327d28SAdrian Chadd #endif /* ATH_DEBUG_ALQ */ 161bb327d28SAdrian Chadd 162eb6f0de0SAdrian Chadd /* 16381a82688SAdrian Chadd * Whether to use the 11n rate scenario functions or not 16481a82688SAdrian Chadd */ 16581a82688SAdrian Chadd static inline int 16681a82688SAdrian Chadd ath_tx_is_11n(struct ath_softc *sc) 16781a82688SAdrian Chadd { 1684ddf2cc3SAdrian Chadd return ((sc->sc_ah->ah_magic == 0x20065416) || 1694ddf2cc3SAdrian Chadd (sc->sc_ah->ah_magic == 0x19741014)); 17081a82688SAdrian Chadd } 17181a82688SAdrian Chadd 172eb6f0de0SAdrian Chadd /* 173eb6f0de0SAdrian Chadd * Obtain the current TID from the given frame. 174eb6f0de0SAdrian Chadd * 175eb6f0de0SAdrian Chadd * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.) 176eb6f0de0SAdrian Chadd * This has implications for which AC/priority the packet is placed 177eb6f0de0SAdrian Chadd * in. 178eb6f0de0SAdrian Chadd */ 179eb6f0de0SAdrian Chadd static int 180eb6f0de0SAdrian Chadd ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0) 181eb6f0de0SAdrian Chadd { 182eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 183eb6f0de0SAdrian Chadd int pri = M_WME_GETAC(m0); 184eb6f0de0SAdrian Chadd 185eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 186eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 187eb6f0de0SAdrian Chadd return IEEE80211_NONQOS_TID; 188eb6f0de0SAdrian Chadd else 189eb6f0de0SAdrian Chadd return WME_AC_TO_TID(pri); 190eb6f0de0SAdrian Chadd } 191eb6f0de0SAdrian Chadd 192f1bc738eSAdrian Chadd static void 193f1bc738eSAdrian Chadd ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf) 194f1bc738eSAdrian Chadd { 195f1bc738eSAdrian Chadd struct ieee80211_frame *wh; 196f1bc738eSAdrian Chadd 197f1bc738eSAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 198f1bc738eSAdrian Chadd /* Only update/resync if needed */ 199f1bc738eSAdrian Chadd if (bf->bf_state.bfs_isretried == 0) { 200f1bc738eSAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_RETRY; 201f1bc738eSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 202f1bc738eSAdrian Chadd BUS_DMASYNC_PREWRITE); 203f1bc738eSAdrian Chadd } 204f1bc738eSAdrian Chadd bf->bf_state.bfs_isretried = 1; 205f1bc738eSAdrian Chadd bf->bf_state.bfs_retries ++; 206f1bc738eSAdrian Chadd } 207f1bc738eSAdrian Chadd 208eb6f0de0SAdrian Chadd /* 209eb6f0de0SAdrian Chadd * Determine what the correct AC queue for the given frame 210eb6f0de0SAdrian Chadd * should be. 211eb6f0de0SAdrian Chadd * 212eb6f0de0SAdrian Chadd * This code assumes that the TIDs map consistently to 213eb6f0de0SAdrian Chadd * the underlying hardware (or software) ath_txq. 214eb6f0de0SAdrian Chadd * Since the sender may try to set an AC which is 215eb6f0de0SAdrian Chadd * arbitrary, non-QoS TIDs may end up being put on 216eb6f0de0SAdrian Chadd * completely different ACs. There's no way to put a 217eb6f0de0SAdrian Chadd * TID into multiple ath_txq's for scheduling, so 218eb6f0de0SAdrian Chadd * for now we override the AC/TXQ selection and set 219eb6f0de0SAdrian Chadd * non-QOS TID frames into the BE queue. 220eb6f0de0SAdrian Chadd * 221eb6f0de0SAdrian Chadd * This may be completely incorrect - specifically, 222eb6f0de0SAdrian Chadd * some management frames may end up out of order 223eb6f0de0SAdrian Chadd * compared to the QoS traffic they're controlling. 224eb6f0de0SAdrian Chadd * I'll look into this later. 225eb6f0de0SAdrian Chadd */ 226eb6f0de0SAdrian Chadd static int 227eb6f0de0SAdrian Chadd ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0) 228eb6f0de0SAdrian Chadd { 229eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 230eb6f0de0SAdrian Chadd int pri = M_WME_GETAC(m0); 231eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 232eb6f0de0SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh)) 233eb6f0de0SAdrian Chadd return pri; 234eb6f0de0SAdrian Chadd 2357403d1b9SAdrian Chadd return ATH_NONQOS_TID_AC; 236eb6f0de0SAdrian Chadd } 237eb6f0de0SAdrian Chadd 238b8e788a5SAdrian Chadd void 239b8e788a5SAdrian Chadd ath_txfrag_cleanup(struct ath_softc *sc, 240b8e788a5SAdrian Chadd ath_bufhead *frags, struct ieee80211_node *ni) 241b8e788a5SAdrian Chadd { 242b8e788a5SAdrian Chadd struct ath_buf *bf, *next; 243b8e788a5SAdrian Chadd 244b8e788a5SAdrian Chadd ATH_TXBUF_LOCK_ASSERT(sc); 245b8e788a5SAdrian Chadd 2466b349e5aSAdrian Chadd TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) { 247b8e788a5SAdrian Chadd /* NB: bf assumed clean */ 2486b349e5aSAdrian Chadd TAILQ_REMOVE(frags, bf, bf_list); 249e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 250b8e788a5SAdrian Chadd ieee80211_node_decref(ni); 251b8e788a5SAdrian Chadd } 252b8e788a5SAdrian Chadd } 253b8e788a5SAdrian Chadd 254b8e788a5SAdrian Chadd /* 255b8e788a5SAdrian Chadd * Setup xmit of a fragmented frame. Allocate a buffer 256b8e788a5SAdrian Chadd * for each frag and bump the node reference count to 257b8e788a5SAdrian Chadd * reflect the held reference to be setup by ath_tx_start. 258b8e788a5SAdrian Chadd */ 259b8e788a5SAdrian Chadd int 260b8e788a5SAdrian Chadd ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags, 261b8e788a5SAdrian Chadd struct mbuf *m0, struct ieee80211_node *ni) 262b8e788a5SAdrian Chadd { 263b8e788a5SAdrian Chadd struct mbuf *m; 264b8e788a5SAdrian Chadd struct ath_buf *bf; 265b8e788a5SAdrian Chadd 266b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 267b8e788a5SAdrian Chadd for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) { 268af33d486SAdrian Chadd /* XXX non-management? */ 269af33d486SAdrian Chadd bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL); 270b8e788a5SAdrian Chadd if (bf == NULL) { /* out of buffers, cleanup */ 271b43facbfSAdrian Chadd device_printf(sc->sc_dev, "%s: no buffer?\n", 272b43facbfSAdrian Chadd __func__); 273b8e788a5SAdrian Chadd ath_txfrag_cleanup(sc, frags, ni); 274b8e788a5SAdrian Chadd break; 275b8e788a5SAdrian Chadd } 276b8e788a5SAdrian Chadd ieee80211_node_incref(ni); 2776b349e5aSAdrian Chadd TAILQ_INSERT_TAIL(frags, bf, bf_list); 278b8e788a5SAdrian Chadd } 279b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 280b8e788a5SAdrian Chadd 2816b349e5aSAdrian Chadd return !TAILQ_EMPTY(frags); 282b8e788a5SAdrian Chadd } 283b8e788a5SAdrian Chadd 284b8e788a5SAdrian Chadd /* 285b8e788a5SAdrian Chadd * Reclaim mbuf resources. For fragmented frames we 286b8e788a5SAdrian Chadd * need to claim each frag chained with m_nextpkt. 287b8e788a5SAdrian Chadd */ 288b8e788a5SAdrian Chadd void 289b8e788a5SAdrian Chadd ath_freetx(struct mbuf *m) 290b8e788a5SAdrian Chadd { 291b8e788a5SAdrian Chadd struct mbuf *next; 292b8e788a5SAdrian Chadd 293b8e788a5SAdrian Chadd do { 294b8e788a5SAdrian Chadd next = m->m_nextpkt; 295b8e788a5SAdrian Chadd m->m_nextpkt = NULL; 296b8e788a5SAdrian Chadd m_freem(m); 297b8e788a5SAdrian Chadd } while ((m = next) != NULL); 298b8e788a5SAdrian Chadd } 299b8e788a5SAdrian Chadd 300b8e788a5SAdrian Chadd static int 301b8e788a5SAdrian Chadd ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0) 302b8e788a5SAdrian Chadd { 303b8e788a5SAdrian Chadd struct mbuf *m; 304b8e788a5SAdrian Chadd int error; 305b8e788a5SAdrian Chadd 306b8e788a5SAdrian Chadd /* 307b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 308b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 309b8e788a5SAdrian Chadd */ 310b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 311b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 312b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 313b8e788a5SAdrian Chadd if (error == EFBIG) { 314b8e788a5SAdrian Chadd /* XXX packet requires too many descriptors */ 31509067b6eSAdrian Chadd bf->bf_nseg = ATH_MAX_SCATTER + 1; 316b8e788a5SAdrian Chadd } else if (error != 0) { 317b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 318b8e788a5SAdrian Chadd ath_freetx(m0); 319b8e788a5SAdrian Chadd return error; 320b8e788a5SAdrian Chadd } 321b8e788a5SAdrian Chadd /* 322b8e788a5SAdrian Chadd * Discard null packets and check for packets that 323b8e788a5SAdrian Chadd * require too many TX descriptors. We try to convert 324b8e788a5SAdrian Chadd * the latter to a cluster. 325b8e788a5SAdrian Chadd */ 32609067b6eSAdrian Chadd if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */ 327b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_linear++; 32809067b6eSAdrian Chadd m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER); 329b8e788a5SAdrian Chadd if (m == NULL) { 330b8e788a5SAdrian Chadd ath_freetx(m0); 331b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nombuf++; 332b8e788a5SAdrian Chadd return ENOMEM; 333b8e788a5SAdrian Chadd } 334b8e788a5SAdrian Chadd m0 = m; 335b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 336b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 337b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 338b8e788a5SAdrian Chadd if (error != 0) { 339b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 340b8e788a5SAdrian Chadd ath_freetx(m0); 341b8e788a5SAdrian Chadd return error; 342b8e788a5SAdrian Chadd } 34309067b6eSAdrian Chadd KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER, 344b8e788a5SAdrian Chadd ("too many segments after defrag; nseg %u", bf->bf_nseg)); 345b8e788a5SAdrian Chadd } else if (bf->bf_nseg == 0) { /* null packet, discard */ 346b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nodata++; 347b8e788a5SAdrian Chadd ath_freetx(m0); 348b8e788a5SAdrian Chadd return EIO; 349b8e788a5SAdrian Chadd } 350b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n", 351b8e788a5SAdrian Chadd __func__, m0, m0->m_pkthdr.len); 352b8e788a5SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 353b8e788a5SAdrian Chadd bf->bf_m = m0; 354b8e788a5SAdrian Chadd 355b8e788a5SAdrian Chadd return 0; 356b8e788a5SAdrian Chadd } 357b8e788a5SAdrian Chadd 3586edf1dc7SAdrian Chadd /* 3596e84772fSAdrian Chadd * Chain together segments+descriptors for a frame - 11n or otherwise. 3606e84772fSAdrian Chadd * 3616e84772fSAdrian Chadd * For aggregates, this is called on each frame in the aggregate. 3626edf1dc7SAdrian Chadd */ 363b8e788a5SAdrian Chadd static void 3646e84772fSAdrian Chadd ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0, 3656e84772fSAdrian Chadd struct ath_buf *bf, int is_aggr, int is_first_subframe, 3666e84772fSAdrian Chadd int is_last_subframe) 367b8e788a5SAdrian Chadd { 368b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 3696e84772fSAdrian Chadd char *ds; 3702b200bb4SAdrian Chadd int i, bp, dsp; 37146634305SAdrian Chadd HAL_DMA_ADDR bufAddrList[4]; 37246634305SAdrian Chadd uint32_t segLenList[4]; 3732b200bb4SAdrian Chadd int numTxMaps = 1; 374e2137b86SAdrian Chadd int isFirstDesc = 1; 37546634305SAdrian Chadd 3763d9b1596SAdrian Chadd /* 3773d9b1596SAdrian Chadd * XXX There's txdma and txdma_mgmt; the descriptor 3783d9b1596SAdrian Chadd * sizes must match. 3793d9b1596SAdrian Chadd */ 3803d9b1596SAdrian Chadd struct ath_descdma *dd = &sc->sc_txdma; 381b8e788a5SAdrian Chadd 382b8e788a5SAdrian Chadd /* 383b8e788a5SAdrian Chadd * Fillin the remainder of the descriptor info. 384b8e788a5SAdrian Chadd */ 38546634305SAdrian Chadd 3862b200bb4SAdrian Chadd /* 387378a752fSAdrian Chadd * We need the number of TX data pointers in each descriptor. 388378a752fSAdrian Chadd * EDMA and later chips support 4 TX buffers per descriptor; 389378a752fSAdrian Chadd * previous chips just support one. 3902b200bb4SAdrian Chadd */ 391378a752fSAdrian Chadd numTxMaps = sc->sc_tx_nmaps; 3922b200bb4SAdrian Chadd 3932b200bb4SAdrian Chadd /* 3942b200bb4SAdrian Chadd * For EDMA and later chips ensure the TX map is fully populated 3952b200bb4SAdrian Chadd * before advancing to the next descriptor. 3962b200bb4SAdrian Chadd */ 3976e84772fSAdrian Chadd ds = (char *) bf->bf_desc; 3982b200bb4SAdrian Chadd bp = dsp = 0; 3992b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 4002b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 4012b200bb4SAdrian Chadd for (i = 0; i < bf->bf_nseg; i++) { 4022b200bb4SAdrian Chadd bufAddrList[bp] = bf->bf_segs[i].ds_addr; 4032b200bb4SAdrian Chadd segLenList[bp] = bf->bf_segs[i].ds_len; 4042b200bb4SAdrian Chadd bp++; 4052b200bb4SAdrian Chadd 4062b200bb4SAdrian Chadd /* 4072b200bb4SAdrian Chadd * Go to the next segment if this isn't the last segment 4082b200bb4SAdrian Chadd * and there's space in the current TX map. 4092b200bb4SAdrian Chadd */ 4102b200bb4SAdrian Chadd if ((i != bf->bf_nseg - 1) && (bp < numTxMaps)) 4112b200bb4SAdrian Chadd continue; 4122b200bb4SAdrian Chadd 4132b200bb4SAdrian Chadd /* 4142b200bb4SAdrian Chadd * Last segment or we're out of buffer pointers. 4152b200bb4SAdrian Chadd */ 4162b200bb4SAdrian Chadd bp = 0; 41746634305SAdrian Chadd 418b8e788a5SAdrian Chadd if (i == bf->bf_nseg - 1) 41942083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 420b8e788a5SAdrian Chadd else 42142083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 4222b200bb4SAdrian Chadd bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 42346634305SAdrian Chadd 42446634305SAdrian Chadd /* 425fc56c9c5SAdrian Chadd * XXX This assumes that bfs_txq is the actual destination 426fc56c9c5SAdrian Chadd * hardware queue at this point. It may not have been 427fc56c9c5SAdrian Chadd * assigned, it may actually be pointing to the multicast 428fc56c9c5SAdrian Chadd * software TXQ id. These must be fixed! 42946634305SAdrian Chadd */ 43042083b3dSAdrian Chadd ath_hal_filltxdesc(ah, (struct ath_desc *) ds 43146634305SAdrian Chadd , bufAddrList 43246634305SAdrian Chadd , segLenList 4332b200bb4SAdrian Chadd , bf->bf_descid /* XXX desc id */ 434fc56c9c5SAdrian Chadd , bf->bf_state.bfs_tx_queue 435e2137b86SAdrian Chadd , isFirstDesc /* first segment */ 436b8e788a5SAdrian Chadd , i == bf->bf_nseg - 1 /* last segment */ 43742083b3dSAdrian Chadd , (struct ath_desc *) ds0 /* first descriptor */ 438b8e788a5SAdrian Chadd ); 43921840808SAdrian Chadd 4406e84772fSAdrian Chadd /* 4416e84772fSAdrian Chadd * Make sure the 11n aggregate fields are cleared. 4426e84772fSAdrian Chadd * 4436e84772fSAdrian Chadd * XXX TODO: this doesn't need to be called for 4446e84772fSAdrian Chadd * aggregate frames; as it'll be called on all 4456e84772fSAdrian Chadd * sub-frames. Since the descriptors are in 4466e84772fSAdrian Chadd * non-cacheable memory, this leads to some 4476e84772fSAdrian Chadd * rather slow writes on MIPS/ARM platforms. 4486e84772fSAdrian Chadd */ 44921840808SAdrian Chadd if (ath_tx_is_11n(sc)) 4505d9b19f7SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds); 45121840808SAdrian Chadd 4526e84772fSAdrian Chadd /* 4536e84772fSAdrian Chadd * If 11n is enabled, set it up as if it's an aggregate 4546e84772fSAdrian Chadd * frame. 4556e84772fSAdrian Chadd */ 4566e84772fSAdrian Chadd if (is_last_subframe) { 4576e84772fSAdrian Chadd ath_hal_set11n_aggr_last(sc->sc_ah, 4586e84772fSAdrian Chadd (struct ath_desc *) ds); 4596e84772fSAdrian Chadd } else if (is_aggr) { 4606e84772fSAdrian Chadd /* 4616e84772fSAdrian Chadd * This clears the aggrlen field; so 4626e84772fSAdrian Chadd * the caller needs to call set_aggr_first()! 4636e84772fSAdrian Chadd * 4646e84772fSAdrian Chadd * XXX TODO: don't call this for the first 4656e84772fSAdrian Chadd * descriptor in the first frame in an 4666e84772fSAdrian Chadd * aggregate! 4676e84772fSAdrian Chadd */ 4686e84772fSAdrian Chadd ath_hal_set11n_aggr_middle(sc->sc_ah, 4696e84772fSAdrian Chadd (struct ath_desc *) ds, 4706e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 4716e84772fSAdrian Chadd } 472e2137b86SAdrian Chadd isFirstDesc = 0; 47342083b3dSAdrian Chadd bf->bf_lastds = (struct ath_desc *) ds; 4742b200bb4SAdrian Chadd 4752b200bb4SAdrian Chadd /* 4762b200bb4SAdrian Chadd * Don't forget to skip to the next descriptor. 4772b200bb4SAdrian Chadd */ 47842083b3dSAdrian Chadd ds += sc->sc_tx_desclen; 4792b200bb4SAdrian Chadd dsp++; 4802b200bb4SAdrian Chadd 4812b200bb4SAdrian Chadd /* 4822b200bb4SAdrian Chadd * .. and don't forget to blank these out! 4832b200bb4SAdrian Chadd */ 4842b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 4852b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 486b8e788a5SAdrian Chadd } 4874d7f8837SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 48881a82688SAdrian Chadd } 48981a82688SAdrian Chadd 490eb6f0de0SAdrian Chadd /* 491d34a7347SAdrian Chadd * Set the rate control fields in the given descriptor based on 492d34a7347SAdrian Chadd * the bf_state fields and node state. 493d34a7347SAdrian Chadd * 494d34a7347SAdrian Chadd * The bfs fields should already be set with the relevant rate 495d34a7347SAdrian Chadd * control information, including whether MRR is to be enabled. 496d34a7347SAdrian Chadd * 497d34a7347SAdrian Chadd * Since the FreeBSD HAL currently sets up the first TX rate 498d34a7347SAdrian Chadd * in ath_hal_setuptxdesc(), this will setup the MRR 499d34a7347SAdrian Chadd * conditionally for the pre-11n chips, and call ath_buf_set_rate 500d34a7347SAdrian Chadd * unconditionally for 11n chips. These require the 11n rate 501d34a7347SAdrian Chadd * scenario to be set if MCS rates are enabled, so it's easier 502d34a7347SAdrian Chadd * to just always call it. The caller can then only set rates 2, 3 503d34a7347SAdrian Chadd * and 4 if multi-rate retry is needed. 504d34a7347SAdrian Chadd */ 505d34a7347SAdrian Chadd static void 506d34a7347SAdrian Chadd ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni, 507d34a7347SAdrian Chadd struct ath_buf *bf) 508d34a7347SAdrian Chadd { 509d34a7347SAdrian Chadd struct ath_rc_series *rc = bf->bf_state.bfs_rc; 510d34a7347SAdrian Chadd 511d34a7347SAdrian Chadd /* If mrr is disabled, blank tries 1, 2, 3 */ 512d34a7347SAdrian Chadd if (! bf->bf_state.bfs_ismrr) 513d34a7347SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 514d34a7347SAdrian Chadd 515491e1248SAdrian Chadd #if 0 516491e1248SAdrian Chadd /* 517491e1248SAdrian Chadd * If NOACK is set, just set ntries=1. 518491e1248SAdrian Chadd */ 519491e1248SAdrian Chadd else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) { 520491e1248SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 521491e1248SAdrian Chadd rc[0].tries = 1; 522491e1248SAdrian Chadd } 523491e1248SAdrian Chadd #endif 524491e1248SAdrian Chadd 525d34a7347SAdrian Chadd /* 526d34a7347SAdrian Chadd * Always call - that way a retried descriptor will 527d34a7347SAdrian Chadd * have the MRR fields overwritten. 528d34a7347SAdrian Chadd * 529d34a7347SAdrian Chadd * XXX TODO: see if this is really needed - setting up 530d34a7347SAdrian Chadd * the first descriptor should set the MRR fields to 0 531d34a7347SAdrian Chadd * for us anyway. 532d34a7347SAdrian Chadd */ 533d34a7347SAdrian Chadd if (ath_tx_is_11n(sc)) { 534d34a7347SAdrian Chadd ath_buf_set_rate(sc, ni, bf); 535d34a7347SAdrian Chadd } else { 536d34a7347SAdrian Chadd ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc 537d34a7347SAdrian Chadd , rc[1].ratecode, rc[1].tries 538d34a7347SAdrian Chadd , rc[2].ratecode, rc[2].tries 539d34a7347SAdrian Chadd , rc[3].ratecode, rc[3].tries 540d34a7347SAdrian Chadd ); 541d34a7347SAdrian Chadd } 542d34a7347SAdrian Chadd } 543d34a7347SAdrian Chadd 544d34a7347SAdrian Chadd /* 545eb6f0de0SAdrian Chadd * Setup segments+descriptors for an 11n aggregate. 546eb6f0de0SAdrian Chadd * bf_first is the first buffer in the aggregate. 547eb6f0de0SAdrian Chadd * The descriptor list must already been linked together using 548eb6f0de0SAdrian Chadd * bf->bf_next. 549eb6f0de0SAdrian Chadd */ 550eb6f0de0SAdrian Chadd static void 551eb6f0de0SAdrian Chadd ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first) 552eb6f0de0SAdrian Chadd { 553eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_prev = NULL; 5546e84772fSAdrian Chadd struct ath_desc *ds0 = bf_first->bf_desc; 555eb6f0de0SAdrian Chadd 556eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n", 557eb6f0de0SAdrian Chadd __func__, bf_first->bf_state.bfs_nframes, 558eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_al); 559eb6f0de0SAdrian Chadd 5607d9dd2acSAdrian Chadd bf = bf_first; 5617d9dd2acSAdrian Chadd 5627d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 5637d9dd2acSAdrian Chadd device_printf(sc->sc_dev, "%s: bf=%p, txrate0=%d\n", 5647d9dd2acSAdrian Chadd __func__, bf, 0); 5657d9dd2acSAdrian Chadd if (bf->bf_state.bfs_rc[0].ratecode == 0) 5667d9dd2acSAdrian Chadd device_printf(sc->sc_dev, "%s: bf=%p, rix0=%d\n", 5677d9dd2acSAdrian Chadd __func__, bf, 0); 5687d9dd2acSAdrian Chadd 569eb6f0de0SAdrian Chadd /* 5706e84772fSAdrian Chadd * Setup all descriptors of all subframes - this will 5716e84772fSAdrian Chadd * call ath_hal_set11naggrmiddle() on every frame. 572eb6f0de0SAdrian Chadd */ 573eb6f0de0SAdrian Chadd while (bf != NULL) { 574eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 575eb6f0de0SAdrian Chadd "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n", 576eb6f0de0SAdrian Chadd __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen, 577eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 578eb6f0de0SAdrian Chadd 5796e84772fSAdrian Chadd /* 5806e84772fSAdrian Chadd * Setup the initial fields for the first descriptor - all 5816e84772fSAdrian Chadd * the non-11n specific stuff. 5826e84772fSAdrian Chadd */ 5836e84772fSAdrian Chadd ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc 5846e84772fSAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 5856e84772fSAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 5866e84772fSAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 5876e84772fSAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 5886e84772fSAdrian Chadd , bf->bf_state.bfs_txrate0 5896e84772fSAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 5906e84772fSAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 5916e84772fSAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 5926e84772fSAdrian Chadd , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */ 5936e84772fSAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 5946e84772fSAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 5956e84772fSAdrian Chadd ); 5966e84772fSAdrian Chadd 5976e84772fSAdrian Chadd /* 5986e84772fSAdrian Chadd * First descriptor? Setup the rate control and initial 5996e84772fSAdrian Chadd * aggregate header information. 6006e84772fSAdrian Chadd */ 6016e84772fSAdrian Chadd if (bf == bf_first) { 6026e84772fSAdrian Chadd /* 6036e84772fSAdrian Chadd * setup first desc with rate and aggr info 6046e84772fSAdrian Chadd */ 6056e84772fSAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 6066e84772fSAdrian Chadd } 6076e84772fSAdrian Chadd 6086e84772fSAdrian Chadd /* 6096e84772fSAdrian Chadd * Setup the descriptors for a multi-descriptor frame. 6106e84772fSAdrian Chadd * This is both aggregate and non-aggregate aware. 6116e84772fSAdrian Chadd */ 6126e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds0, bf, 6136e84772fSAdrian Chadd 1, /* is_aggr */ 6146e84772fSAdrian Chadd !! (bf == bf_first), /* is_first_subframe */ 6156e84772fSAdrian Chadd !! (bf->bf_next == NULL) /* is_last_subframe */ 6166e84772fSAdrian Chadd ); 6176e84772fSAdrian Chadd 6186e84772fSAdrian Chadd if (bf == bf_first) { 6196e84772fSAdrian Chadd /* 6206e84772fSAdrian Chadd * Initialise the first 11n aggregate with the 6216e84772fSAdrian Chadd * aggregate length and aggregate enable bits. 6226e84772fSAdrian Chadd */ 6236e84772fSAdrian Chadd ath_hal_set11n_aggr_first(sc->sc_ah, 6246e84772fSAdrian Chadd ds0, 6256e84772fSAdrian Chadd bf->bf_state.bfs_al, 6266e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 6276e84772fSAdrian Chadd } 628eb6f0de0SAdrian Chadd 629eb6f0de0SAdrian Chadd /* 630eb6f0de0SAdrian Chadd * Link the last descriptor of the previous frame 631eb6f0de0SAdrian Chadd * to the beginning descriptor of this frame. 632eb6f0de0SAdrian Chadd */ 633eb6f0de0SAdrian Chadd if (bf_prev != NULL) 634bb069955SAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds, 635bb069955SAdrian Chadd bf->bf_daddr); 636eb6f0de0SAdrian Chadd 637eb6f0de0SAdrian Chadd /* Save a copy so we can link the next descriptor in */ 638eb6f0de0SAdrian Chadd bf_prev = bf; 639eb6f0de0SAdrian Chadd bf = bf->bf_next; 640eb6f0de0SAdrian Chadd } 641eb6f0de0SAdrian Chadd 642eb6f0de0SAdrian Chadd /* 643eb6f0de0SAdrian Chadd * Set the first descriptor bf_lastds field to point to 644eb6f0de0SAdrian Chadd * the last descriptor in the last subframe, that's where 645eb6f0de0SAdrian Chadd * the status update will occur. 646eb6f0de0SAdrian Chadd */ 647eb6f0de0SAdrian Chadd bf_first->bf_lastds = bf_prev->bf_lastds; 648eb6f0de0SAdrian Chadd 649eb6f0de0SAdrian Chadd /* 650eb6f0de0SAdrian Chadd * And bf_last in the first descriptor points to the end of 651eb6f0de0SAdrian Chadd * the aggregate list. 652eb6f0de0SAdrian Chadd */ 653eb6f0de0SAdrian Chadd bf_first->bf_last = bf_prev; 654eb6f0de0SAdrian Chadd 655bbdf3df1SAdrian Chadd /* 656bbdf3df1SAdrian Chadd * For non-AR9300 NICs, which require the rate control 657bbdf3df1SAdrian Chadd * in the final descriptor - let's set that up now. 658bbdf3df1SAdrian Chadd * 659bbdf3df1SAdrian Chadd * This is because the filltxdesc() HAL call doesn't 660bbdf3df1SAdrian Chadd * populate the last segment with rate control information 661bbdf3df1SAdrian Chadd * if firstSeg is also true. For non-aggregate frames 662bbdf3df1SAdrian Chadd * that is fine, as the first frame already has rate control 663bbdf3df1SAdrian Chadd * info. But if the last frame in an aggregate has one 664bbdf3df1SAdrian Chadd * descriptor, both firstseg and lastseg will be true and 665bbdf3df1SAdrian Chadd * the rate info isn't copied. 666bbdf3df1SAdrian Chadd * 667bbdf3df1SAdrian Chadd * This is inefficient on MIPS/ARM platforms that have 668bbdf3df1SAdrian Chadd * non-cachable memory for TX descriptors, but we'll just 669bbdf3df1SAdrian Chadd * make do for now. 670bbdf3df1SAdrian Chadd * 671bbdf3df1SAdrian Chadd * As to why the rate table is stashed in the last descriptor 672bbdf3df1SAdrian Chadd * rather than the first descriptor? Because proctxdesc() 673bbdf3df1SAdrian Chadd * is called on the final descriptor in an MPDU or A-MPDU - 674bbdf3df1SAdrian Chadd * ie, the one that gets updated by the hardware upon 675bbdf3df1SAdrian Chadd * completion. That way proctxdesc() doesn't need to know 676bbdf3df1SAdrian Chadd * about the first _and_ last TX descriptor. 677bbdf3df1SAdrian Chadd */ 678bbdf3df1SAdrian Chadd ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0); 679bbdf3df1SAdrian Chadd 680eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__); 681eb6f0de0SAdrian Chadd } 682eb6f0de0SAdrian Chadd 68346634305SAdrian Chadd /* 68446634305SAdrian Chadd * Hand-off a frame to the multicast TX queue. 68546634305SAdrian Chadd * 68646634305SAdrian Chadd * This is a software TXQ which will be appended to the CAB queue 68746634305SAdrian Chadd * during the beacon setup code. 68846634305SAdrian Chadd * 68946634305SAdrian Chadd * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID 690fc56c9c5SAdrian Chadd * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated 69146634305SAdrian Chadd * with the actual hardware txq, or all of this will fall apart. 69246634305SAdrian Chadd * 69346634305SAdrian Chadd * XXX It may not be a bad idea to just stuff the QCU ID into bf_state 694fc56c9c5SAdrian Chadd * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated 69546634305SAdrian Chadd * correctly. 69646634305SAdrian Chadd */ 697eb6f0de0SAdrian Chadd static void 698eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 699eb6f0de0SAdrian Chadd struct ath_buf *bf) 700eb6f0de0SAdrian Chadd { 701375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 702375307d4SAdrian Chadd 703eb6f0de0SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 704eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 70556a85978SAdrian Chadd 706*97c9a8e8SAdrian Chadd /* 707*97c9a8e8SAdrian Chadd * Ensure that the tx queue is the cabq, so things get 708*97c9a8e8SAdrian Chadd * mapped correctly. 709*97c9a8e8SAdrian Chadd */ 710*97c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) { 711*97c9a8e8SAdrian Chadd device_printf(sc->sc_dev, 712*97c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 713*97c9a8e8SAdrian Chadd __func__, 714*97c9a8e8SAdrian Chadd bf, 715*97c9a8e8SAdrian Chadd bf->bf_state.bfs_tx_queue, 716*97c9a8e8SAdrian Chadd txq->axq_qnum); 717*97c9a8e8SAdrian Chadd } 718*97c9a8e8SAdrian Chadd 71956a85978SAdrian Chadd ATH_TXQ_LOCK(txq); 7200891354cSAdrian Chadd if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) { 7210891354cSAdrian Chadd struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s); 722eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 723eb6f0de0SAdrian Chadd 724eb6f0de0SAdrian Chadd /* mark previous frame */ 7250891354cSAdrian Chadd wh = mtod(bf_last->bf_m, struct ieee80211_frame *); 726eb6f0de0SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 7270891354cSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap, 728eb6f0de0SAdrian Chadd BUS_DMASYNC_PREWRITE); 729eb6f0de0SAdrian Chadd 730eb6f0de0SAdrian Chadd /* link descriptor */ 7310891354cSAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, 7320891354cSAdrian Chadd bf_last->bf_lastds, 7330891354cSAdrian Chadd bf->bf_daddr); 734eb6f0de0SAdrian Chadd } 735eb6f0de0SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 736b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 737eb6f0de0SAdrian Chadd } 738eb6f0de0SAdrian Chadd 739eb6f0de0SAdrian Chadd /* 740eb6f0de0SAdrian Chadd * Hand-off packet to a hardware queue. 741eb6f0de0SAdrian Chadd */ 742eb6f0de0SAdrian Chadd static void 743d4365d16SAdrian Chadd ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 744d4365d16SAdrian Chadd struct ath_buf *bf) 745eb6f0de0SAdrian Chadd { 746eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 74781a82688SAdrian Chadd 748b8e788a5SAdrian Chadd /* 749b8e788a5SAdrian Chadd * Insert the frame on the outbound list and pass it on 750b8e788a5SAdrian Chadd * to the hardware. Multicast frames buffered for power 751b8e788a5SAdrian Chadd * save stations and transmit from the CAB queue are stored 752b8e788a5SAdrian Chadd * on a s/w only queue and loaded on to the CAB queue in 753b8e788a5SAdrian Chadd * the SWBA handler since frames only go out on DTIM and 754b8e788a5SAdrian Chadd * to avoid possible races. 755b8e788a5SAdrian Chadd */ 756375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 757b8e788a5SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 758eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 759eb6f0de0SAdrian Chadd KASSERT(txq->axq_qnum != ATH_TXQ_SWQ, 760eb6f0de0SAdrian Chadd ("ath_tx_handoff_hw called for mcast queue")); 761eb6f0de0SAdrian Chadd 762ef27340cSAdrian Chadd #if 0 763ef27340cSAdrian Chadd /* 764ef27340cSAdrian Chadd * This causes a LOR. Find out where the PCU lock is being 765ef27340cSAdrian Chadd * held whilst the TXQ lock is grabbed - that shouldn't 766ef27340cSAdrian Chadd * be occuring. 767ef27340cSAdrian Chadd */ 768ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 769ef27340cSAdrian Chadd if (sc->sc_inreset_cnt) { 770ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 771ef27340cSAdrian Chadd DPRINTF(sc, ATH_DEBUG_RESET, 772ef27340cSAdrian Chadd "%s: called with sc_in_reset != 0\n", 773ef27340cSAdrian Chadd __func__); 774ef27340cSAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 775ef27340cSAdrian Chadd "%s: queued: TXDP[%u] = %p (%p) depth %d\n", 776ef27340cSAdrian Chadd __func__, txq->axq_qnum, 777ef27340cSAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 778ef27340cSAdrian Chadd txq->axq_depth); 779ef27340cSAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 780ef27340cSAdrian Chadd if (bf->bf_state.bfs_aggr) 781ef27340cSAdrian Chadd txq->axq_aggr_depth++; 782ef27340cSAdrian Chadd /* 783ef27340cSAdrian Chadd * There's no need to update axq_link; the hardware 784ef27340cSAdrian Chadd * is in reset and once the reset is complete, any 785ef27340cSAdrian Chadd * non-empty queues will simply have DMA restarted. 786ef27340cSAdrian Chadd */ 787ef27340cSAdrian Chadd return; 788ef27340cSAdrian Chadd } 789ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 790ef27340cSAdrian Chadd #endif 791ef27340cSAdrian Chadd 792eb6f0de0SAdrian Chadd /* For now, so not to generate whitespace diffs */ 793eb6f0de0SAdrian Chadd if (1) { 794b837332dSAdrian Chadd ATH_TXQ_LOCK(txq); 795b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 796b8e788a5SAdrian Chadd int qbusy; 797b8e788a5SAdrian Chadd 798b8e788a5SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 799b8e788a5SAdrian Chadd qbusy = ath_hal_txqenabled(ah, txq->axq_qnum); 80003682514SAdrian Chadd 80103682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 4, 80203682514SAdrian Chadd "ath_tx_handoff: txq=%u, add bf=%p, qbusy=%d, depth=%d", 80303682514SAdrian Chadd txq->axq_qnum, bf, qbusy, txq->axq_depth); 804b8e788a5SAdrian Chadd if (txq->axq_link == NULL) { 805b8e788a5SAdrian Chadd /* 806b8e788a5SAdrian Chadd * Be careful writing the address to TXDP. If 807b8e788a5SAdrian Chadd * the tx q is enabled then this write will be 808b8e788a5SAdrian Chadd * ignored. Normally this is not an issue but 809b8e788a5SAdrian Chadd * when tdma is in use and the q is beacon gated 810b8e788a5SAdrian Chadd * this race can occur. If the q is busy then 811b8e788a5SAdrian Chadd * defer the work to later--either when another 812b8e788a5SAdrian Chadd * packet comes along or when we prepare a beacon 813b8e788a5SAdrian Chadd * frame at SWBA. 814b8e788a5SAdrian Chadd */ 815b8e788a5SAdrian Chadd if (!qbusy) { 816d4365d16SAdrian Chadd ath_hal_puttxbuf(ah, txq->axq_qnum, 817d4365d16SAdrian Chadd bf->bf_daddr); 818b8e788a5SAdrian Chadd txq->axq_flags &= ~ATH_TXQ_PUTPENDING; 819b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 82003682514SAdrian Chadd "%s: TXDP[%u] = %p (%p) lastds=%p depth %d\n", 821b8e788a5SAdrian Chadd __func__, txq->axq_qnum, 822b8e788a5SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 82303682514SAdrian Chadd bf->bf_lastds, 82403682514SAdrian Chadd txq->axq_depth); 82503682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 82603682514SAdrian Chadd "ath_tx_handoff: TXDP[%u] = %p (%p) " 82703682514SAdrian Chadd "lastds=%p depth %d", 82803682514SAdrian Chadd txq->axq_qnum, 82903682514SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 83003682514SAdrian Chadd bf->bf_lastds, 831b8e788a5SAdrian Chadd txq->axq_depth); 832b8e788a5SAdrian Chadd } else { 833b8e788a5SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTPENDING; 834b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT, 835b8e788a5SAdrian Chadd "%s: Q%u busy, defer enable\n", __func__, 836b8e788a5SAdrian Chadd txq->axq_qnum); 83703682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 0, "defer enable"); 838b8e788a5SAdrian Chadd } 839b8e788a5SAdrian Chadd } else { 840b8e788a5SAdrian Chadd *txq->axq_link = bf->bf_daddr; 841b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 842b8e788a5SAdrian Chadd "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 843b8e788a5SAdrian Chadd txq->axq_qnum, txq->axq_link, 844d4365d16SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 845d4365d16SAdrian Chadd txq->axq_depth); 84603682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 84703682514SAdrian Chadd "ath_tx_handoff: link[%u](%p)=%p (%p) lastds=%p", 84803682514SAdrian Chadd txq->axq_qnum, txq->axq_link, 84903682514SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 85003682514SAdrian Chadd bf->bf_lastds); 85103682514SAdrian Chadd 852b8e788a5SAdrian Chadd if ((txq->axq_flags & ATH_TXQ_PUTPENDING) && !qbusy) { 853b8e788a5SAdrian Chadd /* 854b8e788a5SAdrian Chadd * The q was busy when we previously tried 855b8e788a5SAdrian Chadd * to write the address of the first buffer 856b8e788a5SAdrian Chadd * in the chain. Since it's not busy now 857b8e788a5SAdrian Chadd * handle this chore. We are certain the 858b8e788a5SAdrian Chadd * buffer at the front is the right one since 859b8e788a5SAdrian Chadd * axq_link is NULL only when the buffer list 860b8e788a5SAdrian Chadd * is/was empty. 861b8e788a5SAdrian Chadd */ 862b8e788a5SAdrian Chadd ath_hal_puttxbuf(ah, txq->axq_qnum, 8636b349e5aSAdrian Chadd TAILQ_FIRST(&txq->axq_q)->bf_daddr); 864b8e788a5SAdrian Chadd txq->axq_flags &= ~ATH_TXQ_PUTPENDING; 865b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT, 866b8e788a5SAdrian Chadd "%s: Q%u restarted\n", __func__, 867b8e788a5SAdrian Chadd txq->axq_qnum); 86803682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 4, 86903682514SAdrian Chadd "ath_tx_handoff: txq[%d] restarted, bf=%p " 87003682514SAdrian Chadd "daddr=%p ds=%p", 87103682514SAdrian Chadd txq->axq_qnum, 87203682514SAdrian Chadd bf, 87303682514SAdrian Chadd (caddr_t)bf->bf_daddr, 87403682514SAdrian Chadd bf->bf_desc); 875b8e788a5SAdrian Chadd } 876b8e788a5SAdrian Chadd } 877b8e788a5SAdrian Chadd #else 878b8e788a5SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 879b1dddc28SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, 880b1dddc28SAdrian Chadd "ath_tx_handoff: non-tdma: txq=%u, add bf=%p " 88103682514SAdrian Chadd "depth=%d", 88203682514SAdrian Chadd txq->axq_qnum, 88303682514SAdrian Chadd bf, 88403682514SAdrian Chadd txq->axq_depth); 885b8e788a5SAdrian Chadd if (txq->axq_link == NULL) { 886b8e788a5SAdrian Chadd ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); 887b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 888b8e788a5SAdrian Chadd "%s: TXDP[%u] = %p (%p) depth %d\n", 889b8e788a5SAdrian Chadd __func__, txq->axq_qnum, 890b8e788a5SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 891b8e788a5SAdrian Chadd txq->axq_depth); 89203682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 89303682514SAdrian Chadd "ath_tx_handoff: non-tdma: TXDP[%u] = %p (%p) " 89403682514SAdrian Chadd "lastds=%p depth %d", 89503682514SAdrian Chadd txq->axq_qnum, 89603682514SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 89703682514SAdrian Chadd bf->bf_lastds, 89803682514SAdrian Chadd txq->axq_depth); 89903682514SAdrian Chadd 900b8e788a5SAdrian Chadd } else { 901b8e788a5SAdrian Chadd *txq->axq_link = bf->bf_daddr; 902b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 903b8e788a5SAdrian Chadd "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 904b8e788a5SAdrian Chadd txq->axq_qnum, txq->axq_link, 905d4365d16SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 906d4365d16SAdrian Chadd txq->axq_depth); 90703682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 90803682514SAdrian Chadd "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) " 90903682514SAdrian Chadd "lastds=%d", 91003682514SAdrian Chadd txq->axq_qnum, txq->axq_link, 91103682514SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 91203682514SAdrian Chadd bf->bf_lastds); 91303682514SAdrian Chadd 914b8e788a5SAdrian Chadd } 915b8e788a5SAdrian Chadd #endif /* IEEE80211_SUPPORT_TDMA */ 916*97c9a8e8SAdrian Chadd 917*97c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) { 918*97c9a8e8SAdrian Chadd device_printf(sc->sc_dev, 919*97c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 920*97c9a8e8SAdrian Chadd __func__, 921*97c9a8e8SAdrian Chadd bf, 922*97c9a8e8SAdrian Chadd bf->bf_state.bfs_tx_queue, 923*97c9a8e8SAdrian Chadd txq->axq_qnum); 924*97c9a8e8SAdrian Chadd } 925*97c9a8e8SAdrian Chadd 9266edf1dc7SAdrian Chadd if (bf->bf_state.bfs_aggr) 9276edf1dc7SAdrian Chadd txq->axq_aggr_depth++; 928bb069955SAdrian Chadd ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); 929b8e788a5SAdrian Chadd ath_hal_txstart(ah, txq->axq_qnum); 930b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 93103682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 1, 93203682514SAdrian Chadd "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum); 933b8e788a5SAdrian Chadd } 934b8e788a5SAdrian Chadd } 935eb6f0de0SAdrian Chadd 936eb6f0de0SAdrian Chadd /* 937eb6f0de0SAdrian Chadd * Restart TX DMA for the given TXQ. 938eb6f0de0SAdrian Chadd * 939eb6f0de0SAdrian Chadd * This must be called whether the queue is empty or not. 940eb6f0de0SAdrian Chadd */ 941746bab5bSAdrian Chadd static void 942746bab5bSAdrian Chadd ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq) 943eb6f0de0SAdrian Chadd { 944eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 945b1f3262cSAdrian Chadd struct ath_buf *bf, *bf_last; 946eb6f0de0SAdrian Chadd 947b837332dSAdrian Chadd ATH_TXQ_LOCK_ASSERT(txq); 948eb6f0de0SAdrian Chadd /* This is always going to be cleared, empty or not */ 949eb6f0de0SAdrian Chadd txq->axq_flags &= ~ATH_TXQ_PUTPENDING; 950eb6f0de0SAdrian Chadd 951b1f3262cSAdrian Chadd /* XXX make this ATH_TXQ_FIRST */ 952eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&txq->axq_q); 953b1f3262cSAdrian Chadd bf_last = ATH_TXQ_LAST(txq, axq_q_s); 954b1f3262cSAdrian Chadd 955eb6f0de0SAdrian Chadd if (bf == NULL) 956eb6f0de0SAdrian Chadd return; 957eb6f0de0SAdrian Chadd 958eb6f0de0SAdrian Chadd ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); 959d2da5544SAdrian Chadd ath_hal_gettxdesclinkptr(ah, bf_last->bf_lastds, &txq->axq_link); 960eb6f0de0SAdrian Chadd ath_hal_txstart(ah, txq->axq_qnum); 961eb6f0de0SAdrian Chadd } 962eb6f0de0SAdrian Chadd 963eb6f0de0SAdrian Chadd /* 964eb6f0de0SAdrian Chadd * Hand off a packet to the hardware (or mcast queue.) 965eb6f0de0SAdrian Chadd * 966eb6f0de0SAdrian Chadd * The relevant hardware txq should be locked. 967eb6f0de0SAdrian Chadd */ 968eb6f0de0SAdrian Chadd static void 969746bab5bSAdrian Chadd ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq, 970746bab5bSAdrian Chadd struct ath_buf *bf) 971eb6f0de0SAdrian Chadd { 972375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 973eb6f0de0SAdrian Chadd 974bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 975bb327d28SAdrian Chadd if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC)) 976bb327d28SAdrian Chadd ath_tx_alq_post(sc, bf); 977bb327d28SAdrian Chadd #endif 978bb327d28SAdrian Chadd 979eb6f0de0SAdrian Chadd if (txq->axq_qnum == ATH_TXQ_SWQ) 980eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(sc, txq, bf); 981eb6f0de0SAdrian Chadd else 982eb6f0de0SAdrian Chadd ath_tx_handoff_hw(sc, txq, bf); 983b8e788a5SAdrian Chadd } 984b8e788a5SAdrian Chadd 98581a82688SAdrian Chadd static int 98681a82688SAdrian Chadd ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni, 987d4365d16SAdrian Chadd struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen, 988d4365d16SAdrian Chadd int *keyix) 98981a82688SAdrian Chadd { 99012be5b9cSAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 99112be5b9cSAdrian Chadd "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n", 99212be5b9cSAdrian Chadd __func__, 99312be5b9cSAdrian Chadd *hdrlen, 99412be5b9cSAdrian Chadd *pktlen, 99512be5b9cSAdrian Chadd isfrag, 99612be5b9cSAdrian Chadd iswep, 99712be5b9cSAdrian Chadd m0); 99812be5b9cSAdrian Chadd 99981a82688SAdrian Chadd if (iswep) { 100081a82688SAdrian Chadd const struct ieee80211_cipher *cip; 100181a82688SAdrian Chadd struct ieee80211_key *k; 100281a82688SAdrian Chadd 100381a82688SAdrian Chadd /* 100481a82688SAdrian Chadd * Construct the 802.11 header+trailer for an encrypted 100581a82688SAdrian Chadd * frame. The only reason this can fail is because of an 100681a82688SAdrian Chadd * unknown or unsupported cipher/key type. 100781a82688SAdrian Chadd */ 100881a82688SAdrian Chadd k = ieee80211_crypto_encap(ni, m0); 100981a82688SAdrian Chadd if (k == NULL) { 101081a82688SAdrian Chadd /* 101181a82688SAdrian Chadd * This can happen when the key is yanked after the 101281a82688SAdrian Chadd * frame was queued. Just discard the frame; the 101381a82688SAdrian Chadd * 802.11 layer counts failures and provides 101481a82688SAdrian Chadd * debugging/diagnostics. 101581a82688SAdrian Chadd */ 1016d4365d16SAdrian Chadd return (0); 101781a82688SAdrian Chadd } 101881a82688SAdrian Chadd /* 101981a82688SAdrian Chadd * Adjust the packet + header lengths for the crypto 102081a82688SAdrian Chadd * additions and calculate the h/w key index. When 102181a82688SAdrian Chadd * a s/w mic is done the frame will have had any mic 102281a82688SAdrian Chadd * added to it prior to entry so m0->m_pkthdr.len will 102381a82688SAdrian Chadd * account for it. Otherwise we need to add it to the 102481a82688SAdrian Chadd * packet length. 102581a82688SAdrian Chadd */ 102681a82688SAdrian Chadd cip = k->wk_cipher; 102781a82688SAdrian Chadd (*hdrlen) += cip->ic_header; 102881a82688SAdrian Chadd (*pktlen) += cip->ic_header + cip->ic_trailer; 102981a82688SAdrian Chadd /* NB: frags always have any TKIP MIC done in s/w */ 103081a82688SAdrian Chadd if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag) 103181a82688SAdrian Chadd (*pktlen) += cip->ic_miclen; 103281a82688SAdrian Chadd (*keyix) = k->wk_keyix; 103381a82688SAdrian Chadd } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) { 103481a82688SAdrian Chadd /* 103581a82688SAdrian Chadd * Use station key cache slot, if assigned. 103681a82688SAdrian Chadd */ 103781a82688SAdrian Chadd (*keyix) = ni->ni_ucastkey.wk_keyix; 103881a82688SAdrian Chadd if ((*keyix) == IEEE80211_KEYIX_NONE) 103981a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 104081a82688SAdrian Chadd } else 104181a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 104281a82688SAdrian Chadd 1043d4365d16SAdrian Chadd return (1); 104481a82688SAdrian Chadd } 104581a82688SAdrian Chadd 1046e2e4a2c2SAdrian Chadd /* 1047e2e4a2c2SAdrian Chadd * Calculate whether interoperability protection is required for 1048e2e4a2c2SAdrian Chadd * this frame. 1049e2e4a2c2SAdrian Chadd * 1050e2e4a2c2SAdrian Chadd * This requires the rate control information be filled in, 1051e2e4a2c2SAdrian Chadd * as the protection requirement depends upon the current 1052e2e4a2c2SAdrian Chadd * operating mode / PHY. 1053e2e4a2c2SAdrian Chadd */ 1054e2e4a2c2SAdrian Chadd static void 1055e2e4a2c2SAdrian Chadd ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf) 1056e2e4a2c2SAdrian Chadd { 1057e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1058e2e4a2c2SAdrian Chadd uint8_t rix; 1059e2e4a2c2SAdrian Chadd uint16_t flags; 1060e2e4a2c2SAdrian Chadd int shortPreamble; 1061e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1062e2e4a2c2SAdrian Chadd struct ifnet *ifp = sc->sc_ifp; 1063e2e4a2c2SAdrian Chadd struct ieee80211com *ic = ifp->if_l2com; 1064e2e4a2c2SAdrian Chadd 1065e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1066e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1067e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1068e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1069e2e4a2c2SAdrian Chadd 1070e2e4a2c2SAdrian Chadd /* 1071e2e4a2c2SAdrian Chadd * If 802.11g protection is enabled, determine whether 1072e2e4a2c2SAdrian Chadd * to use RTS/CTS or just CTS. Note that this is only 1073e2e4a2c2SAdrian Chadd * done for OFDM unicast frames. 1074e2e4a2c2SAdrian Chadd */ 1075e2e4a2c2SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1076e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_OFDM && 1077e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1078e2e4a2c2SAdrian Chadd bf->bf_state.bfs_doprot = 1; 1079e2e4a2c2SAdrian Chadd /* XXX fragments must use CCK rates w/ protection */ 1080e2e4a2c2SAdrian Chadd if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1081e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1082e2e4a2c2SAdrian Chadd } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1083e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 1084e2e4a2c2SAdrian Chadd } 1085e2e4a2c2SAdrian Chadd /* 1086e2e4a2c2SAdrian Chadd * For frags it would be desirable to use the 1087e2e4a2c2SAdrian Chadd * highest CCK rate for RTS/CTS. But stations 1088e2e4a2c2SAdrian Chadd * farther away may detect it at a lower CCK rate 1089e2e4a2c2SAdrian Chadd * so use the configured protection rate instead 1090e2e4a2c2SAdrian Chadd * (for now). 1091e2e4a2c2SAdrian Chadd */ 1092e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_protect++; 1093e2e4a2c2SAdrian Chadd } 1094e2e4a2c2SAdrian Chadd 1095e2e4a2c2SAdrian Chadd /* 1096e2e4a2c2SAdrian Chadd * If 11n protection is enabled and it's a HT frame, 1097e2e4a2c2SAdrian Chadd * enable RTS. 1098e2e4a2c2SAdrian Chadd * 1099e2e4a2c2SAdrian Chadd * XXX ic_htprotmode or ic_curhtprotmode? 1100e2e4a2c2SAdrian Chadd * XXX should it_htprotmode only matter if ic_curhtprotmode 1101e2e4a2c2SAdrian Chadd * XXX indicates it's not a HT pure environment? 1102e2e4a2c2SAdrian Chadd */ 1103e2e4a2c2SAdrian Chadd if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) && 1104e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_HT && 1105e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1106e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1107e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_htprotect++; 1108e2e4a2c2SAdrian Chadd } 1109e2e4a2c2SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1110e2e4a2c2SAdrian Chadd } 1111e2e4a2c2SAdrian Chadd 1112e2e4a2c2SAdrian Chadd /* 1113e2e4a2c2SAdrian Chadd * Update the frame duration given the currently selected rate. 1114e2e4a2c2SAdrian Chadd * 1115e2e4a2c2SAdrian Chadd * This also updates the frame duration value, so it will require 1116e2e4a2c2SAdrian Chadd * a DMA flush. 1117e2e4a2c2SAdrian Chadd */ 1118e2e4a2c2SAdrian Chadd static void 1119e2e4a2c2SAdrian Chadd ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf) 1120e2e4a2c2SAdrian Chadd { 1121e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1122e2e4a2c2SAdrian Chadd uint8_t rix; 1123e2e4a2c2SAdrian Chadd uint16_t flags; 1124e2e4a2c2SAdrian Chadd int shortPreamble; 1125e2e4a2c2SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1126e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1127e2e4a2c2SAdrian Chadd int isfrag = bf->bf_m->m_flags & M_FRAG; 1128e2e4a2c2SAdrian Chadd 1129e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1130e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1131e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1132e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1133e2e4a2c2SAdrian Chadd 1134e2e4a2c2SAdrian Chadd /* 1135e2e4a2c2SAdrian Chadd * Calculate duration. This logically belongs in the 802.11 1136e2e4a2c2SAdrian Chadd * layer but it lacks sufficient information to calculate it. 1137e2e4a2c2SAdrian Chadd */ 1138e2e4a2c2SAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0 && 1139e2e4a2c2SAdrian Chadd (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 1140e2e4a2c2SAdrian Chadd u_int16_t dur; 1141e2e4a2c2SAdrian Chadd if (shortPreamble) 1142e2e4a2c2SAdrian Chadd dur = rt->info[rix].spAckDuration; 1143e2e4a2c2SAdrian Chadd else 1144e2e4a2c2SAdrian Chadd dur = rt->info[rix].lpAckDuration; 1145e2e4a2c2SAdrian Chadd if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) { 1146e2e4a2c2SAdrian Chadd dur += dur; /* additional SIFS+ACK */ 11471a85141aSAdrian Chadd KASSERT(bf->bf_m->m_nextpkt != NULL, ("no fragment")); 1148e2e4a2c2SAdrian Chadd /* 1149e2e4a2c2SAdrian Chadd * Include the size of next fragment so NAV is 1150e2e4a2c2SAdrian Chadd * updated properly. The last fragment uses only 1151e2e4a2c2SAdrian Chadd * the ACK duration 11529572684aSAdrian Chadd * 11539572684aSAdrian Chadd * XXX TODO: ensure that the rate lookup for each 11549572684aSAdrian Chadd * fragment is the same as the rate used by the 11559572684aSAdrian Chadd * first fragment! 1156e2e4a2c2SAdrian Chadd */ 1157e2e4a2c2SAdrian Chadd dur += ath_hal_computetxtime(ah, rt, 11581a85141aSAdrian Chadd bf->bf_m->m_nextpkt->m_pkthdr.len, 1159e2e4a2c2SAdrian Chadd rix, shortPreamble); 1160e2e4a2c2SAdrian Chadd } 1161e2e4a2c2SAdrian Chadd if (isfrag) { 1162e2e4a2c2SAdrian Chadd /* 1163e2e4a2c2SAdrian Chadd * Force hardware to use computed duration for next 1164e2e4a2c2SAdrian Chadd * fragment by disabling multi-rate retry which updates 1165e2e4a2c2SAdrian Chadd * duration based on the multi-rate duration table. 1166e2e4a2c2SAdrian Chadd */ 1167e2e4a2c2SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1168e2e4a2c2SAdrian Chadd bf->bf_state.bfs_try0 = ATH_TXMGTTRY; 1169e2e4a2c2SAdrian Chadd /* XXX update bfs_rc[0].try? */ 1170e2e4a2c2SAdrian Chadd } 1171e2e4a2c2SAdrian Chadd 1172e2e4a2c2SAdrian Chadd /* Update the duration field itself */ 1173e2e4a2c2SAdrian Chadd *(u_int16_t *)wh->i_dur = htole16(dur); 1174e2e4a2c2SAdrian Chadd } 1175e2e4a2c2SAdrian Chadd } 1176e2e4a2c2SAdrian Chadd 1177e42b5dbaSAdrian Chadd static uint8_t 1178e42b5dbaSAdrian Chadd ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt, 1179eb6f0de0SAdrian Chadd int cix, int shortPreamble) 118079f02dbfSAdrian Chadd { 1181e42b5dbaSAdrian Chadd uint8_t ctsrate; 1182e42b5dbaSAdrian Chadd 118379f02dbfSAdrian Chadd /* 118479f02dbfSAdrian Chadd * CTS transmit rate is derived from the transmit rate 118579f02dbfSAdrian Chadd * by looking in the h/w rate table. We must also factor 118679f02dbfSAdrian Chadd * in whether or not a short preamble is to be used. 118779f02dbfSAdrian Chadd */ 118879f02dbfSAdrian Chadd /* NB: cix is set above where RTS/CTS is enabled */ 118979f02dbfSAdrian Chadd KASSERT(cix != 0xff, ("cix not setup")); 1190e42b5dbaSAdrian Chadd ctsrate = rt->info[cix].rateCode; 1191e42b5dbaSAdrian Chadd 1192e42b5dbaSAdrian Chadd /* XXX this should only matter for legacy rates */ 1193e42b5dbaSAdrian Chadd if (shortPreamble) 1194e42b5dbaSAdrian Chadd ctsrate |= rt->info[cix].shortPreamble; 1195e42b5dbaSAdrian Chadd 1196d4365d16SAdrian Chadd return (ctsrate); 1197e42b5dbaSAdrian Chadd } 1198e42b5dbaSAdrian Chadd 1199e42b5dbaSAdrian Chadd /* 1200e42b5dbaSAdrian Chadd * Calculate the RTS/CTS duration for legacy frames. 1201e42b5dbaSAdrian Chadd */ 1202e42b5dbaSAdrian Chadd static int 1203e42b5dbaSAdrian Chadd ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix, 1204e42b5dbaSAdrian Chadd int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt, 1205e42b5dbaSAdrian Chadd int flags) 1206e42b5dbaSAdrian Chadd { 1207e42b5dbaSAdrian Chadd int ctsduration = 0; 1208e42b5dbaSAdrian Chadd 1209e42b5dbaSAdrian Chadd /* This mustn't be called for HT modes */ 1210e42b5dbaSAdrian Chadd if (rt->info[cix].phy == IEEE80211_T_HT) { 1211e42b5dbaSAdrian Chadd printf("%s: HT rate where it shouldn't be (0x%x)\n", 1212e42b5dbaSAdrian Chadd __func__, rt->info[cix].rateCode); 1213d4365d16SAdrian Chadd return (-1); 1214e42b5dbaSAdrian Chadd } 1215e42b5dbaSAdrian Chadd 121679f02dbfSAdrian Chadd /* 121779f02dbfSAdrian Chadd * Compute the transmit duration based on the frame 121879f02dbfSAdrian Chadd * size and the size of an ACK frame. We call into the 121979f02dbfSAdrian Chadd * HAL to do the computation since it depends on the 122079f02dbfSAdrian Chadd * characteristics of the actual PHY being used. 122179f02dbfSAdrian Chadd * 122279f02dbfSAdrian Chadd * NB: CTS is assumed the same size as an ACK so we can 122379f02dbfSAdrian Chadd * use the precalculated ACK durations. 122479f02dbfSAdrian Chadd */ 122579f02dbfSAdrian Chadd if (shortPreamble) { 122679f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1227e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].spAckDuration; 1228e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 122979f02dbfSAdrian Chadd rt, pktlen, rix, AH_TRUE); 123079f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1231e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].spAckDuration; 123279f02dbfSAdrian Chadd } else { 123379f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1234e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].lpAckDuration; 1235e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 123679f02dbfSAdrian Chadd rt, pktlen, rix, AH_FALSE); 123779f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1238e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].lpAckDuration; 123979f02dbfSAdrian Chadd } 1240e42b5dbaSAdrian Chadd 1241d4365d16SAdrian Chadd return (ctsduration); 124279f02dbfSAdrian Chadd } 124379f02dbfSAdrian Chadd 1244eb6f0de0SAdrian Chadd /* 1245eb6f0de0SAdrian Chadd * Update the given ath_buf with updated rts/cts setup and duration 1246eb6f0de0SAdrian Chadd * values. 1247eb6f0de0SAdrian Chadd * 1248eb6f0de0SAdrian Chadd * To support rate lookups for each software retry, the rts/cts rate 1249eb6f0de0SAdrian Chadd * and cts duration must be re-calculated. 1250eb6f0de0SAdrian Chadd * 1251eb6f0de0SAdrian Chadd * This function assumes the RTS/CTS flags have been set as needed; 1252eb6f0de0SAdrian Chadd * mrr has been disabled; and the rate control lookup has been done. 1253eb6f0de0SAdrian Chadd * 1254eb6f0de0SAdrian Chadd * XXX TODO: MRR need only be disabled for the pre-11n NICs. 1255eb6f0de0SAdrian Chadd * XXX The 11n NICs support per-rate RTS/CTS configuration. 1256eb6f0de0SAdrian Chadd */ 1257eb6f0de0SAdrian Chadd static void 1258eb6f0de0SAdrian Chadd ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf) 1259eb6f0de0SAdrian Chadd { 1260eb6f0de0SAdrian Chadd uint16_t ctsduration = 0; 1261eb6f0de0SAdrian Chadd uint8_t ctsrate = 0; 1262eb6f0de0SAdrian Chadd uint8_t rix = bf->bf_state.bfs_rc[0].rix; 1263eb6f0de0SAdrian Chadd uint8_t cix = 0; 1264eb6f0de0SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1265eb6f0de0SAdrian Chadd 1266eb6f0de0SAdrian Chadd /* 1267eb6f0de0SAdrian Chadd * No RTS/CTS enabled? Don't bother. 1268eb6f0de0SAdrian Chadd */ 1269875a9451SAdrian Chadd if ((bf->bf_state.bfs_txflags & 1270eb6f0de0SAdrian Chadd (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) { 1271eb6f0de0SAdrian Chadd /* XXX is this really needed? */ 1272eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 1273eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1274eb6f0de0SAdrian Chadd return; 1275eb6f0de0SAdrian Chadd } 1276eb6f0de0SAdrian Chadd 1277eb6f0de0SAdrian Chadd /* 1278eb6f0de0SAdrian Chadd * If protection is enabled, use the protection rix control 1279eb6f0de0SAdrian Chadd * rate. Otherwise use the rate0 control rate. 1280eb6f0de0SAdrian Chadd */ 1281eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_doprot) 1282eb6f0de0SAdrian Chadd rix = sc->sc_protrix; 1283eb6f0de0SAdrian Chadd else 1284eb6f0de0SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1285eb6f0de0SAdrian Chadd 1286eb6f0de0SAdrian Chadd /* 1287eb6f0de0SAdrian Chadd * If the raw path has hard-coded ctsrate0 to something, 1288eb6f0de0SAdrian Chadd * use it. 1289eb6f0de0SAdrian Chadd */ 1290eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ctsrate0 != 0) 1291eb6f0de0SAdrian Chadd cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0); 1292eb6f0de0SAdrian Chadd else 1293eb6f0de0SAdrian Chadd /* Control rate from above */ 1294eb6f0de0SAdrian Chadd cix = rt->info[rix].controlRate; 1295eb6f0de0SAdrian Chadd 1296eb6f0de0SAdrian Chadd /* Calculate the rtscts rate for the given cix */ 1297eb6f0de0SAdrian Chadd ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix, 1298eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream); 1299eb6f0de0SAdrian Chadd 1300eb6f0de0SAdrian Chadd /* The 11n chipsets do ctsduration calculations for you */ 1301eb6f0de0SAdrian Chadd if (! ath_tx_is_11n(sc)) 1302eb6f0de0SAdrian Chadd ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix, 1303eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen, 1304875a9451SAdrian Chadd rt, bf->bf_state.bfs_txflags); 1305eb6f0de0SAdrian Chadd 1306eb6f0de0SAdrian Chadd /* Squirrel away in ath_buf */ 1307eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = ctsrate; 1308eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = ctsduration; 1309eb6f0de0SAdrian Chadd 1310eb6f0de0SAdrian Chadd /* 1311eb6f0de0SAdrian Chadd * Must disable multi-rate retry when using RTS/CTS. 1312eb6f0de0SAdrian Chadd */ 1313af017101SAdrian Chadd if (!sc->sc_mrrprot) { 1314eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1315eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = 1316eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */ 1317eb6f0de0SAdrian Chadd } 1318af017101SAdrian Chadd } 1319eb6f0de0SAdrian Chadd 1320eb6f0de0SAdrian Chadd /* 1321eb6f0de0SAdrian Chadd * Setup the descriptor chain for a normal or fast-frame 1322eb6f0de0SAdrian Chadd * frame. 132346634305SAdrian Chadd * 132446634305SAdrian Chadd * XXX TODO: extend to include the destination hardware QCU ID. 132546634305SAdrian Chadd * Make sure that is correct. Make sure that when being added 132646634305SAdrian Chadd * to the mcastq, the CABQ QCUID is set or things will get a bit 132746634305SAdrian Chadd * odd. 1328eb6f0de0SAdrian Chadd */ 1329eb6f0de0SAdrian Chadd static void 1330eb6f0de0SAdrian Chadd ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf) 1331eb6f0de0SAdrian Chadd { 1332eb6f0de0SAdrian Chadd struct ath_desc *ds = bf->bf_desc; 1333eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1334eb6f0de0SAdrian Chadd 13357d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 13367d9dd2acSAdrian Chadd device_printf(sc->sc_dev, "%s: bf=%p, txrate0=%d\n", 13377d9dd2acSAdrian Chadd __func__, bf, 0); 13387d9dd2acSAdrian Chadd 1339eb6f0de0SAdrian Chadd ath_hal_setuptxdesc(ah, ds 1340eb6f0de0SAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 1341eb6f0de0SAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 1342eb6f0de0SAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 1343eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 1344eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txrate0 1345eb6f0de0SAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 1346eb6f0de0SAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 1347eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 1348875a9451SAdrian Chadd , bf->bf_state.bfs_txflags /* flags */ 1349eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 1350eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 1351eb6f0de0SAdrian Chadd ); 1352eb6f0de0SAdrian Chadd 1353eb6f0de0SAdrian Chadd /* 1354eb6f0de0SAdrian Chadd * This will be overriden when the descriptor chain is written. 1355eb6f0de0SAdrian Chadd */ 1356eb6f0de0SAdrian Chadd bf->bf_lastds = ds; 1357eb6f0de0SAdrian Chadd bf->bf_last = bf; 1358eb6f0de0SAdrian Chadd 1359d34a7347SAdrian Chadd /* Set rate control and descriptor chain for this frame */ 1360d34a7347SAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 13616e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0); 1362eb6f0de0SAdrian Chadd } 1363eb6f0de0SAdrian Chadd 1364eb6f0de0SAdrian Chadd /* 1365eb6f0de0SAdrian Chadd * Do a rate lookup. 1366eb6f0de0SAdrian Chadd * 1367eb6f0de0SAdrian Chadd * This performs a rate lookup for the given ath_buf only if it's required. 1368eb6f0de0SAdrian Chadd * Non-data frames and raw frames don't require it. 1369eb6f0de0SAdrian Chadd * 1370eb6f0de0SAdrian Chadd * This populates the primary and MRR entries; MRR values are 1371eb6f0de0SAdrian Chadd * then disabled later on if something requires it (eg RTS/CTS on 1372eb6f0de0SAdrian Chadd * pre-11n chipsets. 1373eb6f0de0SAdrian Chadd * 1374eb6f0de0SAdrian Chadd * This needs to be done before the RTS/CTS fields are calculated 1375eb6f0de0SAdrian Chadd * as they may depend upon the rate chosen. 1376eb6f0de0SAdrian Chadd */ 1377eb6f0de0SAdrian Chadd static void 1378eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf) 1379eb6f0de0SAdrian Chadd { 1380eb6f0de0SAdrian Chadd uint8_t rate, rix; 1381eb6f0de0SAdrian Chadd int try0; 1382eb6f0de0SAdrian Chadd 1383eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_doratelookup) 1384eb6f0de0SAdrian Chadd return; 1385eb6f0de0SAdrian Chadd 1386eb6f0de0SAdrian Chadd /* Get rid of any previous state */ 1387eb6f0de0SAdrian Chadd bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1388eb6f0de0SAdrian Chadd 1389eb6f0de0SAdrian Chadd ATH_NODE_LOCK(ATH_NODE(bf->bf_node)); 1390eb6f0de0SAdrian Chadd ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream, 1391eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, &rix, &try0, &rate); 1392eb6f0de0SAdrian Chadd 1393eb6f0de0SAdrian Chadd /* In case MRR is disabled, make sure rc[0] is setup correctly */ 1394eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1395eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = rate; 1396eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1397eb6f0de0SAdrian Chadd 1398eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY) 1399eb6f0de0SAdrian Chadd ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix, 1400eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc); 1401eb6f0de0SAdrian Chadd ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node)); 1402eb6f0de0SAdrian Chadd 1403eb6f0de0SAdrian Chadd sc->sc_txrix = rix; /* for LED blinking */ 1404eb6f0de0SAdrian Chadd sc->sc_lastdatarix = rix; /* for fast frames */ 1405eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1406eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = rate; 1407eb6f0de0SAdrian Chadd } 1408eb6f0de0SAdrian Chadd 1409eb6f0de0SAdrian Chadd /* 14100c54de88SAdrian Chadd * Update the CLRDMASK bit in the ath_buf if it needs to be set. 14110c54de88SAdrian Chadd */ 14120c54de88SAdrian Chadd static void 14130c54de88SAdrian Chadd ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid, 14140c54de88SAdrian Chadd struct ath_buf *bf) 14150c54de88SAdrian Chadd { 14164f25ddbbSAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 14170c54de88SAdrian Chadd 1418375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 14190c54de88SAdrian Chadd 14204f25ddbbSAdrian Chadd if (an->clrdmask == 1) { 14210c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 14224f25ddbbSAdrian Chadd an->clrdmask = 0; 14230c54de88SAdrian Chadd } 14240c54de88SAdrian Chadd } 14250c54de88SAdrian Chadd 14260c54de88SAdrian Chadd /* 142722a3aee6SAdrian Chadd * Return whether this frame should be software queued or 142822a3aee6SAdrian Chadd * direct dispatched. 142922a3aee6SAdrian Chadd * 143022a3aee6SAdrian Chadd * When doing powersave, BAR frames should be queued but other management 143122a3aee6SAdrian Chadd * frames should be directly sent. 143222a3aee6SAdrian Chadd * 143322a3aee6SAdrian Chadd * When not doing powersave, stick BAR frames into the hardware queue 143422a3aee6SAdrian Chadd * so it goes out even though the queue is paused. 143522a3aee6SAdrian Chadd * 143622a3aee6SAdrian Chadd * For now, management frames are also software queued by default. 143722a3aee6SAdrian Chadd */ 143822a3aee6SAdrian Chadd static int 143922a3aee6SAdrian Chadd ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an, 144022a3aee6SAdrian Chadd struct mbuf *m0, int *queue_to_head) 144122a3aee6SAdrian Chadd { 144222a3aee6SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 144322a3aee6SAdrian Chadd struct ieee80211_frame *wh; 144422a3aee6SAdrian Chadd uint8_t type, subtype; 144522a3aee6SAdrian Chadd 144622a3aee6SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 144722a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 144822a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 144922a3aee6SAdrian Chadd 145022a3aee6SAdrian Chadd (*queue_to_head) = 0; 145122a3aee6SAdrian Chadd 145222a3aee6SAdrian Chadd /* If it's not in powersave - direct-dispatch BAR */ 145322a3aee6SAdrian Chadd if ((ATH_NODE(ni)->an_is_powersave == 0) 145422a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 145522a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 145622a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 145722a3aee6SAdrian Chadd "%s: BAR: TX'ing direct\n", __func__); 145822a3aee6SAdrian Chadd return (0); 145922a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 146022a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 146122a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 146222a3aee6SAdrian Chadd /* BAR TX whilst asleep; queue */ 146322a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 146422a3aee6SAdrian Chadd "%s: swq: TX'ing\n", __func__); 146522a3aee6SAdrian Chadd (*queue_to_head) = 1; 146622a3aee6SAdrian Chadd return (1); 146722a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 146822a3aee6SAdrian Chadd && (type == IEEE80211_FC0_TYPE_MGT || 146922a3aee6SAdrian Chadd type == IEEE80211_FC0_TYPE_CTL)) { 147022a3aee6SAdrian Chadd /* 147122a3aee6SAdrian Chadd * Other control/mgmt frame; bypass software queuing 147222a3aee6SAdrian Chadd * for now! 147322a3aee6SAdrian Chadd */ 147422a3aee6SAdrian Chadd device_printf(sc->sc_dev, 147522a3aee6SAdrian Chadd "%s: %6D: Node is asleep; sending mgmt " 147622a3aee6SAdrian Chadd "(type=%d, subtype=%d)\n", 147722a3aee6SAdrian Chadd __func__, 147822a3aee6SAdrian Chadd ni->ni_macaddr, 147922a3aee6SAdrian Chadd ":", 148022a3aee6SAdrian Chadd type, 148122a3aee6SAdrian Chadd subtype); 148222a3aee6SAdrian Chadd return (0); 148322a3aee6SAdrian Chadd } else { 148422a3aee6SAdrian Chadd return (1); 148522a3aee6SAdrian Chadd } 148622a3aee6SAdrian Chadd } 148722a3aee6SAdrian Chadd 148822a3aee6SAdrian Chadd 148922a3aee6SAdrian Chadd /* 1490eb6f0de0SAdrian Chadd * Transmit the given frame to the hardware. 1491eb6f0de0SAdrian Chadd * 1492eb6f0de0SAdrian Chadd * The frame must already be setup; rate control must already have 1493eb6f0de0SAdrian Chadd * been done. 1494eb6f0de0SAdrian Chadd * 1495eb6f0de0SAdrian Chadd * XXX since the TXQ lock is being held here (and I dislike holding 1496eb6f0de0SAdrian Chadd * it for this long when not doing software aggregation), later on 1497eb6f0de0SAdrian Chadd * break this function into "setup_normal" and "xmit_normal". The 1498eb6f0de0SAdrian Chadd * lock only needs to be held for the ath_tx_handoff call. 149922a3aee6SAdrian Chadd * 150022a3aee6SAdrian Chadd * XXX we don't update the leak count here - if we're doing 150122a3aee6SAdrian Chadd * direct frame dispatch, we need to be able to do it without 150222a3aee6SAdrian Chadd * decrementing the leak count (eg multicast queue frames.) 1503eb6f0de0SAdrian Chadd */ 1504eb6f0de0SAdrian Chadd static void 1505eb6f0de0SAdrian Chadd ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq, 1506eb6f0de0SAdrian Chadd struct ath_buf *bf) 1507eb6f0de0SAdrian Chadd { 15080c54de88SAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 15090c54de88SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 1510eb6f0de0SAdrian Chadd 1511375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1512eb6f0de0SAdrian Chadd 15130c54de88SAdrian Chadd /* 15140c54de88SAdrian Chadd * For now, just enable CLRDMASK. ath_tx_xmit_normal() does 15150c54de88SAdrian Chadd * set a completion handler however it doesn't (yet) properly 15160c54de88SAdrian Chadd * handle the strict ordering requirements needed for normal, 15170c54de88SAdrian Chadd * non-aggregate session frames. 15180c54de88SAdrian Chadd * 15190c54de88SAdrian Chadd * Once this is implemented, only set CLRDMASK like this for 15200c54de88SAdrian Chadd * frames that must go out - eg management/raw frames. 15210c54de88SAdrian Chadd */ 15220c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 15230c54de88SAdrian Chadd 1524eb6f0de0SAdrian Chadd /* Setup the descriptor before handoff */ 1525eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 1526e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 1527e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 1528eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 1529e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 1530eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 1531eb6f0de0SAdrian Chadd 15320c54de88SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 15330c54de88SAdrian Chadd tid->hwq_depth++; 15340c54de88SAdrian Chadd 15350c54de88SAdrian Chadd /* Assign the completion handler */ 15360c54de88SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 15374e81f27cSAdrian Chadd 1538eb6f0de0SAdrian Chadd /* Hand off to hardware */ 1539eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 1540eb6f0de0SAdrian Chadd } 1541eb6f0de0SAdrian Chadd 1542d05b576dSAdrian Chadd /* 1543d05b576dSAdrian Chadd * Do the basic frame setup stuff that's required before the frame 1544d05b576dSAdrian Chadd * is added to a software queue. 1545d05b576dSAdrian Chadd * 1546d05b576dSAdrian Chadd * All frames get mostly the same treatment and it's done once. 1547d05b576dSAdrian Chadd * Retransmits fiddle with things like the rate control setup, 1548d05b576dSAdrian Chadd * setting the retransmit bit in the packet; doing relevant DMA/bus 1549d05b576dSAdrian Chadd * syncing and relinking it (back) into the hardware TX queue. 1550d05b576dSAdrian Chadd * 1551d05b576dSAdrian Chadd * Note that this may cause the mbuf to be reallocated, so 1552d05b576dSAdrian Chadd * m0 may not be valid. 1553d05b576dSAdrian Chadd */ 1554eb6f0de0SAdrian Chadd static int 1555eb6f0de0SAdrian Chadd ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni, 1556b43facbfSAdrian Chadd struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq) 1557b8e788a5SAdrian Chadd { 1558b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 1559b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1560b8e788a5SAdrian Chadd struct ifnet *ifp = sc->sc_ifp; 1561b8e788a5SAdrian Chadd struct ieee80211com *ic = ifp->if_l2com; 1562b8e788a5SAdrian Chadd const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams; 1563b8e788a5SAdrian Chadd int error, iswep, ismcast, isfrag, ismrr; 1564eb6f0de0SAdrian Chadd int keyix, hdrlen, pktlen, try0 = 0; 1565eb6f0de0SAdrian Chadd u_int8_t rix = 0, txrate = 0; 1566b8e788a5SAdrian Chadd struct ath_desc *ds; 1567b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 1568eb6f0de0SAdrian Chadd u_int subtype, flags; 1569b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 1570b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 1571b8e788a5SAdrian Chadd HAL_BOOL shortPreamble; 1572b8e788a5SAdrian Chadd struct ath_node *an; 1573b8e788a5SAdrian Chadd u_int pri; 1574b8e788a5SAdrian Chadd 15757561cb5cSAdrian Chadd /* 15767561cb5cSAdrian Chadd * To ensure that both sequence numbers and the CCMP PN handling 15777561cb5cSAdrian Chadd * is "correct", make sure that the relevant TID queue is locked. 15787561cb5cSAdrian Chadd * Otherwise the CCMP PN and seqno may appear out of order, causing 15797561cb5cSAdrian Chadd * re-ordered frames to have out of order CCMP PN's, resulting 15807561cb5cSAdrian Chadd * in many, many frame drops. 15817561cb5cSAdrian Chadd */ 1582375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 15837561cb5cSAdrian Chadd 1584b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1585b8e788a5SAdrian Chadd iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 1586b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1587b8e788a5SAdrian Chadd isfrag = m0->m_flags & M_FRAG; 1588b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 1589b8e788a5SAdrian Chadd /* 1590b8e788a5SAdrian Chadd * Packet length must not include any 1591b8e788a5SAdrian Chadd * pad bytes; deduct them here. 1592b8e788a5SAdrian Chadd */ 1593b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3); 1594b8e788a5SAdrian Chadd 159581a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 1596eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen, 1597eb6f0de0SAdrian Chadd &pktlen, &keyix)) { 1598b8e788a5SAdrian Chadd ath_freetx(m0); 1599b8e788a5SAdrian Chadd return EIO; 1600b8e788a5SAdrian Chadd } 1601b8e788a5SAdrian Chadd 1602b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 1603b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1604b8e788a5SAdrian Chadd 1605b8e788a5SAdrian Chadd pktlen += IEEE80211_CRC_LEN; 1606b8e788a5SAdrian Chadd 1607b8e788a5SAdrian Chadd /* 1608b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 1609b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 1610b8e788a5SAdrian Chadd */ 1611b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 1612b8e788a5SAdrian Chadd if (error != 0) 1613b8e788a5SAdrian Chadd return error; 1614b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 1615b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 1616b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1617b8e788a5SAdrian Chadd 1618b8e788a5SAdrian Chadd /* setup descriptors */ 1619b8e788a5SAdrian Chadd ds = bf->bf_desc; 1620b8e788a5SAdrian Chadd rt = sc->sc_currates; 1621b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1622b8e788a5SAdrian Chadd 1623b8e788a5SAdrian Chadd /* 1624b8e788a5SAdrian Chadd * NB: the 802.11 layer marks whether or not we should 1625b8e788a5SAdrian Chadd * use short preamble based on the current mode and 1626b8e788a5SAdrian Chadd * negotiated parameters. 1627b8e788a5SAdrian Chadd */ 1628b8e788a5SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1629b8e788a5SAdrian Chadd (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 1630b8e788a5SAdrian Chadd shortPreamble = AH_TRUE; 1631b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_shortpre++; 1632b8e788a5SAdrian Chadd } else { 1633b8e788a5SAdrian Chadd shortPreamble = AH_FALSE; 1634b8e788a5SAdrian Chadd } 1635b8e788a5SAdrian Chadd 1636b8e788a5SAdrian Chadd an = ATH_NODE(ni); 16374e81f27cSAdrian Chadd //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 16384e81f27cSAdrian Chadd flags = 0; 1639b8e788a5SAdrian Chadd ismrr = 0; /* default no multi-rate retry*/ 1640b8e788a5SAdrian Chadd pri = M_WME_GETAC(m0); /* honor classification */ 1641b8e788a5SAdrian Chadd /* XXX use txparams instead of fixed values */ 1642b8e788a5SAdrian Chadd /* 1643b8e788a5SAdrian Chadd * Calculate Atheros packet type from IEEE80211 packet header, 1644b8e788a5SAdrian Chadd * setup for rate calculations, and select h/w transmit queue. 1645b8e788a5SAdrian Chadd */ 1646b8e788a5SAdrian Chadd switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1647b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_MGT: 1648b8e788a5SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1649b8e788a5SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 1650b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_BEACON; 1651b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1652b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PROBE_RESP; 1653b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 1654b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_ATIM; 1655b8e788a5SAdrian Chadd else 1656b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* XXX */ 1657b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1658b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1659b8e788a5SAdrian Chadd if (shortPreamble) 1660b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1661b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1662b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1663b8e788a5SAdrian Chadd break; 1664b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_CTL: 1665b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */ 1666b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1667b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1668b8e788a5SAdrian Chadd if (shortPreamble) 1669b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1670b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1671b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1672b8e788a5SAdrian Chadd break; 1673b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_DATA: 1674b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* default */ 1675b8e788a5SAdrian Chadd /* 1676b8e788a5SAdrian Chadd * Data frames: multicast frames go out at a fixed rate, 1677b8e788a5SAdrian Chadd * EAPOL frames use the mgmt frame rate; otherwise consult 1678b8e788a5SAdrian Chadd * the rate control module for the rate to use. 1679b8e788a5SAdrian Chadd */ 1680b8e788a5SAdrian Chadd if (ismcast) { 1681b8e788a5SAdrian Chadd rix = an->an_mcastrix; 1682b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1683b8e788a5SAdrian Chadd if (shortPreamble) 1684b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1685b8e788a5SAdrian Chadd try0 = 1; 1686b8e788a5SAdrian Chadd } else if (m0->m_flags & M_EAPOL) { 1687b8e788a5SAdrian Chadd /* XXX? maybe always use long preamble? */ 1688b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1689b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1690b8e788a5SAdrian Chadd if (shortPreamble) 1691b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1692b8e788a5SAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */ 1693b8e788a5SAdrian Chadd } else { 1694eb6f0de0SAdrian Chadd /* 1695eb6f0de0SAdrian Chadd * Do rate lookup on each TX, rather than using 1696eb6f0de0SAdrian Chadd * the hard-coded TX information decided here. 1697eb6f0de0SAdrian Chadd */ 1698b8e788a5SAdrian Chadd ismrr = 1; 1699eb6f0de0SAdrian Chadd bf->bf_state.bfs_doratelookup = 1; 1700b8e788a5SAdrian Chadd } 1701b8e788a5SAdrian Chadd if (cap->cap_wmeParams[pri].wmep_noackPolicy) 1702b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 1703b8e788a5SAdrian Chadd break; 1704b8e788a5SAdrian Chadd default: 1705b8e788a5SAdrian Chadd if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1706b8e788a5SAdrian Chadd wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1707b8e788a5SAdrian Chadd /* XXX statistic */ 1708c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1709b8e788a5SAdrian Chadd ath_freetx(m0); 1710b8e788a5SAdrian Chadd return EIO; 1711b8e788a5SAdrian Chadd } 1712b8e788a5SAdrian Chadd 1713447fd44aSAdrian Chadd /* 1714447fd44aSAdrian Chadd * There are two known scenarios where the frame AC doesn't match 1715447fd44aSAdrian Chadd * what the destination TXQ is. 1716447fd44aSAdrian Chadd * 1717447fd44aSAdrian Chadd * + non-QoS frames (eg management?) that the net80211 stack has 1718447fd44aSAdrian Chadd * assigned a higher AC to, but since it's a non-QoS TID, it's 1719447fd44aSAdrian Chadd * being thrown into TID 16. TID 16 gets the AC_BE queue. 1720447fd44aSAdrian Chadd * It's quite possible that management frames should just be 1721447fd44aSAdrian Chadd * direct dispatched to hardware rather than go via the software 1722447fd44aSAdrian Chadd * queue; that should be investigated in the future. There are 1723447fd44aSAdrian Chadd * some specific scenarios where this doesn't make sense, mostly 1724447fd44aSAdrian Chadd * surrounding ADDBA request/response - hence why that is special 1725447fd44aSAdrian Chadd * cased. 1726447fd44aSAdrian Chadd * 1727447fd44aSAdrian Chadd * + Multicast frames going into the VAP mcast queue. That shows up 1728447fd44aSAdrian Chadd * as "TXQ 11". 1729447fd44aSAdrian Chadd * 1730447fd44aSAdrian Chadd * This driver should eventually support separate TID and TXQ locking, 1731447fd44aSAdrian Chadd * allowing for arbitrary AC frames to appear on arbitrary software 1732447fd44aSAdrian Chadd * queues, being queued to the "correct" hardware queue when needed. 1733447fd44aSAdrian Chadd */ 1734447fd44aSAdrian Chadd #if 0 17356deb7f32SAdrian Chadd if (txq != sc->sc_ac2q[pri]) { 17366deb7f32SAdrian Chadd device_printf(sc->sc_dev, 17376deb7f32SAdrian Chadd "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n", 17386deb7f32SAdrian Chadd __func__, 17396deb7f32SAdrian Chadd txq, 17406deb7f32SAdrian Chadd txq->axq_qnum, 17416deb7f32SAdrian Chadd pri, 17426deb7f32SAdrian Chadd sc->sc_ac2q[pri], 17436deb7f32SAdrian Chadd sc->sc_ac2q[pri]->axq_qnum); 17446deb7f32SAdrian Chadd } 1745447fd44aSAdrian Chadd #endif 17466deb7f32SAdrian Chadd 1747b8e788a5SAdrian Chadd /* 1748b8e788a5SAdrian Chadd * Calculate miscellaneous flags. 1749b8e788a5SAdrian Chadd */ 1750b8e788a5SAdrian Chadd if (ismcast) { 1751b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 1752b8e788a5SAdrian Chadd } else if (pktlen > vap->iv_rtsthreshold && 1753b8e788a5SAdrian Chadd (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) { 1754b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 1755b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_rts++; 1756b8e788a5SAdrian Chadd } 1757b8e788a5SAdrian Chadd if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */ 1758b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_noack++; 1759b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 1760b8e788a5SAdrian Chadd if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) { 1761b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_TDMA, 1762b8e788a5SAdrian Chadd "%s: discard frame, ACK required w/ TDMA\n", __func__); 1763b8e788a5SAdrian Chadd sc->sc_stats.ast_tdma_ack++; 1764c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1765b8e788a5SAdrian Chadd ath_freetx(m0); 1766b8e788a5SAdrian Chadd return EIO; 1767b8e788a5SAdrian Chadd } 1768b8e788a5SAdrian Chadd #endif 1769b8e788a5SAdrian Chadd 1770b8e788a5SAdrian Chadd /* 1771eb6f0de0SAdrian Chadd * Determine if a tx interrupt should be generated for 1772eb6f0de0SAdrian Chadd * this descriptor. We take a tx interrupt to reap 1773eb6f0de0SAdrian Chadd * descriptors when the h/w hits an EOL condition or 1774eb6f0de0SAdrian Chadd * when the descriptor is specifically marked to generate 1775eb6f0de0SAdrian Chadd * an interrupt. We periodically mark descriptors in this 1776eb6f0de0SAdrian Chadd * way to insure timely replenishing of the supply needed 1777eb6f0de0SAdrian Chadd * for sending frames. Defering interrupts reduces system 1778eb6f0de0SAdrian Chadd * load and potentially allows more concurrent work to be 1779eb6f0de0SAdrian Chadd * done but if done to aggressively can cause senders to 1780eb6f0de0SAdrian Chadd * backup. 1781eb6f0de0SAdrian Chadd * 1782eb6f0de0SAdrian Chadd * NB: use >= to deal with sc_txintrperiod changing 1783eb6f0de0SAdrian Chadd * dynamically through sysctl. 1784b8e788a5SAdrian Chadd */ 1785eb6f0de0SAdrian Chadd if (flags & HAL_TXDESC_INTREQ) { 1786eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1787eb6f0de0SAdrian Chadd } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) { 1788eb6f0de0SAdrian Chadd flags |= HAL_TXDESC_INTREQ; 1789eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1790eb6f0de0SAdrian Chadd } 1791e42b5dbaSAdrian Chadd 1792eb6f0de0SAdrian Chadd /* This point forward is actual TX bits */ 1793b8e788a5SAdrian Chadd 1794b8e788a5SAdrian Chadd /* 1795b8e788a5SAdrian Chadd * At this point we are committed to sending the frame 1796b8e788a5SAdrian Chadd * and we don't need to look at m_nextpkt; clear it in 1797b8e788a5SAdrian Chadd * case this frame is part of frag chain. 1798b8e788a5SAdrian Chadd */ 1799b8e788a5SAdrian Chadd m0->m_nextpkt = NULL; 1800b8e788a5SAdrian Chadd 1801b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 1802b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len, 1803b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 1804b8e788a5SAdrian Chadd 1805b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 1806b8e788a5SAdrian Chadd u_int64_t tsf = ath_hal_gettsf64(ah); 1807b8e788a5SAdrian Chadd 1808b8e788a5SAdrian Chadd sc->sc_tx_th.wt_tsf = htole64(tsf); 1809b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 1810b8e788a5SAdrian Chadd if (iswep) 1811b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1812b8e788a5SAdrian Chadd if (isfrag) 1813b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 1814b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 181512087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni); 1816b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 1817b8e788a5SAdrian Chadd 1818b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 1819b8e788a5SAdrian Chadd } 1820b8e788a5SAdrian Chadd 1821eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 1822eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1823c1782ce0SAdrian Chadd 1824b8e788a5SAdrian Chadd /* 1825eb6f0de0SAdrian Chadd * ath_buf_set_rate needs at least one rate/try to setup 1826eb6f0de0SAdrian Chadd * the rate scenario. 1827b8e788a5SAdrian Chadd */ 1828eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1829eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1830eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 1831eb6f0de0SAdrian Chadd 1832eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 1833eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 1834eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 1835eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 183612087a07SAdrian Chadd bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni); 1837eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 1838eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1839eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 1840eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = sc->sc_txantenna; 1841875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1842eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = shortPreamble; 1843eb6f0de0SAdrian Chadd 1844eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 1845eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */ 1846eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; /* calculated later */ 1847eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1848eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 1849eb6f0de0SAdrian Chadd 1850eb6f0de0SAdrian Chadd return 0; 1851eb6f0de0SAdrian Chadd } 1852eb6f0de0SAdrian Chadd 1853b8e788a5SAdrian Chadd /* 18544e81f27cSAdrian Chadd * Queue a frame to the hardware or software queue. 1855eb6f0de0SAdrian Chadd * 1856eb6f0de0SAdrian Chadd * This can be called by the net80211 code. 1857eb6f0de0SAdrian Chadd * 1858eb6f0de0SAdrian Chadd * XXX what about locking? Or, push the seqno assign into the 1859eb6f0de0SAdrian Chadd * XXX aggregate scheduler so its serialised? 18604e81f27cSAdrian Chadd * 18614e81f27cSAdrian Chadd * XXX When sending management frames via ath_raw_xmit(), 18624e81f27cSAdrian Chadd * should CLRDMASK be set unconditionally? 1863b8e788a5SAdrian Chadd */ 1864eb6f0de0SAdrian Chadd int 1865eb6f0de0SAdrian Chadd ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, 1866eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 1867eb6f0de0SAdrian Chadd { 1868eb6f0de0SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 1869eb6f0de0SAdrian Chadd struct ath_vap *avp = ATH_VAP(vap); 18709c85ff91SAdrian Chadd int r = 0; 1871eb6f0de0SAdrian Chadd u_int pri; 1872eb6f0de0SAdrian Chadd int tid; 1873eb6f0de0SAdrian Chadd struct ath_txq *txq; 1874eb6f0de0SAdrian Chadd int ismcast; 1875eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 1876eb6f0de0SAdrian Chadd int is_ampdu, is_ampdu_tx, is_ampdu_pending; 1877a108d2d6SAdrian Chadd ieee80211_seq seqno; 1878eb6f0de0SAdrian Chadd uint8_t type, subtype; 187922a3aee6SAdrian Chadd int queue_to_head; 1880eb6f0de0SAdrian Chadd 1881375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1882375307d4SAdrian Chadd 1883eb6f0de0SAdrian Chadd /* 1884eb6f0de0SAdrian Chadd * Determine the target hardware queue. 1885eb6f0de0SAdrian Chadd * 1886b43facbfSAdrian Chadd * For multicast frames, the txq gets overridden appropriately 1887b43facbfSAdrian Chadd * depending upon the state of PS. 1888eb6f0de0SAdrian Chadd * 1889eb6f0de0SAdrian Chadd * For any other frame, we do a TID/QoS lookup inside the frame 1890eb6f0de0SAdrian Chadd * to see what the TID should be. If it's a non-QoS frame, the 1891eb6f0de0SAdrian Chadd * AC and TID are overridden. The TID/TXQ code assumes the 1892eb6f0de0SAdrian Chadd * TID is on a predictable hardware TXQ, so we don't support 1893eb6f0de0SAdrian Chadd * having a node TID queued to multiple hardware TXQs. 1894eb6f0de0SAdrian Chadd * This may change in the future but would require some locking 1895eb6f0de0SAdrian Chadd * fudgery. 1896eb6f0de0SAdrian Chadd */ 1897eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 1898eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 1899eb6f0de0SAdrian Chadd 1900eb6f0de0SAdrian Chadd txq = sc->sc_ac2q[pri]; 1901eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1902eb6f0de0SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1903eb6f0de0SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1904eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1905eb6f0de0SAdrian Chadd 19069c85ff91SAdrian Chadd /* 19079c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 19089c85ff91SAdrian Chadd * 19099c85ff91SAdrian Chadd * XXX duplicated in ath_raw_xmit(). 19109c85ff91SAdrian Chadd */ 19119c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 191292e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 191392e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 19149c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 19159c85ff91SAdrian Chadd m_freem(m0); 191655cf0326SAdrian Chadd return (ENOBUFS); 19179c85ff91SAdrian Chadd } 19189c85ff91SAdrian Chadd } 19199c85ff91SAdrian Chadd 192022a3aee6SAdrian Chadd /* 192122a3aee6SAdrian Chadd * Enforce how deep the unicast queue can grow. 192222a3aee6SAdrian Chadd * 192322a3aee6SAdrian Chadd * If the node is in power save then we don't want 192422a3aee6SAdrian Chadd * the software queue to grow too deep, or a node may 192522a3aee6SAdrian Chadd * end up consuming all of the ath_buf entries. 192622a3aee6SAdrian Chadd * 192722a3aee6SAdrian Chadd * For now, only do this for DATA frames. 192822a3aee6SAdrian Chadd * 192922a3aee6SAdrian Chadd * We will want to cap how many management/control 193022a3aee6SAdrian Chadd * frames get punted to the software queue so it doesn't 193122a3aee6SAdrian Chadd * fill up. But the correct solution isn't yet obvious. 193222a3aee6SAdrian Chadd * In any case, this check should at least let frames pass 193322a3aee6SAdrian Chadd * that we are direct-dispatching. 193422a3aee6SAdrian Chadd * 193522a3aee6SAdrian Chadd * XXX TODO: duplicate this to the raw xmit path! 193622a3aee6SAdrian Chadd */ 193722a3aee6SAdrian Chadd if (type == IEEE80211_FC0_TYPE_DATA && 193822a3aee6SAdrian Chadd ATH_NODE(ni)->an_is_powersave && 193922a3aee6SAdrian Chadd ATH_NODE(ni)->an_swq_depth > 194022a3aee6SAdrian Chadd sc->sc_txq_node_psq_maxdepth) { 194122a3aee6SAdrian Chadd sc->sc_stats.ast_tx_node_psq_overflow++; 194222a3aee6SAdrian Chadd m_freem(m0); 194322a3aee6SAdrian Chadd return (ENOBUFS); 194422a3aee6SAdrian Chadd } 194522a3aee6SAdrian Chadd 1946eb6f0de0SAdrian Chadd /* A-MPDU TX */ 1947eb6f0de0SAdrian Chadd is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid); 1948eb6f0de0SAdrian Chadd is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1949eb6f0de0SAdrian Chadd is_ampdu = is_ampdu_tx | is_ampdu_pending; 1950eb6f0de0SAdrian Chadd 1951a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1952a108d2d6SAdrian Chadd __func__, tid, pri, is_ampdu); 1953eb6f0de0SAdrian Chadd 195446634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 195546634305SAdrian Chadd bf->bf_state.bfs_tid = tid; 1956fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 195746634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 195846634305SAdrian Chadd 1959b837332dSAdrian Chadd #if 1 1960c5940c30SAdrian Chadd /* 1961b43facbfSAdrian Chadd * When servicing one or more stations in power-save mode 1962b43facbfSAdrian Chadd * (or) if there is some mcast data waiting on the mcast 1963b43facbfSAdrian Chadd * queue (to prevent out of order delivery) multicast frames 1964b43facbfSAdrian Chadd * must be bufferd until after the beacon. 1965b43facbfSAdrian Chadd * 1966b43facbfSAdrian Chadd * TODO: we should lock the mcastq before we check the length. 1967c5940c30SAdrian Chadd */ 1968b837332dSAdrian Chadd if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 1969eb6f0de0SAdrian Chadd txq = &avp->av_mcastq; 197046634305SAdrian Chadd /* 197146634305SAdrian Chadd * Mark the frame as eventually belonging on the CAB 197246634305SAdrian Chadd * queue, so the descriptor setup functions will 197346634305SAdrian Chadd * correctly initialise the descriptor 'qcuId' field. 197446634305SAdrian Chadd */ 1975fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum; 197646634305SAdrian Chadd } 1977b837332dSAdrian Chadd #endif 1978eb6f0de0SAdrian Chadd 1979eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 1980eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 1981eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 1982eb6f0de0SAdrian Chadd 19837561cb5cSAdrian Chadd /* A-MPDU TX? Manually set sequence number */ 19847561cb5cSAdrian Chadd /* 19857561cb5cSAdrian Chadd * Don't do it whilst pending; the net80211 layer still 19867561cb5cSAdrian Chadd * assigns them. 19877561cb5cSAdrian Chadd */ 19887561cb5cSAdrian Chadd if (is_ampdu_tx) { 1989eb6f0de0SAdrian Chadd /* 1990eb6f0de0SAdrian Chadd * Always call; this function will 1991eb6f0de0SAdrian Chadd * handle making sure that null data frames 1992eb6f0de0SAdrian Chadd * don't get a sequence number from the current 1993eb6f0de0SAdrian Chadd * TID and thus mess with the BAW. 1994eb6f0de0SAdrian Chadd */ 1995a108d2d6SAdrian Chadd seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0); 199642f4d061SAdrian Chadd 199742f4d061SAdrian Chadd /* 199842f4d061SAdrian Chadd * Don't add QoS NULL frames to the BAW. 199942f4d061SAdrian Chadd */ 2000a108d2d6SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh) && 2001a108d2d6SAdrian Chadd subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) { 2002eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 1; 2003eb6f0de0SAdrian Chadd } 2004c1782ce0SAdrian Chadd } 2005c1782ce0SAdrian Chadd 2006eb6f0de0SAdrian Chadd /* 2007eb6f0de0SAdrian Chadd * If needed, the sequence number has been assigned. 2008eb6f0de0SAdrian Chadd * Squirrel it away somewhere easy to get to. 2009eb6f0de0SAdrian Chadd */ 2010a108d2d6SAdrian Chadd bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT; 2011b8e788a5SAdrian Chadd 2012eb6f0de0SAdrian Chadd /* Is ampdu pending? fetch the seqno and print it out */ 2013eb6f0de0SAdrian Chadd if (is_ampdu_pending) 2014eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 2015eb6f0de0SAdrian Chadd "%s: tid %d: ampdu pending, seqno %d\n", 2016eb6f0de0SAdrian Chadd __func__, tid, M_SEQNO_GET(m0)); 2017eb6f0de0SAdrian Chadd 2018eb6f0de0SAdrian Chadd /* This also sets up the DMA map */ 2019b43facbfSAdrian Chadd r = ath_tx_normal_setup(sc, ni, bf, m0, txq); 2020eb6f0de0SAdrian Chadd 2021eb6f0de0SAdrian Chadd if (r != 0) 20227561cb5cSAdrian Chadd goto done; 2023eb6f0de0SAdrian Chadd 2024eb6f0de0SAdrian Chadd /* At this point m0 could have changed! */ 2025eb6f0de0SAdrian Chadd m0 = bf->bf_m; 2026eb6f0de0SAdrian Chadd 2027eb6f0de0SAdrian Chadd #if 1 2028eb6f0de0SAdrian Chadd /* 2029eb6f0de0SAdrian Chadd * If it's a multicast frame, do a direct-dispatch to the 2030eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2031eb6f0de0SAdrian Chadd * queuing it. 2032eb6f0de0SAdrian Chadd */ 2033eb6f0de0SAdrian Chadd /* 2034eb6f0de0SAdrian Chadd * If it's a BAR frame, do a direct dispatch to the 2035eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2036eb6f0de0SAdrian Chadd * queuing it, as the TID will now be paused. 2037eb6f0de0SAdrian Chadd * Sending a BAR frame can occur from the net80211 txa timer 2038eb6f0de0SAdrian Chadd * (ie, retries) or from the ath txtask (completion call.) 2039eb6f0de0SAdrian Chadd * It queues directly to hardware because the TID is paused 2040eb6f0de0SAdrian Chadd * at this point (and won't be unpaused until the BAR has 2041eb6f0de0SAdrian Chadd * either been TXed successfully or max retries has been 2042eb6f0de0SAdrian Chadd * reached.) 2043eb6f0de0SAdrian Chadd */ 204422a3aee6SAdrian Chadd /* 204522a3aee6SAdrian Chadd * Until things are better debugged - if this node is asleep 204622a3aee6SAdrian Chadd * and we're sending it a non-BAR frame, direct dispatch it. 204722a3aee6SAdrian Chadd * Why? Because we need to figure out what's actually being 204822a3aee6SAdrian Chadd * sent - eg, during reassociation/reauthentication after 204922a3aee6SAdrian Chadd * the node (last) disappeared whilst asleep, the driver should 205022a3aee6SAdrian Chadd * have unpaused/unsleep'ed the node. So until that is 205122a3aee6SAdrian Chadd * sorted out, use this workaround. 205222a3aee6SAdrian Chadd */ 2053eb6f0de0SAdrian Chadd if (txq == &avp->av_mcastq) { 2054d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 20550b96ef63SAdrian Chadd "%s: bf=%p: mcastq: TX'ing\n", __func__, bf); 20564e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2057eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 205822a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 205922a3aee6SAdrian Chadd &queue_to_head)) { 206022a3aee6SAdrian Chadd ath_tx_swq(sc, ni, txq, queue_to_head, bf); 206122a3aee6SAdrian Chadd } else { 20624e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2063eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2064eb6f0de0SAdrian Chadd } 2065eb6f0de0SAdrian Chadd #else 2066eb6f0de0SAdrian Chadd /* 2067eb6f0de0SAdrian Chadd * For now, since there's no software queue, 2068eb6f0de0SAdrian Chadd * direct-dispatch to the hardware. 2069eb6f0de0SAdrian Chadd */ 20704e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 207122a3aee6SAdrian Chadd /* 207222a3aee6SAdrian Chadd * Update the current leak count if 207322a3aee6SAdrian Chadd * we're leaking frames; and set the 207422a3aee6SAdrian Chadd * MORE flag as appropriate. 207522a3aee6SAdrian Chadd */ 207622a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 2077eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2078eb6f0de0SAdrian Chadd #endif 20797561cb5cSAdrian Chadd done: 2080b8e788a5SAdrian Chadd return 0; 2081b8e788a5SAdrian Chadd } 2082b8e788a5SAdrian Chadd 2083b8e788a5SAdrian Chadd static int 2084b8e788a5SAdrian Chadd ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni, 2085b8e788a5SAdrian Chadd struct ath_buf *bf, struct mbuf *m0, 2086b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2087b8e788a5SAdrian Chadd { 2088b8e788a5SAdrian Chadd struct ifnet *ifp = sc->sc_ifp; 2089b8e788a5SAdrian Chadd struct ieee80211com *ic = ifp->if_l2com; 2090b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 2091b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 2092b8e788a5SAdrian Chadd int error, ismcast, ismrr; 2093b8e788a5SAdrian Chadd int keyix, hdrlen, pktlen, try0, txantenna; 2094eb6f0de0SAdrian Chadd u_int8_t rix, txrate; 2095b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 2096eb6f0de0SAdrian Chadd u_int flags; 2097b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 2098b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 2099b8e788a5SAdrian Chadd struct ath_desc *ds; 2100b8e788a5SAdrian Chadd u_int pri; 2101eb6f0de0SAdrian Chadd int o_tid = -1; 2102eb6f0de0SAdrian Chadd int do_override; 210322a3aee6SAdrian Chadd uint8_t type, subtype; 210422a3aee6SAdrian Chadd int queue_to_head; 2105b8e788a5SAdrian Chadd 2106375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2107375307d4SAdrian Chadd 2108b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2109b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2110b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 2111b8e788a5SAdrian Chadd /* 2112b8e788a5SAdrian Chadd * Packet length must not include any 2113b8e788a5SAdrian Chadd * pad bytes; deduct them here. 2114b8e788a5SAdrian Chadd */ 2115b8e788a5SAdrian Chadd /* XXX honor IEEE80211_BPF_DATAPAD */ 2116b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN; 2117b8e788a5SAdrian Chadd 211822a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 211922a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 212022a3aee6SAdrian Chadd 212103682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, 212203682514SAdrian Chadd "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf); 212303682514SAdrian Chadd 2124eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n", 2125eb6f0de0SAdrian Chadd __func__, ismcast); 2126eb6f0de0SAdrian Chadd 21277561cb5cSAdrian Chadd pri = params->ibp_pri & 3; 21287561cb5cSAdrian Chadd /* Override pri if the frame isn't a QoS one */ 21297561cb5cSAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 21307561cb5cSAdrian Chadd pri = ath_tx_getac(sc, m0); 21317561cb5cSAdrian Chadd 21327561cb5cSAdrian Chadd /* XXX If it's an ADDBA, override the correct queue */ 21337561cb5cSAdrian Chadd do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid); 21347561cb5cSAdrian Chadd 21357561cb5cSAdrian Chadd /* Map ADDBA to the correct priority */ 21367561cb5cSAdrian Chadd if (do_override) { 21377561cb5cSAdrian Chadd #if 0 21387561cb5cSAdrian Chadd device_printf(sc->sc_dev, 21397561cb5cSAdrian Chadd "%s: overriding tid %d pri %d -> %d\n", 21407561cb5cSAdrian Chadd __func__, o_tid, pri, TID_TO_WME_AC(o_tid)); 21417561cb5cSAdrian Chadd #endif 21427561cb5cSAdrian Chadd pri = TID_TO_WME_AC(o_tid); 21437561cb5cSAdrian Chadd } 21447561cb5cSAdrian Chadd 214581a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 2146eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, 2147eb6f0de0SAdrian Chadd m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0, 2148eb6f0de0SAdrian Chadd &hdrlen, &pktlen, &keyix)) { 2149b8e788a5SAdrian Chadd ath_freetx(m0); 2150b8e788a5SAdrian Chadd return EIO; 2151b8e788a5SAdrian Chadd } 2152b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 2153b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2154b8e788a5SAdrian Chadd 2155eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 2156eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 2157eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 2158eb6f0de0SAdrian Chadd 2159b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 2160b8e788a5SAdrian Chadd if (error != 0) 2161b8e788a5SAdrian Chadd return error; 2162b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 2163b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2164b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 2165b8e788a5SAdrian Chadd 21664e81f27cSAdrian Chadd /* Always enable CLRDMASK for raw frames for now.. */ 2167b8e788a5SAdrian Chadd flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 2168b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 2169b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_RTS) 2170b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 2171eb6f0de0SAdrian Chadd else if (params->ibp_flags & IEEE80211_BPF_CTS) { 2172eb6f0de0SAdrian Chadd /* XXX assume 11g/11n protection? */ 2173eb6f0de0SAdrian Chadd bf->bf_state.bfs_doprot = 1; 2174b8e788a5SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 2175eb6f0de0SAdrian Chadd } 2176b8e788a5SAdrian Chadd /* XXX leave ismcast to injector? */ 2177b8e788a5SAdrian Chadd if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast) 2178b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 2179b8e788a5SAdrian Chadd 2180b8e788a5SAdrian Chadd rt = sc->sc_currates; 2181b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2182b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate0); 2183b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 2184b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) 2185b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 2186b8e788a5SAdrian Chadd sc->sc_txrix = rix; 2187b8e788a5SAdrian Chadd try0 = params->ibp_try0; 2188b8e788a5SAdrian Chadd ismrr = (params->ibp_try1 != 0); 2189b8e788a5SAdrian Chadd txantenna = params->ibp_pri >> 2; 2190b8e788a5SAdrian Chadd if (txantenna == 0) /* XXX? */ 2191b8e788a5SAdrian Chadd txantenna = sc->sc_txantenna; 219279f02dbfSAdrian Chadd 219379f02dbfSAdrian Chadd /* 2194eb6f0de0SAdrian Chadd * Since ctsrate is fixed, store it away for later 2195eb6f0de0SAdrian Chadd * use when the descriptor fields are being set. 219679f02dbfSAdrian Chadd */ 2197eb6f0de0SAdrian Chadd if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) 2198eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate; 219979f02dbfSAdrian Chadd 2200b8e788a5SAdrian Chadd /* 2201b8e788a5SAdrian Chadd * NB: we mark all packets as type PSPOLL so the h/w won't 2202b8e788a5SAdrian Chadd * set the sequence number, duration, etc. 2203b8e788a5SAdrian Chadd */ 2204b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; 2205b8e788a5SAdrian Chadd 2206b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 2207b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len, 2208b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 2209b8e788a5SAdrian Chadd 2210b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 2211b8e788a5SAdrian Chadd u_int64_t tsf = ath_hal_gettsf64(ah); 2212b8e788a5SAdrian Chadd 2213b8e788a5SAdrian Chadd sc->sc_tx_th.wt_tsf = htole64(tsf); 2214b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 2215b8e788a5SAdrian Chadd if (wh->i_fc[1] & IEEE80211_FC1_WEP) 2216b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2217b8e788a5SAdrian Chadd if (m0->m_flags & M_FRAG) 2218b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 2219b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 222012087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = MIN(params->ibp_power, 222112087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2222b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 2223b8e788a5SAdrian Chadd 2224b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 2225b8e788a5SAdrian Chadd } 2226b8e788a5SAdrian Chadd 2227b8e788a5SAdrian Chadd /* 2228b8e788a5SAdrian Chadd * Formulate first tx descriptor with tx controls. 2229b8e788a5SAdrian Chadd */ 2230b8e788a5SAdrian Chadd ds = bf->bf_desc; 2231b8e788a5SAdrian Chadd /* XXX check return value? */ 2232eb6f0de0SAdrian Chadd 2233eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 2234eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 2235eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 2236eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 223712087a07SAdrian Chadd bf->bf_state.bfs_txpower = MIN(params->ibp_power, 223812087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2239eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 2240eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 2241eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 2242eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = txantenna; 2243875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 2244eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = 2245eb6f0de0SAdrian Chadd !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2246b8e788a5SAdrian Chadd 224746634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 224846634305SAdrian Chadd bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); 2249fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum; 225046634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 225146634305SAdrian Chadd 2252eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 2253eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 2254eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 2255eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 2256eb6f0de0SAdrian Chadd 2257eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 2258eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 2259eb6f0de0SAdrian Chadd 2260eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = 2261eb6f0de0SAdrian Chadd ath_tx_findrix(sc, params->ibp_rate0); 2262eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 2263eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 2264c1782ce0SAdrian Chadd 2265c1782ce0SAdrian Chadd if (ismrr) { 2266eb6f0de0SAdrian Chadd int rix; 2267c1782ce0SAdrian Chadd 2268b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate1); 2269eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].rix = rix; 2270eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].tries = params->ibp_try1; 2271c1782ce0SAdrian Chadd 2272eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate2); 2273eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].rix = rix; 2274eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].tries = params->ibp_try2; 2275eb6f0de0SAdrian Chadd 2276eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate3); 2277eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = rix; 2278eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = params->ibp_try3; 2279c1782ce0SAdrian Chadd } 2280eb6f0de0SAdrian Chadd /* 2281eb6f0de0SAdrian Chadd * All the required rate control decisions have been made; 2282eb6f0de0SAdrian Chadd * fill in the rc flags. 2283eb6f0de0SAdrian Chadd */ 2284eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 2285b8e788a5SAdrian Chadd 2286b8e788a5SAdrian Chadd /* NB: no buffered multicast in power save support */ 2287eb6f0de0SAdrian Chadd 2288eb6f0de0SAdrian Chadd /* 2289eb6f0de0SAdrian Chadd * If we're overiding the ADDBA destination, dump directly 2290eb6f0de0SAdrian Chadd * into the hardware queue, right after any pending 2291eb6f0de0SAdrian Chadd * frames to that node are. 2292eb6f0de0SAdrian Chadd */ 2293eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n", 2294eb6f0de0SAdrian Chadd __func__, do_override); 2295eb6f0de0SAdrian Chadd 229694eefcf1SAdrian Chadd #if 1 229722a3aee6SAdrian Chadd /* 229822a3aee6SAdrian Chadd * Put addba frames in the right place in the right TID/HWQ. 229922a3aee6SAdrian Chadd */ 2300eb6f0de0SAdrian Chadd if (do_override) { 23014e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 230222a3aee6SAdrian Chadd /* 230322a3aee6SAdrian Chadd * XXX if it's addba frames, should we be leaking 230422a3aee6SAdrian Chadd * them out via the frame leak method? 230522a3aee6SAdrian Chadd * XXX for now let's not risk it; but we may wish 230622a3aee6SAdrian Chadd * to investigate this later. 230722a3aee6SAdrian Chadd */ 2308eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 230922a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 231022a3aee6SAdrian Chadd &queue_to_head)) { 2311eb6f0de0SAdrian Chadd /* Queue to software queue */ 231222a3aee6SAdrian Chadd ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf); 231322a3aee6SAdrian Chadd } else { 231422a3aee6SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 231522a3aee6SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2316eb6f0de0SAdrian Chadd } 231794eefcf1SAdrian Chadd #else 231894eefcf1SAdrian Chadd /* Direct-dispatch to the hardware */ 231994eefcf1SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 232022a3aee6SAdrian Chadd /* 232122a3aee6SAdrian Chadd * Update the current leak count if 232222a3aee6SAdrian Chadd * we're leaking frames; and set the 232322a3aee6SAdrian Chadd * MORE flag as appropriate. 232422a3aee6SAdrian Chadd */ 232522a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 232694eefcf1SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 232794eefcf1SAdrian Chadd #endif 2328b8e788a5SAdrian Chadd return 0; 2329b8e788a5SAdrian Chadd } 2330b8e788a5SAdrian Chadd 2331eb6f0de0SAdrian Chadd /* 2332eb6f0de0SAdrian Chadd * Send a raw frame. 2333eb6f0de0SAdrian Chadd * 2334eb6f0de0SAdrian Chadd * This can be called by net80211. 2335eb6f0de0SAdrian Chadd */ 2336b8e788a5SAdrian Chadd int 2337b8e788a5SAdrian Chadd ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2338b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2339b8e788a5SAdrian Chadd { 2340b8e788a5SAdrian Chadd struct ieee80211com *ic = ni->ni_ic; 2341b8e788a5SAdrian Chadd struct ifnet *ifp = ic->ic_ifp; 2342b8e788a5SAdrian Chadd struct ath_softc *sc = ifp->if_softc; 2343b8e788a5SAdrian Chadd struct ath_buf *bf; 23449c85ff91SAdrian Chadd struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *); 23459c85ff91SAdrian Chadd int error = 0; 2346b8e788a5SAdrian Chadd 2347ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2348ef27340cSAdrian Chadd if (sc->sc_inreset_cnt > 0) { 2349ef27340cSAdrian Chadd device_printf(sc->sc_dev, "%s: sc_inreset_cnt > 0; bailing\n", 2350ef27340cSAdrian Chadd __func__); 2351ef27340cSAdrian Chadd error = EIO; 2352ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2353ef27340cSAdrian Chadd goto bad0; 2354ef27340cSAdrian Chadd } 2355ef27340cSAdrian Chadd sc->sc_txstart_cnt++; 2356ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2357ef27340cSAdrian Chadd 23581b5c5f5aSAdrian Chadd ATH_TX_LOCK(sc); 23591b5c5f5aSAdrian Chadd 2360b8e788a5SAdrian Chadd if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) { 2361b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__, 2362b8e788a5SAdrian Chadd (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ? 2363b8e788a5SAdrian Chadd "!running" : "invalid"); 2364b8e788a5SAdrian Chadd m_freem(m); 2365b8e788a5SAdrian Chadd error = ENETDOWN; 2366b8e788a5SAdrian Chadd goto bad; 2367b8e788a5SAdrian Chadd } 23689c85ff91SAdrian Chadd 23699c85ff91SAdrian Chadd /* 23709c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 23719c85ff91SAdrian Chadd * 23729c85ff91SAdrian Chadd * XXX duplicated in ath_tx_start(). 23739c85ff91SAdrian Chadd */ 23749c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 237592e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 237692e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 23779c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 23789c85ff91SAdrian Chadd error = ENOBUFS; 23799c85ff91SAdrian Chadd } 23809c85ff91SAdrian Chadd 23819c85ff91SAdrian Chadd if (error != 0) { 23829c85ff91SAdrian Chadd m_freem(m); 23839c85ff91SAdrian Chadd goto bad; 23849c85ff91SAdrian Chadd } 23859c85ff91SAdrian Chadd } 23869c85ff91SAdrian Chadd 2387b8e788a5SAdrian Chadd /* 2388b8e788a5SAdrian Chadd * Grab a TX buffer and associated resources. 2389b8e788a5SAdrian Chadd */ 2390af33d486SAdrian Chadd bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT); 2391b8e788a5SAdrian Chadd if (bf == NULL) { 2392b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nobuf++; 2393b8e788a5SAdrian Chadd m_freem(m); 2394b8e788a5SAdrian Chadd error = ENOBUFS; 2395b8e788a5SAdrian Chadd goto bad; 2396b8e788a5SAdrian Chadd } 239703682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n", 239803682514SAdrian Chadd m, params, bf); 2399b8e788a5SAdrian Chadd 2400b8e788a5SAdrian Chadd if (params == NULL) { 2401b8e788a5SAdrian Chadd /* 2402b8e788a5SAdrian Chadd * Legacy path; interpret frame contents to decide 2403b8e788a5SAdrian Chadd * precisely how to send the frame. 2404b8e788a5SAdrian Chadd */ 2405b8e788a5SAdrian Chadd if (ath_tx_start(sc, ni, bf, m)) { 2406b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2407b8e788a5SAdrian Chadd goto bad2; 2408b8e788a5SAdrian Chadd } 2409b8e788a5SAdrian Chadd } else { 2410b8e788a5SAdrian Chadd /* 2411b8e788a5SAdrian Chadd * Caller supplied explicit parameters to use in 2412b8e788a5SAdrian Chadd * sending the frame. 2413b8e788a5SAdrian Chadd */ 2414b8e788a5SAdrian Chadd if (ath_tx_raw_start(sc, ni, bf, m, params)) { 2415b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2416b8e788a5SAdrian Chadd goto bad2; 2417b8e788a5SAdrian Chadd } 2418b8e788a5SAdrian Chadd } 2419b8e788a5SAdrian Chadd sc->sc_wd_timer = 5; 2420b8e788a5SAdrian Chadd ifp->if_opackets++; 2421b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw++; 2422b8e788a5SAdrian Chadd 2423548a605dSAdrian Chadd /* 2424548a605dSAdrian Chadd * Update the TIM - if there's anything queued to the 2425548a605dSAdrian Chadd * software queue and power save is enabled, we should 2426548a605dSAdrian Chadd * set the TIM. 2427548a605dSAdrian Chadd */ 2428548a605dSAdrian Chadd ath_tx_update_tim(sc, ni, 1); 2429548a605dSAdrian Chadd 2430974185bbSAdrian Chadd ATH_TX_UNLOCK(sc); 2431974185bbSAdrian Chadd 2432ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2433ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2434ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2435ef27340cSAdrian Chadd 2436b8e788a5SAdrian Chadd return 0; 2437b8e788a5SAdrian Chadd bad2: 243803682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, " 243903682514SAdrian Chadd "bf=%p", 244003682514SAdrian Chadd m, 244103682514SAdrian Chadd params, 244203682514SAdrian Chadd bf); 2443b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 2444e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 2445b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 2446b8e788a5SAdrian Chadd bad: 24471b5c5f5aSAdrian Chadd 24481b5c5f5aSAdrian Chadd ATH_TX_UNLOCK(sc); 24491b5c5f5aSAdrian Chadd 2450ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2451ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2452ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2453ef27340cSAdrian Chadd bad0: 245403682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p", 245503682514SAdrian Chadd m, params); 2456b8e788a5SAdrian Chadd ifp->if_oerrors++; 2457b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw_fail++; 2458b8e788a5SAdrian Chadd ieee80211_free_node(ni); 2459ef27340cSAdrian Chadd 2460b8e788a5SAdrian Chadd return error; 2461b8e788a5SAdrian Chadd } 2462eb6f0de0SAdrian Chadd 2463eb6f0de0SAdrian Chadd /* Some helper functions */ 2464eb6f0de0SAdrian Chadd 2465eb6f0de0SAdrian Chadd /* 2466eb6f0de0SAdrian Chadd * ADDBA (and potentially others) need to be placed in the same 2467eb6f0de0SAdrian Chadd * hardware queue as the TID/node it's relating to. This is so 2468eb6f0de0SAdrian Chadd * it goes out after any pending non-aggregate frames to the 2469eb6f0de0SAdrian Chadd * same node/TID. 2470eb6f0de0SAdrian Chadd * 2471eb6f0de0SAdrian Chadd * If this isn't done, the ADDBA can go out before the frames 2472eb6f0de0SAdrian Chadd * queued in hardware. Even though these frames have a sequence 2473eb6f0de0SAdrian Chadd * number -earlier- than the ADDBA can be transmitted (but 2474eb6f0de0SAdrian Chadd * no frames whose sequence numbers are after the ADDBA should 2475eb6f0de0SAdrian Chadd * be!) they'll arrive after the ADDBA - and the receiving end 2476eb6f0de0SAdrian Chadd * will simply drop them as being out of the BAW. 2477eb6f0de0SAdrian Chadd * 2478eb6f0de0SAdrian Chadd * The frames can't be appended to the TID software queue - it'll 2479eb6f0de0SAdrian Chadd * never be sent out. So these frames have to be directly 2480eb6f0de0SAdrian Chadd * dispatched to the hardware, rather than queued in software. 2481eb6f0de0SAdrian Chadd * So if this function returns true, the TXQ has to be 2482eb6f0de0SAdrian Chadd * overridden and it has to be directly dispatched. 2483eb6f0de0SAdrian Chadd * 2484eb6f0de0SAdrian Chadd * It's a dirty hack, but someone's gotta do it. 2485eb6f0de0SAdrian Chadd */ 2486eb6f0de0SAdrian Chadd 2487eb6f0de0SAdrian Chadd /* 2488eb6f0de0SAdrian Chadd * XXX doesn't belong here! 2489eb6f0de0SAdrian Chadd */ 2490eb6f0de0SAdrian Chadd static int 2491eb6f0de0SAdrian Chadd ieee80211_is_action(struct ieee80211_frame *wh) 2492eb6f0de0SAdrian Chadd { 2493eb6f0de0SAdrian Chadd /* Type: Management frame? */ 2494eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != 2495eb6f0de0SAdrian Chadd IEEE80211_FC0_TYPE_MGT) 2496eb6f0de0SAdrian Chadd return 0; 2497eb6f0de0SAdrian Chadd 2498eb6f0de0SAdrian Chadd /* Subtype: Action frame? */ 2499eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) != 2500eb6f0de0SAdrian Chadd IEEE80211_FC0_SUBTYPE_ACTION) 2501eb6f0de0SAdrian Chadd return 0; 2502eb6f0de0SAdrian Chadd 2503eb6f0de0SAdrian Chadd return 1; 2504eb6f0de0SAdrian Chadd } 2505eb6f0de0SAdrian Chadd 2506eb6f0de0SAdrian Chadd #define MS(_v, _f) (((_v) & _f) >> _f##_S) 2507eb6f0de0SAdrian Chadd /* 2508eb6f0de0SAdrian Chadd * Return an alternate TID for ADDBA request frames. 2509eb6f0de0SAdrian Chadd * 2510eb6f0de0SAdrian Chadd * Yes, this likely should be done in the net80211 layer. 2511eb6f0de0SAdrian Chadd */ 2512eb6f0de0SAdrian Chadd static int 2513eb6f0de0SAdrian Chadd ath_tx_action_frame_override_queue(struct ath_softc *sc, 2514eb6f0de0SAdrian Chadd struct ieee80211_node *ni, 2515eb6f0de0SAdrian Chadd struct mbuf *m0, int *tid) 2516eb6f0de0SAdrian Chadd { 2517eb6f0de0SAdrian Chadd struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 2518eb6f0de0SAdrian Chadd struct ieee80211_action_ba_addbarequest *ia; 2519eb6f0de0SAdrian Chadd uint8_t *frm; 2520eb6f0de0SAdrian Chadd uint16_t baparamset; 2521eb6f0de0SAdrian Chadd 2522eb6f0de0SAdrian Chadd /* Not action frame? Bail */ 2523eb6f0de0SAdrian Chadd if (! ieee80211_is_action(wh)) 2524eb6f0de0SAdrian Chadd return 0; 2525eb6f0de0SAdrian Chadd 2526eb6f0de0SAdrian Chadd /* XXX Not needed for frames we send? */ 2527eb6f0de0SAdrian Chadd #if 0 2528eb6f0de0SAdrian Chadd /* Correct length? */ 2529eb6f0de0SAdrian Chadd if (! ieee80211_parse_action(ni, m)) 2530eb6f0de0SAdrian Chadd return 0; 2531eb6f0de0SAdrian Chadd #endif 2532eb6f0de0SAdrian Chadd 2533eb6f0de0SAdrian Chadd /* Extract out action frame */ 2534eb6f0de0SAdrian Chadd frm = (u_int8_t *)&wh[1]; 2535eb6f0de0SAdrian Chadd ia = (struct ieee80211_action_ba_addbarequest *) frm; 2536eb6f0de0SAdrian Chadd 2537eb6f0de0SAdrian Chadd /* Not ADDBA? Bail */ 2538eb6f0de0SAdrian Chadd if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA) 2539eb6f0de0SAdrian Chadd return 0; 2540eb6f0de0SAdrian Chadd if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST) 2541eb6f0de0SAdrian Chadd return 0; 2542eb6f0de0SAdrian Chadd 2543eb6f0de0SAdrian Chadd /* Extract TID, return it */ 2544eb6f0de0SAdrian Chadd baparamset = le16toh(ia->rq_baparamset); 2545eb6f0de0SAdrian Chadd *tid = (int) MS(baparamset, IEEE80211_BAPS_TID); 2546eb6f0de0SAdrian Chadd 2547eb6f0de0SAdrian Chadd return 1; 2548eb6f0de0SAdrian Chadd } 2549eb6f0de0SAdrian Chadd #undef MS 2550eb6f0de0SAdrian Chadd 2551eb6f0de0SAdrian Chadd /* Per-node software queue operations */ 2552eb6f0de0SAdrian Chadd 2553eb6f0de0SAdrian Chadd /* 2554eb6f0de0SAdrian Chadd * Add the current packet to the given BAW. 2555eb6f0de0SAdrian Chadd * It is assumed that the current packet 2556eb6f0de0SAdrian Chadd * 2557eb6f0de0SAdrian Chadd * + fits inside the BAW; 2558eb6f0de0SAdrian Chadd * + already has had a sequence number allocated. 2559eb6f0de0SAdrian Chadd * 2560eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2561eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2562eb6f0de0SAdrian Chadd */ 2563eb6f0de0SAdrian Chadd void 2564eb6f0de0SAdrian Chadd ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an, 2565eb6f0de0SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 2566eb6f0de0SAdrian Chadd { 2567eb6f0de0SAdrian Chadd int index, cindex; 2568eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2569eb6f0de0SAdrian Chadd 2570375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2571eb6f0de0SAdrian Chadd 2572eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_isretried) 2573eb6f0de0SAdrian Chadd return; 2574eb6f0de0SAdrian Chadd 2575c7c07341SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2576c7c07341SAdrian Chadd 25777561cb5cSAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 25787561cb5cSAdrian Chadd device_printf(sc->sc_dev, 25797561cb5cSAdrian Chadd "%s: dobaw=0, seqno=%d, window %d:%d\n", 25807561cb5cSAdrian Chadd __func__, 25817561cb5cSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno), 25827561cb5cSAdrian Chadd tap->txa_start, 25837561cb5cSAdrian Chadd tap->txa_wnd); 25847561cb5cSAdrian Chadd } 25857561cb5cSAdrian Chadd 2586eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_addedbaw) 2587eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 2588a108d2d6SAdrian Chadd "%s: re-added? tid=%d, seqno %d; window %d:%d; " 2589d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2590a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2591d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 2592d4365d16SAdrian Chadd tid->baw_tail); 2593eb6f0de0SAdrian Chadd 2594eb6f0de0SAdrian Chadd /* 25957561cb5cSAdrian Chadd * Verify that the given sequence number is not outside of the 25967561cb5cSAdrian Chadd * BAW. Complain loudly if that's the case. 25977561cb5cSAdrian Chadd */ 25987561cb5cSAdrian Chadd if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 25997561cb5cSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno))) { 26007561cb5cSAdrian Chadd device_printf(sc->sc_dev, 26017561cb5cSAdrian Chadd "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; " 26027561cb5cSAdrian Chadd "baw head=%d tail=%d\n", 26037561cb5cSAdrian Chadd __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 26047561cb5cSAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 26057561cb5cSAdrian Chadd tid->baw_tail); 26067561cb5cSAdrian Chadd } 26077561cb5cSAdrian Chadd 26087561cb5cSAdrian Chadd /* 2609eb6f0de0SAdrian Chadd * ni->ni_txseqs[] is the currently allocated seqno. 2610eb6f0de0SAdrian Chadd * the txa state contains the current baw start. 2611eb6f0de0SAdrian Chadd */ 2612eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno)); 2613eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2614eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2615a108d2d6SAdrian Chadd "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d " 2616d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2617a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2618d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head, 2619d4365d16SAdrian Chadd tid->baw_tail); 2620eb6f0de0SAdrian Chadd 2621eb6f0de0SAdrian Chadd 2622eb6f0de0SAdrian Chadd #if 0 2623eb6f0de0SAdrian Chadd assert(tid->tx_buf[cindex] == NULL); 2624eb6f0de0SAdrian Chadd #endif 2625eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != NULL) { 2626eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 2627eb6f0de0SAdrian Chadd "%s: ba packet dup (index=%d, cindex=%d, " 2628eb6f0de0SAdrian Chadd "head=%d, tail=%d)\n", 2629eb6f0de0SAdrian Chadd __func__, index, cindex, tid->baw_head, tid->baw_tail); 2630eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 2631eb6f0de0SAdrian Chadd "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n", 2632eb6f0de0SAdrian Chadd __func__, 2633eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 2634eb6f0de0SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno), 2635eb6f0de0SAdrian Chadd bf, 2636eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno) 2637eb6f0de0SAdrian Chadd ); 2638eb6f0de0SAdrian Chadd } 2639eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = bf; 2640eb6f0de0SAdrian Chadd 2641d4365d16SAdrian Chadd if (index >= ((tid->baw_tail - tid->baw_head) & 2642d4365d16SAdrian Chadd (ATH_TID_MAX_BUFS - 1))) { 2643eb6f0de0SAdrian Chadd tid->baw_tail = cindex; 2644eb6f0de0SAdrian Chadd INCR(tid->baw_tail, ATH_TID_MAX_BUFS); 2645eb6f0de0SAdrian Chadd } 2646eb6f0de0SAdrian Chadd } 2647eb6f0de0SAdrian Chadd 2648eb6f0de0SAdrian Chadd /* 264938962489SAdrian Chadd * Flip the BAW buffer entry over from the existing one to the new one. 265038962489SAdrian Chadd * 265138962489SAdrian Chadd * When software retransmitting a (sub-)frame, it is entirely possible that 265238962489SAdrian Chadd * the frame ath_buf is marked as BUSY and can't be immediately reused. 265338962489SAdrian Chadd * In that instance the buffer is cloned and the new buffer is used for 265438962489SAdrian Chadd * retransmit. We thus need to update the ath_buf slot in the BAW buf 265538962489SAdrian Chadd * tracking array to maintain consistency. 265638962489SAdrian Chadd */ 265738962489SAdrian Chadd static void 265838962489SAdrian Chadd ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an, 265938962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf) 266038962489SAdrian Chadd { 266138962489SAdrian Chadd int index, cindex; 266238962489SAdrian Chadd struct ieee80211_tx_ampdu *tap; 266338962489SAdrian Chadd int seqno = SEQNO(old_bf->bf_state.bfs_seqno); 266438962489SAdrian Chadd 2665375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 266638962489SAdrian Chadd 266738962489SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 266838962489SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 266938962489SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 267038962489SAdrian Chadd 267138962489SAdrian Chadd /* 267238962489SAdrian Chadd * Just warn for now; if it happens then we should find out 267338962489SAdrian Chadd * about it. It's highly likely the aggregation session will 267438962489SAdrian Chadd * soon hang. 267538962489SAdrian Chadd */ 267638962489SAdrian Chadd if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) { 267738962489SAdrian Chadd device_printf(sc->sc_dev, "%s: retransmitted buffer" 267838962489SAdrian Chadd " has mismatching seqno's, BA session may hang.\n", 267938962489SAdrian Chadd __func__); 268038962489SAdrian Chadd device_printf(sc->sc_dev, "%s: old seqno=%d, new_seqno=%d\n", 268138962489SAdrian Chadd __func__, 268238962489SAdrian Chadd old_bf->bf_state.bfs_seqno, 268338962489SAdrian Chadd new_bf->bf_state.bfs_seqno); 268438962489SAdrian Chadd } 268538962489SAdrian Chadd 268638962489SAdrian Chadd if (tid->tx_buf[cindex] != old_bf) { 268738962489SAdrian Chadd device_printf(sc->sc_dev, "%s: ath_buf pointer incorrect; " 268838962489SAdrian Chadd " has m BA session may hang.\n", 268938962489SAdrian Chadd __func__); 269038962489SAdrian Chadd device_printf(sc->sc_dev, "%s: old bf=%p, new bf=%p\n", 269138962489SAdrian Chadd __func__, 269238962489SAdrian Chadd old_bf, new_bf); 269338962489SAdrian Chadd } 269438962489SAdrian Chadd 269538962489SAdrian Chadd tid->tx_buf[cindex] = new_bf; 269638962489SAdrian Chadd } 269738962489SAdrian Chadd 269838962489SAdrian Chadd /* 2699eb6f0de0SAdrian Chadd * seq_start - left edge of BAW 2700eb6f0de0SAdrian Chadd * seq_next - current/next sequence number to allocate 2701eb6f0de0SAdrian Chadd * 2702eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2703eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2704eb6f0de0SAdrian Chadd */ 2705eb6f0de0SAdrian Chadd static void 2706eb6f0de0SAdrian Chadd ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an, 2707eb6f0de0SAdrian Chadd struct ath_tid *tid, const struct ath_buf *bf) 2708eb6f0de0SAdrian Chadd { 2709eb6f0de0SAdrian Chadd int index, cindex; 2710eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2711eb6f0de0SAdrian Chadd int seqno = SEQNO(bf->bf_state.bfs_seqno); 2712eb6f0de0SAdrian Chadd 2713375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2714eb6f0de0SAdrian Chadd 2715eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2716eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 2717eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2718eb6f0de0SAdrian Chadd 2719eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2720a108d2d6SAdrian Chadd "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, " 2721d4365d16SAdrian Chadd "baw head=%d, tail=%d\n", 2722a108d2d6SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index, 2723eb6f0de0SAdrian Chadd cindex, tid->baw_head, tid->baw_tail); 2724eb6f0de0SAdrian Chadd 2725eb6f0de0SAdrian Chadd /* 2726eb6f0de0SAdrian Chadd * If this occurs then we have a big problem - something else 2727eb6f0de0SAdrian Chadd * has slid tap->txa_start along without updating the BAW 2728eb6f0de0SAdrian Chadd * tracking start/end pointers. Thus the TX BAW state is now 2729eb6f0de0SAdrian Chadd * completely busted. 2730eb6f0de0SAdrian Chadd * 2731eb6f0de0SAdrian Chadd * But for now, since I haven't yet fixed TDMA and buffer cloning, 2732eb6f0de0SAdrian Chadd * it's quite possible that a cloned buffer is making its way 2733eb6f0de0SAdrian Chadd * here and causing it to fire off. Disable TDMA for now. 2734eb6f0de0SAdrian Chadd */ 2735eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != bf) { 2736eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 2737eb6f0de0SAdrian Chadd "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n", 2738eb6f0de0SAdrian Chadd __func__, 2739eb6f0de0SAdrian Chadd bf, SEQNO(bf->bf_state.bfs_seqno), 2740eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 27413527f6a9SAdrian Chadd (tid->tx_buf[cindex] != NULL) ? 27423527f6a9SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1); 2743eb6f0de0SAdrian Chadd } 2744eb6f0de0SAdrian Chadd 2745eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = NULL; 2746eb6f0de0SAdrian Chadd 2747d4365d16SAdrian Chadd while (tid->baw_head != tid->baw_tail && 2748d4365d16SAdrian Chadd !tid->tx_buf[tid->baw_head]) { 2749eb6f0de0SAdrian Chadd INCR(tap->txa_start, IEEE80211_SEQ_RANGE); 2750eb6f0de0SAdrian Chadd INCR(tid->baw_head, ATH_TID_MAX_BUFS); 2751eb6f0de0SAdrian Chadd } 2752d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2753d4365d16SAdrian Chadd "%s: baw is now %d:%d, baw head=%d\n", 2754eb6f0de0SAdrian Chadd __func__, tap->txa_start, tap->txa_wnd, tid->baw_head); 2755eb6f0de0SAdrian Chadd } 2756eb6f0de0SAdrian Chadd 275722a3aee6SAdrian Chadd static void 275822a3aee6SAdrian Chadd ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid, 275922a3aee6SAdrian Chadd struct ath_buf *bf) 276022a3aee6SAdrian Chadd { 276122a3aee6SAdrian Chadd struct ieee80211_frame *wh; 276222a3aee6SAdrian Chadd 276322a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 276422a3aee6SAdrian Chadd 276522a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 276622a3aee6SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 276722a3aee6SAdrian Chadd 276822a3aee6SAdrian Chadd /* 276922a3aee6SAdrian Chadd * Update MORE based on the software/net80211 queue states. 277022a3aee6SAdrian Chadd */ 277122a3aee6SAdrian Chadd if ((tid->an->an_stack_psq > 0) 277222a3aee6SAdrian Chadd || (tid->an->an_swq_depth > 0)) 277322a3aee6SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 277422a3aee6SAdrian Chadd else 277522a3aee6SAdrian Chadd wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA; 277622a3aee6SAdrian Chadd 277722a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE, 277822a3aee6SAdrian Chadd "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n", 277922a3aee6SAdrian Chadd __func__, 278022a3aee6SAdrian Chadd tid->an->an_node.ni_macaddr, 278122a3aee6SAdrian Chadd ":", 278222a3aee6SAdrian Chadd tid->an->an_leak_count, 278322a3aee6SAdrian Chadd tid->an->an_stack_psq, 278422a3aee6SAdrian Chadd tid->an->an_swq_depth, 278522a3aee6SAdrian Chadd !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA)); 278622a3aee6SAdrian Chadd 278722a3aee6SAdrian Chadd /* 278822a3aee6SAdrian Chadd * Re-sync the underlying buffer. 278922a3aee6SAdrian Chadd */ 279022a3aee6SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 279122a3aee6SAdrian Chadd BUS_DMASYNC_PREWRITE); 279222a3aee6SAdrian Chadd 279322a3aee6SAdrian Chadd tid->an->an_leak_count --; 279422a3aee6SAdrian Chadd } 279522a3aee6SAdrian Chadd } 279622a3aee6SAdrian Chadd 279722a3aee6SAdrian Chadd static int 279822a3aee6SAdrian Chadd ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid) 279922a3aee6SAdrian Chadd { 280022a3aee6SAdrian Chadd 280122a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 280222a3aee6SAdrian Chadd 280322a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 280422a3aee6SAdrian Chadd return (1); 280522a3aee6SAdrian Chadd } 280622a3aee6SAdrian Chadd if (tid->paused) 280722a3aee6SAdrian Chadd return (0); 280822a3aee6SAdrian Chadd return (1); 280922a3aee6SAdrian Chadd } 281022a3aee6SAdrian Chadd 2811eb6f0de0SAdrian Chadd /* 2812eb6f0de0SAdrian Chadd * Mark the current node/TID as ready to TX. 2813eb6f0de0SAdrian Chadd * 2814eb6f0de0SAdrian Chadd * This is done to make it easy for the software scheduler to 2815eb6f0de0SAdrian Chadd * find which nodes have data to send. 2816eb6f0de0SAdrian Chadd * 2817eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2818eb6f0de0SAdrian Chadd */ 281922a3aee6SAdrian Chadd void 2820eb6f0de0SAdrian Chadd ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid) 2821eb6f0de0SAdrian Chadd { 2822eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2823eb6f0de0SAdrian Chadd 2824375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2825eb6f0de0SAdrian Chadd 282622a3aee6SAdrian Chadd /* 282722a3aee6SAdrian Chadd * If we are leaking out a frame to this destination 282822a3aee6SAdrian Chadd * for PS-POLL, ensure that we allow scheduling to 282922a3aee6SAdrian Chadd * occur. 283022a3aee6SAdrian Chadd */ 283122a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 2832eb6f0de0SAdrian Chadd return; /* paused, can't schedule yet */ 2833eb6f0de0SAdrian Chadd 2834eb6f0de0SAdrian Chadd if (tid->sched) 2835eb6f0de0SAdrian Chadd return; /* already scheduled */ 2836eb6f0de0SAdrian Chadd 2837eb6f0de0SAdrian Chadd tid->sched = 1; 2838eb6f0de0SAdrian Chadd 283922a3aee6SAdrian Chadd #if 0 284022a3aee6SAdrian Chadd /* 284122a3aee6SAdrian Chadd * If this is a sleeping node we're leaking to, given 284222a3aee6SAdrian Chadd * it a higher priority. This is so bad for QoS it hurts. 284322a3aee6SAdrian Chadd */ 284422a3aee6SAdrian Chadd if (tid->an->an_leak_count) { 284522a3aee6SAdrian Chadd TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem); 284622a3aee6SAdrian Chadd } else { 284722a3aee6SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 284822a3aee6SAdrian Chadd } 284922a3aee6SAdrian Chadd #endif 285022a3aee6SAdrian Chadd 285122a3aee6SAdrian Chadd /* 285222a3aee6SAdrian Chadd * We can't do the above - it'll confuse the TXQ software 285322a3aee6SAdrian Chadd * scheduler which will keep checking the _head_ TID 285422a3aee6SAdrian Chadd * in the list to see if it has traffic. If we queue 285522a3aee6SAdrian Chadd * a TID to the head of the list and it doesn't transmit, 285622a3aee6SAdrian Chadd * we'll check it again. 285722a3aee6SAdrian Chadd * 285822a3aee6SAdrian Chadd * So, get the rest of this leaking frames support working 285922a3aee6SAdrian Chadd * and reliable first and _then_ optimise it so they're 286022a3aee6SAdrian Chadd * pushed out in front of any other pending software 286122a3aee6SAdrian Chadd * queued nodes. 286222a3aee6SAdrian Chadd */ 2863eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2864eb6f0de0SAdrian Chadd } 2865eb6f0de0SAdrian Chadd 2866eb6f0de0SAdrian Chadd /* 2867eb6f0de0SAdrian Chadd * Mark the current node as no longer needing to be polled for 2868eb6f0de0SAdrian Chadd * TX packets. 2869eb6f0de0SAdrian Chadd * 2870eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2871eb6f0de0SAdrian Chadd */ 2872eb6f0de0SAdrian Chadd static void 2873eb6f0de0SAdrian Chadd ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid) 2874eb6f0de0SAdrian Chadd { 2875eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2876eb6f0de0SAdrian Chadd 2877375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2878eb6f0de0SAdrian Chadd 2879eb6f0de0SAdrian Chadd if (tid->sched == 0) 2880eb6f0de0SAdrian Chadd return; 2881eb6f0de0SAdrian Chadd 2882eb6f0de0SAdrian Chadd tid->sched = 0; 2883eb6f0de0SAdrian Chadd TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem); 2884eb6f0de0SAdrian Chadd } 2885eb6f0de0SAdrian Chadd 2886eb6f0de0SAdrian Chadd /* 2887eb6f0de0SAdrian Chadd * Assign a sequence number manually to the given frame. 2888eb6f0de0SAdrian Chadd * 2889eb6f0de0SAdrian Chadd * This should only be called for A-MPDU TX frames. 2890eb6f0de0SAdrian Chadd */ 2891a108d2d6SAdrian Chadd static ieee80211_seq 2892eb6f0de0SAdrian Chadd ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni, 2893eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 2894eb6f0de0SAdrian Chadd { 2895eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 2896eb6f0de0SAdrian Chadd int tid, pri; 2897eb6f0de0SAdrian Chadd ieee80211_seq seqno; 2898eb6f0de0SAdrian Chadd uint8_t subtype; 2899eb6f0de0SAdrian Chadd 2900eb6f0de0SAdrian Chadd /* TID lookup */ 2901eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2902eb6f0de0SAdrian Chadd pri = M_WME_GETAC(m0); /* honor classification */ 2903eb6f0de0SAdrian Chadd tid = WME_AC_TO_TID(pri); 2904a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n", 2905a108d2d6SAdrian Chadd __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2906eb6f0de0SAdrian Chadd 2907eb6f0de0SAdrian Chadd /* XXX Is it a control frame? Ignore */ 2908eb6f0de0SAdrian Chadd 2909eb6f0de0SAdrian Chadd /* Does the packet require a sequence number? */ 2910eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 2911eb6f0de0SAdrian Chadd return -1; 2912eb6f0de0SAdrian Chadd 2913375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 29147561cb5cSAdrian Chadd 2915eb6f0de0SAdrian Chadd /* 2916eb6f0de0SAdrian Chadd * Is it a QOS NULL Data frame? Give it a sequence number from 2917eb6f0de0SAdrian Chadd * the default TID (IEEE80211_NONQOS_TID.) 2918eb6f0de0SAdrian Chadd * 2919eb6f0de0SAdrian Chadd * The RX path of everything I've looked at doesn't include the NULL 2920eb6f0de0SAdrian Chadd * data frame sequence number in the aggregation state updates, so 2921eb6f0de0SAdrian Chadd * assigning it a sequence number there will cause a BAW hole on the 2922eb6f0de0SAdrian Chadd * RX side. 2923eb6f0de0SAdrian Chadd */ 2924eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2925eb6f0de0SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) { 29267561cb5cSAdrian Chadd /* XXX no locking for this TID? This is a bit of a problem. */ 2927eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 2928eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 2929eb6f0de0SAdrian Chadd } else { 2930eb6f0de0SAdrian Chadd /* Manually assign sequence number */ 2931eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[tid]; 2932eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE); 2933eb6f0de0SAdrian Chadd } 2934eb6f0de0SAdrian Chadd *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); 2935eb6f0de0SAdrian Chadd M_SEQNO_SET(m0, seqno); 2936eb6f0de0SAdrian Chadd 2937eb6f0de0SAdrian Chadd /* Return so caller can do something with it if needed */ 2938a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: -> seqno=%d\n", __func__, seqno); 2939eb6f0de0SAdrian Chadd return seqno; 2940eb6f0de0SAdrian Chadd } 2941eb6f0de0SAdrian Chadd 2942eb6f0de0SAdrian Chadd /* 2943eb6f0de0SAdrian Chadd * Attempt to direct dispatch an aggregate frame to hardware. 2944eb6f0de0SAdrian Chadd * If the frame is out of BAW, queue. 2945eb6f0de0SAdrian Chadd * Otherwise, schedule it as a single frame. 2946eb6f0de0SAdrian Chadd */ 2947eb6f0de0SAdrian Chadd static void 294846634305SAdrian Chadd ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 294946634305SAdrian Chadd struct ath_txq *txq, struct ath_buf *bf) 2950eb6f0de0SAdrian Chadd { 2951eb6f0de0SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 2952eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2953eb6f0de0SAdrian Chadd 2954375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2955eb6f0de0SAdrian Chadd 2956eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2957eb6f0de0SAdrian Chadd 2958eb6f0de0SAdrian Chadd /* paused? queue */ 295922a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 29603e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 29610f04c5a2SAdrian Chadd /* XXX don't sched - we're paused! */ 2962eb6f0de0SAdrian Chadd return; 2963eb6f0de0SAdrian Chadd } 2964eb6f0de0SAdrian Chadd 2965eb6f0de0SAdrian Chadd /* outside baw? queue */ 2966eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw && 2967eb6f0de0SAdrian Chadd (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 2968eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)))) { 29693e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 2970eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 2971eb6f0de0SAdrian Chadd return; 2972eb6f0de0SAdrian Chadd } 2973eb6f0de0SAdrian Chadd 29742a9f83afSAdrian Chadd /* 29752a9f83afSAdrian Chadd * This is a temporary check and should be removed once 29762a9f83afSAdrian Chadd * all the relevant code paths have been fixed. 29772a9f83afSAdrian Chadd * 29782a9f83afSAdrian Chadd * During aggregate retries, it's possible that the head 29792a9f83afSAdrian Chadd * frame will fail (which has the bfs_aggr and bfs_nframes 29802a9f83afSAdrian Chadd * fields set for said aggregate) and will be retried as 29812a9f83afSAdrian Chadd * a single frame. In this instance, the values should 29822a9f83afSAdrian Chadd * be reset or the completion code will get upset with you. 29832a9f83afSAdrian Chadd */ 29842a9f83afSAdrian Chadd if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) { 29852a9f83afSAdrian Chadd device_printf(sc->sc_dev, "%s: bfs_aggr=%d, bfs_nframes=%d\n", 29862a9f83afSAdrian Chadd __func__, 29872a9f83afSAdrian Chadd bf->bf_state.bfs_aggr, 29882a9f83afSAdrian Chadd bf->bf_state.bfs_nframes); 29892a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 29902a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 29912a9f83afSAdrian Chadd } 29922a9f83afSAdrian Chadd 29934e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 29944e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 29954e81f27cSAdrian Chadd 2996eb6f0de0SAdrian Chadd /* Direct dispatch to hardware */ 2997eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 2998e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 2999e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 3000eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 3001e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 3002eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 3003eb6f0de0SAdrian Chadd 3004eb6f0de0SAdrian Chadd /* Statistics */ 3005eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_low_hwq_single_pkt++; 3006eb6f0de0SAdrian Chadd 3007eb6f0de0SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 3008eb6f0de0SAdrian Chadd tid->hwq_depth++; 3009eb6f0de0SAdrian Chadd 3010eb6f0de0SAdrian Chadd /* Add to BAW */ 3011eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 3012eb6f0de0SAdrian Chadd ath_tx_addto_baw(sc, an, tid, bf); 3013eb6f0de0SAdrian Chadd bf->bf_state.bfs_addedbaw = 1; 3014eb6f0de0SAdrian Chadd } 3015eb6f0de0SAdrian Chadd 3016eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 3017eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 3018eb6f0de0SAdrian Chadd 301922a3aee6SAdrian Chadd /* 302022a3aee6SAdrian Chadd * Update the current leak count if 302122a3aee6SAdrian Chadd * we're leaking frames; and set the 302222a3aee6SAdrian Chadd * MORE flag as appropriate. 302322a3aee6SAdrian Chadd */ 302422a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 302522a3aee6SAdrian Chadd 3026eb6f0de0SAdrian Chadd /* Hand off to hardware */ 3027eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 3028eb6f0de0SAdrian Chadd } 3029eb6f0de0SAdrian Chadd 3030eb6f0de0SAdrian Chadd /* 3031eb6f0de0SAdrian Chadd * Attempt to send the packet. 3032eb6f0de0SAdrian Chadd * If the queue isn't busy, direct-dispatch. 3033eb6f0de0SAdrian Chadd * If the queue is busy enough, queue the given packet on the 3034eb6f0de0SAdrian Chadd * relevant software queue. 3035eb6f0de0SAdrian Chadd */ 3036eb6f0de0SAdrian Chadd void 303722a3aee6SAdrian Chadd ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, 303822a3aee6SAdrian Chadd struct ath_txq *txq, int queue_to_head, struct ath_buf *bf) 3039eb6f0de0SAdrian Chadd { 3040eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 3041eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 3042eb6f0de0SAdrian Chadd struct ath_tid *atid; 3043eb6f0de0SAdrian Chadd int pri, tid; 3044eb6f0de0SAdrian Chadd struct mbuf *m0 = bf->bf_m; 3045eb6f0de0SAdrian Chadd 3046375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 30477561cb5cSAdrian Chadd 3048eb6f0de0SAdrian Chadd /* Fetch the TID - non-QoS frames get assigned to TID 16 */ 3049eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 3050eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 3051eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 3052eb6f0de0SAdrian Chadd atid = &an->an_tid[tid]; 3053eb6f0de0SAdrian Chadd 3054a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 3055a108d2d6SAdrian Chadd __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 3056eb6f0de0SAdrian Chadd 3057eb6f0de0SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 305846634305SAdrian Chadd /* XXX potentially duplicate info, re-check */ 3059eb6f0de0SAdrian Chadd bf->bf_state.bfs_tid = tid; 3060fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 3061eb6f0de0SAdrian Chadd bf->bf_state.bfs_pri = pri; 3062eb6f0de0SAdrian Chadd 3063eb6f0de0SAdrian Chadd /* 3064eb6f0de0SAdrian Chadd * If the hardware queue isn't busy, queue it directly. 3065eb6f0de0SAdrian Chadd * If the hardware queue is busy, queue it. 3066eb6f0de0SAdrian Chadd * If the TID is paused or the traffic it outside BAW, software 3067eb6f0de0SAdrian Chadd * queue it. 306822a3aee6SAdrian Chadd * 306922a3aee6SAdrian Chadd * If the node is in power-save and we're leaking a frame, 307022a3aee6SAdrian Chadd * leak a single frame. 3071eb6f0de0SAdrian Chadd */ 307222a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, atid)) { 3073eb6f0de0SAdrian Chadd /* TID is paused, queue */ 3074a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__); 307522a3aee6SAdrian Chadd /* 307622a3aee6SAdrian Chadd * If the caller requested that it be sent at a high 307722a3aee6SAdrian Chadd * priority, queue it at the head of the list. 307822a3aee6SAdrian Chadd */ 307922a3aee6SAdrian Chadd if (queue_to_head) 308022a3aee6SAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 308122a3aee6SAdrian Chadd else 30823e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3083eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_pending(sc, an, tid)) { 3084eb6f0de0SAdrian Chadd /* AMPDU pending; queue */ 3085a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__); 30863e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3087eb6f0de0SAdrian Chadd /* XXX sched? */ 3088eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_running(sc, an, tid)) { 3089eb6f0de0SAdrian Chadd /* AMPDU running, attempt direct dispatch if possible */ 309039f24578SAdrian Chadd 309139f24578SAdrian Chadd /* 309239f24578SAdrian Chadd * Always queue the frame to the tail of the list. 309339f24578SAdrian Chadd */ 30943e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 309539f24578SAdrian Chadd 309639f24578SAdrian Chadd /* 309739f24578SAdrian Chadd * If the hardware queue isn't busy, direct dispatch 309839f24578SAdrian Chadd * the head frame in the list. Don't schedule the 309939f24578SAdrian Chadd * TID - let it build some more frames first? 310039f24578SAdrian Chadd * 310139f24578SAdrian Chadd * Otherwise, schedule the TID. 310239f24578SAdrian Chadd */ 310392e84e43SAdrian Chadd if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit) { 31043e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 31053e6cc97fSAdrian Chadd ATH_TID_REMOVE(atid, bf, bf_list); 31062a9f83afSAdrian Chadd 31072a9f83afSAdrian Chadd /* 31082a9f83afSAdrian Chadd * Ensure it's definitely treated as a non-AMPDU 31092a9f83afSAdrian Chadd * frame - this information may have been left 31102a9f83afSAdrian Chadd * over from a previous attempt. 31112a9f83afSAdrian Chadd */ 31122a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 31132a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 31142a9f83afSAdrian Chadd 31152a9f83afSAdrian Chadd /* Queue to the hardware */ 311646634305SAdrian Chadd ath_tx_xmit_aggr(sc, an, txq, bf); 3117a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3118a108d2d6SAdrian Chadd "%s: xmit_aggr\n", 3119a108d2d6SAdrian Chadd __func__); 3120d4365d16SAdrian Chadd } else { 3121d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3122a108d2d6SAdrian Chadd "%s: ampdu; swq'ing\n", 3123a108d2d6SAdrian Chadd __func__); 312403682514SAdrian Chadd 3125eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3126eb6f0de0SAdrian Chadd } 312792e84e43SAdrian Chadd } else if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit) { 3128eb6f0de0SAdrian Chadd /* AMPDU not running, attempt direct dispatch */ 3129a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__); 31300a544719SAdrian Chadd /* See if clrdmask needs to be set */ 31310a544719SAdrian Chadd ath_tx_update_clrdmask(sc, atid, bf); 313222a3aee6SAdrian Chadd 313322a3aee6SAdrian Chadd /* 313422a3aee6SAdrian Chadd * Update the current leak count if 313522a3aee6SAdrian Chadd * we're leaking frames; and set the 313622a3aee6SAdrian Chadd * MORE flag as appropriate. 313722a3aee6SAdrian Chadd */ 313822a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, atid, bf); 313922a3aee6SAdrian Chadd 314022a3aee6SAdrian Chadd /* 314122a3aee6SAdrian Chadd * Dispatch the frame. 314222a3aee6SAdrian Chadd */ 3143eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 3144eb6f0de0SAdrian Chadd } else { 3145eb6f0de0SAdrian Chadd /* Busy; queue */ 3146a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__); 31473e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3148eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3149eb6f0de0SAdrian Chadd } 3150eb6f0de0SAdrian Chadd } 3151eb6f0de0SAdrian Chadd 3152eb6f0de0SAdrian Chadd /* 31534f25ddbbSAdrian Chadd * Only set the clrdmask bit if none of the nodes are currently 31544f25ddbbSAdrian Chadd * filtered. 31554f25ddbbSAdrian Chadd * 31564f25ddbbSAdrian Chadd * XXX TODO: go through all the callers and check to see 31574f25ddbbSAdrian Chadd * which are being called in the context of looping over all 31584f25ddbbSAdrian Chadd * TIDs (eg, if all tids are being paused, resumed, etc.) 31594f25ddbbSAdrian Chadd * That'll avoid O(n^2) complexity here. 31604f25ddbbSAdrian Chadd */ 31614f25ddbbSAdrian Chadd static void 31624f25ddbbSAdrian Chadd ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an) 31634f25ddbbSAdrian Chadd { 31644f25ddbbSAdrian Chadd int i; 31654f25ddbbSAdrian Chadd 31664f25ddbbSAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 31674f25ddbbSAdrian Chadd 31684f25ddbbSAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 31694f25ddbbSAdrian Chadd if (an->an_tid[i].isfiltered == 1) 3170f74d878fSAdrian Chadd return; 31714f25ddbbSAdrian Chadd } 31724f25ddbbSAdrian Chadd an->clrdmask = 1; 31734f25ddbbSAdrian Chadd } 31744f25ddbbSAdrian Chadd 31754f25ddbbSAdrian Chadd /* 3176eb6f0de0SAdrian Chadd * Configure the per-TID node state. 3177eb6f0de0SAdrian Chadd * 3178eb6f0de0SAdrian Chadd * This likely belongs in if_ath_node.c but I can't think of anywhere 3179eb6f0de0SAdrian Chadd * else to put it just yet. 3180eb6f0de0SAdrian Chadd * 3181eb6f0de0SAdrian Chadd * This sets up the SLISTs and the mutex as appropriate. 3182eb6f0de0SAdrian Chadd */ 3183eb6f0de0SAdrian Chadd void 3184eb6f0de0SAdrian Chadd ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an) 3185eb6f0de0SAdrian Chadd { 3186eb6f0de0SAdrian Chadd int i, j; 3187eb6f0de0SAdrian Chadd struct ath_tid *atid; 3188eb6f0de0SAdrian Chadd 3189eb6f0de0SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3190eb6f0de0SAdrian Chadd atid = &an->an_tid[i]; 3191f1bc738eSAdrian Chadd 3192f1bc738eSAdrian Chadd /* XXX now with this bzer(), is the field 0'ing needed? */ 3193f1bc738eSAdrian Chadd bzero(atid, sizeof(*atid)); 3194f1bc738eSAdrian Chadd 31953e6cc97fSAdrian Chadd TAILQ_INIT(&atid->tid_q); 31963e6cc97fSAdrian Chadd TAILQ_INIT(&atid->filtq.tid_q); 3197eb6f0de0SAdrian Chadd atid->tid = i; 3198eb6f0de0SAdrian Chadd atid->an = an; 3199eb6f0de0SAdrian Chadd for (j = 0; j < ATH_TID_MAX_BUFS; j++) 3200eb6f0de0SAdrian Chadd atid->tx_buf[j] = NULL; 3201eb6f0de0SAdrian Chadd atid->baw_head = atid->baw_tail = 0; 3202eb6f0de0SAdrian Chadd atid->paused = 0; 3203eb6f0de0SAdrian Chadd atid->sched = 0; 3204eb6f0de0SAdrian Chadd atid->hwq_depth = 0; 3205eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 3206eb6f0de0SAdrian Chadd if (i == IEEE80211_NONQOS_TID) 32077403d1b9SAdrian Chadd atid->ac = ATH_NONQOS_TID_AC; 3208eb6f0de0SAdrian Chadd else 3209eb6f0de0SAdrian Chadd atid->ac = TID_TO_WME_AC(i); 3210eb6f0de0SAdrian Chadd } 32114f25ddbbSAdrian Chadd an->clrdmask = 1; /* Always start by setting this bit */ 3212eb6f0de0SAdrian Chadd } 3213eb6f0de0SAdrian Chadd 3214eb6f0de0SAdrian Chadd /* 3215eb6f0de0SAdrian Chadd * Pause the current TID. This stops packets from being transmitted 3216eb6f0de0SAdrian Chadd * on it. 3217eb6f0de0SAdrian Chadd * 3218eb6f0de0SAdrian Chadd * Since this is also called from upper layers as well as the driver, 3219eb6f0de0SAdrian Chadd * it will get the TID lock. 3220eb6f0de0SAdrian Chadd */ 3221eb6f0de0SAdrian Chadd static void 3222eb6f0de0SAdrian Chadd ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid) 3223eb6f0de0SAdrian Chadd { 322488b3d483SAdrian Chadd 3225375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3226eb6f0de0SAdrian Chadd tid->paused++; 3227eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: paused = %d\n", 3228eb6f0de0SAdrian Chadd __func__, tid->paused); 3229eb6f0de0SAdrian Chadd } 3230eb6f0de0SAdrian Chadd 3231eb6f0de0SAdrian Chadd /* 3232eb6f0de0SAdrian Chadd * Unpause the current TID, and schedule it if needed. 3233eb6f0de0SAdrian Chadd */ 3234eb6f0de0SAdrian Chadd static void 3235eb6f0de0SAdrian Chadd ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid) 3236eb6f0de0SAdrian Chadd { 3237375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3238eb6f0de0SAdrian Chadd 3239dff5bdf4SAdrian Chadd /* 3240dff5bdf4SAdrian Chadd * There's some odd places where ath_tx_tid_resume() is called 3241dff5bdf4SAdrian Chadd * when it shouldn't be; this works around that particular issue 3242dff5bdf4SAdrian Chadd * until it's actually resolved. 3243dff5bdf4SAdrian Chadd */ 3244dff5bdf4SAdrian Chadd if (tid->paused == 0) { 3245dff5bdf4SAdrian Chadd device_printf(sc->sc_dev, "%s: %6D: paused=0?\n", 3246dff5bdf4SAdrian Chadd __func__, 3247dff5bdf4SAdrian Chadd tid->an->an_node.ni_macaddr, 3248dff5bdf4SAdrian Chadd ":"); 3249dff5bdf4SAdrian Chadd } else { 3250eb6f0de0SAdrian Chadd tid->paused--; 3251dff5bdf4SAdrian Chadd } 3252eb6f0de0SAdrian Chadd 3253eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: unpaused = %d\n", 3254eb6f0de0SAdrian Chadd __func__, tid->paused); 3255eb6f0de0SAdrian Chadd 32560eb81626SAdrian Chadd if (tid->paused) 3257eb6f0de0SAdrian Chadd return; 32580eb81626SAdrian Chadd 32590eb81626SAdrian Chadd /* 32600eb81626SAdrian Chadd * Override the clrdmask configuration for the next frame 32610eb81626SAdrian Chadd * from this TID, just to get the ball rolling. 32620eb81626SAdrian Chadd */ 32634f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 32640eb81626SAdrian Chadd 32650eb81626SAdrian Chadd if (tid->axq_depth == 0) 32660eb81626SAdrian Chadd return; 3267eb6f0de0SAdrian Chadd 3268f1bc738eSAdrian Chadd /* XXX isfiltered shouldn't ever be 0 at this point */ 3269f1bc738eSAdrian Chadd if (tid->isfiltered == 1) { 3270f1bc738eSAdrian Chadd device_printf(sc->sc_dev, "%s: filtered?!\n", __func__); 3271f1bc738eSAdrian Chadd return; 3272f1bc738eSAdrian Chadd } 3273f1bc738eSAdrian Chadd 3274eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 327521bca442SAdrian Chadd 327621bca442SAdrian Chadd /* 327721bca442SAdrian Chadd * Queue the software TX scheduler. 327821bca442SAdrian Chadd */ 327921bca442SAdrian Chadd ath_tx_swq_kick(sc); 3280eb6f0de0SAdrian Chadd } 3281eb6f0de0SAdrian Chadd 3282eb6f0de0SAdrian Chadd /* 3283f1bc738eSAdrian Chadd * Add the given ath_buf to the TID filtered frame list. 3284f1bc738eSAdrian Chadd * This requires the TID be filtered. 3285f1bc738eSAdrian Chadd */ 3286f1bc738eSAdrian Chadd static void 3287f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid, 3288f1bc738eSAdrian Chadd struct ath_buf *bf) 3289f1bc738eSAdrian Chadd { 3290f1bc738eSAdrian Chadd 3291375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3292375307d4SAdrian Chadd 3293f1bc738eSAdrian Chadd if (! tid->isfiltered) 3294f1bc738eSAdrian Chadd device_printf(sc->sc_dev, "%s: not filtered?!\n", __func__); 3295f1bc738eSAdrian Chadd 3296f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf); 3297f1bc738eSAdrian Chadd 3298f1bc738eSAdrian Chadd /* Set the retry bit and bump the retry counter */ 3299f1bc738eSAdrian Chadd ath_tx_set_retry(sc, bf); 3300f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swfiltered++; 3301f1bc738eSAdrian Chadd 330213aa9ee5SAdrian Chadd ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list); 3303f1bc738eSAdrian Chadd } 3304f1bc738eSAdrian Chadd 3305f1bc738eSAdrian Chadd /* 3306f1bc738eSAdrian Chadd * Handle a completed filtered frame from the given TID. 3307f1bc738eSAdrian Chadd * This just enables/pauses the filtered frame state if required 3308f1bc738eSAdrian Chadd * and appends the filtered frame to the filtered queue. 3309f1bc738eSAdrian Chadd */ 3310f1bc738eSAdrian Chadd static void 3311f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid, 3312f1bc738eSAdrian Chadd struct ath_buf *bf) 3313f1bc738eSAdrian Chadd { 3314f1bc738eSAdrian Chadd 3315375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3316f1bc738eSAdrian Chadd 3317f1bc738eSAdrian Chadd if (! tid->isfiltered) { 3318f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: filter transition\n", 3319f1bc738eSAdrian Chadd __func__); 3320f1bc738eSAdrian Chadd tid->isfiltered = 1; 3321f1bc738eSAdrian Chadd ath_tx_tid_pause(sc, tid); 3322f1bc738eSAdrian Chadd } 3323f1bc738eSAdrian Chadd 3324f1bc738eSAdrian Chadd /* Add the frame to the filter queue */ 3325f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(sc, tid, bf); 3326f1bc738eSAdrian Chadd } 3327f1bc738eSAdrian Chadd 3328f1bc738eSAdrian Chadd /* 3329f1bc738eSAdrian Chadd * Complete the filtered frame TX completion. 3330f1bc738eSAdrian Chadd * 3331f1bc738eSAdrian Chadd * If there are no more frames in the hardware queue, unpause/unfilter 3332f1bc738eSAdrian Chadd * the TID if applicable. Otherwise we will wait for a node PS transition 3333f1bc738eSAdrian Chadd * to unfilter. 3334f1bc738eSAdrian Chadd */ 3335f1bc738eSAdrian Chadd static void 3336f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid) 3337f1bc738eSAdrian Chadd { 3338f1bc738eSAdrian Chadd struct ath_buf *bf; 3339f1bc738eSAdrian Chadd 3340375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3341f1bc738eSAdrian Chadd 3342f1bc738eSAdrian Chadd if (tid->hwq_depth != 0) 3343f1bc738eSAdrian Chadd return; 3344f1bc738eSAdrian Chadd 3345f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: hwq=0, transition back\n", 3346f1bc738eSAdrian Chadd __func__); 3347f1bc738eSAdrian Chadd tid->isfiltered = 0; 33484f25ddbbSAdrian Chadd /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */ 33494f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 3350f1bc738eSAdrian Chadd 3351f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 335213aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) { 335313aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 33543e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3355f1bc738eSAdrian Chadd } 3356f1bc738eSAdrian Chadd 3357f1bc738eSAdrian Chadd ath_tx_tid_resume(sc, tid); 3358f1bc738eSAdrian Chadd } 3359f1bc738eSAdrian Chadd 3360f1bc738eSAdrian Chadd /* 3361f1bc738eSAdrian Chadd * Called when a single (aggregate or otherwise) frame is completed. 3362f1bc738eSAdrian Chadd * 3363f1bc738eSAdrian Chadd * Returns 1 if the buffer could be added to the filtered list 3364f1bc738eSAdrian Chadd * (cloned or otherwise), 0 if the buffer couldn't be added to the 3365f1bc738eSAdrian Chadd * filtered list (failed clone; expired retry) and the caller should 3366f1bc738eSAdrian Chadd * free it and handle it like a failure (eg by sending a BAR.) 3367f1bc738eSAdrian Chadd */ 3368f1bc738eSAdrian Chadd static int 3369f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid, 3370f1bc738eSAdrian Chadd struct ath_buf *bf) 3371f1bc738eSAdrian Chadd { 3372f1bc738eSAdrian Chadd struct ath_buf *nbf; 3373f1bc738eSAdrian Chadd int retval; 3374f1bc738eSAdrian Chadd 3375375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3376f1bc738eSAdrian Chadd 3377f1bc738eSAdrian Chadd /* 3378f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3379f1bc738eSAdrian Chadd */ 3380f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 33810eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3382f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3383f1bc738eSAdrian Chadd "%s: bf=%p, seqno=%d, exceeded retries\n", 3384f1bc738eSAdrian Chadd __func__, 3385f1bc738eSAdrian Chadd bf, 3386f1bc738eSAdrian Chadd bf->bf_state.bfs_seqno); 3387f1bc738eSAdrian Chadd return (0); 3388f1bc738eSAdrian Chadd } 3389f1bc738eSAdrian Chadd 3390f1bc738eSAdrian Chadd /* 3391f1bc738eSAdrian Chadd * A busy buffer can't be added to the retry list. 3392f1bc738eSAdrian Chadd * It needs to be cloned. 3393f1bc738eSAdrian Chadd */ 3394f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3395f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3396f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3397f1bc738eSAdrian Chadd "%s: busy buffer clone: %p -> %p\n", 3398f1bc738eSAdrian Chadd __func__, bf, nbf); 3399f1bc738eSAdrian Chadd } else { 3400f1bc738eSAdrian Chadd nbf = bf; 3401f1bc738eSAdrian Chadd } 3402f1bc738eSAdrian Chadd 3403f1bc738eSAdrian Chadd if (nbf == NULL) { 3404f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3405f1bc738eSAdrian Chadd "%s: busy buffer couldn't be cloned (%p)!\n", 3406f1bc738eSAdrian Chadd __func__, bf); 3407f1bc738eSAdrian Chadd retval = 1; 3408f1bc738eSAdrian Chadd } else { 3409f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3410f1bc738eSAdrian Chadd retval = 0; 3411f1bc738eSAdrian Chadd } 3412f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3413f1bc738eSAdrian Chadd 3414f1bc738eSAdrian Chadd return (retval); 3415f1bc738eSAdrian Chadd } 3416f1bc738eSAdrian Chadd 3417f1bc738eSAdrian Chadd static void 3418f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid, 3419f1bc738eSAdrian Chadd struct ath_buf *bf_first, ath_bufhead *bf_q) 3420f1bc738eSAdrian Chadd { 3421f1bc738eSAdrian Chadd struct ath_buf *bf, *bf_next, *nbf; 3422f1bc738eSAdrian Chadd 3423375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3424f1bc738eSAdrian Chadd 3425f1bc738eSAdrian Chadd bf = bf_first; 3426f1bc738eSAdrian Chadd while (bf) { 3427f1bc738eSAdrian Chadd bf_next = bf->bf_next; 3428f1bc738eSAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 3429f1bc738eSAdrian Chadd 3430f1bc738eSAdrian Chadd /* 3431f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3432f1bc738eSAdrian Chadd */ 3433f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 34340eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3435f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3436f1bc738eSAdrian Chadd "%s: bf=%p, seqno=%d, exceeded retries\n", 3437f1bc738eSAdrian Chadd __func__, 3438f1bc738eSAdrian Chadd bf, 3439f1bc738eSAdrian Chadd bf->bf_state.bfs_seqno); 3440f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3441f1bc738eSAdrian Chadd goto next; 3442f1bc738eSAdrian Chadd } 3443f1bc738eSAdrian Chadd 3444f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3445f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3446f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3447f1bc738eSAdrian Chadd "%s: busy buffer cloned: %p -> %p", 3448f1bc738eSAdrian Chadd __func__, bf, nbf); 3449f1bc738eSAdrian Chadd } else { 3450f1bc738eSAdrian Chadd nbf = bf; 3451f1bc738eSAdrian Chadd } 3452f1bc738eSAdrian Chadd 3453f1bc738eSAdrian Chadd /* 3454f1bc738eSAdrian Chadd * If the buffer couldn't be cloned, add it to bf_q; 3455f1bc738eSAdrian Chadd * the caller will free the buffer(s) as required. 3456f1bc738eSAdrian Chadd */ 3457f1bc738eSAdrian Chadd if (nbf == NULL) { 3458f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3459f1bc738eSAdrian Chadd "%s: buffer couldn't be cloned! (%p)\n", 3460f1bc738eSAdrian Chadd __func__, bf); 3461f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3462f1bc738eSAdrian Chadd } else { 3463f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3464f1bc738eSAdrian Chadd } 3465f1bc738eSAdrian Chadd next: 3466f1bc738eSAdrian Chadd bf = bf_next; 3467f1bc738eSAdrian Chadd } 3468f1bc738eSAdrian Chadd 3469f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3470f1bc738eSAdrian Chadd } 3471f1bc738eSAdrian Chadd 3472f1bc738eSAdrian Chadd /* 347388b3d483SAdrian Chadd * Suspend the queue because we need to TX a BAR. 347488b3d483SAdrian Chadd */ 347588b3d483SAdrian Chadd static void 347688b3d483SAdrian Chadd ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid) 347788b3d483SAdrian Chadd { 3478375307d4SAdrian Chadd 3479375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 348088b3d483SAdrian Chadd 34810e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 34826d07d3e0SAdrian Chadd "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n", 348388b3d483SAdrian Chadd __func__, 34846d07d3e0SAdrian Chadd tid->tid, 3485e60c4fc2SAdrian Chadd tid->bar_wait, 3486e60c4fc2SAdrian Chadd tid->bar_tx); 348788b3d483SAdrian Chadd 348888b3d483SAdrian Chadd /* We shouldn't be called when bar_tx is 1 */ 348988b3d483SAdrian Chadd if (tid->bar_tx) { 349088b3d483SAdrian Chadd device_printf(sc->sc_dev, "%s: bar_tx is 1?!\n", 349188b3d483SAdrian Chadd __func__); 349288b3d483SAdrian Chadd } 349388b3d483SAdrian Chadd 349488b3d483SAdrian Chadd /* If we've already been called, just be patient. */ 349588b3d483SAdrian Chadd if (tid->bar_wait) 349688b3d483SAdrian Chadd return; 349788b3d483SAdrian Chadd 349888b3d483SAdrian Chadd /* Wait! */ 349988b3d483SAdrian Chadd tid->bar_wait = 1; 350088b3d483SAdrian Chadd 350188b3d483SAdrian Chadd /* Only one pause, no matter how many frames fail */ 350288b3d483SAdrian Chadd ath_tx_tid_pause(sc, tid); 350388b3d483SAdrian Chadd } 350488b3d483SAdrian Chadd 350588b3d483SAdrian Chadd /* 350688b3d483SAdrian Chadd * We've finished with BAR handling - either we succeeded or 350788b3d483SAdrian Chadd * failed. Either way, unsuspend TX. 350888b3d483SAdrian Chadd */ 350988b3d483SAdrian Chadd static void 351088b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid) 351188b3d483SAdrian Chadd { 3512375307d4SAdrian Chadd 3513375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 351488b3d483SAdrian Chadd 35150e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35166d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 351788b3d483SAdrian Chadd __func__, 35189b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 35199b48fb4bSAdrian Chadd ":", 35206d07d3e0SAdrian Chadd tid->tid); 352188b3d483SAdrian Chadd 352288b3d483SAdrian Chadd if (tid->bar_tx == 0 || tid->bar_wait == 0) { 35239b48fb4bSAdrian Chadd device_printf(sc->sc_dev, 35246d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 35259b48fb4bSAdrian Chadd __func__, 35269b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 35279b48fb4bSAdrian Chadd ":", 35286d07d3e0SAdrian Chadd tid->tid, 35296d07d3e0SAdrian Chadd tid->bar_tx, 35306d07d3e0SAdrian Chadd tid->bar_wait); 353188b3d483SAdrian Chadd } 353288b3d483SAdrian Chadd 353388b3d483SAdrian Chadd tid->bar_tx = tid->bar_wait = 0; 353488b3d483SAdrian Chadd ath_tx_tid_resume(sc, tid); 353588b3d483SAdrian Chadd } 353688b3d483SAdrian Chadd 353788b3d483SAdrian Chadd /* 353888b3d483SAdrian Chadd * Return whether we're ready to TX a BAR frame. 353988b3d483SAdrian Chadd * 354088b3d483SAdrian Chadd * Requires the TID lock be held. 354188b3d483SAdrian Chadd */ 354288b3d483SAdrian Chadd static int 354388b3d483SAdrian Chadd ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid) 354488b3d483SAdrian Chadd { 354588b3d483SAdrian Chadd 3546375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 354788b3d483SAdrian Chadd 354888b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->hwq_depth > 0) 354988b3d483SAdrian Chadd return (0); 355088b3d483SAdrian Chadd 35519b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35526d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar ready\n", 35539b48fb4bSAdrian Chadd __func__, 35549b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 35559b48fb4bSAdrian Chadd ":", 35566d07d3e0SAdrian Chadd tid->tid); 35570e22ed0eSAdrian Chadd 355888b3d483SAdrian Chadd return (1); 355988b3d483SAdrian Chadd } 356088b3d483SAdrian Chadd 356188b3d483SAdrian Chadd /* 356288b3d483SAdrian Chadd * Check whether the current TID is ready to have a BAR 356388b3d483SAdrian Chadd * TXed and if so, do the TX. 356488b3d483SAdrian Chadd * 356588b3d483SAdrian Chadd * Since the TID/TXQ lock can't be held during a call to 356688b3d483SAdrian Chadd * ieee80211_send_bar(), we have to do the dirty thing of unlocking it, 356788b3d483SAdrian Chadd * sending the BAR and locking it again. 356888b3d483SAdrian Chadd * 356988b3d483SAdrian Chadd * Eventually, the code to send the BAR should be broken out 357088b3d483SAdrian Chadd * from this routine so the lock doesn't have to be reacquired 357188b3d483SAdrian Chadd * just to be immediately dropped by the caller. 357288b3d483SAdrian Chadd */ 357388b3d483SAdrian Chadd static void 357488b3d483SAdrian Chadd ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid) 357588b3d483SAdrian Chadd { 357688b3d483SAdrian Chadd struct ieee80211_tx_ampdu *tap; 357788b3d483SAdrian Chadd 3578375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 357988b3d483SAdrian Chadd 35800e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35816d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 358288b3d483SAdrian Chadd __func__, 35839b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 35849b48fb4bSAdrian Chadd ":", 35856d07d3e0SAdrian Chadd tid->tid); 358688b3d483SAdrian Chadd 358788b3d483SAdrian Chadd tap = ath_tx_get_tx_tid(tid->an, tid->tid); 358888b3d483SAdrian Chadd 358988b3d483SAdrian Chadd /* 359088b3d483SAdrian Chadd * This is an error condition! 359188b3d483SAdrian Chadd */ 359288b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->bar_tx == 1) { 359388b3d483SAdrian Chadd device_printf(sc->sc_dev, 35946d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 359588b3d483SAdrian Chadd __func__, 35969b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 35979b48fb4bSAdrian Chadd ":", 35986d07d3e0SAdrian Chadd tid->tid, 359988b3d483SAdrian Chadd tid->bar_tx, 360088b3d483SAdrian Chadd tid->bar_wait); 360188b3d483SAdrian Chadd return; 360288b3d483SAdrian Chadd } 360388b3d483SAdrian Chadd 360488b3d483SAdrian Chadd /* Don't do anything if we still have pending frames */ 360588b3d483SAdrian Chadd if (tid->hwq_depth > 0) { 36060e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36076d07d3e0SAdrian Chadd "%s: %6D: TID=%d, hwq_depth=%d, waiting\n", 360888b3d483SAdrian Chadd __func__, 36099b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36109b48fb4bSAdrian Chadd ":", 36116d07d3e0SAdrian Chadd tid->tid, 361288b3d483SAdrian Chadd tid->hwq_depth); 361388b3d483SAdrian Chadd return; 361488b3d483SAdrian Chadd } 361588b3d483SAdrian Chadd 361688b3d483SAdrian Chadd /* We're now about to TX */ 361788b3d483SAdrian Chadd tid->bar_tx = 1; 361888b3d483SAdrian Chadd 361988b3d483SAdrian Chadd /* 36204e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame, 36214e81f27cSAdrian Chadd * just to get the ball rolling. 36224e81f27cSAdrian Chadd */ 36234f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 36244e81f27cSAdrian Chadd 36254e81f27cSAdrian Chadd /* 362688b3d483SAdrian Chadd * Calculate new BAW left edge, now that all frames have either 362788b3d483SAdrian Chadd * succeeded or failed. 362888b3d483SAdrian Chadd * 362988b3d483SAdrian Chadd * XXX verify this is _actually_ the valid value to begin at! 363088b3d483SAdrian Chadd */ 36310e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36326d07d3e0SAdrian Chadd "%s: %6D: TID=%d, new BAW left edge=%d\n", 363388b3d483SAdrian Chadd __func__, 36349b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36359b48fb4bSAdrian Chadd ":", 36366d07d3e0SAdrian Chadd tid->tid, 363788b3d483SAdrian Chadd tap->txa_start); 363888b3d483SAdrian Chadd 363988b3d483SAdrian Chadd /* Try sending the BAR frame */ 364088b3d483SAdrian Chadd /* We can't hold the lock here! */ 364188b3d483SAdrian Chadd 3642375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 364388b3d483SAdrian Chadd if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) { 364488b3d483SAdrian Chadd /* Success? Now we wait for notification that it's done */ 3645375307d4SAdrian Chadd ATH_TX_LOCK(sc); 364688b3d483SAdrian Chadd return; 364788b3d483SAdrian Chadd } 364888b3d483SAdrian Chadd 364988b3d483SAdrian Chadd /* Failure? For now, warn loudly and continue */ 3650375307d4SAdrian Chadd ATH_TX_LOCK(sc); 36519b48fb4bSAdrian Chadd device_printf(sc->sc_dev, 36526d07d3e0SAdrian Chadd "%s: %6D: TID=%d, failed to TX BAR, continue!\n", 36539b48fb4bSAdrian Chadd __func__, 36549b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36559b48fb4bSAdrian Chadd ":", 36566d07d3e0SAdrian Chadd tid->tid); 365788b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, tid); 365888b3d483SAdrian Chadd } 365988b3d483SAdrian Chadd 3660eb6f0de0SAdrian Chadd static void 3661f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an, 3662f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf) 3663eb6f0de0SAdrian Chadd { 3664eb6f0de0SAdrian Chadd 3665375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3666eb6f0de0SAdrian Chadd 3667eb6f0de0SAdrian Chadd /* 3668eb6f0de0SAdrian Chadd * If the current TID is running AMPDU, update 3669eb6f0de0SAdrian Chadd * the BAW. 3670eb6f0de0SAdrian Chadd */ 3671eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid) && 3672eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw) { 3673eb6f0de0SAdrian Chadd /* 3674eb6f0de0SAdrian Chadd * Only remove the frame from the BAW if it's 3675eb6f0de0SAdrian Chadd * been transmitted at least once; this means 3676eb6f0de0SAdrian Chadd * the frame was in the BAW to begin with. 3677eb6f0de0SAdrian Chadd */ 3678eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries > 0) { 3679eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, tid, bf); 3680eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 3681eb6f0de0SAdrian Chadd } 3682ce597531SAdrian Chadd #if 0 3683eb6f0de0SAdrian Chadd /* 3684eb6f0de0SAdrian Chadd * This has become a non-fatal error now 3685eb6f0de0SAdrian Chadd */ 3686eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 3687eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 3688eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 3689eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 3690ce597531SAdrian Chadd #endif 3691eb6f0de0SAdrian Chadd } 3692b837332dSAdrian Chadd 3693b837332dSAdrian Chadd /* Strip it out of an aggregate list if it was in one */ 3694b837332dSAdrian Chadd bf->bf_next = NULL; 3695b837332dSAdrian Chadd 3696b837332dSAdrian Chadd /* Insert on the free queue to be freed by the caller */ 3697eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 3698eb6f0de0SAdrian Chadd } 3699eb6f0de0SAdrian Chadd 3700f1bc738eSAdrian Chadd static void 3701f1bc738eSAdrian Chadd ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an, 370203682514SAdrian Chadd const char *pfx, struct ath_tid *tid, struct ath_buf *bf) 3703f1bc738eSAdrian Chadd { 3704f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 3705f1bc738eSAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 3706f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3707f1bc738eSAdrian Chadd 3708f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3709f1bc738eSAdrian Chadd 3710f1bc738eSAdrian Chadd device_printf(sc->sc_dev, 371103682514SAdrian Chadd "%s: %s: node %p: bf=%p: addbaw=%d, dobaw=%d, " 3712f1bc738eSAdrian Chadd "seqno=%d, retry=%d\n", 371303682514SAdrian Chadd __func__, pfx, ni, bf, 3714f1bc738eSAdrian Chadd bf->bf_state.bfs_addedbaw, 3715f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw, 3716f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno), 3717f1bc738eSAdrian Chadd bf->bf_state.bfs_retries); 3718f1bc738eSAdrian Chadd device_printf(sc->sc_dev, 371903682514SAdrian Chadd "%s: node %p: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n", 37204e81f27cSAdrian Chadd __func__, ni, bf, 372103682514SAdrian Chadd txq->axq_qnum, 37224e81f27cSAdrian Chadd txq->axq_depth, 37234e81f27cSAdrian Chadd txq->axq_aggr_depth); 37244e81f27cSAdrian Chadd 37254e81f27cSAdrian Chadd device_printf(sc->sc_dev, 3726f1bc738eSAdrian Chadd "%s: node %p: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, isfiltered=%d\n", 3727f1bc738eSAdrian Chadd __func__, ni, bf, 3728f1bc738eSAdrian Chadd tid->axq_depth, 3729f1bc738eSAdrian Chadd tid->hwq_depth, 3730f1bc738eSAdrian Chadd tid->bar_wait, 3731f1bc738eSAdrian Chadd tid->isfiltered); 3732f1bc738eSAdrian Chadd device_printf(sc->sc_dev, 37334e81f27cSAdrian Chadd "%s: node %p: tid %d: " 37344e81f27cSAdrian Chadd "sched=%d, paused=%d, " 37354e81f27cSAdrian Chadd "incomp=%d, baw_head=%d, " 3736f1bc738eSAdrian Chadd "baw_tail=%d txa_start=%d, ni_txseqs=%d\n", 37374e81f27cSAdrian Chadd __func__, ni, tid->tid, 37384e81f27cSAdrian Chadd tid->sched, tid->paused, 37394e81f27cSAdrian Chadd tid->incomp, tid->baw_head, 3740f1bc738eSAdrian Chadd tid->baw_tail, tap == NULL ? -1 : tap->txa_start, 3741f1bc738eSAdrian Chadd ni->ni_txseqs[tid->tid]); 3742f1bc738eSAdrian Chadd 3743f1bc738eSAdrian Chadd /* XXX Dump the frame, see what it is? */ 3744f1bc738eSAdrian Chadd ieee80211_dump_pkt(ni->ni_ic, 3745f1bc738eSAdrian Chadd mtod(bf->bf_m, const uint8_t *), 3746f1bc738eSAdrian Chadd bf->bf_m->m_len, 0, -1); 3747f1bc738eSAdrian Chadd } 3748f1bc738eSAdrian Chadd 3749f1bc738eSAdrian Chadd /* 3750f1bc738eSAdrian Chadd * Free any packets currently pending in the software TX queue. 3751f1bc738eSAdrian Chadd * 3752f1bc738eSAdrian Chadd * This will be called when a node is being deleted. 3753f1bc738eSAdrian Chadd * 3754f1bc738eSAdrian Chadd * It can also be called on an active node during an interface 3755f1bc738eSAdrian Chadd * reset or state transition. 3756f1bc738eSAdrian Chadd * 3757f1bc738eSAdrian Chadd * (From Linux/reference): 3758f1bc738eSAdrian Chadd * 3759f1bc738eSAdrian Chadd * TODO: For frame(s) that are in the retry state, we will reuse the 3760f1bc738eSAdrian Chadd * sequence number(s) without setting the retry bit. The 3761f1bc738eSAdrian Chadd * alternative is to give up on these and BAR the receiver's window 3762f1bc738eSAdrian Chadd * forward. 3763f1bc738eSAdrian Chadd */ 3764f1bc738eSAdrian Chadd static void 3765f1bc738eSAdrian Chadd ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an, 3766f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq) 3767f1bc738eSAdrian Chadd { 3768f1bc738eSAdrian Chadd struct ath_buf *bf; 3769f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3770f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 3771f1bc738eSAdrian Chadd int t; 3772f1bc738eSAdrian Chadd 3773f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3774f1bc738eSAdrian Chadd 3775375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3776f1bc738eSAdrian Chadd 3777f1bc738eSAdrian Chadd /* Walk the queue, free frames */ 3778f1bc738eSAdrian Chadd t = 0; 3779f1bc738eSAdrian Chadd for (;;) { 37803e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 3781f1bc738eSAdrian Chadd if (bf == NULL) { 3782f1bc738eSAdrian Chadd break; 3783f1bc738eSAdrian Chadd } 3784f1bc738eSAdrian Chadd 3785f1bc738eSAdrian Chadd if (t == 0) { 378603682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "norm", tid, bf); 3787f1bc738eSAdrian Chadd t = 1; 3788f1bc738eSAdrian Chadd } 3789f1bc738eSAdrian Chadd 37903e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 3791f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3792f1bc738eSAdrian Chadd } 3793f1bc738eSAdrian Chadd 3794f1bc738eSAdrian Chadd /* And now, drain the filtered frame queue */ 3795f1bc738eSAdrian Chadd t = 0; 3796f1bc738eSAdrian Chadd for (;;) { 379713aa9ee5SAdrian Chadd bf = ATH_TID_FILT_FIRST(tid); 3798f1bc738eSAdrian Chadd if (bf == NULL) 3799f1bc738eSAdrian Chadd break; 3800f1bc738eSAdrian Chadd 3801f1bc738eSAdrian Chadd if (t == 0) { 380203682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "filt", tid, bf); 3803f1bc738eSAdrian Chadd t = 1; 3804f1bc738eSAdrian Chadd } 3805f1bc738eSAdrian Chadd 380613aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3807f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3808f1bc738eSAdrian Chadd } 3809f1bc738eSAdrian Chadd 3810eb6f0de0SAdrian Chadd /* 38114e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame 38124e81f27cSAdrian Chadd * in case there is some future transmission, just to get 38134e81f27cSAdrian Chadd * the ball rolling. 38144e81f27cSAdrian Chadd * 38154e81f27cSAdrian Chadd * This won't hurt things if the TID is about to be freed. 38164e81f27cSAdrian Chadd */ 38174f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 38184e81f27cSAdrian Chadd 38194e81f27cSAdrian Chadd /* 3820eb6f0de0SAdrian Chadd * Now that it's completed, grab the TID lock and update 3821eb6f0de0SAdrian Chadd * the sequence number and BAW window. 3822eb6f0de0SAdrian Chadd * Because sequence numbers have been assigned to frames 3823eb6f0de0SAdrian Chadd * that haven't been sent yet, it's entirely possible 3824eb6f0de0SAdrian Chadd * we'll be called with some pending frames that have not 3825eb6f0de0SAdrian Chadd * been transmitted. 3826eb6f0de0SAdrian Chadd * 3827eb6f0de0SAdrian Chadd * The cleaner solution is to do the sequence number allocation 3828eb6f0de0SAdrian Chadd * when the packet is first transmitted - and thus the "retries" 3829eb6f0de0SAdrian Chadd * check above would be enough to update the BAW/seqno. 3830eb6f0de0SAdrian Chadd */ 3831eb6f0de0SAdrian Chadd 3832eb6f0de0SAdrian Chadd /* But don't do it for non-QoS TIDs */ 3833eb6f0de0SAdrian Chadd if (tap) { 38349b48fb4bSAdrian Chadd #if 1 3835eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 38369b48fb4bSAdrian Chadd "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n", 38379b48fb4bSAdrian Chadd __func__, 38389b48fb4bSAdrian Chadd ni->ni_macaddr, 38399b48fb4bSAdrian Chadd ":", 38409b48fb4bSAdrian Chadd an, 38419b48fb4bSAdrian Chadd tid->tid, 38429b48fb4bSAdrian Chadd tap->txa_start); 3843eb6f0de0SAdrian Chadd #endif 3844eb6f0de0SAdrian Chadd ni->ni_txseqs[tid->tid] = tap->txa_start; 3845eb6f0de0SAdrian Chadd tid->baw_tail = tid->baw_head; 3846eb6f0de0SAdrian Chadd } 3847eb6f0de0SAdrian Chadd } 3848eb6f0de0SAdrian Chadd 3849eb6f0de0SAdrian Chadd /* 385022780332SAdrian Chadd * Reset the TID state. This must be only called once the node has 385122780332SAdrian Chadd * had its frames flushed from this TID, to ensure that no other 385222780332SAdrian Chadd * pause / unpause logic can kick in. 385322780332SAdrian Chadd */ 385422780332SAdrian Chadd static void 385522780332SAdrian Chadd ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid) 385622780332SAdrian Chadd { 385722780332SAdrian Chadd 385822780332SAdrian Chadd #if 0 385922780332SAdrian Chadd tid->bar_wait = tid->bar_tx = tid->isfiltered = 0; 386022780332SAdrian Chadd tid->paused = tid->sched = tid->addba_tx_pending = 0; 386122780332SAdrian Chadd tid->incomp = tid->cleanup_inprogress = 0; 386222780332SAdrian Chadd #endif 386322780332SAdrian Chadd 386422780332SAdrian Chadd /* 386522780332SAdrian Chadd * If we have a bar_wait set, we need to unpause the TID 386622780332SAdrian Chadd * here. Otherwise once cleanup has finished, the TID won't 386722780332SAdrian Chadd * have the right paused counter. 386822780332SAdrian Chadd * 386922780332SAdrian Chadd * XXX I'm not going through resume here - I don't want the 387022780332SAdrian Chadd * node to be rescheuled just yet. This however should be 387122780332SAdrian Chadd * methodized! 387222780332SAdrian Chadd */ 387322780332SAdrian Chadd if (tid->bar_wait) { 387422780332SAdrian Chadd if (tid->paused > 0) { 387522780332SAdrian Chadd tid->paused --; 387622780332SAdrian Chadd } 387722780332SAdrian Chadd } 387822780332SAdrian Chadd 387922780332SAdrian Chadd /* 388022780332SAdrian Chadd * XXX same with a currently filtered TID. 388122780332SAdrian Chadd * 388222780332SAdrian Chadd * Since this is being called during a flush, we assume that 388322780332SAdrian Chadd * the filtered frame list is actually empty. 388422780332SAdrian Chadd * 388522780332SAdrian Chadd * XXX TODO: add in a check to ensure that the filtered queue 388622780332SAdrian Chadd * depth is actually 0! 388722780332SAdrian Chadd */ 388822780332SAdrian Chadd if (tid->isfiltered) { 388922780332SAdrian Chadd if (tid->paused > 0) { 389022780332SAdrian Chadd tid->paused --; 389122780332SAdrian Chadd } 389222780332SAdrian Chadd } 389322780332SAdrian Chadd 389422780332SAdrian Chadd /* 389522780332SAdrian Chadd * Clear BAR, filtered frames, scheduled and ADDBA pending. 389622780332SAdrian Chadd * The TID may be going through cleanup from the last association 389722780332SAdrian Chadd * where things in the BAW are still in the hardware queue. 389822780332SAdrian Chadd */ 389922780332SAdrian Chadd tid->bar_wait = 0; 390022780332SAdrian Chadd tid->bar_tx = 0; 390122780332SAdrian Chadd tid->isfiltered = 0; 390222780332SAdrian Chadd tid->sched = 0; 390322780332SAdrian Chadd tid->addba_tx_pending = 0; 390422780332SAdrian Chadd 390522780332SAdrian Chadd /* 390622780332SAdrian Chadd * XXX TODO: it may just be enough to walk the HWQs and mark 390722780332SAdrian Chadd * frames for that node as non-aggregate; or mark the ath_node 390822780332SAdrian Chadd * with something that indicates that aggregation is no longer 390922780332SAdrian Chadd * occuring. Then we can just toss the BAW complaints and 391022780332SAdrian Chadd * do a complete hard reset of state here - no pause, no 391122780332SAdrian Chadd * complete counter, etc. 391222780332SAdrian Chadd */ 391322a3aee6SAdrian Chadd 391422780332SAdrian Chadd } 391522780332SAdrian Chadd 391622780332SAdrian Chadd /* 3917eb6f0de0SAdrian Chadd * Flush all software queued packets for the given node. 3918eb6f0de0SAdrian Chadd * 3919eb6f0de0SAdrian Chadd * This occurs when a completion handler frees the last buffer 3920eb6f0de0SAdrian Chadd * for a node, and the node is thus freed. This causes the node 3921eb6f0de0SAdrian Chadd * to be cleaned up, which ends up calling ath_tx_node_flush. 3922eb6f0de0SAdrian Chadd */ 3923eb6f0de0SAdrian Chadd void 3924eb6f0de0SAdrian Chadd ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an) 3925eb6f0de0SAdrian Chadd { 3926eb6f0de0SAdrian Chadd int tid; 3927eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 3928eb6f0de0SAdrian Chadd struct ath_buf *bf; 3929eb6f0de0SAdrian Chadd 3930eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 3931eb6f0de0SAdrian Chadd 393203682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p", 393303682514SAdrian Chadd &an->an_node); 393403682514SAdrian Chadd 3935375307d4SAdrian Chadd ATH_TX_LOCK(sc); 39369b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 39379b48fb4bSAdrian Chadd "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, " 393822a3aee6SAdrian Chadd "swq_depth=%d, clrdmask=%d, leak_count=%d\n", 39399b48fb4bSAdrian Chadd __func__, 39409b48fb4bSAdrian Chadd an->an_node.ni_macaddr, 39419b48fb4bSAdrian Chadd ":", 39429b48fb4bSAdrian Chadd an->an_is_powersave, 39439b48fb4bSAdrian Chadd an->an_stack_psq, 39449b48fb4bSAdrian Chadd an->an_tim_set, 39459b48fb4bSAdrian Chadd an->an_swq_depth, 394622a3aee6SAdrian Chadd an->clrdmask, 394722a3aee6SAdrian Chadd an->an_leak_count); 39489b48fb4bSAdrian Chadd 3949eb6f0de0SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 3950eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 3951eb6f0de0SAdrian Chadd 3952eb6f0de0SAdrian Chadd /* Free packets */ 3953eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, an, atid, &bf_cq); 395422a3aee6SAdrian Chadd 395523f44d2bSAdrian Chadd /* Remove this tid from the list of active tids */ 395623f44d2bSAdrian Chadd ath_tx_tid_unsched(sc, atid); 395722a3aee6SAdrian Chadd 395822780332SAdrian Chadd /* Reset the per-TID pause, BAR, etc state */ 395922780332SAdrian Chadd ath_tx_tid_reset(sc, atid); 3960eb6f0de0SAdrian Chadd } 396122a3aee6SAdrian Chadd 396222a3aee6SAdrian Chadd /* 396322a3aee6SAdrian Chadd * Clear global leak count 396422a3aee6SAdrian Chadd */ 396522a3aee6SAdrian Chadd an->an_leak_count = 0; 3966375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 3967eb6f0de0SAdrian Chadd 3968eb6f0de0SAdrian Chadd /* Handle completed frames */ 3969eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 3970eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 3971eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 3972eb6f0de0SAdrian Chadd } 3973eb6f0de0SAdrian Chadd } 3974eb6f0de0SAdrian Chadd 3975eb6f0de0SAdrian Chadd /* 3976eb6f0de0SAdrian Chadd * Drain all the software TXQs currently with traffic queued. 3977eb6f0de0SAdrian Chadd */ 3978eb6f0de0SAdrian Chadd void 3979eb6f0de0SAdrian Chadd ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq) 3980eb6f0de0SAdrian Chadd { 3981eb6f0de0SAdrian Chadd struct ath_tid *tid; 3982eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 3983eb6f0de0SAdrian Chadd struct ath_buf *bf; 3984eb6f0de0SAdrian Chadd 3985eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 3986375307d4SAdrian Chadd ATH_TX_LOCK(sc); 3987eb6f0de0SAdrian Chadd 3988eb6f0de0SAdrian Chadd /* 3989eb6f0de0SAdrian Chadd * Iterate over all active tids for the given txq, 3990eb6f0de0SAdrian Chadd * flushing and unsched'ing them 3991eb6f0de0SAdrian Chadd */ 3992eb6f0de0SAdrian Chadd while (! TAILQ_EMPTY(&txq->axq_tidq)) { 3993eb6f0de0SAdrian Chadd tid = TAILQ_FIRST(&txq->axq_tidq); 3994eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, tid->an, tid, &bf_cq); 3995eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 3996eb6f0de0SAdrian Chadd } 3997eb6f0de0SAdrian Chadd 3998375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 3999eb6f0de0SAdrian Chadd 4000eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4001eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4002eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4003eb6f0de0SAdrian Chadd } 4004eb6f0de0SAdrian Chadd } 4005eb6f0de0SAdrian Chadd 4006eb6f0de0SAdrian Chadd /* 4007eb6f0de0SAdrian Chadd * Handle completion of non-aggregate session frames. 40080c54de88SAdrian Chadd * 40090c54de88SAdrian Chadd * This (currently) doesn't implement software retransmission of 40100c54de88SAdrian Chadd * non-aggregate frames! 40110c54de88SAdrian Chadd * 40120c54de88SAdrian Chadd * Software retransmission of non-aggregate frames needs to obey 40130c54de88SAdrian Chadd * the strict sequence number ordering, and drop any frames that 40140c54de88SAdrian Chadd * will fail this. 40150c54de88SAdrian Chadd * 40160c54de88SAdrian Chadd * For now, filtered frames and frame transmission will cause 40170c54de88SAdrian Chadd * all kinds of issues. So we don't support them. 40180c54de88SAdrian Chadd * 40190c54de88SAdrian Chadd * So anyone queuing frames via ath_tx_normal_xmit() or 40200c54de88SAdrian Chadd * ath_tx_hw_queue_norm() must override and set CLRDMASK. 4021eb6f0de0SAdrian Chadd */ 4022eb6f0de0SAdrian Chadd void 4023eb6f0de0SAdrian Chadd ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 4024eb6f0de0SAdrian Chadd { 4025eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4026eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4027eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4028eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4029eb6f0de0SAdrian Chadd struct ath_tx_status *ts = &bf->bf_status.ds_txstat; 4030eb6f0de0SAdrian Chadd 4031eb6f0de0SAdrian Chadd /* The TID state is protected behind the TXQ lock */ 4032375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4033eb6f0de0SAdrian Chadd 4034eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n", 4035eb6f0de0SAdrian Chadd __func__, bf, fail, atid->hwq_depth - 1); 4036eb6f0de0SAdrian Chadd 4037eb6f0de0SAdrian Chadd atid->hwq_depth--; 4038f1bc738eSAdrian Chadd 40390c54de88SAdrian Chadd #if 0 40400c54de88SAdrian Chadd /* 40410c54de88SAdrian Chadd * If the frame was filtered, stick it on the filter frame 40420c54de88SAdrian Chadd * queue and complain about it. It shouldn't happen! 40430c54de88SAdrian Chadd */ 40440c54de88SAdrian Chadd if ((ts->ts_status & HAL_TXERR_FILT) || 40450c54de88SAdrian Chadd (ts->ts_status != 0 && atid->isfiltered)) { 40460c54de88SAdrian Chadd device_printf(sc->sc_dev, 40470c54de88SAdrian Chadd "%s: isfiltered=%d, ts_status=%d: huh?\n", 40480c54de88SAdrian Chadd __func__, 40490c54de88SAdrian Chadd atid->isfiltered, 40500c54de88SAdrian Chadd ts->ts_status); 40510c54de88SAdrian Chadd ath_tx_tid_filt_comp_buf(sc, atid, bf); 40520c54de88SAdrian Chadd } 40530c54de88SAdrian Chadd #endif 4054f1bc738eSAdrian Chadd if (atid->isfiltered) 40550c54de88SAdrian Chadd device_printf(sc->sc_dev, "%s: filtered?!\n", __func__); 4056eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 4057eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n", 4058eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4059f1bc738eSAdrian Chadd 4060f1bc738eSAdrian Chadd /* 4061f1bc738eSAdrian Chadd * If the queue is filtered, potentially mark it as complete 4062f1bc738eSAdrian Chadd * and reschedule it as needed. 4063f1bc738eSAdrian Chadd * 4064f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 4065f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 4066f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 4067f1bc738eSAdrian Chadd * (complete or otherwise) frame. 4068f1bc738eSAdrian Chadd * 4069f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 4070f1bc738eSAdrian Chadd */ 4071f1bc738eSAdrian Chadd if (atid->isfiltered) 4072f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4073375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4074eb6f0de0SAdrian Chadd 4075eb6f0de0SAdrian Chadd /* 4076eb6f0de0SAdrian Chadd * punt to rate control if we're not being cleaned up 4077eb6f0de0SAdrian Chadd * during a hw queue drain and the frame wanted an ACK. 4078eb6f0de0SAdrian Chadd */ 4079875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 4080eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 4081eb6f0de0SAdrian Chadd ts, bf->bf_state.bfs_pktlen, 4082eb6f0de0SAdrian Chadd 1, (ts->ts_status == 0) ? 0 : 1); 4083eb6f0de0SAdrian Chadd 4084eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 4085eb6f0de0SAdrian Chadd } 4086eb6f0de0SAdrian Chadd 4087eb6f0de0SAdrian Chadd /* 4088eb6f0de0SAdrian Chadd * Handle cleanup of aggregate session packets that aren't 4089eb6f0de0SAdrian Chadd * an A-MPDU. 4090eb6f0de0SAdrian Chadd * 4091eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4092eb6f0de0SAdrian Chadd * torn down. 4093eb6f0de0SAdrian Chadd */ 4094eb6f0de0SAdrian Chadd static void 4095eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4096eb6f0de0SAdrian Chadd { 4097eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4098eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4099eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4100eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4101eb6f0de0SAdrian Chadd 4102eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n", 4103eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4104eb6f0de0SAdrian Chadd 4105375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4106eb6f0de0SAdrian Chadd atid->incomp--; 4107eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4108eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4109eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4110eb6f0de0SAdrian Chadd __func__, tid); 4111eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4112eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4113eb6f0de0SAdrian Chadd } 4114375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4115eb6f0de0SAdrian Chadd 4116eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4117eb6f0de0SAdrian Chadd } 4118eb6f0de0SAdrian Chadd 4119eb6f0de0SAdrian Chadd /* 4120eb6f0de0SAdrian Chadd * Performs transmit side cleanup when TID changes from aggregated to 4121eb6f0de0SAdrian Chadd * unaggregated. 4122eb6f0de0SAdrian Chadd * 4123eb6f0de0SAdrian Chadd * - Discard all retry frames from the s/w queue. 4124eb6f0de0SAdrian Chadd * - Fix the tx completion function for all buffers in s/w queue. 4125eb6f0de0SAdrian Chadd * - Count the number of unacked frames, and let transmit completion 4126eb6f0de0SAdrian Chadd * handle it later. 4127eb6f0de0SAdrian Chadd * 4128eb6f0de0SAdrian Chadd * The caller is responsible for pausing the TID. 4129eb6f0de0SAdrian Chadd */ 4130eb6f0de0SAdrian Chadd static void 413122780332SAdrian Chadd ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid, 413222780332SAdrian Chadd ath_bufhead *bf_cq) 4133eb6f0de0SAdrian Chadd { 4134eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4135eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4136eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 413722780332SAdrian Chadd 413822780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4139eb6f0de0SAdrian Chadd 4140d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4141eb6f0de0SAdrian Chadd "%s: TID %d: called\n", __func__, tid); 4142eb6f0de0SAdrian Chadd 4143eb6f0de0SAdrian Chadd /* 4144f1bc738eSAdrian Chadd * Move the filtered frames to the TX queue, before 4145f1bc738eSAdrian Chadd * we run off and discard/process things. 4146f1bc738eSAdrian Chadd */ 4147f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 414813aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) { 414913aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(atid, bf, bf_list); 41503e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4151f1bc738eSAdrian Chadd } 4152f1bc738eSAdrian Chadd 4153f1bc738eSAdrian Chadd /* 4154eb6f0de0SAdrian Chadd * Update the frames in the software TX queue: 4155eb6f0de0SAdrian Chadd * 4156eb6f0de0SAdrian Chadd * + Discard retry frames in the queue 4157eb6f0de0SAdrian Chadd * + Fix the completion function to be non-aggregate 4158eb6f0de0SAdrian Chadd */ 41593e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 4160eb6f0de0SAdrian Chadd while (bf) { 4161eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_isretried) { 4162eb6f0de0SAdrian Chadd bf_next = TAILQ_NEXT(bf, bf_list); 41633e6cc97fSAdrian Chadd ATH_TID_REMOVE(atid, bf, bf_list); 4164eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4165eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4166eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 4167eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 4168eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4169d4365d16SAdrian Chadd __func__, 4170d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4171eb6f0de0SAdrian Chadd } 4172eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4173eb6f0de0SAdrian Chadd /* 4174eb6f0de0SAdrian Chadd * Call the default completion handler with "fail" just 4175eb6f0de0SAdrian Chadd * so upper levels are suitably notified about this. 4176eb6f0de0SAdrian Chadd */ 417722780332SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 4178eb6f0de0SAdrian Chadd bf = bf_next; 4179eb6f0de0SAdrian Chadd continue; 4180eb6f0de0SAdrian Chadd } 4181eb6f0de0SAdrian Chadd /* Give these the default completion handler */ 4182eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 4183eb6f0de0SAdrian Chadd bf = TAILQ_NEXT(bf, bf_list); 4184eb6f0de0SAdrian Chadd } 4185eb6f0de0SAdrian Chadd 4186eb6f0de0SAdrian Chadd /* The caller is required to pause the TID */ 4187eb6f0de0SAdrian Chadd #if 0 4188eb6f0de0SAdrian Chadd /* Pause the TID */ 4189eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 4190eb6f0de0SAdrian Chadd #endif 4191eb6f0de0SAdrian Chadd 4192eb6f0de0SAdrian Chadd /* 4193eb6f0de0SAdrian Chadd * Calculate what hardware-queued frames exist based 4194eb6f0de0SAdrian Chadd * on the current BAW size. Ie, what frames have been 4195eb6f0de0SAdrian Chadd * added to the TX hardware queue for this TID but 4196eb6f0de0SAdrian Chadd * not yet ACKed. 4197eb6f0de0SAdrian Chadd */ 4198eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4199eb6f0de0SAdrian Chadd /* Need the lock - fiddling with BAW */ 4200eb6f0de0SAdrian Chadd while (atid->baw_head != atid->baw_tail) { 4201eb6f0de0SAdrian Chadd if (atid->tx_buf[atid->baw_head]) { 4202eb6f0de0SAdrian Chadd atid->incomp++; 4203eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 1; 4204eb6f0de0SAdrian Chadd atid->tx_buf[atid->baw_head] = NULL; 4205eb6f0de0SAdrian Chadd } 4206eb6f0de0SAdrian Chadd INCR(atid->baw_head, ATH_TID_MAX_BUFS); 4207eb6f0de0SAdrian Chadd INCR(tap->txa_start, IEEE80211_SEQ_RANGE); 4208eb6f0de0SAdrian Chadd } 4209eb6f0de0SAdrian Chadd 4210eb6f0de0SAdrian Chadd /* 4211eb6f0de0SAdrian Chadd * If cleanup is required, defer TID scheduling 4212eb6f0de0SAdrian Chadd * until all the HW queued packets have been 4213eb6f0de0SAdrian Chadd * sent. 4214eb6f0de0SAdrian Chadd */ 4215eb6f0de0SAdrian Chadd if (! atid->cleanup_inprogress) 4216eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4217eb6f0de0SAdrian Chadd 4218eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) 4219eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4220eb6f0de0SAdrian Chadd "%s: TID %d: cleanup needed: %d packets\n", 4221eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4222eb6f0de0SAdrian Chadd 422322780332SAdrian Chadd /* Owner now must free completed frames */ 4224eb6f0de0SAdrian Chadd } 4225eb6f0de0SAdrian Chadd 4226eb6f0de0SAdrian Chadd static struct ath_buf * 422738962489SAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 422838962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 4229eb6f0de0SAdrian Chadd { 4230eb6f0de0SAdrian Chadd struct ath_buf *nbf; 4231eb6f0de0SAdrian Chadd int error; 4232eb6f0de0SAdrian Chadd 42333f3a5dbdSAdrian Chadd /* 42343f3a5dbdSAdrian Chadd * Clone the buffer. This will handle the dma unmap and 42353f3a5dbdSAdrian Chadd * copy the node reference to the new buffer. If this 42363f3a5dbdSAdrian Chadd * works out, 'bf' will have no DMA mapping, no mbuf 42373f3a5dbdSAdrian Chadd * pointer and no node reference. 42383f3a5dbdSAdrian Chadd */ 4239eb6f0de0SAdrian Chadd nbf = ath_buf_clone(sc, bf); 4240eb6f0de0SAdrian Chadd 4241eb6f0de0SAdrian Chadd #if 0 4242eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: ATH_BUF_BUSY; cloning\n", 4243eb6f0de0SAdrian Chadd __func__); 4244eb6f0de0SAdrian Chadd #endif 4245eb6f0de0SAdrian Chadd 4246eb6f0de0SAdrian Chadd if (nbf == NULL) { 4247eb6f0de0SAdrian Chadd /* Failed to clone */ 4248eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 4249eb6f0de0SAdrian Chadd "%s: failed to clone a busy buffer\n", 4250eb6f0de0SAdrian Chadd __func__); 4251eb6f0de0SAdrian Chadd return NULL; 4252eb6f0de0SAdrian Chadd } 4253eb6f0de0SAdrian Chadd 4254eb6f0de0SAdrian Chadd /* Setup the dma for the new buffer */ 4255eb6f0de0SAdrian Chadd error = ath_tx_dmasetup(sc, nbf, nbf->bf_m); 4256eb6f0de0SAdrian Chadd if (error != 0) { 4257eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 4258eb6f0de0SAdrian Chadd "%s: failed to setup dma for clone\n", 4259eb6f0de0SAdrian Chadd __func__); 4260eb6f0de0SAdrian Chadd /* 4261eb6f0de0SAdrian Chadd * Put this at the head of the list, not tail; 4262eb6f0de0SAdrian Chadd * that way it doesn't interfere with the 4263eb6f0de0SAdrian Chadd * busy buffer logic (which uses the tail of 4264eb6f0de0SAdrian Chadd * the list.) 4265eb6f0de0SAdrian Chadd */ 4266eb6f0de0SAdrian Chadd ATH_TXBUF_LOCK(sc); 426732c387f7SAdrian Chadd ath_returnbuf_head(sc, nbf); 4268eb6f0de0SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 4269eb6f0de0SAdrian Chadd return NULL; 4270eb6f0de0SAdrian Chadd } 4271eb6f0de0SAdrian Chadd 427238962489SAdrian Chadd /* Update BAW if required, before we free the original buf */ 427338962489SAdrian Chadd if (bf->bf_state.bfs_dobaw) 427438962489SAdrian Chadd ath_tx_switch_baw_buf(sc, an, tid, bf, nbf); 427538962489SAdrian Chadd 42763f3a5dbdSAdrian Chadd /* Free original buffer; return new buffer */ 4277eb6f0de0SAdrian Chadd ath_freebuf(sc, bf); 4278f1bc738eSAdrian Chadd 4279eb6f0de0SAdrian Chadd return nbf; 4280eb6f0de0SAdrian Chadd } 4281eb6f0de0SAdrian Chadd 4282eb6f0de0SAdrian Chadd /* 4283eb6f0de0SAdrian Chadd * Handle retrying an unaggregate frame in an aggregate 4284eb6f0de0SAdrian Chadd * session. 4285eb6f0de0SAdrian Chadd * 4286eb6f0de0SAdrian Chadd * If too many retries occur, pause the TID, wait for 4287eb6f0de0SAdrian Chadd * any further retransmits (as there's no reason why 4288eb6f0de0SAdrian Chadd * non-aggregate frames in an aggregate session are 4289eb6f0de0SAdrian Chadd * transmitted in-order; they just have to be in-BAW) 4290eb6f0de0SAdrian Chadd * and then queue a BAR. 4291eb6f0de0SAdrian Chadd */ 4292eb6f0de0SAdrian Chadd static void 4293eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4294eb6f0de0SAdrian Chadd { 4295eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4296eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4297eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4298eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4299eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4300eb6f0de0SAdrian Chadd 4301375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4302eb6f0de0SAdrian Chadd 4303eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4304eb6f0de0SAdrian Chadd 4305eb6f0de0SAdrian Chadd /* 4306eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4307eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4308eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4309eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4310eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4311eb6f0de0SAdrian Chadd * for us. 4312eb6f0de0SAdrian Chadd */ 4313eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4314eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4315eb6f0de0SAdrian Chadd struct ath_buf *nbf; 431638962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4317eb6f0de0SAdrian Chadd if (nbf) 4318eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4319eb6f0de0SAdrian Chadd bf = nbf; 4320eb6f0de0SAdrian Chadd else 4321eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4322eb6f0de0SAdrian Chadd } 4323eb6f0de0SAdrian Chadd 4324eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4325eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4326eb6f0de0SAdrian Chadd "%s: exceeded retries; seqno %d\n", 4327eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4328eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4329eb6f0de0SAdrian Chadd 4330eb6f0de0SAdrian Chadd /* Update BAW anyway */ 4331eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4332eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4333eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 4334eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 4335eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4336eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4337eb6f0de0SAdrian Chadd } 4338eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4339eb6f0de0SAdrian Chadd 434088b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 434188b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 434288b3d483SAdrian Chadd 434388b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 434488b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 434588b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 434688b3d483SAdrian Chadd 4347375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4348eb6f0de0SAdrian Chadd 4349eb6f0de0SAdrian Chadd /* Free buffer, bf is free after this call */ 4350eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4351eb6f0de0SAdrian Chadd return; 4352eb6f0de0SAdrian Chadd } 4353eb6f0de0SAdrian Chadd 4354eb6f0de0SAdrian Chadd /* 4355eb6f0de0SAdrian Chadd * This increments the retry counter as well as 4356eb6f0de0SAdrian Chadd * sets the retry flag in the ath_buf and packet 4357eb6f0de0SAdrian Chadd * body. 4358eb6f0de0SAdrian Chadd */ 4359eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4360f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4361eb6f0de0SAdrian Chadd 4362eb6f0de0SAdrian Chadd /* 4363eb6f0de0SAdrian Chadd * Insert this at the head of the queue, so it's 4364eb6f0de0SAdrian Chadd * retried before any current/subsequent frames. 4365eb6f0de0SAdrian Chadd */ 43663e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4367eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 436888b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 436988b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 437088b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4371eb6f0de0SAdrian Chadd 4372375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4373eb6f0de0SAdrian Chadd } 4374eb6f0de0SAdrian Chadd 4375eb6f0de0SAdrian Chadd /* 4376eb6f0de0SAdrian Chadd * Common code for aggregate excessive retry/subframe retry. 4377eb6f0de0SAdrian Chadd * If retrying, queues buffers to bf_q. If not, frees the 4378eb6f0de0SAdrian Chadd * buffers. 4379eb6f0de0SAdrian Chadd * 4380eb6f0de0SAdrian Chadd * XXX should unify this with ath_tx_aggr_retry_unaggr() 4381eb6f0de0SAdrian Chadd */ 4382eb6f0de0SAdrian Chadd static int 4383eb6f0de0SAdrian Chadd ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf, 4384eb6f0de0SAdrian Chadd ath_bufhead *bf_q) 4385eb6f0de0SAdrian Chadd { 4386eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4387eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4388eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4389eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4390eb6f0de0SAdrian Chadd 4391375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4392eb6f0de0SAdrian Chadd 439321840808SAdrian Chadd /* XXX clr11naggr should be done for all subframes */ 4394eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 4395eb6f0de0SAdrian Chadd ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0); 4396f1bc738eSAdrian Chadd 4397eb6f0de0SAdrian Chadd /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */ 4398eb6f0de0SAdrian Chadd 4399eb6f0de0SAdrian Chadd /* 4400eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4401eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4402eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4403eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4404eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4405eb6f0de0SAdrian Chadd * for us. 4406eb6f0de0SAdrian Chadd */ 4407eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4408eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4409eb6f0de0SAdrian Chadd struct ath_buf *nbf; 441038962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4411eb6f0de0SAdrian Chadd if (nbf) 4412eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4413eb6f0de0SAdrian Chadd bf = nbf; 4414eb6f0de0SAdrian Chadd else 4415eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4416eb6f0de0SAdrian Chadd } 4417eb6f0de0SAdrian Chadd 4418eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4419eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4420eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4421eb6f0de0SAdrian Chadd "%s: max retries: seqno %d\n", 4422eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4423eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4424eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 4425eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 4426eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4427eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4428eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4429eb6f0de0SAdrian Chadd return 1; 4430eb6f0de0SAdrian Chadd } 4431eb6f0de0SAdrian Chadd 4432eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4433f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4434eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Just to make sure */ 4435eb6f0de0SAdrian Chadd 443621840808SAdrian Chadd /* Clear the aggregate state */ 443721840808SAdrian Chadd bf->bf_state.bfs_aggr = 0; 443821840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; /* ??? needed? */ 443921840808SAdrian Chadd bf->bf_state.bfs_nframes = 1; 444021840808SAdrian Chadd 4441eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 4442eb6f0de0SAdrian Chadd return 0; 4443eb6f0de0SAdrian Chadd } 4444eb6f0de0SAdrian Chadd 4445eb6f0de0SAdrian Chadd /* 4446eb6f0de0SAdrian Chadd * error pkt completion for an aggregate destination 4447eb6f0de0SAdrian Chadd */ 4448eb6f0de0SAdrian Chadd static void 4449eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first, 4450eb6f0de0SAdrian Chadd struct ath_tid *tid) 4451eb6f0de0SAdrian Chadd { 4452eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4453eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4454eb6f0de0SAdrian Chadd struct ath_buf *bf_next, *bf; 4455eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4456eb6f0de0SAdrian Chadd int drops = 0; 4457eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4458eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4459eb6f0de0SAdrian Chadd 4460eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 4461eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4462eb6f0de0SAdrian Chadd 4463eb6f0de0SAdrian Chadd /* 4464eb6f0de0SAdrian Chadd * Update rate control - all frames have failed. 4465eb6f0de0SAdrian Chadd * 4466eb6f0de0SAdrian Chadd * XXX use the length in the first frame in the series; 4467eb6f0de0SAdrian Chadd * XXX just so things are consistent for now. 4468eb6f0de0SAdrian Chadd */ 4469eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc, 4470eb6f0de0SAdrian Chadd &bf_first->bf_status.ds_txstat, 4471eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_pktlen, 4472eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes); 4473eb6f0de0SAdrian Chadd 4474375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4475eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 44762d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_failall++; 4477eb6f0de0SAdrian Chadd 4478eb6f0de0SAdrian Chadd /* Retry all subframes */ 4479eb6f0de0SAdrian Chadd bf = bf_first; 4480eb6f0de0SAdrian Chadd while (bf) { 4481eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4482eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 44832d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 4484eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4485eb6f0de0SAdrian Chadd drops++; 4486eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4487eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4488eb6f0de0SAdrian Chadd } 4489eb6f0de0SAdrian Chadd bf = bf_next; 4490eb6f0de0SAdrian Chadd } 4491eb6f0de0SAdrian Chadd 4492eb6f0de0SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 4493eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4494eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 44953e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 4496eb6f0de0SAdrian Chadd } 4497eb6f0de0SAdrian Chadd 449839da9d42SAdrian Chadd /* 449939da9d42SAdrian Chadd * Schedule the TID to be re-tried. 450039da9d42SAdrian Chadd */ 4501eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 4502eb6f0de0SAdrian Chadd 4503eb6f0de0SAdrian Chadd /* 4504eb6f0de0SAdrian Chadd * send bar if we dropped any frames 4505eb6f0de0SAdrian Chadd * 4506eb6f0de0SAdrian Chadd * Keep the txq lock held for now, as we need to ensure 4507eb6f0de0SAdrian Chadd * that ni_txseqs[] is consistent (as it's being updated 4508eb6f0de0SAdrian Chadd * in the ifnet TX context or raw TX context.) 4509eb6f0de0SAdrian Chadd */ 4510eb6f0de0SAdrian Chadd if (drops) { 451188b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 451288b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, tid); 4513eb6f0de0SAdrian Chadd } 4514eb6f0de0SAdrian Chadd 451588b3d483SAdrian Chadd /* 451688b3d483SAdrian Chadd * Send BAR if required 451788b3d483SAdrian Chadd */ 451888b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, tid)) 451988b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, tid); 4520f1bc738eSAdrian Chadd 4521375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 452288b3d483SAdrian Chadd 4523eb6f0de0SAdrian Chadd /* Complete frames which errored out */ 4524eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4525eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4526eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4527eb6f0de0SAdrian Chadd } 4528eb6f0de0SAdrian Chadd } 4529eb6f0de0SAdrian Chadd 4530eb6f0de0SAdrian Chadd /* 4531eb6f0de0SAdrian Chadd * Handle clean-up of packets from an aggregate list. 4532eb6f0de0SAdrian Chadd * 4533eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4534eb6f0de0SAdrian Chadd * torn down. 4535eb6f0de0SAdrian Chadd */ 4536eb6f0de0SAdrian Chadd static void 4537eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first) 4538eb6f0de0SAdrian Chadd { 4539eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4540eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4541eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4542eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4543eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4544eb6f0de0SAdrian Chadd 4545375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4546eb6f0de0SAdrian Chadd 4547eb6f0de0SAdrian Chadd /* update incomp */ 4548302868d9SAdrian Chadd bf = bf_first; 4549eb6f0de0SAdrian Chadd while (bf) { 4550eb6f0de0SAdrian Chadd atid->incomp--; 4551eb6f0de0SAdrian Chadd bf = bf->bf_next; 4552eb6f0de0SAdrian Chadd } 4553eb6f0de0SAdrian Chadd 4554eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4555eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4556eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4557eb6f0de0SAdrian Chadd __func__, tid); 4558eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4559eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4560eb6f0de0SAdrian Chadd } 456188b3d483SAdrian Chadd 456288b3d483SAdrian Chadd /* Send BAR if required */ 4563f1bc738eSAdrian Chadd /* XXX why would we send a BAR when transitioning to non-aggregation? */ 4564302868d9SAdrian Chadd /* 4565302868d9SAdrian Chadd * XXX TODO: we should likely just tear down the BAR state here, 4566302868d9SAdrian Chadd * rather than sending a BAR. 4567302868d9SAdrian Chadd */ 456888b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 456988b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4570f1bc738eSAdrian Chadd 4571375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4572eb6f0de0SAdrian Chadd 4573eb6f0de0SAdrian Chadd /* Handle frame completion */ 4574302868d9SAdrian Chadd bf = bf_first; 4575eb6f0de0SAdrian Chadd while (bf) { 4576eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4577eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 4578eb6f0de0SAdrian Chadd bf = bf_next; 4579eb6f0de0SAdrian Chadd } 4580eb6f0de0SAdrian Chadd } 4581eb6f0de0SAdrian Chadd 4582eb6f0de0SAdrian Chadd /* 4583eb6f0de0SAdrian Chadd * Handle completion of an set of aggregate frames. 4584eb6f0de0SAdrian Chadd * 4585eb6f0de0SAdrian Chadd * Note: the completion handler is the last descriptor in the aggregate, 4586eb6f0de0SAdrian Chadd * not the last descriptor in the first frame. 4587eb6f0de0SAdrian Chadd */ 4588eb6f0de0SAdrian Chadd static void 4589d4365d16SAdrian Chadd ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first, 4590d4365d16SAdrian Chadd int fail) 4591eb6f0de0SAdrian Chadd { 4592eb6f0de0SAdrian Chadd //struct ath_desc *ds = bf->bf_lastds; 4593eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4594eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4595eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4596eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4597eb6f0de0SAdrian Chadd struct ath_tx_status ts; 4598eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4599eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4600eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4601eb6f0de0SAdrian Chadd int seq_st, tx_ok; 4602eb6f0de0SAdrian Chadd int hasba, isaggr; 4603eb6f0de0SAdrian Chadd uint32_t ba[2]; 4604eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4605eb6f0de0SAdrian Chadd int ba_index; 4606eb6f0de0SAdrian Chadd int drops = 0; 4607eb6f0de0SAdrian Chadd int nframes = 0, nbad = 0, nf; 4608eb6f0de0SAdrian Chadd int pktlen; 4609eb6f0de0SAdrian Chadd /* XXX there's too much on the stack? */ 4610b815538dSAdrian Chadd struct ath_rc_series rc[ATH_RC_NUM]; 4611eb6f0de0SAdrian Chadd int txseq; 4612eb6f0de0SAdrian Chadd 4613eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n", 4614eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4615eb6f0de0SAdrian Chadd 46160aa5c1bbSAdrian Chadd /* 46170aa5c1bbSAdrian Chadd * Take a copy; this may be needed -after- bf_first 46180aa5c1bbSAdrian Chadd * has been completed and freed. 46190aa5c1bbSAdrian Chadd */ 46200aa5c1bbSAdrian Chadd ts = bf_first->bf_status.ds_txstat; 46210aa5c1bbSAdrian Chadd 4622f1bc738eSAdrian Chadd TAILQ_INIT(&bf_q); 4623f1bc738eSAdrian Chadd TAILQ_INIT(&bf_cq); 4624f1bc738eSAdrian Chadd 4625eb6f0de0SAdrian Chadd /* The TID state is kept behind the TXQ lock */ 4626375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4627eb6f0de0SAdrian Chadd 4628eb6f0de0SAdrian Chadd atid->hwq_depth--; 4629eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 4630eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n", 4631eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4632eb6f0de0SAdrian Chadd 4633eb6f0de0SAdrian Chadd /* 4634f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 4635f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 4636f1bc738eSAdrian Chadd * function. 46370aa5c1bbSAdrian Chadd * 46380aa5c1bbSAdrian Chadd * XXX this is duplicate work, ew. 4639f1bc738eSAdrian Chadd */ 4640f1bc738eSAdrian Chadd if (atid->isfiltered) 4641f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4642f1bc738eSAdrian Chadd 4643f1bc738eSAdrian Chadd /* 4644eb6f0de0SAdrian Chadd * Punt cleanup to the relevant function, not our problem now 4645eb6f0de0SAdrian Chadd */ 4646eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 4647f1bc738eSAdrian Chadd if (atid->isfiltered) 4648f1bc738eSAdrian Chadd device_printf(sc->sc_dev, 4649f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 4650f1bc738eSAdrian Chadd __func__); 4651375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4652eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(sc, bf_first); 4653eb6f0de0SAdrian Chadd return; 4654eb6f0de0SAdrian Chadd } 4655eb6f0de0SAdrian Chadd 4656eb6f0de0SAdrian Chadd /* 4657f1bc738eSAdrian Chadd * If the frame is filtered, transition to filtered frame 4658f1bc738eSAdrian Chadd * mode and add this to the filtered frame list. 4659f1bc738eSAdrian Chadd * 4660f1bc738eSAdrian Chadd * XXX TODO: figure out how this interoperates with 4661f1bc738eSAdrian Chadd * BAR, pause and cleanup states. 4662f1bc738eSAdrian Chadd */ 4663f1bc738eSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 4664f1bc738eSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 4665f1bc738eSAdrian Chadd if (fail != 0) 4666f1bc738eSAdrian Chadd device_printf(sc->sc_dev, 4667f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", __func__, fail); 4668f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq); 4669f1bc738eSAdrian Chadd 4670f1bc738eSAdrian Chadd /* Remove from BAW */ 4671f1bc738eSAdrian Chadd TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) { 4672f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 4673f1bc738eSAdrian Chadd drops++; 4674f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4675f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4676f1bc738eSAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 4677f1bc738eSAdrian Chadd device_printf(sc->sc_dev, 4678f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 4679f1bc738eSAdrian Chadd __func__, 4680f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4681f1bc738eSAdrian Chadd } 4682f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4683f1bc738eSAdrian Chadd } 4684f1bc738eSAdrian Chadd /* 4685f1bc738eSAdrian Chadd * If any intermediate frames in the BAW were dropped when 4686f1bc738eSAdrian Chadd * handling filtering things, send a BAR. 4687f1bc738eSAdrian Chadd */ 4688f1bc738eSAdrian Chadd if (drops) 4689f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 4690f1bc738eSAdrian Chadd 4691f1bc738eSAdrian Chadd /* 4692f1bc738eSAdrian Chadd * Finish up by sending a BAR if required and freeing 4693f1bc738eSAdrian Chadd * the frames outside of the TX lock. 4694f1bc738eSAdrian Chadd */ 4695f1bc738eSAdrian Chadd goto finish_send_bar; 4696f1bc738eSAdrian Chadd } 4697f1bc738eSAdrian Chadd 4698f1bc738eSAdrian Chadd /* 4699eb6f0de0SAdrian Chadd * XXX for now, use the first frame in the aggregate for 4700eb6f0de0SAdrian Chadd * XXX rate control completion; it's at least consistent. 4701eb6f0de0SAdrian Chadd */ 4702eb6f0de0SAdrian Chadd pktlen = bf_first->bf_state.bfs_pktlen; 4703eb6f0de0SAdrian Chadd 4704eb6f0de0SAdrian Chadd /* 4705e9a6408eSAdrian Chadd * Handle errors first! 4706e9a6408eSAdrian Chadd * 4707e9a6408eSAdrian Chadd * Here, handle _any_ error as a "exceeded retries" error. 4708e9a6408eSAdrian Chadd * Later on (when filtered frames are to be specially handled) 4709e9a6408eSAdrian Chadd * it'll have to be expanded. 4710eb6f0de0SAdrian Chadd */ 4711e9a6408eSAdrian Chadd #if 0 4712eb6f0de0SAdrian Chadd if (ts.ts_status & HAL_TXERR_XRETRY) { 4713e9a6408eSAdrian Chadd #endif 4714e9a6408eSAdrian Chadd if (ts.ts_status != 0) { 4715375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4716eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(sc, bf_first, atid); 4717eb6f0de0SAdrian Chadd return; 4718eb6f0de0SAdrian Chadd } 4719eb6f0de0SAdrian Chadd 4720eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4721eb6f0de0SAdrian Chadd 4722eb6f0de0SAdrian Chadd /* 4723eb6f0de0SAdrian Chadd * extract starting sequence and block-ack bitmap 4724eb6f0de0SAdrian Chadd */ 4725eb6f0de0SAdrian Chadd /* XXX endian-ness of seq_st, ba? */ 4726eb6f0de0SAdrian Chadd seq_st = ts.ts_seqnum; 4727eb6f0de0SAdrian Chadd hasba = !! (ts.ts_flags & HAL_TX_BA); 4728eb6f0de0SAdrian Chadd tx_ok = (ts.ts_status == 0); 4729eb6f0de0SAdrian Chadd isaggr = bf_first->bf_state.bfs_aggr; 4730eb6f0de0SAdrian Chadd ba[0] = ts.ts_ba_low; 4731eb6f0de0SAdrian Chadd ba[1] = ts.ts_ba_high; 4732eb6f0de0SAdrian Chadd 4733eb6f0de0SAdrian Chadd /* 4734eb6f0de0SAdrian Chadd * Copy the TX completion status and the rate control 4735eb6f0de0SAdrian Chadd * series from the first descriptor, as it may be freed 4736eb6f0de0SAdrian Chadd * before the rate control code can get its grubby fingers 4737eb6f0de0SAdrian Chadd * into things. 4738eb6f0de0SAdrian Chadd */ 4739eb6f0de0SAdrian Chadd memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc)); 4740eb6f0de0SAdrian Chadd 4741eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4742d4365d16SAdrian Chadd "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, " 4743d4365d16SAdrian Chadd "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n", 4744eb6f0de0SAdrian Chadd __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags, 4745eb6f0de0SAdrian Chadd isaggr, seq_st, hasba, ba[0], ba[1]); 4746eb6f0de0SAdrian Chadd 4747b3420862SAdrian Chadd /* 4748b3420862SAdrian Chadd * The reference driver doesn't do this; it simply ignores 4749b3420862SAdrian Chadd * this check in its entirety. 4750b3420862SAdrian Chadd * 4751b3420862SAdrian Chadd * I've seen this occur when using iperf to send traffic 4752b3420862SAdrian Chadd * out tid 1 - the aggregate frames are all marked as TID 1, 4753b3420862SAdrian Chadd * but the TXSTATUS has TID=0. So, let's just ignore this 4754b3420862SAdrian Chadd * check. 4755b3420862SAdrian Chadd */ 4756b3420862SAdrian Chadd #if 0 4757eb6f0de0SAdrian Chadd /* Occasionally, the MAC sends a tx status for the wrong TID. */ 4758eb6f0de0SAdrian Chadd if (tid != ts.ts_tid) { 4759eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: tid %d != hw tid %d\n", 4760eb6f0de0SAdrian Chadd __func__, tid, ts.ts_tid); 4761eb6f0de0SAdrian Chadd tx_ok = 0; 4762eb6f0de0SAdrian Chadd } 4763b3420862SAdrian Chadd #endif 4764eb6f0de0SAdrian Chadd 4765eb6f0de0SAdrian Chadd /* AR5416 BA bug; this requires an interface reset */ 4766eb6f0de0SAdrian Chadd if (isaggr && tx_ok && (! hasba)) { 4767eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 4768d4365d16SAdrian Chadd "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, " 4769d4365d16SAdrian Chadd "seq_st=%d\n", 4770eb6f0de0SAdrian Chadd __func__, hasba, tx_ok, isaggr, seq_st); 4771eb6f0de0SAdrian Chadd /* XXX TODO: schedule an interface reset */ 47720f078d63SJohn Baldwin #ifdef ATH_DEBUG 47736abbbae5SAdrian Chadd ath_printtxbuf(sc, bf_first, 47746abbbae5SAdrian Chadd sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0); 47750f078d63SJohn Baldwin #endif 4776eb6f0de0SAdrian Chadd } 4777eb6f0de0SAdrian Chadd 4778eb6f0de0SAdrian Chadd /* 4779eb6f0de0SAdrian Chadd * Walk the list of frames, figure out which ones were correctly 4780eb6f0de0SAdrian Chadd * sent and which weren't. 4781eb6f0de0SAdrian Chadd */ 4782eb6f0de0SAdrian Chadd bf = bf_first; 4783eb6f0de0SAdrian Chadd nf = bf_first->bf_state.bfs_nframes; 4784eb6f0de0SAdrian Chadd 4785eb6f0de0SAdrian Chadd /* bf_first is going to be invalid once this list is walked */ 4786eb6f0de0SAdrian Chadd bf_first = NULL; 4787eb6f0de0SAdrian Chadd 4788eb6f0de0SAdrian Chadd /* 4789eb6f0de0SAdrian Chadd * Walk the list of completed frames and determine 4790eb6f0de0SAdrian Chadd * which need to be completed and which need to be 4791eb6f0de0SAdrian Chadd * retransmitted. 4792eb6f0de0SAdrian Chadd * 4793eb6f0de0SAdrian Chadd * For completed frames, the completion functions need 4794eb6f0de0SAdrian Chadd * to be called at the end of this function as the last 4795eb6f0de0SAdrian Chadd * node reference may free the node. 4796eb6f0de0SAdrian Chadd * 4797eb6f0de0SAdrian Chadd * Finally, since the TXQ lock can't be held during the 4798eb6f0de0SAdrian Chadd * completion callback (to avoid lock recursion), 4799eb6f0de0SAdrian Chadd * the completion calls have to be done outside of the 4800eb6f0de0SAdrian Chadd * lock. 4801eb6f0de0SAdrian Chadd */ 4802eb6f0de0SAdrian Chadd while (bf) { 4803eb6f0de0SAdrian Chadd nframes++; 4804d4365d16SAdrian Chadd ba_index = ATH_BA_INDEX(seq_st, 4805d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4806eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4807eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 4808eb6f0de0SAdrian Chadd 4809eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4810eb6f0de0SAdrian Chadd "%s: checking bf=%p seqno=%d; ack=%d\n", 4811eb6f0de0SAdrian Chadd __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 4812eb6f0de0SAdrian Chadd ATH_BA_ISSET(ba, ba_index)); 4813eb6f0de0SAdrian Chadd 4814eb6f0de0SAdrian Chadd if (tx_ok && ATH_BA_ISSET(ba, ba_index)) { 48152d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_ok++; 4816eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4817eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4818eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 4819eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 4820eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4821eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4822eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4823eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4824eb6f0de0SAdrian Chadd } else { 48252d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 4826eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4827eb6f0de0SAdrian Chadd drops++; 4828eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4829eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4830eb6f0de0SAdrian Chadd } 4831eb6f0de0SAdrian Chadd nbad++; 4832eb6f0de0SAdrian Chadd } 4833eb6f0de0SAdrian Chadd bf = bf_next; 4834eb6f0de0SAdrian Chadd } 4835eb6f0de0SAdrian Chadd 4836eb6f0de0SAdrian Chadd /* 4837eb6f0de0SAdrian Chadd * Now that the BAW updates have been done, unlock 4838eb6f0de0SAdrian Chadd * 4839eb6f0de0SAdrian Chadd * txseq is grabbed before the lock is released so we 4840eb6f0de0SAdrian Chadd * have a consistent view of what -was- in the BAW. 4841eb6f0de0SAdrian Chadd * Anything after this point will not yet have been 4842eb6f0de0SAdrian Chadd * TXed. 4843eb6f0de0SAdrian Chadd */ 4844eb6f0de0SAdrian Chadd txseq = tap->txa_start; 4845375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4846eb6f0de0SAdrian Chadd 4847eb6f0de0SAdrian Chadd if (nframes != nf) 4848eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 4849eb6f0de0SAdrian Chadd "%s: num frames seen=%d; bf nframes=%d\n", 4850eb6f0de0SAdrian Chadd __func__, nframes, nf); 4851eb6f0de0SAdrian Chadd 4852eb6f0de0SAdrian Chadd /* 4853eb6f0de0SAdrian Chadd * Now we know how many frames were bad, call the rate 4854eb6f0de0SAdrian Chadd * control code. 4855eb6f0de0SAdrian Chadd */ 4856eb6f0de0SAdrian Chadd if (fail == 0) 4857d4365d16SAdrian Chadd ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes, 4858d4365d16SAdrian Chadd nbad); 4859eb6f0de0SAdrian Chadd 4860eb6f0de0SAdrian Chadd /* 4861eb6f0de0SAdrian Chadd * send bar if we dropped any frames 4862eb6f0de0SAdrian Chadd */ 4863eb6f0de0SAdrian Chadd if (drops) { 486488b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 4865375307d4SAdrian Chadd ATH_TX_LOCK(sc); 486688b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 4867375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4868eb6f0de0SAdrian Chadd } 4869eb6f0de0SAdrian Chadd 487039da9d42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 487139da9d42SAdrian Chadd "%s: txa_start now %d\n", __func__, tap->txa_start); 487239da9d42SAdrian Chadd 4873375307d4SAdrian Chadd ATH_TX_LOCK(sc); 487439da9d42SAdrian Chadd 487539da9d42SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 4876eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4877eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 48783e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4879eb6f0de0SAdrian Chadd } 4880eb6f0de0SAdrian Chadd 488139da9d42SAdrian Chadd /* 488239da9d42SAdrian Chadd * Reschedule to grab some further frames. 488339da9d42SAdrian Chadd */ 488439da9d42SAdrian Chadd ath_tx_tid_sched(sc, atid); 4885eb6f0de0SAdrian Chadd 488688b3d483SAdrian Chadd /* 4887f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 4888f1bc738eSAdrian Chadd * 4889f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 4890f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 4891f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 4892f1bc738eSAdrian Chadd * (complete or otherwise) frame. 4893f1bc738eSAdrian Chadd * 4894f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 4895f1bc738eSAdrian Chadd */ 4896f1bc738eSAdrian Chadd if (atid->isfiltered) 4897f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4898f1bc738eSAdrian Chadd 4899f1bc738eSAdrian Chadd finish_send_bar: 4900f1bc738eSAdrian Chadd 4901f1bc738eSAdrian Chadd /* 490288b3d483SAdrian Chadd * Send BAR if required 490388b3d483SAdrian Chadd */ 490488b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 490588b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 490639da9d42SAdrian Chadd 4907375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 490888b3d483SAdrian Chadd 4909eb6f0de0SAdrian Chadd /* Do deferred completion */ 4910eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4911eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4912eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4913eb6f0de0SAdrian Chadd } 4914eb6f0de0SAdrian Chadd } 4915eb6f0de0SAdrian Chadd 4916eb6f0de0SAdrian Chadd /* 4917eb6f0de0SAdrian Chadd * Handle completion of unaggregated frames in an ADDBA 4918eb6f0de0SAdrian Chadd * session. 4919eb6f0de0SAdrian Chadd * 4920eb6f0de0SAdrian Chadd * Fail is set to 1 if the entry is being freed via a call to 4921eb6f0de0SAdrian Chadd * ath_tx_draintxq(). 4922eb6f0de0SAdrian Chadd */ 4923eb6f0de0SAdrian Chadd static void 4924eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail) 4925eb6f0de0SAdrian Chadd { 4926eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4927eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4928eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4929eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 49300aa5c1bbSAdrian Chadd struct ath_tx_status ts; 4931f1bc738eSAdrian Chadd int drops = 0; 4932eb6f0de0SAdrian Chadd 4933eb6f0de0SAdrian Chadd /* 49340aa5c1bbSAdrian Chadd * Take a copy of this; filtering/cloning the frame may free the 49350aa5c1bbSAdrian Chadd * bf pointer. 49360aa5c1bbSAdrian Chadd */ 49370aa5c1bbSAdrian Chadd ts = bf->bf_status.ds_txstat; 49380aa5c1bbSAdrian Chadd 49390aa5c1bbSAdrian Chadd /* 4940eb6f0de0SAdrian Chadd * Update rate control status here, before we possibly 4941eb6f0de0SAdrian Chadd * punt to retry or cleanup. 4942eb6f0de0SAdrian Chadd * 4943eb6f0de0SAdrian Chadd * Do it outside of the TXQ lock. 4944eb6f0de0SAdrian Chadd */ 4945875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 4946eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 4947eb6f0de0SAdrian Chadd &bf->bf_status.ds_txstat, 4948eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, 49490aa5c1bbSAdrian Chadd 1, (ts.ts_status == 0) ? 0 : 1); 4950eb6f0de0SAdrian Chadd 4951eb6f0de0SAdrian Chadd /* 4952eb6f0de0SAdrian Chadd * This is called early so atid->hwq_depth can be tracked. 4953eb6f0de0SAdrian Chadd * This unfortunately means that it's released and regrabbed 4954eb6f0de0SAdrian Chadd * during retry and cleanup. That's rather inefficient. 4955eb6f0de0SAdrian Chadd */ 4956375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4957eb6f0de0SAdrian Chadd 4958eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 4959eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: TID=16!\n", __func__); 4960eb6f0de0SAdrian Chadd 4961d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 4962d4365d16SAdrian Chadd "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n", 4963d4365d16SAdrian Chadd __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth, 4964d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4965eb6f0de0SAdrian Chadd 4966eb6f0de0SAdrian Chadd atid->hwq_depth--; 4967eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 4968eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n", 4969eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4970eb6f0de0SAdrian Chadd 4971eb6f0de0SAdrian Chadd /* 4972f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 4973f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 4974f1bc738eSAdrian Chadd * function. 4975f1bc738eSAdrian Chadd */ 4976f1bc738eSAdrian Chadd if (atid->isfiltered) 4977f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4978f1bc738eSAdrian Chadd 4979f1bc738eSAdrian Chadd /* 4980eb6f0de0SAdrian Chadd * If a cleanup is in progress, punt to comp_cleanup; 4981eb6f0de0SAdrian Chadd * rather than handling it here. It's thus their 4982eb6f0de0SAdrian Chadd * responsibility to clean up, call the completion 4983eb6f0de0SAdrian Chadd * function in net80211, etc. 4984eb6f0de0SAdrian Chadd */ 4985eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 4986f1bc738eSAdrian Chadd if (atid->isfiltered) 4987f1bc738eSAdrian Chadd device_printf(sc->sc_dev, 4988f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 4989f1bc738eSAdrian Chadd __func__); 4990375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4991d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n", 4992d4365d16SAdrian Chadd __func__); 4993eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(sc, bf); 4994eb6f0de0SAdrian Chadd return; 4995eb6f0de0SAdrian Chadd } 4996eb6f0de0SAdrian Chadd 4997eb6f0de0SAdrian Chadd /* 4998f1bc738eSAdrian Chadd * XXX TODO: how does cleanup, BAR and filtered frame handling 4999f1bc738eSAdrian Chadd * overlap? 5000f1bc738eSAdrian Chadd * 5001f1bc738eSAdrian Chadd * If the frame is filtered OR if it's any failure but 5002f1bc738eSAdrian Chadd * the TID is filtered, the frame must be added to the 5003f1bc738eSAdrian Chadd * filtered frame list. 5004f1bc738eSAdrian Chadd * 5005f1bc738eSAdrian Chadd * However - a busy buffer can't be added to the filtered 5006f1bc738eSAdrian Chadd * list as it will end up being recycled without having 5007f1bc738eSAdrian Chadd * been made available for the hardware. 5008f1bc738eSAdrian Chadd */ 50090aa5c1bbSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 50100aa5c1bbSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 5011f1bc738eSAdrian Chadd int freeframe; 5012f1bc738eSAdrian Chadd 5013f1bc738eSAdrian Chadd if (fail != 0) 5014f1bc738eSAdrian Chadd device_printf(sc->sc_dev, 5015f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", 5016f1bc738eSAdrian Chadd __func__, 5017f1bc738eSAdrian Chadd fail); 5018f1bc738eSAdrian Chadd freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf); 5019f1bc738eSAdrian Chadd if (freeframe) { 5020f1bc738eSAdrian Chadd /* Remove from BAW */ 5021f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 5022f1bc738eSAdrian Chadd drops++; 5023f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5024f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5025f1bc738eSAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 5026f1bc738eSAdrian Chadd device_printf(sc->sc_dev, 5027f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 5028f1bc738eSAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5029f1bc738eSAdrian Chadd } 5030f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5031f1bc738eSAdrian Chadd } 5032f1bc738eSAdrian Chadd 5033f1bc738eSAdrian Chadd /* 5034f1bc738eSAdrian Chadd * If the frame couldn't be filtered, treat it as a drop and 5035f1bc738eSAdrian Chadd * prepare to send a BAR. 5036f1bc738eSAdrian Chadd */ 5037f1bc738eSAdrian Chadd if (freeframe && drops) 5038f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 5039f1bc738eSAdrian Chadd 5040f1bc738eSAdrian Chadd /* 5041f1bc738eSAdrian Chadd * Send BAR if required 5042f1bc738eSAdrian Chadd */ 5043f1bc738eSAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 5044f1bc738eSAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 5045f1bc738eSAdrian Chadd 5046375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5047f1bc738eSAdrian Chadd /* 5048f1bc738eSAdrian Chadd * If freeframe is set, then the frame couldn't be 5049f1bc738eSAdrian Chadd * cloned and bf is still valid. Just complete/free it. 5050f1bc738eSAdrian Chadd */ 5051f1bc738eSAdrian Chadd if (freeframe) 5052f1bc738eSAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5053f1bc738eSAdrian Chadd 5054f1bc738eSAdrian Chadd 5055f1bc738eSAdrian Chadd return; 5056f1bc738eSAdrian Chadd } 5057f1bc738eSAdrian Chadd /* 5058eb6f0de0SAdrian Chadd * Don't bother with the retry check if all frames 5059eb6f0de0SAdrian Chadd * are being failed (eg during queue deletion.) 5060eb6f0de0SAdrian Chadd */ 5061e9a6408eSAdrian Chadd #if 0 5062eb6f0de0SAdrian Chadd if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) { 5063e9a6408eSAdrian Chadd #endif 50640aa5c1bbSAdrian Chadd if (fail == 0 && ts.ts_status != 0) { 5065375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5066d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n", 5067d4365d16SAdrian Chadd __func__); 5068eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(sc, bf); 5069eb6f0de0SAdrian Chadd return; 5070eb6f0de0SAdrian Chadd } 5071eb6f0de0SAdrian Chadd 5072eb6f0de0SAdrian Chadd /* Success? Complete */ 5073eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n", 5074eb6f0de0SAdrian Chadd __func__, tid, SEQNO(bf->bf_state.bfs_seqno)); 5075eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5076eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5077eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5078eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 5079eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, 5080eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 5081eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5082eb6f0de0SAdrian Chadd } 5083eb6f0de0SAdrian Chadd 508488b3d483SAdrian Chadd /* 5085f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 5086f1bc738eSAdrian Chadd * 5087f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 5088f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 5089f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 5090f1bc738eSAdrian Chadd * (complete or otherwise) frame. 5091f1bc738eSAdrian Chadd * 5092f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 5093f1bc738eSAdrian Chadd */ 5094f1bc738eSAdrian Chadd if (atid->isfiltered) 5095f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5096f1bc738eSAdrian Chadd 5097f1bc738eSAdrian Chadd /* 509888b3d483SAdrian Chadd * Send BAR if required 509988b3d483SAdrian Chadd */ 510088b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 510188b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 510288b3d483SAdrian Chadd 5103375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5104eb6f0de0SAdrian Chadd 5105eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5106eb6f0de0SAdrian Chadd /* bf is freed at this point */ 5107eb6f0de0SAdrian Chadd } 5108eb6f0de0SAdrian Chadd 5109eb6f0de0SAdrian Chadd void 5110eb6f0de0SAdrian Chadd ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 5111eb6f0de0SAdrian Chadd { 5112eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_aggr) 5113eb6f0de0SAdrian Chadd ath_tx_aggr_comp_aggr(sc, bf, fail); 5114eb6f0de0SAdrian Chadd else 5115eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(sc, bf, fail); 5116eb6f0de0SAdrian Chadd } 5117eb6f0de0SAdrian Chadd 5118eb6f0de0SAdrian Chadd /* 5119eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 5120eb6f0de0SAdrian Chadd * 5121eb6f0de0SAdrian Chadd * This is the aggregate version. 5122eb6f0de0SAdrian Chadd */ 5123eb6f0de0SAdrian Chadd void 5124eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an, 5125eb6f0de0SAdrian Chadd struct ath_tid *tid) 5126eb6f0de0SAdrian Chadd { 5127eb6f0de0SAdrian Chadd struct ath_buf *bf; 5128eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5129eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5130eb6f0de0SAdrian Chadd ATH_AGGR_STATUS status; 5131eb6f0de0SAdrian Chadd ath_bufhead bf_q; 5132eb6f0de0SAdrian Chadd 5133eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid); 5134375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5135eb6f0de0SAdrian Chadd 513622a3aee6SAdrian Chadd /* 513722a3aee6SAdrian Chadd * XXX TODO: If we're called for a queue that we're leaking frames to, 513822a3aee6SAdrian Chadd * ensure we only leak one. 513922a3aee6SAdrian Chadd */ 514022a3aee6SAdrian Chadd 5141eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 5142eb6f0de0SAdrian Chadd 5143eb6f0de0SAdrian Chadd if (tid->tid == IEEE80211_NONQOS_TID) 5144eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: called for TID=NONQOS_TID?\n", 5145eb6f0de0SAdrian Chadd __func__); 5146eb6f0de0SAdrian Chadd 5147eb6f0de0SAdrian Chadd for (;;) { 5148eb6f0de0SAdrian Chadd status = ATH_AGGR_DONE; 5149eb6f0de0SAdrian Chadd 5150eb6f0de0SAdrian Chadd /* 5151eb6f0de0SAdrian Chadd * If the upper layer has paused the TID, don't 5152eb6f0de0SAdrian Chadd * queue any further packets. 5153eb6f0de0SAdrian Chadd * 5154eb6f0de0SAdrian Chadd * This can also occur from the completion task because 5155eb6f0de0SAdrian Chadd * of packet loss; but as its serialised with this code, 5156eb6f0de0SAdrian Chadd * it won't "appear" half way through queuing packets. 5157eb6f0de0SAdrian Chadd */ 515822a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5159eb6f0de0SAdrian Chadd break; 5160eb6f0de0SAdrian Chadd 51613e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5162eb6f0de0SAdrian Chadd if (bf == NULL) { 5163eb6f0de0SAdrian Chadd break; 5164eb6f0de0SAdrian Chadd } 5165eb6f0de0SAdrian Chadd 5166eb6f0de0SAdrian Chadd /* 5167eb6f0de0SAdrian Chadd * If the packet doesn't fall within the BAW (eg a NULL 5168eb6f0de0SAdrian Chadd * data frame), schedule it directly; continue. 5169eb6f0de0SAdrian Chadd */ 5170eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 5171d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5172d4365d16SAdrian Chadd "%s: non-baw packet\n", 5173eb6f0de0SAdrian Chadd __func__); 51743e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 51752a9f83afSAdrian Chadd 51762a9f83afSAdrian Chadd if (bf->bf_state.bfs_nframes > 1) 51772a9f83afSAdrian Chadd device_printf(sc->sc_dev, 51782a9f83afSAdrian Chadd "%s: aggr=%d, nframes=%d\n", 51792a9f83afSAdrian Chadd __func__, 51802a9f83afSAdrian Chadd bf->bf_state.bfs_aggr, 51812a9f83afSAdrian Chadd bf->bf_state.bfs_nframes); 51822a9f83afSAdrian Chadd 51832a9f83afSAdrian Chadd /* 51842a9f83afSAdrian Chadd * This shouldn't happen - such frames shouldn't 51852a9f83afSAdrian Chadd * ever have been queued as an aggregate in the 51862a9f83afSAdrian Chadd * first place. However, make sure the fields 51872a9f83afSAdrian Chadd * are correctly setup just to be totally sure. 51882a9f83afSAdrian Chadd */ 5189eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 51902a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 51912a9f83afSAdrian Chadd 51924e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 51934e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 51944e81f27cSAdrian Chadd 5195eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5196e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5197e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5198eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5199e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5200eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5201eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5202eb6f0de0SAdrian Chadd 5203eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_nonbaw_pkt++; 5204eb6f0de0SAdrian Chadd 5205eb6f0de0SAdrian Chadd /* Queue the packet; continue */ 5206eb6f0de0SAdrian Chadd goto queuepkt; 5207eb6f0de0SAdrian Chadd } 5208eb6f0de0SAdrian Chadd 5209eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 5210eb6f0de0SAdrian Chadd 5211eb6f0de0SAdrian Chadd /* 5212eb6f0de0SAdrian Chadd * Do a rate control lookup on the first frame in the 5213eb6f0de0SAdrian Chadd * list. The rate control code needs that to occur 5214eb6f0de0SAdrian Chadd * before it can determine whether to TX. 5215eb6f0de0SAdrian Chadd * It's inaccurate because the rate control code doesn't 5216eb6f0de0SAdrian Chadd * really "do" aggregate lookups, so it only considers 5217eb6f0de0SAdrian Chadd * the size of the first frame. 5218eb6f0de0SAdrian Chadd */ 5219eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5220eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = 0; 5221eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = 0; 5222e2e4a2c2SAdrian Chadd 5223e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5224e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5225e2e4a2c2SAdrian Chadd 5226e2e4a2c2SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5227eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5228eb6f0de0SAdrian Chadd 5229eb6f0de0SAdrian Chadd status = ath_tx_form_aggr(sc, an, tid, &bf_q); 5230eb6f0de0SAdrian Chadd 5231eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5232eb6f0de0SAdrian Chadd "%s: ath_tx_form_aggr() status=%d\n", __func__, status); 5233eb6f0de0SAdrian Chadd 5234eb6f0de0SAdrian Chadd /* 5235eb6f0de0SAdrian Chadd * No frames to be picked up - out of BAW 5236eb6f0de0SAdrian Chadd */ 5237eb6f0de0SAdrian Chadd if (TAILQ_EMPTY(&bf_q)) 5238eb6f0de0SAdrian Chadd break; 5239eb6f0de0SAdrian Chadd 5240eb6f0de0SAdrian Chadd /* 5241eb6f0de0SAdrian Chadd * This assumes that the descriptor list in the ath_bufhead 5242eb6f0de0SAdrian Chadd * are already linked together via bf_next pointers. 5243eb6f0de0SAdrian Chadd */ 5244eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&bf_q); 5245eb6f0de0SAdrian Chadd 5246e2e4a2c2SAdrian Chadd if (status == ATH_AGGR_8K_LIMITED) 5247e2e4a2c2SAdrian Chadd sc->sc_aggr_stats.aggr_rts_aggr_limited++; 5248e2e4a2c2SAdrian Chadd 5249eb6f0de0SAdrian Chadd /* 5250eb6f0de0SAdrian Chadd * If it's the only frame send as non-aggregate 5251eb6f0de0SAdrian Chadd * assume that ath_tx_form_aggr() has checked 5252eb6f0de0SAdrian Chadd * whether it's in the BAW and added it appropriately. 5253eb6f0de0SAdrian Chadd */ 5254eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_nframes == 1) { 5255eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5256eb6f0de0SAdrian Chadd "%s: single-frame aggregate\n", __func__); 52574e81f27cSAdrian Chadd 52584e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 52594e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 52604e81f27cSAdrian Chadd 5261eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 526221840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; 5263eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5264eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5265eb6f0de0SAdrian Chadd if (status == ATH_AGGR_BAW_CLOSED) 5266eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_baw_closed_single_pkt++; 5267eb6f0de0SAdrian Chadd else 5268eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_single_pkt++; 5269eb6f0de0SAdrian Chadd } else { 5270eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5271d4365d16SAdrian Chadd "%s: multi-frame aggregate: %d frames, " 5272d4365d16SAdrian Chadd "length %d\n", 5273eb6f0de0SAdrian Chadd __func__, bf->bf_state.bfs_nframes, 5274eb6f0de0SAdrian Chadd bf->bf_state.bfs_al); 5275eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 1; 5276eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++; 5277eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_aggr_pkt++; 5278eb6f0de0SAdrian Chadd 52794e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 52804e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 52814e81f27cSAdrian Chadd 5282eb6f0de0SAdrian Chadd /* 5283e2e4a2c2SAdrian Chadd * Calculate the duration/protection as required. 5284e2e4a2c2SAdrian Chadd */ 5285e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5286e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5287e2e4a2c2SAdrian Chadd 5288e2e4a2c2SAdrian Chadd /* 5289eb6f0de0SAdrian Chadd * Update the rate and rtscts information based on the 5290eb6f0de0SAdrian Chadd * rate decision made by the rate control code; 5291eb6f0de0SAdrian Chadd * the first frame in the aggregate needs it. 5292eb6f0de0SAdrian Chadd */ 5293eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5294eb6f0de0SAdrian Chadd 5295eb6f0de0SAdrian Chadd /* 5296eb6f0de0SAdrian Chadd * Setup the relevant descriptor fields 5297eb6f0de0SAdrian Chadd * for aggregation. The first descriptor 5298eb6f0de0SAdrian Chadd * already points to the rest in the chain. 5299eb6f0de0SAdrian Chadd */ 5300eb6f0de0SAdrian Chadd ath_tx_setds_11n(sc, bf); 5301eb6f0de0SAdrian Chadd 5302eb6f0de0SAdrian Chadd } 5303eb6f0de0SAdrian Chadd queuepkt: 5304eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 5305eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 5306eb6f0de0SAdrian Chadd 5307eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 5308eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: TID=16?\n", __func__); 5309eb6f0de0SAdrian Chadd 531022a3aee6SAdrian Chadd /* 531122a3aee6SAdrian Chadd * Update leak count and frame config if were leaking frames. 531222a3aee6SAdrian Chadd * 531322a3aee6SAdrian Chadd * XXX TODO: it should update all frames in an aggregate 531422a3aee6SAdrian Chadd * correctly! 531522a3aee6SAdrian Chadd */ 531622a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 531722a3aee6SAdrian Chadd 5318eb6f0de0SAdrian Chadd /* Punt to txq */ 5319eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5320eb6f0de0SAdrian Chadd 5321eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5322eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5323eb6f0de0SAdrian Chadd tid->hwq_depth++; 5324eb6f0de0SAdrian Chadd 5325eb6f0de0SAdrian Chadd /* 5326eb6f0de0SAdrian Chadd * Break out if ath_tx_form_aggr() indicated 5327eb6f0de0SAdrian Chadd * there can't be any further progress (eg BAW is full.) 5328eb6f0de0SAdrian Chadd * Checking for an empty txq is done above. 5329eb6f0de0SAdrian Chadd * 5330eb6f0de0SAdrian Chadd * XXX locking on txq here? 5331eb6f0de0SAdrian Chadd */ 5332eb6f0de0SAdrian Chadd if (txq->axq_aggr_depth >= sc->sc_hwq_limit || 533322a3aee6SAdrian Chadd (status == ATH_AGGR_BAW_CLOSED || 533422a3aee6SAdrian Chadd status == ATH_AGGR_LEAK_CLOSED)) 5335eb6f0de0SAdrian Chadd break; 5336eb6f0de0SAdrian Chadd } 5337eb6f0de0SAdrian Chadd } 5338eb6f0de0SAdrian Chadd 5339eb6f0de0SAdrian Chadd /* 5340eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 5341eb6f0de0SAdrian Chadd */ 5342eb6f0de0SAdrian Chadd void 5343eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an, 5344eb6f0de0SAdrian Chadd struct ath_tid *tid) 5345eb6f0de0SAdrian Chadd { 5346eb6f0de0SAdrian Chadd struct ath_buf *bf; 5347eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5348eb6f0de0SAdrian Chadd 5349eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n", 5350eb6f0de0SAdrian Chadd __func__, an, tid->tid); 5351eb6f0de0SAdrian Chadd 5352375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5353eb6f0de0SAdrian Chadd 5354eb6f0de0SAdrian Chadd /* Check - is AMPDU pending or running? then print out something */ 5355eb6f0de0SAdrian Chadd if (ath_tx_ampdu_pending(sc, an, tid->tid)) 5356eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: tid=%d, ampdu pending?\n", 5357eb6f0de0SAdrian Chadd __func__, tid->tid); 5358eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid)) 5359eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: tid=%d, ampdu running?\n", 5360eb6f0de0SAdrian Chadd __func__, tid->tid); 5361eb6f0de0SAdrian Chadd 5362eb6f0de0SAdrian Chadd for (;;) { 5363eb6f0de0SAdrian Chadd 5364eb6f0de0SAdrian Chadd /* 5365eb6f0de0SAdrian Chadd * If the upper layers have paused the TID, don't 5366eb6f0de0SAdrian Chadd * queue any further packets. 536722a3aee6SAdrian Chadd * 536822a3aee6SAdrian Chadd * XXX if we are leaking frames, make sure we decrement 536922a3aee6SAdrian Chadd * that counter _and_ we continue here. 5370eb6f0de0SAdrian Chadd */ 537122a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5372eb6f0de0SAdrian Chadd break; 5373eb6f0de0SAdrian Chadd 53743e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5375eb6f0de0SAdrian Chadd if (bf == NULL) { 5376eb6f0de0SAdrian Chadd break; 5377eb6f0de0SAdrian Chadd } 5378eb6f0de0SAdrian Chadd 53793e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 5380eb6f0de0SAdrian Chadd 5381eb6f0de0SAdrian Chadd /* Sanity check! */ 5382eb6f0de0SAdrian Chadd if (tid->tid != bf->bf_state.bfs_tid) { 5383eb6f0de0SAdrian Chadd device_printf(sc->sc_dev, "%s: bfs_tid %d !=" 5384eb6f0de0SAdrian Chadd " tid %d\n", 5385eb6f0de0SAdrian Chadd __func__, bf->bf_state.bfs_tid, tid->tid); 5386eb6f0de0SAdrian Chadd } 5387eb6f0de0SAdrian Chadd /* Normal completion handler */ 5388eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 5389eb6f0de0SAdrian Chadd 53900c54de88SAdrian Chadd /* 53910c54de88SAdrian Chadd * Override this for now, until the non-aggregate 53920c54de88SAdrian Chadd * completion handler correctly handles software retransmits. 53930c54de88SAdrian Chadd */ 53940c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 53950c54de88SAdrian Chadd 53964e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 53974e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 53984e81f27cSAdrian Chadd 5399eb6f0de0SAdrian Chadd /* Program descriptors + rate control */ 5400eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5401e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5402e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5403eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5404e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5405eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5406eb6f0de0SAdrian Chadd 540722a3aee6SAdrian Chadd /* 540822a3aee6SAdrian Chadd * Update the current leak count if 540922a3aee6SAdrian Chadd * we're leaking frames; and set the 541022a3aee6SAdrian Chadd * MORE flag as appropriate. 541122a3aee6SAdrian Chadd */ 541222a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 541322a3aee6SAdrian Chadd 5414eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5415eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5416eb6f0de0SAdrian Chadd tid->hwq_depth++; 5417eb6f0de0SAdrian Chadd 5418eb6f0de0SAdrian Chadd /* Punt to hardware or software txq */ 5419eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5420eb6f0de0SAdrian Chadd } 5421eb6f0de0SAdrian Chadd } 5422eb6f0de0SAdrian Chadd 5423eb6f0de0SAdrian Chadd /* 5424eb6f0de0SAdrian Chadd * Schedule some packets to the given hardware queue. 5425eb6f0de0SAdrian Chadd * 5426eb6f0de0SAdrian Chadd * This function walks the list of TIDs (ie, ath_node TIDs 5427eb6f0de0SAdrian Chadd * with queued traffic) and attempts to schedule traffic 5428eb6f0de0SAdrian Chadd * from them. 5429eb6f0de0SAdrian Chadd * 5430eb6f0de0SAdrian Chadd * TID scheduling is implemented as a FIFO, with TIDs being 5431eb6f0de0SAdrian Chadd * added to the end of the queue after some frames have been 5432eb6f0de0SAdrian Chadd * scheduled. 5433eb6f0de0SAdrian Chadd */ 5434eb6f0de0SAdrian Chadd void 5435eb6f0de0SAdrian Chadd ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq) 5436eb6f0de0SAdrian Chadd { 5437eb6f0de0SAdrian Chadd struct ath_tid *tid, *next, *last; 5438eb6f0de0SAdrian Chadd 5439375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5440eb6f0de0SAdrian Chadd 5441eb6f0de0SAdrian Chadd /* 5442eb6f0de0SAdrian Chadd * Don't schedule if the hardware queue is busy. 5443eb6f0de0SAdrian Chadd * This (hopefully) gives some more time to aggregate 5444eb6f0de0SAdrian Chadd * some packets in the aggregation queue. 5445eb6f0de0SAdrian Chadd */ 5446eb6f0de0SAdrian Chadd if (txq->axq_aggr_depth >= sc->sc_hwq_limit) { 5447eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++; 5448eb6f0de0SAdrian Chadd return; 5449eb6f0de0SAdrian Chadd } 5450eb6f0de0SAdrian Chadd 5451eb6f0de0SAdrian Chadd last = TAILQ_LAST(&txq->axq_tidq, axq_t_s); 5452eb6f0de0SAdrian Chadd 5453eb6f0de0SAdrian Chadd TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) { 5454eb6f0de0SAdrian Chadd /* 5455eb6f0de0SAdrian Chadd * Suspend paused queues here; they'll be resumed 5456eb6f0de0SAdrian Chadd * once the addba completes or times out. 5457eb6f0de0SAdrian Chadd */ 5458eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n", 5459eb6f0de0SAdrian Chadd __func__, tid->tid, tid->paused); 5460eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 546122a3aee6SAdrian Chadd /* 546222a3aee6SAdrian Chadd * This node may be in power-save and we're leaking 546322a3aee6SAdrian Chadd * a frame; be careful. 546422a3aee6SAdrian Chadd */ 546522a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 5466eb6f0de0SAdrian Chadd continue; 5467eb6f0de0SAdrian Chadd } 5468eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, tid->an, tid->tid)) 5469eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(sc, tid->an, tid); 5470eb6f0de0SAdrian Chadd else 5471eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(sc, tid->an, tid); 5472eb6f0de0SAdrian Chadd 5473eb6f0de0SAdrian Chadd /* Not empty? Re-schedule */ 5474eb6f0de0SAdrian Chadd if (tid->axq_depth != 0) 5475eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 5476eb6f0de0SAdrian Chadd 5477b45a991eSAdrian Chadd /* 5478b45a991eSAdrian Chadd * Give the software queue time to aggregate more 5479b45a991eSAdrian Chadd * packets. If we aren't running aggregation then 5480b45a991eSAdrian Chadd * we should still limit the hardware queue depth. 5481b45a991eSAdrian Chadd */ 5482b45a991eSAdrian Chadd if (txq->axq_depth >= sc->sc_hwq_limit) { 5483eb6f0de0SAdrian Chadd break; 5484eb6f0de0SAdrian Chadd } 5485eb6f0de0SAdrian Chadd 5486eb6f0de0SAdrian Chadd /* 5487eb6f0de0SAdrian Chadd * If this was the last entry on the original list, stop. 5488eb6f0de0SAdrian Chadd * Otherwise nodes that have been rescheduled onto the end 5489eb6f0de0SAdrian Chadd * of the TID FIFO list will just keep being rescheduled. 549022a3aee6SAdrian Chadd * 549122a3aee6SAdrian Chadd * XXX What should we do about nodes that were paused 549222a3aee6SAdrian Chadd * but are pending a leaking frame in response to a ps-poll? 549322a3aee6SAdrian Chadd * They'll be put at the front of the list; so they'll 549422a3aee6SAdrian Chadd * prematurely trigger this condition! Ew. 5495eb6f0de0SAdrian Chadd */ 5496eb6f0de0SAdrian Chadd if (tid == last) 5497eb6f0de0SAdrian Chadd break; 5498eb6f0de0SAdrian Chadd } 5499eb6f0de0SAdrian Chadd } 5500eb6f0de0SAdrian Chadd 5501eb6f0de0SAdrian Chadd /* 5502eb6f0de0SAdrian Chadd * TX addba handling 5503eb6f0de0SAdrian Chadd */ 5504eb6f0de0SAdrian Chadd 5505eb6f0de0SAdrian Chadd /* 5506eb6f0de0SAdrian Chadd * Return net80211 TID struct pointer, or NULL for none 5507eb6f0de0SAdrian Chadd */ 5508eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu * 5509eb6f0de0SAdrian Chadd ath_tx_get_tx_tid(struct ath_node *an, int tid) 5510eb6f0de0SAdrian Chadd { 5511eb6f0de0SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 5512eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5513eb6f0de0SAdrian Chadd 5514eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5515eb6f0de0SAdrian Chadd return NULL; 5516eb6f0de0SAdrian Chadd 55172aa563dfSAdrian Chadd tap = &ni->ni_tx_ampdu[tid]; 5518eb6f0de0SAdrian Chadd return tap; 5519eb6f0de0SAdrian Chadd } 5520eb6f0de0SAdrian Chadd 5521eb6f0de0SAdrian Chadd /* 5522eb6f0de0SAdrian Chadd * Is AMPDU-TX running? 5523eb6f0de0SAdrian Chadd */ 5524eb6f0de0SAdrian Chadd static int 5525eb6f0de0SAdrian Chadd ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid) 5526eb6f0de0SAdrian Chadd { 5527eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5528eb6f0de0SAdrian Chadd 5529eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5530eb6f0de0SAdrian Chadd return 0; 5531eb6f0de0SAdrian Chadd 5532eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5533eb6f0de0SAdrian Chadd if (tap == NULL) 5534eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not running */ 5535eb6f0de0SAdrian Chadd 5536eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING); 5537eb6f0de0SAdrian Chadd } 5538eb6f0de0SAdrian Chadd 5539eb6f0de0SAdrian Chadd /* 5540eb6f0de0SAdrian Chadd * Is AMPDU-TX negotiation pending? 5541eb6f0de0SAdrian Chadd */ 5542eb6f0de0SAdrian Chadd static int 5543eb6f0de0SAdrian Chadd ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid) 5544eb6f0de0SAdrian Chadd { 5545eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5546eb6f0de0SAdrian Chadd 5547eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5548eb6f0de0SAdrian Chadd return 0; 5549eb6f0de0SAdrian Chadd 5550eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5551eb6f0de0SAdrian Chadd if (tap == NULL) 5552eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not pending */ 5553eb6f0de0SAdrian Chadd 5554eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND); 5555eb6f0de0SAdrian Chadd } 5556eb6f0de0SAdrian Chadd 5557eb6f0de0SAdrian Chadd /* 5558eb6f0de0SAdrian Chadd * Is AMPDU-TX pending for the given TID? 5559eb6f0de0SAdrian Chadd */ 5560eb6f0de0SAdrian Chadd 5561eb6f0de0SAdrian Chadd 5562eb6f0de0SAdrian Chadd /* 5563eb6f0de0SAdrian Chadd * Method to handle sending an ADDBA request. 5564eb6f0de0SAdrian Chadd * 5565eb6f0de0SAdrian Chadd * We tap this so the relevant flags can be set to pause the TID 5566eb6f0de0SAdrian Chadd * whilst waiting for the response. 5567eb6f0de0SAdrian Chadd * 5568eb6f0de0SAdrian Chadd * XXX there's no timeout handler we can override? 5569eb6f0de0SAdrian Chadd */ 5570eb6f0de0SAdrian Chadd int 5571eb6f0de0SAdrian Chadd ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5572eb6f0de0SAdrian Chadd int dialogtoken, int baparamset, int batimeout) 5573eb6f0de0SAdrian Chadd { 5574eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 55752aa563dfSAdrian Chadd int tid = tap->txa_tid; 5576eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5577eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5578eb6f0de0SAdrian Chadd 5579eb6f0de0SAdrian Chadd /* 5580eb6f0de0SAdrian Chadd * XXX danger Will Robinson! 5581eb6f0de0SAdrian Chadd * 5582eb6f0de0SAdrian Chadd * Although the taskqueue may be running and scheduling some more 5583eb6f0de0SAdrian Chadd * packets, these should all be _before_ the addba sequence number. 5584eb6f0de0SAdrian Chadd * However, net80211 will keep self-assigning sequence numbers 5585eb6f0de0SAdrian Chadd * until addba has been negotiated. 5586eb6f0de0SAdrian Chadd * 5587eb6f0de0SAdrian Chadd * In the past, these packets would be "paused" (which still works 5588eb6f0de0SAdrian Chadd * fine, as they're being scheduled to the driver in the same 5589eb6f0de0SAdrian Chadd * serialised method which is calling the addba request routine) 5590eb6f0de0SAdrian Chadd * and when the aggregation session begins, they'll be dequeued 5591eb6f0de0SAdrian Chadd * as aggregate packets and added to the BAW. However, now there's 5592eb6f0de0SAdrian Chadd * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these 5593eb6f0de0SAdrian Chadd * packets. Thus they never get included in the BAW tracking and 5594eb6f0de0SAdrian Chadd * this can cause the initial burst of packets after the addba 5595eb6f0de0SAdrian Chadd * negotiation to "hang", as they quickly fall outside the BAW. 5596eb6f0de0SAdrian Chadd * 5597eb6f0de0SAdrian Chadd * The "eventual" solution should be to tag these packets with 5598eb6f0de0SAdrian Chadd * dobaw. Although net80211 has given us a sequence number, 5599eb6f0de0SAdrian Chadd * it'll be "after" the left edge of the BAW and thus it'll 5600eb6f0de0SAdrian Chadd * fall within it. 5601eb6f0de0SAdrian Chadd */ 5602375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5603d3a6425bSAdrian Chadd /* 5604d3a6425bSAdrian Chadd * This is a bit annoying. Until net80211 HT code inherits some 5605d3a6425bSAdrian Chadd * (any) locking, we may have this called in parallel BUT only 5606d3a6425bSAdrian Chadd * one response/timeout will be called. Grr. 5607d3a6425bSAdrian Chadd */ 5608d3a6425bSAdrian Chadd if (atid->addba_tx_pending == 0) { 5609eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 5610d3a6425bSAdrian Chadd atid->addba_tx_pending = 1; 5611d3a6425bSAdrian Chadd } 5612375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5613eb6f0de0SAdrian Chadd 5614eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 56159b48fb4bSAdrian Chadd "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n", 56169b48fb4bSAdrian Chadd __func__, 56179b48fb4bSAdrian Chadd ni->ni_macaddr, 56189b48fb4bSAdrian Chadd ":", 56199b48fb4bSAdrian Chadd dialogtoken, baparamset, batimeout); 5620eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5621eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5622eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5623eb6f0de0SAdrian Chadd 5624eb6f0de0SAdrian Chadd return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, 5625eb6f0de0SAdrian Chadd batimeout); 5626eb6f0de0SAdrian Chadd } 5627eb6f0de0SAdrian Chadd 5628eb6f0de0SAdrian Chadd /* 5629eb6f0de0SAdrian Chadd * Handle an ADDBA response. 5630eb6f0de0SAdrian Chadd * 5631eb6f0de0SAdrian Chadd * We unpause the queue so TX'ing can resume. 5632eb6f0de0SAdrian Chadd * 5633eb6f0de0SAdrian Chadd * Any packets TX'ed from this point should be "aggregate" (whether 5634eb6f0de0SAdrian Chadd * aggregate or not) so the BAW is updated. 5635eb6f0de0SAdrian Chadd * 5636eb6f0de0SAdrian Chadd * Note! net80211 keeps self-assigning sequence numbers until 5637eb6f0de0SAdrian Chadd * ampdu is negotiated. This means the initially-negotiated BAW left 5638eb6f0de0SAdrian Chadd * edge won't match the ni->ni_txseq. 5639eb6f0de0SAdrian Chadd * 5640eb6f0de0SAdrian Chadd * So, being very dirty, the BAW left edge is "slid" here to match 5641eb6f0de0SAdrian Chadd * ni->ni_txseq. 5642eb6f0de0SAdrian Chadd * 5643eb6f0de0SAdrian Chadd * What likely SHOULD happen is that all packets subsequent to the 5644eb6f0de0SAdrian Chadd * addba request should be tagged as aggregate and queued as non-aggregate 5645eb6f0de0SAdrian Chadd * frames; thus updating the BAW. For now though, I'll just slide the 5646eb6f0de0SAdrian Chadd * window. 5647eb6f0de0SAdrian Chadd */ 5648eb6f0de0SAdrian Chadd int 5649eb6f0de0SAdrian Chadd ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5650eb6f0de0SAdrian Chadd int status, int code, int batimeout) 5651eb6f0de0SAdrian Chadd { 5652eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 56532aa563dfSAdrian Chadd int tid = tap->txa_tid; 5654eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5655eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5656eb6f0de0SAdrian Chadd int r; 5657eb6f0de0SAdrian Chadd 5658eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 56599b48fb4bSAdrian Chadd "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__, 56609b48fb4bSAdrian Chadd ni->ni_macaddr, 56619b48fb4bSAdrian Chadd ":", 5662eb6f0de0SAdrian Chadd status, code, batimeout); 5663eb6f0de0SAdrian Chadd 5664eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5665eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5666eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5667eb6f0de0SAdrian Chadd 5668eb6f0de0SAdrian Chadd /* 5669eb6f0de0SAdrian Chadd * Call this first, so the interface flags get updated 5670eb6f0de0SAdrian Chadd * before the TID is unpaused. Otherwise a race condition 5671eb6f0de0SAdrian Chadd * exists where the unpaused TID still doesn't yet have 5672eb6f0de0SAdrian Chadd * IEEE80211_AGGR_RUNNING set. 5673eb6f0de0SAdrian Chadd */ 5674eb6f0de0SAdrian Chadd r = sc->sc_addba_response(ni, tap, status, code, batimeout); 5675eb6f0de0SAdrian Chadd 5676375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5677d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 5678eb6f0de0SAdrian Chadd /* 5679eb6f0de0SAdrian Chadd * XXX dirty! 5680eb6f0de0SAdrian Chadd * Slide the BAW left edge to wherever net80211 left it for us. 5681eb6f0de0SAdrian Chadd * Read above for more information. 5682eb6f0de0SAdrian Chadd */ 5683eb6f0de0SAdrian Chadd tap->txa_start = ni->ni_txseqs[tid]; 5684eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 5685375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5686eb6f0de0SAdrian Chadd return r; 5687eb6f0de0SAdrian Chadd } 5688eb6f0de0SAdrian Chadd 5689eb6f0de0SAdrian Chadd 5690eb6f0de0SAdrian Chadd /* 5691eb6f0de0SAdrian Chadd * Stop ADDBA on a queue. 56928405fe86SAdrian Chadd * 56938405fe86SAdrian Chadd * This can be called whilst BAR TX is currently active on the queue, 56948405fe86SAdrian Chadd * so make sure this is unblocked before continuing. 5695eb6f0de0SAdrian Chadd */ 5696eb6f0de0SAdrian Chadd void 5697eb6f0de0SAdrian Chadd ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 5698eb6f0de0SAdrian Chadd { 5699eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 57002aa563dfSAdrian Chadd int tid = tap->txa_tid; 5701eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5702eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 570322780332SAdrian Chadd ath_bufhead bf_cq; 570422780332SAdrian Chadd struct ath_buf *bf; 5705eb6f0de0SAdrian Chadd 57069b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n", 57079b48fb4bSAdrian Chadd __func__, 57089b48fb4bSAdrian Chadd ni->ni_macaddr, 57099b48fb4bSAdrian Chadd ":"); 5710eb6f0de0SAdrian Chadd 57118405fe86SAdrian Chadd /* 57128405fe86SAdrian Chadd * Pause TID traffic early, so there aren't any races 57138405fe86SAdrian Chadd * Unblock the pending BAR held traffic, if it's currently paused. 57148405fe86SAdrian Chadd */ 5715375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5716eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 57178405fe86SAdrian Chadd if (atid->bar_wait) { 57188405fe86SAdrian Chadd /* 57198405fe86SAdrian Chadd * bar_unsuspend() expects bar_tx == 1, as it should be 57208405fe86SAdrian Chadd * called from the TX completion path. This quietens 57218405fe86SAdrian Chadd * the warning. It's cleared for us anyway. 57228405fe86SAdrian Chadd */ 57238405fe86SAdrian Chadd atid->bar_tx = 1; 57248405fe86SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 57258405fe86SAdrian Chadd } 5726375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5727eb6f0de0SAdrian Chadd 5728eb6f0de0SAdrian Chadd /* There's no need to hold the TXQ lock here */ 5729eb6f0de0SAdrian Chadd sc->sc_addba_stop(ni, tap); 5730eb6f0de0SAdrian Chadd 5731eb6f0de0SAdrian Chadd /* 57324dfd4507SAdrian Chadd * ath_tx_tid_cleanup will resume the TID if possible, otherwise 5733eb6f0de0SAdrian Chadd * it'll set the cleanup flag, and it'll be unpaused once 5734eb6f0de0SAdrian Chadd * things have been cleaned up. 5735eb6f0de0SAdrian Chadd */ 573622780332SAdrian Chadd TAILQ_INIT(&bf_cq); 573722780332SAdrian Chadd ATH_TX_LOCK(sc); 573822780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, tid, &bf_cq); 573922780332SAdrian Chadd ATH_TX_UNLOCK(sc); 574022780332SAdrian Chadd 574122780332SAdrian Chadd /* Handle completing frames and fail them */ 574222780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 574322780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 574422780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 574522780332SAdrian Chadd } 574622a3aee6SAdrian Chadd 574722780332SAdrian Chadd } 574822780332SAdrian Chadd 574922780332SAdrian Chadd /* 575022780332SAdrian Chadd * Handle a node reassociation. 575122780332SAdrian Chadd * 575222780332SAdrian Chadd * We may have a bunch of frames queued to the hardware; those need 575322780332SAdrian Chadd * to be marked as cleanup. 575422780332SAdrian Chadd */ 575522780332SAdrian Chadd void 575622780332SAdrian Chadd ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an) 575722780332SAdrian Chadd { 575822780332SAdrian Chadd struct ath_tid *tid; 575922780332SAdrian Chadd int i; 576022780332SAdrian Chadd ath_bufhead bf_cq; 576122780332SAdrian Chadd struct ath_buf *bf; 576222780332SAdrian Chadd 576322780332SAdrian Chadd TAILQ_INIT(&bf_cq); 576422780332SAdrian Chadd 576522780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 576622780332SAdrian Chadd 576722780332SAdrian Chadd ATH_TX_LOCK(sc); 576822780332SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 576922780332SAdrian Chadd tid = &an->an_tid[i]; 577022780332SAdrian Chadd if (tid->hwq_depth == 0) 577122780332SAdrian Chadd continue; 577222780332SAdrian Chadd ath_tx_tid_pause(sc, tid); 577322780332SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 577422780332SAdrian Chadd "%s: %6D: TID %d: cleaning up TID\n", 577522780332SAdrian Chadd __func__, 577622780332SAdrian Chadd an->an_node.ni_macaddr, 577722780332SAdrian Chadd ":", 577822780332SAdrian Chadd i); 577922780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, i, &bf_cq); 578022780332SAdrian Chadd } 578122780332SAdrian Chadd ATH_TX_UNLOCK(sc); 578222780332SAdrian Chadd 578322780332SAdrian Chadd /* Handle completing frames and fail them */ 578422780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 578522780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 578622780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 578722780332SAdrian Chadd } 5788eb6f0de0SAdrian Chadd } 5789eb6f0de0SAdrian Chadd 5790eb6f0de0SAdrian Chadd /* 5791eb6f0de0SAdrian Chadd * Note: net80211 bar_timeout() doesn't call this function on BAR failure; 5792eb6f0de0SAdrian Chadd * it simply tears down the aggregation session. Ew. 5793eb6f0de0SAdrian Chadd * 5794eb6f0de0SAdrian Chadd * It however will call ieee80211_ampdu_stop() which will call 5795eb6f0de0SAdrian Chadd * ic->ic_addba_stop(). 5796eb6f0de0SAdrian Chadd * 5797eb6f0de0SAdrian Chadd * XXX This uses a hard-coded max BAR count value; the whole 5798eb6f0de0SAdrian Chadd * XXX BAR TX success or failure should be better handled! 5799eb6f0de0SAdrian Chadd */ 5800eb6f0de0SAdrian Chadd void 5801eb6f0de0SAdrian Chadd ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5802eb6f0de0SAdrian Chadd int status) 5803eb6f0de0SAdrian Chadd { 5804eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 58052aa563dfSAdrian Chadd int tid = tap->txa_tid; 5806eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5807eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5808eb6f0de0SAdrian Chadd int attempts = tap->txa_attempts; 5809eb6f0de0SAdrian Chadd 58100e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 58116d07d3e0SAdrian Chadd "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d\n", 58120e22ed0eSAdrian Chadd __func__, 58139b48fb4bSAdrian Chadd ni->ni_macaddr, 58149b48fb4bSAdrian Chadd ":", 5815e60c4fc2SAdrian Chadd tap->txa_tid, 5816e60c4fc2SAdrian Chadd atid->tid, 58170e22ed0eSAdrian Chadd status, 58180e22ed0eSAdrian Chadd attempts); 5819eb6f0de0SAdrian Chadd 5820eb6f0de0SAdrian Chadd /* Note: This may update the BAW details */ 5821eb6f0de0SAdrian Chadd sc->sc_bar_response(ni, tap, status); 5822eb6f0de0SAdrian Chadd 5823eb6f0de0SAdrian Chadd /* Unpause the TID */ 5824eb6f0de0SAdrian Chadd /* 5825eb6f0de0SAdrian Chadd * XXX if this is attempt=50, the TID will be downgraded 5826eb6f0de0SAdrian Chadd * XXX to a non-aggregate session. So we must unpause the 5827eb6f0de0SAdrian Chadd * XXX TID here or it'll never be done. 5828088d8b81SAdrian Chadd * 5829088d8b81SAdrian Chadd * Also, don't call it if bar_tx/bar_wait are 0; something 5830088d8b81SAdrian Chadd * has beaten us to the punch? (XXX figure out what?) 5831eb6f0de0SAdrian Chadd */ 5832eb6f0de0SAdrian Chadd if (status == 0 || attempts == 50) { 5833375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5834088d8b81SAdrian Chadd if (atid->bar_tx == 0 || atid->bar_wait == 0) 5835088d8b81SAdrian Chadd device_printf(sc->sc_dev, 5836088d8b81SAdrian Chadd "%s: huh? bar_tx=%d, bar_wait=%d\n", 5837088d8b81SAdrian Chadd __func__, 5838088d8b81SAdrian Chadd atid->bar_tx, atid->bar_wait); 5839088d8b81SAdrian Chadd else 584088b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 5841375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5842eb6f0de0SAdrian Chadd } 5843eb6f0de0SAdrian Chadd } 5844eb6f0de0SAdrian Chadd 5845eb6f0de0SAdrian Chadd /* 5846eb6f0de0SAdrian Chadd * This is called whenever the pending ADDBA request times out. 5847eb6f0de0SAdrian Chadd * Unpause and reschedule the TID. 5848eb6f0de0SAdrian Chadd */ 5849eb6f0de0SAdrian Chadd void 5850eb6f0de0SAdrian Chadd ath_addba_response_timeout(struct ieee80211_node *ni, 5851eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap) 5852eb6f0de0SAdrian Chadd { 5853eb6f0de0SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc; 58542aa563dfSAdrian Chadd int tid = tap->txa_tid; 5855eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5856eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5857eb6f0de0SAdrian Chadd 5858eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 58596d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called; resuming\n", 58609b48fb4bSAdrian Chadd __func__, 58619b48fb4bSAdrian Chadd ni->ni_macaddr, 58626d07d3e0SAdrian Chadd ":", 58636d07d3e0SAdrian Chadd tid); 5864eb6f0de0SAdrian Chadd 5865375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5866d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 5867375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5868d3a6425bSAdrian Chadd 5869eb6f0de0SAdrian Chadd /* Note: This updates the aggregate state to (again) pending */ 5870eb6f0de0SAdrian Chadd sc->sc_addba_response_timeout(ni, tap); 5871eb6f0de0SAdrian Chadd 5872eb6f0de0SAdrian Chadd /* Unpause the TID; which reschedules it */ 5873375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5874eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 5875375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5876eb6f0de0SAdrian Chadd } 58773fdfc330SAdrian Chadd 58780eb81626SAdrian Chadd /* 58790eb81626SAdrian Chadd * Check if a node is asleep or not. 58800eb81626SAdrian Chadd */ 5881548a605dSAdrian Chadd int 58820eb81626SAdrian Chadd ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an) 58830eb81626SAdrian Chadd { 58840eb81626SAdrian Chadd 588522780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 58860eb81626SAdrian Chadd 58870eb81626SAdrian Chadd return (an->an_is_powersave); 58880eb81626SAdrian Chadd } 58890eb81626SAdrian Chadd 58900eb81626SAdrian Chadd /* 58910eb81626SAdrian Chadd * Mark a node as currently "in powersaving." 58920eb81626SAdrian Chadd * This suspends all traffic on the node. 58930eb81626SAdrian Chadd * 58940eb81626SAdrian Chadd * This must be called with the node/tx locks free. 58950eb81626SAdrian Chadd * 58960eb81626SAdrian Chadd * XXX TODO: the locking silliness below is due to how the node 58970eb81626SAdrian Chadd * locking currently works. Right now, the node lock is grabbed 58980eb81626SAdrian Chadd * to do rate control lookups and these are done with the TX 58990eb81626SAdrian Chadd * queue lock held. This means the node lock can't be grabbed 59000eb81626SAdrian Chadd * first here or a LOR will occur. 59010eb81626SAdrian Chadd * 59020eb81626SAdrian Chadd * Eventually (hopefully!) the TX path code will only grab 59030eb81626SAdrian Chadd * the TXQ lock when transmitting and the ath_node lock when 59040eb81626SAdrian Chadd * doing node/TID operations. There are other complications - 59050eb81626SAdrian Chadd * the sched/unsched operations involve walking the per-txq 59060eb81626SAdrian Chadd * 'active tid' list and this requires both locks to be held. 59070eb81626SAdrian Chadd */ 59080eb81626SAdrian Chadd void 59090eb81626SAdrian Chadd ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an) 59100eb81626SAdrian Chadd { 59110eb81626SAdrian Chadd struct ath_tid *atid; 59120eb81626SAdrian Chadd struct ath_txq *txq; 59130eb81626SAdrian Chadd int tid; 59140eb81626SAdrian Chadd 591522780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 59160eb81626SAdrian Chadd 59170eb81626SAdrian Chadd /* Suspend all traffic on the node */ 5918375307d4SAdrian Chadd ATH_TX_LOCK(sc); 591922a3aee6SAdrian Chadd 592022a3aee6SAdrian Chadd if (an->an_is_powersave) { 592122a3aee6SAdrian Chadd device_printf(sc->sc_dev, 592222a3aee6SAdrian Chadd "%s: %6D: node was already asleep!\n", 592322a3aee6SAdrian Chadd __func__, 592422a3aee6SAdrian Chadd an->an_node.ni_macaddr, 592522a3aee6SAdrian Chadd ":"); 592622a3aee6SAdrian Chadd ATH_TX_UNLOCK(sc); 592722a3aee6SAdrian Chadd return; 592822a3aee6SAdrian Chadd } 592922a3aee6SAdrian Chadd 59300eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 59310eb81626SAdrian Chadd atid = &an->an_tid[tid]; 59320eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 59330eb81626SAdrian Chadd 59340eb81626SAdrian Chadd ath_tx_tid_pause(sc, atid); 59350eb81626SAdrian Chadd } 59360eb81626SAdrian Chadd 59370eb81626SAdrian Chadd /* Mark node as in powersaving */ 59380eb81626SAdrian Chadd an->an_is_powersave = 1; 59390eb81626SAdrian Chadd 594022780332SAdrian Chadd ATH_TX_UNLOCK(sc); 59410eb81626SAdrian Chadd } 59420eb81626SAdrian Chadd 59430eb81626SAdrian Chadd /* 59440eb81626SAdrian Chadd * Mark a node as currently "awake." 59450eb81626SAdrian Chadd * This resumes all traffic to the node. 59460eb81626SAdrian Chadd */ 59470eb81626SAdrian Chadd void 59480eb81626SAdrian Chadd ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an) 59490eb81626SAdrian Chadd { 59500eb81626SAdrian Chadd struct ath_tid *atid; 59510eb81626SAdrian Chadd struct ath_txq *txq; 59520eb81626SAdrian Chadd int tid; 59530eb81626SAdrian Chadd 595422780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 595522780332SAdrian Chadd 595622780332SAdrian Chadd ATH_TX_LOCK(sc); 59570eb81626SAdrian Chadd 595822a3aee6SAdrian Chadd /* !? */ 59590eb81626SAdrian Chadd if (an->an_is_powersave == 0) { 596022780332SAdrian Chadd ATH_TX_UNLOCK(sc); 59610eb81626SAdrian Chadd device_printf(sc->sc_dev, 59620eb81626SAdrian Chadd "%s: an=%p: node was already awake\n", 59630eb81626SAdrian Chadd __func__, an); 59640eb81626SAdrian Chadd return; 59650eb81626SAdrian Chadd } 59660eb81626SAdrian Chadd 59670eb81626SAdrian Chadd /* Mark node as awake */ 59680eb81626SAdrian Chadd an->an_is_powersave = 0; 596922a3aee6SAdrian Chadd /* 597022a3aee6SAdrian Chadd * Clear any pending leaked frame requests 597122a3aee6SAdrian Chadd */ 597222a3aee6SAdrian Chadd an->an_leak_count = 0; 59730eb81626SAdrian Chadd 59740eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 59750eb81626SAdrian Chadd atid = &an->an_tid[tid]; 59760eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 59770eb81626SAdrian Chadd 59780eb81626SAdrian Chadd ath_tx_tid_resume(sc, atid); 59790eb81626SAdrian Chadd } 5980375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 59810eb81626SAdrian Chadd } 59820eb81626SAdrian Chadd 59833fdfc330SAdrian Chadd static int 59843fdfc330SAdrian Chadd ath_legacy_dma_txsetup(struct ath_softc *sc) 59853fdfc330SAdrian Chadd { 59863fdfc330SAdrian Chadd 59873fdfc330SAdrian Chadd /* nothing new needed */ 59883fdfc330SAdrian Chadd return (0); 59893fdfc330SAdrian Chadd } 59903fdfc330SAdrian Chadd 59913fdfc330SAdrian Chadd static int 59923fdfc330SAdrian Chadd ath_legacy_dma_txteardown(struct ath_softc *sc) 59933fdfc330SAdrian Chadd { 59943fdfc330SAdrian Chadd 59953fdfc330SAdrian Chadd /* nothing new needed */ 59963fdfc330SAdrian Chadd return (0); 59973fdfc330SAdrian Chadd } 59983fdfc330SAdrian Chadd 59993fdfc330SAdrian Chadd void 60003fdfc330SAdrian Chadd ath_xmit_setup_legacy(struct ath_softc *sc) 60013fdfc330SAdrian Chadd { 60021006fc0cSAdrian Chadd /* 60031006fc0cSAdrian Chadd * For now, just set the descriptor length to sizeof(ath_desc); 60041006fc0cSAdrian Chadd * worry about extracting the real length out of the HAL later. 60051006fc0cSAdrian Chadd */ 60061006fc0cSAdrian Chadd sc->sc_tx_desclen = sizeof(struct ath_desc); 6007bb327d28SAdrian Chadd sc->sc_tx_statuslen = sizeof(struct ath_desc); 60081006fc0cSAdrian Chadd sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */ 60093fdfc330SAdrian Chadd 60103fdfc330SAdrian Chadd sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup; 60113fdfc330SAdrian Chadd sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown; 6012f8418db5SAdrian Chadd sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func; 6013746bab5bSAdrian Chadd 6014746bab5bSAdrian Chadd sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart; 6015746bab5bSAdrian Chadd sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff; 6016788e6aa9SAdrian Chadd 6017788e6aa9SAdrian Chadd sc->sc_tx.xmit_drain = ath_legacy_tx_drain; 60183fdfc330SAdrian Chadd } 6019