xref: /freebsd/sys/dev/ath/if_ath_tx.c (revision 974185bb13e7fde0d42b77a20cd7077adfabe58d)
1b8e788a5SAdrian Chadd /*-
2b8e788a5SAdrian Chadd  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3c6e9cee2SAdrian Chadd  * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
4b8e788a5SAdrian Chadd  * All rights reserved.
5b8e788a5SAdrian Chadd  *
6b8e788a5SAdrian Chadd  * Redistribution and use in source and binary forms, with or without
7b8e788a5SAdrian Chadd  * modification, are permitted provided that the following conditions
8b8e788a5SAdrian Chadd  * are met:
9b8e788a5SAdrian Chadd  * 1. Redistributions of source code must retain the above copyright
10b8e788a5SAdrian Chadd  *    notice, this list of conditions and the following disclaimer,
11b8e788a5SAdrian Chadd  *    without modification.
12b8e788a5SAdrian Chadd  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
13b8e788a5SAdrian Chadd  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
14b8e788a5SAdrian Chadd  *    redistribution must be conditioned upon including a substantially
15b8e788a5SAdrian Chadd  *    similar Disclaimer requirement for further binary redistribution.
16b8e788a5SAdrian Chadd  *
17b8e788a5SAdrian Chadd  * NO WARRANTY
18b8e788a5SAdrian Chadd  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19b8e788a5SAdrian Chadd  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20b8e788a5SAdrian Chadd  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
21b8e788a5SAdrian Chadd  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
22b8e788a5SAdrian Chadd  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
23b8e788a5SAdrian Chadd  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24b8e788a5SAdrian Chadd  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25b8e788a5SAdrian Chadd  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
26b8e788a5SAdrian Chadd  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27b8e788a5SAdrian Chadd  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28b8e788a5SAdrian Chadd  * THE POSSIBILITY OF SUCH DAMAGES.
29b8e788a5SAdrian Chadd  */
30b8e788a5SAdrian Chadd 
31b8e788a5SAdrian Chadd #include <sys/cdefs.h>
32b8e788a5SAdrian Chadd __FBSDID("$FreeBSD$");
33b8e788a5SAdrian Chadd 
34b8e788a5SAdrian Chadd /*
35b8e788a5SAdrian Chadd  * Driver for the Atheros Wireless LAN controller.
36b8e788a5SAdrian Chadd  *
37b8e788a5SAdrian Chadd  * This software is derived from work of Atsushi Onoe; his contribution
38b8e788a5SAdrian Chadd  * is greatly appreciated.
39b8e788a5SAdrian Chadd  */
40b8e788a5SAdrian Chadd 
41b8e788a5SAdrian Chadd #include "opt_inet.h"
42b8e788a5SAdrian Chadd #include "opt_ath.h"
43b8e788a5SAdrian Chadd #include "opt_wlan.h"
44b8e788a5SAdrian Chadd 
45b8e788a5SAdrian Chadd #include <sys/param.h>
46b8e788a5SAdrian Chadd #include <sys/systm.h>
47b8e788a5SAdrian Chadd #include <sys/sysctl.h>
48b8e788a5SAdrian Chadd #include <sys/mbuf.h>
49b8e788a5SAdrian Chadd #include <sys/malloc.h>
50b8e788a5SAdrian Chadd #include <sys/lock.h>
51b8e788a5SAdrian Chadd #include <sys/mutex.h>
52b8e788a5SAdrian Chadd #include <sys/kernel.h>
53b8e788a5SAdrian Chadd #include <sys/socket.h>
54b8e788a5SAdrian Chadd #include <sys/sockio.h>
55b8e788a5SAdrian Chadd #include <sys/errno.h>
56b8e788a5SAdrian Chadd #include <sys/callout.h>
57b8e788a5SAdrian Chadd #include <sys/bus.h>
58b8e788a5SAdrian Chadd #include <sys/endian.h>
59b8e788a5SAdrian Chadd #include <sys/kthread.h>
60b8e788a5SAdrian Chadd #include <sys/taskqueue.h>
61b8e788a5SAdrian Chadd #include <sys/priv.h>
62b8e788a5SAdrian Chadd 
63b8e788a5SAdrian Chadd #include <machine/bus.h>
64b8e788a5SAdrian Chadd 
65b8e788a5SAdrian Chadd #include <net/if.h>
66b8e788a5SAdrian Chadd #include <net/if_dl.h>
67b8e788a5SAdrian Chadd #include <net/if_media.h>
68b8e788a5SAdrian Chadd #include <net/if_types.h>
69b8e788a5SAdrian Chadd #include <net/if_arp.h>
70b8e788a5SAdrian Chadd #include <net/ethernet.h>
71b8e788a5SAdrian Chadd #include <net/if_llc.h>
72b8e788a5SAdrian Chadd 
73b8e788a5SAdrian Chadd #include <net80211/ieee80211_var.h>
74b8e788a5SAdrian Chadd #include <net80211/ieee80211_regdomain.h>
75b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_SUPERG
76b8e788a5SAdrian Chadd #include <net80211/ieee80211_superg.h>
77b8e788a5SAdrian Chadd #endif
78b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
79b8e788a5SAdrian Chadd #include <net80211/ieee80211_tdma.h>
80b8e788a5SAdrian Chadd #endif
81eb6f0de0SAdrian Chadd #include <net80211/ieee80211_ht.h>
82b8e788a5SAdrian Chadd 
83b8e788a5SAdrian Chadd #include <net/bpf.h>
84b8e788a5SAdrian Chadd 
85b8e788a5SAdrian Chadd #ifdef INET
86b8e788a5SAdrian Chadd #include <netinet/in.h>
87b8e788a5SAdrian Chadd #include <netinet/if_ether.h>
88b8e788a5SAdrian Chadd #endif
89b8e788a5SAdrian Chadd 
90b8e788a5SAdrian Chadd #include <dev/ath/if_athvar.h>
91b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
92b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_diagcodes.h>
93b8e788a5SAdrian Chadd 
94b8e788a5SAdrian Chadd #include <dev/ath/if_ath_debug.h>
95b8e788a5SAdrian Chadd 
96b8e788a5SAdrian Chadd #ifdef ATH_TX99_DIAG
97b8e788a5SAdrian Chadd #include <dev/ath/ath_tx99/ath_tx99.h>
98b8e788a5SAdrian Chadd #endif
99b8e788a5SAdrian Chadd 
100b8e788a5SAdrian Chadd #include <dev/ath/if_ath_misc.h>
101b8e788a5SAdrian Chadd #include <dev/ath/if_ath_tx.h>
102c1782ce0SAdrian Chadd #include <dev/ath/if_ath_tx_ht.h>
103b8e788a5SAdrian Chadd 
104b69b0dccSAdrian Chadd #ifdef	ATH_DEBUG_ALQ
105b69b0dccSAdrian Chadd #include <dev/ath/if_ath_alq.h>
106b69b0dccSAdrian Chadd #endif
107b69b0dccSAdrian Chadd 
10881a82688SAdrian Chadd /*
109eb6f0de0SAdrian Chadd  * How many retries to perform in software
110eb6f0de0SAdrian Chadd  */
111eb6f0de0SAdrian Chadd #define	SWMAX_RETRIES		10
112eb6f0de0SAdrian Chadd 
1137403d1b9SAdrian Chadd /*
1147403d1b9SAdrian Chadd  * What queue to throw the non-QoS TID traffic into
1157403d1b9SAdrian Chadd  */
1167403d1b9SAdrian Chadd #define	ATH_NONQOS_TID_AC	WME_AC_VO
1177403d1b9SAdrian Chadd 
1180eb81626SAdrian Chadd #if 0
1190eb81626SAdrian Chadd static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an);
1200eb81626SAdrian Chadd #endif
121eb6f0de0SAdrian Chadd static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
122eb6f0de0SAdrian Chadd     int tid);
123eb6f0de0SAdrian Chadd static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
124eb6f0de0SAdrian Chadd     int tid);
125a108d2d6SAdrian Chadd static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
126a108d2d6SAdrian Chadd     struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
127eb6f0de0SAdrian Chadd static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
128eb6f0de0SAdrian Chadd     struct ieee80211_node *ni, struct mbuf *m0, int *tid);
129f1bc738eSAdrian Chadd static struct ath_buf *
130f1bc738eSAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
131f1bc738eSAdrian Chadd     struct ath_tid *tid, struct ath_buf *bf);
132eb6f0de0SAdrian Chadd 
133bb327d28SAdrian Chadd #ifdef	ATH_DEBUG_ALQ
134bb327d28SAdrian Chadd void
135bb327d28SAdrian Chadd ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first)
136bb327d28SAdrian Chadd {
137bb327d28SAdrian Chadd 	struct ath_buf *bf;
138bb327d28SAdrian Chadd 	int i, n;
139bb327d28SAdrian Chadd 	const char *ds;
140bb327d28SAdrian Chadd 
141bb327d28SAdrian Chadd 	/* XXX we should skip out early if debugging isn't enabled! */
142bb327d28SAdrian Chadd 	bf = bf_first;
143bb327d28SAdrian Chadd 
144bb327d28SAdrian Chadd 	while (bf != NULL) {
145bb327d28SAdrian Chadd 		/* XXX should ensure bf_nseg > 0! */
146bb327d28SAdrian Chadd 		if (bf->bf_nseg == 0)
147bb327d28SAdrian Chadd 			break;
148bb327d28SAdrian Chadd 		n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1;
149bb327d28SAdrian Chadd 		for (i = 0, ds = (const char *) bf->bf_desc;
150bb327d28SAdrian Chadd 		    i < n;
151bb327d28SAdrian Chadd 		    i++, ds += sc->sc_tx_desclen) {
152bb327d28SAdrian Chadd 			if_ath_alq_post(&sc->sc_alq,
153bb327d28SAdrian Chadd 			    ATH_ALQ_EDMA_TXDESC,
154bb327d28SAdrian Chadd 			    sc->sc_tx_desclen,
155bb327d28SAdrian Chadd 			    ds);
156bb327d28SAdrian Chadd 		}
157bb327d28SAdrian Chadd 		bf = bf->bf_next;
158bb327d28SAdrian Chadd 	}
159bb327d28SAdrian Chadd }
160bb327d28SAdrian Chadd #endif /* ATH_DEBUG_ALQ */
161bb327d28SAdrian Chadd 
162eb6f0de0SAdrian Chadd /*
16381a82688SAdrian Chadd  * Whether to use the 11n rate scenario functions or not
16481a82688SAdrian Chadd  */
16581a82688SAdrian Chadd static inline int
16681a82688SAdrian Chadd ath_tx_is_11n(struct ath_softc *sc)
16781a82688SAdrian Chadd {
1684ddf2cc3SAdrian Chadd 	return ((sc->sc_ah->ah_magic == 0x20065416) ||
1694ddf2cc3SAdrian Chadd 		    (sc->sc_ah->ah_magic == 0x19741014));
17081a82688SAdrian Chadd }
17181a82688SAdrian Chadd 
172eb6f0de0SAdrian Chadd /*
173eb6f0de0SAdrian Chadd  * Obtain the current TID from the given frame.
174eb6f0de0SAdrian Chadd  *
175eb6f0de0SAdrian Chadd  * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.)
176eb6f0de0SAdrian Chadd  * This has implications for which AC/priority the packet is placed
177eb6f0de0SAdrian Chadd  * in.
178eb6f0de0SAdrian Chadd  */
179eb6f0de0SAdrian Chadd static int
180eb6f0de0SAdrian Chadd ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
181eb6f0de0SAdrian Chadd {
182eb6f0de0SAdrian Chadd 	const struct ieee80211_frame *wh;
183eb6f0de0SAdrian Chadd 	int pri = M_WME_GETAC(m0);
184eb6f0de0SAdrian Chadd 
185eb6f0de0SAdrian Chadd 	wh = mtod(m0, const struct ieee80211_frame *);
186eb6f0de0SAdrian Chadd 	if (! IEEE80211_QOS_HAS_SEQ(wh))
187eb6f0de0SAdrian Chadd 		return IEEE80211_NONQOS_TID;
188eb6f0de0SAdrian Chadd 	else
189eb6f0de0SAdrian Chadd 		return WME_AC_TO_TID(pri);
190eb6f0de0SAdrian Chadd }
191eb6f0de0SAdrian Chadd 
192f1bc738eSAdrian Chadd static void
193f1bc738eSAdrian Chadd ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
194f1bc738eSAdrian Chadd {
195f1bc738eSAdrian Chadd 	struct ieee80211_frame *wh;
196f1bc738eSAdrian Chadd 
197f1bc738eSAdrian Chadd 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
198f1bc738eSAdrian Chadd 	/* Only update/resync if needed */
199f1bc738eSAdrian Chadd 	if (bf->bf_state.bfs_isretried == 0) {
200f1bc738eSAdrian Chadd 		wh->i_fc[1] |= IEEE80211_FC1_RETRY;
201f1bc738eSAdrian Chadd 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
202f1bc738eSAdrian Chadd 		    BUS_DMASYNC_PREWRITE);
203f1bc738eSAdrian Chadd 	}
204f1bc738eSAdrian Chadd 	bf->bf_state.bfs_isretried = 1;
205f1bc738eSAdrian Chadd 	bf->bf_state.bfs_retries ++;
206f1bc738eSAdrian Chadd }
207f1bc738eSAdrian Chadd 
208eb6f0de0SAdrian Chadd /*
209eb6f0de0SAdrian Chadd  * Determine what the correct AC queue for the given frame
210eb6f0de0SAdrian Chadd  * should be.
211eb6f0de0SAdrian Chadd  *
212eb6f0de0SAdrian Chadd  * This code assumes that the TIDs map consistently to
213eb6f0de0SAdrian Chadd  * the underlying hardware (or software) ath_txq.
214eb6f0de0SAdrian Chadd  * Since the sender may try to set an AC which is
215eb6f0de0SAdrian Chadd  * arbitrary, non-QoS TIDs may end up being put on
216eb6f0de0SAdrian Chadd  * completely different ACs. There's no way to put a
217eb6f0de0SAdrian Chadd  * TID into multiple ath_txq's for scheduling, so
218eb6f0de0SAdrian Chadd  * for now we override the AC/TXQ selection and set
219eb6f0de0SAdrian Chadd  * non-QOS TID frames into the BE queue.
220eb6f0de0SAdrian Chadd  *
221eb6f0de0SAdrian Chadd  * This may be completely incorrect - specifically,
222eb6f0de0SAdrian Chadd  * some management frames may end up out of order
223eb6f0de0SAdrian Chadd  * compared to the QoS traffic they're controlling.
224eb6f0de0SAdrian Chadd  * I'll look into this later.
225eb6f0de0SAdrian Chadd  */
226eb6f0de0SAdrian Chadd static int
227eb6f0de0SAdrian Chadd ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
228eb6f0de0SAdrian Chadd {
229eb6f0de0SAdrian Chadd 	const struct ieee80211_frame *wh;
230eb6f0de0SAdrian Chadd 	int pri = M_WME_GETAC(m0);
231eb6f0de0SAdrian Chadd 	wh = mtod(m0, const struct ieee80211_frame *);
232eb6f0de0SAdrian Chadd 	if (IEEE80211_QOS_HAS_SEQ(wh))
233eb6f0de0SAdrian Chadd 		return pri;
234eb6f0de0SAdrian Chadd 
2357403d1b9SAdrian Chadd 	return ATH_NONQOS_TID_AC;
236eb6f0de0SAdrian Chadd }
237eb6f0de0SAdrian Chadd 
238b8e788a5SAdrian Chadd void
239b8e788a5SAdrian Chadd ath_txfrag_cleanup(struct ath_softc *sc,
240b8e788a5SAdrian Chadd 	ath_bufhead *frags, struct ieee80211_node *ni)
241b8e788a5SAdrian Chadd {
242b8e788a5SAdrian Chadd 	struct ath_buf *bf, *next;
243b8e788a5SAdrian Chadd 
244b8e788a5SAdrian Chadd 	ATH_TXBUF_LOCK_ASSERT(sc);
245b8e788a5SAdrian Chadd 
2466b349e5aSAdrian Chadd 	TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
247b8e788a5SAdrian Chadd 		/* NB: bf assumed clean */
2486b349e5aSAdrian Chadd 		TAILQ_REMOVE(frags, bf, bf_list);
249e1a50456SAdrian Chadd 		ath_returnbuf_head(sc, bf);
250b8e788a5SAdrian Chadd 		ieee80211_node_decref(ni);
251b8e788a5SAdrian Chadd 	}
252b8e788a5SAdrian Chadd }
253b8e788a5SAdrian Chadd 
254b8e788a5SAdrian Chadd /*
255b8e788a5SAdrian Chadd  * Setup xmit of a fragmented frame.  Allocate a buffer
256b8e788a5SAdrian Chadd  * for each frag and bump the node reference count to
257b8e788a5SAdrian Chadd  * reflect the held reference to be setup by ath_tx_start.
258b8e788a5SAdrian Chadd  */
259b8e788a5SAdrian Chadd int
260b8e788a5SAdrian Chadd ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
261b8e788a5SAdrian Chadd 	struct mbuf *m0, struct ieee80211_node *ni)
262b8e788a5SAdrian Chadd {
263b8e788a5SAdrian Chadd 	struct mbuf *m;
264b8e788a5SAdrian Chadd 	struct ath_buf *bf;
265b8e788a5SAdrian Chadd 
266b8e788a5SAdrian Chadd 	ATH_TXBUF_LOCK(sc);
267b8e788a5SAdrian Chadd 	for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
268af33d486SAdrian Chadd 		/* XXX non-management? */
269af33d486SAdrian Chadd 		bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL);
270b8e788a5SAdrian Chadd 		if (bf == NULL) {	/* out of buffers, cleanup */
271b43facbfSAdrian Chadd 			device_printf(sc->sc_dev, "%s: no buffer?\n",
272b43facbfSAdrian Chadd 			    __func__);
273b8e788a5SAdrian Chadd 			ath_txfrag_cleanup(sc, frags, ni);
274b8e788a5SAdrian Chadd 			break;
275b8e788a5SAdrian Chadd 		}
276b8e788a5SAdrian Chadd 		ieee80211_node_incref(ni);
2776b349e5aSAdrian Chadd 		TAILQ_INSERT_TAIL(frags, bf, bf_list);
278b8e788a5SAdrian Chadd 	}
279b8e788a5SAdrian Chadd 	ATH_TXBUF_UNLOCK(sc);
280b8e788a5SAdrian Chadd 
2816b349e5aSAdrian Chadd 	return !TAILQ_EMPTY(frags);
282b8e788a5SAdrian Chadd }
283b8e788a5SAdrian Chadd 
284b8e788a5SAdrian Chadd /*
285b8e788a5SAdrian Chadd  * Reclaim mbuf resources.  For fragmented frames we
286b8e788a5SAdrian Chadd  * need to claim each frag chained with m_nextpkt.
287b8e788a5SAdrian Chadd  */
288b8e788a5SAdrian Chadd void
289b8e788a5SAdrian Chadd ath_freetx(struct mbuf *m)
290b8e788a5SAdrian Chadd {
291b8e788a5SAdrian Chadd 	struct mbuf *next;
292b8e788a5SAdrian Chadd 
293b8e788a5SAdrian Chadd 	do {
294b8e788a5SAdrian Chadd 		next = m->m_nextpkt;
295b8e788a5SAdrian Chadd 		m->m_nextpkt = NULL;
296b8e788a5SAdrian Chadd 		m_freem(m);
297b8e788a5SAdrian Chadd 	} while ((m = next) != NULL);
298b8e788a5SAdrian Chadd }
299b8e788a5SAdrian Chadd 
300b8e788a5SAdrian Chadd static int
301b8e788a5SAdrian Chadd ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
302b8e788a5SAdrian Chadd {
303b8e788a5SAdrian Chadd 	struct mbuf *m;
304b8e788a5SAdrian Chadd 	int error;
305b8e788a5SAdrian Chadd 
306b8e788a5SAdrian Chadd 	/*
307b8e788a5SAdrian Chadd 	 * Load the DMA map so any coalescing is done.  This
308b8e788a5SAdrian Chadd 	 * also calculates the number of descriptors we need.
309b8e788a5SAdrian Chadd 	 */
310b8e788a5SAdrian Chadd 	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
311b8e788a5SAdrian Chadd 				     bf->bf_segs, &bf->bf_nseg,
312b8e788a5SAdrian Chadd 				     BUS_DMA_NOWAIT);
313b8e788a5SAdrian Chadd 	if (error == EFBIG) {
314b8e788a5SAdrian Chadd 		/* XXX packet requires too many descriptors */
315b8e788a5SAdrian Chadd 		bf->bf_nseg = ATH_TXDESC+1;
316b8e788a5SAdrian Chadd 	} else if (error != 0) {
317b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_busdma++;
318b8e788a5SAdrian Chadd 		ath_freetx(m0);
319b8e788a5SAdrian Chadd 		return error;
320b8e788a5SAdrian Chadd 	}
321b8e788a5SAdrian Chadd 	/*
322b8e788a5SAdrian Chadd 	 * Discard null packets and check for packets that
323b8e788a5SAdrian Chadd 	 * require too many TX descriptors.  We try to convert
324b8e788a5SAdrian Chadd 	 * the latter to a cluster.
325b8e788a5SAdrian Chadd 	 */
326b8e788a5SAdrian Chadd 	if (bf->bf_nseg > ATH_TXDESC) {		/* too many desc's, linearize */
327b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_linear++;
328b8e788a5SAdrian Chadd 		m = m_collapse(m0, M_DONTWAIT, ATH_TXDESC);
329b8e788a5SAdrian Chadd 		if (m == NULL) {
330b8e788a5SAdrian Chadd 			ath_freetx(m0);
331b8e788a5SAdrian Chadd 			sc->sc_stats.ast_tx_nombuf++;
332b8e788a5SAdrian Chadd 			return ENOMEM;
333b8e788a5SAdrian Chadd 		}
334b8e788a5SAdrian Chadd 		m0 = m;
335b8e788a5SAdrian Chadd 		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
336b8e788a5SAdrian Chadd 					     bf->bf_segs, &bf->bf_nseg,
337b8e788a5SAdrian Chadd 					     BUS_DMA_NOWAIT);
338b8e788a5SAdrian Chadd 		if (error != 0) {
339b8e788a5SAdrian Chadd 			sc->sc_stats.ast_tx_busdma++;
340b8e788a5SAdrian Chadd 			ath_freetx(m0);
341b8e788a5SAdrian Chadd 			return error;
342b8e788a5SAdrian Chadd 		}
343b8e788a5SAdrian Chadd 		KASSERT(bf->bf_nseg <= ATH_TXDESC,
344b8e788a5SAdrian Chadd 		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
345b8e788a5SAdrian Chadd 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
346b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_nodata++;
347b8e788a5SAdrian Chadd 		ath_freetx(m0);
348b8e788a5SAdrian Chadd 		return EIO;
349b8e788a5SAdrian Chadd 	}
350b8e788a5SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
351b8e788a5SAdrian Chadd 		__func__, m0, m0->m_pkthdr.len);
352b8e788a5SAdrian Chadd 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
353b8e788a5SAdrian Chadd 	bf->bf_m = m0;
354b8e788a5SAdrian Chadd 
355b8e788a5SAdrian Chadd 	return 0;
356b8e788a5SAdrian Chadd }
357b8e788a5SAdrian Chadd 
3586edf1dc7SAdrian Chadd /*
3596e84772fSAdrian Chadd  * Chain together segments+descriptors for a frame - 11n or otherwise.
3606e84772fSAdrian Chadd  *
3616e84772fSAdrian Chadd  * For aggregates, this is called on each frame in the aggregate.
3626edf1dc7SAdrian Chadd  */
363b8e788a5SAdrian Chadd static void
3646e84772fSAdrian Chadd ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0,
3656e84772fSAdrian Chadd     struct ath_buf *bf, int is_aggr, int is_first_subframe,
3666e84772fSAdrian Chadd     int is_last_subframe)
367b8e788a5SAdrian Chadd {
368b8e788a5SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
3696e84772fSAdrian Chadd 	char *ds;
3702b200bb4SAdrian Chadd 	int i, bp, dsp;
37146634305SAdrian Chadd 	HAL_DMA_ADDR bufAddrList[4];
37246634305SAdrian Chadd 	uint32_t segLenList[4];
3732b200bb4SAdrian Chadd 	int numTxMaps = 1;
374e2137b86SAdrian Chadd 	int isFirstDesc = 1;
37579b52356SAdrian Chadd 	int qnum;
37646634305SAdrian Chadd 
3773d9b1596SAdrian Chadd 	/*
3783d9b1596SAdrian Chadd 	 * XXX There's txdma and txdma_mgmt; the descriptor
3793d9b1596SAdrian Chadd 	 * sizes must match.
3803d9b1596SAdrian Chadd 	 */
3813d9b1596SAdrian Chadd 	struct ath_descdma *dd = &sc->sc_txdma;
382b8e788a5SAdrian Chadd 
383b8e788a5SAdrian Chadd 	/*
384b8e788a5SAdrian Chadd 	 * Fillin the remainder of the descriptor info.
385b8e788a5SAdrian Chadd 	 */
38646634305SAdrian Chadd 
3872b200bb4SAdrian Chadd 	/*
3882b200bb4SAdrian Chadd 	 * For now the HAL doesn't implement halNumTxMaps for non-EDMA
3892b200bb4SAdrian Chadd 	 * (ie it's 0.)  So just work around it.
3902b200bb4SAdrian Chadd 	 *
3912b200bb4SAdrian Chadd 	 * XXX TODO: populate halNumTxMaps for each HAL chip and
3922b200bb4SAdrian Chadd 	 * then undo this hack.
3932b200bb4SAdrian Chadd 	 */
3942b200bb4SAdrian Chadd 	if (sc->sc_ah->ah_magic == 0x19741014)
3952b200bb4SAdrian Chadd 		numTxMaps = 4;
3962b200bb4SAdrian Chadd 
3972b200bb4SAdrian Chadd 	/*
3982b200bb4SAdrian Chadd 	 * For EDMA and later chips ensure the TX map is fully populated
3992b200bb4SAdrian Chadd 	 * before advancing to the next descriptor.
4002b200bb4SAdrian Chadd 	 */
4016e84772fSAdrian Chadd 	ds = (char *) bf->bf_desc;
4022b200bb4SAdrian Chadd 	bp = dsp = 0;
4032b200bb4SAdrian Chadd 	bzero(bufAddrList, sizeof(bufAddrList));
4042b200bb4SAdrian Chadd 	bzero(segLenList, sizeof(segLenList));
4052b200bb4SAdrian Chadd 	for (i = 0; i < bf->bf_nseg; i++) {
4062b200bb4SAdrian Chadd 		bufAddrList[bp] = bf->bf_segs[i].ds_addr;
4072b200bb4SAdrian Chadd 		segLenList[bp] = bf->bf_segs[i].ds_len;
4082b200bb4SAdrian Chadd 		bp++;
4092b200bb4SAdrian Chadd 
4102b200bb4SAdrian Chadd 		/*
4112b200bb4SAdrian Chadd 		 * Go to the next segment if this isn't the last segment
4122b200bb4SAdrian Chadd 		 * and there's space in the current TX map.
4132b200bb4SAdrian Chadd 		 */
4142b200bb4SAdrian Chadd 		if ((i != bf->bf_nseg - 1) && (bp < numTxMaps))
4152b200bb4SAdrian Chadd 			continue;
4162b200bb4SAdrian Chadd 
4172b200bb4SAdrian Chadd 		/*
4182b200bb4SAdrian Chadd 		 * Last segment or we're out of buffer pointers.
4192b200bb4SAdrian Chadd 		 */
4202b200bb4SAdrian Chadd 		bp = 0;
42146634305SAdrian Chadd 
422b8e788a5SAdrian Chadd 		if (i == bf->bf_nseg - 1)
42342083b3dSAdrian Chadd 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0);
424b8e788a5SAdrian Chadd 		else
42542083b3dSAdrian Chadd 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds,
4262b200bb4SAdrian Chadd 			    bf->bf_daddr + dd->dd_descsize * (dsp + 1));
42746634305SAdrian Chadd 
42846634305SAdrian Chadd 		/*
42946634305SAdrian Chadd 		 * XXX this assumes that bfs_txq is the actual destination
43046634305SAdrian Chadd 		 * hardware queue at this point.  It may not have been assigned,
43146634305SAdrian Chadd 		 * it may actually be pointing to the multicast software
43246634305SAdrian Chadd 		 * TXQ id.  These must be fixed!
43346634305SAdrian Chadd 		 */
43479b52356SAdrian Chadd 		qnum = bf->bf_state.bfs_txq->axq_qnum;
43579b52356SAdrian Chadd 
43642083b3dSAdrian Chadd 		ath_hal_filltxdesc(ah, (struct ath_desc *) ds
43746634305SAdrian Chadd 			, bufAddrList
43846634305SAdrian Chadd 			, segLenList
4392b200bb4SAdrian Chadd 			, bf->bf_descid		/* XXX desc id */
44079b52356SAdrian Chadd 			, qnum
441e2137b86SAdrian Chadd 			, isFirstDesc		/* first segment */
442b8e788a5SAdrian Chadd 			, i == bf->bf_nseg - 1	/* last segment */
44342083b3dSAdrian Chadd 			, (struct ath_desc *) ds0	/* first descriptor */
444b8e788a5SAdrian Chadd 		);
44521840808SAdrian Chadd 
4466e84772fSAdrian Chadd 		/*
4476e84772fSAdrian Chadd 		 * Make sure the 11n aggregate fields are cleared.
4486e84772fSAdrian Chadd 		 *
4496e84772fSAdrian Chadd 		 * XXX TODO: this doesn't need to be called for
4506e84772fSAdrian Chadd 		 * aggregate frames; as it'll be called on all
4516e84772fSAdrian Chadd 		 * sub-frames.  Since the descriptors are in
4526e84772fSAdrian Chadd 		 * non-cacheable memory, this leads to some
4536e84772fSAdrian Chadd 		 * rather slow writes on MIPS/ARM platforms.
4546e84772fSAdrian Chadd 		 */
45521840808SAdrian Chadd 		if (ath_tx_is_11n(sc))
4565d9b19f7SAdrian Chadd 			ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds);
45721840808SAdrian Chadd 
4586e84772fSAdrian Chadd 		/*
4596e84772fSAdrian Chadd 		 * If 11n is enabled, set it up as if it's an aggregate
4606e84772fSAdrian Chadd 		 * frame.
4616e84772fSAdrian Chadd 		 */
4626e84772fSAdrian Chadd 		if (is_last_subframe) {
4636e84772fSAdrian Chadd 			ath_hal_set11n_aggr_last(sc->sc_ah,
4646e84772fSAdrian Chadd 			    (struct ath_desc *) ds);
4656e84772fSAdrian Chadd 		} else if (is_aggr) {
4666e84772fSAdrian Chadd 			/*
4676e84772fSAdrian Chadd 			 * This clears the aggrlen field; so
4686e84772fSAdrian Chadd 			 * the caller needs to call set_aggr_first()!
4696e84772fSAdrian Chadd 			 *
4706e84772fSAdrian Chadd 			 * XXX TODO: don't call this for the first
4716e84772fSAdrian Chadd 			 * descriptor in the first frame in an
4726e84772fSAdrian Chadd 			 * aggregate!
4736e84772fSAdrian Chadd 			 */
4746e84772fSAdrian Chadd 			ath_hal_set11n_aggr_middle(sc->sc_ah,
4756e84772fSAdrian Chadd 			    (struct ath_desc *) ds,
4766e84772fSAdrian Chadd 			    bf->bf_state.bfs_ndelim);
4776e84772fSAdrian Chadd 		}
478e2137b86SAdrian Chadd 		isFirstDesc = 0;
4790f8423a2SAdrian Chadd #ifdef	ATH_DEBUG
48042083b3dSAdrian Chadd 		if (sc->sc_debug & ATH_DEBUG_XMIT)
48142083b3dSAdrian Chadd 			ath_printtxbuf(sc, bf, qnum, 0, 0);
4820f8423a2SAdrian Chadd #endif
48342083b3dSAdrian Chadd 		bf->bf_lastds = (struct ath_desc *) ds;
4842b200bb4SAdrian Chadd 
4852b200bb4SAdrian Chadd 		/*
4862b200bb4SAdrian Chadd 		 * Don't forget to skip to the next descriptor.
4872b200bb4SAdrian Chadd 		 */
48842083b3dSAdrian Chadd 		ds += sc->sc_tx_desclen;
4892b200bb4SAdrian Chadd 		dsp++;
4902b200bb4SAdrian Chadd 
4912b200bb4SAdrian Chadd 		/*
4922b200bb4SAdrian Chadd 		 * .. and don't forget to blank these out!
4932b200bb4SAdrian Chadd 		 */
4942b200bb4SAdrian Chadd 		bzero(bufAddrList, sizeof(bufAddrList));
4952b200bb4SAdrian Chadd 		bzero(segLenList, sizeof(segLenList));
496b8e788a5SAdrian Chadd 	}
4974d7f8837SAdrian Chadd 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
49881a82688SAdrian Chadd }
49981a82688SAdrian Chadd 
500eb6f0de0SAdrian Chadd /*
501d34a7347SAdrian Chadd  * Set the rate control fields in the given descriptor based on
502d34a7347SAdrian Chadd  * the bf_state fields and node state.
503d34a7347SAdrian Chadd  *
504d34a7347SAdrian Chadd  * The bfs fields should already be set with the relevant rate
505d34a7347SAdrian Chadd  * control information, including whether MRR is to be enabled.
506d34a7347SAdrian Chadd  *
507d34a7347SAdrian Chadd  * Since the FreeBSD HAL currently sets up the first TX rate
508d34a7347SAdrian Chadd  * in ath_hal_setuptxdesc(), this will setup the MRR
509d34a7347SAdrian Chadd  * conditionally for the pre-11n chips, and call ath_buf_set_rate
510d34a7347SAdrian Chadd  * unconditionally for 11n chips. These require the 11n rate
511d34a7347SAdrian Chadd  * scenario to be set if MCS rates are enabled, so it's easier
512d34a7347SAdrian Chadd  * to just always call it. The caller can then only set rates 2, 3
513d34a7347SAdrian Chadd  * and 4 if multi-rate retry is needed.
514d34a7347SAdrian Chadd  */
515d34a7347SAdrian Chadd static void
516d34a7347SAdrian Chadd ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
517d34a7347SAdrian Chadd     struct ath_buf *bf)
518d34a7347SAdrian Chadd {
519d34a7347SAdrian Chadd 	struct ath_rc_series *rc = bf->bf_state.bfs_rc;
520d34a7347SAdrian Chadd 
521d34a7347SAdrian Chadd 	/* If mrr is disabled, blank tries 1, 2, 3 */
522d34a7347SAdrian Chadd 	if (! bf->bf_state.bfs_ismrr)
523d34a7347SAdrian Chadd 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
524d34a7347SAdrian Chadd 
525491e1248SAdrian Chadd #if 0
526491e1248SAdrian Chadd 	/*
527491e1248SAdrian Chadd 	 * If NOACK is set, just set ntries=1.
528491e1248SAdrian Chadd 	 */
529491e1248SAdrian Chadd 	else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) {
530491e1248SAdrian Chadd 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
531491e1248SAdrian Chadd 		rc[0].tries = 1;
532491e1248SAdrian Chadd 	}
533491e1248SAdrian Chadd #endif
534491e1248SAdrian Chadd 
535d34a7347SAdrian Chadd 	/*
536d34a7347SAdrian Chadd 	 * Always call - that way a retried descriptor will
537d34a7347SAdrian Chadd 	 * have the MRR fields overwritten.
538d34a7347SAdrian Chadd 	 *
539d34a7347SAdrian Chadd 	 * XXX TODO: see if this is really needed - setting up
540d34a7347SAdrian Chadd 	 * the first descriptor should set the MRR fields to 0
541d34a7347SAdrian Chadd 	 * for us anyway.
542d34a7347SAdrian Chadd 	 */
543d34a7347SAdrian Chadd 	if (ath_tx_is_11n(sc)) {
544d34a7347SAdrian Chadd 		ath_buf_set_rate(sc, ni, bf);
545d34a7347SAdrian Chadd 	} else {
546d34a7347SAdrian Chadd 		ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
547d34a7347SAdrian Chadd 			, rc[1].ratecode, rc[1].tries
548d34a7347SAdrian Chadd 			, rc[2].ratecode, rc[2].tries
549d34a7347SAdrian Chadd 			, rc[3].ratecode, rc[3].tries
550d34a7347SAdrian Chadd 		);
551d34a7347SAdrian Chadd 	}
552d34a7347SAdrian Chadd }
553d34a7347SAdrian Chadd 
554d34a7347SAdrian Chadd /*
555eb6f0de0SAdrian Chadd  * Setup segments+descriptors for an 11n aggregate.
556eb6f0de0SAdrian Chadd  * bf_first is the first buffer in the aggregate.
557eb6f0de0SAdrian Chadd  * The descriptor list must already been linked together using
558eb6f0de0SAdrian Chadd  * bf->bf_next.
559eb6f0de0SAdrian Chadd  */
560eb6f0de0SAdrian Chadd static void
561eb6f0de0SAdrian Chadd ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
562eb6f0de0SAdrian Chadd {
563eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_prev = NULL;
5646e84772fSAdrian Chadd 	struct ath_desc *ds0 = bf_first->bf_desc;
565eb6f0de0SAdrian Chadd 
566eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
567eb6f0de0SAdrian Chadd 	    __func__, bf_first->bf_state.bfs_nframes,
568eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_al);
569eb6f0de0SAdrian Chadd 
5707d9dd2acSAdrian Chadd 	bf = bf_first;
5717d9dd2acSAdrian Chadd 
5727d9dd2acSAdrian Chadd 	if (bf->bf_state.bfs_txrate0 == 0)
5737d9dd2acSAdrian Chadd 		device_printf(sc->sc_dev, "%s: bf=%p, txrate0=%d\n",
5747d9dd2acSAdrian Chadd 		    __func__, bf, 0);
5757d9dd2acSAdrian Chadd 	if (bf->bf_state.bfs_rc[0].ratecode == 0)
5767d9dd2acSAdrian Chadd 		device_printf(sc->sc_dev, "%s: bf=%p, rix0=%d\n",
5777d9dd2acSAdrian Chadd 		    __func__, bf, 0);
5787d9dd2acSAdrian Chadd 
579eb6f0de0SAdrian Chadd 	/*
5806e84772fSAdrian Chadd 	 * Setup all descriptors of all subframes - this will
5816e84772fSAdrian Chadd 	 * call ath_hal_set11naggrmiddle() on every frame.
582eb6f0de0SAdrian Chadd 	 */
583eb6f0de0SAdrian Chadd 	while (bf != NULL) {
584eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
585eb6f0de0SAdrian Chadd 		    "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
586eb6f0de0SAdrian Chadd 		    __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
587eb6f0de0SAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno));
588eb6f0de0SAdrian Chadd 
5896e84772fSAdrian Chadd 		/*
5906e84772fSAdrian Chadd 		 * Setup the initial fields for the first descriptor - all
5916e84772fSAdrian Chadd 		 * the non-11n specific stuff.
5926e84772fSAdrian Chadd 		 */
5936e84772fSAdrian Chadd 		ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc
5946e84772fSAdrian Chadd 			, bf->bf_state.bfs_pktlen	/* packet length */
5956e84772fSAdrian Chadd 			, bf->bf_state.bfs_hdrlen	/* header length */
5966e84772fSAdrian Chadd 			, bf->bf_state.bfs_atype	/* Atheros packet type */
5976e84772fSAdrian Chadd 			, bf->bf_state.bfs_txpower	/* txpower */
5986e84772fSAdrian Chadd 			, bf->bf_state.bfs_txrate0
5996e84772fSAdrian Chadd 			, bf->bf_state.bfs_try0		/* series 0 rate/tries */
6006e84772fSAdrian Chadd 			, bf->bf_state.bfs_keyix	/* key cache index */
6016e84772fSAdrian Chadd 			, bf->bf_state.bfs_txantenna	/* antenna mode */
6026e84772fSAdrian Chadd 			, bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ	/* flags */
6036e84772fSAdrian Chadd 			, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
6046e84772fSAdrian Chadd 			, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
6056e84772fSAdrian Chadd 		);
6066e84772fSAdrian Chadd 
6076e84772fSAdrian Chadd 		/*
6086e84772fSAdrian Chadd 		 * First descriptor? Setup the rate control and initial
6096e84772fSAdrian Chadd 		 * aggregate header information.
6106e84772fSAdrian Chadd 		 */
6116e84772fSAdrian Chadd 		if (bf == bf_first) {
6126e84772fSAdrian Chadd 			/*
6136e84772fSAdrian Chadd 			 * setup first desc with rate and aggr info
6146e84772fSAdrian Chadd 			 */
6156e84772fSAdrian Chadd 			ath_tx_set_ratectrl(sc, bf->bf_node, bf);
6166e84772fSAdrian Chadd 		}
6176e84772fSAdrian Chadd 
6186e84772fSAdrian Chadd 		/*
6196e84772fSAdrian Chadd 		 * Setup the descriptors for a multi-descriptor frame.
6206e84772fSAdrian Chadd 		 * This is both aggregate and non-aggregate aware.
6216e84772fSAdrian Chadd 		 */
6226e84772fSAdrian Chadd 		ath_tx_chaindesclist(sc, ds0, bf,
6236e84772fSAdrian Chadd 		    1, /* is_aggr */
6246e84772fSAdrian Chadd 		    !! (bf == bf_first), /* is_first_subframe */
6256e84772fSAdrian Chadd 		    !! (bf->bf_next == NULL) /* is_last_subframe */
6266e84772fSAdrian Chadd 		    );
6276e84772fSAdrian Chadd 
6286e84772fSAdrian Chadd 		if (bf == bf_first) {
6296e84772fSAdrian Chadd 			/*
6306e84772fSAdrian Chadd 			 * Initialise the first 11n aggregate with the
6316e84772fSAdrian Chadd 			 * aggregate length and aggregate enable bits.
6326e84772fSAdrian Chadd 			 */
6336e84772fSAdrian Chadd 			ath_hal_set11n_aggr_first(sc->sc_ah,
6346e84772fSAdrian Chadd 			    ds0,
6356e84772fSAdrian Chadd 			    bf->bf_state.bfs_al,
6366e84772fSAdrian Chadd 			    bf->bf_state.bfs_ndelim);
6376e84772fSAdrian Chadd 		}
638eb6f0de0SAdrian Chadd 
639eb6f0de0SAdrian Chadd 		/*
640eb6f0de0SAdrian Chadd 		 * Link the last descriptor of the previous frame
641eb6f0de0SAdrian Chadd 		 * to the beginning descriptor of this frame.
642eb6f0de0SAdrian Chadd 		 */
643eb6f0de0SAdrian Chadd 		if (bf_prev != NULL)
644bb069955SAdrian Chadd 			ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds,
645bb069955SAdrian Chadd 			    bf->bf_daddr);
646eb6f0de0SAdrian Chadd 
647eb6f0de0SAdrian Chadd 		/* Save a copy so we can link the next descriptor in */
648eb6f0de0SAdrian Chadd 		bf_prev = bf;
649eb6f0de0SAdrian Chadd 		bf = bf->bf_next;
650eb6f0de0SAdrian Chadd 	}
651eb6f0de0SAdrian Chadd 
652eb6f0de0SAdrian Chadd 	/*
653eb6f0de0SAdrian Chadd 	 * Set the first descriptor bf_lastds field to point to
654eb6f0de0SAdrian Chadd 	 * the last descriptor in the last subframe, that's where
655eb6f0de0SAdrian Chadd 	 * the status update will occur.
656eb6f0de0SAdrian Chadd 	 */
657eb6f0de0SAdrian Chadd 	bf_first->bf_lastds = bf_prev->bf_lastds;
658eb6f0de0SAdrian Chadd 
659eb6f0de0SAdrian Chadd 	/*
660eb6f0de0SAdrian Chadd 	 * And bf_last in the first descriptor points to the end of
661eb6f0de0SAdrian Chadd 	 * the aggregate list.
662eb6f0de0SAdrian Chadd 	 */
663eb6f0de0SAdrian Chadd 	bf_first->bf_last = bf_prev;
664eb6f0de0SAdrian Chadd 
665bbdf3df1SAdrian Chadd 	/*
666bbdf3df1SAdrian Chadd 	 * For non-AR9300 NICs, which require the rate control
667bbdf3df1SAdrian Chadd 	 * in the final descriptor - let's set that up now.
668bbdf3df1SAdrian Chadd 	 *
669bbdf3df1SAdrian Chadd 	 * This is because the filltxdesc() HAL call doesn't
670bbdf3df1SAdrian Chadd 	 * populate the last segment with rate control information
671bbdf3df1SAdrian Chadd 	 * if firstSeg is also true.  For non-aggregate frames
672bbdf3df1SAdrian Chadd 	 * that is fine, as the first frame already has rate control
673bbdf3df1SAdrian Chadd 	 * info.  But if the last frame in an aggregate has one
674bbdf3df1SAdrian Chadd 	 * descriptor, both firstseg and lastseg will be true and
675bbdf3df1SAdrian Chadd 	 * the rate info isn't copied.
676bbdf3df1SAdrian Chadd 	 *
677bbdf3df1SAdrian Chadd 	 * This is inefficient on MIPS/ARM platforms that have
678bbdf3df1SAdrian Chadd 	 * non-cachable memory for TX descriptors, but we'll just
679bbdf3df1SAdrian Chadd 	 * make do for now.
680bbdf3df1SAdrian Chadd 	 *
681bbdf3df1SAdrian Chadd 	 * As to why the rate table is stashed in the last descriptor
682bbdf3df1SAdrian Chadd 	 * rather than the first descriptor?  Because proctxdesc()
683bbdf3df1SAdrian Chadd 	 * is called on the final descriptor in an MPDU or A-MPDU -
684bbdf3df1SAdrian Chadd 	 * ie, the one that gets updated by the hardware upon
685bbdf3df1SAdrian Chadd 	 * completion.  That way proctxdesc() doesn't need to know
686bbdf3df1SAdrian Chadd 	 * about the first _and_ last TX descriptor.
687bbdf3df1SAdrian Chadd 	 */
688bbdf3df1SAdrian Chadd 	ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0);
689bbdf3df1SAdrian Chadd 
690eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
691eb6f0de0SAdrian Chadd }
692eb6f0de0SAdrian Chadd 
69346634305SAdrian Chadd /*
69446634305SAdrian Chadd  * Hand-off a frame to the multicast TX queue.
69546634305SAdrian Chadd  *
69646634305SAdrian Chadd  * This is a software TXQ which will be appended to the CAB queue
69746634305SAdrian Chadd  * during the beacon setup code.
69846634305SAdrian Chadd  *
69946634305SAdrian Chadd  * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID
70046634305SAdrian Chadd  * as part of the TX descriptor, bf_state.bfs_txq must be updated
70146634305SAdrian Chadd  * with the actual hardware txq, or all of this will fall apart.
70246634305SAdrian Chadd  *
70346634305SAdrian Chadd  * XXX It may not be a bad idea to just stuff the QCU ID into bf_state
70446634305SAdrian Chadd  * and retire bfs_txq; then make sure the CABQ QCU ID is populated
70546634305SAdrian Chadd  * correctly.
70646634305SAdrian Chadd  */
707eb6f0de0SAdrian Chadd static void
708eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
709eb6f0de0SAdrian Chadd     struct ath_buf *bf)
710eb6f0de0SAdrian Chadd {
711375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
712375307d4SAdrian Chadd 
713eb6f0de0SAdrian Chadd 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
714eb6f0de0SAdrian Chadd 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
715eb6f0de0SAdrian Chadd 	if (txq->axq_link != NULL) {
716eb6f0de0SAdrian Chadd 		struct ath_buf *last = ATH_TXQ_LAST(txq, axq_q_s);
717eb6f0de0SAdrian Chadd 		struct ieee80211_frame *wh;
718eb6f0de0SAdrian Chadd 
719eb6f0de0SAdrian Chadd 		/* mark previous frame */
720eb6f0de0SAdrian Chadd 		wh = mtod(last->bf_m, struct ieee80211_frame *);
721eb6f0de0SAdrian Chadd 		wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
722eb6f0de0SAdrian Chadd 		bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap,
723eb6f0de0SAdrian Chadd 		    BUS_DMASYNC_PREWRITE);
724eb6f0de0SAdrian Chadd 
725eb6f0de0SAdrian Chadd 		/* link descriptor */
726eb6f0de0SAdrian Chadd 		*txq->axq_link = bf->bf_daddr;
727eb6f0de0SAdrian Chadd 	}
728eb6f0de0SAdrian Chadd 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
729bb069955SAdrian Chadd 	ath_hal_gettxdesclinkptr(sc->sc_ah, bf->bf_lastds, &txq->axq_link);
730eb6f0de0SAdrian Chadd }
731eb6f0de0SAdrian Chadd 
732eb6f0de0SAdrian Chadd /*
733eb6f0de0SAdrian Chadd  * Hand-off packet to a hardware queue.
734eb6f0de0SAdrian Chadd  */
735eb6f0de0SAdrian Chadd static void
736d4365d16SAdrian Chadd ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
737d4365d16SAdrian Chadd     struct ath_buf *bf)
738eb6f0de0SAdrian Chadd {
739eb6f0de0SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
74081a82688SAdrian Chadd 
741b8e788a5SAdrian Chadd 	/*
742b8e788a5SAdrian Chadd 	 * Insert the frame on the outbound list and pass it on
743b8e788a5SAdrian Chadd 	 * to the hardware.  Multicast frames buffered for power
744b8e788a5SAdrian Chadd 	 * save stations and transmit from the CAB queue are stored
745b8e788a5SAdrian Chadd 	 * on a s/w only queue and loaded on to the CAB queue in
746b8e788a5SAdrian Chadd 	 * the SWBA handler since frames only go out on DTIM and
747b8e788a5SAdrian Chadd 	 * to avoid possible races.
748b8e788a5SAdrian Chadd 	 */
749375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
750b8e788a5SAdrian Chadd 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
751eb6f0de0SAdrian Chadd 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
752eb6f0de0SAdrian Chadd 	KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
753eb6f0de0SAdrian Chadd 	     ("ath_tx_handoff_hw called for mcast queue"));
754eb6f0de0SAdrian Chadd 
755ef27340cSAdrian Chadd #if 0
756ef27340cSAdrian Chadd 	/*
757ef27340cSAdrian Chadd 	 * This causes a LOR. Find out where the PCU lock is being
758ef27340cSAdrian Chadd 	 * held whilst the TXQ lock is grabbed - that shouldn't
759ef27340cSAdrian Chadd 	 * be occuring.
760ef27340cSAdrian Chadd 	 */
761ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
762ef27340cSAdrian Chadd 	if (sc->sc_inreset_cnt) {
763ef27340cSAdrian Chadd 		ATH_PCU_UNLOCK(sc);
764ef27340cSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_RESET,
765ef27340cSAdrian Chadd 		    "%s: called with sc_in_reset != 0\n",
766ef27340cSAdrian Chadd 		    __func__);
767ef27340cSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_XMIT,
768ef27340cSAdrian Chadd 		    "%s: queued: TXDP[%u] = %p (%p) depth %d\n",
769ef27340cSAdrian Chadd 		    __func__, txq->axq_qnum,
770ef27340cSAdrian Chadd 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
771ef27340cSAdrian Chadd 		    txq->axq_depth);
772ef27340cSAdrian Chadd 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
773ef27340cSAdrian Chadd 		if (bf->bf_state.bfs_aggr)
774ef27340cSAdrian Chadd 			txq->axq_aggr_depth++;
775ef27340cSAdrian Chadd 		/*
776ef27340cSAdrian Chadd 		 * There's no need to update axq_link; the hardware
777ef27340cSAdrian Chadd 		 * is in reset and once the reset is complete, any
778ef27340cSAdrian Chadd 		 * non-empty queues will simply have DMA restarted.
779ef27340cSAdrian Chadd 		 */
780ef27340cSAdrian Chadd 		return;
781ef27340cSAdrian Chadd 		}
782ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
783ef27340cSAdrian Chadd #endif
784ef27340cSAdrian Chadd 
785eb6f0de0SAdrian Chadd 	/* For now, so not to generate whitespace diffs */
786eb6f0de0SAdrian Chadd 	if (1) {
787b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
788b8e788a5SAdrian Chadd 		int qbusy;
789b8e788a5SAdrian Chadd 
790b8e788a5SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
791b8e788a5SAdrian Chadd 		qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
79203682514SAdrian Chadd 
79303682514SAdrian Chadd 		ATH_KTR(sc, ATH_KTR_TX, 4,
79403682514SAdrian Chadd 		    "ath_tx_handoff: txq=%u, add bf=%p, qbusy=%d, depth=%d",
79503682514SAdrian Chadd 		    txq->axq_qnum, bf, qbusy, txq->axq_depth);
796b8e788a5SAdrian Chadd 		if (txq->axq_link == NULL) {
797b8e788a5SAdrian Chadd 			/*
798b8e788a5SAdrian Chadd 			 * Be careful writing the address to TXDP.  If
799b8e788a5SAdrian Chadd 			 * the tx q is enabled then this write will be
800b8e788a5SAdrian Chadd 			 * ignored.  Normally this is not an issue but
801b8e788a5SAdrian Chadd 			 * when tdma is in use and the q is beacon gated
802b8e788a5SAdrian Chadd 			 * this race can occur.  If the q is busy then
803b8e788a5SAdrian Chadd 			 * defer the work to later--either when another
804b8e788a5SAdrian Chadd 			 * packet comes along or when we prepare a beacon
805b8e788a5SAdrian Chadd 			 * frame at SWBA.
806b8e788a5SAdrian Chadd 			 */
807b8e788a5SAdrian Chadd 			if (!qbusy) {
808d4365d16SAdrian Chadd 				ath_hal_puttxbuf(ah, txq->axq_qnum,
809d4365d16SAdrian Chadd 				    bf->bf_daddr);
810b8e788a5SAdrian Chadd 				txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
811b8e788a5SAdrian Chadd 				DPRINTF(sc, ATH_DEBUG_XMIT,
81203682514SAdrian Chadd 				    "%s: TXDP[%u] = %p (%p) lastds=%p depth %d\n",
813b8e788a5SAdrian Chadd 				    __func__, txq->axq_qnum,
814b8e788a5SAdrian Chadd 				    (caddr_t)bf->bf_daddr, bf->bf_desc,
81503682514SAdrian Chadd 				    bf->bf_lastds,
81603682514SAdrian Chadd 				    txq->axq_depth);
81703682514SAdrian Chadd 				ATH_KTR(sc, ATH_KTR_TX, 5,
81803682514SAdrian Chadd 				    "ath_tx_handoff: TXDP[%u] = %p (%p) "
81903682514SAdrian Chadd 				    "lastds=%p depth %d",
82003682514SAdrian Chadd 				    txq->axq_qnum,
82103682514SAdrian Chadd 				    (caddr_t)bf->bf_daddr, bf->bf_desc,
82203682514SAdrian Chadd 				    bf->bf_lastds,
823b8e788a5SAdrian Chadd 				    txq->axq_depth);
824b8e788a5SAdrian Chadd 			} else {
825b8e788a5SAdrian Chadd 				txq->axq_flags |= ATH_TXQ_PUTPENDING;
826b8e788a5SAdrian Chadd 				DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
827b8e788a5SAdrian Chadd 				    "%s: Q%u busy, defer enable\n", __func__,
828b8e788a5SAdrian Chadd 				    txq->axq_qnum);
82903682514SAdrian Chadd 				ATH_KTR(sc, ATH_KTR_TX, 0, "defer enable");
830b8e788a5SAdrian Chadd 			}
831b8e788a5SAdrian Chadd 		} else {
832b8e788a5SAdrian Chadd 			*txq->axq_link = bf->bf_daddr;
833b8e788a5SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_XMIT,
834b8e788a5SAdrian Chadd 			    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
835b8e788a5SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
836d4365d16SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
837d4365d16SAdrian Chadd 			    txq->axq_depth);
83803682514SAdrian Chadd 			ATH_KTR(sc, ATH_KTR_TX, 5,
83903682514SAdrian Chadd 			    "ath_tx_handoff: link[%u](%p)=%p (%p) lastds=%p",
84003682514SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
84103682514SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
84203682514SAdrian Chadd 			    bf->bf_lastds);
84303682514SAdrian Chadd 
844b8e788a5SAdrian Chadd 			if ((txq->axq_flags & ATH_TXQ_PUTPENDING) && !qbusy) {
845b8e788a5SAdrian Chadd 				/*
846b8e788a5SAdrian Chadd 				 * The q was busy when we previously tried
847b8e788a5SAdrian Chadd 				 * to write the address of the first buffer
848b8e788a5SAdrian Chadd 				 * in the chain.  Since it's not busy now
849b8e788a5SAdrian Chadd 				 * handle this chore.  We are certain the
850b8e788a5SAdrian Chadd 				 * buffer at the front is the right one since
851b8e788a5SAdrian Chadd 				 * axq_link is NULL only when the buffer list
852b8e788a5SAdrian Chadd 				 * is/was empty.
853b8e788a5SAdrian Chadd 				 */
854b8e788a5SAdrian Chadd 				ath_hal_puttxbuf(ah, txq->axq_qnum,
8556b349e5aSAdrian Chadd 					TAILQ_FIRST(&txq->axq_q)->bf_daddr);
856b8e788a5SAdrian Chadd 				txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
857b8e788a5SAdrian Chadd 				DPRINTF(sc, ATH_DEBUG_TDMA | ATH_DEBUG_XMIT,
858b8e788a5SAdrian Chadd 				    "%s: Q%u restarted\n", __func__,
859b8e788a5SAdrian Chadd 				    txq->axq_qnum);
86003682514SAdrian Chadd 				ATH_KTR(sc, ATH_KTR_TX, 4,
86103682514SAdrian Chadd 				  "ath_tx_handoff: txq[%d] restarted, bf=%p "
86203682514SAdrian Chadd 				  "daddr=%p ds=%p",
86303682514SAdrian Chadd 				    txq->axq_qnum,
86403682514SAdrian Chadd 				    bf,
86503682514SAdrian Chadd 				    (caddr_t)bf->bf_daddr,
86603682514SAdrian Chadd 				    bf->bf_desc);
867b8e788a5SAdrian Chadd 			}
868b8e788a5SAdrian Chadd 		}
869b8e788a5SAdrian Chadd #else
870b8e788a5SAdrian Chadd 		ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
871b1dddc28SAdrian Chadd 		ATH_KTR(sc, ATH_KTR_TX, 3,
872b1dddc28SAdrian Chadd 		    "ath_tx_handoff: non-tdma: txq=%u, add bf=%p "
87303682514SAdrian Chadd 		    "depth=%d",
87403682514SAdrian Chadd 		    txq->axq_qnum,
87503682514SAdrian Chadd 		    bf,
87603682514SAdrian Chadd 		    txq->axq_depth);
877b8e788a5SAdrian Chadd 		if (txq->axq_link == NULL) {
878b8e788a5SAdrian Chadd 			ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
879b8e788a5SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_XMIT,
880b8e788a5SAdrian Chadd 			    "%s: TXDP[%u] = %p (%p) depth %d\n",
881b8e788a5SAdrian Chadd 			    __func__, txq->axq_qnum,
882b8e788a5SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
883b8e788a5SAdrian Chadd 			    txq->axq_depth);
88403682514SAdrian Chadd 			ATH_KTR(sc, ATH_KTR_TX, 5,
88503682514SAdrian Chadd 			    "ath_tx_handoff: non-tdma: TXDP[%u] = %p (%p) "
88603682514SAdrian Chadd 			    "lastds=%p depth %d",
88703682514SAdrian Chadd 			    txq->axq_qnum,
88803682514SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
88903682514SAdrian Chadd 			    bf->bf_lastds,
89003682514SAdrian Chadd 			    txq->axq_depth);
89103682514SAdrian Chadd 
892b8e788a5SAdrian Chadd 		} else {
893b8e788a5SAdrian Chadd 			*txq->axq_link = bf->bf_daddr;
894b8e788a5SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_XMIT,
895b8e788a5SAdrian Chadd 			    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
896b8e788a5SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
897d4365d16SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
898d4365d16SAdrian Chadd 			    txq->axq_depth);
89903682514SAdrian Chadd 			ATH_KTR(sc, ATH_KTR_TX, 5,
90003682514SAdrian Chadd 			    "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) "
90103682514SAdrian Chadd 			    "lastds=%d",
90203682514SAdrian Chadd 			    txq->axq_qnum, txq->axq_link,
90303682514SAdrian Chadd 			    (caddr_t)bf->bf_daddr, bf->bf_desc,
90403682514SAdrian Chadd 			    bf->bf_lastds);
90503682514SAdrian Chadd 
906b8e788a5SAdrian Chadd 		}
907b8e788a5SAdrian Chadd #endif /* IEEE80211_SUPPORT_TDMA */
9086edf1dc7SAdrian Chadd 		if (bf->bf_state.bfs_aggr)
9096edf1dc7SAdrian Chadd 			txq->axq_aggr_depth++;
910bb069955SAdrian Chadd 		ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link);
911b8e788a5SAdrian Chadd 		ath_hal_txstart(ah, txq->axq_qnum);
91203682514SAdrian Chadd 		ATH_KTR(sc, ATH_KTR_TX, 1,
91303682514SAdrian Chadd 		    "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum);
914b8e788a5SAdrian Chadd 	}
915b8e788a5SAdrian Chadd }
916eb6f0de0SAdrian Chadd 
917eb6f0de0SAdrian Chadd /*
918eb6f0de0SAdrian Chadd  * Restart TX DMA for the given TXQ.
919eb6f0de0SAdrian Chadd  *
920eb6f0de0SAdrian Chadd  * This must be called whether the queue is empty or not.
921eb6f0de0SAdrian Chadd  */
922746bab5bSAdrian Chadd static void
923746bab5bSAdrian Chadd ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
924eb6f0de0SAdrian Chadd {
925eb6f0de0SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
926b1f3262cSAdrian Chadd 	struct ath_buf *bf, *bf_last;
927eb6f0de0SAdrian Chadd 
928375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
929eb6f0de0SAdrian Chadd 
930eb6f0de0SAdrian Chadd 	/* This is always going to be cleared, empty or not */
931eb6f0de0SAdrian Chadd 	txq->axq_flags &= ~ATH_TXQ_PUTPENDING;
932eb6f0de0SAdrian Chadd 
933b1f3262cSAdrian Chadd 	/* XXX make this ATH_TXQ_FIRST */
934eb6f0de0SAdrian Chadd 	bf = TAILQ_FIRST(&txq->axq_q);
935b1f3262cSAdrian Chadd 	bf_last = ATH_TXQ_LAST(txq, axq_q_s);
936b1f3262cSAdrian Chadd 
937eb6f0de0SAdrian Chadd 	if (bf == NULL)
938eb6f0de0SAdrian Chadd 		return;
939eb6f0de0SAdrian Chadd 
940eb6f0de0SAdrian Chadd 	ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
941d2da5544SAdrian Chadd 	ath_hal_gettxdesclinkptr(ah, bf_last->bf_lastds, &txq->axq_link);
942eb6f0de0SAdrian Chadd 	ath_hal_txstart(ah, txq->axq_qnum);
943eb6f0de0SAdrian Chadd }
944eb6f0de0SAdrian Chadd 
945eb6f0de0SAdrian Chadd /*
946eb6f0de0SAdrian Chadd  * Hand off a packet to the hardware (or mcast queue.)
947eb6f0de0SAdrian Chadd  *
948eb6f0de0SAdrian Chadd  * The relevant hardware txq should be locked.
949eb6f0de0SAdrian Chadd  */
950eb6f0de0SAdrian Chadd static void
951746bab5bSAdrian Chadd ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
952746bab5bSAdrian Chadd     struct ath_buf *bf)
953eb6f0de0SAdrian Chadd {
954375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
955eb6f0de0SAdrian Chadd 
956bb327d28SAdrian Chadd #ifdef	ATH_DEBUG_ALQ
957bb327d28SAdrian Chadd 	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC))
958bb327d28SAdrian Chadd 		ath_tx_alq_post(sc, bf);
959bb327d28SAdrian Chadd #endif
960bb327d28SAdrian Chadd 
961eb6f0de0SAdrian Chadd 	if (txq->axq_qnum == ATH_TXQ_SWQ)
962eb6f0de0SAdrian Chadd 		ath_tx_handoff_mcast(sc, txq, bf);
963eb6f0de0SAdrian Chadd 	else
964eb6f0de0SAdrian Chadd 		ath_tx_handoff_hw(sc, txq, bf);
965b8e788a5SAdrian Chadd }
966b8e788a5SAdrian Chadd 
96781a82688SAdrian Chadd static int
96881a82688SAdrian Chadd ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
969d4365d16SAdrian Chadd     struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
970d4365d16SAdrian Chadd     int *keyix)
97181a82688SAdrian Chadd {
97212be5b9cSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_XMIT,
97312be5b9cSAdrian Chadd 	    "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
97412be5b9cSAdrian Chadd 	    __func__,
97512be5b9cSAdrian Chadd 	    *hdrlen,
97612be5b9cSAdrian Chadd 	    *pktlen,
97712be5b9cSAdrian Chadd 	    isfrag,
97812be5b9cSAdrian Chadd 	    iswep,
97912be5b9cSAdrian Chadd 	    m0);
98012be5b9cSAdrian Chadd 
98181a82688SAdrian Chadd 	if (iswep) {
98281a82688SAdrian Chadd 		const struct ieee80211_cipher *cip;
98381a82688SAdrian Chadd 		struct ieee80211_key *k;
98481a82688SAdrian Chadd 
98581a82688SAdrian Chadd 		/*
98681a82688SAdrian Chadd 		 * Construct the 802.11 header+trailer for an encrypted
98781a82688SAdrian Chadd 		 * frame. The only reason this can fail is because of an
98881a82688SAdrian Chadd 		 * unknown or unsupported cipher/key type.
98981a82688SAdrian Chadd 		 */
99081a82688SAdrian Chadd 		k = ieee80211_crypto_encap(ni, m0);
99181a82688SAdrian Chadd 		if (k == NULL) {
99281a82688SAdrian Chadd 			/*
99381a82688SAdrian Chadd 			 * This can happen when the key is yanked after the
99481a82688SAdrian Chadd 			 * frame was queued.  Just discard the frame; the
99581a82688SAdrian Chadd 			 * 802.11 layer counts failures and provides
99681a82688SAdrian Chadd 			 * debugging/diagnostics.
99781a82688SAdrian Chadd 			 */
998d4365d16SAdrian Chadd 			return (0);
99981a82688SAdrian Chadd 		}
100081a82688SAdrian Chadd 		/*
100181a82688SAdrian Chadd 		 * Adjust the packet + header lengths for the crypto
100281a82688SAdrian Chadd 		 * additions and calculate the h/w key index.  When
100381a82688SAdrian Chadd 		 * a s/w mic is done the frame will have had any mic
100481a82688SAdrian Chadd 		 * added to it prior to entry so m0->m_pkthdr.len will
100581a82688SAdrian Chadd 		 * account for it. Otherwise we need to add it to the
100681a82688SAdrian Chadd 		 * packet length.
100781a82688SAdrian Chadd 		 */
100881a82688SAdrian Chadd 		cip = k->wk_cipher;
100981a82688SAdrian Chadd 		(*hdrlen) += cip->ic_header;
101081a82688SAdrian Chadd 		(*pktlen) += cip->ic_header + cip->ic_trailer;
101181a82688SAdrian Chadd 		/* NB: frags always have any TKIP MIC done in s/w */
101281a82688SAdrian Chadd 		if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
101381a82688SAdrian Chadd 			(*pktlen) += cip->ic_miclen;
101481a82688SAdrian Chadd 		(*keyix) = k->wk_keyix;
101581a82688SAdrian Chadd 	} else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
101681a82688SAdrian Chadd 		/*
101781a82688SAdrian Chadd 		 * Use station key cache slot, if assigned.
101881a82688SAdrian Chadd 		 */
101981a82688SAdrian Chadd 		(*keyix) = ni->ni_ucastkey.wk_keyix;
102081a82688SAdrian Chadd 		if ((*keyix) == IEEE80211_KEYIX_NONE)
102181a82688SAdrian Chadd 			(*keyix) = HAL_TXKEYIX_INVALID;
102281a82688SAdrian Chadd 	} else
102381a82688SAdrian Chadd 		(*keyix) = HAL_TXKEYIX_INVALID;
102481a82688SAdrian Chadd 
1025d4365d16SAdrian Chadd 	return (1);
102681a82688SAdrian Chadd }
102781a82688SAdrian Chadd 
1028e2e4a2c2SAdrian Chadd /*
1029e2e4a2c2SAdrian Chadd  * Calculate whether interoperability protection is required for
1030e2e4a2c2SAdrian Chadd  * this frame.
1031e2e4a2c2SAdrian Chadd  *
1032e2e4a2c2SAdrian Chadd  * This requires the rate control information be filled in,
1033e2e4a2c2SAdrian Chadd  * as the protection requirement depends upon the current
1034e2e4a2c2SAdrian Chadd  * operating mode / PHY.
1035e2e4a2c2SAdrian Chadd  */
1036e2e4a2c2SAdrian Chadd static void
1037e2e4a2c2SAdrian Chadd ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
1038e2e4a2c2SAdrian Chadd {
1039e2e4a2c2SAdrian Chadd 	struct ieee80211_frame *wh;
1040e2e4a2c2SAdrian Chadd 	uint8_t rix;
1041e2e4a2c2SAdrian Chadd 	uint16_t flags;
1042e2e4a2c2SAdrian Chadd 	int shortPreamble;
1043e2e4a2c2SAdrian Chadd 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1044e2e4a2c2SAdrian Chadd 	struct ifnet *ifp = sc->sc_ifp;
1045e2e4a2c2SAdrian Chadd 	struct ieee80211com *ic = ifp->if_l2com;
1046e2e4a2c2SAdrian Chadd 
1047e2e4a2c2SAdrian Chadd 	flags = bf->bf_state.bfs_txflags;
1048e2e4a2c2SAdrian Chadd 	rix = bf->bf_state.bfs_rc[0].rix;
1049e2e4a2c2SAdrian Chadd 	shortPreamble = bf->bf_state.bfs_shpream;
1050e2e4a2c2SAdrian Chadd 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1051e2e4a2c2SAdrian Chadd 
1052e2e4a2c2SAdrian Chadd 	/*
1053e2e4a2c2SAdrian Chadd 	 * If 802.11g protection is enabled, determine whether
1054e2e4a2c2SAdrian Chadd 	 * to use RTS/CTS or just CTS.  Note that this is only
1055e2e4a2c2SAdrian Chadd 	 * done for OFDM unicast frames.
1056e2e4a2c2SAdrian Chadd 	 */
1057e2e4a2c2SAdrian Chadd 	if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1058e2e4a2c2SAdrian Chadd 	    rt->info[rix].phy == IEEE80211_T_OFDM &&
1059e2e4a2c2SAdrian Chadd 	    (flags & HAL_TXDESC_NOACK) == 0) {
1060e2e4a2c2SAdrian Chadd 		bf->bf_state.bfs_doprot = 1;
1061e2e4a2c2SAdrian Chadd 		/* XXX fragments must use CCK rates w/ protection */
1062e2e4a2c2SAdrian Chadd 		if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
1063e2e4a2c2SAdrian Chadd 			flags |= HAL_TXDESC_RTSENA;
1064e2e4a2c2SAdrian Chadd 		} else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
1065e2e4a2c2SAdrian Chadd 			flags |= HAL_TXDESC_CTSENA;
1066e2e4a2c2SAdrian Chadd 		}
1067e2e4a2c2SAdrian Chadd 		/*
1068e2e4a2c2SAdrian Chadd 		 * For frags it would be desirable to use the
1069e2e4a2c2SAdrian Chadd 		 * highest CCK rate for RTS/CTS.  But stations
1070e2e4a2c2SAdrian Chadd 		 * farther away may detect it at a lower CCK rate
1071e2e4a2c2SAdrian Chadd 		 * so use the configured protection rate instead
1072e2e4a2c2SAdrian Chadd 		 * (for now).
1073e2e4a2c2SAdrian Chadd 		 */
1074e2e4a2c2SAdrian Chadd 		sc->sc_stats.ast_tx_protect++;
1075e2e4a2c2SAdrian Chadd 	}
1076e2e4a2c2SAdrian Chadd 
1077e2e4a2c2SAdrian Chadd 	/*
1078e2e4a2c2SAdrian Chadd 	 * If 11n protection is enabled and it's a HT frame,
1079e2e4a2c2SAdrian Chadd 	 * enable RTS.
1080e2e4a2c2SAdrian Chadd 	 *
1081e2e4a2c2SAdrian Chadd 	 * XXX ic_htprotmode or ic_curhtprotmode?
1082e2e4a2c2SAdrian Chadd 	 * XXX should it_htprotmode only matter if ic_curhtprotmode
1083e2e4a2c2SAdrian Chadd 	 * XXX indicates it's not a HT pure environment?
1084e2e4a2c2SAdrian Chadd 	 */
1085e2e4a2c2SAdrian Chadd 	if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
1086e2e4a2c2SAdrian Chadd 	    rt->info[rix].phy == IEEE80211_T_HT &&
1087e2e4a2c2SAdrian Chadd 	    (flags & HAL_TXDESC_NOACK) == 0) {
1088e2e4a2c2SAdrian Chadd 		flags |= HAL_TXDESC_RTSENA;
1089e2e4a2c2SAdrian Chadd 		sc->sc_stats.ast_tx_htprotect++;
1090e2e4a2c2SAdrian Chadd 	}
1091e2e4a2c2SAdrian Chadd 	bf->bf_state.bfs_txflags = flags;
1092e2e4a2c2SAdrian Chadd }
1093e2e4a2c2SAdrian Chadd 
1094e2e4a2c2SAdrian Chadd /*
1095e2e4a2c2SAdrian Chadd  * Update the frame duration given the currently selected rate.
1096e2e4a2c2SAdrian Chadd  *
1097e2e4a2c2SAdrian Chadd  * This also updates the frame duration value, so it will require
1098e2e4a2c2SAdrian Chadd  * a DMA flush.
1099e2e4a2c2SAdrian Chadd  */
1100e2e4a2c2SAdrian Chadd static void
1101e2e4a2c2SAdrian Chadd ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
1102e2e4a2c2SAdrian Chadd {
1103e2e4a2c2SAdrian Chadd 	struct ieee80211_frame *wh;
1104e2e4a2c2SAdrian Chadd 	uint8_t rix;
1105e2e4a2c2SAdrian Chadd 	uint16_t flags;
1106e2e4a2c2SAdrian Chadd 	int shortPreamble;
1107e2e4a2c2SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
1108e2e4a2c2SAdrian Chadd 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1109e2e4a2c2SAdrian Chadd 	int isfrag = bf->bf_m->m_flags & M_FRAG;
1110e2e4a2c2SAdrian Chadd 
1111e2e4a2c2SAdrian Chadd 	flags = bf->bf_state.bfs_txflags;
1112e2e4a2c2SAdrian Chadd 	rix = bf->bf_state.bfs_rc[0].rix;
1113e2e4a2c2SAdrian Chadd 	shortPreamble = bf->bf_state.bfs_shpream;
1114e2e4a2c2SAdrian Chadd 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1115e2e4a2c2SAdrian Chadd 
1116e2e4a2c2SAdrian Chadd 	/*
1117e2e4a2c2SAdrian Chadd 	 * Calculate duration.  This logically belongs in the 802.11
1118e2e4a2c2SAdrian Chadd 	 * layer but it lacks sufficient information to calculate it.
1119e2e4a2c2SAdrian Chadd 	 */
1120e2e4a2c2SAdrian Chadd 	if ((flags & HAL_TXDESC_NOACK) == 0 &&
1121e2e4a2c2SAdrian Chadd 	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
1122e2e4a2c2SAdrian Chadd 		u_int16_t dur;
1123e2e4a2c2SAdrian Chadd 		if (shortPreamble)
1124e2e4a2c2SAdrian Chadd 			dur = rt->info[rix].spAckDuration;
1125e2e4a2c2SAdrian Chadd 		else
1126e2e4a2c2SAdrian Chadd 			dur = rt->info[rix].lpAckDuration;
1127e2e4a2c2SAdrian Chadd 		if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1128e2e4a2c2SAdrian Chadd 			dur += dur;		/* additional SIFS+ACK */
1129e2e4a2c2SAdrian Chadd 			KASSERT(bf->bf_m->m_nextpkt != NULL, ("no fragment"));
1130e2e4a2c2SAdrian Chadd 			/*
1131e2e4a2c2SAdrian Chadd 			 * Include the size of next fragment so NAV is
1132e2e4a2c2SAdrian Chadd 			 * updated properly.  The last fragment uses only
1133e2e4a2c2SAdrian Chadd 			 * the ACK duration
11349572684aSAdrian Chadd 			 *
11359572684aSAdrian Chadd 			 * XXX TODO: ensure that the rate lookup for each
11369572684aSAdrian Chadd 			 * fragment is the same as the rate used by the
11379572684aSAdrian Chadd 			 * first fragment!
1138e2e4a2c2SAdrian Chadd 			 */
1139e2e4a2c2SAdrian Chadd 			dur += ath_hal_computetxtime(ah, rt,
1140e2e4a2c2SAdrian Chadd 					bf->bf_m->m_nextpkt->m_pkthdr.len,
1141e2e4a2c2SAdrian Chadd 					rix, shortPreamble);
1142e2e4a2c2SAdrian Chadd 		}
1143e2e4a2c2SAdrian Chadd 		if (isfrag) {
1144e2e4a2c2SAdrian Chadd 			/*
1145e2e4a2c2SAdrian Chadd 			 * Force hardware to use computed duration for next
1146e2e4a2c2SAdrian Chadd 			 * fragment by disabling multi-rate retry which updates
1147e2e4a2c2SAdrian Chadd 			 * duration based on the multi-rate duration table.
1148e2e4a2c2SAdrian Chadd 			 */
1149e2e4a2c2SAdrian Chadd 			bf->bf_state.bfs_ismrr = 0;
1150e2e4a2c2SAdrian Chadd 			bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
1151e2e4a2c2SAdrian Chadd 			/* XXX update bfs_rc[0].try? */
1152e2e4a2c2SAdrian Chadd 		}
1153e2e4a2c2SAdrian Chadd 
1154e2e4a2c2SAdrian Chadd 		/* Update the duration field itself */
1155e2e4a2c2SAdrian Chadd 		*(u_int16_t *)wh->i_dur = htole16(dur);
1156e2e4a2c2SAdrian Chadd 	}
1157e2e4a2c2SAdrian Chadd }
1158e2e4a2c2SAdrian Chadd 
1159e42b5dbaSAdrian Chadd static uint8_t
1160e42b5dbaSAdrian Chadd ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
1161eb6f0de0SAdrian Chadd     int cix, int shortPreamble)
116279f02dbfSAdrian Chadd {
1163e42b5dbaSAdrian Chadd 	uint8_t ctsrate;
1164e42b5dbaSAdrian Chadd 
116579f02dbfSAdrian Chadd 	/*
116679f02dbfSAdrian Chadd 	 * CTS transmit rate is derived from the transmit rate
116779f02dbfSAdrian Chadd 	 * by looking in the h/w rate table.  We must also factor
116879f02dbfSAdrian Chadd 	 * in whether or not a short preamble is to be used.
116979f02dbfSAdrian Chadd 	 */
117079f02dbfSAdrian Chadd 	/* NB: cix is set above where RTS/CTS is enabled */
117179f02dbfSAdrian Chadd 	KASSERT(cix != 0xff, ("cix not setup"));
1172e42b5dbaSAdrian Chadd 	ctsrate = rt->info[cix].rateCode;
1173e42b5dbaSAdrian Chadd 
1174e42b5dbaSAdrian Chadd 	/* XXX this should only matter for legacy rates */
1175e42b5dbaSAdrian Chadd 	if (shortPreamble)
1176e42b5dbaSAdrian Chadd 		ctsrate |= rt->info[cix].shortPreamble;
1177e42b5dbaSAdrian Chadd 
1178d4365d16SAdrian Chadd 	return (ctsrate);
1179e42b5dbaSAdrian Chadd }
1180e42b5dbaSAdrian Chadd 
1181e42b5dbaSAdrian Chadd /*
1182e42b5dbaSAdrian Chadd  * Calculate the RTS/CTS duration for legacy frames.
1183e42b5dbaSAdrian Chadd  */
1184e42b5dbaSAdrian Chadd static int
1185e42b5dbaSAdrian Chadd ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
1186e42b5dbaSAdrian Chadd     int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
1187e42b5dbaSAdrian Chadd     int flags)
1188e42b5dbaSAdrian Chadd {
1189e42b5dbaSAdrian Chadd 	int ctsduration = 0;
1190e42b5dbaSAdrian Chadd 
1191e42b5dbaSAdrian Chadd 	/* This mustn't be called for HT modes */
1192e42b5dbaSAdrian Chadd 	if (rt->info[cix].phy == IEEE80211_T_HT) {
1193e42b5dbaSAdrian Chadd 		printf("%s: HT rate where it shouldn't be (0x%x)\n",
1194e42b5dbaSAdrian Chadd 		    __func__, rt->info[cix].rateCode);
1195d4365d16SAdrian Chadd 		return (-1);
1196e42b5dbaSAdrian Chadd 	}
1197e42b5dbaSAdrian Chadd 
119879f02dbfSAdrian Chadd 	/*
119979f02dbfSAdrian Chadd 	 * Compute the transmit duration based on the frame
120079f02dbfSAdrian Chadd 	 * size and the size of an ACK frame.  We call into the
120179f02dbfSAdrian Chadd 	 * HAL to do the computation since it depends on the
120279f02dbfSAdrian Chadd 	 * characteristics of the actual PHY being used.
120379f02dbfSAdrian Chadd 	 *
120479f02dbfSAdrian Chadd 	 * NB: CTS is assumed the same size as an ACK so we can
120579f02dbfSAdrian Chadd 	 *     use the precalculated ACK durations.
120679f02dbfSAdrian Chadd 	 */
120779f02dbfSAdrian Chadd 	if (shortPreamble) {
120879f02dbfSAdrian Chadd 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1209e42b5dbaSAdrian Chadd 			ctsduration += rt->info[cix].spAckDuration;
1210e42b5dbaSAdrian Chadd 		ctsduration += ath_hal_computetxtime(ah,
121179f02dbfSAdrian Chadd 			rt, pktlen, rix, AH_TRUE);
121279f02dbfSAdrian Chadd 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1213e42b5dbaSAdrian Chadd 			ctsduration += rt->info[rix].spAckDuration;
121479f02dbfSAdrian Chadd 	} else {
121579f02dbfSAdrian Chadd 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1216e42b5dbaSAdrian Chadd 			ctsduration += rt->info[cix].lpAckDuration;
1217e42b5dbaSAdrian Chadd 		ctsduration += ath_hal_computetxtime(ah,
121879f02dbfSAdrian Chadd 			rt, pktlen, rix, AH_FALSE);
121979f02dbfSAdrian Chadd 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1220e42b5dbaSAdrian Chadd 			ctsduration += rt->info[rix].lpAckDuration;
122179f02dbfSAdrian Chadd 	}
1222e42b5dbaSAdrian Chadd 
1223d4365d16SAdrian Chadd 	return (ctsduration);
122479f02dbfSAdrian Chadd }
122579f02dbfSAdrian Chadd 
1226eb6f0de0SAdrian Chadd /*
1227eb6f0de0SAdrian Chadd  * Update the given ath_buf with updated rts/cts setup and duration
1228eb6f0de0SAdrian Chadd  * values.
1229eb6f0de0SAdrian Chadd  *
1230eb6f0de0SAdrian Chadd  * To support rate lookups for each software retry, the rts/cts rate
1231eb6f0de0SAdrian Chadd  * and cts duration must be re-calculated.
1232eb6f0de0SAdrian Chadd  *
1233eb6f0de0SAdrian Chadd  * This function assumes the RTS/CTS flags have been set as needed;
1234eb6f0de0SAdrian Chadd  * mrr has been disabled; and the rate control lookup has been done.
1235eb6f0de0SAdrian Chadd  *
1236eb6f0de0SAdrian Chadd  * XXX TODO: MRR need only be disabled for the pre-11n NICs.
1237eb6f0de0SAdrian Chadd  * XXX The 11n NICs support per-rate RTS/CTS configuration.
1238eb6f0de0SAdrian Chadd  */
1239eb6f0de0SAdrian Chadd static void
1240eb6f0de0SAdrian Chadd ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
1241eb6f0de0SAdrian Chadd {
1242eb6f0de0SAdrian Chadd 	uint16_t ctsduration = 0;
1243eb6f0de0SAdrian Chadd 	uint8_t ctsrate = 0;
1244eb6f0de0SAdrian Chadd 	uint8_t rix = bf->bf_state.bfs_rc[0].rix;
1245eb6f0de0SAdrian Chadd 	uint8_t cix = 0;
1246eb6f0de0SAdrian Chadd 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1247eb6f0de0SAdrian Chadd 
1248eb6f0de0SAdrian Chadd 	/*
1249eb6f0de0SAdrian Chadd 	 * No RTS/CTS enabled? Don't bother.
1250eb6f0de0SAdrian Chadd 	 */
1251875a9451SAdrian Chadd 	if ((bf->bf_state.bfs_txflags &
1252eb6f0de0SAdrian Chadd 	    (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
1253eb6f0de0SAdrian Chadd 		/* XXX is this really needed? */
1254eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ctsrate = 0;
1255eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ctsduration = 0;
1256eb6f0de0SAdrian Chadd 		return;
1257eb6f0de0SAdrian Chadd 	}
1258eb6f0de0SAdrian Chadd 
1259eb6f0de0SAdrian Chadd 	/*
1260eb6f0de0SAdrian Chadd 	 * If protection is enabled, use the protection rix control
1261eb6f0de0SAdrian Chadd 	 * rate. Otherwise use the rate0 control rate.
1262eb6f0de0SAdrian Chadd 	 */
1263eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_doprot)
1264eb6f0de0SAdrian Chadd 		rix = sc->sc_protrix;
1265eb6f0de0SAdrian Chadd 	else
1266eb6f0de0SAdrian Chadd 		rix = bf->bf_state.bfs_rc[0].rix;
1267eb6f0de0SAdrian Chadd 
1268eb6f0de0SAdrian Chadd 	/*
1269eb6f0de0SAdrian Chadd 	 * If the raw path has hard-coded ctsrate0 to something,
1270eb6f0de0SAdrian Chadd 	 * use it.
1271eb6f0de0SAdrian Chadd 	 */
1272eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_ctsrate0 != 0)
1273eb6f0de0SAdrian Chadd 		cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
1274eb6f0de0SAdrian Chadd 	else
1275eb6f0de0SAdrian Chadd 		/* Control rate from above */
1276eb6f0de0SAdrian Chadd 		cix = rt->info[rix].controlRate;
1277eb6f0de0SAdrian Chadd 
1278eb6f0de0SAdrian Chadd 	/* Calculate the rtscts rate for the given cix */
1279eb6f0de0SAdrian Chadd 	ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
1280eb6f0de0SAdrian Chadd 	    bf->bf_state.bfs_shpream);
1281eb6f0de0SAdrian Chadd 
1282eb6f0de0SAdrian Chadd 	/* The 11n chipsets do ctsduration calculations for you */
1283eb6f0de0SAdrian Chadd 	if (! ath_tx_is_11n(sc))
1284eb6f0de0SAdrian Chadd 		ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
1285eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
1286875a9451SAdrian Chadd 		    rt, bf->bf_state.bfs_txflags);
1287eb6f0de0SAdrian Chadd 
1288eb6f0de0SAdrian Chadd 	/* Squirrel away in ath_buf */
1289eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate = ctsrate;
1290eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsduration = ctsduration;
1291eb6f0de0SAdrian Chadd 
1292eb6f0de0SAdrian Chadd 	/*
1293eb6f0de0SAdrian Chadd 	 * Must disable multi-rate retry when using RTS/CTS.
1294eb6f0de0SAdrian Chadd 	 */
1295af017101SAdrian Chadd 	if (!sc->sc_mrrprot) {
1296eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ismrr = 0;
1297eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_try0 =
1298eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
1299eb6f0de0SAdrian Chadd 	}
1300af017101SAdrian Chadd }
1301eb6f0de0SAdrian Chadd 
1302eb6f0de0SAdrian Chadd /*
1303eb6f0de0SAdrian Chadd  * Setup the descriptor chain for a normal or fast-frame
1304eb6f0de0SAdrian Chadd  * frame.
130546634305SAdrian Chadd  *
130646634305SAdrian Chadd  * XXX TODO: extend to include the destination hardware QCU ID.
130746634305SAdrian Chadd  * Make sure that is correct.  Make sure that when being added
130846634305SAdrian Chadd  * to the mcastq, the CABQ QCUID is set or things will get a bit
130946634305SAdrian Chadd  * odd.
1310eb6f0de0SAdrian Chadd  */
1311eb6f0de0SAdrian Chadd static void
1312eb6f0de0SAdrian Chadd ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1313eb6f0de0SAdrian Chadd {
1314eb6f0de0SAdrian Chadd 	struct ath_desc *ds = bf->bf_desc;
1315eb6f0de0SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
1316eb6f0de0SAdrian Chadd 
13177d9dd2acSAdrian Chadd 	if (bf->bf_state.bfs_txrate0 == 0)
13187d9dd2acSAdrian Chadd 		device_printf(sc->sc_dev, "%s: bf=%p, txrate0=%d\n",
13197d9dd2acSAdrian Chadd 		    __func__, bf, 0);
13207d9dd2acSAdrian Chadd 
1321eb6f0de0SAdrian Chadd 	ath_hal_setuptxdesc(ah, ds
1322eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_pktlen	/* packet length */
1323eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_hdrlen	/* header length */
1324eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_atype	/* Atheros packet type */
1325eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_txpower	/* txpower */
1326eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_txrate0
1327eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_try0		/* series 0 rate/tries */
1328eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_keyix	/* key cache index */
1329eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_txantenna	/* antenna mode */
1330875a9451SAdrian Chadd 		, bf->bf_state.bfs_txflags	/* flags */
1331eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
1332eb6f0de0SAdrian Chadd 		, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
1333eb6f0de0SAdrian Chadd 	);
1334eb6f0de0SAdrian Chadd 
1335eb6f0de0SAdrian Chadd 	/*
1336eb6f0de0SAdrian Chadd 	 * This will be overriden when the descriptor chain is written.
1337eb6f0de0SAdrian Chadd 	 */
1338eb6f0de0SAdrian Chadd 	bf->bf_lastds = ds;
1339eb6f0de0SAdrian Chadd 	bf->bf_last = bf;
1340eb6f0de0SAdrian Chadd 
1341d34a7347SAdrian Chadd 	/* Set rate control and descriptor chain for this frame */
1342d34a7347SAdrian Chadd 	ath_tx_set_ratectrl(sc, bf->bf_node, bf);
13436e84772fSAdrian Chadd 	ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0);
1344eb6f0de0SAdrian Chadd }
1345eb6f0de0SAdrian Chadd 
1346eb6f0de0SAdrian Chadd /*
1347eb6f0de0SAdrian Chadd  * Do a rate lookup.
1348eb6f0de0SAdrian Chadd  *
1349eb6f0de0SAdrian Chadd  * This performs a rate lookup for the given ath_buf only if it's required.
1350eb6f0de0SAdrian Chadd  * Non-data frames and raw frames don't require it.
1351eb6f0de0SAdrian Chadd  *
1352eb6f0de0SAdrian Chadd  * This populates the primary and MRR entries; MRR values are
1353eb6f0de0SAdrian Chadd  * then disabled later on if something requires it (eg RTS/CTS on
1354eb6f0de0SAdrian Chadd  * pre-11n chipsets.
1355eb6f0de0SAdrian Chadd  *
1356eb6f0de0SAdrian Chadd  * This needs to be done before the RTS/CTS fields are calculated
1357eb6f0de0SAdrian Chadd  * as they may depend upon the rate chosen.
1358eb6f0de0SAdrian Chadd  */
1359eb6f0de0SAdrian Chadd static void
1360eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf)
1361eb6f0de0SAdrian Chadd {
1362eb6f0de0SAdrian Chadd 	uint8_t rate, rix;
1363eb6f0de0SAdrian Chadd 	int try0;
1364eb6f0de0SAdrian Chadd 
1365eb6f0de0SAdrian Chadd 	if (! bf->bf_state.bfs_doratelookup)
1366eb6f0de0SAdrian Chadd 		return;
1367eb6f0de0SAdrian Chadd 
1368eb6f0de0SAdrian Chadd 	/* Get rid of any previous state */
1369eb6f0de0SAdrian Chadd 	bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1370eb6f0de0SAdrian Chadd 
1371eb6f0de0SAdrian Chadd 	ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1372eb6f0de0SAdrian Chadd 	ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1373eb6f0de0SAdrian Chadd 	    bf->bf_state.bfs_pktlen, &rix, &try0, &rate);
1374eb6f0de0SAdrian Chadd 
1375eb6f0de0SAdrian Chadd 	/* In case MRR is disabled, make sure rc[0] is setup correctly */
1376eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].rix = rix;
1377eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].ratecode = rate;
1378eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].tries = try0;
1379eb6f0de0SAdrian Chadd 
1380eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1381eb6f0de0SAdrian Chadd 		ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1382eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_rc);
1383eb6f0de0SAdrian Chadd 	ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1384eb6f0de0SAdrian Chadd 
1385eb6f0de0SAdrian Chadd 	sc->sc_txrix = rix;	/* for LED blinking */
1386eb6f0de0SAdrian Chadd 	sc->sc_lastdatarix = rix;	/* for fast frames */
1387eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 = try0;
1388eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txrate0 = rate;
1389eb6f0de0SAdrian Chadd }
1390eb6f0de0SAdrian Chadd 
1391eb6f0de0SAdrian Chadd /*
13920c54de88SAdrian Chadd  * Update the CLRDMASK bit in the ath_buf if it needs to be set.
13930c54de88SAdrian Chadd  */
13940c54de88SAdrian Chadd static void
13950c54de88SAdrian Chadd ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid,
13960c54de88SAdrian Chadd     struct ath_buf *bf)
13970c54de88SAdrian Chadd {
13980c54de88SAdrian Chadd 
1399375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
14000c54de88SAdrian Chadd 
14010c54de88SAdrian Chadd 	if (tid->clrdmask == 1) {
14020c54de88SAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
14030c54de88SAdrian Chadd 		tid->clrdmask = 0;
14040c54de88SAdrian Chadd 	}
14050c54de88SAdrian Chadd }
14060c54de88SAdrian Chadd 
14070c54de88SAdrian Chadd /*
1408eb6f0de0SAdrian Chadd  * Transmit the given frame to the hardware.
1409eb6f0de0SAdrian Chadd  *
1410eb6f0de0SAdrian Chadd  * The frame must already be setup; rate control must already have
1411eb6f0de0SAdrian Chadd  * been done.
1412eb6f0de0SAdrian Chadd  *
1413eb6f0de0SAdrian Chadd  * XXX since the TXQ lock is being held here (and I dislike holding
1414eb6f0de0SAdrian Chadd  * it for this long when not doing software aggregation), later on
1415eb6f0de0SAdrian Chadd  * break this function into "setup_normal" and "xmit_normal". The
1416eb6f0de0SAdrian Chadd  * lock only needs to be held for the ath_tx_handoff call.
1417eb6f0de0SAdrian Chadd  */
1418eb6f0de0SAdrian Chadd static void
1419eb6f0de0SAdrian Chadd ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1420eb6f0de0SAdrian Chadd     struct ath_buf *bf)
1421eb6f0de0SAdrian Chadd {
14220c54de88SAdrian Chadd 	struct ath_node *an = ATH_NODE(bf->bf_node);
14230c54de88SAdrian Chadd 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
1424eb6f0de0SAdrian Chadd 
1425375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
1426eb6f0de0SAdrian Chadd 
14270c54de88SAdrian Chadd 	/*
14280c54de88SAdrian Chadd 	 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does
14290c54de88SAdrian Chadd 	 * set a completion handler however it doesn't (yet) properly
14300c54de88SAdrian Chadd 	 * handle the strict ordering requirements needed for normal,
14310c54de88SAdrian Chadd 	 * non-aggregate session frames.
14320c54de88SAdrian Chadd 	 *
14330c54de88SAdrian Chadd 	 * Once this is implemented, only set CLRDMASK like this for
14340c54de88SAdrian Chadd 	 * frames that must go out - eg management/raw frames.
14350c54de88SAdrian Chadd 	 */
14360c54de88SAdrian Chadd 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
14370c54de88SAdrian Chadd 
1438eb6f0de0SAdrian Chadd 	/* Setup the descriptor before handoff */
1439eb6f0de0SAdrian Chadd 	ath_tx_do_ratelookup(sc, bf);
1440e2e4a2c2SAdrian Chadd 	ath_tx_calc_duration(sc, bf);
1441e2e4a2c2SAdrian Chadd 	ath_tx_calc_protection(sc, bf);
1442eb6f0de0SAdrian Chadd 	ath_tx_set_rtscts(sc, bf);
1443e2e4a2c2SAdrian Chadd 	ath_tx_rate_fill_rcflags(sc, bf);
1444eb6f0de0SAdrian Chadd 	ath_tx_setds(sc, bf);
1445eb6f0de0SAdrian Chadd 
14460c54de88SAdrian Chadd 	/* Track per-TID hardware queue depth correctly */
14470c54de88SAdrian Chadd 	tid->hwq_depth++;
14480c54de88SAdrian Chadd 
14490c54de88SAdrian Chadd 	/* Assign the completion handler */
14500c54de88SAdrian Chadd 	bf->bf_comp = ath_tx_normal_comp;
14514e81f27cSAdrian Chadd 
1452eb6f0de0SAdrian Chadd 	/* Hand off to hardware */
1453eb6f0de0SAdrian Chadd 	ath_tx_handoff(sc, txq, bf);
1454eb6f0de0SAdrian Chadd }
1455eb6f0de0SAdrian Chadd 
1456d05b576dSAdrian Chadd /*
1457d05b576dSAdrian Chadd  * Do the basic frame setup stuff that's required before the frame
1458d05b576dSAdrian Chadd  * is added to a software queue.
1459d05b576dSAdrian Chadd  *
1460d05b576dSAdrian Chadd  * All frames get mostly the same treatment and it's done once.
1461d05b576dSAdrian Chadd  * Retransmits fiddle with things like the rate control setup,
1462d05b576dSAdrian Chadd  * setting the retransmit bit in the packet; doing relevant DMA/bus
1463d05b576dSAdrian Chadd  * syncing and relinking it (back) into the hardware TX queue.
1464d05b576dSAdrian Chadd  *
1465d05b576dSAdrian Chadd  * Note that this may cause the mbuf to be reallocated, so
1466d05b576dSAdrian Chadd  * m0 may not be valid.
1467d05b576dSAdrian Chadd  */
1468eb6f0de0SAdrian Chadd static int
1469eb6f0de0SAdrian Chadd ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1470b43facbfSAdrian Chadd     struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1471b8e788a5SAdrian Chadd {
1472b8e788a5SAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
1473b8e788a5SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
1474b8e788a5SAdrian Chadd 	struct ifnet *ifp = sc->sc_ifp;
1475b8e788a5SAdrian Chadd 	struct ieee80211com *ic = ifp->if_l2com;
1476b8e788a5SAdrian Chadd 	const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
1477b8e788a5SAdrian Chadd 	int error, iswep, ismcast, isfrag, ismrr;
1478eb6f0de0SAdrian Chadd 	int keyix, hdrlen, pktlen, try0 = 0;
1479eb6f0de0SAdrian Chadd 	u_int8_t rix = 0, txrate = 0;
1480b8e788a5SAdrian Chadd 	struct ath_desc *ds;
1481b8e788a5SAdrian Chadd 	struct ieee80211_frame *wh;
1482eb6f0de0SAdrian Chadd 	u_int subtype, flags;
1483b8e788a5SAdrian Chadd 	HAL_PKT_TYPE atype;
1484b8e788a5SAdrian Chadd 	const HAL_RATE_TABLE *rt;
1485b8e788a5SAdrian Chadd 	HAL_BOOL shortPreamble;
1486b8e788a5SAdrian Chadd 	struct ath_node *an;
1487b8e788a5SAdrian Chadd 	u_int pri;
1488b8e788a5SAdrian Chadd 
14897561cb5cSAdrian Chadd 	/*
14907561cb5cSAdrian Chadd 	 * To ensure that both sequence numbers and the CCMP PN handling
14917561cb5cSAdrian Chadd 	 * is "correct", make sure that the relevant TID queue is locked.
14927561cb5cSAdrian Chadd 	 * Otherwise the CCMP PN and seqno may appear out of order, causing
14937561cb5cSAdrian Chadd 	 * re-ordered frames to have out of order CCMP PN's, resulting
14947561cb5cSAdrian Chadd 	 * in many, many frame drops.
14957561cb5cSAdrian Chadd 	 */
1496375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
14977561cb5cSAdrian Chadd 
1498b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1499b8e788a5SAdrian Chadd 	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
1500b8e788a5SAdrian Chadd 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1501b8e788a5SAdrian Chadd 	isfrag = m0->m_flags & M_FRAG;
1502b8e788a5SAdrian Chadd 	hdrlen = ieee80211_anyhdrsize(wh);
1503b8e788a5SAdrian Chadd 	/*
1504b8e788a5SAdrian Chadd 	 * Packet length must not include any
1505b8e788a5SAdrian Chadd 	 * pad bytes; deduct them here.
1506b8e788a5SAdrian Chadd 	 */
1507b8e788a5SAdrian Chadd 	pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1508b8e788a5SAdrian Chadd 
150981a82688SAdrian Chadd 	/* Handle encryption twiddling if needed */
1510eb6f0de0SAdrian Chadd 	if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1511eb6f0de0SAdrian Chadd 	    &pktlen, &keyix)) {
1512b8e788a5SAdrian Chadd 		ath_freetx(m0);
1513b8e788a5SAdrian Chadd 		return EIO;
1514b8e788a5SAdrian Chadd 	}
1515b8e788a5SAdrian Chadd 
1516b8e788a5SAdrian Chadd 	/* packet header may have moved, reset our local pointer */
1517b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1518b8e788a5SAdrian Chadd 
1519b8e788a5SAdrian Chadd 	pktlen += IEEE80211_CRC_LEN;
1520b8e788a5SAdrian Chadd 
1521b8e788a5SAdrian Chadd 	/*
1522b8e788a5SAdrian Chadd 	 * Load the DMA map so any coalescing is done.  This
1523b8e788a5SAdrian Chadd 	 * also calculates the number of descriptors we need.
1524b8e788a5SAdrian Chadd 	 */
1525b8e788a5SAdrian Chadd 	error = ath_tx_dmasetup(sc, bf, m0);
1526b8e788a5SAdrian Chadd 	if (error != 0)
1527b8e788a5SAdrian Chadd 		return error;
1528b8e788a5SAdrian Chadd 	bf->bf_node = ni;			/* NB: held reference */
1529b8e788a5SAdrian Chadd 	m0 = bf->bf_m;				/* NB: may have changed */
1530b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1531b8e788a5SAdrian Chadd 
1532b8e788a5SAdrian Chadd 	/* setup descriptors */
1533b8e788a5SAdrian Chadd 	ds = bf->bf_desc;
1534b8e788a5SAdrian Chadd 	rt = sc->sc_currates;
1535b8e788a5SAdrian Chadd 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1536b8e788a5SAdrian Chadd 
1537b8e788a5SAdrian Chadd 	/*
1538b8e788a5SAdrian Chadd 	 * NB: the 802.11 layer marks whether or not we should
1539b8e788a5SAdrian Chadd 	 * use short preamble based on the current mode and
1540b8e788a5SAdrian Chadd 	 * negotiated parameters.
1541b8e788a5SAdrian Chadd 	 */
1542b8e788a5SAdrian Chadd 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1543b8e788a5SAdrian Chadd 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1544b8e788a5SAdrian Chadd 		shortPreamble = AH_TRUE;
1545b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_shortpre++;
1546b8e788a5SAdrian Chadd 	} else {
1547b8e788a5SAdrian Chadd 		shortPreamble = AH_FALSE;
1548b8e788a5SAdrian Chadd 	}
1549b8e788a5SAdrian Chadd 
1550b8e788a5SAdrian Chadd 	an = ATH_NODE(ni);
15514e81f27cSAdrian Chadd 	//flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
15524e81f27cSAdrian Chadd 	flags = 0;
1553b8e788a5SAdrian Chadd 	ismrr = 0;				/* default no multi-rate retry*/
1554b8e788a5SAdrian Chadd 	pri = M_WME_GETAC(m0);			/* honor classification */
1555b8e788a5SAdrian Chadd 	/* XXX use txparams instead of fixed values */
1556b8e788a5SAdrian Chadd 	/*
1557b8e788a5SAdrian Chadd 	 * Calculate Atheros packet type from IEEE80211 packet header,
1558b8e788a5SAdrian Chadd 	 * setup for rate calculations, and select h/w transmit queue.
1559b8e788a5SAdrian Chadd 	 */
1560b8e788a5SAdrian Chadd 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1561b8e788a5SAdrian Chadd 	case IEEE80211_FC0_TYPE_MGT:
1562b8e788a5SAdrian Chadd 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1563b8e788a5SAdrian Chadd 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1564b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_BEACON;
1565b8e788a5SAdrian Chadd 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1566b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_PROBE_RESP;
1567b8e788a5SAdrian Chadd 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1568b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_ATIM;
1569b8e788a5SAdrian Chadd 		else
1570b8e788a5SAdrian Chadd 			atype = HAL_PKT_TYPE_NORMAL;	/* XXX */
1571b8e788a5SAdrian Chadd 		rix = an->an_mgmtrix;
1572b8e788a5SAdrian Chadd 		txrate = rt->info[rix].rateCode;
1573b8e788a5SAdrian Chadd 		if (shortPreamble)
1574b8e788a5SAdrian Chadd 			txrate |= rt->info[rix].shortPreamble;
1575b8e788a5SAdrian Chadd 		try0 = ATH_TXMGTTRY;
1576b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1577b8e788a5SAdrian Chadd 		break;
1578b8e788a5SAdrian Chadd 	case IEEE80211_FC0_TYPE_CTL:
1579b8e788a5SAdrian Chadd 		atype = HAL_PKT_TYPE_PSPOLL;	/* stop setting of duration */
1580b8e788a5SAdrian Chadd 		rix = an->an_mgmtrix;
1581b8e788a5SAdrian Chadd 		txrate = rt->info[rix].rateCode;
1582b8e788a5SAdrian Chadd 		if (shortPreamble)
1583b8e788a5SAdrian Chadd 			txrate |= rt->info[rix].shortPreamble;
1584b8e788a5SAdrian Chadd 		try0 = ATH_TXMGTTRY;
1585b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1586b8e788a5SAdrian Chadd 		break;
1587b8e788a5SAdrian Chadd 	case IEEE80211_FC0_TYPE_DATA:
1588b8e788a5SAdrian Chadd 		atype = HAL_PKT_TYPE_NORMAL;		/* default */
1589b8e788a5SAdrian Chadd 		/*
1590b8e788a5SAdrian Chadd 		 * Data frames: multicast frames go out at a fixed rate,
1591b8e788a5SAdrian Chadd 		 * EAPOL frames use the mgmt frame rate; otherwise consult
1592b8e788a5SAdrian Chadd 		 * the rate control module for the rate to use.
1593b8e788a5SAdrian Chadd 		 */
1594b8e788a5SAdrian Chadd 		if (ismcast) {
1595b8e788a5SAdrian Chadd 			rix = an->an_mcastrix;
1596b8e788a5SAdrian Chadd 			txrate = rt->info[rix].rateCode;
1597b8e788a5SAdrian Chadd 			if (shortPreamble)
1598b8e788a5SAdrian Chadd 				txrate |= rt->info[rix].shortPreamble;
1599b8e788a5SAdrian Chadd 			try0 = 1;
1600b8e788a5SAdrian Chadd 		} else if (m0->m_flags & M_EAPOL) {
1601b8e788a5SAdrian Chadd 			/* XXX? maybe always use long preamble? */
1602b8e788a5SAdrian Chadd 			rix = an->an_mgmtrix;
1603b8e788a5SAdrian Chadd 			txrate = rt->info[rix].rateCode;
1604b8e788a5SAdrian Chadd 			if (shortPreamble)
1605b8e788a5SAdrian Chadd 				txrate |= rt->info[rix].shortPreamble;
1606b8e788a5SAdrian Chadd 			try0 = ATH_TXMAXTRY;	/* XXX?too many? */
1607b8e788a5SAdrian Chadd 		} else {
1608eb6f0de0SAdrian Chadd 			/*
1609eb6f0de0SAdrian Chadd 			 * Do rate lookup on each TX, rather than using
1610eb6f0de0SAdrian Chadd 			 * the hard-coded TX information decided here.
1611eb6f0de0SAdrian Chadd 			 */
1612b8e788a5SAdrian Chadd 			ismrr = 1;
1613eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_doratelookup = 1;
1614b8e788a5SAdrian Chadd 		}
1615b8e788a5SAdrian Chadd 		if (cap->cap_wmeParams[pri].wmep_noackPolicy)
1616b8e788a5SAdrian Chadd 			flags |= HAL_TXDESC_NOACK;
1617b8e788a5SAdrian Chadd 		break;
1618b8e788a5SAdrian Chadd 	default:
1619b8e788a5SAdrian Chadd 		if_printf(ifp, "bogus frame type 0x%x (%s)\n",
1620b8e788a5SAdrian Chadd 			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1621b8e788a5SAdrian Chadd 		/* XXX statistic */
1622b8e788a5SAdrian Chadd 		ath_freetx(m0);
1623b8e788a5SAdrian Chadd 		return EIO;
1624b8e788a5SAdrian Chadd 	}
1625b8e788a5SAdrian Chadd 
1626447fd44aSAdrian Chadd 	/*
1627447fd44aSAdrian Chadd 	 * There are two known scenarios where the frame AC doesn't match
1628447fd44aSAdrian Chadd 	 * what the destination TXQ is.
1629447fd44aSAdrian Chadd 	 *
1630447fd44aSAdrian Chadd 	 * + non-QoS frames (eg management?) that the net80211 stack has
1631447fd44aSAdrian Chadd 	 *   assigned a higher AC to, but since it's a non-QoS TID, it's
1632447fd44aSAdrian Chadd 	 *   being thrown into TID 16.  TID 16 gets the AC_BE queue.
1633447fd44aSAdrian Chadd 	 *   It's quite possible that management frames should just be
1634447fd44aSAdrian Chadd 	 *   direct dispatched to hardware rather than go via the software
1635447fd44aSAdrian Chadd 	 *   queue; that should be investigated in the future.  There are
1636447fd44aSAdrian Chadd 	 *   some specific scenarios where this doesn't make sense, mostly
1637447fd44aSAdrian Chadd 	 *   surrounding ADDBA request/response - hence why that is special
1638447fd44aSAdrian Chadd 	 *   cased.
1639447fd44aSAdrian Chadd 	 *
1640447fd44aSAdrian Chadd 	 * + Multicast frames going into the VAP mcast queue.  That shows up
1641447fd44aSAdrian Chadd 	 *   as "TXQ 11".
1642447fd44aSAdrian Chadd 	 *
1643447fd44aSAdrian Chadd 	 * This driver should eventually support separate TID and TXQ locking,
1644447fd44aSAdrian Chadd 	 * allowing for arbitrary AC frames to appear on arbitrary software
1645447fd44aSAdrian Chadd 	 * queues, being queued to the "correct" hardware queue when needed.
1646447fd44aSAdrian Chadd 	 */
1647447fd44aSAdrian Chadd #if 0
16486deb7f32SAdrian Chadd 	if (txq != sc->sc_ac2q[pri]) {
16496deb7f32SAdrian Chadd 		device_printf(sc->sc_dev,
16506deb7f32SAdrian Chadd 		    "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
16516deb7f32SAdrian Chadd 		    __func__,
16526deb7f32SAdrian Chadd 		    txq,
16536deb7f32SAdrian Chadd 		    txq->axq_qnum,
16546deb7f32SAdrian Chadd 		    pri,
16556deb7f32SAdrian Chadd 		    sc->sc_ac2q[pri],
16566deb7f32SAdrian Chadd 		    sc->sc_ac2q[pri]->axq_qnum);
16576deb7f32SAdrian Chadd 	}
1658447fd44aSAdrian Chadd #endif
16596deb7f32SAdrian Chadd 
1660b8e788a5SAdrian Chadd 	/*
1661b8e788a5SAdrian Chadd 	 * Calculate miscellaneous flags.
1662b8e788a5SAdrian Chadd 	 */
1663b8e788a5SAdrian Chadd 	if (ismcast) {
1664b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
1665b8e788a5SAdrian Chadd 	} else if (pktlen > vap->iv_rtsthreshold &&
1666b8e788a5SAdrian Chadd 	    (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1667b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
1668b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_rts++;
1669b8e788a5SAdrian Chadd 	}
1670b8e788a5SAdrian Chadd 	if (flags & HAL_TXDESC_NOACK)		/* NB: avoid double counting */
1671b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_noack++;
1672b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
1673b8e788a5SAdrian Chadd 	if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1674b8e788a5SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_TDMA,
1675b8e788a5SAdrian Chadd 		    "%s: discard frame, ACK required w/ TDMA\n", __func__);
1676b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tdma_ack++;
1677b8e788a5SAdrian Chadd 		ath_freetx(m0);
1678b8e788a5SAdrian Chadd 		return EIO;
1679b8e788a5SAdrian Chadd 	}
1680b8e788a5SAdrian Chadd #endif
1681b8e788a5SAdrian Chadd 
1682b8e788a5SAdrian Chadd 	/*
1683eb6f0de0SAdrian Chadd 	 * Determine if a tx interrupt should be generated for
1684eb6f0de0SAdrian Chadd 	 * this descriptor.  We take a tx interrupt to reap
1685eb6f0de0SAdrian Chadd 	 * descriptors when the h/w hits an EOL condition or
1686eb6f0de0SAdrian Chadd 	 * when the descriptor is specifically marked to generate
1687eb6f0de0SAdrian Chadd 	 * an interrupt.  We periodically mark descriptors in this
1688eb6f0de0SAdrian Chadd 	 * way to insure timely replenishing of the supply needed
1689eb6f0de0SAdrian Chadd 	 * for sending frames.  Defering interrupts reduces system
1690eb6f0de0SAdrian Chadd 	 * load and potentially allows more concurrent work to be
1691eb6f0de0SAdrian Chadd 	 * done but if done to aggressively can cause senders to
1692eb6f0de0SAdrian Chadd 	 * backup.
1693eb6f0de0SAdrian Chadd 	 *
1694eb6f0de0SAdrian Chadd 	 * NB: use >= to deal with sc_txintrperiod changing
1695eb6f0de0SAdrian Chadd 	 *     dynamically through sysctl.
1696b8e788a5SAdrian Chadd 	 */
1697eb6f0de0SAdrian Chadd 	if (flags & HAL_TXDESC_INTREQ) {
1698eb6f0de0SAdrian Chadd 		txq->axq_intrcnt = 0;
1699eb6f0de0SAdrian Chadd 	} else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1700eb6f0de0SAdrian Chadd 		flags |= HAL_TXDESC_INTREQ;
1701eb6f0de0SAdrian Chadd 		txq->axq_intrcnt = 0;
1702eb6f0de0SAdrian Chadd 	}
1703e42b5dbaSAdrian Chadd 
1704eb6f0de0SAdrian Chadd 	/* This point forward is actual TX bits */
1705b8e788a5SAdrian Chadd 
1706b8e788a5SAdrian Chadd 	/*
1707b8e788a5SAdrian Chadd 	 * At this point we are committed to sending the frame
1708b8e788a5SAdrian Chadd 	 * and we don't need to look at m_nextpkt; clear it in
1709b8e788a5SAdrian Chadd 	 * case this frame is part of frag chain.
1710b8e788a5SAdrian Chadd 	 */
1711b8e788a5SAdrian Chadd 	m0->m_nextpkt = NULL;
1712b8e788a5SAdrian Chadd 
1713b8e788a5SAdrian Chadd 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1714b8e788a5SAdrian Chadd 		ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1715b8e788a5SAdrian Chadd 		    sc->sc_hwmap[rix].ieeerate, -1);
1716b8e788a5SAdrian Chadd 
1717b8e788a5SAdrian Chadd 	if (ieee80211_radiotap_active_vap(vap)) {
1718b8e788a5SAdrian Chadd 		u_int64_t tsf = ath_hal_gettsf64(ah);
1719b8e788a5SAdrian Chadd 
1720b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_tsf = htole64(tsf);
1721b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1722b8e788a5SAdrian Chadd 		if (iswep)
1723b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1724b8e788a5SAdrian Chadd 		if (isfrag)
1725b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1726b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1727b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_txpower = ni->ni_txpower;
1728b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1729b8e788a5SAdrian Chadd 
1730b8e788a5SAdrian Chadd 		ieee80211_radiotap_tx(vap, m0);
1731b8e788a5SAdrian Chadd 	}
1732b8e788a5SAdrian Chadd 
1733eb6f0de0SAdrian Chadd 	/* Blank the legacy rate array */
1734eb6f0de0SAdrian Chadd 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1735c1782ce0SAdrian Chadd 
1736b8e788a5SAdrian Chadd 	/*
1737eb6f0de0SAdrian Chadd 	 * ath_buf_set_rate needs at least one rate/try to setup
1738eb6f0de0SAdrian Chadd 	 * the rate scenario.
1739b8e788a5SAdrian Chadd 	 */
1740eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].rix = rix;
1741eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].tries = try0;
1742eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].ratecode = txrate;
1743eb6f0de0SAdrian Chadd 
1744eb6f0de0SAdrian Chadd 	/* Store the decided rate index values away */
1745eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_pktlen = pktlen;
1746eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_hdrlen = hdrlen;
1747eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_atype = atype;
1748eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txpower = ni->ni_txpower;
1749eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txrate0 = txrate;
1750eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 = try0;
1751eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_keyix = keyix;
1752eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1753875a9451SAdrian Chadd 	bf->bf_state.bfs_txflags = flags;
1754eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_shpream = shortPreamble;
1755eb6f0de0SAdrian Chadd 
1756eb6f0de0SAdrian Chadd 	/* XXX this should be done in ath_tx_setrate() */
1757eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate0 = 0;	/* ie, no hard-coded ctsrate */
1758eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate = 0;	/* calculated later */
1759eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsduration = 0;
1760eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ismrr = ismrr;
1761eb6f0de0SAdrian Chadd 
1762eb6f0de0SAdrian Chadd 	return 0;
1763eb6f0de0SAdrian Chadd }
1764eb6f0de0SAdrian Chadd 
1765b8e788a5SAdrian Chadd /*
17664e81f27cSAdrian Chadd  * Queue a frame to the hardware or software queue.
1767eb6f0de0SAdrian Chadd  *
1768eb6f0de0SAdrian Chadd  * This can be called by the net80211 code.
1769eb6f0de0SAdrian Chadd  *
1770eb6f0de0SAdrian Chadd  * XXX what about locking? Or, push the seqno assign into the
1771eb6f0de0SAdrian Chadd  * XXX aggregate scheduler so its serialised?
17724e81f27cSAdrian Chadd  *
17734e81f27cSAdrian Chadd  * XXX When sending management frames via ath_raw_xmit(),
17744e81f27cSAdrian Chadd  *     should CLRDMASK be set unconditionally?
1775b8e788a5SAdrian Chadd  */
1776eb6f0de0SAdrian Chadd int
1777eb6f0de0SAdrian Chadd ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1778eb6f0de0SAdrian Chadd     struct ath_buf *bf, struct mbuf *m0)
1779eb6f0de0SAdrian Chadd {
1780eb6f0de0SAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
1781eb6f0de0SAdrian Chadd 	struct ath_vap *avp = ATH_VAP(vap);
17829c85ff91SAdrian Chadd 	int r = 0;
1783eb6f0de0SAdrian Chadd 	u_int pri;
1784eb6f0de0SAdrian Chadd 	int tid;
1785eb6f0de0SAdrian Chadd 	struct ath_txq *txq;
1786eb6f0de0SAdrian Chadd 	int ismcast;
1787eb6f0de0SAdrian Chadd 	const struct ieee80211_frame *wh;
1788eb6f0de0SAdrian Chadd 	int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1789a108d2d6SAdrian Chadd 	ieee80211_seq seqno;
1790eb6f0de0SAdrian Chadd 	uint8_t type, subtype;
1791eb6f0de0SAdrian Chadd 
1792375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
1793375307d4SAdrian Chadd 
1794eb6f0de0SAdrian Chadd 	/*
1795eb6f0de0SAdrian Chadd 	 * Determine the target hardware queue.
1796eb6f0de0SAdrian Chadd 	 *
1797b43facbfSAdrian Chadd 	 * For multicast frames, the txq gets overridden appropriately
1798b43facbfSAdrian Chadd 	 * depending upon the state of PS.
1799eb6f0de0SAdrian Chadd 	 *
1800eb6f0de0SAdrian Chadd 	 * For any other frame, we do a TID/QoS lookup inside the frame
1801eb6f0de0SAdrian Chadd 	 * to see what the TID should be. If it's a non-QoS frame, the
1802eb6f0de0SAdrian Chadd 	 * AC and TID are overridden. The TID/TXQ code assumes the
1803eb6f0de0SAdrian Chadd 	 * TID is on a predictable hardware TXQ, so we don't support
1804eb6f0de0SAdrian Chadd 	 * having a node TID queued to multiple hardware TXQs.
1805eb6f0de0SAdrian Chadd 	 * This may change in the future but would require some locking
1806eb6f0de0SAdrian Chadd 	 * fudgery.
1807eb6f0de0SAdrian Chadd 	 */
1808eb6f0de0SAdrian Chadd 	pri = ath_tx_getac(sc, m0);
1809eb6f0de0SAdrian Chadd 	tid = ath_tx_gettid(sc, m0);
1810eb6f0de0SAdrian Chadd 
1811eb6f0de0SAdrian Chadd 	txq = sc->sc_ac2q[pri];
1812eb6f0de0SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1813eb6f0de0SAdrian Chadd 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1814eb6f0de0SAdrian Chadd 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1815eb6f0de0SAdrian Chadd 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1816eb6f0de0SAdrian Chadd 
18179c85ff91SAdrian Chadd 	/*
18189c85ff91SAdrian Chadd 	 * Enforce how deep the multicast queue can grow.
18199c85ff91SAdrian Chadd 	 *
18209c85ff91SAdrian Chadd 	 * XXX duplicated in ath_raw_xmit().
18219c85ff91SAdrian Chadd 	 */
18229c85ff91SAdrian Chadd 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1823b09e37a1SAdrian Chadd 		if (sc->sc_cabq->axq_depth > sc->sc_txq_mcastq_maxdepth) {
18249c85ff91SAdrian Chadd 			sc->sc_stats.ast_tx_mcastq_overflow++;
18259c85ff91SAdrian Chadd 			r = ENOBUFS;
18269c85ff91SAdrian Chadd 		}
18279c85ff91SAdrian Chadd 		if (r != 0) {
18289c85ff91SAdrian Chadd 			m_freem(m0);
18299c85ff91SAdrian Chadd 			return r;
18309c85ff91SAdrian Chadd 		}
18319c85ff91SAdrian Chadd 	}
18329c85ff91SAdrian Chadd 
1833eb6f0de0SAdrian Chadd 	/* A-MPDU TX */
1834eb6f0de0SAdrian Chadd 	is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1835eb6f0de0SAdrian Chadd 	is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1836eb6f0de0SAdrian Chadd 	is_ampdu = is_ampdu_tx | is_ampdu_pending;
1837eb6f0de0SAdrian Chadd 
1838a108d2d6SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
1839a108d2d6SAdrian Chadd 	    __func__, tid, pri, is_ampdu);
1840eb6f0de0SAdrian Chadd 
184146634305SAdrian Chadd 	/* Set local packet state, used to queue packets to hardware */
184246634305SAdrian Chadd 	bf->bf_state.bfs_tid = tid;
184346634305SAdrian Chadd 	bf->bf_state.bfs_txq = txq;
184446634305SAdrian Chadd 	bf->bf_state.bfs_pri = pri;
184546634305SAdrian Chadd 
1846c5940c30SAdrian Chadd 	/*
1847b43facbfSAdrian Chadd 	 * When servicing one or more stations in power-save mode
1848b43facbfSAdrian Chadd 	 * (or) if there is some mcast data waiting on the mcast
1849b43facbfSAdrian Chadd 	 * queue (to prevent out of order delivery) multicast frames
1850b43facbfSAdrian Chadd 	 * must be bufferd until after the beacon.
1851b43facbfSAdrian Chadd 	 *
1852b43facbfSAdrian Chadd 	 * TODO: we should lock the mcastq before we check the length.
1853c5940c30SAdrian Chadd 	 */
185446634305SAdrian Chadd 	if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) {
1855eb6f0de0SAdrian Chadd 		txq = &avp->av_mcastq;
185646634305SAdrian Chadd 		/*
185746634305SAdrian Chadd 		 * Mark the frame as eventually belonging on the CAB
185846634305SAdrian Chadd 		 * queue, so the descriptor setup functions will
185946634305SAdrian Chadd 		 * correctly initialise the descriptor 'qcuId' field.
186046634305SAdrian Chadd 		 */
186146634305SAdrian Chadd 		bf->bf_state.bfs_txq = sc->sc_cabq;
186246634305SAdrian Chadd 	}
1863eb6f0de0SAdrian Chadd 
1864eb6f0de0SAdrian Chadd 	/* Do the generic frame setup */
1865eb6f0de0SAdrian Chadd 	/* XXX should just bzero the bf_state? */
1866eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_dobaw = 0;
1867eb6f0de0SAdrian Chadd 
18687561cb5cSAdrian Chadd 	/* A-MPDU TX? Manually set sequence number */
18697561cb5cSAdrian Chadd 	/*
18707561cb5cSAdrian Chadd 	 * Don't do it whilst pending; the net80211 layer still
18717561cb5cSAdrian Chadd 	 * assigns them.
18727561cb5cSAdrian Chadd 	 */
18737561cb5cSAdrian Chadd 	if (is_ampdu_tx) {
1874eb6f0de0SAdrian Chadd 		/*
1875eb6f0de0SAdrian Chadd 		 * Always call; this function will
1876eb6f0de0SAdrian Chadd 		 * handle making sure that null data frames
1877eb6f0de0SAdrian Chadd 		 * don't get a sequence number from the current
1878eb6f0de0SAdrian Chadd 		 * TID and thus mess with the BAW.
1879eb6f0de0SAdrian Chadd 		 */
1880a108d2d6SAdrian Chadd 		seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
188142f4d061SAdrian Chadd 
188242f4d061SAdrian Chadd 		/*
188342f4d061SAdrian Chadd 		 * Don't add QoS NULL frames to the BAW.
188442f4d061SAdrian Chadd 		 */
1885a108d2d6SAdrian Chadd 		if (IEEE80211_QOS_HAS_SEQ(wh) &&
1886a108d2d6SAdrian Chadd 		    subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) {
1887eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 1;
1888eb6f0de0SAdrian Chadd 		}
1889c1782ce0SAdrian Chadd 	}
1890c1782ce0SAdrian Chadd 
1891eb6f0de0SAdrian Chadd 	/*
1892eb6f0de0SAdrian Chadd 	 * If needed, the sequence number has been assigned.
1893eb6f0de0SAdrian Chadd 	 * Squirrel it away somewhere easy to get to.
1894eb6f0de0SAdrian Chadd 	 */
1895a108d2d6SAdrian Chadd 	bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
1896b8e788a5SAdrian Chadd 
1897eb6f0de0SAdrian Chadd 	/* Is ampdu pending? fetch the seqno and print it out */
1898eb6f0de0SAdrian Chadd 	if (is_ampdu_pending)
1899eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1900eb6f0de0SAdrian Chadd 		    "%s: tid %d: ampdu pending, seqno %d\n",
1901eb6f0de0SAdrian Chadd 		    __func__, tid, M_SEQNO_GET(m0));
1902eb6f0de0SAdrian Chadd 
1903eb6f0de0SAdrian Chadd 	/* This also sets up the DMA map */
1904b43facbfSAdrian Chadd 	r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
1905eb6f0de0SAdrian Chadd 
1906eb6f0de0SAdrian Chadd 	if (r != 0)
19077561cb5cSAdrian Chadd 		goto done;
1908eb6f0de0SAdrian Chadd 
1909eb6f0de0SAdrian Chadd 	/* At this point m0 could have changed! */
1910eb6f0de0SAdrian Chadd 	m0 = bf->bf_m;
1911eb6f0de0SAdrian Chadd 
1912eb6f0de0SAdrian Chadd #if 1
1913eb6f0de0SAdrian Chadd 	/*
1914eb6f0de0SAdrian Chadd 	 * If it's a multicast frame, do a direct-dispatch to the
1915eb6f0de0SAdrian Chadd 	 * destination hardware queue. Don't bother software
1916eb6f0de0SAdrian Chadd 	 * queuing it.
1917eb6f0de0SAdrian Chadd 	 */
1918eb6f0de0SAdrian Chadd 	/*
1919eb6f0de0SAdrian Chadd 	 * If it's a BAR frame, do a direct dispatch to the
1920eb6f0de0SAdrian Chadd 	 * destination hardware queue. Don't bother software
1921eb6f0de0SAdrian Chadd 	 * queuing it, as the TID will now be paused.
1922eb6f0de0SAdrian Chadd 	 * Sending a BAR frame can occur from the net80211 txa timer
1923eb6f0de0SAdrian Chadd 	 * (ie, retries) or from the ath txtask (completion call.)
1924eb6f0de0SAdrian Chadd 	 * It queues directly to hardware because the TID is paused
1925eb6f0de0SAdrian Chadd 	 * at this point (and won't be unpaused until the BAR has
1926eb6f0de0SAdrian Chadd 	 * either been TXed successfully or max retries has been
1927eb6f0de0SAdrian Chadd 	 * reached.)
1928eb6f0de0SAdrian Chadd 	 */
1929eb6f0de0SAdrian Chadd 	if (txq == &avp->av_mcastq) {
1930d3a6425bSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX,
19310b96ef63SAdrian Chadd 		    "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
19324e81f27cSAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1933eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, txq, bf);
1934eb6f0de0SAdrian Chadd 	} else if (type == IEEE80211_FC0_TYPE_CTL &&
1935eb6f0de0SAdrian Chadd 		    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1936d3a6425bSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1937eb6f0de0SAdrian Chadd 		    "%s: BAR: TX'ing direct\n", __func__);
19384e81f27cSAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1939eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, txq, bf);
1940eb6f0de0SAdrian Chadd 	} else {
1941eb6f0de0SAdrian Chadd 		/* add to software queue */
1942d3a6425bSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX,
19430b96ef63SAdrian Chadd 		    "%s: bf=%p: swq: TX'ing\n", __func__, bf);
1944eb6f0de0SAdrian Chadd 		ath_tx_swq(sc, ni, txq, bf);
1945eb6f0de0SAdrian Chadd 	}
1946eb6f0de0SAdrian Chadd #else
1947eb6f0de0SAdrian Chadd 	/*
1948eb6f0de0SAdrian Chadd 	 * For now, since there's no software queue,
1949eb6f0de0SAdrian Chadd 	 * direct-dispatch to the hardware.
1950eb6f0de0SAdrian Chadd 	 */
19514e81f27cSAdrian Chadd 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1952eb6f0de0SAdrian Chadd 	ath_tx_xmit_normal(sc, txq, bf);
1953eb6f0de0SAdrian Chadd #endif
19547561cb5cSAdrian Chadd done:
1955b8e788a5SAdrian Chadd 	return 0;
1956b8e788a5SAdrian Chadd }
1957b8e788a5SAdrian Chadd 
1958b8e788a5SAdrian Chadd static int
1959b8e788a5SAdrian Chadd ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
1960b8e788a5SAdrian Chadd 	struct ath_buf *bf, struct mbuf *m0,
1961b8e788a5SAdrian Chadd 	const struct ieee80211_bpf_params *params)
1962b8e788a5SAdrian Chadd {
1963b8e788a5SAdrian Chadd 	struct ifnet *ifp = sc->sc_ifp;
1964b8e788a5SAdrian Chadd 	struct ieee80211com *ic = ifp->if_l2com;
1965b8e788a5SAdrian Chadd 	struct ath_hal *ah = sc->sc_ah;
1966b8e788a5SAdrian Chadd 	struct ieee80211vap *vap = ni->ni_vap;
1967b8e788a5SAdrian Chadd 	int error, ismcast, ismrr;
1968b8e788a5SAdrian Chadd 	int keyix, hdrlen, pktlen, try0, txantenna;
1969eb6f0de0SAdrian Chadd 	u_int8_t rix, txrate;
1970b8e788a5SAdrian Chadd 	struct ieee80211_frame *wh;
1971eb6f0de0SAdrian Chadd 	u_int flags;
1972b8e788a5SAdrian Chadd 	HAL_PKT_TYPE atype;
1973b8e788a5SAdrian Chadd 	const HAL_RATE_TABLE *rt;
1974b8e788a5SAdrian Chadd 	struct ath_desc *ds;
1975b8e788a5SAdrian Chadd 	u_int pri;
1976eb6f0de0SAdrian Chadd 	int o_tid = -1;
1977eb6f0de0SAdrian Chadd 	int do_override;
1978b8e788a5SAdrian Chadd 
1979375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
1980375307d4SAdrian Chadd 
1981b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
1982b8e788a5SAdrian Chadd 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1983b8e788a5SAdrian Chadd 	hdrlen = ieee80211_anyhdrsize(wh);
1984b8e788a5SAdrian Chadd 	/*
1985b8e788a5SAdrian Chadd 	 * Packet length must not include any
1986b8e788a5SAdrian Chadd 	 * pad bytes; deduct them here.
1987b8e788a5SAdrian Chadd 	 */
1988b8e788a5SAdrian Chadd 	/* XXX honor IEEE80211_BPF_DATAPAD */
1989b8e788a5SAdrian Chadd 	pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
1990b8e788a5SAdrian Chadd 
199103682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_TX, 2,
199203682514SAdrian Chadd 	     "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf);
199303682514SAdrian Chadd 
1994eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
1995eb6f0de0SAdrian Chadd 	    __func__, ismcast);
1996eb6f0de0SAdrian Chadd 
19977561cb5cSAdrian Chadd 	pri = params->ibp_pri & 3;
19987561cb5cSAdrian Chadd 	/* Override pri if the frame isn't a QoS one */
19997561cb5cSAdrian Chadd 	if (! IEEE80211_QOS_HAS_SEQ(wh))
20007561cb5cSAdrian Chadd 		pri = ath_tx_getac(sc, m0);
20017561cb5cSAdrian Chadd 
20027561cb5cSAdrian Chadd 	/* XXX If it's an ADDBA, override the correct queue */
20037561cb5cSAdrian Chadd 	do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
20047561cb5cSAdrian Chadd 
20057561cb5cSAdrian Chadd 	/* Map ADDBA to the correct priority */
20067561cb5cSAdrian Chadd 	if (do_override) {
20077561cb5cSAdrian Chadd #if 0
20087561cb5cSAdrian Chadd 		device_printf(sc->sc_dev,
20097561cb5cSAdrian Chadd 		    "%s: overriding tid %d pri %d -> %d\n",
20107561cb5cSAdrian Chadd 		    __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
20117561cb5cSAdrian Chadd #endif
20127561cb5cSAdrian Chadd 		pri = TID_TO_WME_AC(o_tid);
20137561cb5cSAdrian Chadd 	}
20147561cb5cSAdrian Chadd 
201581a82688SAdrian Chadd 	/* Handle encryption twiddling if needed */
2016eb6f0de0SAdrian Chadd 	if (! ath_tx_tag_crypto(sc, ni,
2017eb6f0de0SAdrian Chadd 	    m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
2018eb6f0de0SAdrian Chadd 	    &hdrlen, &pktlen, &keyix)) {
2019b8e788a5SAdrian Chadd 		ath_freetx(m0);
2020b8e788a5SAdrian Chadd 		return EIO;
2021b8e788a5SAdrian Chadd 	}
2022b8e788a5SAdrian Chadd 	/* packet header may have moved, reset our local pointer */
2023b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2024b8e788a5SAdrian Chadd 
2025eb6f0de0SAdrian Chadd 	/* Do the generic frame setup */
2026eb6f0de0SAdrian Chadd 	/* XXX should just bzero the bf_state? */
2027eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_dobaw = 0;
2028eb6f0de0SAdrian Chadd 
2029b8e788a5SAdrian Chadd 	error = ath_tx_dmasetup(sc, bf, m0);
2030b8e788a5SAdrian Chadd 	if (error != 0)
2031b8e788a5SAdrian Chadd 		return error;
2032b8e788a5SAdrian Chadd 	m0 = bf->bf_m;				/* NB: may have changed */
2033b8e788a5SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2034b8e788a5SAdrian Chadd 	bf->bf_node = ni;			/* NB: held reference */
2035b8e788a5SAdrian Chadd 
20364e81f27cSAdrian Chadd 	/* Always enable CLRDMASK for raw frames for now.. */
2037b8e788a5SAdrian Chadd 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
2038b8e788a5SAdrian Chadd 	flags |= HAL_TXDESC_INTREQ;		/* force interrupt */
2039b8e788a5SAdrian Chadd 	if (params->ibp_flags & IEEE80211_BPF_RTS)
2040b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_RTSENA;
2041eb6f0de0SAdrian Chadd 	else if (params->ibp_flags & IEEE80211_BPF_CTS) {
2042eb6f0de0SAdrian Chadd 		/* XXX assume 11g/11n protection? */
2043eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_doprot = 1;
2044b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_CTSENA;
2045eb6f0de0SAdrian Chadd 	}
2046b8e788a5SAdrian Chadd 	/* XXX leave ismcast to injector? */
2047b8e788a5SAdrian Chadd 	if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
2048b8e788a5SAdrian Chadd 		flags |= HAL_TXDESC_NOACK;
2049b8e788a5SAdrian Chadd 
2050b8e788a5SAdrian Chadd 	rt = sc->sc_currates;
2051b8e788a5SAdrian Chadd 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2052b8e788a5SAdrian Chadd 	rix = ath_tx_findrix(sc, params->ibp_rate0);
2053b8e788a5SAdrian Chadd 	txrate = rt->info[rix].rateCode;
2054b8e788a5SAdrian Chadd 	if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
2055b8e788a5SAdrian Chadd 		txrate |= rt->info[rix].shortPreamble;
2056b8e788a5SAdrian Chadd 	sc->sc_txrix = rix;
2057b8e788a5SAdrian Chadd 	try0 = params->ibp_try0;
2058b8e788a5SAdrian Chadd 	ismrr = (params->ibp_try1 != 0);
2059b8e788a5SAdrian Chadd 	txantenna = params->ibp_pri >> 2;
2060b8e788a5SAdrian Chadd 	if (txantenna == 0)			/* XXX? */
2061b8e788a5SAdrian Chadd 		txantenna = sc->sc_txantenna;
206279f02dbfSAdrian Chadd 
206379f02dbfSAdrian Chadd 	/*
2064eb6f0de0SAdrian Chadd 	 * Since ctsrate is fixed, store it away for later
2065eb6f0de0SAdrian Chadd 	 * use when the descriptor fields are being set.
206679f02dbfSAdrian Chadd 	 */
2067eb6f0de0SAdrian Chadd 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
2068eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
206979f02dbfSAdrian Chadd 
2070b8e788a5SAdrian Chadd 	/*
2071b8e788a5SAdrian Chadd 	 * NB: we mark all packets as type PSPOLL so the h/w won't
2072b8e788a5SAdrian Chadd 	 * set the sequence number, duration, etc.
2073b8e788a5SAdrian Chadd 	 */
2074b8e788a5SAdrian Chadd 	atype = HAL_PKT_TYPE_PSPOLL;
2075b8e788a5SAdrian Chadd 
2076b8e788a5SAdrian Chadd 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
2077b8e788a5SAdrian Chadd 		ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
2078b8e788a5SAdrian Chadd 		    sc->sc_hwmap[rix].ieeerate, -1);
2079b8e788a5SAdrian Chadd 
2080b8e788a5SAdrian Chadd 	if (ieee80211_radiotap_active_vap(vap)) {
2081b8e788a5SAdrian Chadd 		u_int64_t tsf = ath_hal_gettsf64(ah);
2082b8e788a5SAdrian Chadd 
2083b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_tsf = htole64(tsf);
2084b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
2085b8e788a5SAdrian Chadd 		if (wh->i_fc[1] & IEEE80211_FC1_WEP)
2086b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2087b8e788a5SAdrian Chadd 		if (m0->m_flags & M_FRAG)
2088b8e788a5SAdrian Chadd 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
2089b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
2090b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_txpower = ni->ni_txpower;
2091b8e788a5SAdrian Chadd 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
2092b8e788a5SAdrian Chadd 
2093b8e788a5SAdrian Chadd 		ieee80211_radiotap_tx(vap, m0);
2094b8e788a5SAdrian Chadd 	}
2095b8e788a5SAdrian Chadd 
2096b8e788a5SAdrian Chadd 	/*
2097b8e788a5SAdrian Chadd 	 * Formulate first tx descriptor with tx controls.
2098b8e788a5SAdrian Chadd 	 */
2099b8e788a5SAdrian Chadd 	ds = bf->bf_desc;
2100b8e788a5SAdrian Chadd 	/* XXX check return value? */
2101eb6f0de0SAdrian Chadd 
2102eb6f0de0SAdrian Chadd 	/* Store the decided rate index values away */
2103eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_pktlen = pktlen;
2104eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_hdrlen = hdrlen;
2105eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_atype = atype;
2106eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txpower = params->ibp_power;
2107eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txrate0 = txrate;
2108eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_try0 = try0;
2109eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_keyix = keyix;
2110eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txantenna = txantenna;
2111875a9451SAdrian Chadd 	bf->bf_state.bfs_txflags = flags;
2112eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_shpream =
2113eb6f0de0SAdrian Chadd 	    !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
2114b8e788a5SAdrian Chadd 
211546634305SAdrian Chadd 	/* Set local packet state, used to queue packets to hardware */
211646634305SAdrian Chadd 	bf->bf_state.bfs_tid = WME_AC_TO_TID(pri);
211746634305SAdrian Chadd 	bf->bf_state.bfs_txq = sc->sc_ac2q[pri];
211846634305SAdrian Chadd 	bf->bf_state.bfs_pri = pri;
211946634305SAdrian Chadd 
2120eb6f0de0SAdrian Chadd 	/* XXX this should be done in ath_tx_setrate() */
2121eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsrate = 0;
2122eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ctsduration = 0;
2123eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_ismrr = ismrr;
2124eb6f0de0SAdrian Chadd 
2125eb6f0de0SAdrian Chadd 	/* Blank the legacy rate array */
2126eb6f0de0SAdrian Chadd 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
2127eb6f0de0SAdrian Chadd 
2128eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].rix =
2129eb6f0de0SAdrian Chadd 	    ath_tx_findrix(sc, params->ibp_rate0);
2130eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].tries = try0;
2131eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_rc[0].ratecode = txrate;
2132c1782ce0SAdrian Chadd 
2133c1782ce0SAdrian Chadd 	if (ismrr) {
2134eb6f0de0SAdrian Chadd 		int rix;
2135c1782ce0SAdrian Chadd 
2136b8e788a5SAdrian Chadd 		rix = ath_tx_findrix(sc, params->ibp_rate1);
2137eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[1].rix = rix;
2138eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
2139c1782ce0SAdrian Chadd 
2140eb6f0de0SAdrian Chadd 		rix = ath_tx_findrix(sc, params->ibp_rate2);
2141eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[2].rix = rix;
2142eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
2143eb6f0de0SAdrian Chadd 
2144eb6f0de0SAdrian Chadd 		rix = ath_tx_findrix(sc, params->ibp_rate3);
2145eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].rix = rix;
2146eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
2147c1782ce0SAdrian Chadd 	}
2148eb6f0de0SAdrian Chadd 	/*
2149eb6f0de0SAdrian Chadd 	 * All the required rate control decisions have been made;
2150eb6f0de0SAdrian Chadd 	 * fill in the rc flags.
2151eb6f0de0SAdrian Chadd 	 */
2152eb6f0de0SAdrian Chadd 	ath_tx_rate_fill_rcflags(sc, bf);
2153b8e788a5SAdrian Chadd 
2154b8e788a5SAdrian Chadd 	/* NB: no buffered multicast in power save support */
2155eb6f0de0SAdrian Chadd 
2156eb6f0de0SAdrian Chadd 	/*
2157eb6f0de0SAdrian Chadd 	 * If we're overiding the ADDBA destination, dump directly
2158eb6f0de0SAdrian Chadd 	 * into the hardware queue, right after any pending
2159eb6f0de0SAdrian Chadd 	 * frames to that node are.
2160eb6f0de0SAdrian Chadd 	 */
2161eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
2162eb6f0de0SAdrian Chadd 	    __func__, do_override);
2163eb6f0de0SAdrian Chadd 
216494eefcf1SAdrian Chadd #if 1
2165eb6f0de0SAdrian Chadd 	if (do_override) {
21664e81f27cSAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2167eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2168eb6f0de0SAdrian Chadd 	} else {
2169eb6f0de0SAdrian Chadd 		/* Queue to software queue */
2170eb6f0de0SAdrian Chadd 		ath_tx_swq(sc, ni, sc->sc_ac2q[pri], bf);
2171eb6f0de0SAdrian Chadd 	}
217294eefcf1SAdrian Chadd #else
217394eefcf1SAdrian Chadd 	/* Direct-dispatch to the hardware */
217494eefcf1SAdrian Chadd 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
217594eefcf1SAdrian Chadd 	ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
217694eefcf1SAdrian Chadd #endif
2177b8e788a5SAdrian Chadd 	return 0;
2178b8e788a5SAdrian Chadd }
2179b8e788a5SAdrian Chadd 
2180eb6f0de0SAdrian Chadd /*
2181eb6f0de0SAdrian Chadd  * Send a raw frame.
2182eb6f0de0SAdrian Chadd  *
2183eb6f0de0SAdrian Chadd  * This can be called by net80211.
2184eb6f0de0SAdrian Chadd  */
2185b8e788a5SAdrian Chadd int
2186b8e788a5SAdrian Chadd ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2187b8e788a5SAdrian Chadd 	const struct ieee80211_bpf_params *params)
2188b8e788a5SAdrian Chadd {
2189b8e788a5SAdrian Chadd 	struct ieee80211com *ic = ni->ni_ic;
2190b8e788a5SAdrian Chadd 	struct ifnet *ifp = ic->ic_ifp;
2191b8e788a5SAdrian Chadd 	struct ath_softc *sc = ifp->if_softc;
2192b8e788a5SAdrian Chadd 	struct ath_buf *bf;
21939c85ff91SAdrian Chadd 	struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
21949c85ff91SAdrian Chadd 	int error = 0;
2195b8e788a5SAdrian Chadd 
2196ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
2197ef27340cSAdrian Chadd 	if (sc->sc_inreset_cnt > 0) {
2198ef27340cSAdrian Chadd 		device_printf(sc->sc_dev, "%s: sc_inreset_cnt > 0; bailing\n",
2199ef27340cSAdrian Chadd 		    __func__);
2200ef27340cSAdrian Chadd 		error = EIO;
2201ef27340cSAdrian Chadd 		ATH_PCU_UNLOCK(sc);
2202ef27340cSAdrian Chadd 		goto bad0;
2203ef27340cSAdrian Chadd 	}
2204ef27340cSAdrian Chadd 	sc->sc_txstart_cnt++;
2205ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
2206ef27340cSAdrian Chadd 
22071b5c5f5aSAdrian Chadd 	ATH_TX_LOCK(sc);
22081b5c5f5aSAdrian Chadd 
2209b8e788a5SAdrian Chadd 	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
2210b8e788a5SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
2211b8e788a5SAdrian Chadd 		    (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ?
2212b8e788a5SAdrian Chadd 			"!running" : "invalid");
2213b8e788a5SAdrian Chadd 		m_freem(m);
2214b8e788a5SAdrian Chadd 		error = ENETDOWN;
2215b8e788a5SAdrian Chadd 		goto bad;
2216b8e788a5SAdrian Chadd 	}
22179c85ff91SAdrian Chadd 
22189c85ff91SAdrian Chadd 	/*
22199c85ff91SAdrian Chadd 	 * Enforce how deep the multicast queue can grow.
22209c85ff91SAdrian Chadd 	 *
22219c85ff91SAdrian Chadd 	 * XXX duplicated in ath_tx_start().
22229c85ff91SAdrian Chadd 	 */
22239c85ff91SAdrian Chadd 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2224b09e37a1SAdrian Chadd 		if (sc->sc_cabq->axq_depth > sc->sc_txq_mcastq_maxdepth) {
22259c85ff91SAdrian Chadd 			sc->sc_stats.ast_tx_mcastq_overflow++;
22269c85ff91SAdrian Chadd 			error = ENOBUFS;
22279c85ff91SAdrian Chadd 		}
22289c85ff91SAdrian Chadd 
22299c85ff91SAdrian Chadd 		if (error != 0) {
22309c85ff91SAdrian Chadd 			m_freem(m);
22319c85ff91SAdrian Chadd 			goto bad;
22329c85ff91SAdrian Chadd 		}
22339c85ff91SAdrian Chadd 	}
22349c85ff91SAdrian Chadd 
2235b8e788a5SAdrian Chadd 	/*
2236b8e788a5SAdrian Chadd 	 * Grab a TX buffer and associated resources.
2237b8e788a5SAdrian Chadd 	 */
2238af33d486SAdrian Chadd 	bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT);
2239b8e788a5SAdrian Chadd 	if (bf == NULL) {
2240b8e788a5SAdrian Chadd 		sc->sc_stats.ast_tx_nobuf++;
2241b8e788a5SAdrian Chadd 		m_freem(m);
2242b8e788a5SAdrian Chadd 		error = ENOBUFS;
2243b8e788a5SAdrian Chadd 		goto bad;
2244b8e788a5SAdrian Chadd 	}
224503682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n",
224603682514SAdrian Chadd 	    m, params,  bf);
2247b8e788a5SAdrian Chadd 
2248b8e788a5SAdrian Chadd 	if (params == NULL) {
2249b8e788a5SAdrian Chadd 		/*
2250b8e788a5SAdrian Chadd 		 * Legacy path; interpret frame contents to decide
2251b8e788a5SAdrian Chadd 		 * precisely how to send the frame.
2252b8e788a5SAdrian Chadd 		 */
2253b8e788a5SAdrian Chadd 		if (ath_tx_start(sc, ni, bf, m)) {
2254b8e788a5SAdrian Chadd 			error = EIO;		/* XXX */
2255b8e788a5SAdrian Chadd 			goto bad2;
2256b8e788a5SAdrian Chadd 		}
2257b8e788a5SAdrian Chadd 	} else {
2258b8e788a5SAdrian Chadd 		/*
2259b8e788a5SAdrian Chadd 		 * Caller supplied explicit parameters to use in
2260b8e788a5SAdrian Chadd 		 * sending the frame.
2261b8e788a5SAdrian Chadd 		 */
2262b8e788a5SAdrian Chadd 		if (ath_tx_raw_start(sc, ni, bf, m, params)) {
2263b8e788a5SAdrian Chadd 			error = EIO;		/* XXX */
2264b8e788a5SAdrian Chadd 			goto bad2;
2265b8e788a5SAdrian Chadd 		}
2266b8e788a5SAdrian Chadd 	}
2267b8e788a5SAdrian Chadd 	sc->sc_wd_timer = 5;
2268b8e788a5SAdrian Chadd 	ifp->if_opackets++;
2269b8e788a5SAdrian Chadd 	sc->sc_stats.ast_tx_raw++;
2270b8e788a5SAdrian Chadd 
2271548a605dSAdrian Chadd 	/*
2272548a605dSAdrian Chadd 	 * Update the TIM - if there's anything queued to the
2273548a605dSAdrian Chadd 	 * software queue and power save is enabled, we should
2274548a605dSAdrian Chadd 	 * set the TIM.
2275548a605dSAdrian Chadd 	 */
2276548a605dSAdrian Chadd 	ath_tx_update_tim(sc, ni, 1);
2277548a605dSAdrian Chadd 
2278*974185bbSAdrian Chadd 	ATH_TX_UNLOCK(sc);
2279*974185bbSAdrian Chadd 
2280ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
2281ef27340cSAdrian Chadd 	sc->sc_txstart_cnt--;
2282ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
2283ef27340cSAdrian Chadd 
2284b8e788a5SAdrian Chadd 	return 0;
2285b8e788a5SAdrian Chadd bad2:
228603682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, "
228703682514SAdrian Chadd 	    "bf=%p",
228803682514SAdrian Chadd 	    m,
228903682514SAdrian Chadd 	    params,
229003682514SAdrian Chadd 	    bf);
2291b8e788a5SAdrian Chadd 	ATH_TXBUF_LOCK(sc);
2292e1a50456SAdrian Chadd 	ath_returnbuf_head(sc, bf);
2293b8e788a5SAdrian Chadd 	ATH_TXBUF_UNLOCK(sc);
2294b8e788a5SAdrian Chadd bad:
22951b5c5f5aSAdrian Chadd 
22961b5c5f5aSAdrian Chadd 	ATH_TX_UNLOCK(sc);
22971b5c5f5aSAdrian Chadd 
2298ef27340cSAdrian Chadd 	ATH_PCU_LOCK(sc);
2299ef27340cSAdrian Chadd 	sc->sc_txstart_cnt--;
2300ef27340cSAdrian Chadd 	ATH_PCU_UNLOCK(sc);
2301ef27340cSAdrian Chadd bad0:
230203682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p",
230303682514SAdrian Chadd 	    m, params);
2304b8e788a5SAdrian Chadd 	ifp->if_oerrors++;
2305b8e788a5SAdrian Chadd 	sc->sc_stats.ast_tx_raw_fail++;
2306b8e788a5SAdrian Chadd 	ieee80211_free_node(ni);
2307ef27340cSAdrian Chadd 
2308b8e788a5SAdrian Chadd 	return error;
2309b8e788a5SAdrian Chadd }
2310eb6f0de0SAdrian Chadd 
2311eb6f0de0SAdrian Chadd /* Some helper functions */
2312eb6f0de0SAdrian Chadd 
2313eb6f0de0SAdrian Chadd /*
2314eb6f0de0SAdrian Chadd  * ADDBA (and potentially others) need to be placed in the same
2315eb6f0de0SAdrian Chadd  * hardware queue as the TID/node it's relating to. This is so
2316eb6f0de0SAdrian Chadd  * it goes out after any pending non-aggregate frames to the
2317eb6f0de0SAdrian Chadd  * same node/TID.
2318eb6f0de0SAdrian Chadd  *
2319eb6f0de0SAdrian Chadd  * If this isn't done, the ADDBA can go out before the frames
2320eb6f0de0SAdrian Chadd  * queued in hardware. Even though these frames have a sequence
2321eb6f0de0SAdrian Chadd  * number -earlier- than the ADDBA can be transmitted (but
2322eb6f0de0SAdrian Chadd  * no frames whose sequence numbers are after the ADDBA should
2323eb6f0de0SAdrian Chadd  * be!) they'll arrive after the ADDBA - and the receiving end
2324eb6f0de0SAdrian Chadd  * will simply drop them as being out of the BAW.
2325eb6f0de0SAdrian Chadd  *
2326eb6f0de0SAdrian Chadd  * The frames can't be appended to the TID software queue - it'll
2327eb6f0de0SAdrian Chadd  * never be sent out. So these frames have to be directly
2328eb6f0de0SAdrian Chadd  * dispatched to the hardware, rather than queued in software.
2329eb6f0de0SAdrian Chadd  * So if this function returns true, the TXQ has to be
2330eb6f0de0SAdrian Chadd  * overridden and it has to be directly dispatched.
2331eb6f0de0SAdrian Chadd  *
2332eb6f0de0SAdrian Chadd  * It's a dirty hack, but someone's gotta do it.
2333eb6f0de0SAdrian Chadd  */
2334eb6f0de0SAdrian Chadd 
2335eb6f0de0SAdrian Chadd /*
2336eb6f0de0SAdrian Chadd  * XXX doesn't belong here!
2337eb6f0de0SAdrian Chadd  */
2338eb6f0de0SAdrian Chadd static int
2339eb6f0de0SAdrian Chadd ieee80211_is_action(struct ieee80211_frame *wh)
2340eb6f0de0SAdrian Chadd {
2341eb6f0de0SAdrian Chadd 	/* Type: Management frame? */
2342eb6f0de0SAdrian Chadd 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
2343eb6f0de0SAdrian Chadd 	    IEEE80211_FC0_TYPE_MGT)
2344eb6f0de0SAdrian Chadd 		return 0;
2345eb6f0de0SAdrian Chadd 
2346eb6f0de0SAdrian Chadd 	/* Subtype: Action frame? */
2347eb6f0de0SAdrian Chadd 	if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) !=
2348eb6f0de0SAdrian Chadd 	    IEEE80211_FC0_SUBTYPE_ACTION)
2349eb6f0de0SAdrian Chadd 		return 0;
2350eb6f0de0SAdrian Chadd 
2351eb6f0de0SAdrian Chadd 	return 1;
2352eb6f0de0SAdrian Chadd }
2353eb6f0de0SAdrian Chadd 
2354eb6f0de0SAdrian Chadd #define	MS(_v, _f)	(((_v) & _f) >> _f##_S)
2355eb6f0de0SAdrian Chadd /*
2356eb6f0de0SAdrian Chadd  * Return an alternate TID for ADDBA request frames.
2357eb6f0de0SAdrian Chadd  *
2358eb6f0de0SAdrian Chadd  * Yes, this likely should be done in the net80211 layer.
2359eb6f0de0SAdrian Chadd  */
2360eb6f0de0SAdrian Chadd static int
2361eb6f0de0SAdrian Chadd ath_tx_action_frame_override_queue(struct ath_softc *sc,
2362eb6f0de0SAdrian Chadd     struct ieee80211_node *ni,
2363eb6f0de0SAdrian Chadd     struct mbuf *m0, int *tid)
2364eb6f0de0SAdrian Chadd {
2365eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
2366eb6f0de0SAdrian Chadd 	struct ieee80211_action_ba_addbarequest *ia;
2367eb6f0de0SAdrian Chadd 	uint8_t *frm;
2368eb6f0de0SAdrian Chadd 	uint16_t baparamset;
2369eb6f0de0SAdrian Chadd 
2370eb6f0de0SAdrian Chadd 	/* Not action frame? Bail */
2371eb6f0de0SAdrian Chadd 	if (! ieee80211_is_action(wh))
2372eb6f0de0SAdrian Chadd 		return 0;
2373eb6f0de0SAdrian Chadd 
2374eb6f0de0SAdrian Chadd 	/* XXX Not needed for frames we send? */
2375eb6f0de0SAdrian Chadd #if 0
2376eb6f0de0SAdrian Chadd 	/* Correct length? */
2377eb6f0de0SAdrian Chadd 	if (! ieee80211_parse_action(ni, m))
2378eb6f0de0SAdrian Chadd 		return 0;
2379eb6f0de0SAdrian Chadd #endif
2380eb6f0de0SAdrian Chadd 
2381eb6f0de0SAdrian Chadd 	/* Extract out action frame */
2382eb6f0de0SAdrian Chadd 	frm = (u_int8_t *)&wh[1];
2383eb6f0de0SAdrian Chadd 	ia = (struct ieee80211_action_ba_addbarequest *) frm;
2384eb6f0de0SAdrian Chadd 
2385eb6f0de0SAdrian Chadd 	/* Not ADDBA? Bail */
2386eb6f0de0SAdrian Chadd 	if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
2387eb6f0de0SAdrian Chadd 		return 0;
2388eb6f0de0SAdrian Chadd 	if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2389eb6f0de0SAdrian Chadd 		return 0;
2390eb6f0de0SAdrian Chadd 
2391eb6f0de0SAdrian Chadd 	/* Extract TID, return it */
2392eb6f0de0SAdrian Chadd 	baparamset = le16toh(ia->rq_baparamset);
2393eb6f0de0SAdrian Chadd 	*tid = (int) MS(baparamset, IEEE80211_BAPS_TID);
2394eb6f0de0SAdrian Chadd 
2395eb6f0de0SAdrian Chadd 	return 1;
2396eb6f0de0SAdrian Chadd }
2397eb6f0de0SAdrian Chadd #undef	MS
2398eb6f0de0SAdrian Chadd 
2399eb6f0de0SAdrian Chadd /* Per-node software queue operations */
2400eb6f0de0SAdrian Chadd 
2401eb6f0de0SAdrian Chadd /*
2402eb6f0de0SAdrian Chadd  * Add the current packet to the given BAW.
2403eb6f0de0SAdrian Chadd  * It is assumed that the current packet
2404eb6f0de0SAdrian Chadd  *
2405eb6f0de0SAdrian Chadd  * + fits inside the BAW;
2406eb6f0de0SAdrian Chadd  * + already has had a sequence number allocated.
2407eb6f0de0SAdrian Chadd  *
2408eb6f0de0SAdrian Chadd  * Since the BAW status may be modified by both the ath task and
2409eb6f0de0SAdrian Chadd  * the net80211/ifnet contexts, the TID must be locked.
2410eb6f0de0SAdrian Chadd  */
2411eb6f0de0SAdrian Chadd void
2412eb6f0de0SAdrian Chadd ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2413eb6f0de0SAdrian Chadd     struct ath_tid *tid, struct ath_buf *bf)
2414eb6f0de0SAdrian Chadd {
2415eb6f0de0SAdrian Chadd 	int index, cindex;
2416eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2417eb6f0de0SAdrian Chadd 
2418375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2419eb6f0de0SAdrian Chadd 
2420eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_isretried)
2421eb6f0de0SAdrian Chadd 		return;
2422eb6f0de0SAdrian Chadd 
2423c7c07341SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
2424c7c07341SAdrian Chadd 
24257561cb5cSAdrian Chadd 	if (! bf->bf_state.bfs_dobaw) {
24267561cb5cSAdrian Chadd 		device_printf(sc->sc_dev,
24277561cb5cSAdrian Chadd 		    "%s: dobaw=0, seqno=%d, window %d:%d\n",
24287561cb5cSAdrian Chadd 		    __func__,
24297561cb5cSAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno),
24307561cb5cSAdrian Chadd 		    tap->txa_start,
24317561cb5cSAdrian Chadd 		    tap->txa_wnd);
24327561cb5cSAdrian Chadd 	}
24337561cb5cSAdrian Chadd 
2434eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_addedbaw)
2435eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2436a108d2d6SAdrian Chadd 		    "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2437d4365d16SAdrian Chadd 		    "baw head=%d tail=%d\n",
2438a108d2d6SAdrian Chadd 		    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2439d4365d16SAdrian Chadd 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2440d4365d16SAdrian Chadd 		    tid->baw_tail);
2441eb6f0de0SAdrian Chadd 
2442eb6f0de0SAdrian Chadd 	/*
24437561cb5cSAdrian Chadd 	 * Verify that the given sequence number is not outside of the
24447561cb5cSAdrian Chadd 	 * BAW.  Complain loudly if that's the case.
24457561cb5cSAdrian Chadd 	 */
24467561cb5cSAdrian Chadd 	if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
24477561cb5cSAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno))) {
24487561cb5cSAdrian Chadd 		device_printf(sc->sc_dev,
24497561cb5cSAdrian Chadd 		    "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; "
24507561cb5cSAdrian Chadd 		    "baw head=%d tail=%d\n",
24517561cb5cSAdrian Chadd 		    __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
24527561cb5cSAdrian Chadd 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
24537561cb5cSAdrian Chadd 		    tid->baw_tail);
24547561cb5cSAdrian Chadd 	}
24557561cb5cSAdrian Chadd 
24567561cb5cSAdrian Chadd 	/*
2457eb6f0de0SAdrian Chadd 	 * ni->ni_txseqs[] is the currently allocated seqno.
2458eb6f0de0SAdrian Chadd 	 * the txa state contains the current baw start.
2459eb6f0de0SAdrian Chadd 	 */
2460eb6f0de0SAdrian Chadd 	index  = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2461eb6f0de0SAdrian Chadd 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2462eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2463a108d2d6SAdrian Chadd 	    "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2464d4365d16SAdrian Chadd 	    "baw head=%d tail=%d\n",
2465a108d2d6SAdrian Chadd 	    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2466d4365d16SAdrian Chadd 	    tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2467d4365d16SAdrian Chadd 	    tid->baw_tail);
2468eb6f0de0SAdrian Chadd 
2469eb6f0de0SAdrian Chadd 
2470eb6f0de0SAdrian Chadd #if 0
2471eb6f0de0SAdrian Chadd 	assert(tid->tx_buf[cindex] == NULL);
2472eb6f0de0SAdrian Chadd #endif
2473eb6f0de0SAdrian Chadd 	if (tid->tx_buf[cindex] != NULL) {
2474eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2475eb6f0de0SAdrian Chadd 		    "%s: ba packet dup (index=%d, cindex=%d, "
2476eb6f0de0SAdrian Chadd 		    "head=%d, tail=%d)\n",
2477eb6f0de0SAdrian Chadd 		    __func__, index, cindex, tid->baw_head, tid->baw_tail);
2478eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2479eb6f0de0SAdrian Chadd 		    "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2480eb6f0de0SAdrian Chadd 		    __func__,
2481eb6f0de0SAdrian Chadd 		    tid->tx_buf[cindex],
2482eb6f0de0SAdrian Chadd 		    SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2483eb6f0de0SAdrian Chadd 		    bf,
2484eb6f0de0SAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno)
2485eb6f0de0SAdrian Chadd 		);
2486eb6f0de0SAdrian Chadd 	}
2487eb6f0de0SAdrian Chadd 	tid->tx_buf[cindex] = bf;
2488eb6f0de0SAdrian Chadd 
2489d4365d16SAdrian Chadd 	if (index >= ((tid->baw_tail - tid->baw_head) &
2490d4365d16SAdrian Chadd 	    (ATH_TID_MAX_BUFS - 1))) {
2491eb6f0de0SAdrian Chadd 		tid->baw_tail = cindex;
2492eb6f0de0SAdrian Chadd 		INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2493eb6f0de0SAdrian Chadd 	}
2494eb6f0de0SAdrian Chadd }
2495eb6f0de0SAdrian Chadd 
2496eb6f0de0SAdrian Chadd /*
249738962489SAdrian Chadd  * Flip the BAW buffer entry over from the existing one to the new one.
249838962489SAdrian Chadd  *
249938962489SAdrian Chadd  * When software retransmitting a (sub-)frame, it is entirely possible that
250038962489SAdrian Chadd  * the frame ath_buf is marked as BUSY and can't be immediately reused.
250138962489SAdrian Chadd  * In that instance the buffer is cloned and the new buffer is used for
250238962489SAdrian Chadd  * retransmit. We thus need to update the ath_buf slot in the BAW buf
250338962489SAdrian Chadd  * tracking array to maintain consistency.
250438962489SAdrian Chadd  */
250538962489SAdrian Chadd static void
250638962489SAdrian Chadd ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
250738962489SAdrian Chadd     struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
250838962489SAdrian Chadd {
250938962489SAdrian Chadd 	int index, cindex;
251038962489SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
251138962489SAdrian Chadd 	int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
251238962489SAdrian Chadd 
2513375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
251438962489SAdrian Chadd 
251538962489SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
251638962489SAdrian Chadd 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
251738962489SAdrian Chadd 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
251838962489SAdrian Chadd 
251938962489SAdrian Chadd 	/*
252038962489SAdrian Chadd 	 * Just warn for now; if it happens then we should find out
252138962489SAdrian Chadd 	 * about it. It's highly likely the aggregation session will
252238962489SAdrian Chadd 	 * soon hang.
252338962489SAdrian Chadd 	 */
252438962489SAdrian Chadd 	if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
252538962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: retransmitted buffer"
252638962489SAdrian Chadd 		    " has mismatching seqno's, BA session may hang.\n",
252738962489SAdrian Chadd 		    __func__);
252838962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: old seqno=%d, new_seqno=%d\n",
252938962489SAdrian Chadd 		    __func__,
253038962489SAdrian Chadd 		    old_bf->bf_state.bfs_seqno,
253138962489SAdrian Chadd 		    new_bf->bf_state.bfs_seqno);
253238962489SAdrian Chadd 	}
253338962489SAdrian Chadd 
253438962489SAdrian Chadd 	if (tid->tx_buf[cindex] != old_bf) {
253538962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: ath_buf pointer incorrect; "
253638962489SAdrian Chadd 		    " has m BA session may hang.\n",
253738962489SAdrian Chadd 		    __func__);
253838962489SAdrian Chadd 		device_printf(sc->sc_dev, "%s: old bf=%p, new bf=%p\n",
253938962489SAdrian Chadd 		    __func__,
254038962489SAdrian Chadd 		    old_bf, new_bf);
254138962489SAdrian Chadd 	}
254238962489SAdrian Chadd 
254338962489SAdrian Chadd 	tid->tx_buf[cindex] = new_bf;
254438962489SAdrian Chadd }
254538962489SAdrian Chadd 
254638962489SAdrian Chadd /*
2547eb6f0de0SAdrian Chadd  * seq_start - left edge of BAW
2548eb6f0de0SAdrian Chadd  * seq_next - current/next sequence number to allocate
2549eb6f0de0SAdrian Chadd  *
2550eb6f0de0SAdrian Chadd  * Since the BAW status may be modified by both the ath task and
2551eb6f0de0SAdrian Chadd  * the net80211/ifnet contexts, the TID must be locked.
2552eb6f0de0SAdrian Chadd  */
2553eb6f0de0SAdrian Chadd static void
2554eb6f0de0SAdrian Chadd ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2555eb6f0de0SAdrian Chadd     struct ath_tid *tid, const struct ath_buf *bf)
2556eb6f0de0SAdrian Chadd {
2557eb6f0de0SAdrian Chadd 	int index, cindex;
2558eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2559eb6f0de0SAdrian Chadd 	int seqno = SEQNO(bf->bf_state.bfs_seqno);
2560eb6f0de0SAdrian Chadd 
2561375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2562eb6f0de0SAdrian Chadd 
2563eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
2564eb6f0de0SAdrian Chadd 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2565eb6f0de0SAdrian Chadd 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2566eb6f0de0SAdrian Chadd 
2567eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2568a108d2d6SAdrian Chadd 	    "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2569d4365d16SAdrian Chadd 	    "baw head=%d, tail=%d\n",
2570a108d2d6SAdrian Chadd 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2571eb6f0de0SAdrian Chadd 	    cindex, tid->baw_head, tid->baw_tail);
2572eb6f0de0SAdrian Chadd 
2573eb6f0de0SAdrian Chadd 	/*
2574eb6f0de0SAdrian Chadd 	 * If this occurs then we have a big problem - something else
2575eb6f0de0SAdrian Chadd 	 * has slid tap->txa_start along without updating the BAW
2576eb6f0de0SAdrian Chadd 	 * tracking start/end pointers. Thus the TX BAW state is now
2577eb6f0de0SAdrian Chadd 	 * completely busted.
2578eb6f0de0SAdrian Chadd 	 *
2579eb6f0de0SAdrian Chadd 	 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2580eb6f0de0SAdrian Chadd 	 * it's quite possible that a cloned buffer is making its way
2581eb6f0de0SAdrian Chadd 	 * here and causing it to fire off. Disable TDMA for now.
2582eb6f0de0SAdrian Chadd 	 */
2583eb6f0de0SAdrian Chadd 	if (tid->tx_buf[cindex] != bf) {
2584eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
2585eb6f0de0SAdrian Chadd 		    "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2586eb6f0de0SAdrian Chadd 		    __func__,
2587eb6f0de0SAdrian Chadd 		    bf, SEQNO(bf->bf_state.bfs_seqno),
2588eb6f0de0SAdrian Chadd 		    tid->tx_buf[cindex],
2589eb6f0de0SAdrian Chadd 		    SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno));
2590eb6f0de0SAdrian Chadd 	}
2591eb6f0de0SAdrian Chadd 
2592eb6f0de0SAdrian Chadd 	tid->tx_buf[cindex] = NULL;
2593eb6f0de0SAdrian Chadd 
2594d4365d16SAdrian Chadd 	while (tid->baw_head != tid->baw_tail &&
2595d4365d16SAdrian Chadd 	    !tid->tx_buf[tid->baw_head]) {
2596eb6f0de0SAdrian Chadd 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2597eb6f0de0SAdrian Chadd 		INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2598eb6f0de0SAdrian Chadd 	}
2599d4365d16SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2600d4365d16SAdrian Chadd 	    "%s: baw is now %d:%d, baw head=%d\n",
2601eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, tap->txa_wnd, tid->baw_head);
2602eb6f0de0SAdrian Chadd }
2603eb6f0de0SAdrian Chadd 
2604eb6f0de0SAdrian Chadd /*
2605eb6f0de0SAdrian Chadd  * Mark the current node/TID as ready to TX.
2606eb6f0de0SAdrian Chadd  *
2607eb6f0de0SAdrian Chadd  * This is done to make it easy for the software scheduler to
2608eb6f0de0SAdrian Chadd  * find which nodes have data to send.
2609eb6f0de0SAdrian Chadd  *
2610eb6f0de0SAdrian Chadd  * The TXQ lock must be held.
2611eb6f0de0SAdrian Chadd  */
2612eb6f0de0SAdrian Chadd static void
2613eb6f0de0SAdrian Chadd ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2614eb6f0de0SAdrian Chadd {
2615eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2616eb6f0de0SAdrian Chadd 
2617375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2618eb6f0de0SAdrian Chadd 
2619eb6f0de0SAdrian Chadd 	if (tid->paused)
2620eb6f0de0SAdrian Chadd 		return;		/* paused, can't schedule yet */
2621eb6f0de0SAdrian Chadd 
2622eb6f0de0SAdrian Chadd 	if (tid->sched)
2623eb6f0de0SAdrian Chadd 		return;		/* already scheduled */
2624eb6f0de0SAdrian Chadd 
2625eb6f0de0SAdrian Chadd 	tid->sched = 1;
2626eb6f0de0SAdrian Chadd 
2627eb6f0de0SAdrian Chadd 	TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2628eb6f0de0SAdrian Chadd }
2629eb6f0de0SAdrian Chadd 
2630eb6f0de0SAdrian Chadd /*
2631eb6f0de0SAdrian Chadd  * Mark the current node as no longer needing to be polled for
2632eb6f0de0SAdrian Chadd  * TX packets.
2633eb6f0de0SAdrian Chadd  *
2634eb6f0de0SAdrian Chadd  * The TXQ lock must be held.
2635eb6f0de0SAdrian Chadd  */
2636eb6f0de0SAdrian Chadd static void
2637eb6f0de0SAdrian Chadd ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2638eb6f0de0SAdrian Chadd {
2639eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2640eb6f0de0SAdrian Chadd 
2641375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2642eb6f0de0SAdrian Chadd 
2643eb6f0de0SAdrian Chadd 	if (tid->sched == 0)
2644eb6f0de0SAdrian Chadd 		return;
2645eb6f0de0SAdrian Chadd 
2646eb6f0de0SAdrian Chadd 	tid->sched = 0;
2647eb6f0de0SAdrian Chadd 	TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2648eb6f0de0SAdrian Chadd }
2649eb6f0de0SAdrian Chadd 
2650eb6f0de0SAdrian Chadd /*
2651eb6f0de0SAdrian Chadd  * Assign a sequence number manually to the given frame.
2652eb6f0de0SAdrian Chadd  *
2653eb6f0de0SAdrian Chadd  * This should only be called for A-MPDU TX frames.
2654eb6f0de0SAdrian Chadd  */
2655a108d2d6SAdrian Chadd static ieee80211_seq
2656eb6f0de0SAdrian Chadd ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2657eb6f0de0SAdrian Chadd     struct ath_buf *bf, struct mbuf *m0)
2658eb6f0de0SAdrian Chadd {
2659eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh;
2660eb6f0de0SAdrian Chadd 	int tid, pri;
2661eb6f0de0SAdrian Chadd 	ieee80211_seq seqno;
2662eb6f0de0SAdrian Chadd 	uint8_t subtype;
2663eb6f0de0SAdrian Chadd 
2664eb6f0de0SAdrian Chadd 	/* TID lookup */
2665eb6f0de0SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2666eb6f0de0SAdrian Chadd 	pri = M_WME_GETAC(m0);			/* honor classification */
2667eb6f0de0SAdrian Chadd 	tid = WME_AC_TO_TID(pri);
2668a108d2d6SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n",
2669a108d2d6SAdrian Chadd 	    __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2670eb6f0de0SAdrian Chadd 
2671eb6f0de0SAdrian Chadd 	/* XXX Is it a control frame? Ignore */
2672eb6f0de0SAdrian Chadd 
2673eb6f0de0SAdrian Chadd 	/* Does the packet require a sequence number? */
2674eb6f0de0SAdrian Chadd 	if (! IEEE80211_QOS_HAS_SEQ(wh))
2675eb6f0de0SAdrian Chadd 		return -1;
2676eb6f0de0SAdrian Chadd 
2677375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
26787561cb5cSAdrian Chadd 
2679eb6f0de0SAdrian Chadd 	/*
2680eb6f0de0SAdrian Chadd 	 * Is it a QOS NULL Data frame? Give it a sequence number from
2681eb6f0de0SAdrian Chadd 	 * the default TID (IEEE80211_NONQOS_TID.)
2682eb6f0de0SAdrian Chadd 	 *
2683eb6f0de0SAdrian Chadd 	 * The RX path of everything I've looked at doesn't include the NULL
2684eb6f0de0SAdrian Chadd 	 * data frame sequence number in the aggregation state updates, so
2685eb6f0de0SAdrian Chadd 	 * assigning it a sequence number there will cause a BAW hole on the
2686eb6f0de0SAdrian Chadd 	 * RX side.
2687eb6f0de0SAdrian Chadd 	 */
2688eb6f0de0SAdrian Chadd 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2689eb6f0de0SAdrian Chadd 	if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) {
26907561cb5cSAdrian Chadd 		/* XXX no locking for this TID? This is a bit of a problem. */
2691eb6f0de0SAdrian Chadd 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
2692eb6f0de0SAdrian Chadd 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
2693eb6f0de0SAdrian Chadd 	} else {
2694eb6f0de0SAdrian Chadd 		/* Manually assign sequence number */
2695eb6f0de0SAdrian Chadd 		seqno = ni->ni_txseqs[tid];
2696eb6f0de0SAdrian Chadd 		INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
2697eb6f0de0SAdrian Chadd 	}
2698eb6f0de0SAdrian Chadd 	*(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
2699eb6f0de0SAdrian Chadd 	M_SEQNO_SET(m0, seqno);
2700eb6f0de0SAdrian Chadd 
2701eb6f0de0SAdrian Chadd 	/* Return so caller can do something with it if needed */
2702a108d2d6SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s:  -> seqno=%d\n", __func__, seqno);
2703eb6f0de0SAdrian Chadd 	return seqno;
2704eb6f0de0SAdrian Chadd }
2705eb6f0de0SAdrian Chadd 
2706eb6f0de0SAdrian Chadd /*
2707eb6f0de0SAdrian Chadd  * Attempt to direct dispatch an aggregate frame to hardware.
2708eb6f0de0SAdrian Chadd  * If the frame is out of BAW, queue.
2709eb6f0de0SAdrian Chadd  * Otherwise, schedule it as a single frame.
2710eb6f0de0SAdrian Chadd  */
2711eb6f0de0SAdrian Chadd static void
271246634305SAdrian Chadd ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an,
271346634305SAdrian Chadd     struct ath_txq *txq, struct ath_buf *bf)
2714eb6f0de0SAdrian Chadd {
2715eb6f0de0SAdrian Chadd 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
271646634305SAdrian Chadd //	struct ath_txq *txq = bf->bf_state.bfs_txq;
2717eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
2718eb6f0de0SAdrian Chadd 
271946634305SAdrian Chadd 	if (txq != bf->bf_state.bfs_txq) {
272046634305SAdrian Chadd 		device_printf(sc->sc_dev, "%s: txq %d != bfs_txq %d!\n",
272146634305SAdrian Chadd 		    __func__,
272246634305SAdrian Chadd 		    txq->axq_qnum,
272346634305SAdrian Chadd 		    bf->bf_state.bfs_txq->axq_qnum);
272446634305SAdrian Chadd 	}
272546634305SAdrian Chadd 
2726375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2727eb6f0de0SAdrian Chadd 
2728eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
2729eb6f0de0SAdrian Chadd 
2730eb6f0de0SAdrian Chadd 	/* paused? queue */
2731eb6f0de0SAdrian Chadd 	if (tid->paused) {
27323e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
27330f04c5a2SAdrian Chadd 		/* XXX don't sched - we're paused! */
2734eb6f0de0SAdrian Chadd 		return;
2735eb6f0de0SAdrian Chadd 	}
2736eb6f0de0SAdrian Chadd 
2737eb6f0de0SAdrian Chadd 	/* outside baw? queue */
2738eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_dobaw &&
2739eb6f0de0SAdrian Chadd 	    (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2740eb6f0de0SAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno)))) {
27413e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
2742eb6f0de0SAdrian Chadd 		ath_tx_tid_sched(sc, tid);
2743eb6f0de0SAdrian Chadd 		return;
2744eb6f0de0SAdrian Chadd 	}
2745eb6f0de0SAdrian Chadd 
27462a9f83afSAdrian Chadd 	/*
27472a9f83afSAdrian Chadd 	 * This is a temporary check and should be removed once
27482a9f83afSAdrian Chadd 	 * all the relevant code paths have been fixed.
27492a9f83afSAdrian Chadd 	 *
27502a9f83afSAdrian Chadd 	 * During aggregate retries, it's possible that the head
27512a9f83afSAdrian Chadd 	 * frame will fail (which has the bfs_aggr and bfs_nframes
27522a9f83afSAdrian Chadd 	 * fields set for said aggregate) and will be retried as
27532a9f83afSAdrian Chadd 	 * a single frame.  In this instance, the values should
27542a9f83afSAdrian Chadd 	 * be reset or the completion code will get upset with you.
27552a9f83afSAdrian Chadd 	 */
27562a9f83afSAdrian Chadd 	if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) {
27572a9f83afSAdrian Chadd 		device_printf(sc->sc_dev, "%s: bfs_aggr=%d, bfs_nframes=%d\n",
27582a9f83afSAdrian Chadd 		    __func__,
27592a9f83afSAdrian Chadd 		    bf->bf_state.bfs_aggr,
27602a9f83afSAdrian Chadd 		    bf->bf_state.bfs_nframes);
27612a9f83afSAdrian Chadd 		bf->bf_state.bfs_aggr = 0;
27622a9f83afSAdrian Chadd 		bf->bf_state.bfs_nframes = 1;
27632a9f83afSAdrian Chadd 	}
27642a9f83afSAdrian Chadd 
27654e81f27cSAdrian Chadd 	/* Update CLRDMASK just before this frame is queued */
27664e81f27cSAdrian Chadd 	ath_tx_update_clrdmask(sc, tid, bf);
27674e81f27cSAdrian Chadd 
2768eb6f0de0SAdrian Chadd 	/* Direct dispatch to hardware */
2769eb6f0de0SAdrian Chadd 	ath_tx_do_ratelookup(sc, bf);
2770e2e4a2c2SAdrian Chadd 	ath_tx_calc_duration(sc, bf);
2771e2e4a2c2SAdrian Chadd 	ath_tx_calc_protection(sc, bf);
2772eb6f0de0SAdrian Chadd 	ath_tx_set_rtscts(sc, bf);
2773e2e4a2c2SAdrian Chadd 	ath_tx_rate_fill_rcflags(sc, bf);
2774eb6f0de0SAdrian Chadd 	ath_tx_setds(sc, bf);
2775eb6f0de0SAdrian Chadd 
2776eb6f0de0SAdrian Chadd 	/* Statistics */
2777eb6f0de0SAdrian Chadd 	sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
2778eb6f0de0SAdrian Chadd 
2779eb6f0de0SAdrian Chadd 	/* Track per-TID hardware queue depth correctly */
2780eb6f0de0SAdrian Chadd 	tid->hwq_depth++;
2781eb6f0de0SAdrian Chadd 
2782eb6f0de0SAdrian Chadd 	/* Add to BAW */
2783eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_dobaw) {
2784eb6f0de0SAdrian Chadd 		ath_tx_addto_baw(sc, an, tid, bf);
2785eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_addedbaw = 1;
2786eb6f0de0SAdrian Chadd 	}
2787eb6f0de0SAdrian Chadd 
2788eb6f0de0SAdrian Chadd 	/* Set completion handler, multi-frame aggregate or not */
2789eb6f0de0SAdrian Chadd 	bf->bf_comp = ath_tx_aggr_comp;
2790eb6f0de0SAdrian Chadd 
2791eb6f0de0SAdrian Chadd 	/* Hand off to hardware */
2792eb6f0de0SAdrian Chadd 	ath_tx_handoff(sc, txq, bf);
2793eb6f0de0SAdrian Chadd }
2794eb6f0de0SAdrian Chadd 
2795eb6f0de0SAdrian Chadd /*
2796eb6f0de0SAdrian Chadd  * Attempt to send the packet.
2797eb6f0de0SAdrian Chadd  * If the queue isn't busy, direct-dispatch.
2798eb6f0de0SAdrian Chadd  * If the queue is busy enough, queue the given packet on the
2799eb6f0de0SAdrian Chadd  *  relevant software queue.
2800eb6f0de0SAdrian Chadd  */
2801eb6f0de0SAdrian Chadd void
2802eb6f0de0SAdrian Chadd ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_txq *txq,
2803eb6f0de0SAdrian Chadd     struct ath_buf *bf)
2804eb6f0de0SAdrian Chadd {
2805eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
2806eb6f0de0SAdrian Chadd 	struct ieee80211_frame *wh;
2807eb6f0de0SAdrian Chadd 	struct ath_tid *atid;
2808eb6f0de0SAdrian Chadd 	int pri, tid;
2809eb6f0de0SAdrian Chadd 	struct mbuf *m0 = bf->bf_m;
2810eb6f0de0SAdrian Chadd 
2811375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
28127561cb5cSAdrian Chadd 
2813eb6f0de0SAdrian Chadd 	/* Fetch the TID - non-QoS frames get assigned to TID 16 */
2814eb6f0de0SAdrian Chadd 	wh = mtod(m0, struct ieee80211_frame *);
2815eb6f0de0SAdrian Chadd 	pri = ath_tx_getac(sc, m0);
2816eb6f0de0SAdrian Chadd 	tid = ath_tx_gettid(sc, m0);
2817eb6f0de0SAdrian Chadd 	atid = &an->an_tid[tid];
2818eb6f0de0SAdrian Chadd 
2819a108d2d6SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
2820a108d2d6SAdrian Chadd 	    __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
2821eb6f0de0SAdrian Chadd 
2822eb6f0de0SAdrian Chadd 	/* Set local packet state, used to queue packets to hardware */
282346634305SAdrian Chadd 	/* XXX potentially duplicate info, re-check */
282446634305SAdrian Chadd 	/* XXX remember, txq must be the hardware queue, not the av_mcastq */
2825eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_tid = tid;
2826eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_txq = txq;
2827eb6f0de0SAdrian Chadd 	bf->bf_state.bfs_pri = pri;
2828eb6f0de0SAdrian Chadd 
2829eb6f0de0SAdrian Chadd 	/*
2830eb6f0de0SAdrian Chadd 	 * If the hardware queue isn't busy, queue it directly.
2831eb6f0de0SAdrian Chadd 	 * If the hardware queue is busy, queue it.
2832eb6f0de0SAdrian Chadd 	 * If the TID is paused or the traffic it outside BAW, software
2833eb6f0de0SAdrian Chadd 	 * queue it.
2834eb6f0de0SAdrian Chadd 	 */
2835eb6f0de0SAdrian Chadd 	if (atid->paused) {
2836eb6f0de0SAdrian Chadd 		/* TID is paused, queue */
2837a108d2d6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
28383e6cc97fSAdrian Chadd 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
2839eb6f0de0SAdrian Chadd 	} else if (ath_tx_ampdu_pending(sc, an, tid)) {
2840eb6f0de0SAdrian Chadd 		/* AMPDU pending; queue */
2841a108d2d6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
28423e6cc97fSAdrian Chadd 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
2843eb6f0de0SAdrian Chadd 		/* XXX sched? */
2844eb6f0de0SAdrian Chadd 	} else if (ath_tx_ampdu_running(sc, an, tid)) {
2845eb6f0de0SAdrian Chadd 		/* AMPDU running, attempt direct dispatch if possible */
284639f24578SAdrian Chadd 
284739f24578SAdrian Chadd 		/*
284839f24578SAdrian Chadd 		 * Always queue the frame to the tail of the list.
284939f24578SAdrian Chadd 		 */
28503e6cc97fSAdrian Chadd 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
285139f24578SAdrian Chadd 
285239f24578SAdrian Chadd 		/*
285339f24578SAdrian Chadd 		 * If the hardware queue isn't busy, direct dispatch
285439f24578SAdrian Chadd 		 * the head frame in the list.  Don't schedule the
285539f24578SAdrian Chadd 		 * TID - let it build some more frames first?
285639f24578SAdrian Chadd 		 *
285739f24578SAdrian Chadd 		 * Otherwise, schedule the TID.
285839f24578SAdrian Chadd 		 */
2859d4365d16SAdrian Chadd 		if (txq->axq_depth < sc->sc_hwq_limit) {
28603e6cc97fSAdrian Chadd 			bf = ATH_TID_FIRST(atid);
28613e6cc97fSAdrian Chadd 			ATH_TID_REMOVE(atid, bf, bf_list);
28622a9f83afSAdrian Chadd 
28632a9f83afSAdrian Chadd 			/*
28642a9f83afSAdrian Chadd 			 * Ensure it's definitely treated as a non-AMPDU
28652a9f83afSAdrian Chadd 			 * frame - this information may have been left
28662a9f83afSAdrian Chadd 			 * over from a previous attempt.
28672a9f83afSAdrian Chadd 			 */
28682a9f83afSAdrian Chadd 			bf->bf_state.bfs_aggr = 0;
28692a9f83afSAdrian Chadd 			bf->bf_state.bfs_nframes = 1;
28702a9f83afSAdrian Chadd 
28712a9f83afSAdrian Chadd 			/* Queue to the hardware */
287246634305SAdrian Chadd 			ath_tx_xmit_aggr(sc, an, txq, bf);
2873a108d2d6SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX,
2874a108d2d6SAdrian Chadd 			    "%s: xmit_aggr\n",
2875a108d2d6SAdrian Chadd 			    __func__);
2876d4365d16SAdrian Chadd 		} else {
2877d4365d16SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX,
2878a108d2d6SAdrian Chadd 			    "%s: ampdu; swq'ing\n",
2879a108d2d6SAdrian Chadd 			    __func__);
288003682514SAdrian Chadd 
2881eb6f0de0SAdrian Chadd 			ath_tx_tid_sched(sc, atid);
2882eb6f0de0SAdrian Chadd 		}
2883eb6f0de0SAdrian Chadd 	} else if (txq->axq_depth < sc->sc_hwq_limit) {
2884eb6f0de0SAdrian Chadd 		/* AMPDU not running, attempt direct dispatch */
2885a108d2d6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
28860a544719SAdrian Chadd 		/* See if clrdmask needs to be set */
28870a544719SAdrian Chadd 		ath_tx_update_clrdmask(sc, atid, bf);
2888eb6f0de0SAdrian Chadd 		ath_tx_xmit_normal(sc, txq, bf);
2889eb6f0de0SAdrian Chadd 	} else {
2890eb6f0de0SAdrian Chadd 		/* Busy; queue */
2891a108d2d6SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
28923e6cc97fSAdrian Chadd 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
2893eb6f0de0SAdrian Chadd 		ath_tx_tid_sched(sc, atid);
2894eb6f0de0SAdrian Chadd 	}
2895eb6f0de0SAdrian Chadd }
2896eb6f0de0SAdrian Chadd 
2897eb6f0de0SAdrian Chadd /*
2898eb6f0de0SAdrian Chadd  * Configure the per-TID node state.
2899eb6f0de0SAdrian Chadd  *
2900eb6f0de0SAdrian Chadd  * This likely belongs in if_ath_node.c but I can't think of anywhere
2901eb6f0de0SAdrian Chadd  * else to put it just yet.
2902eb6f0de0SAdrian Chadd  *
2903eb6f0de0SAdrian Chadd  * This sets up the SLISTs and the mutex as appropriate.
2904eb6f0de0SAdrian Chadd  */
2905eb6f0de0SAdrian Chadd void
2906eb6f0de0SAdrian Chadd ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
2907eb6f0de0SAdrian Chadd {
2908eb6f0de0SAdrian Chadd 	int i, j;
2909eb6f0de0SAdrian Chadd 	struct ath_tid *atid;
2910eb6f0de0SAdrian Chadd 
2911eb6f0de0SAdrian Chadd 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
2912eb6f0de0SAdrian Chadd 		atid = &an->an_tid[i];
2913f1bc738eSAdrian Chadd 
2914f1bc738eSAdrian Chadd 		/* XXX now with this bzer(), is the field 0'ing needed? */
2915f1bc738eSAdrian Chadd 		bzero(atid, sizeof(*atid));
2916f1bc738eSAdrian Chadd 
29173e6cc97fSAdrian Chadd 		TAILQ_INIT(&atid->tid_q);
29183e6cc97fSAdrian Chadd 		TAILQ_INIT(&atid->filtq.tid_q);
2919eb6f0de0SAdrian Chadd 		atid->tid = i;
2920eb6f0de0SAdrian Chadd 		atid->an = an;
2921eb6f0de0SAdrian Chadd 		for (j = 0; j < ATH_TID_MAX_BUFS; j++)
2922eb6f0de0SAdrian Chadd 			atid->tx_buf[j] = NULL;
2923eb6f0de0SAdrian Chadd 		atid->baw_head = atid->baw_tail = 0;
2924eb6f0de0SAdrian Chadd 		atid->paused = 0;
2925eb6f0de0SAdrian Chadd 		atid->sched = 0;
2926eb6f0de0SAdrian Chadd 		atid->hwq_depth = 0;
2927eb6f0de0SAdrian Chadd 		atid->cleanup_inprogress = 0;
2928f1bc738eSAdrian Chadd 		atid->clrdmask = 1;	/* Always start by setting this bit */
2929eb6f0de0SAdrian Chadd 		if (i == IEEE80211_NONQOS_TID)
29307403d1b9SAdrian Chadd 			atid->ac = ATH_NONQOS_TID_AC;
2931eb6f0de0SAdrian Chadd 		else
2932eb6f0de0SAdrian Chadd 			atid->ac = TID_TO_WME_AC(i);
2933eb6f0de0SAdrian Chadd 	}
2934eb6f0de0SAdrian Chadd }
2935eb6f0de0SAdrian Chadd 
2936eb6f0de0SAdrian Chadd /*
2937eb6f0de0SAdrian Chadd  * Pause the current TID. This stops packets from being transmitted
2938eb6f0de0SAdrian Chadd  * on it.
2939eb6f0de0SAdrian Chadd  *
2940eb6f0de0SAdrian Chadd  * Since this is also called from upper layers as well as the driver,
2941eb6f0de0SAdrian Chadd  * it will get the TID lock.
2942eb6f0de0SAdrian Chadd  */
2943eb6f0de0SAdrian Chadd static void
2944eb6f0de0SAdrian Chadd ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
2945eb6f0de0SAdrian Chadd {
294688b3d483SAdrian Chadd 
2947375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2948eb6f0de0SAdrian Chadd 	tid->paused++;
2949eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: paused = %d\n",
2950eb6f0de0SAdrian Chadd 	    __func__, tid->paused);
2951eb6f0de0SAdrian Chadd }
2952eb6f0de0SAdrian Chadd 
2953eb6f0de0SAdrian Chadd /*
2954eb6f0de0SAdrian Chadd  * Unpause the current TID, and schedule it if needed.
2955eb6f0de0SAdrian Chadd  */
2956eb6f0de0SAdrian Chadd static void
2957eb6f0de0SAdrian Chadd ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
2958eb6f0de0SAdrian Chadd {
2959375307d4SAdrian Chadd 
2960375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
2961eb6f0de0SAdrian Chadd 
2962eb6f0de0SAdrian Chadd 	tid->paused--;
2963eb6f0de0SAdrian Chadd 
2964eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: unpaused = %d\n",
2965eb6f0de0SAdrian Chadd 	    __func__, tid->paused);
2966eb6f0de0SAdrian Chadd 
29670eb81626SAdrian Chadd 	if (tid->paused)
2968eb6f0de0SAdrian Chadd 		return;
29690eb81626SAdrian Chadd 
29700eb81626SAdrian Chadd 	/*
29710eb81626SAdrian Chadd 	 * Override the clrdmask configuration for the next frame
29720eb81626SAdrian Chadd 	 * from this TID, just to get the ball rolling.
29730eb81626SAdrian Chadd 	 */
29740eb81626SAdrian Chadd 	tid->clrdmask = 1;
29750eb81626SAdrian Chadd 
29760eb81626SAdrian Chadd 	if (tid->axq_depth == 0)
29770eb81626SAdrian Chadd 		return;
2978eb6f0de0SAdrian Chadd 
2979f1bc738eSAdrian Chadd 	/* XXX isfiltered shouldn't ever be 0 at this point */
2980f1bc738eSAdrian Chadd 	if (tid->isfiltered == 1) {
2981f1bc738eSAdrian Chadd 		device_printf(sc->sc_dev, "%s: filtered?!\n", __func__);
2982f1bc738eSAdrian Chadd 		return;
2983f1bc738eSAdrian Chadd 	}
2984f1bc738eSAdrian Chadd 
2985eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, tid);
2986eb6f0de0SAdrian Chadd 	/* Punt some frames to the hardware if needed */
298703e9308fSAdrian Chadd 	//ath_txq_sched(sc, sc->sc_ac2q[tid->ac]);
298803e9308fSAdrian Chadd 	taskqueue_enqueue(sc->sc_tq, &sc->sc_txqtask);
2989eb6f0de0SAdrian Chadd }
2990eb6f0de0SAdrian Chadd 
2991eb6f0de0SAdrian Chadd /*
2992f1bc738eSAdrian Chadd  * Add the given ath_buf to the TID filtered frame list.
2993f1bc738eSAdrian Chadd  * This requires the TID be filtered.
2994f1bc738eSAdrian Chadd  */
2995f1bc738eSAdrian Chadd static void
2996f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid,
2997f1bc738eSAdrian Chadd     struct ath_buf *bf)
2998f1bc738eSAdrian Chadd {
2999f1bc738eSAdrian Chadd 
3000375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3001375307d4SAdrian Chadd 
3002f1bc738eSAdrian Chadd 	if (! tid->isfiltered)
3003f1bc738eSAdrian Chadd 		device_printf(sc->sc_dev, "%s: not filtered?!\n", __func__);
3004f1bc738eSAdrian Chadd 
3005f1bc738eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf);
3006f1bc738eSAdrian Chadd 
3007f1bc738eSAdrian Chadd 	/* Set the retry bit and bump the retry counter */
3008f1bc738eSAdrian Chadd 	ath_tx_set_retry(sc, bf);
3009f1bc738eSAdrian Chadd 	sc->sc_stats.ast_tx_swfiltered++;
3010f1bc738eSAdrian Chadd 
301113aa9ee5SAdrian Chadd 	ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list);
3012f1bc738eSAdrian Chadd }
3013f1bc738eSAdrian Chadd 
3014f1bc738eSAdrian Chadd /*
3015f1bc738eSAdrian Chadd  * Handle a completed filtered frame from the given TID.
3016f1bc738eSAdrian Chadd  * This just enables/pauses the filtered frame state if required
3017f1bc738eSAdrian Chadd  * and appends the filtered frame to the filtered queue.
3018f1bc738eSAdrian Chadd  */
3019f1bc738eSAdrian Chadd static void
3020f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid,
3021f1bc738eSAdrian Chadd     struct ath_buf *bf)
3022f1bc738eSAdrian Chadd {
3023f1bc738eSAdrian Chadd 
3024375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3025f1bc738eSAdrian Chadd 
3026f1bc738eSAdrian Chadd 	if (! tid->isfiltered) {
3027f1bc738eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: filter transition\n",
3028f1bc738eSAdrian Chadd 		    __func__);
3029f1bc738eSAdrian Chadd 		tid->isfiltered = 1;
3030f1bc738eSAdrian Chadd 		ath_tx_tid_pause(sc, tid);
3031f1bc738eSAdrian Chadd 	}
3032f1bc738eSAdrian Chadd 
3033f1bc738eSAdrian Chadd 	/* Add the frame to the filter queue */
3034f1bc738eSAdrian Chadd 	ath_tx_tid_filt_addbuf(sc, tid, bf);
3035f1bc738eSAdrian Chadd }
3036f1bc738eSAdrian Chadd 
3037f1bc738eSAdrian Chadd /*
3038f1bc738eSAdrian Chadd  * Complete the filtered frame TX completion.
3039f1bc738eSAdrian Chadd  *
3040f1bc738eSAdrian Chadd  * If there are no more frames in the hardware queue, unpause/unfilter
3041f1bc738eSAdrian Chadd  * the TID if applicable.  Otherwise we will wait for a node PS transition
3042f1bc738eSAdrian Chadd  * to unfilter.
3043f1bc738eSAdrian Chadd  */
3044f1bc738eSAdrian Chadd static void
3045f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid)
3046f1bc738eSAdrian Chadd {
3047f1bc738eSAdrian Chadd 	struct ath_buf *bf;
3048f1bc738eSAdrian Chadd 
3049375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3050f1bc738eSAdrian Chadd 
3051f1bc738eSAdrian Chadd 	if (tid->hwq_depth != 0)
3052f1bc738eSAdrian Chadd 		return;
3053f1bc738eSAdrian Chadd 
3054f1bc738eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: hwq=0, transition back\n",
3055f1bc738eSAdrian Chadd 	    __func__);
3056f1bc738eSAdrian Chadd 	tid->isfiltered = 0;
3057f1bc738eSAdrian Chadd 	tid->clrdmask = 1;
3058f1bc738eSAdrian Chadd 
3059f1bc738eSAdrian Chadd 	/* XXX this is really quite inefficient */
306013aa9ee5SAdrian Chadd 	while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) {
306113aa9ee5SAdrian Chadd 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
30623e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3063f1bc738eSAdrian Chadd 	}
3064f1bc738eSAdrian Chadd 
3065f1bc738eSAdrian Chadd 	ath_tx_tid_resume(sc, tid);
3066f1bc738eSAdrian Chadd }
3067f1bc738eSAdrian Chadd 
3068f1bc738eSAdrian Chadd /*
3069f1bc738eSAdrian Chadd  * Called when a single (aggregate or otherwise) frame is completed.
3070f1bc738eSAdrian Chadd  *
3071f1bc738eSAdrian Chadd  * Returns 1 if the buffer could be added to the filtered list
3072f1bc738eSAdrian Chadd  * (cloned or otherwise), 0 if the buffer couldn't be added to the
3073f1bc738eSAdrian Chadd  * filtered list (failed clone; expired retry) and the caller should
3074f1bc738eSAdrian Chadd  * free it and handle it like a failure (eg by sending a BAR.)
3075f1bc738eSAdrian Chadd  */
3076f1bc738eSAdrian Chadd static int
3077f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid,
3078f1bc738eSAdrian Chadd     struct ath_buf *bf)
3079f1bc738eSAdrian Chadd {
3080f1bc738eSAdrian Chadd 	struct ath_buf *nbf;
3081f1bc738eSAdrian Chadd 	int retval;
3082f1bc738eSAdrian Chadd 
3083375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3084f1bc738eSAdrian Chadd 
3085f1bc738eSAdrian Chadd 	/*
3086f1bc738eSAdrian Chadd 	 * Don't allow a filtered frame to live forever.
3087f1bc738eSAdrian Chadd 	 */
3088f1bc738eSAdrian Chadd 	if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
30890eb81626SAdrian Chadd 		sc->sc_stats.ast_tx_swretrymax++;
3090f1bc738eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3091f1bc738eSAdrian Chadd 		    "%s: bf=%p, seqno=%d, exceeded retries\n",
3092f1bc738eSAdrian Chadd 		    __func__,
3093f1bc738eSAdrian Chadd 		    bf,
3094f1bc738eSAdrian Chadd 		    bf->bf_state.bfs_seqno);
3095f1bc738eSAdrian Chadd 		return (0);
3096f1bc738eSAdrian Chadd 	}
3097f1bc738eSAdrian Chadd 
3098f1bc738eSAdrian Chadd 	/*
3099f1bc738eSAdrian Chadd 	 * A busy buffer can't be added to the retry list.
3100f1bc738eSAdrian Chadd 	 * It needs to be cloned.
3101f1bc738eSAdrian Chadd 	 */
3102f1bc738eSAdrian Chadd 	if (bf->bf_flags & ATH_BUF_BUSY) {
3103f1bc738eSAdrian Chadd 		nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3104f1bc738eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3105f1bc738eSAdrian Chadd 		    "%s: busy buffer clone: %p -> %p\n",
3106f1bc738eSAdrian Chadd 		    __func__, bf, nbf);
3107f1bc738eSAdrian Chadd 	} else {
3108f1bc738eSAdrian Chadd 		nbf = bf;
3109f1bc738eSAdrian Chadd 	}
3110f1bc738eSAdrian Chadd 
3111f1bc738eSAdrian Chadd 	if (nbf == NULL) {
3112f1bc738eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3113f1bc738eSAdrian Chadd 		    "%s: busy buffer couldn't be cloned (%p)!\n",
3114f1bc738eSAdrian Chadd 		    __func__, bf);
3115f1bc738eSAdrian Chadd 		retval = 1;
3116f1bc738eSAdrian Chadd 	} else {
3117f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3118f1bc738eSAdrian Chadd 		retval = 0;
3119f1bc738eSAdrian Chadd 	}
3120f1bc738eSAdrian Chadd 	ath_tx_tid_filt_comp_complete(sc, tid);
3121f1bc738eSAdrian Chadd 
3122f1bc738eSAdrian Chadd 	return (retval);
3123f1bc738eSAdrian Chadd }
3124f1bc738eSAdrian Chadd 
3125f1bc738eSAdrian Chadd static void
3126f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid,
3127f1bc738eSAdrian Chadd     struct ath_buf *bf_first, ath_bufhead *bf_q)
3128f1bc738eSAdrian Chadd {
3129f1bc738eSAdrian Chadd 	struct ath_buf *bf, *bf_next, *nbf;
3130f1bc738eSAdrian Chadd 
3131375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3132f1bc738eSAdrian Chadd 
3133f1bc738eSAdrian Chadd 	bf = bf_first;
3134f1bc738eSAdrian Chadd 	while (bf) {
3135f1bc738eSAdrian Chadd 		bf_next = bf->bf_next;
3136f1bc738eSAdrian Chadd 		bf->bf_next = NULL;	/* Remove it from the aggr list */
3137f1bc738eSAdrian Chadd 
3138f1bc738eSAdrian Chadd 		/*
3139f1bc738eSAdrian Chadd 		 * Don't allow a filtered frame to live forever.
3140f1bc738eSAdrian Chadd 		 */
3141f1bc738eSAdrian Chadd 		if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
31420eb81626SAdrian Chadd 		sc->sc_stats.ast_tx_swretrymax++;
3143f1bc738eSAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3144f1bc738eSAdrian Chadd 			    "%s: bf=%p, seqno=%d, exceeded retries\n",
3145f1bc738eSAdrian Chadd 			    __func__,
3146f1bc738eSAdrian Chadd 			    bf,
3147f1bc738eSAdrian Chadd 			    bf->bf_state.bfs_seqno);
3148f1bc738eSAdrian Chadd 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3149f1bc738eSAdrian Chadd 			goto next;
3150f1bc738eSAdrian Chadd 		}
3151f1bc738eSAdrian Chadd 
3152f1bc738eSAdrian Chadd 		if (bf->bf_flags & ATH_BUF_BUSY) {
3153f1bc738eSAdrian Chadd 			nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3154f1bc738eSAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3155f1bc738eSAdrian Chadd 			    "%s: busy buffer cloned: %p -> %p",
3156f1bc738eSAdrian Chadd 			    __func__, bf, nbf);
3157f1bc738eSAdrian Chadd 		} else {
3158f1bc738eSAdrian Chadd 			nbf = bf;
3159f1bc738eSAdrian Chadd 		}
3160f1bc738eSAdrian Chadd 
3161f1bc738eSAdrian Chadd 		/*
3162f1bc738eSAdrian Chadd 		 * If the buffer couldn't be cloned, add it to bf_q;
3163f1bc738eSAdrian Chadd 		 * the caller will free the buffer(s) as required.
3164f1bc738eSAdrian Chadd 		 */
3165f1bc738eSAdrian Chadd 		if (nbf == NULL) {
3166f1bc738eSAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3167f1bc738eSAdrian Chadd 			    "%s: buffer couldn't be cloned! (%p)\n",
3168f1bc738eSAdrian Chadd 			    __func__, bf);
3169f1bc738eSAdrian Chadd 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3170f1bc738eSAdrian Chadd 		} else {
3171f1bc738eSAdrian Chadd 			ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3172f1bc738eSAdrian Chadd 		}
3173f1bc738eSAdrian Chadd next:
3174f1bc738eSAdrian Chadd 		bf = bf_next;
3175f1bc738eSAdrian Chadd 	}
3176f1bc738eSAdrian Chadd 
3177f1bc738eSAdrian Chadd 	ath_tx_tid_filt_comp_complete(sc, tid);
3178f1bc738eSAdrian Chadd }
3179f1bc738eSAdrian Chadd 
3180f1bc738eSAdrian Chadd /*
318188b3d483SAdrian Chadd  * Suspend the queue because we need to TX a BAR.
318288b3d483SAdrian Chadd  */
318388b3d483SAdrian Chadd static void
318488b3d483SAdrian Chadd ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
318588b3d483SAdrian Chadd {
3186375307d4SAdrian Chadd 
3187375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
318888b3d483SAdrian Chadd 
31890e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3190e60c4fc2SAdrian Chadd 	    "%s: tid=%p, bar_wait=%d, bar_tx=%d, called\n",
319188b3d483SAdrian Chadd 	    __func__,
3192e60c4fc2SAdrian Chadd 	    tid,
3193e60c4fc2SAdrian Chadd 	    tid->bar_wait,
3194e60c4fc2SAdrian Chadd 	    tid->bar_tx);
319588b3d483SAdrian Chadd 
319688b3d483SAdrian Chadd 	/* We shouldn't be called when bar_tx is 1 */
319788b3d483SAdrian Chadd 	if (tid->bar_tx) {
319888b3d483SAdrian Chadd 		device_printf(sc->sc_dev, "%s: bar_tx is 1?!\n",
319988b3d483SAdrian Chadd 		    __func__);
320088b3d483SAdrian Chadd 	}
320188b3d483SAdrian Chadd 
320288b3d483SAdrian Chadd 	/* If we've already been called, just be patient. */
320388b3d483SAdrian Chadd 	if (tid->bar_wait)
320488b3d483SAdrian Chadd 		return;
320588b3d483SAdrian Chadd 
320688b3d483SAdrian Chadd 	/* Wait! */
320788b3d483SAdrian Chadd 	tid->bar_wait = 1;
320888b3d483SAdrian Chadd 
320988b3d483SAdrian Chadd 	/* Only one pause, no matter how many frames fail */
321088b3d483SAdrian Chadd 	ath_tx_tid_pause(sc, tid);
321188b3d483SAdrian Chadd }
321288b3d483SAdrian Chadd 
321388b3d483SAdrian Chadd /*
321488b3d483SAdrian Chadd  * We've finished with BAR handling - either we succeeded or
321588b3d483SAdrian Chadd  * failed. Either way, unsuspend TX.
321688b3d483SAdrian Chadd  */
321788b3d483SAdrian Chadd static void
321888b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
321988b3d483SAdrian Chadd {
3220375307d4SAdrian Chadd 
3221375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
322288b3d483SAdrian Chadd 
32230e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
322488b3d483SAdrian Chadd 	    "%s: tid=%p, called\n",
322588b3d483SAdrian Chadd 	    __func__,
322688b3d483SAdrian Chadd 	    tid);
322788b3d483SAdrian Chadd 
322888b3d483SAdrian Chadd 	if (tid->bar_tx == 0 || tid->bar_wait == 0) {
322988b3d483SAdrian Chadd 		device_printf(sc->sc_dev, "%s: bar_tx=%d, bar_wait=%d: ?\n",
323088b3d483SAdrian Chadd 		    __func__, tid->bar_tx, tid->bar_wait);
323188b3d483SAdrian Chadd 	}
323288b3d483SAdrian Chadd 
323388b3d483SAdrian Chadd 	tid->bar_tx = tid->bar_wait = 0;
323488b3d483SAdrian Chadd 	ath_tx_tid_resume(sc, tid);
323588b3d483SAdrian Chadd }
323688b3d483SAdrian Chadd 
323788b3d483SAdrian Chadd /*
323888b3d483SAdrian Chadd  * Return whether we're ready to TX a BAR frame.
323988b3d483SAdrian Chadd  *
324088b3d483SAdrian Chadd  * Requires the TID lock be held.
324188b3d483SAdrian Chadd  */
324288b3d483SAdrian Chadd static int
324388b3d483SAdrian Chadd ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
324488b3d483SAdrian Chadd {
324588b3d483SAdrian Chadd 
3246375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
324788b3d483SAdrian Chadd 
324888b3d483SAdrian Chadd 	if (tid->bar_wait == 0 || tid->hwq_depth > 0)
324988b3d483SAdrian Chadd 		return (0);
325088b3d483SAdrian Chadd 
32510e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, "%s: tid=%p (%d), bar ready\n",
32520e22ed0eSAdrian Chadd 	    __func__, tid, tid->tid);
32530e22ed0eSAdrian Chadd 
325488b3d483SAdrian Chadd 	return (1);
325588b3d483SAdrian Chadd }
325688b3d483SAdrian Chadd 
325788b3d483SAdrian Chadd /*
325888b3d483SAdrian Chadd  * Check whether the current TID is ready to have a BAR
325988b3d483SAdrian Chadd  * TXed and if so, do the TX.
326088b3d483SAdrian Chadd  *
326188b3d483SAdrian Chadd  * Since the TID/TXQ lock can't be held during a call to
326288b3d483SAdrian Chadd  * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
326388b3d483SAdrian Chadd  * sending the BAR and locking it again.
326488b3d483SAdrian Chadd  *
326588b3d483SAdrian Chadd  * Eventually, the code to send the BAR should be broken out
326688b3d483SAdrian Chadd  * from this routine so the lock doesn't have to be reacquired
326788b3d483SAdrian Chadd  * just to be immediately dropped by the caller.
326888b3d483SAdrian Chadd  */
326988b3d483SAdrian Chadd static void
327088b3d483SAdrian Chadd ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
327188b3d483SAdrian Chadd {
327288b3d483SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
327388b3d483SAdrian Chadd 
3274375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
327588b3d483SAdrian Chadd 
32760e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
327788b3d483SAdrian Chadd 	    "%s: tid=%p, called\n",
327888b3d483SAdrian Chadd 	    __func__,
327988b3d483SAdrian Chadd 	    tid);
328088b3d483SAdrian Chadd 
328188b3d483SAdrian Chadd 	tap = ath_tx_get_tx_tid(tid->an, tid->tid);
328288b3d483SAdrian Chadd 
328388b3d483SAdrian Chadd 	/*
328488b3d483SAdrian Chadd 	 * This is an error condition!
328588b3d483SAdrian Chadd 	 */
328688b3d483SAdrian Chadd 	if (tid->bar_wait == 0 || tid->bar_tx == 1) {
328788b3d483SAdrian Chadd 		device_printf(sc->sc_dev,
328888b3d483SAdrian Chadd 		    "%s: tid=%p, bar_tx=%d, bar_wait=%d: ?\n",
328988b3d483SAdrian Chadd 		    __func__,
329088b3d483SAdrian Chadd 		    tid,
329188b3d483SAdrian Chadd 		    tid->bar_tx,
329288b3d483SAdrian Chadd 		    tid->bar_wait);
329388b3d483SAdrian Chadd 		return;
329488b3d483SAdrian Chadd 	}
329588b3d483SAdrian Chadd 
329688b3d483SAdrian Chadd 	/* Don't do anything if we still have pending frames */
329788b3d483SAdrian Chadd 	if (tid->hwq_depth > 0) {
32980e22ed0eSAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
329988b3d483SAdrian Chadd 		    "%s: tid=%p, hwq_depth=%d, waiting\n",
330088b3d483SAdrian Chadd 		    __func__,
330188b3d483SAdrian Chadd 		    tid,
330288b3d483SAdrian Chadd 		    tid->hwq_depth);
330388b3d483SAdrian Chadd 		return;
330488b3d483SAdrian Chadd 	}
330588b3d483SAdrian Chadd 
330688b3d483SAdrian Chadd 	/* We're now about to TX */
330788b3d483SAdrian Chadd 	tid->bar_tx = 1;
330888b3d483SAdrian Chadd 
330988b3d483SAdrian Chadd 	/*
33104e81f27cSAdrian Chadd 	 * Override the clrdmask configuration for the next frame,
33114e81f27cSAdrian Chadd 	 * just to get the ball rolling.
33124e81f27cSAdrian Chadd 	 */
33134e81f27cSAdrian Chadd 	tid->clrdmask = 1;
33144e81f27cSAdrian Chadd 
33154e81f27cSAdrian Chadd 	/*
331688b3d483SAdrian Chadd 	 * Calculate new BAW left edge, now that all frames have either
331788b3d483SAdrian Chadd 	 * succeeded or failed.
331888b3d483SAdrian Chadd 	 *
331988b3d483SAdrian Chadd 	 * XXX verify this is _actually_ the valid value to begin at!
332088b3d483SAdrian Chadd 	 */
33210e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
332288b3d483SAdrian Chadd 	    "%s: tid=%p, new BAW left edge=%d\n",
332388b3d483SAdrian Chadd 	    __func__,
332488b3d483SAdrian Chadd 	    tid,
332588b3d483SAdrian Chadd 	    tap->txa_start);
332688b3d483SAdrian Chadd 
332788b3d483SAdrian Chadd 	/* Try sending the BAR frame */
332888b3d483SAdrian Chadd 	/* We can't hold the lock here! */
332988b3d483SAdrian Chadd 
3330375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
333188b3d483SAdrian Chadd 	if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
333288b3d483SAdrian Chadd 		/* Success? Now we wait for notification that it's done */
3333375307d4SAdrian Chadd 		ATH_TX_LOCK(sc);
333488b3d483SAdrian Chadd 		return;
333588b3d483SAdrian Chadd 	}
333688b3d483SAdrian Chadd 
333788b3d483SAdrian Chadd 	/* Failure? For now, warn loudly and continue */
3338375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
333988b3d483SAdrian Chadd 	device_printf(sc->sc_dev, "%s: tid=%p, failed to TX BAR, continue!\n",
334088b3d483SAdrian Chadd 	    __func__, tid);
334188b3d483SAdrian Chadd 	ath_tx_tid_bar_unsuspend(sc, tid);
334288b3d483SAdrian Chadd }
334388b3d483SAdrian Chadd 
3344eb6f0de0SAdrian Chadd static void
3345f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an,
3346f1bc738eSAdrian Chadd     struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf)
3347eb6f0de0SAdrian Chadd {
3348eb6f0de0SAdrian Chadd 
3349375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3350eb6f0de0SAdrian Chadd 
3351eb6f0de0SAdrian Chadd 	/*
3352eb6f0de0SAdrian Chadd 	 * If the current TID is running AMPDU, update
3353eb6f0de0SAdrian Chadd 	 * the BAW.
3354eb6f0de0SAdrian Chadd 	 */
3355eb6f0de0SAdrian Chadd 	if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3356eb6f0de0SAdrian Chadd 	    bf->bf_state.bfs_dobaw) {
3357eb6f0de0SAdrian Chadd 		/*
3358eb6f0de0SAdrian Chadd 		 * Only remove the frame from the BAW if it's
3359eb6f0de0SAdrian Chadd 		 * been transmitted at least once; this means
3360eb6f0de0SAdrian Chadd 		 * the frame was in the BAW to begin with.
3361eb6f0de0SAdrian Chadd 		 */
3362eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_retries > 0) {
3363eb6f0de0SAdrian Chadd 			ath_tx_update_baw(sc, an, tid, bf);
3364eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
3365eb6f0de0SAdrian Chadd 		}
3366eb6f0de0SAdrian Chadd 		/*
3367eb6f0de0SAdrian Chadd 		 * This has become a non-fatal error now
3368eb6f0de0SAdrian Chadd 		 */
3369eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_addedbaw)
3370eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev,
3371eb6f0de0SAdrian Chadd 			    "%s: wasn't added: seqno %d\n",
3372eb6f0de0SAdrian Chadd 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
3373eb6f0de0SAdrian Chadd 	}
3374eb6f0de0SAdrian Chadd 	TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
3375eb6f0de0SAdrian Chadd }
3376eb6f0de0SAdrian Chadd 
3377f1bc738eSAdrian Chadd static void
3378f1bc738eSAdrian Chadd ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an,
337903682514SAdrian Chadd     const char *pfx, struct ath_tid *tid, struct ath_buf *bf)
3380f1bc738eSAdrian Chadd {
3381f1bc738eSAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
3382f1bc738eSAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
3383f1bc738eSAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3384f1bc738eSAdrian Chadd 
3385f1bc738eSAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
3386f1bc738eSAdrian Chadd 
3387f1bc738eSAdrian Chadd 	device_printf(sc->sc_dev,
338803682514SAdrian Chadd 	    "%s: %s: node %p: bf=%p: addbaw=%d, dobaw=%d, "
3389f1bc738eSAdrian Chadd 	    "seqno=%d, retry=%d\n",
339003682514SAdrian Chadd 	    __func__, pfx, ni, bf,
3391f1bc738eSAdrian Chadd 	    bf->bf_state.bfs_addedbaw,
3392f1bc738eSAdrian Chadd 	    bf->bf_state.bfs_dobaw,
3393f1bc738eSAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno),
3394f1bc738eSAdrian Chadd 	    bf->bf_state.bfs_retries);
3395f1bc738eSAdrian Chadd 	device_printf(sc->sc_dev,
339603682514SAdrian Chadd 	    "%s: node %p: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n",
33974e81f27cSAdrian Chadd 	        __func__, ni, bf,
339803682514SAdrian Chadd 	    txq->axq_qnum,
33994e81f27cSAdrian Chadd 	    txq->axq_depth,
34004e81f27cSAdrian Chadd 	    txq->axq_aggr_depth);
34014e81f27cSAdrian Chadd 
34024e81f27cSAdrian Chadd 	device_printf(sc->sc_dev,
3403f1bc738eSAdrian Chadd 	    "%s: node %p: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, isfiltered=%d\n",
3404f1bc738eSAdrian Chadd 	    __func__, ni, bf,
3405f1bc738eSAdrian Chadd 	    tid->axq_depth,
3406f1bc738eSAdrian Chadd 	    tid->hwq_depth,
3407f1bc738eSAdrian Chadd 	    tid->bar_wait,
3408f1bc738eSAdrian Chadd 	    tid->isfiltered);
3409f1bc738eSAdrian Chadd 	device_printf(sc->sc_dev,
34104e81f27cSAdrian Chadd 	    "%s: node %p: tid %d: "
34114e81f27cSAdrian Chadd 	    "sched=%d, paused=%d, "
34124e81f27cSAdrian Chadd 	    "incomp=%d, baw_head=%d, "
3413f1bc738eSAdrian Chadd 	    "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
34144e81f27cSAdrian Chadd 	     __func__, ni, tid->tid,
34154e81f27cSAdrian Chadd 	     tid->sched, tid->paused,
34164e81f27cSAdrian Chadd 	     tid->incomp, tid->baw_head,
3417f1bc738eSAdrian Chadd 	     tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
3418f1bc738eSAdrian Chadd 	     ni->ni_txseqs[tid->tid]);
3419f1bc738eSAdrian Chadd 
3420f1bc738eSAdrian Chadd 	/* XXX Dump the frame, see what it is? */
3421f1bc738eSAdrian Chadd 	ieee80211_dump_pkt(ni->ni_ic,
3422f1bc738eSAdrian Chadd 	    mtod(bf->bf_m, const uint8_t *),
3423f1bc738eSAdrian Chadd 	    bf->bf_m->m_len, 0, -1);
3424f1bc738eSAdrian Chadd }
3425f1bc738eSAdrian Chadd 
3426f1bc738eSAdrian Chadd /*
3427f1bc738eSAdrian Chadd  * Free any packets currently pending in the software TX queue.
3428f1bc738eSAdrian Chadd  *
3429f1bc738eSAdrian Chadd  * This will be called when a node is being deleted.
3430f1bc738eSAdrian Chadd  *
3431f1bc738eSAdrian Chadd  * It can also be called on an active node during an interface
3432f1bc738eSAdrian Chadd  * reset or state transition.
3433f1bc738eSAdrian Chadd  *
3434f1bc738eSAdrian Chadd  * (From Linux/reference):
3435f1bc738eSAdrian Chadd  *
3436f1bc738eSAdrian Chadd  * TODO: For frame(s) that are in the retry state, we will reuse the
3437f1bc738eSAdrian Chadd  * sequence number(s) without setting the retry bit. The
3438f1bc738eSAdrian Chadd  * alternative is to give up on these and BAR the receiver's window
3439f1bc738eSAdrian Chadd  * forward.
3440f1bc738eSAdrian Chadd  */
3441f1bc738eSAdrian Chadd static void
3442f1bc738eSAdrian Chadd ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
3443f1bc738eSAdrian Chadd     struct ath_tid *tid, ath_bufhead *bf_cq)
3444f1bc738eSAdrian Chadd {
3445f1bc738eSAdrian Chadd 	struct ath_buf *bf;
3446f1bc738eSAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3447f1bc738eSAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
3448f1bc738eSAdrian Chadd 	int t;
3449f1bc738eSAdrian Chadd 
3450f1bc738eSAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
3451f1bc738eSAdrian Chadd 
3452375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3453f1bc738eSAdrian Chadd 
3454f1bc738eSAdrian Chadd 	/* Walk the queue, free frames */
3455f1bc738eSAdrian Chadd 	t = 0;
3456f1bc738eSAdrian Chadd 	for (;;) {
34573e6cc97fSAdrian Chadd 		bf = ATH_TID_FIRST(tid);
3458f1bc738eSAdrian Chadd 		if (bf == NULL) {
3459f1bc738eSAdrian Chadd 			break;
3460f1bc738eSAdrian Chadd 		}
3461f1bc738eSAdrian Chadd 
3462f1bc738eSAdrian Chadd 		if (t == 0) {
346303682514SAdrian Chadd 			ath_tx_tid_drain_print(sc, an, "norm", tid, bf);
3464f1bc738eSAdrian Chadd 			t = 1;
3465f1bc738eSAdrian Chadd 		}
3466f1bc738eSAdrian Chadd 
34673e6cc97fSAdrian Chadd 		ATH_TID_REMOVE(tid, bf, bf_list);
3468f1bc738eSAdrian Chadd 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3469f1bc738eSAdrian Chadd 	}
3470f1bc738eSAdrian Chadd 
3471f1bc738eSAdrian Chadd 	/* And now, drain the filtered frame queue */
3472f1bc738eSAdrian Chadd 	t = 0;
3473f1bc738eSAdrian Chadd 	for (;;) {
347413aa9ee5SAdrian Chadd 		bf = ATH_TID_FILT_FIRST(tid);
3475f1bc738eSAdrian Chadd 		if (bf == NULL)
3476f1bc738eSAdrian Chadd 			break;
3477f1bc738eSAdrian Chadd 
3478f1bc738eSAdrian Chadd 		if (t == 0) {
347903682514SAdrian Chadd 			ath_tx_tid_drain_print(sc, an, "filt", tid, bf);
3480f1bc738eSAdrian Chadd 			t = 1;
3481f1bc738eSAdrian Chadd 		}
3482f1bc738eSAdrian Chadd 
348313aa9ee5SAdrian Chadd 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3484f1bc738eSAdrian Chadd 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3485f1bc738eSAdrian Chadd 	}
3486f1bc738eSAdrian Chadd 
3487eb6f0de0SAdrian Chadd 	/*
34884e81f27cSAdrian Chadd 	 * Override the clrdmask configuration for the next frame
34894e81f27cSAdrian Chadd 	 * in case there is some future transmission, just to get
34904e81f27cSAdrian Chadd 	 * the ball rolling.
34914e81f27cSAdrian Chadd 	 *
34924e81f27cSAdrian Chadd 	 * This won't hurt things if the TID is about to be freed.
34934e81f27cSAdrian Chadd 	 */
34944e81f27cSAdrian Chadd 	tid->clrdmask = 1;
34954e81f27cSAdrian Chadd 
34964e81f27cSAdrian Chadd 	/*
3497eb6f0de0SAdrian Chadd 	 * Now that it's completed, grab the TID lock and update
3498eb6f0de0SAdrian Chadd 	 * the sequence number and BAW window.
3499eb6f0de0SAdrian Chadd 	 * Because sequence numbers have been assigned to frames
3500eb6f0de0SAdrian Chadd 	 * that haven't been sent yet, it's entirely possible
3501eb6f0de0SAdrian Chadd 	 * we'll be called with some pending frames that have not
3502eb6f0de0SAdrian Chadd 	 * been transmitted.
3503eb6f0de0SAdrian Chadd 	 *
3504eb6f0de0SAdrian Chadd 	 * The cleaner solution is to do the sequence number allocation
3505eb6f0de0SAdrian Chadd 	 * when the packet is first transmitted - and thus the "retries"
3506eb6f0de0SAdrian Chadd 	 * check above would be enough to update the BAW/seqno.
3507eb6f0de0SAdrian Chadd 	 */
3508eb6f0de0SAdrian Chadd 
3509eb6f0de0SAdrian Chadd 	/* But don't do it for non-QoS TIDs */
3510eb6f0de0SAdrian Chadd 	if (tap) {
3511eb6f0de0SAdrian Chadd #if 0
3512eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3513eb6f0de0SAdrian Chadd 		    "%s: node %p: TID %d: sliding BAW left edge to %d\n",
3514eb6f0de0SAdrian Chadd 		    __func__, an, tid->tid, tap->txa_start);
3515eb6f0de0SAdrian Chadd #endif
3516eb6f0de0SAdrian Chadd 		ni->ni_txseqs[tid->tid] = tap->txa_start;
3517eb6f0de0SAdrian Chadd 		tid->baw_tail = tid->baw_head;
3518eb6f0de0SAdrian Chadd 	}
3519eb6f0de0SAdrian Chadd }
3520eb6f0de0SAdrian Chadd 
3521eb6f0de0SAdrian Chadd /*
3522eb6f0de0SAdrian Chadd  * Flush all software queued packets for the given node.
3523eb6f0de0SAdrian Chadd  *
3524eb6f0de0SAdrian Chadd  * This occurs when a completion handler frees the last buffer
3525eb6f0de0SAdrian Chadd  * for a node, and the node is thus freed. This causes the node
3526eb6f0de0SAdrian Chadd  * to be cleaned up, which ends up calling ath_tx_node_flush.
3527eb6f0de0SAdrian Chadd  */
3528eb6f0de0SAdrian Chadd void
3529eb6f0de0SAdrian Chadd ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
3530eb6f0de0SAdrian Chadd {
3531eb6f0de0SAdrian Chadd 	int tid;
3532eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
3533eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
3534eb6f0de0SAdrian Chadd 
3535eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
3536eb6f0de0SAdrian Chadd 
353703682514SAdrian Chadd 	ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p",
353803682514SAdrian Chadd 	    &an->an_node);
353903682514SAdrian Chadd 
3540375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
3541eb6f0de0SAdrian Chadd 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
3542eb6f0de0SAdrian Chadd 		struct ath_tid *atid = &an->an_tid[tid];
3543eb6f0de0SAdrian Chadd 
3544eb6f0de0SAdrian Chadd 		/* Free packets */
3545eb6f0de0SAdrian Chadd 		ath_tx_tid_drain(sc, an, atid, &bf_cq);
354623f44d2bSAdrian Chadd 		/* Remove this tid from the list of active tids */
354723f44d2bSAdrian Chadd 		ath_tx_tid_unsched(sc, atid);
3548eb6f0de0SAdrian Chadd 	}
3549375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
3550eb6f0de0SAdrian Chadd 
3551eb6f0de0SAdrian Chadd 	/* Handle completed frames */
3552eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3553eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
3554eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
3555eb6f0de0SAdrian Chadd 	}
3556eb6f0de0SAdrian Chadd }
3557eb6f0de0SAdrian Chadd 
3558eb6f0de0SAdrian Chadd /*
3559eb6f0de0SAdrian Chadd  * Drain all the software TXQs currently with traffic queued.
3560eb6f0de0SAdrian Chadd  */
3561eb6f0de0SAdrian Chadd void
3562eb6f0de0SAdrian Chadd ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
3563eb6f0de0SAdrian Chadd {
3564eb6f0de0SAdrian Chadd 	struct ath_tid *tid;
3565eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
3566eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
3567eb6f0de0SAdrian Chadd 
3568eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
3569375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
3570eb6f0de0SAdrian Chadd 
3571eb6f0de0SAdrian Chadd 	/*
3572eb6f0de0SAdrian Chadd 	 * Iterate over all active tids for the given txq,
3573eb6f0de0SAdrian Chadd 	 * flushing and unsched'ing them
3574eb6f0de0SAdrian Chadd 	 */
3575eb6f0de0SAdrian Chadd 	while (! TAILQ_EMPTY(&txq->axq_tidq)) {
3576eb6f0de0SAdrian Chadd 		tid = TAILQ_FIRST(&txq->axq_tidq);
3577eb6f0de0SAdrian Chadd 		ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
3578eb6f0de0SAdrian Chadd 		ath_tx_tid_unsched(sc, tid);
3579eb6f0de0SAdrian Chadd 	}
3580eb6f0de0SAdrian Chadd 
3581375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
3582eb6f0de0SAdrian Chadd 
3583eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3584eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
3585eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
3586eb6f0de0SAdrian Chadd 	}
3587eb6f0de0SAdrian Chadd }
3588eb6f0de0SAdrian Chadd 
3589eb6f0de0SAdrian Chadd /*
3590eb6f0de0SAdrian Chadd  * Handle completion of non-aggregate session frames.
35910c54de88SAdrian Chadd  *
35920c54de88SAdrian Chadd  * This (currently) doesn't implement software retransmission of
35930c54de88SAdrian Chadd  * non-aggregate frames!
35940c54de88SAdrian Chadd  *
35950c54de88SAdrian Chadd  * Software retransmission of non-aggregate frames needs to obey
35960c54de88SAdrian Chadd  * the strict sequence number ordering, and drop any frames that
35970c54de88SAdrian Chadd  * will fail this.
35980c54de88SAdrian Chadd  *
35990c54de88SAdrian Chadd  * For now, filtered frames and frame transmission will cause
36000c54de88SAdrian Chadd  * all kinds of issues.  So we don't support them.
36010c54de88SAdrian Chadd  *
36020c54de88SAdrian Chadd  * So anyone queuing frames via ath_tx_normal_xmit() or
36030c54de88SAdrian Chadd  * ath_tx_hw_queue_norm() must override and set CLRDMASK.
3604eb6f0de0SAdrian Chadd  */
3605eb6f0de0SAdrian Chadd void
3606eb6f0de0SAdrian Chadd ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
3607eb6f0de0SAdrian Chadd {
3608eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
3609eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3610eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
3611eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3612eb6f0de0SAdrian Chadd 	struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
3613eb6f0de0SAdrian Chadd 
3614eb6f0de0SAdrian Chadd 	/* The TID state is protected behind the TXQ lock */
3615375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
3616eb6f0de0SAdrian Chadd 
3617eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
3618eb6f0de0SAdrian Chadd 	    __func__, bf, fail, atid->hwq_depth - 1);
3619eb6f0de0SAdrian Chadd 
3620eb6f0de0SAdrian Chadd 	atid->hwq_depth--;
3621f1bc738eSAdrian Chadd 
36220c54de88SAdrian Chadd #if 0
36230c54de88SAdrian Chadd 	/*
36240c54de88SAdrian Chadd 	 * If the frame was filtered, stick it on the filter frame
36250c54de88SAdrian Chadd 	 * queue and complain about it.  It shouldn't happen!
36260c54de88SAdrian Chadd 	 */
36270c54de88SAdrian Chadd 	if ((ts->ts_status & HAL_TXERR_FILT) ||
36280c54de88SAdrian Chadd 	    (ts->ts_status != 0 && atid->isfiltered)) {
36290c54de88SAdrian Chadd 		device_printf(sc->sc_dev,
36300c54de88SAdrian Chadd 		    "%s: isfiltered=%d, ts_status=%d: huh?\n",
36310c54de88SAdrian Chadd 		    __func__,
36320c54de88SAdrian Chadd 		    atid->isfiltered,
36330c54de88SAdrian Chadd 		    ts->ts_status);
36340c54de88SAdrian Chadd 		ath_tx_tid_filt_comp_buf(sc, atid, bf);
36350c54de88SAdrian Chadd 	}
36360c54de88SAdrian Chadd #endif
3637f1bc738eSAdrian Chadd 	if (atid->isfiltered)
36380c54de88SAdrian Chadd 		device_printf(sc->sc_dev, "%s: filtered?!\n", __func__);
3639eb6f0de0SAdrian Chadd 	if (atid->hwq_depth < 0)
3640eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
3641eb6f0de0SAdrian Chadd 		    __func__, atid->hwq_depth);
3642f1bc738eSAdrian Chadd 
3643f1bc738eSAdrian Chadd 	/*
3644f1bc738eSAdrian Chadd 	 * If the queue is filtered, potentially mark it as complete
3645f1bc738eSAdrian Chadd 	 * and reschedule it as needed.
3646f1bc738eSAdrian Chadd 	 *
3647f1bc738eSAdrian Chadd 	 * This is required as there may be a subsequent TX descriptor
3648f1bc738eSAdrian Chadd 	 * for this end-node that has CLRDMASK set, so it's quite possible
3649f1bc738eSAdrian Chadd 	 * that a filtered frame will be followed by a non-filtered
3650f1bc738eSAdrian Chadd 	 * (complete or otherwise) frame.
3651f1bc738eSAdrian Chadd 	 *
3652f1bc738eSAdrian Chadd 	 * XXX should we do this before we complete the frame?
3653f1bc738eSAdrian Chadd 	 */
3654f1bc738eSAdrian Chadd 	if (atid->isfiltered)
3655f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
3656375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
3657eb6f0de0SAdrian Chadd 
3658eb6f0de0SAdrian Chadd 	/*
3659eb6f0de0SAdrian Chadd 	 * punt to rate control if we're not being cleaned up
3660eb6f0de0SAdrian Chadd 	 * during a hw queue drain and the frame wanted an ACK.
3661eb6f0de0SAdrian Chadd 	 */
3662875a9451SAdrian Chadd 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
3663eb6f0de0SAdrian Chadd 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
3664eb6f0de0SAdrian Chadd 		    ts, bf->bf_state.bfs_pktlen,
3665eb6f0de0SAdrian Chadd 		    1, (ts->ts_status == 0) ? 0 : 1);
3666eb6f0de0SAdrian Chadd 
3667eb6f0de0SAdrian Chadd 	ath_tx_default_comp(sc, bf, fail);
3668eb6f0de0SAdrian Chadd }
3669eb6f0de0SAdrian Chadd 
3670eb6f0de0SAdrian Chadd /*
3671eb6f0de0SAdrian Chadd  * Handle cleanup of aggregate session packets that aren't
3672eb6f0de0SAdrian Chadd  * an A-MPDU.
3673eb6f0de0SAdrian Chadd  *
3674eb6f0de0SAdrian Chadd  * There's no need to update the BAW here - the session is being
3675eb6f0de0SAdrian Chadd  * torn down.
3676eb6f0de0SAdrian Chadd  */
3677eb6f0de0SAdrian Chadd static void
3678eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
3679eb6f0de0SAdrian Chadd {
3680eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
3681eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3682eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
3683eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3684eb6f0de0SAdrian Chadd 
3685eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
3686eb6f0de0SAdrian Chadd 	    __func__, tid, atid->incomp);
3687eb6f0de0SAdrian Chadd 
3688375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
3689eb6f0de0SAdrian Chadd 	atid->incomp--;
3690eb6f0de0SAdrian Chadd 	if (atid->incomp == 0) {
3691eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3692eb6f0de0SAdrian Chadd 		    "%s: TID %d: cleaned up! resume!\n",
3693eb6f0de0SAdrian Chadd 		    __func__, tid);
3694eb6f0de0SAdrian Chadd 		atid->cleanup_inprogress = 0;
3695eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
3696eb6f0de0SAdrian Chadd 	}
3697375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
3698eb6f0de0SAdrian Chadd 
3699eb6f0de0SAdrian Chadd 	ath_tx_default_comp(sc, bf, 0);
3700eb6f0de0SAdrian Chadd }
3701eb6f0de0SAdrian Chadd 
3702eb6f0de0SAdrian Chadd /*
3703eb6f0de0SAdrian Chadd  * Performs transmit side cleanup when TID changes from aggregated to
3704eb6f0de0SAdrian Chadd  * unaggregated.
3705eb6f0de0SAdrian Chadd  *
3706eb6f0de0SAdrian Chadd  * - Discard all retry frames from the s/w queue.
3707eb6f0de0SAdrian Chadd  * - Fix the tx completion function for all buffers in s/w queue.
3708eb6f0de0SAdrian Chadd  * - Count the number of unacked frames, and let transmit completion
3709eb6f0de0SAdrian Chadd  *   handle it later.
3710eb6f0de0SAdrian Chadd  *
3711eb6f0de0SAdrian Chadd  * The caller is responsible for pausing the TID.
3712eb6f0de0SAdrian Chadd  */
3713eb6f0de0SAdrian Chadd static void
37144dfd4507SAdrian Chadd ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid)
3715eb6f0de0SAdrian Chadd {
3716eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3717eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3718eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_next;
3719eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
3720eb6f0de0SAdrian Chadd 
3721d3a6425bSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
3722eb6f0de0SAdrian Chadd 	    "%s: TID %d: called\n", __func__, tid);
3723eb6f0de0SAdrian Chadd 
3724eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
3725375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
3726eb6f0de0SAdrian Chadd 
3727eb6f0de0SAdrian Chadd 	/*
3728f1bc738eSAdrian Chadd 	 * Move the filtered frames to the TX queue, before
3729f1bc738eSAdrian Chadd 	 * we run off and discard/process things.
3730f1bc738eSAdrian Chadd 	 */
3731f1bc738eSAdrian Chadd 	/* XXX this is really quite inefficient */
373213aa9ee5SAdrian Chadd 	while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) {
373313aa9ee5SAdrian Chadd 		ATH_TID_FILT_REMOVE(atid, bf, bf_list);
37343e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
3735f1bc738eSAdrian Chadd 	}
3736f1bc738eSAdrian Chadd 
3737f1bc738eSAdrian Chadd 	/*
3738eb6f0de0SAdrian Chadd 	 * Update the frames in the software TX queue:
3739eb6f0de0SAdrian Chadd 	 *
3740eb6f0de0SAdrian Chadd 	 * + Discard retry frames in the queue
3741eb6f0de0SAdrian Chadd 	 * + Fix the completion function to be non-aggregate
3742eb6f0de0SAdrian Chadd 	 */
37433e6cc97fSAdrian Chadd 	bf = ATH_TID_FIRST(atid);
3744eb6f0de0SAdrian Chadd 	while (bf) {
3745eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_isretried) {
3746eb6f0de0SAdrian Chadd 			bf_next = TAILQ_NEXT(bf, bf_list);
37473e6cc97fSAdrian Chadd 			ATH_TID_REMOVE(atid, bf, bf_list);
3748eb6f0de0SAdrian Chadd 			atid->axq_depth--;
3749eb6f0de0SAdrian Chadd 			if (bf->bf_state.bfs_dobaw) {
3750eb6f0de0SAdrian Chadd 				ath_tx_update_baw(sc, an, atid, bf);
3751eb6f0de0SAdrian Chadd 				if (! bf->bf_state.bfs_addedbaw)
3752eb6f0de0SAdrian Chadd 					device_printf(sc->sc_dev,
3753eb6f0de0SAdrian Chadd 					    "%s: wasn't added: seqno %d\n",
3754d4365d16SAdrian Chadd 					    __func__,
3755d4365d16SAdrian Chadd 					    SEQNO(bf->bf_state.bfs_seqno));
3756eb6f0de0SAdrian Chadd 			}
3757eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
3758eb6f0de0SAdrian Chadd 			/*
3759eb6f0de0SAdrian Chadd 			 * Call the default completion handler with "fail" just
3760eb6f0de0SAdrian Chadd 			 * so upper levels are suitably notified about this.
3761eb6f0de0SAdrian Chadd 			 */
3762eb6f0de0SAdrian Chadd 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
3763eb6f0de0SAdrian Chadd 			bf = bf_next;
3764eb6f0de0SAdrian Chadd 			continue;
3765eb6f0de0SAdrian Chadd 		}
3766eb6f0de0SAdrian Chadd 		/* Give these the default completion handler */
3767eb6f0de0SAdrian Chadd 		bf->bf_comp = ath_tx_normal_comp;
3768eb6f0de0SAdrian Chadd 		bf = TAILQ_NEXT(bf, bf_list);
3769eb6f0de0SAdrian Chadd 	}
3770eb6f0de0SAdrian Chadd 
3771eb6f0de0SAdrian Chadd 	/* The caller is required to pause the TID */
3772eb6f0de0SAdrian Chadd #if 0
3773eb6f0de0SAdrian Chadd 	/* Pause the TID */
3774eb6f0de0SAdrian Chadd 	ath_tx_tid_pause(sc, atid);
3775eb6f0de0SAdrian Chadd #endif
3776eb6f0de0SAdrian Chadd 
3777eb6f0de0SAdrian Chadd 	/*
3778eb6f0de0SAdrian Chadd 	 * Calculate what hardware-queued frames exist based
3779eb6f0de0SAdrian Chadd 	 * on the current BAW size. Ie, what frames have been
3780eb6f0de0SAdrian Chadd 	 * added to the TX hardware queue for this TID but
3781eb6f0de0SAdrian Chadd 	 * not yet ACKed.
3782eb6f0de0SAdrian Chadd 	 */
3783eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
3784eb6f0de0SAdrian Chadd 	/* Need the lock - fiddling with BAW */
3785eb6f0de0SAdrian Chadd 	while (atid->baw_head != atid->baw_tail) {
3786eb6f0de0SAdrian Chadd 		if (atid->tx_buf[atid->baw_head]) {
3787eb6f0de0SAdrian Chadd 			atid->incomp++;
3788eb6f0de0SAdrian Chadd 			atid->cleanup_inprogress = 1;
3789eb6f0de0SAdrian Chadd 			atid->tx_buf[atid->baw_head] = NULL;
3790eb6f0de0SAdrian Chadd 		}
3791eb6f0de0SAdrian Chadd 		INCR(atid->baw_head, ATH_TID_MAX_BUFS);
3792eb6f0de0SAdrian Chadd 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
3793eb6f0de0SAdrian Chadd 	}
3794eb6f0de0SAdrian Chadd 
3795eb6f0de0SAdrian Chadd 	/*
3796eb6f0de0SAdrian Chadd 	 * If cleanup is required, defer TID scheduling
3797eb6f0de0SAdrian Chadd 	 * until all the HW queued packets have been
3798eb6f0de0SAdrian Chadd 	 * sent.
3799eb6f0de0SAdrian Chadd 	 */
3800eb6f0de0SAdrian Chadd 	if (! atid->cleanup_inprogress)
3801eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
3802eb6f0de0SAdrian Chadd 
3803eb6f0de0SAdrian Chadd 	if (atid->cleanup_inprogress)
3804eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3805eb6f0de0SAdrian Chadd 		    "%s: TID %d: cleanup needed: %d packets\n",
3806eb6f0de0SAdrian Chadd 		    __func__, tid, atid->incomp);
3807375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
3808eb6f0de0SAdrian Chadd 
3809eb6f0de0SAdrian Chadd 	/* Handle completing frames and fail them */
3810eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
3811eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
3812eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 1);
3813eb6f0de0SAdrian Chadd 	}
3814eb6f0de0SAdrian Chadd }
3815eb6f0de0SAdrian Chadd 
3816eb6f0de0SAdrian Chadd static struct ath_buf *
381738962489SAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
381838962489SAdrian Chadd     struct ath_tid *tid, struct ath_buf *bf)
3819eb6f0de0SAdrian Chadd {
3820eb6f0de0SAdrian Chadd 	struct ath_buf *nbf;
3821eb6f0de0SAdrian Chadd 	int error;
3822eb6f0de0SAdrian Chadd 
3823eb6f0de0SAdrian Chadd 	nbf = ath_buf_clone(sc, bf);
3824eb6f0de0SAdrian Chadd 
3825eb6f0de0SAdrian Chadd #if 0
3826eb6f0de0SAdrian Chadd 	device_printf(sc->sc_dev, "%s: ATH_BUF_BUSY; cloning\n",
3827eb6f0de0SAdrian Chadd 	    __func__);
3828eb6f0de0SAdrian Chadd #endif
3829eb6f0de0SAdrian Chadd 
3830eb6f0de0SAdrian Chadd 	if (nbf == NULL) {
3831eb6f0de0SAdrian Chadd 		/* Failed to clone */
3832eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
3833eb6f0de0SAdrian Chadd 		    "%s: failed to clone a busy buffer\n",
3834eb6f0de0SAdrian Chadd 		    __func__);
3835eb6f0de0SAdrian Chadd 		return NULL;
3836eb6f0de0SAdrian Chadd 	}
3837eb6f0de0SAdrian Chadd 
3838eb6f0de0SAdrian Chadd 	/* Setup the dma for the new buffer */
3839eb6f0de0SAdrian Chadd 	error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
3840eb6f0de0SAdrian Chadd 	if (error != 0) {
3841eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
3842eb6f0de0SAdrian Chadd 		    "%s: failed to setup dma for clone\n",
3843eb6f0de0SAdrian Chadd 		    __func__);
3844eb6f0de0SAdrian Chadd 		/*
3845eb6f0de0SAdrian Chadd 		 * Put this at the head of the list, not tail;
3846eb6f0de0SAdrian Chadd 		 * that way it doesn't interfere with the
3847eb6f0de0SAdrian Chadd 		 * busy buffer logic (which uses the tail of
3848eb6f0de0SAdrian Chadd 		 * the list.)
3849eb6f0de0SAdrian Chadd 		 */
3850eb6f0de0SAdrian Chadd 		ATH_TXBUF_LOCK(sc);
385132c387f7SAdrian Chadd 		ath_returnbuf_head(sc, nbf);
3852eb6f0de0SAdrian Chadd 		ATH_TXBUF_UNLOCK(sc);
3853eb6f0de0SAdrian Chadd 		return NULL;
3854eb6f0de0SAdrian Chadd 	}
3855eb6f0de0SAdrian Chadd 
385638962489SAdrian Chadd 	/* Update BAW if required, before we free the original buf */
385738962489SAdrian Chadd 	if (bf->bf_state.bfs_dobaw)
385838962489SAdrian Chadd 		ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
385938962489SAdrian Chadd 
3860eb6f0de0SAdrian Chadd 	/* Free current buffer; return the older buffer */
3861eb6f0de0SAdrian Chadd 	bf->bf_m = NULL;
3862eb6f0de0SAdrian Chadd 	bf->bf_node = NULL;
3863eb6f0de0SAdrian Chadd 	ath_freebuf(sc, bf);
3864f1bc738eSAdrian Chadd 
3865eb6f0de0SAdrian Chadd 	return nbf;
3866eb6f0de0SAdrian Chadd }
3867eb6f0de0SAdrian Chadd 
3868eb6f0de0SAdrian Chadd /*
3869eb6f0de0SAdrian Chadd  * Handle retrying an unaggregate frame in an aggregate
3870eb6f0de0SAdrian Chadd  * session.
3871eb6f0de0SAdrian Chadd  *
3872eb6f0de0SAdrian Chadd  * If too many retries occur, pause the TID, wait for
3873eb6f0de0SAdrian Chadd  * any further retransmits (as there's no reason why
3874eb6f0de0SAdrian Chadd  * non-aggregate frames in an aggregate session are
3875eb6f0de0SAdrian Chadd  * transmitted in-order; they just have to be in-BAW)
3876eb6f0de0SAdrian Chadd  * and then queue a BAR.
3877eb6f0de0SAdrian Chadd  */
3878eb6f0de0SAdrian Chadd static void
3879eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
3880eb6f0de0SAdrian Chadd {
3881eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
3882eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3883eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
3884eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3885eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
3886eb6f0de0SAdrian Chadd 
3887375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
3888eb6f0de0SAdrian Chadd 
3889eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
3890eb6f0de0SAdrian Chadd 
3891eb6f0de0SAdrian Chadd 	/*
3892eb6f0de0SAdrian Chadd 	 * If the buffer is marked as busy, we can't directly
3893eb6f0de0SAdrian Chadd 	 * reuse it. Instead, try to clone the buffer.
3894eb6f0de0SAdrian Chadd 	 * If the clone is successful, recycle the old buffer.
3895eb6f0de0SAdrian Chadd 	 * If the clone is unsuccessful, set bfs_retries to max
3896eb6f0de0SAdrian Chadd 	 * to force the next bit of code to free the buffer
3897eb6f0de0SAdrian Chadd 	 * for us.
3898eb6f0de0SAdrian Chadd 	 */
3899eb6f0de0SAdrian Chadd 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
3900eb6f0de0SAdrian Chadd 	    (bf->bf_flags & ATH_BUF_BUSY)) {
3901eb6f0de0SAdrian Chadd 		struct ath_buf *nbf;
390238962489SAdrian Chadd 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
3903eb6f0de0SAdrian Chadd 		if (nbf)
3904eb6f0de0SAdrian Chadd 			/* bf has been freed at this point */
3905eb6f0de0SAdrian Chadd 			bf = nbf;
3906eb6f0de0SAdrian Chadd 		else
3907eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
3908eb6f0de0SAdrian Chadd 	}
3909eb6f0de0SAdrian Chadd 
3910eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
3911eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
3912eb6f0de0SAdrian Chadd 		    "%s: exceeded retries; seqno %d\n",
3913eb6f0de0SAdrian Chadd 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
3914eb6f0de0SAdrian Chadd 		sc->sc_stats.ast_tx_swretrymax++;
3915eb6f0de0SAdrian Chadd 
3916eb6f0de0SAdrian Chadd 		/* Update BAW anyway */
3917eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_dobaw) {
3918eb6f0de0SAdrian Chadd 			ath_tx_update_baw(sc, an, atid, bf);
3919eb6f0de0SAdrian Chadd 			if (! bf->bf_state.bfs_addedbaw)
3920eb6f0de0SAdrian Chadd 				device_printf(sc->sc_dev,
3921eb6f0de0SAdrian Chadd 				    "%s: wasn't added: seqno %d\n",
3922eb6f0de0SAdrian Chadd 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
3923eb6f0de0SAdrian Chadd 		}
3924eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_dobaw = 0;
3925eb6f0de0SAdrian Chadd 
392688b3d483SAdrian Chadd 		/* Suspend the TX queue and get ready to send the BAR */
392788b3d483SAdrian Chadd 		ath_tx_tid_bar_suspend(sc, atid);
392888b3d483SAdrian Chadd 
392988b3d483SAdrian Chadd 		/* Send the BAR if there are no other frames waiting */
393088b3d483SAdrian Chadd 		if (ath_tx_tid_bar_tx_ready(sc, atid))
393188b3d483SAdrian Chadd 			ath_tx_tid_bar_tx(sc, atid);
393288b3d483SAdrian Chadd 
3933375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
3934eb6f0de0SAdrian Chadd 
3935eb6f0de0SAdrian Chadd 		/* Free buffer, bf is free after this call */
3936eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
3937eb6f0de0SAdrian Chadd 		return;
3938eb6f0de0SAdrian Chadd 	}
3939eb6f0de0SAdrian Chadd 
3940eb6f0de0SAdrian Chadd 	/*
3941eb6f0de0SAdrian Chadd 	 * This increments the retry counter as well as
3942eb6f0de0SAdrian Chadd 	 * sets the retry flag in the ath_buf and packet
3943eb6f0de0SAdrian Chadd 	 * body.
3944eb6f0de0SAdrian Chadd 	 */
3945eb6f0de0SAdrian Chadd 	ath_tx_set_retry(sc, bf);
3946f1bc738eSAdrian Chadd 	sc->sc_stats.ast_tx_swretries++;
3947eb6f0de0SAdrian Chadd 
3948eb6f0de0SAdrian Chadd 	/*
3949eb6f0de0SAdrian Chadd 	 * Insert this at the head of the queue, so it's
3950eb6f0de0SAdrian Chadd 	 * retried before any current/subsequent frames.
3951eb6f0de0SAdrian Chadd 	 */
39523e6cc97fSAdrian Chadd 	ATH_TID_INSERT_HEAD(atid, bf, bf_list);
3953eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, atid);
395488b3d483SAdrian Chadd 	/* Send the BAR if there are no other frames waiting */
395588b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, atid))
395688b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, atid);
3957eb6f0de0SAdrian Chadd 
3958375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
3959eb6f0de0SAdrian Chadd }
3960eb6f0de0SAdrian Chadd 
3961eb6f0de0SAdrian Chadd /*
3962eb6f0de0SAdrian Chadd  * Common code for aggregate excessive retry/subframe retry.
3963eb6f0de0SAdrian Chadd  * If retrying, queues buffers to bf_q. If not, frees the
3964eb6f0de0SAdrian Chadd  * buffers.
3965eb6f0de0SAdrian Chadd  *
3966eb6f0de0SAdrian Chadd  * XXX should unify this with ath_tx_aggr_retry_unaggr()
3967eb6f0de0SAdrian Chadd  */
3968eb6f0de0SAdrian Chadd static int
3969eb6f0de0SAdrian Chadd ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
3970eb6f0de0SAdrian Chadd     ath_bufhead *bf_q)
3971eb6f0de0SAdrian Chadd {
3972eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
3973eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
3974eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
3975eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
3976eb6f0de0SAdrian Chadd 
3977375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
3978eb6f0de0SAdrian Chadd 
397921840808SAdrian Chadd 	/* XXX clr11naggr should be done for all subframes */
3980eb6f0de0SAdrian Chadd 	ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
3981eb6f0de0SAdrian Chadd 	ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
3982f1bc738eSAdrian Chadd 
3983eb6f0de0SAdrian Chadd 	/* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
3984eb6f0de0SAdrian Chadd 
3985eb6f0de0SAdrian Chadd 	/*
3986eb6f0de0SAdrian Chadd 	 * If the buffer is marked as busy, we can't directly
3987eb6f0de0SAdrian Chadd 	 * reuse it. Instead, try to clone the buffer.
3988eb6f0de0SAdrian Chadd 	 * If the clone is successful, recycle the old buffer.
3989eb6f0de0SAdrian Chadd 	 * If the clone is unsuccessful, set bfs_retries to max
3990eb6f0de0SAdrian Chadd 	 * to force the next bit of code to free the buffer
3991eb6f0de0SAdrian Chadd 	 * for us.
3992eb6f0de0SAdrian Chadd 	 */
3993eb6f0de0SAdrian Chadd 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
3994eb6f0de0SAdrian Chadd 	    (bf->bf_flags & ATH_BUF_BUSY)) {
3995eb6f0de0SAdrian Chadd 		struct ath_buf *nbf;
399638962489SAdrian Chadd 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
3997eb6f0de0SAdrian Chadd 		if (nbf)
3998eb6f0de0SAdrian Chadd 			/* bf has been freed at this point */
3999eb6f0de0SAdrian Chadd 			bf = nbf;
4000eb6f0de0SAdrian Chadd 		else
4001eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4002eb6f0de0SAdrian Chadd 	}
4003eb6f0de0SAdrian Chadd 
4004eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4005eb6f0de0SAdrian Chadd 		sc->sc_stats.ast_tx_swretrymax++;
4006eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4007eb6f0de0SAdrian Chadd 		    "%s: max retries: seqno %d\n",
4008eb6f0de0SAdrian Chadd 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4009eb6f0de0SAdrian Chadd 		ath_tx_update_baw(sc, an, atid, bf);
4010eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_addedbaw)
4011eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev,
4012eb6f0de0SAdrian Chadd 			    "%s: wasn't added: seqno %d\n",
4013eb6f0de0SAdrian Chadd 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4014eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_dobaw = 0;
4015eb6f0de0SAdrian Chadd 		return 1;
4016eb6f0de0SAdrian Chadd 	}
4017eb6f0de0SAdrian Chadd 
4018eb6f0de0SAdrian Chadd 	ath_tx_set_retry(sc, bf);
4019f1bc738eSAdrian Chadd 	sc->sc_stats.ast_tx_swretries++;
4020eb6f0de0SAdrian Chadd 	bf->bf_next = NULL;		/* Just to make sure */
4021eb6f0de0SAdrian Chadd 
402221840808SAdrian Chadd 	/* Clear the aggregate state */
402321840808SAdrian Chadd 	bf->bf_state.bfs_aggr = 0;
402421840808SAdrian Chadd 	bf->bf_state.bfs_ndelim = 0;	/* ??? needed? */
402521840808SAdrian Chadd 	bf->bf_state.bfs_nframes = 1;
402621840808SAdrian Chadd 
4027eb6f0de0SAdrian Chadd 	TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
4028eb6f0de0SAdrian Chadd 	return 0;
4029eb6f0de0SAdrian Chadd }
4030eb6f0de0SAdrian Chadd 
4031eb6f0de0SAdrian Chadd /*
4032eb6f0de0SAdrian Chadd  * error pkt completion for an aggregate destination
4033eb6f0de0SAdrian Chadd  */
4034eb6f0de0SAdrian Chadd static void
4035eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
4036eb6f0de0SAdrian Chadd     struct ath_tid *tid)
4037eb6f0de0SAdrian Chadd {
4038eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf_first->bf_node;
4039eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4040eb6f0de0SAdrian Chadd 	struct ath_buf *bf_next, *bf;
4041eb6f0de0SAdrian Chadd 	ath_bufhead bf_q;
4042eb6f0de0SAdrian Chadd 	int drops = 0;
4043eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
4044eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
4045eb6f0de0SAdrian Chadd 
4046eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_q);
4047eb6f0de0SAdrian Chadd 	TAILQ_INIT(&bf_cq);
4048eb6f0de0SAdrian Chadd 
4049eb6f0de0SAdrian Chadd 	/*
4050eb6f0de0SAdrian Chadd 	 * Update rate control - all frames have failed.
4051eb6f0de0SAdrian Chadd 	 *
4052eb6f0de0SAdrian Chadd 	 * XXX use the length in the first frame in the series;
4053eb6f0de0SAdrian Chadd 	 * XXX just so things are consistent for now.
4054eb6f0de0SAdrian Chadd 	 */
4055eb6f0de0SAdrian Chadd 	ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
4056eb6f0de0SAdrian Chadd 	    &bf_first->bf_status.ds_txstat,
4057eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_pktlen,
4058eb6f0de0SAdrian Chadd 	    bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
4059eb6f0de0SAdrian Chadd 
4060375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4061eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
40622d3d4776SAdrian Chadd 	sc->sc_stats.ast_tx_aggr_failall++;
4063eb6f0de0SAdrian Chadd 
4064eb6f0de0SAdrian Chadd 	/* Retry all subframes */
4065eb6f0de0SAdrian Chadd 	bf = bf_first;
4066eb6f0de0SAdrian Chadd 	while (bf) {
4067eb6f0de0SAdrian Chadd 		bf_next = bf->bf_next;
4068eb6f0de0SAdrian Chadd 		bf->bf_next = NULL;	/* Remove it from the aggr list */
40692d3d4776SAdrian Chadd 		sc->sc_stats.ast_tx_aggr_fail++;
4070eb6f0de0SAdrian Chadd 		if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4071eb6f0de0SAdrian Chadd 			drops++;
4072eb6f0de0SAdrian Chadd 			bf->bf_next = NULL;
4073eb6f0de0SAdrian Chadd 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4074eb6f0de0SAdrian Chadd 		}
4075eb6f0de0SAdrian Chadd 		bf = bf_next;
4076eb6f0de0SAdrian Chadd 	}
4077eb6f0de0SAdrian Chadd 
4078eb6f0de0SAdrian Chadd 	/* Prepend all frames to the beginning of the queue */
4079eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4080eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_q, bf, bf_list);
40813e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
4082eb6f0de0SAdrian Chadd 	}
4083eb6f0de0SAdrian Chadd 
408439da9d42SAdrian Chadd 	/*
408539da9d42SAdrian Chadd 	 * Schedule the TID to be re-tried.
408639da9d42SAdrian Chadd 	 */
4087eb6f0de0SAdrian Chadd 	ath_tx_tid_sched(sc, tid);
4088eb6f0de0SAdrian Chadd 
4089eb6f0de0SAdrian Chadd 	/*
4090eb6f0de0SAdrian Chadd 	 * send bar if we dropped any frames
4091eb6f0de0SAdrian Chadd 	 *
4092eb6f0de0SAdrian Chadd 	 * Keep the txq lock held for now, as we need to ensure
4093eb6f0de0SAdrian Chadd 	 * that ni_txseqs[] is consistent (as it's being updated
4094eb6f0de0SAdrian Chadd 	 * in the ifnet TX context or raw TX context.)
4095eb6f0de0SAdrian Chadd 	 */
4096eb6f0de0SAdrian Chadd 	if (drops) {
409788b3d483SAdrian Chadd 		/* Suspend the TX queue and get ready to send the BAR */
409888b3d483SAdrian Chadd 		ath_tx_tid_bar_suspend(sc, tid);
4099eb6f0de0SAdrian Chadd 	}
4100eb6f0de0SAdrian Chadd 
410188b3d483SAdrian Chadd 	/*
410288b3d483SAdrian Chadd 	 * Send BAR if required
410388b3d483SAdrian Chadd 	 */
410488b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, tid))
410588b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, tid);
4106f1bc738eSAdrian Chadd 
4107375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
410888b3d483SAdrian Chadd 
4109eb6f0de0SAdrian Chadd 	/* Complete frames which errored out */
4110eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4111eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4112eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
4113eb6f0de0SAdrian Chadd 	}
4114eb6f0de0SAdrian Chadd }
4115eb6f0de0SAdrian Chadd 
4116eb6f0de0SAdrian Chadd /*
4117eb6f0de0SAdrian Chadd  * Handle clean-up of packets from an aggregate list.
4118eb6f0de0SAdrian Chadd  *
4119eb6f0de0SAdrian Chadd  * There's no need to update the BAW here - the session is being
4120eb6f0de0SAdrian Chadd  * torn down.
4121eb6f0de0SAdrian Chadd  */
4122eb6f0de0SAdrian Chadd static void
4123eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
4124eb6f0de0SAdrian Chadd {
4125eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_next;
4126eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf_first->bf_node;
4127eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4128eb6f0de0SAdrian Chadd 	int tid = bf_first->bf_state.bfs_tid;
4129eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
4130eb6f0de0SAdrian Chadd 
4131eb6f0de0SAdrian Chadd 	bf = bf_first;
4132eb6f0de0SAdrian Chadd 
4133375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4134eb6f0de0SAdrian Chadd 
4135eb6f0de0SAdrian Chadd 	/* update incomp */
4136eb6f0de0SAdrian Chadd 	while (bf) {
4137eb6f0de0SAdrian Chadd 		atid->incomp--;
4138eb6f0de0SAdrian Chadd 		bf = bf->bf_next;
4139eb6f0de0SAdrian Chadd 	}
4140eb6f0de0SAdrian Chadd 
4141eb6f0de0SAdrian Chadd 	if (atid->incomp == 0) {
4142eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4143eb6f0de0SAdrian Chadd 		    "%s: TID %d: cleaned up! resume!\n",
4144eb6f0de0SAdrian Chadd 		    __func__, tid);
4145eb6f0de0SAdrian Chadd 		atid->cleanup_inprogress = 0;
4146eb6f0de0SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
4147eb6f0de0SAdrian Chadd 	}
414888b3d483SAdrian Chadd 
414988b3d483SAdrian Chadd 	/* Send BAR if required */
4150f1bc738eSAdrian Chadd 	/* XXX why would we send a BAR when transitioning to non-aggregation? */
415188b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, atid))
415288b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, atid);
4153f1bc738eSAdrian Chadd 
4154375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
4155eb6f0de0SAdrian Chadd 
4156eb6f0de0SAdrian Chadd 	/* Handle frame completion */
4157eb6f0de0SAdrian Chadd 	while (bf) {
4158eb6f0de0SAdrian Chadd 		bf_next = bf->bf_next;
4159eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 1);
4160eb6f0de0SAdrian Chadd 		bf = bf_next;
4161eb6f0de0SAdrian Chadd 	}
4162eb6f0de0SAdrian Chadd }
4163eb6f0de0SAdrian Chadd 
4164eb6f0de0SAdrian Chadd /*
4165eb6f0de0SAdrian Chadd  * Handle completion of an set of aggregate frames.
4166eb6f0de0SAdrian Chadd  *
4167eb6f0de0SAdrian Chadd  * XXX for now, simply complete each sub-frame.
4168eb6f0de0SAdrian Chadd  *
4169eb6f0de0SAdrian Chadd  * Note: the completion handler is the last descriptor in the aggregate,
4170eb6f0de0SAdrian Chadd  * not the last descriptor in the first frame.
4171eb6f0de0SAdrian Chadd  */
4172eb6f0de0SAdrian Chadd static void
4173d4365d16SAdrian Chadd ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
4174d4365d16SAdrian Chadd     int fail)
4175eb6f0de0SAdrian Chadd {
4176eb6f0de0SAdrian Chadd 	//struct ath_desc *ds = bf->bf_lastds;
4177eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf_first->bf_node;
4178eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4179eb6f0de0SAdrian Chadd 	int tid = bf_first->bf_state.bfs_tid;
4180eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
4181eb6f0de0SAdrian Chadd 	struct ath_tx_status ts;
4182eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
4183eb6f0de0SAdrian Chadd 	ath_bufhead bf_q;
4184eb6f0de0SAdrian Chadd 	ath_bufhead bf_cq;
4185eb6f0de0SAdrian Chadd 	int seq_st, tx_ok;
4186eb6f0de0SAdrian Chadd 	int hasba, isaggr;
4187eb6f0de0SAdrian Chadd 	uint32_t ba[2];
4188eb6f0de0SAdrian Chadd 	struct ath_buf *bf, *bf_next;
4189eb6f0de0SAdrian Chadd 	int ba_index;
4190eb6f0de0SAdrian Chadd 	int drops = 0;
4191eb6f0de0SAdrian Chadd 	int nframes = 0, nbad = 0, nf;
4192eb6f0de0SAdrian Chadd 	int pktlen;
4193eb6f0de0SAdrian Chadd 	/* XXX there's too much on the stack? */
4194b815538dSAdrian Chadd 	struct ath_rc_series rc[ATH_RC_NUM];
4195eb6f0de0SAdrian Chadd 	int txseq;
4196eb6f0de0SAdrian Chadd 
4197eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
4198eb6f0de0SAdrian Chadd 	    __func__, atid->hwq_depth);
4199eb6f0de0SAdrian Chadd 
42000aa5c1bbSAdrian Chadd 	/*
42010aa5c1bbSAdrian Chadd 	 * Take a copy; this may be needed -after- bf_first
42020aa5c1bbSAdrian Chadd 	 * has been completed and freed.
42030aa5c1bbSAdrian Chadd 	 */
42040aa5c1bbSAdrian Chadd 	ts = bf_first->bf_status.ds_txstat;
42050aa5c1bbSAdrian Chadd 
4206f1bc738eSAdrian Chadd 	TAILQ_INIT(&bf_q);
4207f1bc738eSAdrian Chadd 	TAILQ_INIT(&bf_cq);
4208f1bc738eSAdrian Chadd 
4209eb6f0de0SAdrian Chadd 	/* The TID state is kept behind the TXQ lock */
4210375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4211eb6f0de0SAdrian Chadd 
4212eb6f0de0SAdrian Chadd 	atid->hwq_depth--;
4213eb6f0de0SAdrian Chadd 	if (atid->hwq_depth < 0)
4214eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
4215eb6f0de0SAdrian Chadd 		    __func__, atid->hwq_depth);
4216eb6f0de0SAdrian Chadd 
4217eb6f0de0SAdrian Chadd 	/*
4218f1bc738eSAdrian Chadd 	 * If the TID is filtered, handle completing the filter
4219f1bc738eSAdrian Chadd 	 * transition before potentially kicking it to the cleanup
4220f1bc738eSAdrian Chadd 	 * function.
42210aa5c1bbSAdrian Chadd 	 *
42220aa5c1bbSAdrian Chadd 	 * XXX this is duplicate work, ew.
4223f1bc738eSAdrian Chadd 	 */
4224f1bc738eSAdrian Chadd 	if (atid->isfiltered)
4225f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
4226f1bc738eSAdrian Chadd 
4227f1bc738eSAdrian Chadd 	/*
4228eb6f0de0SAdrian Chadd 	 * Punt cleanup to the relevant function, not our problem now
4229eb6f0de0SAdrian Chadd 	 */
4230eb6f0de0SAdrian Chadd 	if (atid->cleanup_inprogress) {
4231f1bc738eSAdrian Chadd 		if (atid->isfiltered)
4232f1bc738eSAdrian Chadd 			device_printf(sc->sc_dev,
4233f1bc738eSAdrian Chadd 			    "%s: isfiltered=1, normal_comp?\n",
4234f1bc738eSAdrian Chadd 			    __func__);
4235375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4236eb6f0de0SAdrian Chadd 		ath_tx_comp_cleanup_aggr(sc, bf_first);
4237eb6f0de0SAdrian Chadd 		return;
4238eb6f0de0SAdrian Chadd 	}
4239eb6f0de0SAdrian Chadd 
4240eb6f0de0SAdrian Chadd 	/*
4241f1bc738eSAdrian Chadd 	 * If the frame is filtered, transition to filtered frame
4242f1bc738eSAdrian Chadd 	 * mode and add this to the filtered frame list.
4243f1bc738eSAdrian Chadd 	 *
4244f1bc738eSAdrian Chadd 	 * XXX TODO: figure out how this interoperates with
4245f1bc738eSAdrian Chadd 	 * BAR, pause and cleanup states.
4246f1bc738eSAdrian Chadd 	 */
4247f1bc738eSAdrian Chadd 	if ((ts.ts_status & HAL_TXERR_FILT) ||
4248f1bc738eSAdrian Chadd 	    (ts.ts_status != 0 && atid->isfiltered)) {
4249f1bc738eSAdrian Chadd 		if (fail != 0)
4250f1bc738eSAdrian Chadd 			device_printf(sc->sc_dev,
4251f1bc738eSAdrian Chadd 			    "%s: isfiltered=1, fail=%d\n", __func__, fail);
4252f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq);
4253f1bc738eSAdrian Chadd 
4254f1bc738eSAdrian Chadd 		/* Remove from BAW */
4255f1bc738eSAdrian Chadd 		TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) {
4256f1bc738eSAdrian Chadd 			if (bf->bf_state.bfs_addedbaw)
4257f1bc738eSAdrian Chadd 				drops++;
4258f1bc738eSAdrian Chadd 			if (bf->bf_state.bfs_dobaw) {
4259f1bc738eSAdrian Chadd 				ath_tx_update_baw(sc, an, atid, bf);
4260f1bc738eSAdrian Chadd 				if (! bf->bf_state.bfs_addedbaw)
4261f1bc738eSAdrian Chadd 					device_printf(sc->sc_dev,
4262f1bc738eSAdrian Chadd 					    "%s: wasn't added: seqno %d\n",
4263f1bc738eSAdrian Chadd 					    __func__,
4264f1bc738eSAdrian Chadd 					    SEQNO(bf->bf_state.bfs_seqno));
4265f1bc738eSAdrian Chadd 			}
4266f1bc738eSAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
4267f1bc738eSAdrian Chadd 		}
4268f1bc738eSAdrian Chadd 		/*
4269f1bc738eSAdrian Chadd 		 * If any intermediate frames in the BAW were dropped when
4270f1bc738eSAdrian Chadd 		 * handling filtering things, send a BAR.
4271f1bc738eSAdrian Chadd 		 */
4272f1bc738eSAdrian Chadd 		if (drops)
4273f1bc738eSAdrian Chadd 			ath_tx_tid_bar_suspend(sc, atid);
4274f1bc738eSAdrian Chadd 
4275f1bc738eSAdrian Chadd 		/*
4276f1bc738eSAdrian Chadd 		 * Finish up by sending a BAR if required and freeing
4277f1bc738eSAdrian Chadd 		 * the frames outside of the TX lock.
4278f1bc738eSAdrian Chadd 		 */
4279f1bc738eSAdrian Chadd 		goto finish_send_bar;
4280f1bc738eSAdrian Chadd 	}
4281f1bc738eSAdrian Chadd 
4282f1bc738eSAdrian Chadd 	/*
4283eb6f0de0SAdrian Chadd 	 * XXX for now, use the first frame in the aggregate for
4284eb6f0de0SAdrian Chadd 	 * XXX rate control completion; it's at least consistent.
4285eb6f0de0SAdrian Chadd 	 */
4286eb6f0de0SAdrian Chadd 	pktlen = bf_first->bf_state.bfs_pktlen;
4287eb6f0de0SAdrian Chadd 
4288eb6f0de0SAdrian Chadd 	/*
4289e9a6408eSAdrian Chadd 	 * Handle errors first!
4290e9a6408eSAdrian Chadd 	 *
4291e9a6408eSAdrian Chadd 	 * Here, handle _any_ error as a "exceeded retries" error.
4292e9a6408eSAdrian Chadd 	 * Later on (when filtered frames are to be specially handled)
4293e9a6408eSAdrian Chadd 	 * it'll have to be expanded.
4294eb6f0de0SAdrian Chadd 	 */
4295e9a6408eSAdrian Chadd #if 0
4296eb6f0de0SAdrian Chadd 	if (ts.ts_status & HAL_TXERR_XRETRY) {
4297e9a6408eSAdrian Chadd #endif
4298e9a6408eSAdrian Chadd 	if (ts.ts_status != 0) {
4299375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4300eb6f0de0SAdrian Chadd 		ath_tx_comp_aggr_error(sc, bf_first, atid);
4301eb6f0de0SAdrian Chadd 		return;
4302eb6f0de0SAdrian Chadd 	}
4303eb6f0de0SAdrian Chadd 
4304eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
4305eb6f0de0SAdrian Chadd 
4306eb6f0de0SAdrian Chadd 	/*
4307eb6f0de0SAdrian Chadd 	 * extract starting sequence and block-ack bitmap
4308eb6f0de0SAdrian Chadd 	 */
4309eb6f0de0SAdrian Chadd 	/* XXX endian-ness of seq_st, ba? */
4310eb6f0de0SAdrian Chadd 	seq_st = ts.ts_seqnum;
4311eb6f0de0SAdrian Chadd 	hasba = !! (ts.ts_flags & HAL_TX_BA);
4312eb6f0de0SAdrian Chadd 	tx_ok = (ts.ts_status == 0);
4313eb6f0de0SAdrian Chadd 	isaggr = bf_first->bf_state.bfs_aggr;
4314eb6f0de0SAdrian Chadd 	ba[0] = ts.ts_ba_low;
4315eb6f0de0SAdrian Chadd 	ba[1] = ts.ts_ba_high;
4316eb6f0de0SAdrian Chadd 
4317eb6f0de0SAdrian Chadd 	/*
4318eb6f0de0SAdrian Chadd 	 * Copy the TX completion status and the rate control
4319eb6f0de0SAdrian Chadd 	 * series from the first descriptor, as it may be freed
4320eb6f0de0SAdrian Chadd 	 * before the rate control code can get its grubby fingers
4321eb6f0de0SAdrian Chadd 	 * into things.
4322eb6f0de0SAdrian Chadd 	 */
4323eb6f0de0SAdrian Chadd 	memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
4324eb6f0de0SAdrian Chadd 
4325eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4326d4365d16SAdrian Chadd 	    "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
4327d4365d16SAdrian Chadd 	    "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
4328eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
4329eb6f0de0SAdrian Chadd 	    isaggr, seq_st, hasba, ba[0], ba[1]);
4330eb6f0de0SAdrian Chadd 
4331eb6f0de0SAdrian Chadd 	/* Occasionally, the MAC sends a tx status for the wrong TID. */
4332eb6f0de0SAdrian Chadd 	if (tid != ts.ts_tid) {
4333eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: tid %d != hw tid %d\n",
4334eb6f0de0SAdrian Chadd 		    __func__, tid, ts.ts_tid);
4335eb6f0de0SAdrian Chadd 		tx_ok = 0;
4336eb6f0de0SAdrian Chadd 	}
4337eb6f0de0SAdrian Chadd 
4338eb6f0de0SAdrian Chadd 	/* AR5416 BA bug; this requires an interface reset */
4339eb6f0de0SAdrian Chadd 	if (isaggr && tx_ok && (! hasba)) {
4340eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
4341d4365d16SAdrian Chadd 		    "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
4342d4365d16SAdrian Chadd 		    "seq_st=%d\n",
4343eb6f0de0SAdrian Chadd 		    __func__, hasba, tx_ok, isaggr, seq_st);
4344eb6f0de0SAdrian Chadd 		/* XXX TODO: schedule an interface reset */
43450f078d63SJohn Baldwin #ifdef ATH_DEBUG
43466abbbae5SAdrian Chadd 		ath_printtxbuf(sc, bf_first,
43476abbbae5SAdrian Chadd 		    sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0);
43480f078d63SJohn Baldwin #endif
4349eb6f0de0SAdrian Chadd 	}
4350eb6f0de0SAdrian Chadd 
4351eb6f0de0SAdrian Chadd 	/*
4352eb6f0de0SAdrian Chadd 	 * Walk the list of frames, figure out which ones were correctly
4353eb6f0de0SAdrian Chadd 	 * sent and which weren't.
4354eb6f0de0SAdrian Chadd 	 */
4355eb6f0de0SAdrian Chadd 	bf = bf_first;
4356eb6f0de0SAdrian Chadd 	nf = bf_first->bf_state.bfs_nframes;
4357eb6f0de0SAdrian Chadd 
4358eb6f0de0SAdrian Chadd 	/* bf_first is going to be invalid once this list is walked */
4359eb6f0de0SAdrian Chadd 	bf_first = NULL;
4360eb6f0de0SAdrian Chadd 
4361eb6f0de0SAdrian Chadd 	/*
4362eb6f0de0SAdrian Chadd 	 * Walk the list of completed frames and determine
4363eb6f0de0SAdrian Chadd 	 * which need to be completed and which need to be
4364eb6f0de0SAdrian Chadd 	 * retransmitted.
4365eb6f0de0SAdrian Chadd 	 *
4366eb6f0de0SAdrian Chadd 	 * For completed frames, the completion functions need
4367eb6f0de0SAdrian Chadd 	 * to be called at the end of this function as the last
4368eb6f0de0SAdrian Chadd 	 * node reference may free the node.
4369eb6f0de0SAdrian Chadd 	 *
4370eb6f0de0SAdrian Chadd 	 * Finally, since the TXQ lock can't be held during the
4371eb6f0de0SAdrian Chadd 	 * completion callback (to avoid lock recursion),
4372eb6f0de0SAdrian Chadd 	 * the completion calls have to be done outside of the
4373eb6f0de0SAdrian Chadd 	 * lock.
4374eb6f0de0SAdrian Chadd 	 */
4375eb6f0de0SAdrian Chadd 	while (bf) {
4376eb6f0de0SAdrian Chadd 		nframes++;
4377d4365d16SAdrian Chadd 		ba_index = ATH_BA_INDEX(seq_st,
4378d4365d16SAdrian Chadd 		    SEQNO(bf->bf_state.bfs_seqno));
4379eb6f0de0SAdrian Chadd 		bf_next = bf->bf_next;
4380eb6f0de0SAdrian Chadd 		bf->bf_next = NULL;	/* Remove it from the aggr list */
4381eb6f0de0SAdrian Chadd 
4382eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4383eb6f0de0SAdrian Chadd 		    "%s: checking bf=%p seqno=%d; ack=%d\n",
4384eb6f0de0SAdrian Chadd 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
4385eb6f0de0SAdrian Chadd 		    ATH_BA_ISSET(ba, ba_index));
4386eb6f0de0SAdrian Chadd 
4387eb6f0de0SAdrian Chadd 		if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
43882d3d4776SAdrian Chadd 			sc->sc_stats.ast_tx_aggr_ok++;
4389eb6f0de0SAdrian Chadd 			ath_tx_update_baw(sc, an, atid, bf);
4390eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
4391eb6f0de0SAdrian Chadd 			if (! bf->bf_state.bfs_addedbaw)
4392eb6f0de0SAdrian Chadd 				device_printf(sc->sc_dev,
4393eb6f0de0SAdrian Chadd 				    "%s: wasn't added: seqno %d\n",
4394eb6f0de0SAdrian Chadd 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4395eb6f0de0SAdrian Chadd 			bf->bf_next = NULL;
4396eb6f0de0SAdrian Chadd 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4397eb6f0de0SAdrian Chadd 		} else {
43982d3d4776SAdrian Chadd 			sc->sc_stats.ast_tx_aggr_fail++;
4399eb6f0de0SAdrian Chadd 			if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4400eb6f0de0SAdrian Chadd 				drops++;
4401eb6f0de0SAdrian Chadd 				bf->bf_next = NULL;
4402eb6f0de0SAdrian Chadd 				TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4403eb6f0de0SAdrian Chadd 			}
4404eb6f0de0SAdrian Chadd 			nbad++;
4405eb6f0de0SAdrian Chadd 		}
4406eb6f0de0SAdrian Chadd 		bf = bf_next;
4407eb6f0de0SAdrian Chadd 	}
4408eb6f0de0SAdrian Chadd 
4409eb6f0de0SAdrian Chadd 	/*
4410eb6f0de0SAdrian Chadd 	 * Now that the BAW updates have been done, unlock
4411eb6f0de0SAdrian Chadd 	 *
4412eb6f0de0SAdrian Chadd 	 * txseq is grabbed before the lock is released so we
4413eb6f0de0SAdrian Chadd 	 * have a consistent view of what -was- in the BAW.
4414eb6f0de0SAdrian Chadd 	 * Anything after this point will not yet have been
4415eb6f0de0SAdrian Chadd 	 * TXed.
4416eb6f0de0SAdrian Chadd 	 */
4417eb6f0de0SAdrian Chadd 	txseq = tap->txa_start;
4418375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
4419eb6f0de0SAdrian Chadd 
4420eb6f0de0SAdrian Chadd 	if (nframes != nf)
4421eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev,
4422eb6f0de0SAdrian Chadd 		    "%s: num frames seen=%d; bf nframes=%d\n",
4423eb6f0de0SAdrian Chadd 		    __func__, nframes, nf);
4424eb6f0de0SAdrian Chadd 
4425eb6f0de0SAdrian Chadd 	/*
4426eb6f0de0SAdrian Chadd 	 * Now we know how many frames were bad, call the rate
4427eb6f0de0SAdrian Chadd 	 * control code.
4428eb6f0de0SAdrian Chadd 	 */
4429eb6f0de0SAdrian Chadd 	if (fail == 0)
4430d4365d16SAdrian Chadd 		ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes,
4431d4365d16SAdrian Chadd 		    nbad);
4432eb6f0de0SAdrian Chadd 
4433eb6f0de0SAdrian Chadd 	/*
4434eb6f0de0SAdrian Chadd 	 * send bar if we dropped any frames
4435eb6f0de0SAdrian Chadd 	 */
4436eb6f0de0SAdrian Chadd 	if (drops) {
443788b3d483SAdrian Chadd 		/* Suspend the TX queue and get ready to send the BAR */
4438375307d4SAdrian Chadd 		ATH_TX_LOCK(sc);
443988b3d483SAdrian Chadd 		ath_tx_tid_bar_suspend(sc, atid);
4440375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4441eb6f0de0SAdrian Chadd 	}
4442eb6f0de0SAdrian Chadd 
444339da9d42SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
444439da9d42SAdrian Chadd 	    "%s: txa_start now %d\n", __func__, tap->txa_start);
444539da9d42SAdrian Chadd 
4446375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
444739da9d42SAdrian Chadd 
444839da9d42SAdrian Chadd 	/* Prepend all frames to the beginning of the queue */
4449eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4450eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_q, bf, bf_list);
44513e6cc97fSAdrian Chadd 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4452eb6f0de0SAdrian Chadd 	}
4453eb6f0de0SAdrian Chadd 
445439da9d42SAdrian Chadd 	/*
445539da9d42SAdrian Chadd 	 * Reschedule to grab some further frames.
445639da9d42SAdrian Chadd 	 */
445739da9d42SAdrian Chadd 	ath_tx_tid_sched(sc, atid);
4458eb6f0de0SAdrian Chadd 
445988b3d483SAdrian Chadd 	/*
4460f1bc738eSAdrian Chadd 	 * If the queue is filtered, re-schedule as required.
4461f1bc738eSAdrian Chadd 	 *
4462f1bc738eSAdrian Chadd 	 * This is required as there may be a subsequent TX descriptor
4463f1bc738eSAdrian Chadd 	 * for this end-node that has CLRDMASK set, so it's quite possible
4464f1bc738eSAdrian Chadd 	 * that a filtered frame will be followed by a non-filtered
4465f1bc738eSAdrian Chadd 	 * (complete or otherwise) frame.
4466f1bc738eSAdrian Chadd 	 *
4467f1bc738eSAdrian Chadd 	 * XXX should we do this before we complete the frame?
4468f1bc738eSAdrian Chadd 	 */
4469f1bc738eSAdrian Chadd 	if (atid->isfiltered)
4470f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
4471f1bc738eSAdrian Chadd 
4472f1bc738eSAdrian Chadd finish_send_bar:
4473f1bc738eSAdrian Chadd 
4474f1bc738eSAdrian Chadd 	/*
447588b3d483SAdrian Chadd 	 * Send BAR if required
447688b3d483SAdrian Chadd 	 */
447788b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, atid))
447888b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, atid);
447939da9d42SAdrian Chadd 
4480375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
448188b3d483SAdrian Chadd 
4482eb6f0de0SAdrian Chadd 	/* Do deferred completion */
4483eb6f0de0SAdrian Chadd 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4484eb6f0de0SAdrian Chadd 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4485eb6f0de0SAdrian Chadd 		ath_tx_default_comp(sc, bf, 0);
4486eb6f0de0SAdrian Chadd 	}
4487eb6f0de0SAdrian Chadd }
4488eb6f0de0SAdrian Chadd 
4489eb6f0de0SAdrian Chadd /*
4490eb6f0de0SAdrian Chadd  * Handle completion of unaggregated frames in an ADDBA
4491eb6f0de0SAdrian Chadd  * session.
4492eb6f0de0SAdrian Chadd  *
4493eb6f0de0SAdrian Chadd  * Fail is set to 1 if the entry is being freed via a call to
4494eb6f0de0SAdrian Chadd  * ath_tx_draintxq().
4495eb6f0de0SAdrian Chadd  */
4496eb6f0de0SAdrian Chadd static void
4497eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
4498eb6f0de0SAdrian Chadd {
4499eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = bf->bf_node;
4500eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
4501eb6f0de0SAdrian Chadd 	int tid = bf->bf_state.bfs_tid;
4502eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
45030aa5c1bbSAdrian Chadd 	struct ath_tx_status ts;
4504f1bc738eSAdrian Chadd 	int drops = 0;
4505eb6f0de0SAdrian Chadd 
4506eb6f0de0SAdrian Chadd 	/*
45070aa5c1bbSAdrian Chadd 	 * Take a copy of this; filtering/cloning the frame may free the
45080aa5c1bbSAdrian Chadd 	 * bf pointer.
45090aa5c1bbSAdrian Chadd 	 */
45100aa5c1bbSAdrian Chadd 	ts = bf->bf_status.ds_txstat;
45110aa5c1bbSAdrian Chadd 
45120aa5c1bbSAdrian Chadd 	/*
4513eb6f0de0SAdrian Chadd 	 * Update rate control status here, before we possibly
4514eb6f0de0SAdrian Chadd 	 * punt to retry or cleanup.
4515eb6f0de0SAdrian Chadd 	 *
4516eb6f0de0SAdrian Chadd 	 * Do it outside of the TXQ lock.
4517eb6f0de0SAdrian Chadd 	 */
4518875a9451SAdrian Chadd 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4519eb6f0de0SAdrian Chadd 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4520eb6f0de0SAdrian Chadd 		    &bf->bf_status.ds_txstat,
4521eb6f0de0SAdrian Chadd 		    bf->bf_state.bfs_pktlen,
45220aa5c1bbSAdrian Chadd 		    1, (ts.ts_status == 0) ? 0 : 1);
4523eb6f0de0SAdrian Chadd 
4524eb6f0de0SAdrian Chadd 	/*
4525eb6f0de0SAdrian Chadd 	 * This is called early so atid->hwq_depth can be tracked.
4526eb6f0de0SAdrian Chadd 	 * This unfortunately means that it's released and regrabbed
4527eb6f0de0SAdrian Chadd 	 * during retry and cleanup. That's rather inefficient.
4528eb6f0de0SAdrian Chadd 	 */
4529375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
4530eb6f0de0SAdrian Chadd 
4531eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
4532eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: TID=16!\n", __func__);
4533eb6f0de0SAdrian Chadd 
4534d4365d16SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX,
4535d4365d16SAdrian Chadd 	    "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
4536d4365d16SAdrian Chadd 	    __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
4537d4365d16SAdrian Chadd 	    SEQNO(bf->bf_state.bfs_seqno));
4538eb6f0de0SAdrian Chadd 
4539eb6f0de0SAdrian Chadd 	atid->hwq_depth--;
4540eb6f0de0SAdrian Chadd 	if (atid->hwq_depth < 0)
4541eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: hwq_depth < 0: %d\n",
4542eb6f0de0SAdrian Chadd 		    __func__, atid->hwq_depth);
4543eb6f0de0SAdrian Chadd 
4544eb6f0de0SAdrian Chadd 	/*
4545f1bc738eSAdrian Chadd 	 * If the TID is filtered, handle completing the filter
4546f1bc738eSAdrian Chadd 	 * transition before potentially kicking it to the cleanup
4547f1bc738eSAdrian Chadd 	 * function.
4548f1bc738eSAdrian Chadd 	 */
4549f1bc738eSAdrian Chadd 	if (atid->isfiltered)
4550f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
4551f1bc738eSAdrian Chadd 
4552f1bc738eSAdrian Chadd 	/*
4553eb6f0de0SAdrian Chadd 	 * If a cleanup is in progress, punt to comp_cleanup;
4554eb6f0de0SAdrian Chadd 	 * rather than handling it here. It's thus their
4555eb6f0de0SAdrian Chadd 	 * responsibility to clean up, call the completion
4556eb6f0de0SAdrian Chadd 	 * function in net80211, etc.
4557eb6f0de0SAdrian Chadd 	 */
4558eb6f0de0SAdrian Chadd 	if (atid->cleanup_inprogress) {
4559f1bc738eSAdrian Chadd 		if (atid->isfiltered)
4560f1bc738eSAdrian Chadd 			device_printf(sc->sc_dev,
4561f1bc738eSAdrian Chadd 			    "%s: isfiltered=1, normal_comp?\n",
4562f1bc738eSAdrian Chadd 			    __func__);
4563375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4564d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
4565d4365d16SAdrian Chadd 		    __func__);
4566eb6f0de0SAdrian Chadd 		ath_tx_comp_cleanup_unaggr(sc, bf);
4567eb6f0de0SAdrian Chadd 		return;
4568eb6f0de0SAdrian Chadd 	}
4569eb6f0de0SAdrian Chadd 
4570eb6f0de0SAdrian Chadd 	/*
4571f1bc738eSAdrian Chadd 	 * XXX TODO: how does cleanup, BAR and filtered frame handling
4572f1bc738eSAdrian Chadd 	 * overlap?
4573f1bc738eSAdrian Chadd 	 *
4574f1bc738eSAdrian Chadd 	 * If the frame is filtered OR if it's any failure but
4575f1bc738eSAdrian Chadd 	 * the TID is filtered, the frame must be added to the
4576f1bc738eSAdrian Chadd 	 * filtered frame list.
4577f1bc738eSAdrian Chadd 	 *
4578f1bc738eSAdrian Chadd 	 * However - a busy buffer can't be added to the filtered
4579f1bc738eSAdrian Chadd 	 * list as it will end up being recycled without having
4580f1bc738eSAdrian Chadd 	 * been made available for the hardware.
4581f1bc738eSAdrian Chadd 	 */
45820aa5c1bbSAdrian Chadd 	if ((ts.ts_status & HAL_TXERR_FILT) ||
45830aa5c1bbSAdrian Chadd 	    (ts.ts_status != 0 && atid->isfiltered)) {
4584f1bc738eSAdrian Chadd 		int freeframe;
4585f1bc738eSAdrian Chadd 
4586f1bc738eSAdrian Chadd 		if (fail != 0)
4587f1bc738eSAdrian Chadd 			device_printf(sc->sc_dev,
4588f1bc738eSAdrian Chadd 			    "%s: isfiltered=1, fail=%d\n",
4589f1bc738eSAdrian Chadd 			    __func__,
4590f1bc738eSAdrian Chadd 			    fail);
4591f1bc738eSAdrian Chadd 		freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf);
4592f1bc738eSAdrian Chadd 		if (freeframe) {
4593f1bc738eSAdrian Chadd 			/* Remove from BAW */
4594f1bc738eSAdrian Chadd 			if (bf->bf_state.bfs_addedbaw)
4595f1bc738eSAdrian Chadd 				drops++;
4596f1bc738eSAdrian Chadd 			if (bf->bf_state.bfs_dobaw) {
4597f1bc738eSAdrian Chadd 				ath_tx_update_baw(sc, an, atid, bf);
4598f1bc738eSAdrian Chadd 				if (! bf->bf_state.bfs_addedbaw)
4599f1bc738eSAdrian Chadd 					device_printf(sc->sc_dev,
4600f1bc738eSAdrian Chadd 					    "%s: wasn't added: seqno %d\n",
4601f1bc738eSAdrian Chadd 					    __func__, SEQNO(bf->bf_state.bfs_seqno));
4602f1bc738eSAdrian Chadd 			}
4603f1bc738eSAdrian Chadd 			bf->bf_state.bfs_dobaw = 0;
4604f1bc738eSAdrian Chadd 		}
4605f1bc738eSAdrian Chadd 
4606f1bc738eSAdrian Chadd 		/*
4607f1bc738eSAdrian Chadd 		 * If the frame couldn't be filtered, treat it as a drop and
4608f1bc738eSAdrian Chadd 		 * prepare to send a BAR.
4609f1bc738eSAdrian Chadd 		 */
4610f1bc738eSAdrian Chadd 		if (freeframe && drops)
4611f1bc738eSAdrian Chadd 			ath_tx_tid_bar_suspend(sc, atid);
4612f1bc738eSAdrian Chadd 
4613f1bc738eSAdrian Chadd 		/*
4614f1bc738eSAdrian Chadd 		 * Send BAR if required
4615f1bc738eSAdrian Chadd 		 */
4616f1bc738eSAdrian Chadd 		if (ath_tx_tid_bar_tx_ready(sc, atid))
4617f1bc738eSAdrian Chadd 			ath_tx_tid_bar_tx(sc, atid);
4618f1bc738eSAdrian Chadd 
4619375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4620f1bc738eSAdrian Chadd 		/*
4621f1bc738eSAdrian Chadd 		 * If freeframe is set, then the frame couldn't be
4622f1bc738eSAdrian Chadd 		 * cloned and bf is still valid.  Just complete/free it.
4623f1bc738eSAdrian Chadd 		 */
4624f1bc738eSAdrian Chadd 		if (freeframe)
4625f1bc738eSAdrian Chadd 			ath_tx_default_comp(sc, bf, fail);
4626f1bc738eSAdrian Chadd 
4627f1bc738eSAdrian Chadd 
4628f1bc738eSAdrian Chadd 		return;
4629f1bc738eSAdrian Chadd 	}
4630f1bc738eSAdrian Chadd 	/*
4631eb6f0de0SAdrian Chadd 	 * Don't bother with the retry check if all frames
4632eb6f0de0SAdrian Chadd 	 * are being failed (eg during queue deletion.)
4633eb6f0de0SAdrian Chadd 	 */
4634e9a6408eSAdrian Chadd #if 0
4635eb6f0de0SAdrian Chadd 	if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
4636e9a6408eSAdrian Chadd #endif
46370aa5c1bbSAdrian Chadd 	if (fail == 0 && ts.ts_status != 0) {
4638375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
4639d4365d16SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
4640d4365d16SAdrian Chadd 		    __func__);
4641eb6f0de0SAdrian Chadd 		ath_tx_aggr_retry_unaggr(sc, bf);
4642eb6f0de0SAdrian Chadd 		return;
4643eb6f0de0SAdrian Chadd 	}
4644eb6f0de0SAdrian Chadd 
4645eb6f0de0SAdrian Chadd 	/* Success? Complete */
4646eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
4647eb6f0de0SAdrian Chadd 	    __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
4648eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_dobaw) {
4649eb6f0de0SAdrian Chadd 		ath_tx_update_baw(sc, an, atid, bf);
4650eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_dobaw = 0;
4651eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_addedbaw)
4652eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev,
4653eb6f0de0SAdrian Chadd 			    "%s: wasn't added: seqno %d\n",
4654eb6f0de0SAdrian Chadd 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4655eb6f0de0SAdrian Chadd 	}
4656eb6f0de0SAdrian Chadd 
465788b3d483SAdrian Chadd 	/*
4658f1bc738eSAdrian Chadd 	 * If the queue is filtered, re-schedule as required.
4659f1bc738eSAdrian Chadd 	 *
4660f1bc738eSAdrian Chadd 	 * This is required as there may be a subsequent TX descriptor
4661f1bc738eSAdrian Chadd 	 * for this end-node that has CLRDMASK set, so it's quite possible
4662f1bc738eSAdrian Chadd 	 * that a filtered frame will be followed by a non-filtered
4663f1bc738eSAdrian Chadd 	 * (complete or otherwise) frame.
4664f1bc738eSAdrian Chadd 	 *
4665f1bc738eSAdrian Chadd 	 * XXX should we do this before we complete the frame?
4666f1bc738eSAdrian Chadd 	 */
4667f1bc738eSAdrian Chadd 	if (atid->isfiltered)
4668f1bc738eSAdrian Chadd 		ath_tx_tid_filt_comp_complete(sc, atid);
4669f1bc738eSAdrian Chadd 
4670f1bc738eSAdrian Chadd 	/*
467188b3d483SAdrian Chadd 	 * Send BAR if required
467288b3d483SAdrian Chadd 	 */
467388b3d483SAdrian Chadd 	if (ath_tx_tid_bar_tx_ready(sc, atid))
467488b3d483SAdrian Chadd 		ath_tx_tid_bar_tx(sc, atid);
467588b3d483SAdrian Chadd 
4676375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
4677eb6f0de0SAdrian Chadd 
4678eb6f0de0SAdrian Chadd 	ath_tx_default_comp(sc, bf, fail);
4679eb6f0de0SAdrian Chadd 	/* bf is freed at this point */
4680eb6f0de0SAdrian Chadd }
4681eb6f0de0SAdrian Chadd 
4682eb6f0de0SAdrian Chadd void
4683eb6f0de0SAdrian Chadd ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
4684eb6f0de0SAdrian Chadd {
4685eb6f0de0SAdrian Chadd 	if (bf->bf_state.bfs_aggr)
4686eb6f0de0SAdrian Chadd 		ath_tx_aggr_comp_aggr(sc, bf, fail);
4687eb6f0de0SAdrian Chadd 	else
4688eb6f0de0SAdrian Chadd 		ath_tx_aggr_comp_unaggr(sc, bf, fail);
4689eb6f0de0SAdrian Chadd }
4690eb6f0de0SAdrian Chadd 
4691eb6f0de0SAdrian Chadd /*
4692eb6f0de0SAdrian Chadd  * Schedule some packets from the given node/TID to the hardware.
4693eb6f0de0SAdrian Chadd  *
4694eb6f0de0SAdrian Chadd  * This is the aggregate version.
4695eb6f0de0SAdrian Chadd  */
4696eb6f0de0SAdrian Chadd void
4697eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
4698eb6f0de0SAdrian Chadd     struct ath_tid *tid)
4699eb6f0de0SAdrian Chadd {
4700eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
4701eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
4702eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
4703eb6f0de0SAdrian Chadd 	ATH_AGGR_STATUS status;
4704eb6f0de0SAdrian Chadd 	ath_bufhead bf_q;
4705eb6f0de0SAdrian Chadd 
4706eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
4707375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
4708eb6f0de0SAdrian Chadd 
4709eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid->tid);
4710eb6f0de0SAdrian Chadd 
4711eb6f0de0SAdrian Chadd 	if (tid->tid == IEEE80211_NONQOS_TID)
4712eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: called for TID=NONQOS_TID?\n",
4713eb6f0de0SAdrian Chadd 		    __func__);
4714eb6f0de0SAdrian Chadd 
4715eb6f0de0SAdrian Chadd 	for (;;) {
4716eb6f0de0SAdrian Chadd 		status = ATH_AGGR_DONE;
4717eb6f0de0SAdrian Chadd 
4718eb6f0de0SAdrian Chadd 		/*
4719eb6f0de0SAdrian Chadd 		 * If the upper layer has paused the TID, don't
4720eb6f0de0SAdrian Chadd 		 * queue any further packets.
4721eb6f0de0SAdrian Chadd 		 *
4722eb6f0de0SAdrian Chadd 		 * This can also occur from the completion task because
4723eb6f0de0SAdrian Chadd 		 * of packet loss; but as its serialised with this code,
4724eb6f0de0SAdrian Chadd 		 * it won't "appear" half way through queuing packets.
4725eb6f0de0SAdrian Chadd 		 */
4726eb6f0de0SAdrian Chadd 		if (tid->paused)
4727eb6f0de0SAdrian Chadd 			break;
4728eb6f0de0SAdrian Chadd 
47293e6cc97fSAdrian Chadd 		bf = ATH_TID_FIRST(tid);
4730eb6f0de0SAdrian Chadd 		if (bf == NULL) {
4731eb6f0de0SAdrian Chadd 			break;
4732eb6f0de0SAdrian Chadd 		}
4733eb6f0de0SAdrian Chadd 
4734eb6f0de0SAdrian Chadd 		/*
4735eb6f0de0SAdrian Chadd 		 * If the packet doesn't fall within the BAW (eg a NULL
4736eb6f0de0SAdrian Chadd 		 * data frame), schedule it directly; continue.
4737eb6f0de0SAdrian Chadd 		 */
4738eb6f0de0SAdrian Chadd 		if (! bf->bf_state.bfs_dobaw) {
4739d4365d16SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4740d4365d16SAdrian Chadd 			    "%s: non-baw packet\n",
4741eb6f0de0SAdrian Chadd 			    __func__);
47423e6cc97fSAdrian Chadd 			ATH_TID_REMOVE(tid, bf, bf_list);
47432a9f83afSAdrian Chadd 
47442a9f83afSAdrian Chadd 			if (bf->bf_state.bfs_nframes > 1)
47452a9f83afSAdrian Chadd 				device_printf(sc->sc_dev,
47462a9f83afSAdrian Chadd 				    "%s: aggr=%d, nframes=%d\n",
47472a9f83afSAdrian Chadd 				    __func__,
47482a9f83afSAdrian Chadd 				    bf->bf_state.bfs_aggr,
47492a9f83afSAdrian Chadd 				    bf->bf_state.bfs_nframes);
47502a9f83afSAdrian Chadd 
47512a9f83afSAdrian Chadd 			/*
47522a9f83afSAdrian Chadd 			 * This shouldn't happen - such frames shouldn't
47532a9f83afSAdrian Chadd 			 * ever have been queued as an aggregate in the
47542a9f83afSAdrian Chadd 			 * first place.  However, make sure the fields
47552a9f83afSAdrian Chadd 			 * are correctly setup just to be totally sure.
47562a9f83afSAdrian Chadd 			 */
4757eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_aggr = 0;
47582a9f83afSAdrian Chadd 			bf->bf_state.bfs_nframes = 1;
47592a9f83afSAdrian Chadd 
47604e81f27cSAdrian Chadd 			/* Update CLRDMASK just before this frame is queued */
47614e81f27cSAdrian Chadd 			ath_tx_update_clrdmask(sc, tid, bf);
47624e81f27cSAdrian Chadd 
4763eb6f0de0SAdrian Chadd 			ath_tx_do_ratelookup(sc, bf);
4764e2e4a2c2SAdrian Chadd 			ath_tx_calc_duration(sc, bf);
4765e2e4a2c2SAdrian Chadd 			ath_tx_calc_protection(sc, bf);
4766eb6f0de0SAdrian Chadd 			ath_tx_set_rtscts(sc, bf);
4767e2e4a2c2SAdrian Chadd 			ath_tx_rate_fill_rcflags(sc, bf);
4768eb6f0de0SAdrian Chadd 			ath_tx_setds(sc, bf);
4769eb6f0de0SAdrian Chadd 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4770eb6f0de0SAdrian Chadd 
4771eb6f0de0SAdrian Chadd 			sc->sc_aggr_stats.aggr_nonbaw_pkt++;
4772eb6f0de0SAdrian Chadd 
4773eb6f0de0SAdrian Chadd 			/* Queue the packet; continue */
4774eb6f0de0SAdrian Chadd 			goto queuepkt;
4775eb6f0de0SAdrian Chadd 		}
4776eb6f0de0SAdrian Chadd 
4777eb6f0de0SAdrian Chadd 		TAILQ_INIT(&bf_q);
4778eb6f0de0SAdrian Chadd 
4779eb6f0de0SAdrian Chadd 		/*
4780eb6f0de0SAdrian Chadd 		 * Do a rate control lookup on the first frame in the
4781eb6f0de0SAdrian Chadd 		 * list. The rate control code needs that to occur
4782eb6f0de0SAdrian Chadd 		 * before it can determine whether to TX.
4783eb6f0de0SAdrian Chadd 		 * It's inaccurate because the rate control code doesn't
4784eb6f0de0SAdrian Chadd 		 * really "do" aggregate lookups, so it only considers
4785eb6f0de0SAdrian Chadd 		 * the size of the first frame.
4786eb6f0de0SAdrian Chadd 		 */
4787eb6f0de0SAdrian Chadd 		ath_tx_do_ratelookup(sc, bf);
4788eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].rix = 0;
4789eb6f0de0SAdrian Chadd 		bf->bf_state.bfs_rc[3].tries = 0;
4790e2e4a2c2SAdrian Chadd 
4791e2e4a2c2SAdrian Chadd 		ath_tx_calc_duration(sc, bf);
4792e2e4a2c2SAdrian Chadd 		ath_tx_calc_protection(sc, bf);
4793e2e4a2c2SAdrian Chadd 
4794e2e4a2c2SAdrian Chadd 		ath_tx_set_rtscts(sc, bf);
4795eb6f0de0SAdrian Chadd 		ath_tx_rate_fill_rcflags(sc, bf);
4796eb6f0de0SAdrian Chadd 
4797eb6f0de0SAdrian Chadd 		status = ath_tx_form_aggr(sc, an, tid, &bf_q);
4798eb6f0de0SAdrian Chadd 
4799eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4800eb6f0de0SAdrian Chadd 		    "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
4801eb6f0de0SAdrian Chadd 
4802eb6f0de0SAdrian Chadd 		/*
4803eb6f0de0SAdrian Chadd 		 * No frames to be picked up - out of BAW
4804eb6f0de0SAdrian Chadd 		 */
4805eb6f0de0SAdrian Chadd 		if (TAILQ_EMPTY(&bf_q))
4806eb6f0de0SAdrian Chadd 			break;
4807eb6f0de0SAdrian Chadd 
4808eb6f0de0SAdrian Chadd 		/*
4809eb6f0de0SAdrian Chadd 		 * This assumes that the descriptor list in the ath_bufhead
4810eb6f0de0SAdrian Chadd 		 * are already linked together via bf_next pointers.
4811eb6f0de0SAdrian Chadd 		 */
4812eb6f0de0SAdrian Chadd 		bf = TAILQ_FIRST(&bf_q);
4813eb6f0de0SAdrian Chadd 
4814e2e4a2c2SAdrian Chadd 		if (status == ATH_AGGR_8K_LIMITED)
4815e2e4a2c2SAdrian Chadd 			sc->sc_aggr_stats.aggr_rts_aggr_limited++;
4816e2e4a2c2SAdrian Chadd 
4817eb6f0de0SAdrian Chadd 		/*
4818eb6f0de0SAdrian Chadd 		 * If it's the only frame send as non-aggregate
4819eb6f0de0SAdrian Chadd 		 * assume that ath_tx_form_aggr() has checked
4820eb6f0de0SAdrian Chadd 		 * whether it's in the BAW and added it appropriately.
4821eb6f0de0SAdrian Chadd 		 */
4822eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_nframes == 1) {
4823eb6f0de0SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4824eb6f0de0SAdrian Chadd 			    "%s: single-frame aggregate\n", __func__);
48254e81f27cSAdrian Chadd 
48264e81f27cSAdrian Chadd 			/* Update CLRDMASK just before this frame is queued */
48274e81f27cSAdrian Chadd 			ath_tx_update_clrdmask(sc, tid, bf);
48284e81f27cSAdrian Chadd 
4829eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_aggr = 0;
483021840808SAdrian Chadd 			bf->bf_state.bfs_ndelim = 0;
4831eb6f0de0SAdrian Chadd 			ath_tx_setds(sc, bf);
4832eb6f0de0SAdrian Chadd 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4833eb6f0de0SAdrian Chadd 			if (status == ATH_AGGR_BAW_CLOSED)
4834eb6f0de0SAdrian Chadd 				sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
4835eb6f0de0SAdrian Chadd 			else
4836eb6f0de0SAdrian Chadd 				sc->sc_aggr_stats.aggr_single_pkt++;
4837eb6f0de0SAdrian Chadd 		} else {
4838eb6f0de0SAdrian Chadd 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4839d4365d16SAdrian Chadd 			    "%s: multi-frame aggregate: %d frames, "
4840d4365d16SAdrian Chadd 			    "length %d\n",
4841eb6f0de0SAdrian Chadd 			     __func__, bf->bf_state.bfs_nframes,
4842eb6f0de0SAdrian Chadd 			    bf->bf_state.bfs_al);
4843eb6f0de0SAdrian Chadd 			bf->bf_state.bfs_aggr = 1;
4844eb6f0de0SAdrian Chadd 			sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
4845eb6f0de0SAdrian Chadd 			sc->sc_aggr_stats.aggr_aggr_pkt++;
4846eb6f0de0SAdrian Chadd 
48474e81f27cSAdrian Chadd 			/* Update CLRDMASK just before this frame is queued */
48484e81f27cSAdrian Chadd 			ath_tx_update_clrdmask(sc, tid, bf);
48494e81f27cSAdrian Chadd 
4850eb6f0de0SAdrian Chadd 			/*
4851e2e4a2c2SAdrian Chadd 			 * Calculate the duration/protection as required.
4852e2e4a2c2SAdrian Chadd 			 */
4853e2e4a2c2SAdrian Chadd 			ath_tx_calc_duration(sc, bf);
4854e2e4a2c2SAdrian Chadd 			ath_tx_calc_protection(sc, bf);
4855e2e4a2c2SAdrian Chadd 
4856e2e4a2c2SAdrian Chadd 			/*
4857eb6f0de0SAdrian Chadd 			 * Update the rate and rtscts information based on the
4858eb6f0de0SAdrian Chadd 			 * rate decision made by the rate control code;
4859eb6f0de0SAdrian Chadd 			 * the first frame in the aggregate needs it.
4860eb6f0de0SAdrian Chadd 			 */
4861eb6f0de0SAdrian Chadd 			ath_tx_set_rtscts(sc, bf);
4862eb6f0de0SAdrian Chadd 
4863eb6f0de0SAdrian Chadd 			/*
4864eb6f0de0SAdrian Chadd 			 * Setup the relevant descriptor fields
4865eb6f0de0SAdrian Chadd 			 * for aggregation. The first descriptor
4866eb6f0de0SAdrian Chadd 			 * already points to the rest in the chain.
4867eb6f0de0SAdrian Chadd 			 */
4868eb6f0de0SAdrian Chadd 			ath_tx_setds_11n(sc, bf);
4869eb6f0de0SAdrian Chadd 
4870eb6f0de0SAdrian Chadd 		}
4871eb6f0de0SAdrian Chadd 	queuepkt:
4872eb6f0de0SAdrian Chadd 		//txq = bf->bf_state.bfs_txq;
4873eb6f0de0SAdrian Chadd 
4874eb6f0de0SAdrian Chadd 		/* Set completion handler, multi-frame aggregate or not */
4875eb6f0de0SAdrian Chadd 		bf->bf_comp = ath_tx_aggr_comp;
4876eb6f0de0SAdrian Chadd 
4877eb6f0de0SAdrian Chadd 		if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
4878eb6f0de0SAdrian Chadd 		    device_printf(sc->sc_dev, "%s: TID=16?\n", __func__);
4879eb6f0de0SAdrian Chadd 
4880eb6f0de0SAdrian Chadd 		/* Punt to txq */
4881eb6f0de0SAdrian Chadd 		ath_tx_handoff(sc, txq, bf);
4882eb6f0de0SAdrian Chadd 
4883eb6f0de0SAdrian Chadd 		/* Track outstanding buffer count to hardware */
4884eb6f0de0SAdrian Chadd 		/* aggregates are "one" buffer */
4885eb6f0de0SAdrian Chadd 		tid->hwq_depth++;
4886eb6f0de0SAdrian Chadd 
4887eb6f0de0SAdrian Chadd 		/*
4888eb6f0de0SAdrian Chadd 		 * Break out if ath_tx_form_aggr() indicated
4889eb6f0de0SAdrian Chadd 		 * there can't be any further progress (eg BAW is full.)
4890eb6f0de0SAdrian Chadd 		 * Checking for an empty txq is done above.
4891eb6f0de0SAdrian Chadd 		 *
4892eb6f0de0SAdrian Chadd 		 * XXX locking on txq here?
4893eb6f0de0SAdrian Chadd 		 */
4894eb6f0de0SAdrian Chadd 		if (txq->axq_aggr_depth >= sc->sc_hwq_limit ||
4895eb6f0de0SAdrian Chadd 		    status == ATH_AGGR_BAW_CLOSED)
4896eb6f0de0SAdrian Chadd 			break;
4897eb6f0de0SAdrian Chadd 	}
4898eb6f0de0SAdrian Chadd }
4899eb6f0de0SAdrian Chadd 
4900eb6f0de0SAdrian Chadd /*
4901eb6f0de0SAdrian Chadd  * Schedule some packets from the given node/TID to the hardware.
4902eb6f0de0SAdrian Chadd  */
4903eb6f0de0SAdrian Chadd void
4904eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
4905eb6f0de0SAdrian Chadd     struct ath_tid *tid)
4906eb6f0de0SAdrian Chadd {
4907eb6f0de0SAdrian Chadd 	struct ath_buf *bf;
4908eb6f0de0SAdrian Chadd 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
4909eb6f0de0SAdrian Chadd 
4910eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
4911eb6f0de0SAdrian Chadd 	    __func__, an, tid->tid);
4912eb6f0de0SAdrian Chadd 
4913375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
4914eb6f0de0SAdrian Chadd 
4915eb6f0de0SAdrian Chadd 	/* Check - is AMPDU pending or running? then print out something */
4916eb6f0de0SAdrian Chadd 	if (ath_tx_ampdu_pending(sc, an, tid->tid))
4917eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: tid=%d, ampdu pending?\n",
4918eb6f0de0SAdrian Chadd 		    __func__, tid->tid);
4919eb6f0de0SAdrian Chadd 	if (ath_tx_ampdu_running(sc, an, tid->tid))
4920eb6f0de0SAdrian Chadd 		device_printf(sc->sc_dev, "%s: tid=%d, ampdu running?\n",
4921eb6f0de0SAdrian Chadd 		    __func__, tid->tid);
4922eb6f0de0SAdrian Chadd 
4923eb6f0de0SAdrian Chadd 	for (;;) {
4924eb6f0de0SAdrian Chadd 
4925eb6f0de0SAdrian Chadd 		/*
4926eb6f0de0SAdrian Chadd 		 * If the upper layers have paused the TID, don't
4927eb6f0de0SAdrian Chadd 		 * queue any further packets.
4928eb6f0de0SAdrian Chadd 		 */
4929eb6f0de0SAdrian Chadd 		if (tid->paused)
4930eb6f0de0SAdrian Chadd 			break;
4931eb6f0de0SAdrian Chadd 
49323e6cc97fSAdrian Chadd 		bf = ATH_TID_FIRST(tid);
4933eb6f0de0SAdrian Chadd 		if (bf == NULL) {
4934eb6f0de0SAdrian Chadd 			break;
4935eb6f0de0SAdrian Chadd 		}
4936eb6f0de0SAdrian Chadd 
49373e6cc97fSAdrian Chadd 		ATH_TID_REMOVE(tid, bf, bf_list);
4938eb6f0de0SAdrian Chadd 
4939eb6f0de0SAdrian Chadd 		KASSERT(txq == bf->bf_state.bfs_txq, ("txqs not equal!\n"));
4940eb6f0de0SAdrian Chadd 
4941eb6f0de0SAdrian Chadd 		/* Sanity check! */
4942eb6f0de0SAdrian Chadd 		if (tid->tid != bf->bf_state.bfs_tid) {
4943eb6f0de0SAdrian Chadd 			device_printf(sc->sc_dev, "%s: bfs_tid %d !="
4944eb6f0de0SAdrian Chadd 			    " tid %d\n",
4945eb6f0de0SAdrian Chadd 			    __func__, bf->bf_state.bfs_tid, tid->tid);
4946eb6f0de0SAdrian Chadd 		}
4947eb6f0de0SAdrian Chadd 		/* Normal completion handler */
4948eb6f0de0SAdrian Chadd 		bf->bf_comp = ath_tx_normal_comp;
4949eb6f0de0SAdrian Chadd 
49500c54de88SAdrian Chadd 		/*
49510c54de88SAdrian Chadd 		 * Override this for now, until the non-aggregate
49520c54de88SAdrian Chadd 		 * completion handler correctly handles software retransmits.
49530c54de88SAdrian Chadd 		 */
49540c54de88SAdrian Chadd 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
49550c54de88SAdrian Chadd 
49564e81f27cSAdrian Chadd 		/* Update CLRDMASK just before this frame is queued */
49574e81f27cSAdrian Chadd 		ath_tx_update_clrdmask(sc, tid, bf);
49584e81f27cSAdrian Chadd 
4959eb6f0de0SAdrian Chadd 		/* Program descriptors + rate control */
4960eb6f0de0SAdrian Chadd 		ath_tx_do_ratelookup(sc, bf);
4961e2e4a2c2SAdrian Chadd 		ath_tx_calc_duration(sc, bf);
4962e2e4a2c2SAdrian Chadd 		ath_tx_calc_protection(sc, bf);
4963eb6f0de0SAdrian Chadd 		ath_tx_set_rtscts(sc, bf);
4964e2e4a2c2SAdrian Chadd 		ath_tx_rate_fill_rcflags(sc, bf);
4965eb6f0de0SAdrian Chadd 		ath_tx_setds(sc, bf);
4966eb6f0de0SAdrian Chadd 
4967eb6f0de0SAdrian Chadd 		/* Track outstanding buffer count to hardware */
4968eb6f0de0SAdrian Chadd 		/* aggregates are "one" buffer */
4969eb6f0de0SAdrian Chadd 		tid->hwq_depth++;
4970eb6f0de0SAdrian Chadd 
4971eb6f0de0SAdrian Chadd 		/* Punt to hardware or software txq */
4972eb6f0de0SAdrian Chadd 		ath_tx_handoff(sc, txq, bf);
4973eb6f0de0SAdrian Chadd 	}
4974eb6f0de0SAdrian Chadd }
4975eb6f0de0SAdrian Chadd 
4976eb6f0de0SAdrian Chadd /*
4977eb6f0de0SAdrian Chadd  * Schedule some packets to the given hardware queue.
4978eb6f0de0SAdrian Chadd  *
4979eb6f0de0SAdrian Chadd  * This function walks the list of TIDs (ie, ath_node TIDs
4980eb6f0de0SAdrian Chadd  * with queued traffic) and attempts to schedule traffic
4981eb6f0de0SAdrian Chadd  * from them.
4982eb6f0de0SAdrian Chadd  *
4983eb6f0de0SAdrian Chadd  * TID scheduling is implemented as a FIFO, with TIDs being
4984eb6f0de0SAdrian Chadd  * added to the end of the queue after some frames have been
4985eb6f0de0SAdrian Chadd  * scheduled.
4986eb6f0de0SAdrian Chadd  */
4987eb6f0de0SAdrian Chadd void
4988eb6f0de0SAdrian Chadd ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
4989eb6f0de0SAdrian Chadd {
4990eb6f0de0SAdrian Chadd 	struct ath_tid *tid, *next, *last;
4991eb6f0de0SAdrian Chadd 
4992375307d4SAdrian Chadd 	ATH_TX_LOCK_ASSERT(sc);
4993eb6f0de0SAdrian Chadd 
4994eb6f0de0SAdrian Chadd 	/*
4995eb6f0de0SAdrian Chadd 	 * Don't schedule if the hardware queue is busy.
4996eb6f0de0SAdrian Chadd 	 * This (hopefully) gives some more time to aggregate
4997eb6f0de0SAdrian Chadd 	 * some packets in the aggregation queue.
4998eb6f0de0SAdrian Chadd 	 */
4999eb6f0de0SAdrian Chadd 	if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
5000eb6f0de0SAdrian Chadd 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5001eb6f0de0SAdrian Chadd 		return;
5002eb6f0de0SAdrian Chadd 	}
5003eb6f0de0SAdrian Chadd 
5004eb6f0de0SAdrian Chadd 	last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
5005eb6f0de0SAdrian Chadd 
5006eb6f0de0SAdrian Chadd 	TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
5007eb6f0de0SAdrian Chadd 		/*
5008eb6f0de0SAdrian Chadd 		 * Suspend paused queues here; they'll be resumed
5009eb6f0de0SAdrian Chadd 		 * once the addba completes or times out.
5010eb6f0de0SAdrian Chadd 		 */
5011eb6f0de0SAdrian Chadd 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
5012eb6f0de0SAdrian Chadd 		    __func__, tid->tid, tid->paused);
5013eb6f0de0SAdrian Chadd 		ath_tx_tid_unsched(sc, tid);
5014eb6f0de0SAdrian Chadd 		if (tid->paused) {
5015eb6f0de0SAdrian Chadd 			continue;
5016eb6f0de0SAdrian Chadd 		}
5017eb6f0de0SAdrian Chadd 		if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
5018eb6f0de0SAdrian Chadd 			ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
5019eb6f0de0SAdrian Chadd 		else
5020eb6f0de0SAdrian Chadd 			ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
5021eb6f0de0SAdrian Chadd 
5022eb6f0de0SAdrian Chadd 		/* Not empty? Re-schedule */
5023eb6f0de0SAdrian Chadd 		if (tid->axq_depth != 0)
5024eb6f0de0SAdrian Chadd 			ath_tx_tid_sched(sc, tid);
5025eb6f0de0SAdrian Chadd 
5026eb6f0de0SAdrian Chadd 		/* Give the software queue time to aggregate more packets */
5027eb6f0de0SAdrian Chadd 		if (txq->axq_aggr_depth >= sc->sc_hwq_limit) {
5028eb6f0de0SAdrian Chadd 			break;
5029eb6f0de0SAdrian Chadd 		}
5030eb6f0de0SAdrian Chadd 
5031eb6f0de0SAdrian Chadd 		/*
5032eb6f0de0SAdrian Chadd 		 * If this was the last entry on the original list, stop.
5033eb6f0de0SAdrian Chadd 		 * Otherwise nodes that have been rescheduled onto the end
5034eb6f0de0SAdrian Chadd 		 * of the TID FIFO list will just keep being rescheduled.
5035eb6f0de0SAdrian Chadd 		 */
5036eb6f0de0SAdrian Chadd 		if (tid == last)
5037eb6f0de0SAdrian Chadd 			break;
5038eb6f0de0SAdrian Chadd 	}
5039eb6f0de0SAdrian Chadd }
5040eb6f0de0SAdrian Chadd 
5041eb6f0de0SAdrian Chadd /*
5042eb6f0de0SAdrian Chadd  * TX addba handling
5043eb6f0de0SAdrian Chadd  */
5044eb6f0de0SAdrian Chadd 
5045eb6f0de0SAdrian Chadd /*
5046eb6f0de0SAdrian Chadd  * Return net80211 TID struct pointer, or NULL for none
5047eb6f0de0SAdrian Chadd  */
5048eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *
5049eb6f0de0SAdrian Chadd ath_tx_get_tx_tid(struct ath_node *an, int tid)
5050eb6f0de0SAdrian Chadd {
5051eb6f0de0SAdrian Chadd 	struct ieee80211_node *ni = &an->an_node;
5052eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
5053eb6f0de0SAdrian Chadd 
5054eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
5055eb6f0de0SAdrian Chadd 		return NULL;
5056eb6f0de0SAdrian Chadd 
50572aa563dfSAdrian Chadd 	tap = &ni->ni_tx_ampdu[tid];
5058eb6f0de0SAdrian Chadd 	return tap;
5059eb6f0de0SAdrian Chadd }
5060eb6f0de0SAdrian Chadd 
5061eb6f0de0SAdrian Chadd /*
5062eb6f0de0SAdrian Chadd  * Is AMPDU-TX running?
5063eb6f0de0SAdrian Chadd  */
5064eb6f0de0SAdrian Chadd static int
5065eb6f0de0SAdrian Chadd ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
5066eb6f0de0SAdrian Chadd {
5067eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
5068eb6f0de0SAdrian Chadd 
5069eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
5070eb6f0de0SAdrian Chadd 		return 0;
5071eb6f0de0SAdrian Chadd 
5072eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
5073eb6f0de0SAdrian Chadd 	if (tap == NULL)
5074eb6f0de0SAdrian Chadd 		return 0;	/* Not valid; default to not running */
5075eb6f0de0SAdrian Chadd 
5076eb6f0de0SAdrian Chadd 	return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
5077eb6f0de0SAdrian Chadd }
5078eb6f0de0SAdrian Chadd 
5079eb6f0de0SAdrian Chadd /*
5080eb6f0de0SAdrian Chadd  * Is AMPDU-TX negotiation pending?
5081eb6f0de0SAdrian Chadd  */
5082eb6f0de0SAdrian Chadd static int
5083eb6f0de0SAdrian Chadd ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
5084eb6f0de0SAdrian Chadd {
5085eb6f0de0SAdrian Chadd 	struct ieee80211_tx_ampdu *tap;
5086eb6f0de0SAdrian Chadd 
5087eb6f0de0SAdrian Chadd 	if (tid == IEEE80211_NONQOS_TID)
5088eb6f0de0SAdrian Chadd 		return 0;
5089eb6f0de0SAdrian Chadd 
5090eb6f0de0SAdrian Chadd 	tap = ath_tx_get_tx_tid(an, tid);
5091eb6f0de0SAdrian Chadd 	if (tap == NULL)
5092eb6f0de0SAdrian Chadd 		return 0;	/* Not valid; default to not pending */
5093eb6f0de0SAdrian Chadd 
5094eb6f0de0SAdrian Chadd 	return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
5095eb6f0de0SAdrian Chadd }
5096eb6f0de0SAdrian Chadd 
5097eb6f0de0SAdrian Chadd /*
5098eb6f0de0SAdrian Chadd  * Is AMPDU-TX pending for the given TID?
5099eb6f0de0SAdrian Chadd  */
5100eb6f0de0SAdrian Chadd 
5101eb6f0de0SAdrian Chadd 
5102eb6f0de0SAdrian Chadd /*
5103eb6f0de0SAdrian Chadd  * Method to handle sending an ADDBA request.
5104eb6f0de0SAdrian Chadd  *
5105eb6f0de0SAdrian Chadd  * We tap this so the relevant flags can be set to pause the TID
5106eb6f0de0SAdrian Chadd  * whilst waiting for the response.
5107eb6f0de0SAdrian Chadd  *
5108eb6f0de0SAdrian Chadd  * XXX there's no timeout handler we can override?
5109eb6f0de0SAdrian Chadd  */
5110eb6f0de0SAdrian Chadd int
5111eb6f0de0SAdrian Chadd ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5112eb6f0de0SAdrian Chadd     int dialogtoken, int baparamset, int batimeout)
5113eb6f0de0SAdrian Chadd {
5114eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
51152aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5116eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5117eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
5118eb6f0de0SAdrian Chadd 
5119eb6f0de0SAdrian Chadd 	/*
5120eb6f0de0SAdrian Chadd 	 * XXX danger Will Robinson!
5121eb6f0de0SAdrian Chadd 	 *
5122eb6f0de0SAdrian Chadd 	 * Although the taskqueue may be running and scheduling some more
5123eb6f0de0SAdrian Chadd 	 * packets, these should all be _before_ the addba sequence number.
5124eb6f0de0SAdrian Chadd 	 * However, net80211 will keep self-assigning sequence numbers
5125eb6f0de0SAdrian Chadd 	 * until addba has been negotiated.
5126eb6f0de0SAdrian Chadd 	 *
5127eb6f0de0SAdrian Chadd 	 * In the past, these packets would be "paused" (which still works
5128eb6f0de0SAdrian Chadd 	 * fine, as they're being scheduled to the driver in the same
5129eb6f0de0SAdrian Chadd 	 * serialised method which is calling the addba request routine)
5130eb6f0de0SAdrian Chadd 	 * and when the aggregation session begins, they'll be dequeued
5131eb6f0de0SAdrian Chadd 	 * as aggregate packets and added to the BAW. However, now there's
5132eb6f0de0SAdrian Chadd 	 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
5133eb6f0de0SAdrian Chadd 	 * packets. Thus they never get included in the BAW tracking and
5134eb6f0de0SAdrian Chadd 	 * this can cause the initial burst of packets after the addba
5135eb6f0de0SAdrian Chadd 	 * negotiation to "hang", as they quickly fall outside the BAW.
5136eb6f0de0SAdrian Chadd 	 *
5137eb6f0de0SAdrian Chadd 	 * The "eventual" solution should be to tag these packets with
5138eb6f0de0SAdrian Chadd 	 * dobaw. Although net80211 has given us a sequence number,
5139eb6f0de0SAdrian Chadd 	 * it'll be "after" the left edge of the BAW and thus it'll
5140eb6f0de0SAdrian Chadd 	 * fall within it.
5141eb6f0de0SAdrian Chadd 	 */
5142375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5143d3a6425bSAdrian Chadd 	/*
5144d3a6425bSAdrian Chadd 	 * This is a bit annoying.  Until net80211 HT code inherits some
5145d3a6425bSAdrian Chadd 	 * (any) locking, we may have this called in parallel BUT only
5146d3a6425bSAdrian Chadd 	 * one response/timeout will be called.  Grr.
5147d3a6425bSAdrian Chadd 	 */
5148d3a6425bSAdrian Chadd 	if (atid->addba_tx_pending == 0) {
5149eb6f0de0SAdrian Chadd 		ath_tx_tid_pause(sc, atid);
5150d3a6425bSAdrian Chadd 		atid->addba_tx_pending = 1;
5151d3a6425bSAdrian Chadd 	}
5152375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5153eb6f0de0SAdrian Chadd 
5154eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5155eb6f0de0SAdrian Chadd 	    "%s: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
5156eb6f0de0SAdrian Chadd 	    __func__, dialogtoken, baparamset, batimeout);
5157eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5158eb6f0de0SAdrian Chadd 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5159eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5160eb6f0de0SAdrian Chadd 
5161eb6f0de0SAdrian Chadd 	return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
5162eb6f0de0SAdrian Chadd 	    batimeout);
5163eb6f0de0SAdrian Chadd }
5164eb6f0de0SAdrian Chadd 
5165eb6f0de0SAdrian Chadd /*
5166eb6f0de0SAdrian Chadd  * Handle an ADDBA response.
5167eb6f0de0SAdrian Chadd  *
5168eb6f0de0SAdrian Chadd  * We unpause the queue so TX'ing can resume.
5169eb6f0de0SAdrian Chadd  *
5170eb6f0de0SAdrian Chadd  * Any packets TX'ed from this point should be "aggregate" (whether
5171eb6f0de0SAdrian Chadd  * aggregate or not) so the BAW is updated.
5172eb6f0de0SAdrian Chadd  *
5173eb6f0de0SAdrian Chadd  * Note! net80211 keeps self-assigning sequence numbers until
5174eb6f0de0SAdrian Chadd  * ampdu is negotiated. This means the initially-negotiated BAW left
5175eb6f0de0SAdrian Chadd  * edge won't match the ni->ni_txseq.
5176eb6f0de0SAdrian Chadd  *
5177eb6f0de0SAdrian Chadd  * So, being very dirty, the BAW left edge is "slid" here to match
5178eb6f0de0SAdrian Chadd  * ni->ni_txseq.
5179eb6f0de0SAdrian Chadd  *
5180eb6f0de0SAdrian Chadd  * What likely SHOULD happen is that all packets subsequent to the
5181eb6f0de0SAdrian Chadd  * addba request should be tagged as aggregate and queued as non-aggregate
5182eb6f0de0SAdrian Chadd  * frames; thus updating the BAW. For now though, I'll just slide the
5183eb6f0de0SAdrian Chadd  * window.
5184eb6f0de0SAdrian Chadd  */
5185eb6f0de0SAdrian Chadd int
5186eb6f0de0SAdrian Chadd ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5187eb6f0de0SAdrian Chadd     int status, int code, int batimeout)
5188eb6f0de0SAdrian Chadd {
5189eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
51902aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5191eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5192eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
5193eb6f0de0SAdrian Chadd 	int r;
5194eb6f0de0SAdrian Chadd 
5195eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5196eb6f0de0SAdrian Chadd 	    "%s: called; status=%d, code=%d, batimeout=%d\n", __func__,
5197eb6f0de0SAdrian Chadd 	    status, code, batimeout);
5198eb6f0de0SAdrian Chadd 
5199eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5200eb6f0de0SAdrian Chadd 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5201eb6f0de0SAdrian Chadd 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5202eb6f0de0SAdrian Chadd 
5203eb6f0de0SAdrian Chadd 	/*
5204eb6f0de0SAdrian Chadd 	 * Call this first, so the interface flags get updated
5205eb6f0de0SAdrian Chadd 	 * before the TID is unpaused. Otherwise a race condition
5206eb6f0de0SAdrian Chadd 	 * exists where the unpaused TID still doesn't yet have
5207eb6f0de0SAdrian Chadd 	 * IEEE80211_AGGR_RUNNING set.
5208eb6f0de0SAdrian Chadd 	 */
5209eb6f0de0SAdrian Chadd 	r = sc->sc_addba_response(ni, tap, status, code, batimeout);
5210eb6f0de0SAdrian Chadd 
5211375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5212d3a6425bSAdrian Chadd 	atid->addba_tx_pending = 0;
5213eb6f0de0SAdrian Chadd 	/*
5214eb6f0de0SAdrian Chadd 	 * XXX dirty!
5215eb6f0de0SAdrian Chadd 	 * Slide the BAW left edge to wherever net80211 left it for us.
5216eb6f0de0SAdrian Chadd 	 * Read above for more information.
5217eb6f0de0SAdrian Chadd 	 */
5218eb6f0de0SAdrian Chadd 	tap->txa_start = ni->ni_txseqs[tid];
5219eb6f0de0SAdrian Chadd 	ath_tx_tid_resume(sc, atid);
5220375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5221eb6f0de0SAdrian Chadd 	return r;
5222eb6f0de0SAdrian Chadd }
5223eb6f0de0SAdrian Chadd 
5224eb6f0de0SAdrian Chadd 
5225eb6f0de0SAdrian Chadd /*
5226eb6f0de0SAdrian Chadd  * Stop ADDBA on a queue.
52278405fe86SAdrian Chadd  *
52288405fe86SAdrian Chadd  * This can be called whilst BAR TX is currently active on the queue,
52298405fe86SAdrian Chadd  * so make sure this is unblocked before continuing.
5230eb6f0de0SAdrian Chadd  */
5231eb6f0de0SAdrian Chadd void
5232eb6f0de0SAdrian Chadd ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
5233eb6f0de0SAdrian Chadd {
5234eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
52352aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5236eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5237eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
5238eb6f0de0SAdrian Chadd 
5239eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: called\n", __func__);
5240eb6f0de0SAdrian Chadd 
52418405fe86SAdrian Chadd 	/*
52428405fe86SAdrian Chadd 	 * Pause TID traffic early, so there aren't any races
52438405fe86SAdrian Chadd 	 * Unblock the pending BAR held traffic, if it's currently paused.
52448405fe86SAdrian Chadd 	 */
5245375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5246eb6f0de0SAdrian Chadd 	ath_tx_tid_pause(sc, atid);
52478405fe86SAdrian Chadd 	if (atid->bar_wait) {
52488405fe86SAdrian Chadd 		/*
52498405fe86SAdrian Chadd 		 * bar_unsuspend() expects bar_tx == 1, as it should be
52508405fe86SAdrian Chadd 		 * called from the TX completion path.  This quietens
52518405fe86SAdrian Chadd 		 * the warning.  It's cleared for us anyway.
52528405fe86SAdrian Chadd 		 */
52538405fe86SAdrian Chadd 		atid->bar_tx = 1;
52548405fe86SAdrian Chadd 		ath_tx_tid_bar_unsuspend(sc, atid);
52558405fe86SAdrian Chadd 	}
5256375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5257eb6f0de0SAdrian Chadd 
5258eb6f0de0SAdrian Chadd 	/* There's no need to hold the TXQ lock here */
5259eb6f0de0SAdrian Chadd 	sc->sc_addba_stop(ni, tap);
5260eb6f0de0SAdrian Chadd 
5261eb6f0de0SAdrian Chadd 	/*
52624dfd4507SAdrian Chadd 	 * ath_tx_tid_cleanup will resume the TID if possible, otherwise
5263eb6f0de0SAdrian Chadd 	 * it'll set the cleanup flag, and it'll be unpaused once
5264eb6f0de0SAdrian Chadd 	 * things have been cleaned up.
5265eb6f0de0SAdrian Chadd 	 */
52664dfd4507SAdrian Chadd 	ath_tx_tid_cleanup(sc, an, tid);
5267eb6f0de0SAdrian Chadd }
5268eb6f0de0SAdrian Chadd 
5269eb6f0de0SAdrian Chadd /*
5270eb6f0de0SAdrian Chadd  * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
5271eb6f0de0SAdrian Chadd  * it simply tears down the aggregation session. Ew.
5272eb6f0de0SAdrian Chadd  *
5273eb6f0de0SAdrian Chadd  * It however will call ieee80211_ampdu_stop() which will call
5274eb6f0de0SAdrian Chadd  * ic->ic_addba_stop().
5275eb6f0de0SAdrian Chadd  *
5276eb6f0de0SAdrian Chadd  * XXX This uses a hard-coded max BAR count value; the whole
5277eb6f0de0SAdrian Chadd  * XXX BAR TX success or failure should be better handled!
5278eb6f0de0SAdrian Chadd  */
5279eb6f0de0SAdrian Chadd void
5280eb6f0de0SAdrian Chadd ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5281eb6f0de0SAdrian Chadd     int status)
5282eb6f0de0SAdrian Chadd {
5283eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
52842aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5285eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5286eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
5287eb6f0de0SAdrian Chadd 	int attempts = tap->txa_attempts;
5288eb6f0de0SAdrian Chadd 
52890e22ed0eSAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
5290e60c4fc2SAdrian Chadd 	    "%s: called; tap=%p, atid=%p, txa_tid=%d, atid->tid=%d, status=%d, attempts=%d\n",
52910e22ed0eSAdrian Chadd 	    __func__,
5292e60c4fc2SAdrian Chadd 	    tap,
5293e60c4fc2SAdrian Chadd 	    atid,
5294e60c4fc2SAdrian Chadd 	    tap->txa_tid,
5295e60c4fc2SAdrian Chadd 	    atid->tid,
52960e22ed0eSAdrian Chadd 	    status,
52970e22ed0eSAdrian Chadd 	    attempts);
5298eb6f0de0SAdrian Chadd 
5299eb6f0de0SAdrian Chadd 	/* Note: This may update the BAW details */
5300eb6f0de0SAdrian Chadd 	sc->sc_bar_response(ni, tap, status);
5301eb6f0de0SAdrian Chadd 
5302eb6f0de0SAdrian Chadd 	/* Unpause the TID */
5303eb6f0de0SAdrian Chadd 	/*
5304eb6f0de0SAdrian Chadd 	 * XXX if this is attempt=50, the TID will be downgraded
5305eb6f0de0SAdrian Chadd 	 * XXX to a non-aggregate session. So we must unpause the
5306eb6f0de0SAdrian Chadd 	 * XXX TID here or it'll never be done.
5307088d8b81SAdrian Chadd 	 *
5308088d8b81SAdrian Chadd 	 * Also, don't call it if bar_tx/bar_wait are 0; something
5309088d8b81SAdrian Chadd 	 * has beaten us to the punch? (XXX figure out what?)
5310eb6f0de0SAdrian Chadd 	 */
5311eb6f0de0SAdrian Chadd 	if (status == 0 || attempts == 50) {
5312375307d4SAdrian Chadd 		ATH_TX_LOCK(sc);
5313088d8b81SAdrian Chadd 		if (atid->bar_tx == 0 || atid->bar_wait == 0)
5314088d8b81SAdrian Chadd 			device_printf(sc->sc_dev,
5315088d8b81SAdrian Chadd 			    "%s: huh? bar_tx=%d, bar_wait=%d\n",
5316088d8b81SAdrian Chadd 			    __func__,
5317088d8b81SAdrian Chadd 			    atid->bar_tx, atid->bar_wait);
5318088d8b81SAdrian Chadd 		else
531988b3d483SAdrian Chadd 			ath_tx_tid_bar_unsuspend(sc, atid);
5320375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
5321eb6f0de0SAdrian Chadd 	}
5322eb6f0de0SAdrian Chadd }
5323eb6f0de0SAdrian Chadd 
5324eb6f0de0SAdrian Chadd /*
5325eb6f0de0SAdrian Chadd  * This is called whenever the pending ADDBA request times out.
5326eb6f0de0SAdrian Chadd  * Unpause and reschedule the TID.
5327eb6f0de0SAdrian Chadd  */
5328eb6f0de0SAdrian Chadd void
5329eb6f0de0SAdrian Chadd ath_addba_response_timeout(struct ieee80211_node *ni,
5330eb6f0de0SAdrian Chadd     struct ieee80211_tx_ampdu *tap)
5331eb6f0de0SAdrian Chadd {
5332eb6f0de0SAdrian Chadd 	struct ath_softc *sc = ni->ni_ic->ic_ifp->if_softc;
53332aa563dfSAdrian Chadd 	int tid = tap->txa_tid;
5334eb6f0de0SAdrian Chadd 	struct ath_node *an = ATH_NODE(ni);
5335eb6f0de0SAdrian Chadd 	struct ath_tid *atid = &an->an_tid[tid];
5336eb6f0de0SAdrian Chadd 
5337eb6f0de0SAdrian Chadd 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5338eb6f0de0SAdrian Chadd 	    "%s: called; resuming\n", __func__);
5339eb6f0de0SAdrian Chadd 
5340375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5341d3a6425bSAdrian Chadd 	atid->addba_tx_pending = 0;
5342375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5343d3a6425bSAdrian Chadd 
5344eb6f0de0SAdrian Chadd 	/* Note: This updates the aggregate state to (again) pending */
5345eb6f0de0SAdrian Chadd 	sc->sc_addba_response_timeout(ni, tap);
5346eb6f0de0SAdrian Chadd 
5347eb6f0de0SAdrian Chadd 	/* Unpause the TID; which reschedules it */
5348375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
5349eb6f0de0SAdrian Chadd 	ath_tx_tid_resume(sc, atid);
5350375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
5351eb6f0de0SAdrian Chadd }
53523fdfc330SAdrian Chadd 
53530eb81626SAdrian Chadd /*
53540eb81626SAdrian Chadd  * Check if a node is asleep or not.
53550eb81626SAdrian Chadd  */
5356548a605dSAdrian Chadd int
53570eb81626SAdrian Chadd ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an)
53580eb81626SAdrian Chadd {
53590eb81626SAdrian Chadd 
53600eb81626SAdrian Chadd 	ATH_NODE_LOCK_ASSERT(an);
53610eb81626SAdrian Chadd 
53620eb81626SAdrian Chadd 	return (an->an_is_powersave);
53630eb81626SAdrian Chadd }
53640eb81626SAdrian Chadd 
53650eb81626SAdrian Chadd /*
53660eb81626SAdrian Chadd  * Mark a node as currently "in powersaving."
53670eb81626SAdrian Chadd  * This suspends all traffic on the node.
53680eb81626SAdrian Chadd  *
53690eb81626SAdrian Chadd  * This must be called with the node/tx locks free.
53700eb81626SAdrian Chadd  *
53710eb81626SAdrian Chadd  * XXX TODO: the locking silliness below is due to how the node
53720eb81626SAdrian Chadd  * locking currently works.  Right now, the node lock is grabbed
53730eb81626SAdrian Chadd  * to do rate control lookups and these are done with the TX
53740eb81626SAdrian Chadd  * queue lock held.  This means the node lock can't be grabbed
53750eb81626SAdrian Chadd  * first here or a LOR will occur.
53760eb81626SAdrian Chadd  *
53770eb81626SAdrian Chadd  * Eventually (hopefully!) the TX path code will only grab
53780eb81626SAdrian Chadd  * the TXQ lock when transmitting and the ath_node lock when
53790eb81626SAdrian Chadd  * doing node/TID operations.  There are other complications -
53800eb81626SAdrian Chadd  * the sched/unsched operations involve walking the per-txq
53810eb81626SAdrian Chadd  * 'active tid' list and this requires both locks to be held.
53820eb81626SAdrian Chadd  */
53830eb81626SAdrian Chadd void
53840eb81626SAdrian Chadd ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an)
53850eb81626SAdrian Chadd {
53860eb81626SAdrian Chadd 	struct ath_tid *atid;
53870eb81626SAdrian Chadd 	struct ath_txq *txq;
53880eb81626SAdrian Chadd 	int tid;
53890eb81626SAdrian Chadd 
53900eb81626SAdrian Chadd 	ATH_NODE_UNLOCK_ASSERT(an);
53910eb81626SAdrian Chadd 
53920eb81626SAdrian Chadd 	/*
53930eb81626SAdrian Chadd 	 * It's possible that a parallel call to ath_tx_node_wakeup()
53940eb81626SAdrian Chadd 	 * will unpause these queues.
53950eb81626SAdrian Chadd 	 *
53960eb81626SAdrian Chadd 	 * The node lock can't just be grabbed here, as there's places
53970eb81626SAdrian Chadd 	 * in the driver where the node lock is grabbed _within_ a
53980eb81626SAdrian Chadd 	 * TXQ lock.
53990eb81626SAdrian Chadd 	 * So, we do this delicately and unwind state if needed.
54000eb81626SAdrian Chadd 	 *
54010eb81626SAdrian Chadd 	 * + Pause all the queues
54020eb81626SAdrian Chadd 	 * + Grab the node lock
54030eb81626SAdrian Chadd 	 * + If the queue is already asleep, unpause and quit
54040eb81626SAdrian Chadd 	 * + else just mark as asleep.
54050eb81626SAdrian Chadd 	 *
54060eb81626SAdrian Chadd 	 * A parallel sleep() call will just pause and then
54070eb81626SAdrian Chadd 	 * find they're already paused, so undo it.
54080eb81626SAdrian Chadd 	 *
54090eb81626SAdrian Chadd 	 * A parallel wakeup() call will check if asleep is 1
54100eb81626SAdrian Chadd 	 * and if it's not (ie, it's 0), it'll treat it as already
54110eb81626SAdrian Chadd 	 * being awake. If it's 1, it'll mark it as 0 and then
54120eb81626SAdrian Chadd 	 * unpause everything.
54130eb81626SAdrian Chadd 	 *
54140eb81626SAdrian Chadd 	 * (Talk about a delicate hack.)
54150eb81626SAdrian Chadd 	 */
54160eb81626SAdrian Chadd 
54170eb81626SAdrian Chadd 	/* Suspend all traffic on the node */
5418375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
54190eb81626SAdrian Chadd 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
54200eb81626SAdrian Chadd 		atid = &an->an_tid[tid];
54210eb81626SAdrian Chadd 		txq = sc->sc_ac2q[atid->ac];
54220eb81626SAdrian Chadd 
54230eb81626SAdrian Chadd 		ath_tx_tid_pause(sc, atid);
54240eb81626SAdrian Chadd 	}
5425375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
54260eb81626SAdrian Chadd 
54270eb81626SAdrian Chadd 	ATH_NODE_LOCK(an);
54280eb81626SAdrian Chadd 
54290eb81626SAdrian Chadd 	/* In case of concurrency races from net80211.. */
54300eb81626SAdrian Chadd 	if (an->an_is_powersave == 1) {
54310eb81626SAdrian Chadd 		ATH_NODE_UNLOCK(an);
54320eb81626SAdrian Chadd 		device_printf(sc->sc_dev,
54330eb81626SAdrian Chadd 		    "%s: an=%p: node was already asleep\n",
54340eb81626SAdrian Chadd 		    __func__, an);
5435375307d4SAdrian Chadd 		ATH_TX_LOCK(sc);
54360eb81626SAdrian Chadd 		for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
54370eb81626SAdrian Chadd 			atid = &an->an_tid[tid];
54380eb81626SAdrian Chadd 			txq = sc->sc_ac2q[atid->ac];
54390eb81626SAdrian Chadd 
54400eb81626SAdrian Chadd 			ath_tx_tid_resume(sc, atid);
54410eb81626SAdrian Chadd 		}
5442375307d4SAdrian Chadd 		ATH_TX_UNLOCK(sc);
54430eb81626SAdrian Chadd 		return;
54440eb81626SAdrian Chadd 	}
54450eb81626SAdrian Chadd 
54460eb81626SAdrian Chadd 	/* Mark node as in powersaving */
54470eb81626SAdrian Chadd 	an->an_is_powersave = 1;
54480eb81626SAdrian Chadd 
54490eb81626SAdrian Chadd 	ATH_NODE_UNLOCK(an);
54500eb81626SAdrian Chadd }
54510eb81626SAdrian Chadd 
54520eb81626SAdrian Chadd /*
54530eb81626SAdrian Chadd  * Mark a node as currently "awake."
54540eb81626SAdrian Chadd  * This resumes all traffic to the node.
54550eb81626SAdrian Chadd  */
54560eb81626SAdrian Chadd void
54570eb81626SAdrian Chadd ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an)
54580eb81626SAdrian Chadd {
54590eb81626SAdrian Chadd 	struct ath_tid *atid;
54600eb81626SAdrian Chadd 	struct ath_txq *txq;
54610eb81626SAdrian Chadd 	int tid;
54620eb81626SAdrian Chadd 
54630eb81626SAdrian Chadd 	ATH_NODE_UNLOCK_ASSERT(an);
54640eb81626SAdrian Chadd 	ATH_NODE_LOCK(an);
54650eb81626SAdrian Chadd 
54660eb81626SAdrian Chadd 	/* In case of concurrency races from net80211.. */
54670eb81626SAdrian Chadd 	if (an->an_is_powersave == 0) {
54680eb81626SAdrian Chadd 		ATH_NODE_UNLOCK(an);
54690eb81626SAdrian Chadd 		device_printf(sc->sc_dev,
54700eb81626SAdrian Chadd 		    "%s: an=%p: node was already awake\n",
54710eb81626SAdrian Chadd 		    __func__, an);
54720eb81626SAdrian Chadd 		return;
54730eb81626SAdrian Chadd 	}
54740eb81626SAdrian Chadd 
54750eb81626SAdrian Chadd 	/* Mark node as awake */
54760eb81626SAdrian Chadd 	an->an_is_powersave = 0;
54770eb81626SAdrian Chadd 
54780eb81626SAdrian Chadd 	ATH_NODE_UNLOCK(an);
54790eb81626SAdrian Chadd 
5480375307d4SAdrian Chadd 	ATH_TX_LOCK(sc);
54810eb81626SAdrian Chadd 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
54820eb81626SAdrian Chadd 		atid = &an->an_tid[tid];
54830eb81626SAdrian Chadd 		txq = sc->sc_ac2q[atid->ac];
54840eb81626SAdrian Chadd 
54850eb81626SAdrian Chadd 		ath_tx_tid_resume(sc, atid);
54860eb81626SAdrian Chadd 	}
5487375307d4SAdrian Chadd 	ATH_TX_UNLOCK(sc);
54880eb81626SAdrian Chadd }
54890eb81626SAdrian Chadd 
54903fdfc330SAdrian Chadd static int
54913fdfc330SAdrian Chadd ath_legacy_dma_txsetup(struct ath_softc *sc)
54923fdfc330SAdrian Chadd {
54933fdfc330SAdrian Chadd 
54943fdfc330SAdrian Chadd 	/* nothing new needed */
54953fdfc330SAdrian Chadd 	return (0);
54963fdfc330SAdrian Chadd }
54973fdfc330SAdrian Chadd 
54983fdfc330SAdrian Chadd static int
54993fdfc330SAdrian Chadd ath_legacy_dma_txteardown(struct ath_softc *sc)
55003fdfc330SAdrian Chadd {
55013fdfc330SAdrian Chadd 
55023fdfc330SAdrian Chadd 	/* nothing new needed */
55033fdfc330SAdrian Chadd 	return (0);
55043fdfc330SAdrian Chadd }
55053fdfc330SAdrian Chadd 
55063fdfc330SAdrian Chadd void
55073fdfc330SAdrian Chadd ath_xmit_setup_legacy(struct ath_softc *sc)
55083fdfc330SAdrian Chadd {
55091006fc0cSAdrian Chadd 	/*
55101006fc0cSAdrian Chadd 	 * For now, just set the descriptor length to sizeof(ath_desc);
55111006fc0cSAdrian Chadd 	 * worry about extracting the real length out of the HAL later.
55121006fc0cSAdrian Chadd 	 */
55131006fc0cSAdrian Chadd 	sc->sc_tx_desclen = sizeof(struct ath_desc);
5514bb327d28SAdrian Chadd 	sc->sc_tx_statuslen = sizeof(struct ath_desc);
55151006fc0cSAdrian Chadd 	sc->sc_tx_nmaps = 1;	/* only one buffer per TX desc */
55163fdfc330SAdrian Chadd 
55173fdfc330SAdrian Chadd 	sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
55183fdfc330SAdrian Chadd 	sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
5519f8418db5SAdrian Chadd 	sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func;
5520746bab5bSAdrian Chadd 
5521746bab5bSAdrian Chadd 	sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
5522746bab5bSAdrian Chadd 	sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
5523788e6aa9SAdrian Chadd 
5524788e6aa9SAdrian Chadd 	sc->sc_tx.xmit_drain = ath_legacy_tx_drain;
55253fdfc330SAdrian Chadd }
5526