1b8e788a5SAdrian Chadd /*- 2b8e788a5SAdrian Chadd * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3c6e9cee2SAdrian Chadd * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 4b8e788a5SAdrian Chadd * All rights reserved. 5b8e788a5SAdrian Chadd * 6b8e788a5SAdrian Chadd * Redistribution and use in source and binary forms, with or without 7b8e788a5SAdrian Chadd * modification, are permitted provided that the following conditions 8b8e788a5SAdrian Chadd * are met: 9b8e788a5SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 10b8e788a5SAdrian Chadd * notice, this list of conditions and the following disclaimer, 11b8e788a5SAdrian Chadd * without modification. 12b8e788a5SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13b8e788a5SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14b8e788a5SAdrian Chadd * redistribution must be conditioned upon including a substantially 15b8e788a5SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 16b8e788a5SAdrian Chadd * 17b8e788a5SAdrian Chadd * NO WARRANTY 18b8e788a5SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19b8e788a5SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20b8e788a5SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21b8e788a5SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22b8e788a5SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23b8e788a5SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24b8e788a5SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25b8e788a5SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26b8e788a5SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27b8e788a5SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28b8e788a5SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 29b8e788a5SAdrian Chadd */ 30b8e788a5SAdrian Chadd 31b8e788a5SAdrian Chadd #include <sys/cdefs.h> 32b8e788a5SAdrian Chadd __FBSDID("$FreeBSD$"); 33b8e788a5SAdrian Chadd 34b8e788a5SAdrian Chadd /* 35b8e788a5SAdrian Chadd * Driver for the Atheros Wireless LAN controller. 36b8e788a5SAdrian Chadd * 37b8e788a5SAdrian Chadd * This software is derived from work of Atsushi Onoe; his contribution 38b8e788a5SAdrian Chadd * is greatly appreciated. 39b8e788a5SAdrian Chadd */ 40b8e788a5SAdrian Chadd 41b8e788a5SAdrian Chadd #include "opt_inet.h" 42b8e788a5SAdrian Chadd #include "opt_ath.h" 43b8e788a5SAdrian Chadd #include "opt_wlan.h" 44b8e788a5SAdrian Chadd 45b8e788a5SAdrian Chadd #include <sys/param.h> 46b8e788a5SAdrian Chadd #include <sys/systm.h> 47b8e788a5SAdrian Chadd #include <sys/sysctl.h> 48b8e788a5SAdrian Chadd #include <sys/mbuf.h> 49b8e788a5SAdrian Chadd #include <sys/malloc.h> 50b8e788a5SAdrian Chadd #include <sys/lock.h> 51b8e788a5SAdrian Chadd #include <sys/mutex.h> 52b8e788a5SAdrian Chadd #include <sys/kernel.h> 53b8e788a5SAdrian Chadd #include <sys/socket.h> 54b8e788a5SAdrian Chadd #include <sys/sockio.h> 55b8e788a5SAdrian Chadd #include <sys/errno.h> 56b8e788a5SAdrian Chadd #include <sys/callout.h> 57b8e788a5SAdrian Chadd #include <sys/bus.h> 58b8e788a5SAdrian Chadd #include <sys/endian.h> 59b8e788a5SAdrian Chadd #include <sys/kthread.h> 60b8e788a5SAdrian Chadd #include <sys/taskqueue.h> 61b8e788a5SAdrian Chadd #include <sys/priv.h> 62f431664cSOlivier Houchard #include <sys/ktr.h> 63b8e788a5SAdrian Chadd 64b8e788a5SAdrian Chadd #include <machine/bus.h> 65b8e788a5SAdrian Chadd 66b8e788a5SAdrian Chadd #include <net/if.h> 6776039bc8SGleb Smirnoff #include <net/if_var.h> 68b8e788a5SAdrian Chadd #include <net/if_dl.h> 69b8e788a5SAdrian Chadd #include <net/if_media.h> 70b8e788a5SAdrian Chadd #include <net/if_types.h> 71b8e788a5SAdrian Chadd #include <net/if_arp.h> 72b8e788a5SAdrian Chadd #include <net/ethernet.h> 73b8e788a5SAdrian Chadd #include <net/if_llc.h> 74b8e788a5SAdrian Chadd 75b8e788a5SAdrian Chadd #include <net80211/ieee80211_var.h> 76b8e788a5SAdrian Chadd #include <net80211/ieee80211_regdomain.h> 77b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_SUPERG 78b8e788a5SAdrian Chadd #include <net80211/ieee80211_superg.h> 79b8e788a5SAdrian Chadd #endif 80b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 81b8e788a5SAdrian Chadd #include <net80211/ieee80211_tdma.h> 82b8e788a5SAdrian Chadd #endif 83eb6f0de0SAdrian Chadd #include <net80211/ieee80211_ht.h> 84b8e788a5SAdrian Chadd 85b8e788a5SAdrian Chadd #include <net/bpf.h> 86b8e788a5SAdrian Chadd 87b8e788a5SAdrian Chadd #ifdef INET 88b8e788a5SAdrian Chadd #include <netinet/in.h> 89b8e788a5SAdrian Chadd #include <netinet/if_ether.h> 90b8e788a5SAdrian Chadd #endif 91b8e788a5SAdrian Chadd 92b8e788a5SAdrian Chadd #include <dev/ath/if_athvar.h> 93b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 94b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_diagcodes.h> 95b8e788a5SAdrian Chadd 96b8e788a5SAdrian Chadd #include <dev/ath/if_ath_debug.h> 97b8e788a5SAdrian Chadd 98b8e788a5SAdrian Chadd #ifdef ATH_TX99_DIAG 99b8e788a5SAdrian Chadd #include <dev/ath/ath_tx99/ath_tx99.h> 100b8e788a5SAdrian Chadd #endif 101b8e788a5SAdrian Chadd 102b8e788a5SAdrian Chadd #include <dev/ath/if_ath_misc.h> 103b8e788a5SAdrian Chadd #include <dev/ath/if_ath_tx.h> 104c1782ce0SAdrian Chadd #include <dev/ath/if_ath_tx_ht.h> 105b8e788a5SAdrian Chadd 106b69b0dccSAdrian Chadd #ifdef ATH_DEBUG_ALQ 107b69b0dccSAdrian Chadd #include <dev/ath/if_ath_alq.h> 108b69b0dccSAdrian Chadd #endif 109b69b0dccSAdrian Chadd 11081a82688SAdrian Chadd /* 111eb6f0de0SAdrian Chadd * How many retries to perform in software 112eb6f0de0SAdrian Chadd */ 113eb6f0de0SAdrian Chadd #define SWMAX_RETRIES 10 114eb6f0de0SAdrian Chadd 1157403d1b9SAdrian Chadd /* 1167403d1b9SAdrian Chadd * What queue to throw the non-QoS TID traffic into 1177403d1b9SAdrian Chadd */ 1187403d1b9SAdrian Chadd #define ATH_NONQOS_TID_AC WME_AC_VO 1197403d1b9SAdrian Chadd 1200eb81626SAdrian Chadd #if 0 1210eb81626SAdrian Chadd static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an); 1220eb81626SAdrian Chadd #endif 123eb6f0de0SAdrian Chadd static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, 124eb6f0de0SAdrian Chadd int tid); 125eb6f0de0SAdrian Chadd static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, 126eb6f0de0SAdrian Chadd int tid); 127a108d2d6SAdrian Chadd static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc, 128a108d2d6SAdrian Chadd struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0); 129eb6f0de0SAdrian Chadd static int ath_tx_action_frame_override_queue(struct ath_softc *sc, 130eb6f0de0SAdrian Chadd struct ieee80211_node *ni, struct mbuf *m0, int *tid); 131f1bc738eSAdrian Chadd static struct ath_buf * 132f1bc738eSAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 133f1bc738eSAdrian Chadd struct ath_tid *tid, struct ath_buf *bf); 134eb6f0de0SAdrian Chadd 135bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 136bb327d28SAdrian Chadd void 137bb327d28SAdrian Chadd ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first) 138bb327d28SAdrian Chadd { 139bb327d28SAdrian Chadd struct ath_buf *bf; 140bb327d28SAdrian Chadd int i, n; 141bb327d28SAdrian Chadd const char *ds; 142bb327d28SAdrian Chadd 143bb327d28SAdrian Chadd /* XXX we should skip out early if debugging isn't enabled! */ 144bb327d28SAdrian Chadd bf = bf_first; 145bb327d28SAdrian Chadd 146bb327d28SAdrian Chadd while (bf != NULL) { 147bb327d28SAdrian Chadd /* XXX should ensure bf_nseg > 0! */ 148bb327d28SAdrian Chadd if (bf->bf_nseg == 0) 149bb327d28SAdrian Chadd break; 150bb327d28SAdrian Chadd n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1; 151bb327d28SAdrian Chadd for (i = 0, ds = (const char *) bf->bf_desc; 152bb327d28SAdrian Chadd i < n; 153bb327d28SAdrian Chadd i++, ds += sc->sc_tx_desclen) { 154bb327d28SAdrian Chadd if_ath_alq_post(&sc->sc_alq, 155bb327d28SAdrian Chadd ATH_ALQ_EDMA_TXDESC, 156bb327d28SAdrian Chadd sc->sc_tx_desclen, 157bb327d28SAdrian Chadd ds); 158bb327d28SAdrian Chadd } 159bb327d28SAdrian Chadd bf = bf->bf_next; 160bb327d28SAdrian Chadd } 161bb327d28SAdrian Chadd } 162bb327d28SAdrian Chadd #endif /* ATH_DEBUG_ALQ */ 163bb327d28SAdrian Chadd 164eb6f0de0SAdrian Chadd /* 16581a82688SAdrian Chadd * Whether to use the 11n rate scenario functions or not 16681a82688SAdrian Chadd */ 16781a82688SAdrian Chadd static inline int 16881a82688SAdrian Chadd ath_tx_is_11n(struct ath_softc *sc) 16981a82688SAdrian Chadd { 1704ddf2cc3SAdrian Chadd return ((sc->sc_ah->ah_magic == 0x20065416) || 1714ddf2cc3SAdrian Chadd (sc->sc_ah->ah_magic == 0x19741014)); 17281a82688SAdrian Chadd } 17381a82688SAdrian Chadd 174eb6f0de0SAdrian Chadd /* 175eb6f0de0SAdrian Chadd * Obtain the current TID from the given frame. 176eb6f0de0SAdrian Chadd * 177eb6f0de0SAdrian Chadd * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.) 178eb6f0de0SAdrian Chadd * This has implications for which AC/priority the packet is placed 179eb6f0de0SAdrian Chadd * in. 180eb6f0de0SAdrian Chadd */ 181eb6f0de0SAdrian Chadd static int 182eb6f0de0SAdrian Chadd ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0) 183eb6f0de0SAdrian Chadd { 184eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 185eb6f0de0SAdrian Chadd int pri = M_WME_GETAC(m0); 186eb6f0de0SAdrian Chadd 187eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 188eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 189eb6f0de0SAdrian Chadd return IEEE80211_NONQOS_TID; 190eb6f0de0SAdrian Chadd else 191eb6f0de0SAdrian Chadd return WME_AC_TO_TID(pri); 192eb6f0de0SAdrian Chadd } 193eb6f0de0SAdrian Chadd 194f1bc738eSAdrian Chadd static void 195f1bc738eSAdrian Chadd ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf) 196f1bc738eSAdrian Chadd { 197f1bc738eSAdrian Chadd struct ieee80211_frame *wh; 198f1bc738eSAdrian Chadd 199f1bc738eSAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 200f1bc738eSAdrian Chadd /* Only update/resync if needed */ 201f1bc738eSAdrian Chadd if (bf->bf_state.bfs_isretried == 0) { 202f1bc738eSAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_RETRY; 203f1bc738eSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 204f1bc738eSAdrian Chadd BUS_DMASYNC_PREWRITE); 205f1bc738eSAdrian Chadd } 206f1bc738eSAdrian Chadd bf->bf_state.bfs_isretried = 1; 207f1bc738eSAdrian Chadd bf->bf_state.bfs_retries ++; 208f1bc738eSAdrian Chadd } 209f1bc738eSAdrian Chadd 210eb6f0de0SAdrian Chadd /* 211eb6f0de0SAdrian Chadd * Determine what the correct AC queue for the given frame 212eb6f0de0SAdrian Chadd * should be. 213eb6f0de0SAdrian Chadd * 214eb6f0de0SAdrian Chadd * This code assumes that the TIDs map consistently to 215eb6f0de0SAdrian Chadd * the underlying hardware (or software) ath_txq. 216eb6f0de0SAdrian Chadd * Since the sender may try to set an AC which is 217eb6f0de0SAdrian Chadd * arbitrary, non-QoS TIDs may end up being put on 218eb6f0de0SAdrian Chadd * completely different ACs. There's no way to put a 219eb6f0de0SAdrian Chadd * TID into multiple ath_txq's for scheduling, so 220eb6f0de0SAdrian Chadd * for now we override the AC/TXQ selection and set 221eb6f0de0SAdrian Chadd * non-QOS TID frames into the BE queue. 222eb6f0de0SAdrian Chadd * 223eb6f0de0SAdrian Chadd * This may be completely incorrect - specifically, 224eb6f0de0SAdrian Chadd * some management frames may end up out of order 225eb6f0de0SAdrian Chadd * compared to the QoS traffic they're controlling. 226eb6f0de0SAdrian Chadd * I'll look into this later. 227eb6f0de0SAdrian Chadd */ 228eb6f0de0SAdrian Chadd static int 229eb6f0de0SAdrian Chadd ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0) 230eb6f0de0SAdrian Chadd { 231eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 232eb6f0de0SAdrian Chadd int pri = M_WME_GETAC(m0); 233eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 234eb6f0de0SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh)) 235eb6f0de0SAdrian Chadd return pri; 236eb6f0de0SAdrian Chadd 2377403d1b9SAdrian Chadd return ATH_NONQOS_TID_AC; 238eb6f0de0SAdrian Chadd } 239eb6f0de0SAdrian Chadd 240b8e788a5SAdrian Chadd void 241b8e788a5SAdrian Chadd ath_txfrag_cleanup(struct ath_softc *sc, 242b8e788a5SAdrian Chadd ath_bufhead *frags, struct ieee80211_node *ni) 243b8e788a5SAdrian Chadd { 244b8e788a5SAdrian Chadd struct ath_buf *bf, *next; 245b8e788a5SAdrian Chadd 246b8e788a5SAdrian Chadd ATH_TXBUF_LOCK_ASSERT(sc); 247b8e788a5SAdrian Chadd 2486b349e5aSAdrian Chadd TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) { 249b8e788a5SAdrian Chadd /* NB: bf assumed clean */ 2506b349e5aSAdrian Chadd TAILQ_REMOVE(frags, bf, bf_list); 251e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 252b8e788a5SAdrian Chadd ieee80211_node_decref(ni); 253b8e788a5SAdrian Chadd } 254b8e788a5SAdrian Chadd } 255b8e788a5SAdrian Chadd 256b8e788a5SAdrian Chadd /* 257b8e788a5SAdrian Chadd * Setup xmit of a fragmented frame. Allocate a buffer 258b8e788a5SAdrian Chadd * for each frag and bump the node reference count to 259b8e788a5SAdrian Chadd * reflect the held reference to be setup by ath_tx_start. 260b8e788a5SAdrian Chadd */ 261b8e788a5SAdrian Chadd int 262b8e788a5SAdrian Chadd ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags, 263b8e788a5SAdrian Chadd struct mbuf *m0, struct ieee80211_node *ni) 264b8e788a5SAdrian Chadd { 265b8e788a5SAdrian Chadd struct mbuf *m; 266b8e788a5SAdrian Chadd struct ath_buf *bf; 267b8e788a5SAdrian Chadd 268b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 269b8e788a5SAdrian Chadd for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) { 270af33d486SAdrian Chadd /* XXX non-management? */ 271af33d486SAdrian Chadd bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL); 272b8e788a5SAdrian Chadd if (bf == NULL) { /* out of buffers, cleanup */ 27383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n", 274b43facbfSAdrian Chadd __func__); 275b8e788a5SAdrian Chadd ath_txfrag_cleanup(sc, frags, ni); 276b8e788a5SAdrian Chadd break; 277b8e788a5SAdrian Chadd } 278b8e788a5SAdrian Chadd ieee80211_node_incref(ni); 2796b349e5aSAdrian Chadd TAILQ_INSERT_TAIL(frags, bf, bf_list); 280b8e788a5SAdrian Chadd } 281b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 282b8e788a5SAdrian Chadd 2836b349e5aSAdrian Chadd return !TAILQ_EMPTY(frags); 284b8e788a5SAdrian Chadd } 285b8e788a5SAdrian Chadd 286b8e788a5SAdrian Chadd static int 287b8e788a5SAdrian Chadd ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0) 288b8e788a5SAdrian Chadd { 289b8e788a5SAdrian Chadd struct mbuf *m; 290b8e788a5SAdrian Chadd int error; 291b8e788a5SAdrian Chadd 292b8e788a5SAdrian Chadd /* 293b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 294b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 295b8e788a5SAdrian Chadd */ 296b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 297b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 298b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 299b8e788a5SAdrian Chadd if (error == EFBIG) { 300b8e788a5SAdrian Chadd /* XXX packet requires too many descriptors */ 30109067b6eSAdrian Chadd bf->bf_nseg = ATH_MAX_SCATTER + 1; 302b8e788a5SAdrian Chadd } else if (error != 0) { 303b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 304d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 305b8e788a5SAdrian Chadd return error; 306b8e788a5SAdrian Chadd } 307b8e788a5SAdrian Chadd /* 308b8e788a5SAdrian Chadd * Discard null packets and check for packets that 309b8e788a5SAdrian Chadd * require too many TX descriptors. We try to convert 310b8e788a5SAdrian Chadd * the latter to a cluster. 311b8e788a5SAdrian Chadd */ 31209067b6eSAdrian Chadd if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */ 313b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_linear++; 31409067b6eSAdrian Chadd m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER); 315b8e788a5SAdrian Chadd if (m == NULL) { 316d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 317b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nombuf++; 318b8e788a5SAdrian Chadd return ENOMEM; 319b8e788a5SAdrian Chadd } 320b8e788a5SAdrian Chadd m0 = m; 321b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 322b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 323b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 324b8e788a5SAdrian Chadd if (error != 0) { 325b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 326d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 327b8e788a5SAdrian Chadd return error; 328b8e788a5SAdrian Chadd } 32909067b6eSAdrian Chadd KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER, 330b8e788a5SAdrian Chadd ("too many segments after defrag; nseg %u", bf->bf_nseg)); 331b8e788a5SAdrian Chadd } else if (bf->bf_nseg == 0) { /* null packet, discard */ 332b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nodata++; 333d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 334b8e788a5SAdrian Chadd return EIO; 335b8e788a5SAdrian Chadd } 336b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n", 337b8e788a5SAdrian Chadd __func__, m0, m0->m_pkthdr.len); 338b8e788a5SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 339b8e788a5SAdrian Chadd bf->bf_m = m0; 340b8e788a5SAdrian Chadd 341b8e788a5SAdrian Chadd return 0; 342b8e788a5SAdrian Chadd } 343b8e788a5SAdrian Chadd 3446edf1dc7SAdrian Chadd /* 3456e84772fSAdrian Chadd * Chain together segments+descriptors for a frame - 11n or otherwise. 3466e84772fSAdrian Chadd * 3476e84772fSAdrian Chadd * For aggregates, this is called on each frame in the aggregate. 3486edf1dc7SAdrian Chadd */ 349b8e788a5SAdrian Chadd static void 3506e84772fSAdrian Chadd ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0, 3516e84772fSAdrian Chadd struct ath_buf *bf, int is_aggr, int is_first_subframe, 3526e84772fSAdrian Chadd int is_last_subframe) 353b8e788a5SAdrian Chadd { 354b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 3556e84772fSAdrian Chadd char *ds; 3562b200bb4SAdrian Chadd int i, bp, dsp; 35746634305SAdrian Chadd HAL_DMA_ADDR bufAddrList[4]; 35846634305SAdrian Chadd uint32_t segLenList[4]; 3592b200bb4SAdrian Chadd int numTxMaps = 1; 360e2137b86SAdrian Chadd int isFirstDesc = 1; 36146634305SAdrian Chadd 3623d9b1596SAdrian Chadd /* 3633d9b1596SAdrian Chadd * XXX There's txdma and txdma_mgmt; the descriptor 3643d9b1596SAdrian Chadd * sizes must match. 3653d9b1596SAdrian Chadd */ 3663d9b1596SAdrian Chadd struct ath_descdma *dd = &sc->sc_txdma; 367b8e788a5SAdrian Chadd 368b8e788a5SAdrian Chadd /* 369b8e788a5SAdrian Chadd * Fillin the remainder of the descriptor info. 370b8e788a5SAdrian Chadd */ 37146634305SAdrian Chadd 3722b200bb4SAdrian Chadd /* 373378a752fSAdrian Chadd * We need the number of TX data pointers in each descriptor. 374378a752fSAdrian Chadd * EDMA and later chips support 4 TX buffers per descriptor; 375378a752fSAdrian Chadd * previous chips just support one. 3762b200bb4SAdrian Chadd */ 377378a752fSAdrian Chadd numTxMaps = sc->sc_tx_nmaps; 3782b200bb4SAdrian Chadd 3792b200bb4SAdrian Chadd /* 3802b200bb4SAdrian Chadd * For EDMA and later chips ensure the TX map is fully populated 3812b200bb4SAdrian Chadd * before advancing to the next descriptor. 3822b200bb4SAdrian Chadd */ 3836e84772fSAdrian Chadd ds = (char *) bf->bf_desc; 3842b200bb4SAdrian Chadd bp = dsp = 0; 3852b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 3862b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 3872b200bb4SAdrian Chadd for (i = 0; i < bf->bf_nseg; i++) { 3882b200bb4SAdrian Chadd bufAddrList[bp] = bf->bf_segs[i].ds_addr; 3892b200bb4SAdrian Chadd segLenList[bp] = bf->bf_segs[i].ds_len; 3902b200bb4SAdrian Chadd bp++; 3912b200bb4SAdrian Chadd 3922b200bb4SAdrian Chadd /* 3932b200bb4SAdrian Chadd * Go to the next segment if this isn't the last segment 3942b200bb4SAdrian Chadd * and there's space in the current TX map. 3952b200bb4SAdrian Chadd */ 3962b200bb4SAdrian Chadd if ((i != bf->bf_nseg - 1) && (bp < numTxMaps)) 3972b200bb4SAdrian Chadd continue; 3982b200bb4SAdrian Chadd 3992b200bb4SAdrian Chadd /* 4002b200bb4SAdrian Chadd * Last segment or we're out of buffer pointers. 4012b200bb4SAdrian Chadd */ 4022b200bb4SAdrian Chadd bp = 0; 40346634305SAdrian Chadd 404b8e788a5SAdrian Chadd if (i == bf->bf_nseg - 1) 40542083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 406b8e788a5SAdrian Chadd else 40742083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 4082b200bb4SAdrian Chadd bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 40946634305SAdrian Chadd 41046634305SAdrian Chadd /* 411fc56c9c5SAdrian Chadd * XXX This assumes that bfs_txq is the actual destination 412fc56c9c5SAdrian Chadd * hardware queue at this point. It may not have been 413fc56c9c5SAdrian Chadd * assigned, it may actually be pointing to the multicast 414fc56c9c5SAdrian Chadd * software TXQ id. These must be fixed! 41546634305SAdrian Chadd */ 41642083b3dSAdrian Chadd ath_hal_filltxdesc(ah, (struct ath_desc *) ds 41746634305SAdrian Chadd , bufAddrList 41846634305SAdrian Chadd , segLenList 4192b200bb4SAdrian Chadd , bf->bf_descid /* XXX desc id */ 420fc56c9c5SAdrian Chadd , bf->bf_state.bfs_tx_queue 421e2137b86SAdrian Chadd , isFirstDesc /* first segment */ 422b8e788a5SAdrian Chadd , i == bf->bf_nseg - 1 /* last segment */ 42342083b3dSAdrian Chadd , (struct ath_desc *) ds0 /* first descriptor */ 424b8e788a5SAdrian Chadd ); 42521840808SAdrian Chadd 4266e84772fSAdrian Chadd /* 4276e84772fSAdrian Chadd * Make sure the 11n aggregate fields are cleared. 4286e84772fSAdrian Chadd * 4296e84772fSAdrian Chadd * XXX TODO: this doesn't need to be called for 4306e84772fSAdrian Chadd * aggregate frames; as it'll be called on all 4316e84772fSAdrian Chadd * sub-frames. Since the descriptors are in 4326e84772fSAdrian Chadd * non-cacheable memory, this leads to some 4336e84772fSAdrian Chadd * rather slow writes on MIPS/ARM platforms. 4346e84772fSAdrian Chadd */ 43521840808SAdrian Chadd if (ath_tx_is_11n(sc)) 4365d9b19f7SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds); 43721840808SAdrian Chadd 4386e84772fSAdrian Chadd /* 4396e84772fSAdrian Chadd * If 11n is enabled, set it up as if it's an aggregate 4406e84772fSAdrian Chadd * frame. 4416e84772fSAdrian Chadd */ 4426e84772fSAdrian Chadd if (is_last_subframe) { 4436e84772fSAdrian Chadd ath_hal_set11n_aggr_last(sc->sc_ah, 4446e84772fSAdrian Chadd (struct ath_desc *) ds); 4456e84772fSAdrian Chadd } else if (is_aggr) { 4466e84772fSAdrian Chadd /* 4476e84772fSAdrian Chadd * This clears the aggrlen field; so 4486e84772fSAdrian Chadd * the caller needs to call set_aggr_first()! 4496e84772fSAdrian Chadd * 4506e84772fSAdrian Chadd * XXX TODO: don't call this for the first 4516e84772fSAdrian Chadd * descriptor in the first frame in an 4526e84772fSAdrian Chadd * aggregate! 4536e84772fSAdrian Chadd */ 4546e84772fSAdrian Chadd ath_hal_set11n_aggr_middle(sc->sc_ah, 4556e84772fSAdrian Chadd (struct ath_desc *) ds, 4566e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 4576e84772fSAdrian Chadd } 458e2137b86SAdrian Chadd isFirstDesc = 0; 45942083b3dSAdrian Chadd bf->bf_lastds = (struct ath_desc *) ds; 4602b200bb4SAdrian Chadd 4612b200bb4SAdrian Chadd /* 4622b200bb4SAdrian Chadd * Don't forget to skip to the next descriptor. 4632b200bb4SAdrian Chadd */ 46442083b3dSAdrian Chadd ds += sc->sc_tx_desclen; 4652b200bb4SAdrian Chadd dsp++; 4662b200bb4SAdrian Chadd 4672b200bb4SAdrian Chadd /* 4682b200bb4SAdrian Chadd * .. and don't forget to blank these out! 4692b200bb4SAdrian Chadd */ 4702b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 4712b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 472b8e788a5SAdrian Chadd } 4734d7f8837SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 47481a82688SAdrian Chadd } 47581a82688SAdrian Chadd 476eb6f0de0SAdrian Chadd /* 477d34a7347SAdrian Chadd * Set the rate control fields in the given descriptor based on 478d34a7347SAdrian Chadd * the bf_state fields and node state. 479d34a7347SAdrian Chadd * 480d34a7347SAdrian Chadd * The bfs fields should already be set with the relevant rate 481d34a7347SAdrian Chadd * control information, including whether MRR is to be enabled. 482d34a7347SAdrian Chadd * 483d34a7347SAdrian Chadd * Since the FreeBSD HAL currently sets up the first TX rate 484d34a7347SAdrian Chadd * in ath_hal_setuptxdesc(), this will setup the MRR 485d34a7347SAdrian Chadd * conditionally for the pre-11n chips, and call ath_buf_set_rate 486d34a7347SAdrian Chadd * unconditionally for 11n chips. These require the 11n rate 487d34a7347SAdrian Chadd * scenario to be set if MCS rates are enabled, so it's easier 488d34a7347SAdrian Chadd * to just always call it. The caller can then only set rates 2, 3 489d34a7347SAdrian Chadd * and 4 if multi-rate retry is needed. 490d34a7347SAdrian Chadd */ 491d34a7347SAdrian Chadd static void 492d34a7347SAdrian Chadd ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni, 493d34a7347SAdrian Chadd struct ath_buf *bf) 494d34a7347SAdrian Chadd { 495d34a7347SAdrian Chadd struct ath_rc_series *rc = bf->bf_state.bfs_rc; 496d34a7347SAdrian Chadd 497d34a7347SAdrian Chadd /* If mrr is disabled, blank tries 1, 2, 3 */ 498d34a7347SAdrian Chadd if (! bf->bf_state.bfs_ismrr) 499d34a7347SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 500d34a7347SAdrian Chadd 501491e1248SAdrian Chadd #if 0 502491e1248SAdrian Chadd /* 503491e1248SAdrian Chadd * If NOACK is set, just set ntries=1. 504491e1248SAdrian Chadd */ 505491e1248SAdrian Chadd else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) { 506491e1248SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 507491e1248SAdrian Chadd rc[0].tries = 1; 508491e1248SAdrian Chadd } 509491e1248SAdrian Chadd #endif 510491e1248SAdrian Chadd 511d34a7347SAdrian Chadd /* 512d34a7347SAdrian Chadd * Always call - that way a retried descriptor will 513d34a7347SAdrian Chadd * have the MRR fields overwritten. 514d34a7347SAdrian Chadd * 515d34a7347SAdrian Chadd * XXX TODO: see if this is really needed - setting up 516d34a7347SAdrian Chadd * the first descriptor should set the MRR fields to 0 517d34a7347SAdrian Chadd * for us anyway. 518d34a7347SAdrian Chadd */ 519d34a7347SAdrian Chadd if (ath_tx_is_11n(sc)) { 520d34a7347SAdrian Chadd ath_buf_set_rate(sc, ni, bf); 521d34a7347SAdrian Chadd } else { 522d34a7347SAdrian Chadd ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc 523d34a7347SAdrian Chadd , rc[1].ratecode, rc[1].tries 524d34a7347SAdrian Chadd , rc[2].ratecode, rc[2].tries 525d34a7347SAdrian Chadd , rc[3].ratecode, rc[3].tries 526d34a7347SAdrian Chadd ); 527d34a7347SAdrian Chadd } 528d34a7347SAdrian Chadd } 529d34a7347SAdrian Chadd 530d34a7347SAdrian Chadd /* 531eb6f0de0SAdrian Chadd * Setup segments+descriptors for an 11n aggregate. 532eb6f0de0SAdrian Chadd * bf_first is the first buffer in the aggregate. 533eb6f0de0SAdrian Chadd * The descriptor list must already been linked together using 534eb6f0de0SAdrian Chadd * bf->bf_next. 535eb6f0de0SAdrian Chadd */ 536eb6f0de0SAdrian Chadd static void 537eb6f0de0SAdrian Chadd ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first) 538eb6f0de0SAdrian Chadd { 539eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_prev = NULL; 5406e84772fSAdrian Chadd struct ath_desc *ds0 = bf_first->bf_desc; 541eb6f0de0SAdrian Chadd 542eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n", 543eb6f0de0SAdrian Chadd __func__, bf_first->bf_state.bfs_nframes, 544eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_al); 545eb6f0de0SAdrian Chadd 5467d9dd2acSAdrian Chadd bf = bf_first; 5477d9dd2acSAdrian Chadd 5487d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 54983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n", 5507d9dd2acSAdrian Chadd __func__, bf, 0); 5517d9dd2acSAdrian Chadd if (bf->bf_state.bfs_rc[0].ratecode == 0) 55283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n", 5537d9dd2acSAdrian Chadd __func__, bf, 0); 5547d9dd2acSAdrian Chadd 555eb6f0de0SAdrian Chadd /* 5566e84772fSAdrian Chadd * Setup all descriptors of all subframes - this will 5576e84772fSAdrian Chadd * call ath_hal_set11naggrmiddle() on every frame. 558eb6f0de0SAdrian Chadd */ 559eb6f0de0SAdrian Chadd while (bf != NULL) { 560eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 561eb6f0de0SAdrian Chadd "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n", 562eb6f0de0SAdrian Chadd __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen, 563eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 564eb6f0de0SAdrian Chadd 5656e84772fSAdrian Chadd /* 5666e84772fSAdrian Chadd * Setup the initial fields for the first descriptor - all 5676e84772fSAdrian Chadd * the non-11n specific stuff. 5686e84772fSAdrian Chadd */ 5696e84772fSAdrian Chadd ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc 5706e84772fSAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 5716e84772fSAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 5726e84772fSAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 5736e84772fSAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 5746e84772fSAdrian Chadd , bf->bf_state.bfs_txrate0 5756e84772fSAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 5766e84772fSAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 5776e84772fSAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 5786e84772fSAdrian Chadd , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */ 5796e84772fSAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 5806e84772fSAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 5816e84772fSAdrian Chadd ); 5826e84772fSAdrian Chadd 5836e84772fSAdrian Chadd /* 5846e84772fSAdrian Chadd * First descriptor? Setup the rate control and initial 5856e84772fSAdrian Chadd * aggregate header information. 5866e84772fSAdrian Chadd */ 5876e84772fSAdrian Chadd if (bf == bf_first) { 5886e84772fSAdrian Chadd /* 5896e84772fSAdrian Chadd * setup first desc with rate and aggr info 5906e84772fSAdrian Chadd */ 5916e84772fSAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 5926e84772fSAdrian Chadd } 5936e84772fSAdrian Chadd 5946e84772fSAdrian Chadd /* 5956e84772fSAdrian Chadd * Setup the descriptors for a multi-descriptor frame. 5966e84772fSAdrian Chadd * This is both aggregate and non-aggregate aware. 5976e84772fSAdrian Chadd */ 5986e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds0, bf, 5996e84772fSAdrian Chadd 1, /* is_aggr */ 6006e84772fSAdrian Chadd !! (bf == bf_first), /* is_first_subframe */ 6016e84772fSAdrian Chadd !! (bf->bf_next == NULL) /* is_last_subframe */ 6026e84772fSAdrian Chadd ); 6036e84772fSAdrian Chadd 6046e84772fSAdrian Chadd if (bf == bf_first) { 6056e84772fSAdrian Chadd /* 6066e84772fSAdrian Chadd * Initialise the first 11n aggregate with the 6076e84772fSAdrian Chadd * aggregate length and aggregate enable bits. 6086e84772fSAdrian Chadd */ 6096e84772fSAdrian Chadd ath_hal_set11n_aggr_first(sc->sc_ah, 6106e84772fSAdrian Chadd ds0, 6116e84772fSAdrian Chadd bf->bf_state.bfs_al, 6126e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 6136e84772fSAdrian Chadd } 614eb6f0de0SAdrian Chadd 615eb6f0de0SAdrian Chadd /* 616eb6f0de0SAdrian Chadd * Link the last descriptor of the previous frame 617eb6f0de0SAdrian Chadd * to the beginning descriptor of this frame. 618eb6f0de0SAdrian Chadd */ 619eb6f0de0SAdrian Chadd if (bf_prev != NULL) 620bb069955SAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds, 621bb069955SAdrian Chadd bf->bf_daddr); 622eb6f0de0SAdrian Chadd 623eb6f0de0SAdrian Chadd /* Save a copy so we can link the next descriptor in */ 624eb6f0de0SAdrian Chadd bf_prev = bf; 625eb6f0de0SAdrian Chadd bf = bf->bf_next; 626eb6f0de0SAdrian Chadd } 627eb6f0de0SAdrian Chadd 628eb6f0de0SAdrian Chadd /* 629eb6f0de0SAdrian Chadd * Set the first descriptor bf_lastds field to point to 630eb6f0de0SAdrian Chadd * the last descriptor in the last subframe, that's where 631eb6f0de0SAdrian Chadd * the status update will occur. 632eb6f0de0SAdrian Chadd */ 633eb6f0de0SAdrian Chadd bf_first->bf_lastds = bf_prev->bf_lastds; 634eb6f0de0SAdrian Chadd 635eb6f0de0SAdrian Chadd /* 636eb6f0de0SAdrian Chadd * And bf_last in the first descriptor points to the end of 637eb6f0de0SAdrian Chadd * the aggregate list. 638eb6f0de0SAdrian Chadd */ 639eb6f0de0SAdrian Chadd bf_first->bf_last = bf_prev; 640eb6f0de0SAdrian Chadd 641bbdf3df1SAdrian Chadd /* 642bbdf3df1SAdrian Chadd * For non-AR9300 NICs, which require the rate control 643bbdf3df1SAdrian Chadd * in the final descriptor - let's set that up now. 644bbdf3df1SAdrian Chadd * 645bbdf3df1SAdrian Chadd * This is because the filltxdesc() HAL call doesn't 646bbdf3df1SAdrian Chadd * populate the last segment with rate control information 647bbdf3df1SAdrian Chadd * if firstSeg is also true. For non-aggregate frames 648bbdf3df1SAdrian Chadd * that is fine, as the first frame already has rate control 649bbdf3df1SAdrian Chadd * info. But if the last frame in an aggregate has one 650bbdf3df1SAdrian Chadd * descriptor, both firstseg and lastseg will be true and 651bbdf3df1SAdrian Chadd * the rate info isn't copied. 652bbdf3df1SAdrian Chadd * 653bbdf3df1SAdrian Chadd * This is inefficient on MIPS/ARM platforms that have 654bbdf3df1SAdrian Chadd * non-cachable memory for TX descriptors, but we'll just 655bbdf3df1SAdrian Chadd * make do for now. 656bbdf3df1SAdrian Chadd * 657bbdf3df1SAdrian Chadd * As to why the rate table is stashed in the last descriptor 658bbdf3df1SAdrian Chadd * rather than the first descriptor? Because proctxdesc() 659bbdf3df1SAdrian Chadd * is called on the final descriptor in an MPDU or A-MPDU - 660bbdf3df1SAdrian Chadd * ie, the one that gets updated by the hardware upon 661bbdf3df1SAdrian Chadd * completion. That way proctxdesc() doesn't need to know 662bbdf3df1SAdrian Chadd * about the first _and_ last TX descriptor. 663bbdf3df1SAdrian Chadd */ 664bbdf3df1SAdrian Chadd ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0); 665bbdf3df1SAdrian Chadd 666eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__); 667eb6f0de0SAdrian Chadd } 668eb6f0de0SAdrian Chadd 66946634305SAdrian Chadd /* 67046634305SAdrian Chadd * Hand-off a frame to the multicast TX queue. 67146634305SAdrian Chadd * 67246634305SAdrian Chadd * This is a software TXQ which will be appended to the CAB queue 67346634305SAdrian Chadd * during the beacon setup code. 67446634305SAdrian Chadd * 67546634305SAdrian Chadd * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID 676fc56c9c5SAdrian Chadd * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated 67746634305SAdrian Chadd * with the actual hardware txq, or all of this will fall apart. 67846634305SAdrian Chadd * 67946634305SAdrian Chadd * XXX It may not be a bad idea to just stuff the QCU ID into bf_state 680fc56c9c5SAdrian Chadd * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated 68146634305SAdrian Chadd * correctly. 68246634305SAdrian Chadd */ 683eb6f0de0SAdrian Chadd static void 684eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 685eb6f0de0SAdrian Chadd struct ath_buf *bf) 686eb6f0de0SAdrian Chadd { 687375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 688375307d4SAdrian Chadd 689eb6f0de0SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 690eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 69156a85978SAdrian Chadd 69297c9a8e8SAdrian Chadd /* 69397c9a8e8SAdrian Chadd * Ensure that the tx queue is the cabq, so things get 69497c9a8e8SAdrian Chadd * mapped correctly. 69597c9a8e8SAdrian Chadd */ 69697c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) { 69783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 69897c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 69983bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue, 70097c9a8e8SAdrian Chadd txq->axq_qnum); 70197c9a8e8SAdrian Chadd } 70297c9a8e8SAdrian Chadd 70356a85978SAdrian Chadd ATH_TXQ_LOCK(txq); 7040891354cSAdrian Chadd if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) { 7050891354cSAdrian Chadd struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s); 706eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 707eb6f0de0SAdrian Chadd 708eb6f0de0SAdrian Chadd /* mark previous frame */ 7090891354cSAdrian Chadd wh = mtod(bf_last->bf_m, struct ieee80211_frame *); 710eb6f0de0SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 7110891354cSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap, 712eb6f0de0SAdrian Chadd BUS_DMASYNC_PREWRITE); 713eb6f0de0SAdrian Chadd 714eb6f0de0SAdrian Chadd /* link descriptor */ 7150891354cSAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, 7160891354cSAdrian Chadd bf_last->bf_lastds, 7170891354cSAdrian Chadd bf->bf_daddr); 718eb6f0de0SAdrian Chadd } 719eb6f0de0SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 720b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 721eb6f0de0SAdrian Chadd } 722eb6f0de0SAdrian Chadd 723eb6f0de0SAdrian Chadd /* 724eb6f0de0SAdrian Chadd * Hand-off packet to a hardware queue. 725eb6f0de0SAdrian Chadd */ 726eb6f0de0SAdrian Chadd static void 727d4365d16SAdrian Chadd ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 728d4365d16SAdrian Chadd struct ath_buf *bf) 729eb6f0de0SAdrian Chadd { 730eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 7319be82a42SAdrian Chadd struct ath_buf *bf_first; 73281a82688SAdrian Chadd 733b8e788a5SAdrian Chadd /* 734b8e788a5SAdrian Chadd * Insert the frame on the outbound list and pass it on 735b8e788a5SAdrian Chadd * to the hardware. Multicast frames buffered for power 736b8e788a5SAdrian Chadd * save stations and transmit from the CAB queue are stored 737b8e788a5SAdrian Chadd * on a s/w only queue and loaded on to the CAB queue in 738b8e788a5SAdrian Chadd * the SWBA handler since frames only go out on DTIM and 739b8e788a5SAdrian Chadd * to avoid possible races. 740b8e788a5SAdrian Chadd */ 741375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 742b8e788a5SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 743eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 744eb6f0de0SAdrian Chadd KASSERT(txq->axq_qnum != ATH_TXQ_SWQ, 745eb6f0de0SAdrian Chadd ("ath_tx_handoff_hw called for mcast queue")); 746eb6f0de0SAdrian Chadd 7479be82a42SAdrian Chadd /* 748f5c30c4eSAdrian Chadd * XXX We should instead just verify that sc_txstart_cnt 749f5c30c4eSAdrian Chadd * or ath_txproc_cnt > 0. That would mean that 750f5c30c4eSAdrian Chadd * the reset is going to be waiting for us to complete. 7519be82a42SAdrian Chadd */ 752f5c30c4eSAdrian Chadd if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) { 753f5c30c4eSAdrian Chadd device_printf(sc->sc_dev, 754f5c30c4eSAdrian Chadd "%s: TX dispatch without holding txcount/txstart refcnt!\n", 755ef27340cSAdrian Chadd __func__); 756ef27340cSAdrian Chadd } 757f5c30c4eSAdrian Chadd 758f5c30c4eSAdrian Chadd /* 759f5c30c4eSAdrian Chadd * XXX .. this is going to cause the hardware to get upset; 760f5c30c4eSAdrian Chadd * so we really should find some way to drop or queue 761f5c30c4eSAdrian Chadd * things. 762f5c30c4eSAdrian Chadd */ 763ef27340cSAdrian Chadd 764b837332dSAdrian Chadd ATH_TXQ_LOCK(txq); 765b8e788a5SAdrian Chadd 766b8e788a5SAdrian Chadd /* 7679be82a42SAdrian Chadd * XXX TODO: if there's a holdingbf, then 7689be82a42SAdrian Chadd * ATH_TXQ_PUTRUNNING should be clear. 7699be82a42SAdrian Chadd * 7709be82a42SAdrian Chadd * If there is a holdingbf and the list is empty, 7719be82a42SAdrian Chadd * then axq_link should be pointing to the holdingbf. 7729be82a42SAdrian Chadd * 7739be82a42SAdrian Chadd * Otherwise it should point to the last descriptor 7749be82a42SAdrian Chadd * in the last ath_buf. 7759be82a42SAdrian Chadd * 7769be82a42SAdrian Chadd * In any case, we should really ensure that we 7779be82a42SAdrian Chadd * update the previous descriptor link pointer to 7789be82a42SAdrian Chadd * this descriptor, regardless of all of the above state. 7799be82a42SAdrian Chadd * 7809be82a42SAdrian Chadd * For now this is captured by having axq_link point 7819be82a42SAdrian Chadd * to either the holdingbf (if the TXQ list is empty) 7829be82a42SAdrian Chadd * or the end of the list (if the TXQ list isn't empty.) 7839be82a42SAdrian Chadd * I'd rather just kill axq_link here and do it as above. 784b8e788a5SAdrian Chadd */ 78503682514SAdrian Chadd 786b8e788a5SAdrian Chadd /* 7879be82a42SAdrian Chadd * Append the frame to the TX queue. 788b8e788a5SAdrian Chadd */ 789b8e788a5SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 790b1dddc28SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, 791b1dddc28SAdrian Chadd "ath_tx_handoff: non-tdma: txq=%u, add bf=%p " 79203682514SAdrian Chadd "depth=%d", 79303682514SAdrian Chadd txq->axq_qnum, 79403682514SAdrian Chadd bf, 79503682514SAdrian Chadd txq->axq_depth); 79603682514SAdrian Chadd 7979be82a42SAdrian Chadd /* 7989be82a42SAdrian Chadd * If there's a link pointer, update it. 7999be82a42SAdrian Chadd * 8009be82a42SAdrian Chadd * XXX we should replace this with the above logic, just 8019be82a42SAdrian Chadd * to kill axq_link with fire. 8029be82a42SAdrian Chadd */ 8039be82a42SAdrian Chadd if (txq->axq_link != NULL) { 804b8e788a5SAdrian Chadd *txq->axq_link = bf->bf_daddr; 805b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 806b8e788a5SAdrian Chadd "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 807b8e788a5SAdrian Chadd txq->axq_qnum, txq->axq_link, 808d4365d16SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 809d4365d16SAdrian Chadd txq->axq_depth); 81003682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 81103682514SAdrian Chadd "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) " 81203682514SAdrian Chadd "lastds=%d", 81303682514SAdrian Chadd txq->axq_qnum, txq->axq_link, 81403682514SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 81503682514SAdrian Chadd bf->bf_lastds); 816b8e788a5SAdrian Chadd } 81797c9a8e8SAdrian Chadd 8189be82a42SAdrian Chadd /* 8199be82a42SAdrian Chadd * If we've not pushed anything into the hardware yet, 8209be82a42SAdrian Chadd * push the head of the queue into the TxDP. 8219be82a42SAdrian Chadd * 8229be82a42SAdrian Chadd * Once we've started DMA, there's no guarantee that 8239be82a42SAdrian Chadd * updating the TxDP with a new value will actually work. 8249be82a42SAdrian Chadd * So we just don't do that - if we hit the end of the list, 8259be82a42SAdrian Chadd * we keep that buffer around (the "holding buffer") and 8269be82a42SAdrian Chadd * re-start DMA by updating the link pointer of _that_ 8279be82a42SAdrian Chadd * descriptor and then restart DMA. 8289be82a42SAdrian Chadd */ 8299be82a42SAdrian Chadd if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) { 8309be82a42SAdrian Chadd bf_first = TAILQ_FIRST(&txq->axq_q); 8319be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING; 8329be82a42SAdrian Chadd ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr); 8339be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 8349be82a42SAdrian Chadd "%s: TXDP[%u] = %p (%p) depth %d\n", 8359be82a42SAdrian Chadd __func__, txq->axq_qnum, 8369be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 8379be82a42SAdrian Chadd txq->axq_depth); 8389be82a42SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 8399be82a42SAdrian Chadd "ath_tx_handoff: TXDP[%u] = %p (%p) " 8409be82a42SAdrian Chadd "lastds=%p depth %d", 8419be82a42SAdrian Chadd txq->axq_qnum, 8429be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 8439be82a42SAdrian Chadd bf_first->bf_lastds, 8449be82a42SAdrian Chadd txq->axq_depth); 8459be82a42SAdrian Chadd } 8469be82a42SAdrian Chadd 8479be82a42SAdrian Chadd /* 8489be82a42SAdrian Chadd * Ensure that the bf TXQ matches this TXQ, so later 8499be82a42SAdrian Chadd * checking and holding buffer manipulation is sane. 8509be82a42SAdrian Chadd */ 85197c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) { 85283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 85397c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 85483bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue, 85597c9a8e8SAdrian Chadd txq->axq_qnum); 85697c9a8e8SAdrian Chadd } 85797c9a8e8SAdrian Chadd 8589be82a42SAdrian Chadd /* 8599be82a42SAdrian Chadd * Track aggregate queue depth. 8609be82a42SAdrian Chadd */ 8616edf1dc7SAdrian Chadd if (bf->bf_state.bfs_aggr) 8626edf1dc7SAdrian Chadd txq->axq_aggr_depth++; 8639be82a42SAdrian Chadd 8649be82a42SAdrian Chadd /* 8659be82a42SAdrian Chadd * Update the link pointer. 8669be82a42SAdrian Chadd */ 867bb069955SAdrian Chadd ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); 8689be82a42SAdrian Chadd 8699be82a42SAdrian Chadd /* 8709be82a42SAdrian Chadd * Start DMA. 8719be82a42SAdrian Chadd * 8729be82a42SAdrian Chadd * If we wrote a TxDP above, DMA will start from here. 8739be82a42SAdrian Chadd * 8749be82a42SAdrian Chadd * If DMA is running, it'll do nothing. 8759be82a42SAdrian Chadd * 8769be82a42SAdrian Chadd * If the DMA engine hit the end of the QCU list (ie LINK=NULL, 8779be82a42SAdrian Chadd * or VEOL) then it stops at the last transmitted write. 8789be82a42SAdrian Chadd * We then append a new frame by updating the link pointer 8799be82a42SAdrian Chadd * in that descriptor and then kick TxE here; it will re-read 8809be82a42SAdrian Chadd * that last descriptor and find the new descriptor to transmit. 8819be82a42SAdrian Chadd * 8829be82a42SAdrian Chadd * This is why we keep the holding descriptor around. 8839be82a42SAdrian Chadd */ 884b8e788a5SAdrian Chadd ath_hal_txstart(ah, txq->axq_qnum); 885b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 88603682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 1, 88703682514SAdrian Chadd "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum); 888b8e788a5SAdrian Chadd } 889eb6f0de0SAdrian Chadd 890eb6f0de0SAdrian Chadd /* 891eb6f0de0SAdrian Chadd * Restart TX DMA for the given TXQ. 892eb6f0de0SAdrian Chadd * 893eb6f0de0SAdrian Chadd * This must be called whether the queue is empty or not. 894eb6f0de0SAdrian Chadd */ 895746bab5bSAdrian Chadd static void 896746bab5bSAdrian Chadd ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq) 897eb6f0de0SAdrian Chadd { 898b1f3262cSAdrian Chadd struct ath_buf *bf, *bf_last; 899eb6f0de0SAdrian Chadd 900b837332dSAdrian Chadd ATH_TXQ_LOCK_ASSERT(txq); 901eb6f0de0SAdrian Chadd 902b1f3262cSAdrian Chadd /* XXX make this ATH_TXQ_FIRST */ 903eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&txq->axq_q); 904b1f3262cSAdrian Chadd bf_last = ATH_TXQ_LAST(txq, axq_q_s); 905b1f3262cSAdrian Chadd 906eb6f0de0SAdrian Chadd if (bf == NULL) 907eb6f0de0SAdrian Chadd return; 908eb6f0de0SAdrian Chadd 9099be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_RESET, 9109be82a42SAdrian Chadd "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n", 9119be82a42SAdrian Chadd __func__, 9129be82a42SAdrian Chadd txq->axq_qnum, 9139be82a42SAdrian Chadd bf, 9149be82a42SAdrian Chadd bf_last, 9159be82a42SAdrian Chadd (uint32_t) bf->bf_daddr); 9169be82a42SAdrian Chadd 9176112d22cSAdrian Chadd #ifdef ATH_DEBUG 9189be82a42SAdrian Chadd if (sc->sc_debug & ATH_DEBUG_RESET) 9199be82a42SAdrian Chadd ath_tx_dump(sc, txq); 9206112d22cSAdrian Chadd #endif 9219be82a42SAdrian Chadd 9229be82a42SAdrian Chadd /* 9239be82a42SAdrian Chadd * This is called from a restart, so DMA is known to be 9249be82a42SAdrian Chadd * completely stopped. 9259be82a42SAdrian Chadd */ 9269be82a42SAdrian Chadd KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)), 9279be82a42SAdrian Chadd ("%s: Q%d: called with PUTRUNNING=1\n", 9289be82a42SAdrian Chadd __func__, 9299be82a42SAdrian Chadd txq->axq_qnum)); 9309be82a42SAdrian Chadd 9319be82a42SAdrian Chadd ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr); 9329be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING; 9339be82a42SAdrian Chadd 9346112d22cSAdrian Chadd ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds, 9356112d22cSAdrian Chadd &txq->axq_link); 9366112d22cSAdrian Chadd ath_hal_txstart(sc->sc_ah, txq->axq_qnum); 937eb6f0de0SAdrian Chadd } 938eb6f0de0SAdrian Chadd 939eb6f0de0SAdrian Chadd /* 940eb6f0de0SAdrian Chadd * Hand off a packet to the hardware (or mcast queue.) 941eb6f0de0SAdrian Chadd * 942eb6f0de0SAdrian Chadd * The relevant hardware txq should be locked. 943eb6f0de0SAdrian Chadd */ 944eb6f0de0SAdrian Chadd static void 945746bab5bSAdrian Chadd ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq, 946746bab5bSAdrian Chadd struct ath_buf *bf) 947eb6f0de0SAdrian Chadd { 948375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 949eb6f0de0SAdrian Chadd 950bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 951bb327d28SAdrian Chadd if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC)) 952bb327d28SAdrian Chadd ath_tx_alq_post(sc, bf); 953bb327d28SAdrian Chadd #endif 954bb327d28SAdrian Chadd 955eb6f0de0SAdrian Chadd if (txq->axq_qnum == ATH_TXQ_SWQ) 956eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(sc, txq, bf); 957eb6f0de0SAdrian Chadd else 958eb6f0de0SAdrian Chadd ath_tx_handoff_hw(sc, txq, bf); 959b8e788a5SAdrian Chadd } 960b8e788a5SAdrian Chadd 96181a82688SAdrian Chadd static int 96281a82688SAdrian Chadd ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni, 963d4365d16SAdrian Chadd struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen, 964d4365d16SAdrian Chadd int *keyix) 96581a82688SAdrian Chadd { 96612be5b9cSAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 96712be5b9cSAdrian Chadd "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n", 96812be5b9cSAdrian Chadd __func__, 96912be5b9cSAdrian Chadd *hdrlen, 97012be5b9cSAdrian Chadd *pktlen, 97112be5b9cSAdrian Chadd isfrag, 97212be5b9cSAdrian Chadd iswep, 97312be5b9cSAdrian Chadd m0); 97412be5b9cSAdrian Chadd 97581a82688SAdrian Chadd if (iswep) { 97681a82688SAdrian Chadd const struct ieee80211_cipher *cip; 97781a82688SAdrian Chadd struct ieee80211_key *k; 97881a82688SAdrian Chadd 97981a82688SAdrian Chadd /* 98081a82688SAdrian Chadd * Construct the 802.11 header+trailer for an encrypted 98181a82688SAdrian Chadd * frame. The only reason this can fail is because of an 98281a82688SAdrian Chadd * unknown or unsupported cipher/key type. 98381a82688SAdrian Chadd */ 98481a82688SAdrian Chadd k = ieee80211_crypto_encap(ni, m0); 98581a82688SAdrian Chadd if (k == NULL) { 98681a82688SAdrian Chadd /* 98781a82688SAdrian Chadd * This can happen when the key is yanked after the 98881a82688SAdrian Chadd * frame was queued. Just discard the frame; the 98981a82688SAdrian Chadd * 802.11 layer counts failures and provides 99081a82688SAdrian Chadd * debugging/diagnostics. 99181a82688SAdrian Chadd */ 992d4365d16SAdrian Chadd return (0); 99381a82688SAdrian Chadd } 99481a82688SAdrian Chadd /* 99581a82688SAdrian Chadd * Adjust the packet + header lengths for the crypto 99681a82688SAdrian Chadd * additions and calculate the h/w key index. When 99781a82688SAdrian Chadd * a s/w mic is done the frame will have had any mic 99881a82688SAdrian Chadd * added to it prior to entry so m0->m_pkthdr.len will 99981a82688SAdrian Chadd * account for it. Otherwise we need to add it to the 100081a82688SAdrian Chadd * packet length. 100181a82688SAdrian Chadd */ 100281a82688SAdrian Chadd cip = k->wk_cipher; 100381a82688SAdrian Chadd (*hdrlen) += cip->ic_header; 100481a82688SAdrian Chadd (*pktlen) += cip->ic_header + cip->ic_trailer; 100581a82688SAdrian Chadd /* NB: frags always have any TKIP MIC done in s/w */ 100681a82688SAdrian Chadd if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag) 100781a82688SAdrian Chadd (*pktlen) += cip->ic_miclen; 100881a82688SAdrian Chadd (*keyix) = k->wk_keyix; 100981a82688SAdrian Chadd } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) { 101081a82688SAdrian Chadd /* 101181a82688SAdrian Chadd * Use station key cache slot, if assigned. 101281a82688SAdrian Chadd */ 101381a82688SAdrian Chadd (*keyix) = ni->ni_ucastkey.wk_keyix; 101481a82688SAdrian Chadd if ((*keyix) == IEEE80211_KEYIX_NONE) 101581a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 101681a82688SAdrian Chadd } else 101781a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 101881a82688SAdrian Chadd 1019d4365d16SAdrian Chadd return (1); 102081a82688SAdrian Chadd } 102181a82688SAdrian Chadd 1022e2e4a2c2SAdrian Chadd /* 1023e2e4a2c2SAdrian Chadd * Calculate whether interoperability protection is required for 1024e2e4a2c2SAdrian Chadd * this frame. 1025e2e4a2c2SAdrian Chadd * 1026e2e4a2c2SAdrian Chadd * This requires the rate control information be filled in, 1027e2e4a2c2SAdrian Chadd * as the protection requirement depends upon the current 1028e2e4a2c2SAdrian Chadd * operating mode / PHY. 1029e2e4a2c2SAdrian Chadd */ 1030e2e4a2c2SAdrian Chadd static void 1031e2e4a2c2SAdrian Chadd ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf) 1032e2e4a2c2SAdrian Chadd { 1033e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1034e2e4a2c2SAdrian Chadd uint8_t rix; 1035e2e4a2c2SAdrian Chadd uint16_t flags; 1036e2e4a2c2SAdrian Chadd int shortPreamble; 1037e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 10387a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic; 1039e2e4a2c2SAdrian Chadd 1040e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1041e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1042e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1043e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1044e2e4a2c2SAdrian Chadd 1045e2e4a2c2SAdrian Chadd /* 1046e2e4a2c2SAdrian Chadd * If 802.11g protection is enabled, determine whether 1047e2e4a2c2SAdrian Chadd * to use RTS/CTS or just CTS. Note that this is only 1048e2e4a2c2SAdrian Chadd * done for OFDM unicast frames. 1049e2e4a2c2SAdrian Chadd */ 1050e2e4a2c2SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1051e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_OFDM && 1052e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1053e2e4a2c2SAdrian Chadd bf->bf_state.bfs_doprot = 1; 1054e2e4a2c2SAdrian Chadd /* XXX fragments must use CCK rates w/ protection */ 1055e2e4a2c2SAdrian Chadd if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1056e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1057e2e4a2c2SAdrian Chadd } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1058e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 1059e2e4a2c2SAdrian Chadd } 1060e2e4a2c2SAdrian Chadd /* 1061e2e4a2c2SAdrian Chadd * For frags it would be desirable to use the 1062e2e4a2c2SAdrian Chadd * highest CCK rate for RTS/CTS. But stations 1063e2e4a2c2SAdrian Chadd * farther away may detect it at a lower CCK rate 1064e2e4a2c2SAdrian Chadd * so use the configured protection rate instead 1065e2e4a2c2SAdrian Chadd * (for now). 1066e2e4a2c2SAdrian Chadd */ 1067e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_protect++; 1068e2e4a2c2SAdrian Chadd } 1069e2e4a2c2SAdrian Chadd 1070e2e4a2c2SAdrian Chadd /* 1071e2e4a2c2SAdrian Chadd * If 11n protection is enabled and it's a HT frame, 1072e2e4a2c2SAdrian Chadd * enable RTS. 1073e2e4a2c2SAdrian Chadd * 1074e2e4a2c2SAdrian Chadd * XXX ic_htprotmode or ic_curhtprotmode? 1075e2e4a2c2SAdrian Chadd * XXX should it_htprotmode only matter if ic_curhtprotmode 1076e2e4a2c2SAdrian Chadd * XXX indicates it's not a HT pure environment? 1077e2e4a2c2SAdrian Chadd */ 1078e2e4a2c2SAdrian Chadd if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) && 1079e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_HT && 1080e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1081e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1082e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_htprotect++; 1083e2e4a2c2SAdrian Chadd } 1084e2e4a2c2SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1085e2e4a2c2SAdrian Chadd } 1086e2e4a2c2SAdrian Chadd 1087e2e4a2c2SAdrian Chadd /* 1088e2e4a2c2SAdrian Chadd * Update the frame duration given the currently selected rate. 1089e2e4a2c2SAdrian Chadd * 1090e2e4a2c2SAdrian Chadd * This also updates the frame duration value, so it will require 1091e2e4a2c2SAdrian Chadd * a DMA flush. 1092e2e4a2c2SAdrian Chadd */ 1093e2e4a2c2SAdrian Chadd static void 1094e2e4a2c2SAdrian Chadd ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf) 1095e2e4a2c2SAdrian Chadd { 1096e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1097e2e4a2c2SAdrian Chadd uint8_t rix; 1098e2e4a2c2SAdrian Chadd uint16_t flags; 1099e2e4a2c2SAdrian Chadd int shortPreamble; 1100e2e4a2c2SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1101e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1102e2e4a2c2SAdrian Chadd int isfrag = bf->bf_m->m_flags & M_FRAG; 1103e2e4a2c2SAdrian Chadd 1104e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1105e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1106e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1107e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1108e2e4a2c2SAdrian Chadd 1109e2e4a2c2SAdrian Chadd /* 1110e2e4a2c2SAdrian Chadd * Calculate duration. This logically belongs in the 802.11 1111e2e4a2c2SAdrian Chadd * layer but it lacks sufficient information to calculate it. 1112e2e4a2c2SAdrian Chadd */ 1113e2e4a2c2SAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0 && 1114e2e4a2c2SAdrian Chadd (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 1115e2e4a2c2SAdrian Chadd u_int16_t dur; 1116e2e4a2c2SAdrian Chadd if (shortPreamble) 1117e2e4a2c2SAdrian Chadd dur = rt->info[rix].spAckDuration; 1118e2e4a2c2SAdrian Chadd else 1119e2e4a2c2SAdrian Chadd dur = rt->info[rix].lpAckDuration; 1120e2e4a2c2SAdrian Chadd if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) { 1121e2e4a2c2SAdrian Chadd dur += dur; /* additional SIFS+ACK */ 1122e2e4a2c2SAdrian Chadd /* 1123e2e4a2c2SAdrian Chadd * Include the size of next fragment so NAV is 1124e2e4a2c2SAdrian Chadd * updated properly. The last fragment uses only 1125e2e4a2c2SAdrian Chadd * the ACK duration 11269572684aSAdrian Chadd * 11279572684aSAdrian Chadd * XXX TODO: ensure that the rate lookup for each 11289572684aSAdrian Chadd * fragment is the same as the rate used by the 11299572684aSAdrian Chadd * first fragment! 1130e2e4a2c2SAdrian Chadd */ 1131cd7dffd0SAdrian Chadd dur += ath_hal_computetxtime(ah, 1132cd7dffd0SAdrian Chadd rt, 1133cd7dffd0SAdrian Chadd bf->bf_nextfraglen, 1134*7ff1939dSAdrian Chadd rix, shortPreamble, 1135*7ff1939dSAdrian Chadd AH_TRUE); 1136e2e4a2c2SAdrian Chadd } 1137e2e4a2c2SAdrian Chadd if (isfrag) { 1138e2e4a2c2SAdrian Chadd /* 1139e2e4a2c2SAdrian Chadd * Force hardware to use computed duration for next 1140e2e4a2c2SAdrian Chadd * fragment by disabling multi-rate retry which updates 1141e2e4a2c2SAdrian Chadd * duration based on the multi-rate duration table. 1142e2e4a2c2SAdrian Chadd */ 1143e2e4a2c2SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1144e2e4a2c2SAdrian Chadd bf->bf_state.bfs_try0 = ATH_TXMGTTRY; 1145e2e4a2c2SAdrian Chadd /* XXX update bfs_rc[0].try? */ 1146e2e4a2c2SAdrian Chadd } 1147e2e4a2c2SAdrian Chadd 1148e2e4a2c2SAdrian Chadd /* Update the duration field itself */ 1149e2e4a2c2SAdrian Chadd *(u_int16_t *)wh->i_dur = htole16(dur); 1150e2e4a2c2SAdrian Chadd } 1151e2e4a2c2SAdrian Chadd } 1152e2e4a2c2SAdrian Chadd 1153e42b5dbaSAdrian Chadd static uint8_t 1154e42b5dbaSAdrian Chadd ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt, 1155eb6f0de0SAdrian Chadd int cix, int shortPreamble) 115679f02dbfSAdrian Chadd { 1157e42b5dbaSAdrian Chadd uint8_t ctsrate; 1158e42b5dbaSAdrian Chadd 115979f02dbfSAdrian Chadd /* 116079f02dbfSAdrian Chadd * CTS transmit rate is derived from the transmit rate 116179f02dbfSAdrian Chadd * by looking in the h/w rate table. We must also factor 116279f02dbfSAdrian Chadd * in whether or not a short preamble is to be used. 116379f02dbfSAdrian Chadd */ 116479f02dbfSAdrian Chadd /* NB: cix is set above where RTS/CTS is enabled */ 116579f02dbfSAdrian Chadd KASSERT(cix != 0xff, ("cix not setup")); 1166e42b5dbaSAdrian Chadd ctsrate = rt->info[cix].rateCode; 1167e42b5dbaSAdrian Chadd 1168e42b5dbaSAdrian Chadd /* XXX this should only matter for legacy rates */ 1169e42b5dbaSAdrian Chadd if (shortPreamble) 1170e42b5dbaSAdrian Chadd ctsrate |= rt->info[cix].shortPreamble; 1171e42b5dbaSAdrian Chadd 1172d4365d16SAdrian Chadd return (ctsrate); 1173e42b5dbaSAdrian Chadd } 1174e42b5dbaSAdrian Chadd 1175e42b5dbaSAdrian Chadd /* 1176e42b5dbaSAdrian Chadd * Calculate the RTS/CTS duration for legacy frames. 1177e42b5dbaSAdrian Chadd */ 1178e42b5dbaSAdrian Chadd static int 1179e42b5dbaSAdrian Chadd ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix, 1180e42b5dbaSAdrian Chadd int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt, 1181e42b5dbaSAdrian Chadd int flags) 1182e42b5dbaSAdrian Chadd { 1183e42b5dbaSAdrian Chadd int ctsduration = 0; 1184e42b5dbaSAdrian Chadd 1185e42b5dbaSAdrian Chadd /* This mustn't be called for HT modes */ 1186e42b5dbaSAdrian Chadd if (rt->info[cix].phy == IEEE80211_T_HT) { 1187e42b5dbaSAdrian Chadd printf("%s: HT rate where it shouldn't be (0x%x)\n", 1188e42b5dbaSAdrian Chadd __func__, rt->info[cix].rateCode); 1189d4365d16SAdrian Chadd return (-1); 1190e42b5dbaSAdrian Chadd } 1191e42b5dbaSAdrian Chadd 119279f02dbfSAdrian Chadd /* 119379f02dbfSAdrian Chadd * Compute the transmit duration based on the frame 119479f02dbfSAdrian Chadd * size and the size of an ACK frame. We call into the 119579f02dbfSAdrian Chadd * HAL to do the computation since it depends on the 119679f02dbfSAdrian Chadd * characteristics of the actual PHY being used. 119779f02dbfSAdrian Chadd * 119879f02dbfSAdrian Chadd * NB: CTS is assumed the same size as an ACK so we can 119979f02dbfSAdrian Chadd * use the precalculated ACK durations. 120079f02dbfSAdrian Chadd */ 120179f02dbfSAdrian Chadd if (shortPreamble) { 120279f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1203e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].spAckDuration; 1204e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 1205*7ff1939dSAdrian Chadd rt, pktlen, rix, AH_TRUE, AH_TRUE); 120679f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1207e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].spAckDuration; 120879f02dbfSAdrian Chadd } else { 120979f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1210e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].lpAckDuration; 1211e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 1212*7ff1939dSAdrian Chadd rt, pktlen, rix, AH_FALSE, AH_TRUE); 121379f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1214e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].lpAckDuration; 121579f02dbfSAdrian Chadd } 1216e42b5dbaSAdrian Chadd 1217d4365d16SAdrian Chadd return (ctsduration); 121879f02dbfSAdrian Chadd } 121979f02dbfSAdrian Chadd 1220eb6f0de0SAdrian Chadd /* 1221eb6f0de0SAdrian Chadd * Update the given ath_buf with updated rts/cts setup and duration 1222eb6f0de0SAdrian Chadd * values. 1223eb6f0de0SAdrian Chadd * 1224eb6f0de0SAdrian Chadd * To support rate lookups for each software retry, the rts/cts rate 1225eb6f0de0SAdrian Chadd * and cts duration must be re-calculated. 1226eb6f0de0SAdrian Chadd * 1227eb6f0de0SAdrian Chadd * This function assumes the RTS/CTS flags have been set as needed; 1228eb6f0de0SAdrian Chadd * mrr has been disabled; and the rate control lookup has been done. 1229eb6f0de0SAdrian Chadd * 1230eb6f0de0SAdrian Chadd * XXX TODO: MRR need only be disabled for the pre-11n NICs. 1231eb6f0de0SAdrian Chadd * XXX The 11n NICs support per-rate RTS/CTS configuration. 1232eb6f0de0SAdrian Chadd */ 1233eb6f0de0SAdrian Chadd static void 1234eb6f0de0SAdrian Chadd ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf) 1235eb6f0de0SAdrian Chadd { 1236eb6f0de0SAdrian Chadd uint16_t ctsduration = 0; 1237eb6f0de0SAdrian Chadd uint8_t ctsrate = 0; 1238eb6f0de0SAdrian Chadd uint8_t rix = bf->bf_state.bfs_rc[0].rix; 1239eb6f0de0SAdrian Chadd uint8_t cix = 0; 1240eb6f0de0SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1241eb6f0de0SAdrian Chadd 1242eb6f0de0SAdrian Chadd /* 1243eb6f0de0SAdrian Chadd * No RTS/CTS enabled? Don't bother. 1244eb6f0de0SAdrian Chadd */ 1245875a9451SAdrian Chadd if ((bf->bf_state.bfs_txflags & 1246eb6f0de0SAdrian Chadd (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) { 1247eb6f0de0SAdrian Chadd /* XXX is this really needed? */ 1248eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 1249eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1250eb6f0de0SAdrian Chadd return; 1251eb6f0de0SAdrian Chadd } 1252eb6f0de0SAdrian Chadd 1253eb6f0de0SAdrian Chadd /* 1254eb6f0de0SAdrian Chadd * If protection is enabled, use the protection rix control 1255eb6f0de0SAdrian Chadd * rate. Otherwise use the rate0 control rate. 1256eb6f0de0SAdrian Chadd */ 1257eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_doprot) 1258eb6f0de0SAdrian Chadd rix = sc->sc_protrix; 1259eb6f0de0SAdrian Chadd else 1260eb6f0de0SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1261eb6f0de0SAdrian Chadd 1262eb6f0de0SAdrian Chadd /* 1263eb6f0de0SAdrian Chadd * If the raw path has hard-coded ctsrate0 to something, 1264eb6f0de0SAdrian Chadd * use it. 1265eb6f0de0SAdrian Chadd */ 1266eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ctsrate0 != 0) 1267eb6f0de0SAdrian Chadd cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0); 1268eb6f0de0SAdrian Chadd else 1269eb6f0de0SAdrian Chadd /* Control rate from above */ 1270eb6f0de0SAdrian Chadd cix = rt->info[rix].controlRate; 1271eb6f0de0SAdrian Chadd 1272eb6f0de0SAdrian Chadd /* Calculate the rtscts rate for the given cix */ 1273eb6f0de0SAdrian Chadd ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix, 1274eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream); 1275eb6f0de0SAdrian Chadd 1276eb6f0de0SAdrian Chadd /* The 11n chipsets do ctsduration calculations for you */ 1277eb6f0de0SAdrian Chadd if (! ath_tx_is_11n(sc)) 1278eb6f0de0SAdrian Chadd ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix, 1279eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen, 1280875a9451SAdrian Chadd rt, bf->bf_state.bfs_txflags); 1281eb6f0de0SAdrian Chadd 1282eb6f0de0SAdrian Chadd /* Squirrel away in ath_buf */ 1283eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = ctsrate; 1284eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = ctsduration; 1285eb6f0de0SAdrian Chadd 1286eb6f0de0SAdrian Chadd /* 1287eb6f0de0SAdrian Chadd * Must disable multi-rate retry when using RTS/CTS. 1288eb6f0de0SAdrian Chadd */ 1289af017101SAdrian Chadd if (!sc->sc_mrrprot) { 1290eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1291eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = 1292eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */ 1293eb6f0de0SAdrian Chadd } 1294af017101SAdrian Chadd } 1295eb6f0de0SAdrian Chadd 1296eb6f0de0SAdrian Chadd /* 1297eb6f0de0SAdrian Chadd * Setup the descriptor chain for a normal or fast-frame 1298eb6f0de0SAdrian Chadd * frame. 129946634305SAdrian Chadd * 130046634305SAdrian Chadd * XXX TODO: extend to include the destination hardware QCU ID. 130146634305SAdrian Chadd * Make sure that is correct. Make sure that when being added 130246634305SAdrian Chadd * to the mcastq, the CABQ QCUID is set or things will get a bit 130346634305SAdrian Chadd * odd. 1304eb6f0de0SAdrian Chadd */ 1305eb6f0de0SAdrian Chadd static void 1306eb6f0de0SAdrian Chadd ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf) 1307eb6f0de0SAdrian Chadd { 1308eb6f0de0SAdrian Chadd struct ath_desc *ds = bf->bf_desc; 1309eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1310eb6f0de0SAdrian Chadd 13117d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 131283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 131383bbd5ebSRui Paulo "%s: bf=%p, txrate0=%d\n", __func__, bf, 0); 13147d9dd2acSAdrian Chadd 1315eb6f0de0SAdrian Chadd ath_hal_setuptxdesc(ah, ds 1316eb6f0de0SAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 1317eb6f0de0SAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 1318eb6f0de0SAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 1319eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 1320eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txrate0 1321eb6f0de0SAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 1322eb6f0de0SAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 1323eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 1324875a9451SAdrian Chadd , bf->bf_state.bfs_txflags /* flags */ 1325eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 1326eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 1327eb6f0de0SAdrian Chadd ); 1328eb6f0de0SAdrian Chadd 1329eb6f0de0SAdrian Chadd /* 1330eb6f0de0SAdrian Chadd * This will be overriden when the descriptor chain is written. 1331eb6f0de0SAdrian Chadd */ 1332eb6f0de0SAdrian Chadd bf->bf_lastds = ds; 1333eb6f0de0SAdrian Chadd bf->bf_last = bf; 1334eb6f0de0SAdrian Chadd 1335d34a7347SAdrian Chadd /* Set rate control and descriptor chain for this frame */ 1336d34a7347SAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 13376e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0); 1338eb6f0de0SAdrian Chadd } 1339eb6f0de0SAdrian Chadd 1340eb6f0de0SAdrian Chadd /* 1341eb6f0de0SAdrian Chadd * Do a rate lookup. 1342eb6f0de0SAdrian Chadd * 1343eb6f0de0SAdrian Chadd * This performs a rate lookup for the given ath_buf only if it's required. 1344eb6f0de0SAdrian Chadd * Non-data frames and raw frames don't require it. 1345eb6f0de0SAdrian Chadd * 1346eb6f0de0SAdrian Chadd * This populates the primary and MRR entries; MRR values are 1347eb6f0de0SAdrian Chadd * then disabled later on if something requires it (eg RTS/CTS on 1348eb6f0de0SAdrian Chadd * pre-11n chipsets. 1349eb6f0de0SAdrian Chadd * 1350eb6f0de0SAdrian Chadd * This needs to be done before the RTS/CTS fields are calculated 1351eb6f0de0SAdrian Chadd * as they may depend upon the rate chosen. 1352eb6f0de0SAdrian Chadd */ 1353eb6f0de0SAdrian Chadd static void 1354eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf) 1355eb6f0de0SAdrian Chadd { 1356eb6f0de0SAdrian Chadd uint8_t rate, rix; 1357eb6f0de0SAdrian Chadd int try0; 1358eb6f0de0SAdrian Chadd 1359eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_doratelookup) 1360eb6f0de0SAdrian Chadd return; 1361eb6f0de0SAdrian Chadd 1362eb6f0de0SAdrian Chadd /* Get rid of any previous state */ 1363eb6f0de0SAdrian Chadd bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1364eb6f0de0SAdrian Chadd 1365eb6f0de0SAdrian Chadd ATH_NODE_LOCK(ATH_NODE(bf->bf_node)); 1366eb6f0de0SAdrian Chadd ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream, 1367eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, &rix, &try0, &rate); 1368eb6f0de0SAdrian Chadd 1369eb6f0de0SAdrian Chadd /* In case MRR is disabled, make sure rc[0] is setup correctly */ 1370eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1371eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = rate; 1372eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1373eb6f0de0SAdrian Chadd 1374eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY) 1375eb6f0de0SAdrian Chadd ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix, 1376eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc); 1377eb6f0de0SAdrian Chadd ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node)); 1378eb6f0de0SAdrian Chadd 1379eb6f0de0SAdrian Chadd sc->sc_txrix = rix; /* for LED blinking */ 1380eb6f0de0SAdrian Chadd sc->sc_lastdatarix = rix; /* for fast frames */ 1381eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1382eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = rate; 1383eb6f0de0SAdrian Chadd } 1384eb6f0de0SAdrian Chadd 1385eb6f0de0SAdrian Chadd /* 13860c54de88SAdrian Chadd * Update the CLRDMASK bit in the ath_buf if it needs to be set. 13870c54de88SAdrian Chadd */ 13880c54de88SAdrian Chadd static void 13890c54de88SAdrian Chadd ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid, 13900c54de88SAdrian Chadd struct ath_buf *bf) 13910c54de88SAdrian Chadd { 13924f25ddbbSAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 13930c54de88SAdrian Chadd 1394375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 13950c54de88SAdrian Chadd 13964f25ddbbSAdrian Chadd if (an->clrdmask == 1) { 13970c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 13984f25ddbbSAdrian Chadd an->clrdmask = 0; 13990c54de88SAdrian Chadd } 14000c54de88SAdrian Chadd } 14010c54de88SAdrian Chadd 14020c54de88SAdrian Chadd /* 140322a3aee6SAdrian Chadd * Return whether this frame should be software queued or 140422a3aee6SAdrian Chadd * direct dispatched. 140522a3aee6SAdrian Chadd * 140622a3aee6SAdrian Chadd * When doing powersave, BAR frames should be queued but other management 140722a3aee6SAdrian Chadd * frames should be directly sent. 140822a3aee6SAdrian Chadd * 140922a3aee6SAdrian Chadd * When not doing powersave, stick BAR frames into the hardware queue 141022a3aee6SAdrian Chadd * so it goes out even though the queue is paused. 141122a3aee6SAdrian Chadd * 141222a3aee6SAdrian Chadd * For now, management frames are also software queued by default. 141322a3aee6SAdrian Chadd */ 141422a3aee6SAdrian Chadd static int 141522a3aee6SAdrian Chadd ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an, 141622a3aee6SAdrian Chadd struct mbuf *m0, int *queue_to_head) 141722a3aee6SAdrian Chadd { 141822a3aee6SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 141922a3aee6SAdrian Chadd struct ieee80211_frame *wh; 142022a3aee6SAdrian Chadd uint8_t type, subtype; 142122a3aee6SAdrian Chadd 142222a3aee6SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 142322a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 142422a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 142522a3aee6SAdrian Chadd 142622a3aee6SAdrian Chadd (*queue_to_head) = 0; 142722a3aee6SAdrian Chadd 142822a3aee6SAdrian Chadd /* If it's not in powersave - direct-dispatch BAR */ 142922a3aee6SAdrian Chadd if ((ATH_NODE(ni)->an_is_powersave == 0) 143022a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 143122a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 143222a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 143322a3aee6SAdrian Chadd "%s: BAR: TX'ing direct\n", __func__); 143422a3aee6SAdrian Chadd return (0); 143522a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 143622a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 143722a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 143822a3aee6SAdrian Chadd /* BAR TX whilst asleep; queue */ 143922a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 144022a3aee6SAdrian Chadd "%s: swq: TX'ing\n", __func__); 144122a3aee6SAdrian Chadd (*queue_to_head) = 1; 144222a3aee6SAdrian Chadd return (1); 144322a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 144422a3aee6SAdrian Chadd && (type == IEEE80211_FC0_TYPE_MGT || 144522a3aee6SAdrian Chadd type == IEEE80211_FC0_TYPE_CTL)) { 144622a3aee6SAdrian Chadd /* 144722a3aee6SAdrian Chadd * Other control/mgmt frame; bypass software queuing 144822a3aee6SAdrian Chadd * for now! 144922a3aee6SAdrian Chadd */ 145083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 145122a3aee6SAdrian Chadd "%s: %6D: Node is asleep; sending mgmt " 145222a3aee6SAdrian Chadd "(type=%d, subtype=%d)\n", 145383bbd5ebSRui Paulo __func__, ni->ni_macaddr, ":", type, subtype); 145422a3aee6SAdrian Chadd return (0); 145522a3aee6SAdrian Chadd } else { 145622a3aee6SAdrian Chadd return (1); 145722a3aee6SAdrian Chadd } 145822a3aee6SAdrian Chadd } 145922a3aee6SAdrian Chadd 146022a3aee6SAdrian Chadd 146122a3aee6SAdrian Chadd /* 1462eb6f0de0SAdrian Chadd * Transmit the given frame to the hardware. 1463eb6f0de0SAdrian Chadd * 1464eb6f0de0SAdrian Chadd * The frame must already be setup; rate control must already have 1465eb6f0de0SAdrian Chadd * been done. 1466eb6f0de0SAdrian Chadd * 1467eb6f0de0SAdrian Chadd * XXX since the TXQ lock is being held here (and I dislike holding 1468eb6f0de0SAdrian Chadd * it for this long when not doing software aggregation), later on 1469eb6f0de0SAdrian Chadd * break this function into "setup_normal" and "xmit_normal". The 1470eb6f0de0SAdrian Chadd * lock only needs to be held for the ath_tx_handoff call. 147122a3aee6SAdrian Chadd * 147222a3aee6SAdrian Chadd * XXX we don't update the leak count here - if we're doing 147322a3aee6SAdrian Chadd * direct frame dispatch, we need to be able to do it without 147422a3aee6SAdrian Chadd * decrementing the leak count (eg multicast queue frames.) 1475eb6f0de0SAdrian Chadd */ 1476eb6f0de0SAdrian Chadd static void 1477eb6f0de0SAdrian Chadd ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq, 1478eb6f0de0SAdrian Chadd struct ath_buf *bf) 1479eb6f0de0SAdrian Chadd { 14800c54de88SAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 14810c54de88SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 1482eb6f0de0SAdrian Chadd 1483375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1484eb6f0de0SAdrian Chadd 14850c54de88SAdrian Chadd /* 14860c54de88SAdrian Chadd * For now, just enable CLRDMASK. ath_tx_xmit_normal() does 14870c54de88SAdrian Chadd * set a completion handler however it doesn't (yet) properly 14880c54de88SAdrian Chadd * handle the strict ordering requirements needed for normal, 14890c54de88SAdrian Chadd * non-aggregate session frames. 14900c54de88SAdrian Chadd * 14910c54de88SAdrian Chadd * Once this is implemented, only set CLRDMASK like this for 14920c54de88SAdrian Chadd * frames that must go out - eg management/raw frames. 14930c54de88SAdrian Chadd */ 14940c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 14950c54de88SAdrian Chadd 1496eb6f0de0SAdrian Chadd /* Setup the descriptor before handoff */ 1497eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 1498e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 1499e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 1500eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 1501e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 1502eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 1503eb6f0de0SAdrian Chadd 15040c54de88SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 15050c54de88SAdrian Chadd tid->hwq_depth++; 15060c54de88SAdrian Chadd 15070c54de88SAdrian Chadd /* Assign the completion handler */ 15080c54de88SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 15094e81f27cSAdrian Chadd 1510eb6f0de0SAdrian Chadd /* Hand off to hardware */ 1511eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 1512eb6f0de0SAdrian Chadd } 1513eb6f0de0SAdrian Chadd 1514d05b576dSAdrian Chadd /* 1515d05b576dSAdrian Chadd * Do the basic frame setup stuff that's required before the frame 1516d05b576dSAdrian Chadd * is added to a software queue. 1517d05b576dSAdrian Chadd * 1518d05b576dSAdrian Chadd * All frames get mostly the same treatment and it's done once. 1519d05b576dSAdrian Chadd * Retransmits fiddle with things like the rate control setup, 1520d05b576dSAdrian Chadd * setting the retransmit bit in the packet; doing relevant DMA/bus 1521d05b576dSAdrian Chadd * syncing and relinking it (back) into the hardware TX queue. 1522d05b576dSAdrian Chadd * 1523d05b576dSAdrian Chadd * Note that this may cause the mbuf to be reallocated, so 1524d05b576dSAdrian Chadd * m0 may not be valid. 1525d05b576dSAdrian Chadd */ 1526eb6f0de0SAdrian Chadd static int 1527eb6f0de0SAdrian Chadd ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni, 1528b43facbfSAdrian Chadd struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq) 1529b8e788a5SAdrian Chadd { 1530b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 1531b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 15327a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic; 1533b8e788a5SAdrian Chadd const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams; 1534b8e788a5SAdrian Chadd int error, iswep, ismcast, isfrag, ismrr; 1535eb6f0de0SAdrian Chadd int keyix, hdrlen, pktlen, try0 = 0; 1536eb6f0de0SAdrian Chadd u_int8_t rix = 0, txrate = 0; 1537b8e788a5SAdrian Chadd struct ath_desc *ds; 1538b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 1539eb6f0de0SAdrian Chadd u_int subtype, flags; 1540b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 1541b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 1542b8e788a5SAdrian Chadd HAL_BOOL shortPreamble; 1543b8e788a5SAdrian Chadd struct ath_node *an; 1544b8e788a5SAdrian Chadd u_int pri; 1545b8e788a5SAdrian Chadd 15467561cb5cSAdrian Chadd /* 15477561cb5cSAdrian Chadd * To ensure that both sequence numbers and the CCMP PN handling 15487561cb5cSAdrian Chadd * is "correct", make sure that the relevant TID queue is locked. 15497561cb5cSAdrian Chadd * Otherwise the CCMP PN and seqno may appear out of order, causing 15507561cb5cSAdrian Chadd * re-ordered frames to have out of order CCMP PN's, resulting 15517561cb5cSAdrian Chadd * in many, many frame drops. 15527561cb5cSAdrian Chadd */ 1553375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 15547561cb5cSAdrian Chadd 1555b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 15565945b5f5SKevin Lo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1557b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1558b8e788a5SAdrian Chadd isfrag = m0->m_flags & M_FRAG; 1559b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 1560b8e788a5SAdrian Chadd /* 1561b8e788a5SAdrian Chadd * Packet length must not include any 1562b8e788a5SAdrian Chadd * pad bytes; deduct them here. 1563b8e788a5SAdrian Chadd */ 1564b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3); 1565b8e788a5SAdrian Chadd 156681a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 1567eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen, 1568eb6f0de0SAdrian Chadd &pktlen, &keyix)) { 1569d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 1570b8e788a5SAdrian Chadd return EIO; 1571b8e788a5SAdrian Chadd } 1572b8e788a5SAdrian Chadd 1573b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 1574b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1575b8e788a5SAdrian Chadd 1576b8e788a5SAdrian Chadd pktlen += IEEE80211_CRC_LEN; 1577b8e788a5SAdrian Chadd 1578b8e788a5SAdrian Chadd /* 1579b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 1580b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 1581b8e788a5SAdrian Chadd */ 1582b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 1583b8e788a5SAdrian Chadd if (error != 0) 1584b8e788a5SAdrian Chadd return error; 1585f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 1586b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 1587b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 1588b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1589b8e788a5SAdrian Chadd 1590b8e788a5SAdrian Chadd /* setup descriptors */ 1591b8e788a5SAdrian Chadd ds = bf->bf_desc; 1592b8e788a5SAdrian Chadd rt = sc->sc_currates; 1593b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1594b8e788a5SAdrian Chadd 1595b8e788a5SAdrian Chadd /* 1596b8e788a5SAdrian Chadd * NB: the 802.11 layer marks whether or not we should 1597b8e788a5SAdrian Chadd * use short preamble based on the current mode and 1598b8e788a5SAdrian Chadd * negotiated parameters. 1599b8e788a5SAdrian Chadd */ 1600b8e788a5SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1601b8e788a5SAdrian Chadd (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 1602b8e788a5SAdrian Chadd shortPreamble = AH_TRUE; 1603b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_shortpre++; 1604b8e788a5SAdrian Chadd } else { 1605b8e788a5SAdrian Chadd shortPreamble = AH_FALSE; 1606b8e788a5SAdrian Chadd } 1607b8e788a5SAdrian Chadd 1608b8e788a5SAdrian Chadd an = ATH_NODE(ni); 16094e81f27cSAdrian Chadd //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 16104e81f27cSAdrian Chadd flags = 0; 1611b8e788a5SAdrian Chadd ismrr = 0; /* default no multi-rate retry*/ 1612b8e788a5SAdrian Chadd pri = M_WME_GETAC(m0); /* honor classification */ 1613b8e788a5SAdrian Chadd /* XXX use txparams instead of fixed values */ 1614b8e788a5SAdrian Chadd /* 1615b8e788a5SAdrian Chadd * Calculate Atheros packet type from IEEE80211 packet header, 1616b8e788a5SAdrian Chadd * setup for rate calculations, and select h/w transmit queue. 1617b8e788a5SAdrian Chadd */ 1618b8e788a5SAdrian Chadd switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1619b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_MGT: 1620b8e788a5SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1621b8e788a5SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 1622b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_BEACON; 1623b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1624b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PROBE_RESP; 1625b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 1626b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_ATIM; 1627b8e788a5SAdrian Chadd else 1628b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* XXX */ 1629b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1630b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1631b8e788a5SAdrian Chadd if (shortPreamble) 1632b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1633b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1634b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1635b8e788a5SAdrian Chadd break; 1636b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_CTL: 1637b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */ 1638b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1639b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1640b8e788a5SAdrian Chadd if (shortPreamble) 1641b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1642b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1643b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1644b8e788a5SAdrian Chadd break; 1645b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_DATA: 1646b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* default */ 1647b8e788a5SAdrian Chadd /* 1648b8e788a5SAdrian Chadd * Data frames: multicast frames go out at a fixed rate, 1649b8e788a5SAdrian Chadd * EAPOL frames use the mgmt frame rate; otherwise consult 1650b8e788a5SAdrian Chadd * the rate control module for the rate to use. 1651b8e788a5SAdrian Chadd */ 1652b8e788a5SAdrian Chadd if (ismcast) { 1653b8e788a5SAdrian Chadd rix = an->an_mcastrix; 1654b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1655b8e788a5SAdrian Chadd if (shortPreamble) 1656b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1657b8e788a5SAdrian Chadd try0 = 1; 1658b8e788a5SAdrian Chadd } else if (m0->m_flags & M_EAPOL) { 1659b8e788a5SAdrian Chadd /* XXX? maybe always use long preamble? */ 1660b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1661b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1662b8e788a5SAdrian Chadd if (shortPreamble) 1663b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1664b8e788a5SAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */ 1665b8e788a5SAdrian Chadd } else { 1666eb6f0de0SAdrian Chadd /* 1667eb6f0de0SAdrian Chadd * Do rate lookup on each TX, rather than using 1668eb6f0de0SAdrian Chadd * the hard-coded TX information decided here. 1669eb6f0de0SAdrian Chadd */ 1670b8e788a5SAdrian Chadd ismrr = 1; 1671eb6f0de0SAdrian Chadd bf->bf_state.bfs_doratelookup = 1; 1672b8e788a5SAdrian Chadd } 1673b8e788a5SAdrian Chadd if (cap->cap_wmeParams[pri].wmep_noackPolicy) 1674b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 1675b8e788a5SAdrian Chadd break; 1676b8e788a5SAdrian Chadd default: 167776e6fd5dSGleb Smirnoff device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n", 1678b8e788a5SAdrian Chadd wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1679b8e788a5SAdrian Chadd /* XXX statistic */ 1680c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1681d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 1682b8e788a5SAdrian Chadd return EIO; 1683b8e788a5SAdrian Chadd } 1684b8e788a5SAdrian Chadd 1685447fd44aSAdrian Chadd /* 1686447fd44aSAdrian Chadd * There are two known scenarios where the frame AC doesn't match 1687447fd44aSAdrian Chadd * what the destination TXQ is. 1688447fd44aSAdrian Chadd * 1689447fd44aSAdrian Chadd * + non-QoS frames (eg management?) that the net80211 stack has 1690447fd44aSAdrian Chadd * assigned a higher AC to, but since it's a non-QoS TID, it's 1691447fd44aSAdrian Chadd * being thrown into TID 16. TID 16 gets the AC_BE queue. 1692447fd44aSAdrian Chadd * It's quite possible that management frames should just be 1693447fd44aSAdrian Chadd * direct dispatched to hardware rather than go via the software 1694447fd44aSAdrian Chadd * queue; that should be investigated in the future. There are 1695447fd44aSAdrian Chadd * some specific scenarios where this doesn't make sense, mostly 1696447fd44aSAdrian Chadd * surrounding ADDBA request/response - hence why that is special 1697447fd44aSAdrian Chadd * cased. 1698447fd44aSAdrian Chadd * 1699447fd44aSAdrian Chadd * + Multicast frames going into the VAP mcast queue. That shows up 1700447fd44aSAdrian Chadd * as "TXQ 11". 1701447fd44aSAdrian Chadd * 1702447fd44aSAdrian Chadd * This driver should eventually support separate TID and TXQ locking, 1703447fd44aSAdrian Chadd * allowing for arbitrary AC frames to appear on arbitrary software 1704447fd44aSAdrian Chadd * queues, being queued to the "correct" hardware queue when needed. 1705447fd44aSAdrian Chadd */ 1706447fd44aSAdrian Chadd #if 0 17076deb7f32SAdrian Chadd if (txq != sc->sc_ac2q[pri]) { 170883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 17096deb7f32SAdrian Chadd "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n", 17106deb7f32SAdrian Chadd __func__, 17116deb7f32SAdrian Chadd txq, 17126deb7f32SAdrian Chadd txq->axq_qnum, 17136deb7f32SAdrian Chadd pri, 17146deb7f32SAdrian Chadd sc->sc_ac2q[pri], 17156deb7f32SAdrian Chadd sc->sc_ac2q[pri]->axq_qnum); 17166deb7f32SAdrian Chadd } 1717447fd44aSAdrian Chadd #endif 17186deb7f32SAdrian Chadd 1719b8e788a5SAdrian Chadd /* 1720b8e788a5SAdrian Chadd * Calculate miscellaneous flags. 1721b8e788a5SAdrian Chadd */ 1722b8e788a5SAdrian Chadd if (ismcast) { 1723b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 1724b8e788a5SAdrian Chadd } else if (pktlen > vap->iv_rtsthreshold && 1725b8e788a5SAdrian Chadd (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) { 1726b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 1727b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_rts++; 1728b8e788a5SAdrian Chadd } 1729b8e788a5SAdrian Chadd if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */ 1730b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_noack++; 1731b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 1732b8e788a5SAdrian Chadd if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) { 1733b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_TDMA, 1734b8e788a5SAdrian Chadd "%s: discard frame, ACK required w/ TDMA\n", __func__); 1735b8e788a5SAdrian Chadd sc->sc_stats.ast_tdma_ack++; 1736c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1737d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 1738b8e788a5SAdrian Chadd return EIO; 1739b8e788a5SAdrian Chadd } 1740b8e788a5SAdrian Chadd #endif 1741b8e788a5SAdrian Chadd 1742bcf5fc49SAdrian Chadd #if 0 1743bcf5fc49SAdrian Chadd /* 1744bcf5fc49SAdrian Chadd * Placeholder: if you want to transmit with the azimuth 1745bcf5fc49SAdrian Chadd * timestamp in the end of the payload, here's where you 1746bcf5fc49SAdrian Chadd * should set the TXDESC field. 1747bcf5fc49SAdrian Chadd */ 1748bcf5fc49SAdrian Chadd flags |= HAL_TXDESC_HWTS; 1749bcf5fc49SAdrian Chadd #endif 1750bcf5fc49SAdrian Chadd 1751b8e788a5SAdrian Chadd /* 1752eb6f0de0SAdrian Chadd * Determine if a tx interrupt should be generated for 1753eb6f0de0SAdrian Chadd * this descriptor. We take a tx interrupt to reap 1754eb6f0de0SAdrian Chadd * descriptors when the h/w hits an EOL condition or 1755eb6f0de0SAdrian Chadd * when the descriptor is specifically marked to generate 1756eb6f0de0SAdrian Chadd * an interrupt. We periodically mark descriptors in this 1757eb6f0de0SAdrian Chadd * way to insure timely replenishing of the supply needed 1758eb6f0de0SAdrian Chadd * for sending frames. Defering interrupts reduces system 1759eb6f0de0SAdrian Chadd * load and potentially allows more concurrent work to be 1760eb6f0de0SAdrian Chadd * done but if done to aggressively can cause senders to 1761eb6f0de0SAdrian Chadd * backup. 1762eb6f0de0SAdrian Chadd * 1763eb6f0de0SAdrian Chadd * NB: use >= to deal with sc_txintrperiod changing 1764eb6f0de0SAdrian Chadd * dynamically through sysctl. 1765b8e788a5SAdrian Chadd */ 1766eb6f0de0SAdrian Chadd if (flags & HAL_TXDESC_INTREQ) { 1767eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1768eb6f0de0SAdrian Chadd } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) { 1769eb6f0de0SAdrian Chadd flags |= HAL_TXDESC_INTREQ; 1770eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1771eb6f0de0SAdrian Chadd } 1772e42b5dbaSAdrian Chadd 1773eb6f0de0SAdrian Chadd /* This point forward is actual TX bits */ 1774b8e788a5SAdrian Chadd 1775b8e788a5SAdrian Chadd /* 1776b8e788a5SAdrian Chadd * At this point we are committed to sending the frame 1777b8e788a5SAdrian Chadd * and we don't need to look at m_nextpkt; clear it in 1778b8e788a5SAdrian Chadd * case this frame is part of frag chain. 1779b8e788a5SAdrian Chadd */ 1780b8e788a5SAdrian Chadd m0->m_nextpkt = NULL; 1781b8e788a5SAdrian Chadd 1782b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 1783b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len, 1784b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 1785b8e788a5SAdrian Chadd 1786b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 1787b8e788a5SAdrian Chadd u_int64_t tsf = ath_hal_gettsf64(ah); 1788b8e788a5SAdrian Chadd 1789b8e788a5SAdrian Chadd sc->sc_tx_th.wt_tsf = htole64(tsf); 1790b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 1791b8e788a5SAdrian Chadd if (iswep) 1792b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1793b8e788a5SAdrian Chadd if (isfrag) 1794b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 1795b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 179612087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni); 1797b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 1798b8e788a5SAdrian Chadd 1799b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 1800b8e788a5SAdrian Chadd } 1801b8e788a5SAdrian Chadd 1802eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 1803eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1804c1782ce0SAdrian Chadd 1805b8e788a5SAdrian Chadd /* 1806eb6f0de0SAdrian Chadd * ath_buf_set_rate needs at least one rate/try to setup 1807eb6f0de0SAdrian Chadd * the rate scenario. 1808b8e788a5SAdrian Chadd */ 1809eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1810eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1811eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 1812eb6f0de0SAdrian Chadd 1813eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 1814eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 1815eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 1816eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 181712087a07SAdrian Chadd bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni); 1818eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 1819eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1820eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 1821eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = sc->sc_txantenna; 1822875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1823eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = shortPreamble; 1824eb6f0de0SAdrian Chadd 1825eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 1826eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */ 1827eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; /* calculated later */ 1828eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1829eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 1830eb6f0de0SAdrian Chadd 1831eb6f0de0SAdrian Chadd return 0; 1832eb6f0de0SAdrian Chadd } 1833eb6f0de0SAdrian Chadd 1834b8e788a5SAdrian Chadd /* 18354e81f27cSAdrian Chadd * Queue a frame to the hardware or software queue. 1836eb6f0de0SAdrian Chadd * 1837eb6f0de0SAdrian Chadd * This can be called by the net80211 code. 1838eb6f0de0SAdrian Chadd * 1839eb6f0de0SAdrian Chadd * XXX what about locking? Or, push the seqno assign into the 1840eb6f0de0SAdrian Chadd * XXX aggregate scheduler so its serialised? 18414e81f27cSAdrian Chadd * 18424e81f27cSAdrian Chadd * XXX When sending management frames via ath_raw_xmit(), 18434e81f27cSAdrian Chadd * should CLRDMASK be set unconditionally? 1844b8e788a5SAdrian Chadd */ 1845eb6f0de0SAdrian Chadd int 1846eb6f0de0SAdrian Chadd ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, 1847eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 1848eb6f0de0SAdrian Chadd { 1849eb6f0de0SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 1850eb6f0de0SAdrian Chadd struct ath_vap *avp = ATH_VAP(vap); 18519c85ff91SAdrian Chadd int r = 0; 1852eb6f0de0SAdrian Chadd u_int pri; 1853eb6f0de0SAdrian Chadd int tid; 1854eb6f0de0SAdrian Chadd struct ath_txq *txq; 1855eb6f0de0SAdrian Chadd int ismcast; 1856eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 1857eb6f0de0SAdrian Chadd int is_ampdu, is_ampdu_tx, is_ampdu_pending; 1858a108d2d6SAdrian Chadd ieee80211_seq seqno; 1859eb6f0de0SAdrian Chadd uint8_t type, subtype; 186022a3aee6SAdrian Chadd int queue_to_head; 1861eb6f0de0SAdrian Chadd 1862375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1863375307d4SAdrian Chadd 1864eb6f0de0SAdrian Chadd /* 1865eb6f0de0SAdrian Chadd * Determine the target hardware queue. 1866eb6f0de0SAdrian Chadd * 1867b43facbfSAdrian Chadd * For multicast frames, the txq gets overridden appropriately 1868b43facbfSAdrian Chadd * depending upon the state of PS. 1869eb6f0de0SAdrian Chadd * 1870eb6f0de0SAdrian Chadd * For any other frame, we do a TID/QoS lookup inside the frame 1871eb6f0de0SAdrian Chadd * to see what the TID should be. If it's a non-QoS frame, the 1872eb6f0de0SAdrian Chadd * AC and TID are overridden. The TID/TXQ code assumes the 1873eb6f0de0SAdrian Chadd * TID is on a predictable hardware TXQ, so we don't support 1874eb6f0de0SAdrian Chadd * having a node TID queued to multiple hardware TXQs. 1875eb6f0de0SAdrian Chadd * This may change in the future but would require some locking 1876eb6f0de0SAdrian Chadd * fudgery. 1877eb6f0de0SAdrian Chadd */ 1878eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 1879eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 1880eb6f0de0SAdrian Chadd 1881eb6f0de0SAdrian Chadd txq = sc->sc_ac2q[pri]; 1882eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1883eb6f0de0SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1884eb6f0de0SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1885eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1886eb6f0de0SAdrian Chadd 18879c85ff91SAdrian Chadd /* 18889c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 18899c85ff91SAdrian Chadd * 18909c85ff91SAdrian Chadd * XXX duplicated in ath_raw_xmit(). 18919c85ff91SAdrian Chadd */ 18929c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 189392e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 189492e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 18959c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 18969c85ff91SAdrian Chadd m_freem(m0); 189755cf0326SAdrian Chadd return (ENOBUFS); 18989c85ff91SAdrian Chadd } 18999c85ff91SAdrian Chadd } 19009c85ff91SAdrian Chadd 190122a3aee6SAdrian Chadd /* 190222a3aee6SAdrian Chadd * Enforce how deep the unicast queue can grow. 190322a3aee6SAdrian Chadd * 190422a3aee6SAdrian Chadd * If the node is in power save then we don't want 190522a3aee6SAdrian Chadd * the software queue to grow too deep, or a node may 190622a3aee6SAdrian Chadd * end up consuming all of the ath_buf entries. 190722a3aee6SAdrian Chadd * 190822a3aee6SAdrian Chadd * For now, only do this for DATA frames. 190922a3aee6SAdrian Chadd * 191022a3aee6SAdrian Chadd * We will want to cap how many management/control 191122a3aee6SAdrian Chadd * frames get punted to the software queue so it doesn't 191222a3aee6SAdrian Chadd * fill up. But the correct solution isn't yet obvious. 191322a3aee6SAdrian Chadd * In any case, this check should at least let frames pass 191422a3aee6SAdrian Chadd * that we are direct-dispatching. 191522a3aee6SAdrian Chadd * 191622a3aee6SAdrian Chadd * XXX TODO: duplicate this to the raw xmit path! 191722a3aee6SAdrian Chadd */ 191822a3aee6SAdrian Chadd if (type == IEEE80211_FC0_TYPE_DATA && 191922a3aee6SAdrian Chadd ATH_NODE(ni)->an_is_powersave && 192022a3aee6SAdrian Chadd ATH_NODE(ni)->an_swq_depth > 192122a3aee6SAdrian Chadd sc->sc_txq_node_psq_maxdepth) { 192222a3aee6SAdrian Chadd sc->sc_stats.ast_tx_node_psq_overflow++; 192322a3aee6SAdrian Chadd m_freem(m0); 192422a3aee6SAdrian Chadd return (ENOBUFS); 192522a3aee6SAdrian Chadd } 192622a3aee6SAdrian Chadd 1927eb6f0de0SAdrian Chadd /* A-MPDU TX */ 1928eb6f0de0SAdrian Chadd is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid); 1929eb6f0de0SAdrian Chadd is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1930eb6f0de0SAdrian Chadd is_ampdu = is_ampdu_tx | is_ampdu_pending; 1931eb6f0de0SAdrian Chadd 1932a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1933a108d2d6SAdrian Chadd __func__, tid, pri, is_ampdu); 1934eb6f0de0SAdrian Chadd 193546634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 193646634305SAdrian Chadd bf->bf_state.bfs_tid = tid; 1937fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 193846634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 193946634305SAdrian Chadd 1940b837332dSAdrian Chadd #if 1 1941c5940c30SAdrian Chadd /* 1942b43facbfSAdrian Chadd * When servicing one or more stations in power-save mode 1943b43facbfSAdrian Chadd * (or) if there is some mcast data waiting on the mcast 1944b43facbfSAdrian Chadd * queue (to prevent out of order delivery) multicast frames 1945b43facbfSAdrian Chadd * must be bufferd until after the beacon. 1946b43facbfSAdrian Chadd * 1947b43facbfSAdrian Chadd * TODO: we should lock the mcastq before we check the length. 1948c5940c30SAdrian Chadd */ 1949b837332dSAdrian Chadd if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 1950eb6f0de0SAdrian Chadd txq = &avp->av_mcastq; 195146634305SAdrian Chadd /* 195246634305SAdrian Chadd * Mark the frame as eventually belonging on the CAB 195346634305SAdrian Chadd * queue, so the descriptor setup functions will 195446634305SAdrian Chadd * correctly initialise the descriptor 'qcuId' field. 195546634305SAdrian Chadd */ 1956fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum; 195746634305SAdrian Chadd } 1958b837332dSAdrian Chadd #endif 1959eb6f0de0SAdrian Chadd 1960eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 1961eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 1962eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 1963eb6f0de0SAdrian Chadd 19647561cb5cSAdrian Chadd /* A-MPDU TX? Manually set sequence number */ 19657561cb5cSAdrian Chadd /* 19667561cb5cSAdrian Chadd * Don't do it whilst pending; the net80211 layer still 19677561cb5cSAdrian Chadd * assigns them. 19687561cb5cSAdrian Chadd */ 19697561cb5cSAdrian Chadd if (is_ampdu_tx) { 1970eb6f0de0SAdrian Chadd /* 1971eb6f0de0SAdrian Chadd * Always call; this function will 1972eb6f0de0SAdrian Chadd * handle making sure that null data frames 1973eb6f0de0SAdrian Chadd * don't get a sequence number from the current 1974eb6f0de0SAdrian Chadd * TID and thus mess with the BAW. 1975eb6f0de0SAdrian Chadd */ 1976a108d2d6SAdrian Chadd seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0); 197742f4d061SAdrian Chadd 197842f4d061SAdrian Chadd /* 197942f4d061SAdrian Chadd * Don't add QoS NULL frames to the BAW. 198042f4d061SAdrian Chadd */ 1981a108d2d6SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh) && 1982a108d2d6SAdrian Chadd subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) { 1983eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 1; 1984eb6f0de0SAdrian Chadd } 1985c1782ce0SAdrian Chadd } 1986c1782ce0SAdrian Chadd 1987eb6f0de0SAdrian Chadd /* 1988eb6f0de0SAdrian Chadd * If needed, the sequence number has been assigned. 1989eb6f0de0SAdrian Chadd * Squirrel it away somewhere easy to get to. 1990eb6f0de0SAdrian Chadd */ 1991a108d2d6SAdrian Chadd bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT; 1992b8e788a5SAdrian Chadd 1993eb6f0de0SAdrian Chadd /* Is ampdu pending? fetch the seqno and print it out */ 1994eb6f0de0SAdrian Chadd if (is_ampdu_pending) 1995eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 1996eb6f0de0SAdrian Chadd "%s: tid %d: ampdu pending, seqno %d\n", 1997eb6f0de0SAdrian Chadd __func__, tid, M_SEQNO_GET(m0)); 1998eb6f0de0SAdrian Chadd 1999eb6f0de0SAdrian Chadd /* This also sets up the DMA map */ 2000b43facbfSAdrian Chadd r = ath_tx_normal_setup(sc, ni, bf, m0, txq); 2001eb6f0de0SAdrian Chadd 2002eb6f0de0SAdrian Chadd if (r != 0) 20037561cb5cSAdrian Chadd goto done; 2004eb6f0de0SAdrian Chadd 2005eb6f0de0SAdrian Chadd /* At this point m0 could have changed! */ 2006eb6f0de0SAdrian Chadd m0 = bf->bf_m; 2007eb6f0de0SAdrian Chadd 2008eb6f0de0SAdrian Chadd #if 1 2009eb6f0de0SAdrian Chadd /* 2010eb6f0de0SAdrian Chadd * If it's a multicast frame, do a direct-dispatch to the 2011eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2012eb6f0de0SAdrian Chadd * queuing it. 2013eb6f0de0SAdrian Chadd */ 2014eb6f0de0SAdrian Chadd /* 2015eb6f0de0SAdrian Chadd * If it's a BAR frame, do a direct dispatch to the 2016eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2017eb6f0de0SAdrian Chadd * queuing it, as the TID will now be paused. 2018eb6f0de0SAdrian Chadd * Sending a BAR frame can occur from the net80211 txa timer 2019eb6f0de0SAdrian Chadd * (ie, retries) or from the ath txtask (completion call.) 2020eb6f0de0SAdrian Chadd * It queues directly to hardware because the TID is paused 2021eb6f0de0SAdrian Chadd * at this point (and won't be unpaused until the BAR has 2022eb6f0de0SAdrian Chadd * either been TXed successfully or max retries has been 2023eb6f0de0SAdrian Chadd * reached.) 2024eb6f0de0SAdrian Chadd */ 202522a3aee6SAdrian Chadd /* 202622a3aee6SAdrian Chadd * Until things are better debugged - if this node is asleep 202722a3aee6SAdrian Chadd * and we're sending it a non-BAR frame, direct dispatch it. 202822a3aee6SAdrian Chadd * Why? Because we need to figure out what's actually being 202922a3aee6SAdrian Chadd * sent - eg, during reassociation/reauthentication after 203022a3aee6SAdrian Chadd * the node (last) disappeared whilst asleep, the driver should 203122a3aee6SAdrian Chadd * have unpaused/unsleep'ed the node. So until that is 203222a3aee6SAdrian Chadd * sorted out, use this workaround. 203322a3aee6SAdrian Chadd */ 2034eb6f0de0SAdrian Chadd if (txq == &avp->av_mcastq) { 2035d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 20360b96ef63SAdrian Chadd "%s: bf=%p: mcastq: TX'ing\n", __func__, bf); 20374e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2038eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 203922a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 204022a3aee6SAdrian Chadd &queue_to_head)) { 204122a3aee6SAdrian Chadd ath_tx_swq(sc, ni, txq, queue_to_head, bf); 204222a3aee6SAdrian Chadd } else { 20434e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2044eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2045eb6f0de0SAdrian Chadd } 2046eb6f0de0SAdrian Chadd #else 2047eb6f0de0SAdrian Chadd /* 2048eb6f0de0SAdrian Chadd * For now, since there's no software queue, 2049eb6f0de0SAdrian Chadd * direct-dispatch to the hardware. 2050eb6f0de0SAdrian Chadd */ 20514e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 205222a3aee6SAdrian Chadd /* 205322a3aee6SAdrian Chadd * Update the current leak count if 205422a3aee6SAdrian Chadd * we're leaking frames; and set the 205522a3aee6SAdrian Chadd * MORE flag as appropriate. 205622a3aee6SAdrian Chadd */ 205722a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 2058eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2059eb6f0de0SAdrian Chadd #endif 20607561cb5cSAdrian Chadd done: 2061b8e788a5SAdrian Chadd return 0; 2062b8e788a5SAdrian Chadd } 2063b8e788a5SAdrian Chadd 2064b8e788a5SAdrian Chadd static int 2065b8e788a5SAdrian Chadd ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni, 2066b8e788a5SAdrian Chadd struct ath_buf *bf, struct mbuf *m0, 2067b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2068b8e788a5SAdrian Chadd { 20697a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic; 2070b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 2071b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 2072b8e788a5SAdrian Chadd int error, ismcast, ismrr; 2073b8e788a5SAdrian Chadd int keyix, hdrlen, pktlen, try0, txantenna; 2074eb6f0de0SAdrian Chadd u_int8_t rix, txrate; 2075b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 2076eb6f0de0SAdrian Chadd u_int flags; 2077b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 2078b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 2079b8e788a5SAdrian Chadd struct ath_desc *ds; 2080b8e788a5SAdrian Chadd u_int pri; 2081eb6f0de0SAdrian Chadd int o_tid = -1; 2082eb6f0de0SAdrian Chadd int do_override; 208322a3aee6SAdrian Chadd uint8_t type, subtype; 208422a3aee6SAdrian Chadd int queue_to_head; 2085f5c30c4eSAdrian Chadd struct ath_node *an = ATH_NODE(ni); 2086b8e788a5SAdrian Chadd 2087375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2088375307d4SAdrian Chadd 2089b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2090b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2091b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 2092b8e788a5SAdrian Chadd /* 2093b8e788a5SAdrian Chadd * Packet length must not include any 2094b8e788a5SAdrian Chadd * pad bytes; deduct them here. 2095b8e788a5SAdrian Chadd */ 2096b8e788a5SAdrian Chadd /* XXX honor IEEE80211_BPF_DATAPAD */ 2097b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN; 2098b8e788a5SAdrian Chadd 209922a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 210022a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 210122a3aee6SAdrian Chadd 210203682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, 210303682514SAdrian Chadd "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf); 210403682514SAdrian Chadd 2105eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n", 2106eb6f0de0SAdrian Chadd __func__, ismcast); 2107eb6f0de0SAdrian Chadd 21087561cb5cSAdrian Chadd pri = params->ibp_pri & 3; 21097561cb5cSAdrian Chadd /* Override pri if the frame isn't a QoS one */ 21107561cb5cSAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 21117561cb5cSAdrian Chadd pri = ath_tx_getac(sc, m0); 21127561cb5cSAdrian Chadd 21137561cb5cSAdrian Chadd /* XXX If it's an ADDBA, override the correct queue */ 21147561cb5cSAdrian Chadd do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid); 21157561cb5cSAdrian Chadd 21167561cb5cSAdrian Chadd /* Map ADDBA to the correct priority */ 21177561cb5cSAdrian Chadd if (do_override) { 21187561cb5cSAdrian Chadd #if 0 211983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 21207561cb5cSAdrian Chadd "%s: overriding tid %d pri %d -> %d\n", 21217561cb5cSAdrian Chadd __func__, o_tid, pri, TID_TO_WME_AC(o_tid)); 21227561cb5cSAdrian Chadd #endif 21237561cb5cSAdrian Chadd pri = TID_TO_WME_AC(o_tid); 21247561cb5cSAdrian Chadd } 21257561cb5cSAdrian Chadd 212681a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 2127eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, 2128eb6f0de0SAdrian Chadd m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0, 2129eb6f0de0SAdrian Chadd &hdrlen, &pktlen, &keyix)) { 2130d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 2131b8e788a5SAdrian Chadd return EIO; 2132b8e788a5SAdrian Chadd } 2133b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 2134b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2135b8e788a5SAdrian Chadd 2136eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 2137eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 2138eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 2139eb6f0de0SAdrian Chadd 2140b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 2141b8e788a5SAdrian Chadd if (error != 0) 2142b8e788a5SAdrian Chadd return error; 2143b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 2144b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2145f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 2146b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 2147b8e788a5SAdrian Chadd 21484e81f27cSAdrian Chadd /* Always enable CLRDMASK for raw frames for now.. */ 2149b8e788a5SAdrian Chadd flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 2150b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 2151b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_RTS) 2152b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 2153eb6f0de0SAdrian Chadd else if (params->ibp_flags & IEEE80211_BPF_CTS) { 2154eb6f0de0SAdrian Chadd /* XXX assume 11g/11n protection? */ 2155eb6f0de0SAdrian Chadd bf->bf_state.bfs_doprot = 1; 2156b8e788a5SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 2157eb6f0de0SAdrian Chadd } 2158b8e788a5SAdrian Chadd /* XXX leave ismcast to injector? */ 2159b8e788a5SAdrian Chadd if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast) 2160b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 2161b8e788a5SAdrian Chadd 2162b8e788a5SAdrian Chadd rt = sc->sc_currates; 2163b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2164f5c30c4eSAdrian Chadd 2165f5c30c4eSAdrian Chadd /* Fetch first rate information */ 2166b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate0); 2167f5c30c4eSAdrian Chadd try0 = params->ibp_try0; 2168f5c30c4eSAdrian Chadd 2169f5c30c4eSAdrian Chadd /* 2170f5c30c4eSAdrian Chadd * Override EAPOL rate as appropriate. 2171f5c30c4eSAdrian Chadd */ 2172f5c30c4eSAdrian Chadd if (m0->m_flags & M_EAPOL) { 2173f5c30c4eSAdrian Chadd /* XXX? maybe always use long preamble? */ 2174f5c30c4eSAdrian Chadd rix = an->an_mgmtrix; 2175f5c30c4eSAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */ 2176f5c30c4eSAdrian Chadd } 2177f5c30c4eSAdrian Chadd 2178b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 2179b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) 2180b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 2181b8e788a5SAdrian Chadd sc->sc_txrix = rix; 2182b8e788a5SAdrian Chadd ismrr = (params->ibp_try1 != 0); 2183b8e788a5SAdrian Chadd txantenna = params->ibp_pri >> 2; 2184b8e788a5SAdrian Chadd if (txantenna == 0) /* XXX? */ 2185b8e788a5SAdrian Chadd txantenna = sc->sc_txantenna; 218679f02dbfSAdrian Chadd 218779f02dbfSAdrian Chadd /* 2188eb6f0de0SAdrian Chadd * Since ctsrate is fixed, store it away for later 2189eb6f0de0SAdrian Chadd * use when the descriptor fields are being set. 219079f02dbfSAdrian Chadd */ 2191eb6f0de0SAdrian Chadd if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) 2192eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate; 219379f02dbfSAdrian Chadd 2194b8e788a5SAdrian Chadd /* 2195b8e788a5SAdrian Chadd * NB: we mark all packets as type PSPOLL so the h/w won't 2196b8e788a5SAdrian Chadd * set the sequence number, duration, etc. 2197b8e788a5SAdrian Chadd */ 2198b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; 2199b8e788a5SAdrian Chadd 2200b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 2201b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len, 2202b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 2203b8e788a5SAdrian Chadd 2204b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 2205b8e788a5SAdrian Chadd u_int64_t tsf = ath_hal_gettsf64(ah); 2206b8e788a5SAdrian Chadd 2207b8e788a5SAdrian Chadd sc->sc_tx_th.wt_tsf = htole64(tsf); 2208b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 22095945b5f5SKevin Lo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) 2210b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2211b8e788a5SAdrian Chadd if (m0->m_flags & M_FRAG) 2212b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 2213b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 221412087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = MIN(params->ibp_power, 221512087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2216b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 2217b8e788a5SAdrian Chadd 2218b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 2219b8e788a5SAdrian Chadd } 2220b8e788a5SAdrian Chadd 2221b8e788a5SAdrian Chadd /* 2222b8e788a5SAdrian Chadd * Formulate first tx descriptor with tx controls. 2223b8e788a5SAdrian Chadd */ 2224b8e788a5SAdrian Chadd ds = bf->bf_desc; 2225b8e788a5SAdrian Chadd /* XXX check return value? */ 2226eb6f0de0SAdrian Chadd 2227eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 2228eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 2229eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 2230eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 223112087a07SAdrian Chadd bf->bf_state.bfs_txpower = MIN(params->ibp_power, 223212087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2233eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 2234eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 2235eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 2236eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = txantenna; 2237875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 2238eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = 2239eb6f0de0SAdrian Chadd !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2240b8e788a5SAdrian Chadd 224146634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 224246634305SAdrian Chadd bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); 2243fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum; 224446634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 224546634305SAdrian Chadd 2246eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 2247eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 2248eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 2249eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 2250eb6f0de0SAdrian Chadd 2251eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 2252eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 2253eb6f0de0SAdrian Chadd 2254f5c30c4eSAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 2255eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 2256eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 2257c1782ce0SAdrian Chadd 2258c1782ce0SAdrian Chadd if (ismrr) { 2259eb6f0de0SAdrian Chadd int rix; 2260c1782ce0SAdrian Chadd 2261b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate1); 2262eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].rix = rix; 2263eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].tries = params->ibp_try1; 2264c1782ce0SAdrian Chadd 2265eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate2); 2266eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].rix = rix; 2267eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].tries = params->ibp_try2; 2268eb6f0de0SAdrian Chadd 2269eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate3); 2270eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = rix; 2271eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = params->ibp_try3; 2272c1782ce0SAdrian Chadd } 2273eb6f0de0SAdrian Chadd /* 2274eb6f0de0SAdrian Chadd * All the required rate control decisions have been made; 2275eb6f0de0SAdrian Chadd * fill in the rc flags. 2276eb6f0de0SAdrian Chadd */ 2277eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 2278b8e788a5SAdrian Chadd 2279b8e788a5SAdrian Chadd /* NB: no buffered multicast in power save support */ 2280eb6f0de0SAdrian Chadd 2281eb6f0de0SAdrian Chadd /* 2282eb6f0de0SAdrian Chadd * If we're overiding the ADDBA destination, dump directly 2283eb6f0de0SAdrian Chadd * into the hardware queue, right after any pending 2284eb6f0de0SAdrian Chadd * frames to that node are. 2285eb6f0de0SAdrian Chadd */ 2286eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n", 2287eb6f0de0SAdrian Chadd __func__, do_override); 2288eb6f0de0SAdrian Chadd 228994eefcf1SAdrian Chadd #if 1 229022a3aee6SAdrian Chadd /* 229122a3aee6SAdrian Chadd * Put addba frames in the right place in the right TID/HWQ. 229222a3aee6SAdrian Chadd */ 2293eb6f0de0SAdrian Chadd if (do_override) { 22944e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 229522a3aee6SAdrian Chadd /* 229622a3aee6SAdrian Chadd * XXX if it's addba frames, should we be leaking 229722a3aee6SAdrian Chadd * them out via the frame leak method? 229822a3aee6SAdrian Chadd * XXX for now let's not risk it; but we may wish 229922a3aee6SAdrian Chadd * to investigate this later. 230022a3aee6SAdrian Chadd */ 2301eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 230222a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 230322a3aee6SAdrian Chadd &queue_to_head)) { 2304eb6f0de0SAdrian Chadd /* Queue to software queue */ 230522a3aee6SAdrian Chadd ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf); 230622a3aee6SAdrian Chadd } else { 230722a3aee6SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 230822a3aee6SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2309eb6f0de0SAdrian Chadd } 231094eefcf1SAdrian Chadd #else 231194eefcf1SAdrian Chadd /* Direct-dispatch to the hardware */ 231294eefcf1SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 231322a3aee6SAdrian Chadd /* 231422a3aee6SAdrian Chadd * Update the current leak count if 231522a3aee6SAdrian Chadd * we're leaking frames; and set the 231622a3aee6SAdrian Chadd * MORE flag as appropriate. 231722a3aee6SAdrian Chadd */ 231822a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 231994eefcf1SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 232094eefcf1SAdrian Chadd #endif 2321b8e788a5SAdrian Chadd return 0; 2322b8e788a5SAdrian Chadd } 2323b8e788a5SAdrian Chadd 2324eb6f0de0SAdrian Chadd /* 2325eb6f0de0SAdrian Chadd * Send a raw frame. 2326eb6f0de0SAdrian Chadd * 2327eb6f0de0SAdrian Chadd * This can be called by net80211. 2328eb6f0de0SAdrian Chadd */ 2329b8e788a5SAdrian Chadd int 2330b8e788a5SAdrian Chadd ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2331b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2332b8e788a5SAdrian Chadd { 2333b8e788a5SAdrian Chadd struct ieee80211com *ic = ni->ni_ic; 23343797bf08SAdrian Chadd struct ath_softc *sc = ic->ic_softc; 2335b8e788a5SAdrian Chadd struct ath_buf *bf; 23369c85ff91SAdrian Chadd struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *); 23379c85ff91SAdrian Chadd int error = 0; 2338b8e788a5SAdrian Chadd 2339ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2340ef27340cSAdrian Chadd if (sc->sc_inreset_cnt > 0) { 234183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 234283bbd5ebSRui Paulo "%s: sc_inreset_cnt > 0; bailing\n", __func__); 2343ef27340cSAdrian Chadd error = EIO; 2344ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2345f5c30c4eSAdrian Chadd goto badbad; 2346ef27340cSAdrian Chadd } 2347ef27340cSAdrian Chadd sc->sc_txstart_cnt++; 2348ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2349ef27340cSAdrian Chadd 2350f5c30c4eSAdrian Chadd /* Wake the hardware up already */ 2351f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2352f5c30c4eSAdrian Chadd ath_power_set_power_state(sc, HAL_PM_AWAKE); 2353f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2354f5c30c4eSAdrian Chadd 23551b5c5f5aSAdrian Chadd ATH_TX_LOCK(sc); 23561b5c5f5aSAdrian Chadd 23577a79cebfSGleb Smirnoff if (!sc->sc_running || sc->sc_invalid) { 23587a79cebfSGleb Smirnoff DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d", 23597a79cebfSGleb Smirnoff __func__, sc->sc_running, sc->sc_invalid); 2360b8e788a5SAdrian Chadd m_freem(m); 2361b8e788a5SAdrian Chadd error = ENETDOWN; 2362b8e788a5SAdrian Chadd goto bad; 2363b8e788a5SAdrian Chadd } 23649c85ff91SAdrian Chadd 23659c85ff91SAdrian Chadd /* 23669c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 23679c85ff91SAdrian Chadd * 23689c85ff91SAdrian Chadd * XXX duplicated in ath_tx_start(). 23699c85ff91SAdrian Chadd */ 23709c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 237192e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 237292e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 23739c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 23749c85ff91SAdrian Chadd error = ENOBUFS; 23759c85ff91SAdrian Chadd } 23769c85ff91SAdrian Chadd 23779c85ff91SAdrian Chadd if (error != 0) { 23789c85ff91SAdrian Chadd m_freem(m); 23799c85ff91SAdrian Chadd goto bad; 23809c85ff91SAdrian Chadd } 23819c85ff91SAdrian Chadd } 23829c85ff91SAdrian Chadd 2383b8e788a5SAdrian Chadd /* 2384b8e788a5SAdrian Chadd * Grab a TX buffer and associated resources. 2385b8e788a5SAdrian Chadd */ 2386af33d486SAdrian Chadd bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT); 2387b8e788a5SAdrian Chadd if (bf == NULL) { 2388b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nobuf++; 2389b8e788a5SAdrian Chadd m_freem(m); 2390b8e788a5SAdrian Chadd error = ENOBUFS; 2391b8e788a5SAdrian Chadd goto bad; 2392b8e788a5SAdrian Chadd } 239303682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n", 239403682514SAdrian Chadd m, params, bf); 2395b8e788a5SAdrian Chadd 2396b8e788a5SAdrian Chadd if (params == NULL) { 2397b8e788a5SAdrian Chadd /* 2398b8e788a5SAdrian Chadd * Legacy path; interpret frame contents to decide 2399b8e788a5SAdrian Chadd * precisely how to send the frame. 2400b8e788a5SAdrian Chadd */ 2401b8e788a5SAdrian Chadd if (ath_tx_start(sc, ni, bf, m)) { 2402b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2403b8e788a5SAdrian Chadd goto bad2; 2404b8e788a5SAdrian Chadd } 2405b8e788a5SAdrian Chadd } else { 2406b8e788a5SAdrian Chadd /* 2407b8e788a5SAdrian Chadd * Caller supplied explicit parameters to use in 2408b8e788a5SAdrian Chadd * sending the frame. 2409b8e788a5SAdrian Chadd */ 2410b8e788a5SAdrian Chadd if (ath_tx_raw_start(sc, ni, bf, m, params)) { 2411b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2412b8e788a5SAdrian Chadd goto bad2; 2413b8e788a5SAdrian Chadd } 2414b8e788a5SAdrian Chadd } 2415b8e788a5SAdrian Chadd sc->sc_wd_timer = 5; 2416b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw++; 2417b8e788a5SAdrian Chadd 2418548a605dSAdrian Chadd /* 2419548a605dSAdrian Chadd * Update the TIM - if there's anything queued to the 2420548a605dSAdrian Chadd * software queue and power save is enabled, we should 2421548a605dSAdrian Chadd * set the TIM. 2422548a605dSAdrian Chadd */ 2423548a605dSAdrian Chadd ath_tx_update_tim(sc, ni, 1); 2424548a605dSAdrian Chadd 2425974185bbSAdrian Chadd ATH_TX_UNLOCK(sc); 2426974185bbSAdrian Chadd 2427ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2428ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2429ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2430ef27340cSAdrian Chadd 2431f5c30c4eSAdrian Chadd 2432f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */ 2433f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2434f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc); 2435f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2436f5c30c4eSAdrian Chadd 2437b8e788a5SAdrian Chadd return 0; 2438f5c30c4eSAdrian Chadd 2439b8e788a5SAdrian Chadd bad2: 244003682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, " 244103682514SAdrian Chadd "bf=%p", 244203682514SAdrian Chadd m, 244303682514SAdrian Chadd params, 244403682514SAdrian Chadd bf); 2445b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 2446e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 2447b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 24481b5c5f5aSAdrian Chadd 2449f5c30c4eSAdrian Chadd bad: 24501b5c5f5aSAdrian Chadd ATH_TX_UNLOCK(sc); 24511b5c5f5aSAdrian Chadd 2452ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2453ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2454ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2455f5c30c4eSAdrian Chadd 2456f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */ 2457f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2458f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc); 2459f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2460f5c30c4eSAdrian Chadd 2461f5c30c4eSAdrian Chadd badbad: 246203682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p", 246303682514SAdrian Chadd m, params); 2464b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw_fail++; 2465ef27340cSAdrian Chadd 2466b8e788a5SAdrian Chadd return error; 2467b8e788a5SAdrian Chadd } 2468eb6f0de0SAdrian Chadd 2469eb6f0de0SAdrian Chadd /* Some helper functions */ 2470eb6f0de0SAdrian Chadd 2471eb6f0de0SAdrian Chadd /* 2472eb6f0de0SAdrian Chadd * ADDBA (and potentially others) need to be placed in the same 2473eb6f0de0SAdrian Chadd * hardware queue as the TID/node it's relating to. This is so 2474eb6f0de0SAdrian Chadd * it goes out after any pending non-aggregate frames to the 2475eb6f0de0SAdrian Chadd * same node/TID. 2476eb6f0de0SAdrian Chadd * 2477eb6f0de0SAdrian Chadd * If this isn't done, the ADDBA can go out before the frames 2478eb6f0de0SAdrian Chadd * queued in hardware. Even though these frames have a sequence 2479eb6f0de0SAdrian Chadd * number -earlier- than the ADDBA can be transmitted (but 2480eb6f0de0SAdrian Chadd * no frames whose sequence numbers are after the ADDBA should 2481eb6f0de0SAdrian Chadd * be!) they'll arrive after the ADDBA - and the receiving end 2482eb6f0de0SAdrian Chadd * will simply drop them as being out of the BAW. 2483eb6f0de0SAdrian Chadd * 2484eb6f0de0SAdrian Chadd * The frames can't be appended to the TID software queue - it'll 2485eb6f0de0SAdrian Chadd * never be sent out. So these frames have to be directly 2486eb6f0de0SAdrian Chadd * dispatched to the hardware, rather than queued in software. 2487eb6f0de0SAdrian Chadd * So if this function returns true, the TXQ has to be 2488eb6f0de0SAdrian Chadd * overridden and it has to be directly dispatched. 2489eb6f0de0SAdrian Chadd * 2490eb6f0de0SAdrian Chadd * It's a dirty hack, but someone's gotta do it. 2491eb6f0de0SAdrian Chadd */ 2492eb6f0de0SAdrian Chadd 2493eb6f0de0SAdrian Chadd /* 2494eb6f0de0SAdrian Chadd * XXX doesn't belong here! 2495eb6f0de0SAdrian Chadd */ 2496eb6f0de0SAdrian Chadd static int 2497eb6f0de0SAdrian Chadd ieee80211_is_action(struct ieee80211_frame *wh) 2498eb6f0de0SAdrian Chadd { 2499eb6f0de0SAdrian Chadd /* Type: Management frame? */ 2500eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != 2501eb6f0de0SAdrian Chadd IEEE80211_FC0_TYPE_MGT) 2502eb6f0de0SAdrian Chadd return 0; 2503eb6f0de0SAdrian Chadd 2504eb6f0de0SAdrian Chadd /* Subtype: Action frame? */ 2505eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) != 2506eb6f0de0SAdrian Chadd IEEE80211_FC0_SUBTYPE_ACTION) 2507eb6f0de0SAdrian Chadd return 0; 2508eb6f0de0SAdrian Chadd 2509eb6f0de0SAdrian Chadd return 1; 2510eb6f0de0SAdrian Chadd } 2511eb6f0de0SAdrian Chadd 2512eb6f0de0SAdrian Chadd #define MS(_v, _f) (((_v) & _f) >> _f##_S) 2513eb6f0de0SAdrian Chadd /* 2514eb6f0de0SAdrian Chadd * Return an alternate TID for ADDBA request frames. 2515eb6f0de0SAdrian Chadd * 2516eb6f0de0SAdrian Chadd * Yes, this likely should be done in the net80211 layer. 2517eb6f0de0SAdrian Chadd */ 2518eb6f0de0SAdrian Chadd static int 2519eb6f0de0SAdrian Chadd ath_tx_action_frame_override_queue(struct ath_softc *sc, 2520eb6f0de0SAdrian Chadd struct ieee80211_node *ni, 2521eb6f0de0SAdrian Chadd struct mbuf *m0, int *tid) 2522eb6f0de0SAdrian Chadd { 2523eb6f0de0SAdrian Chadd struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 2524eb6f0de0SAdrian Chadd struct ieee80211_action_ba_addbarequest *ia; 2525eb6f0de0SAdrian Chadd uint8_t *frm; 2526eb6f0de0SAdrian Chadd uint16_t baparamset; 2527eb6f0de0SAdrian Chadd 2528eb6f0de0SAdrian Chadd /* Not action frame? Bail */ 2529eb6f0de0SAdrian Chadd if (! ieee80211_is_action(wh)) 2530eb6f0de0SAdrian Chadd return 0; 2531eb6f0de0SAdrian Chadd 2532eb6f0de0SAdrian Chadd /* XXX Not needed for frames we send? */ 2533eb6f0de0SAdrian Chadd #if 0 2534eb6f0de0SAdrian Chadd /* Correct length? */ 2535eb6f0de0SAdrian Chadd if (! ieee80211_parse_action(ni, m)) 2536eb6f0de0SAdrian Chadd return 0; 2537eb6f0de0SAdrian Chadd #endif 2538eb6f0de0SAdrian Chadd 2539eb6f0de0SAdrian Chadd /* Extract out action frame */ 2540eb6f0de0SAdrian Chadd frm = (u_int8_t *)&wh[1]; 2541eb6f0de0SAdrian Chadd ia = (struct ieee80211_action_ba_addbarequest *) frm; 2542eb6f0de0SAdrian Chadd 2543eb6f0de0SAdrian Chadd /* Not ADDBA? Bail */ 2544eb6f0de0SAdrian Chadd if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA) 2545eb6f0de0SAdrian Chadd return 0; 2546eb6f0de0SAdrian Chadd if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST) 2547eb6f0de0SAdrian Chadd return 0; 2548eb6f0de0SAdrian Chadd 2549eb6f0de0SAdrian Chadd /* Extract TID, return it */ 2550eb6f0de0SAdrian Chadd baparamset = le16toh(ia->rq_baparamset); 2551eb6f0de0SAdrian Chadd *tid = (int) MS(baparamset, IEEE80211_BAPS_TID); 2552eb6f0de0SAdrian Chadd 2553eb6f0de0SAdrian Chadd return 1; 2554eb6f0de0SAdrian Chadd } 2555eb6f0de0SAdrian Chadd #undef MS 2556eb6f0de0SAdrian Chadd 2557eb6f0de0SAdrian Chadd /* Per-node software queue operations */ 2558eb6f0de0SAdrian Chadd 2559eb6f0de0SAdrian Chadd /* 2560eb6f0de0SAdrian Chadd * Add the current packet to the given BAW. 2561eb6f0de0SAdrian Chadd * It is assumed that the current packet 2562eb6f0de0SAdrian Chadd * 2563eb6f0de0SAdrian Chadd * + fits inside the BAW; 2564eb6f0de0SAdrian Chadd * + already has had a sequence number allocated. 2565eb6f0de0SAdrian Chadd * 2566eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2567eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2568eb6f0de0SAdrian Chadd */ 2569eb6f0de0SAdrian Chadd void 2570eb6f0de0SAdrian Chadd ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an, 2571eb6f0de0SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 2572eb6f0de0SAdrian Chadd { 2573eb6f0de0SAdrian Chadd int index, cindex; 2574eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2575eb6f0de0SAdrian Chadd 2576375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2577eb6f0de0SAdrian Chadd 2578eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_isretried) 2579eb6f0de0SAdrian Chadd return; 2580eb6f0de0SAdrian Chadd 2581c7c07341SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2582c7c07341SAdrian Chadd 25837561cb5cSAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 258483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 25857561cb5cSAdrian Chadd "%s: dobaw=0, seqno=%d, window %d:%d\n", 258683bbd5ebSRui Paulo __func__, SEQNO(bf->bf_state.bfs_seqno), 258783bbd5ebSRui Paulo tap->txa_start, tap->txa_wnd); 25887561cb5cSAdrian Chadd } 25897561cb5cSAdrian Chadd 2590eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_addedbaw) 259183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2592a108d2d6SAdrian Chadd "%s: re-added? tid=%d, seqno %d; window %d:%d; " 2593d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2594a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2595d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 2596d4365d16SAdrian Chadd tid->baw_tail); 2597eb6f0de0SAdrian Chadd 2598eb6f0de0SAdrian Chadd /* 25997561cb5cSAdrian Chadd * Verify that the given sequence number is not outside of the 26007561cb5cSAdrian Chadd * BAW. Complain loudly if that's the case. 26017561cb5cSAdrian Chadd */ 26027561cb5cSAdrian Chadd if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 26037561cb5cSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno))) { 260483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 26057561cb5cSAdrian Chadd "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; " 26067561cb5cSAdrian Chadd "baw head=%d tail=%d\n", 26077561cb5cSAdrian Chadd __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 26087561cb5cSAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 26097561cb5cSAdrian Chadd tid->baw_tail); 26107561cb5cSAdrian Chadd } 26117561cb5cSAdrian Chadd 26127561cb5cSAdrian Chadd /* 2613eb6f0de0SAdrian Chadd * ni->ni_txseqs[] is the currently allocated seqno. 2614eb6f0de0SAdrian Chadd * the txa state contains the current baw start. 2615eb6f0de0SAdrian Chadd */ 2616eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno)); 2617eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2618eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2619a108d2d6SAdrian Chadd "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d " 2620d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2621a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2622d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head, 2623d4365d16SAdrian Chadd tid->baw_tail); 2624eb6f0de0SAdrian Chadd 2625eb6f0de0SAdrian Chadd 2626eb6f0de0SAdrian Chadd #if 0 2627eb6f0de0SAdrian Chadd assert(tid->tx_buf[cindex] == NULL); 2628eb6f0de0SAdrian Chadd #endif 2629eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != NULL) { 263083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2631eb6f0de0SAdrian Chadd "%s: ba packet dup (index=%d, cindex=%d, " 2632eb6f0de0SAdrian Chadd "head=%d, tail=%d)\n", 2633eb6f0de0SAdrian Chadd __func__, index, cindex, tid->baw_head, tid->baw_tail); 263483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2635eb6f0de0SAdrian Chadd "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n", 2636eb6f0de0SAdrian Chadd __func__, 2637eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 2638eb6f0de0SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno), 2639eb6f0de0SAdrian Chadd bf, 2640eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno) 2641eb6f0de0SAdrian Chadd ); 2642eb6f0de0SAdrian Chadd } 2643eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = bf; 2644eb6f0de0SAdrian Chadd 2645d4365d16SAdrian Chadd if (index >= ((tid->baw_tail - tid->baw_head) & 2646d4365d16SAdrian Chadd (ATH_TID_MAX_BUFS - 1))) { 2647eb6f0de0SAdrian Chadd tid->baw_tail = cindex; 2648eb6f0de0SAdrian Chadd INCR(tid->baw_tail, ATH_TID_MAX_BUFS); 2649eb6f0de0SAdrian Chadd } 2650eb6f0de0SAdrian Chadd } 2651eb6f0de0SAdrian Chadd 2652eb6f0de0SAdrian Chadd /* 265338962489SAdrian Chadd * Flip the BAW buffer entry over from the existing one to the new one. 265438962489SAdrian Chadd * 265538962489SAdrian Chadd * When software retransmitting a (sub-)frame, it is entirely possible that 265638962489SAdrian Chadd * the frame ath_buf is marked as BUSY and can't be immediately reused. 265738962489SAdrian Chadd * In that instance the buffer is cloned and the new buffer is used for 265838962489SAdrian Chadd * retransmit. We thus need to update the ath_buf slot in the BAW buf 265938962489SAdrian Chadd * tracking array to maintain consistency. 266038962489SAdrian Chadd */ 266138962489SAdrian Chadd static void 266238962489SAdrian Chadd ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an, 266338962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf) 266438962489SAdrian Chadd { 266538962489SAdrian Chadd int index, cindex; 266638962489SAdrian Chadd struct ieee80211_tx_ampdu *tap; 266738962489SAdrian Chadd int seqno = SEQNO(old_bf->bf_state.bfs_seqno); 266838962489SAdrian Chadd 2669375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 267038962489SAdrian Chadd 267138962489SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 267238962489SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 267338962489SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 267438962489SAdrian Chadd 267538962489SAdrian Chadd /* 267638962489SAdrian Chadd * Just warn for now; if it happens then we should find out 267738962489SAdrian Chadd * about it. It's highly likely the aggregation session will 267838962489SAdrian Chadd * soon hang. 267938962489SAdrian Chadd */ 268038962489SAdrian Chadd if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) { 268183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 268283bbd5ebSRui Paulo "%s: retransmitted buffer" 268338962489SAdrian Chadd " has mismatching seqno's, BA session may hang.\n", 268438962489SAdrian Chadd __func__); 268583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 268683bbd5ebSRui Paulo "%s: old seqno=%d, new_seqno=%d\n", __func__, 268783bbd5ebSRui Paulo old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno); 268838962489SAdrian Chadd } 268938962489SAdrian Chadd 269038962489SAdrian Chadd if (tid->tx_buf[cindex] != old_bf) { 269183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 269283bbd5ebSRui Paulo "%s: ath_buf pointer incorrect; " 269383bbd5ebSRui Paulo " has m BA session may hang.\n", __func__); 269483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 269583bbd5ebSRui Paulo "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf); 269638962489SAdrian Chadd } 269738962489SAdrian Chadd 269838962489SAdrian Chadd tid->tx_buf[cindex] = new_bf; 269938962489SAdrian Chadd } 270038962489SAdrian Chadd 270138962489SAdrian Chadd /* 2702eb6f0de0SAdrian Chadd * seq_start - left edge of BAW 2703eb6f0de0SAdrian Chadd * seq_next - current/next sequence number to allocate 2704eb6f0de0SAdrian Chadd * 2705eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2706eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2707eb6f0de0SAdrian Chadd */ 2708eb6f0de0SAdrian Chadd static void 2709eb6f0de0SAdrian Chadd ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an, 2710eb6f0de0SAdrian Chadd struct ath_tid *tid, const struct ath_buf *bf) 2711eb6f0de0SAdrian Chadd { 2712eb6f0de0SAdrian Chadd int index, cindex; 2713eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2714eb6f0de0SAdrian Chadd int seqno = SEQNO(bf->bf_state.bfs_seqno); 2715eb6f0de0SAdrian Chadd 2716375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2717eb6f0de0SAdrian Chadd 2718eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2719eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 2720eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2721eb6f0de0SAdrian Chadd 2722eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2723a108d2d6SAdrian Chadd "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, " 2724d4365d16SAdrian Chadd "baw head=%d, tail=%d\n", 2725a108d2d6SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index, 2726eb6f0de0SAdrian Chadd cindex, tid->baw_head, tid->baw_tail); 2727eb6f0de0SAdrian Chadd 2728eb6f0de0SAdrian Chadd /* 2729eb6f0de0SAdrian Chadd * If this occurs then we have a big problem - something else 2730eb6f0de0SAdrian Chadd * has slid tap->txa_start along without updating the BAW 2731eb6f0de0SAdrian Chadd * tracking start/end pointers. Thus the TX BAW state is now 2732eb6f0de0SAdrian Chadd * completely busted. 2733eb6f0de0SAdrian Chadd * 2734eb6f0de0SAdrian Chadd * But for now, since I haven't yet fixed TDMA and buffer cloning, 2735eb6f0de0SAdrian Chadd * it's quite possible that a cloned buffer is making its way 2736eb6f0de0SAdrian Chadd * here and causing it to fire off. Disable TDMA for now. 2737eb6f0de0SAdrian Chadd */ 2738eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != bf) { 273983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2740eb6f0de0SAdrian Chadd "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n", 274183bbd5ebSRui Paulo __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 2742eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 27433527f6a9SAdrian Chadd (tid->tx_buf[cindex] != NULL) ? 27443527f6a9SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1); 2745eb6f0de0SAdrian Chadd } 2746eb6f0de0SAdrian Chadd 2747eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = NULL; 2748eb6f0de0SAdrian Chadd 2749d4365d16SAdrian Chadd while (tid->baw_head != tid->baw_tail && 2750d4365d16SAdrian Chadd !tid->tx_buf[tid->baw_head]) { 2751eb6f0de0SAdrian Chadd INCR(tap->txa_start, IEEE80211_SEQ_RANGE); 2752eb6f0de0SAdrian Chadd INCR(tid->baw_head, ATH_TID_MAX_BUFS); 2753eb6f0de0SAdrian Chadd } 2754d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 275542fdd8e7SAdrian Chadd "%s: tid=%d: baw is now %d:%d, baw head=%d\n", 275642fdd8e7SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head); 2757eb6f0de0SAdrian Chadd } 2758eb6f0de0SAdrian Chadd 275922a3aee6SAdrian Chadd static void 276022a3aee6SAdrian Chadd ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid, 276122a3aee6SAdrian Chadd struct ath_buf *bf) 276222a3aee6SAdrian Chadd { 276322a3aee6SAdrian Chadd struct ieee80211_frame *wh; 276422a3aee6SAdrian Chadd 276522a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 276622a3aee6SAdrian Chadd 276722a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 276822a3aee6SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 276922a3aee6SAdrian Chadd 277022a3aee6SAdrian Chadd /* 277122a3aee6SAdrian Chadd * Update MORE based on the software/net80211 queue states. 277222a3aee6SAdrian Chadd */ 277322a3aee6SAdrian Chadd if ((tid->an->an_stack_psq > 0) 277422a3aee6SAdrian Chadd || (tid->an->an_swq_depth > 0)) 277522a3aee6SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 277622a3aee6SAdrian Chadd else 277722a3aee6SAdrian Chadd wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA; 277822a3aee6SAdrian Chadd 277922a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE, 278022a3aee6SAdrian Chadd "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n", 278122a3aee6SAdrian Chadd __func__, 278222a3aee6SAdrian Chadd tid->an->an_node.ni_macaddr, 278322a3aee6SAdrian Chadd ":", 278422a3aee6SAdrian Chadd tid->an->an_leak_count, 278522a3aee6SAdrian Chadd tid->an->an_stack_psq, 278622a3aee6SAdrian Chadd tid->an->an_swq_depth, 278722a3aee6SAdrian Chadd !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA)); 278822a3aee6SAdrian Chadd 278922a3aee6SAdrian Chadd /* 279022a3aee6SAdrian Chadd * Re-sync the underlying buffer. 279122a3aee6SAdrian Chadd */ 279222a3aee6SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 279322a3aee6SAdrian Chadd BUS_DMASYNC_PREWRITE); 279422a3aee6SAdrian Chadd 279522a3aee6SAdrian Chadd tid->an->an_leak_count --; 279622a3aee6SAdrian Chadd } 279722a3aee6SAdrian Chadd } 279822a3aee6SAdrian Chadd 279922a3aee6SAdrian Chadd static int 280022a3aee6SAdrian Chadd ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid) 280122a3aee6SAdrian Chadd { 280222a3aee6SAdrian Chadd 280322a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 280422a3aee6SAdrian Chadd 280522a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 280622a3aee6SAdrian Chadd return (1); 280722a3aee6SAdrian Chadd } 280822a3aee6SAdrian Chadd if (tid->paused) 280922a3aee6SAdrian Chadd return (0); 281022a3aee6SAdrian Chadd return (1); 281122a3aee6SAdrian Chadd } 281222a3aee6SAdrian Chadd 2813eb6f0de0SAdrian Chadd /* 2814eb6f0de0SAdrian Chadd * Mark the current node/TID as ready to TX. 2815eb6f0de0SAdrian Chadd * 2816eb6f0de0SAdrian Chadd * This is done to make it easy for the software scheduler to 2817eb6f0de0SAdrian Chadd * find which nodes have data to send. 2818eb6f0de0SAdrian Chadd * 2819eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2820eb6f0de0SAdrian Chadd */ 282122a3aee6SAdrian Chadd void 2822eb6f0de0SAdrian Chadd ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid) 2823eb6f0de0SAdrian Chadd { 2824eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2825eb6f0de0SAdrian Chadd 2826375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2827eb6f0de0SAdrian Chadd 282822a3aee6SAdrian Chadd /* 282922a3aee6SAdrian Chadd * If we are leaking out a frame to this destination 283022a3aee6SAdrian Chadd * for PS-POLL, ensure that we allow scheduling to 283122a3aee6SAdrian Chadd * occur. 283222a3aee6SAdrian Chadd */ 283322a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 2834eb6f0de0SAdrian Chadd return; /* paused, can't schedule yet */ 2835eb6f0de0SAdrian Chadd 2836eb6f0de0SAdrian Chadd if (tid->sched) 2837eb6f0de0SAdrian Chadd return; /* already scheduled */ 2838eb6f0de0SAdrian Chadd 2839eb6f0de0SAdrian Chadd tid->sched = 1; 2840eb6f0de0SAdrian Chadd 284122a3aee6SAdrian Chadd #if 0 284222a3aee6SAdrian Chadd /* 284322a3aee6SAdrian Chadd * If this is a sleeping node we're leaking to, given 284422a3aee6SAdrian Chadd * it a higher priority. This is so bad for QoS it hurts. 284522a3aee6SAdrian Chadd */ 284622a3aee6SAdrian Chadd if (tid->an->an_leak_count) { 284722a3aee6SAdrian Chadd TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem); 284822a3aee6SAdrian Chadd } else { 284922a3aee6SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 285022a3aee6SAdrian Chadd } 285122a3aee6SAdrian Chadd #endif 285222a3aee6SAdrian Chadd 285322a3aee6SAdrian Chadd /* 285422a3aee6SAdrian Chadd * We can't do the above - it'll confuse the TXQ software 285522a3aee6SAdrian Chadd * scheduler which will keep checking the _head_ TID 285622a3aee6SAdrian Chadd * in the list to see if it has traffic. If we queue 285722a3aee6SAdrian Chadd * a TID to the head of the list and it doesn't transmit, 285822a3aee6SAdrian Chadd * we'll check it again. 285922a3aee6SAdrian Chadd * 286022a3aee6SAdrian Chadd * So, get the rest of this leaking frames support working 286122a3aee6SAdrian Chadd * and reliable first and _then_ optimise it so they're 286222a3aee6SAdrian Chadd * pushed out in front of any other pending software 286322a3aee6SAdrian Chadd * queued nodes. 286422a3aee6SAdrian Chadd */ 2865eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2866eb6f0de0SAdrian Chadd } 2867eb6f0de0SAdrian Chadd 2868eb6f0de0SAdrian Chadd /* 2869eb6f0de0SAdrian Chadd * Mark the current node as no longer needing to be polled for 2870eb6f0de0SAdrian Chadd * TX packets. 2871eb6f0de0SAdrian Chadd * 2872eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2873eb6f0de0SAdrian Chadd */ 2874eb6f0de0SAdrian Chadd static void 2875eb6f0de0SAdrian Chadd ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid) 2876eb6f0de0SAdrian Chadd { 2877eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2878eb6f0de0SAdrian Chadd 2879375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2880eb6f0de0SAdrian Chadd 2881eb6f0de0SAdrian Chadd if (tid->sched == 0) 2882eb6f0de0SAdrian Chadd return; 2883eb6f0de0SAdrian Chadd 2884eb6f0de0SAdrian Chadd tid->sched = 0; 2885eb6f0de0SAdrian Chadd TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem); 2886eb6f0de0SAdrian Chadd } 2887eb6f0de0SAdrian Chadd 2888eb6f0de0SAdrian Chadd /* 2889eb6f0de0SAdrian Chadd * Assign a sequence number manually to the given frame. 2890eb6f0de0SAdrian Chadd * 2891eb6f0de0SAdrian Chadd * This should only be called for A-MPDU TX frames. 2892eb6f0de0SAdrian Chadd */ 2893a108d2d6SAdrian Chadd static ieee80211_seq 2894eb6f0de0SAdrian Chadd ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni, 2895eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 2896eb6f0de0SAdrian Chadd { 2897eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 2898eb6f0de0SAdrian Chadd int tid, pri; 2899eb6f0de0SAdrian Chadd ieee80211_seq seqno; 2900eb6f0de0SAdrian Chadd uint8_t subtype; 2901eb6f0de0SAdrian Chadd 2902eb6f0de0SAdrian Chadd /* TID lookup */ 2903eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2904eb6f0de0SAdrian Chadd pri = M_WME_GETAC(m0); /* honor classification */ 2905eb6f0de0SAdrian Chadd tid = WME_AC_TO_TID(pri); 2906a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n", 2907a108d2d6SAdrian Chadd __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2908eb6f0de0SAdrian Chadd 2909eb6f0de0SAdrian Chadd /* XXX Is it a control frame? Ignore */ 2910eb6f0de0SAdrian Chadd 2911eb6f0de0SAdrian Chadd /* Does the packet require a sequence number? */ 2912eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 2913eb6f0de0SAdrian Chadd return -1; 2914eb6f0de0SAdrian Chadd 2915375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 29167561cb5cSAdrian Chadd 2917eb6f0de0SAdrian Chadd /* 2918eb6f0de0SAdrian Chadd * Is it a QOS NULL Data frame? Give it a sequence number from 2919eb6f0de0SAdrian Chadd * the default TID (IEEE80211_NONQOS_TID.) 2920eb6f0de0SAdrian Chadd * 2921eb6f0de0SAdrian Chadd * The RX path of everything I've looked at doesn't include the NULL 2922eb6f0de0SAdrian Chadd * data frame sequence number in the aggregation state updates, so 2923eb6f0de0SAdrian Chadd * assigning it a sequence number there will cause a BAW hole on the 2924eb6f0de0SAdrian Chadd * RX side. 2925eb6f0de0SAdrian Chadd */ 2926eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2927eb6f0de0SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) { 29287561cb5cSAdrian Chadd /* XXX no locking for this TID? This is a bit of a problem. */ 2929eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 2930eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 2931eb6f0de0SAdrian Chadd } else { 2932eb6f0de0SAdrian Chadd /* Manually assign sequence number */ 2933eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[tid]; 2934eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE); 2935eb6f0de0SAdrian Chadd } 2936eb6f0de0SAdrian Chadd *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); 2937eb6f0de0SAdrian Chadd M_SEQNO_SET(m0, seqno); 2938eb6f0de0SAdrian Chadd 2939eb6f0de0SAdrian Chadd /* Return so caller can do something with it if needed */ 2940a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: -> seqno=%d\n", __func__, seqno); 2941eb6f0de0SAdrian Chadd return seqno; 2942eb6f0de0SAdrian Chadd } 2943eb6f0de0SAdrian Chadd 2944eb6f0de0SAdrian Chadd /* 2945eb6f0de0SAdrian Chadd * Attempt to direct dispatch an aggregate frame to hardware. 2946eb6f0de0SAdrian Chadd * If the frame is out of BAW, queue. 2947eb6f0de0SAdrian Chadd * Otherwise, schedule it as a single frame. 2948eb6f0de0SAdrian Chadd */ 2949eb6f0de0SAdrian Chadd static void 295046634305SAdrian Chadd ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 295146634305SAdrian Chadd struct ath_txq *txq, struct ath_buf *bf) 2952eb6f0de0SAdrian Chadd { 2953eb6f0de0SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 2954eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2955eb6f0de0SAdrian Chadd 2956375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2957eb6f0de0SAdrian Chadd 2958eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2959eb6f0de0SAdrian Chadd 2960eb6f0de0SAdrian Chadd /* paused? queue */ 296122a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 29623e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 29630f04c5a2SAdrian Chadd /* XXX don't sched - we're paused! */ 2964eb6f0de0SAdrian Chadd return; 2965eb6f0de0SAdrian Chadd } 2966eb6f0de0SAdrian Chadd 2967eb6f0de0SAdrian Chadd /* outside baw? queue */ 2968eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw && 2969eb6f0de0SAdrian Chadd (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 2970eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)))) { 29713e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 2972eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 2973eb6f0de0SAdrian Chadd return; 2974eb6f0de0SAdrian Chadd } 2975eb6f0de0SAdrian Chadd 29762a9f83afSAdrian Chadd /* 29772a9f83afSAdrian Chadd * This is a temporary check and should be removed once 29782a9f83afSAdrian Chadd * all the relevant code paths have been fixed. 29792a9f83afSAdrian Chadd * 29802a9f83afSAdrian Chadd * During aggregate retries, it's possible that the head 29812a9f83afSAdrian Chadd * frame will fail (which has the bfs_aggr and bfs_nframes 29822a9f83afSAdrian Chadd * fields set for said aggregate) and will be retried as 29832a9f83afSAdrian Chadd * a single frame. In this instance, the values should 29842a9f83afSAdrian Chadd * be reset or the completion code will get upset with you. 29852a9f83afSAdrian Chadd */ 29862a9f83afSAdrian Chadd if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) { 2987b372f122SRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 298883bbd5ebSRui Paulo "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__, 298983bbd5ebSRui Paulo bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes); 29902a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 29912a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 29922a9f83afSAdrian Chadd } 29932a9f83afSAdrian Chadd 29944e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 29954e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 29964e81f27cSAdrian Chadd 2997eb6f0de0SAdrian Chadd /* Direct dispatch to hardware */ 2998eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 2999e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 3000e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 3001eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 3002e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 3003eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 3004eb6f0de0SAdrian Chadd 3005eb6f0de0SAdrian Chadd /* Statistics */ 3006eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_low_hwq_single_pkt++; 3007eb6f0de0SAdrian Chadd 3008eb6f0de0SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 3009eb6f0de0SAdrian Chadd tid->hwq_depth++; 3010eb6f0de0SAdrian Chadd 3011eb6f0de0SAdrian Chadd /* Add to BAW */ 3012eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 3013eb6f0de0SAdrian Chadd ath_tx_addto_baw(sc, an, tid, bf); 3014eb6f0de0SAdrian Chadd bf->bf_state.bfs_addedbaw = 1; 3015eb6f0de0SAdrian Chadd } 3016eb6f0de0SAdrian Chadd 3017eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 3018eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 3019eb6f0de0SAdrian Chadd 302022a3aee6SAdrian Chadd /* 302122a3aee6SAdrian Chadd * Update the current leak count if 302222a3aee6SAdrian Chadd * we're leaking frames; and set the 302322a3aee6SAdrian Chadd * MORE flag as appropriate. 302422a3aee6SAdrian Chadd */ 302522a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 302622a3aee6SAdrian Chadd 3027eb6f0de0SAdrian Chadd /* Hand off to hardware */ 3028eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 3029eb6f0de0SAdrian Chadd } 3030eb6f0de0SAdrian Chadd 3031eb6f0de0SAdrian Chadd /* 3032eb6f0de0SAdrian Chadd * Attempt to send the packet. 3033eb6f0de0SAdrian Chadd * If the queue isn't busy, direct-dispatch. 3034eb6f0de0SAdrian Chadd * If the queue is busy enough, queue the given packet on the 3035eb6f0de0SAdrian Chadd * relevant software queue. 3036eb6f0de0SAdrian Chadd */ 3037eb6f0de0SAdrian Chadd void 303822a3aee6SAdrian Chadd ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, 303922a3aee6SAdrian Chadd struct ath_txq *txq, int queue_to_head, struct ath_buf *bf) 3040eb6f0de0SAdrian Chadd { 3041eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 3042eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 3043eb6f0de0SAdrian Chadd struct ath_tid *atid; 3044eb6f0de0SAdrian Chadd int pri, tid; 3045eb6f0de0SAdrian Chadd struct mbuf *m0 = bf->bf_m; 3046eb6f0de0SAdrian Chadd 3047375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 30487561cb5cSAdrian Chadd 3049eb6f0de0SAdrian Chadd /* Fetch the TID - non-QoS frames get assigned to TID 16 */ 3050eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 3051eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 3052eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 3053eb6f0de0SAdrian Chadd atid = &an->an_tid[tid]; 3054eb6f0de0SAdrian Chadd 3055a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 3056a108d2d6SAdrian Chadd __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 3057eb6f0de0SAdrian Chadd 3058eb6f0de0SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 305946634305SAdrian Chadd /* XXX potentially duplicate info, re-check */ 3060eb6f0de0SAdrian Chadd bf->bf_state.bfs_tid = tid; 3061fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 3062eb6f0de0SAdrian Chadd bf->bf_state.bfs_pri = pri; 3063eb6f0de0SAdrian Chadd 3064eb6f0de0SAdrian Chadd /* 3065eb6f0de0SAdrian Chadd * If the hardware queue isn't busy, queue it directly. 3066eb6f0de0SAdrian Chadd * If the hardware queue is busy, queue it. 3067eb6f0de0SAdrian Chadd * If the TID is paused or the traffic it outside BAW, software 3068eb6f0de0SAdrian Chadd * queue it. 306922a3aee6SAdrian Chadd * 307022a3aee6SAdrian Chadd * If the node is in power-save and we're leaking a frame, 307122a3aee6SAdrian Chadd * leak a single frame. 3072eb6f0de0SAdrian Chadd */ 307322a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, atid)) { 3074eb6f0de0SAdrian Chadd /* TID is paused, queue */ 3075a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__); 307622a3aee6SAdrian Chadd /* 307722a3aee6SAdrian Chadd * If the caller requested that it be sent at a high 307822a3aee6SAdrian Chadd * priority, queue it at the head of the list. 307922a3aee6SAdrian Chadd */ 308022a3aee6SAdrian Chadd if (queue_to_head) 308122a3aee6SAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 308222a3aee6SAdrian Chadd else 30833e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3084eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_pending(sc, an, tid)) { 3085eb6f0de0SAdrian Chadd /* AMPDU pending; queue */ 3086a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__); 30873e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3088eb6f0de0SAdrian Chadd /* XXX sched? */ 3089eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_running(sc, an, tid)) { 3090eb6f0de0SAdrian Chadd /* AMPDU running, attempt direct dispatch if possible */ 309139f24578SAdrian Chadd 309239f24578SAdrian Chadd /* 309339f24578SAdrian Chadd * Always queue the frame to the tail of the list. 309439f24578SAdrian Chadd */ 30953e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 309639f24578SAdrian Chadd 309739f24578SAdrian Chadd /* 309839f24578SAdrian Chadd * If the hardware queue isn't busy, direct dispatch 309939f24578SAdrian Chadd * the head frame in the list. Don't schedule the 310039f24578SAdrian Chadd * TID - let it build some more frames first? 310139f24578SAdrian Chadd * 310272910f03SAdrian Chadd * When running A-MPDU, always just check the hardware 310372910f03SAdrian Chadd * queue depth against the aggregate frame limit. 310472910f03SAdrian Chadd * We don't want to burst a large number of single frames 310572910f03SAdrian Chadd * out to the hardware; we want to aggressively hold back. 310672910f03SAdrian Chadd * 310739f24578SAdrian Chadd * Otherwise, schedule the TID. 310839f24578SAdrian Chadd */ 310972910f03SAdrian Chadd /* XXX TXQ locking */ 311072910f03SAdrian Chadd if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_aggr) { 31113e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 31123e6cc97fSAdrian Chadd ATH_TID_REMOVE(atid, bf, bf_list); 31132a9f83afSAdrian Chadd 31142a9f83afSAdrian Chadd /* 31152a9f83afSAdrian Chadd * Ensure it's definitely treated as a non-AMPDU 31162a9f83afSAdrian Chadd * frame - this information may have been left 31172a9f83afSAdrian Chadd * over from a previous attempt. 31182a9f83afSAdrian Chadd */ 31192a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 31202a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 31212a9f83afSAdrian Chadd 31222a9f83afSAdrian Chadd /* Queue to the hardware */ 312346634305SAdrian Chadd ath_tx_xmit_aggr(sc, an, txq, bf); 3124a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3125a108d2d6SAdrian Chadd "%s: xmit_aggr\n", 3126a108d2d6SAdrian Chadd __func__); 3127d4365d16SAdrian Chadd } else { 3128d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3129a108d2d6SAdrian Chadd "%s: ampdu; swq'ing\n", 3130a108d2d6SAdrian Chadd __func__); 313103682514SAdrian Chadd 3132eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3133eb6f0de0SAdrian Chadd } 313472910f03SAdrian Chadd /* 313572910f03SAdrian Chadd * If we're not doing A-MPDU, be prepared to direct dispatch 313672910f03SAdrian Chadd * up to both limits if possible. This particular corner 313772910f03SAdrian Chadd * case may end up with packet starvation between aggregate 3138f6b6084bSPedro F. Giffuni * traffic and non-aggregate traffic: we want to ensure 313972910f03SAdrian Chadd * that non-aggregate stations get a few frames queued to the 314072910f03SAdrian Chadd * hardware before the aggregate station(s) get their chance. 314172910f03SAdrian Chadd * 314272910f03SAdrian Chadd * So if you only ever see a couple of frames direct dispatched 314372910f03SAdrian Chadd * to the hardware from a non-AMPDU client, check both here 314472910f03SAdrian Chadd * and in the software queue dispatcher to ensure that those 314572910f03SAdrian Chadd * non-AMPDU stations get a fair chance to transmit. 314672910f03SAdrian Chadd */ 314772910f03SAdrian Chadd /* XXX TXQ locking */ 314872910f03SAdrian Chadd } else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) && 314972910f03SAdrian Chadd (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) { 3150eb6f0de0SAdrian Chadd /* AMPDU not running, attempt direct dispatch */ 3151a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__); 31520a544719SAdrian Chadd /* See if clrdmask needs to be set */ 31530a544719SAdrian Chadd ath_tx_update_clrdmask(sc, atid, bf); 315422a3aee6SAdrian Chadd 315522a3aee6SAdrian Chadd /* 315622a3aee6SAdrian Chadd * Update the current leak count if 315722a3aee6SAdrian Chadd * we're leaking frames; and set the 315822a3aee6SAdrian Chadd * MORE flag as appropriate. 315922a3aee6SAdrian Chadd */ 316022a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, atid, bf); 316122a3aee6SAdrian Chadd 316222a3aee6SAdrian Chadd /* 316322a3aee6SAdrian Chadd * Dispatch the frame. 316422a3aee6SAdrian Chadd */ 3165eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 3166eb6f0de0SAdrian Chadd } else { 3167eb6f0de0SAdrian Chadd /* Busy; queue */ 3168a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__); 31693e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3170eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3171eb6f0de0SAdrian Chadd } 3172eb6f0de0SAdrian Chadd } 3173eb6f0de0SAdrian Chadd 3174eb6f0de0SAdrian Chadd /* 31754f25ddbbSAdrian Chadd * Only set the clrdmask bit if none of the nodes are currently 31764f25ddbbSAdrian Chadd * filtered. 31774f25ddbbSAdrian Chadd * 31784f25ddbbSAdrian Chadd * XXX TODO: go through all the callers and check to see 31794f25ddbbSAdrian Chadd * which are being called in the context of looping over all 31804f25ddbbSAdrian Chadd * TIDs (eg, if all tids are being paused, resumed, etc.) 31814f25ddbbSAdrian Chadd * That'll avoid O(n^2) complexity here. 31824f25ddbbSAdrian Chadd */ 31834f25ddbbSAdrian Chadd static void 31844f25ddbbSAdrian Chadd ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an) 31854f25ddbbSAdrian Chadd { 31864f25ddbbSAdrian Chadd int i; 31874f25ddbbSAdrian Chadd 31884f25ddbbSAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 31894f25ddbbSAdrian Chadd 31904f25ddbbSAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 31914f25ddbbSAdrian Chadd if (an->an_tid[i].isfiltered == 1) 3192f74d878fSAdrian Chadd return; 31934f25ddbbSAdrian Chadd } 31944f25ddbbSAdrian Chadd an->clrdmask = 1; 31954f25ddbbSAdrian Chadd } 31964f25ddbbSAdrian Chadd 31974f25ddbbSAdrian Chadd /* 3198eb6f0de0SAdrian Chadd * Configure the per-TID node state. 3199eb6f0de0SAdrian Chadd * 3200eb6f0de0SAdrian Chadd * This likely belongs in if_ath_node.c but I can't think of anywhere 3201eb6f0de0SAdrian Chadd * else to put it just yet. 3202eb6f0de0SAdrian Chadd * 3203eb6f0de0SAdrian Chadd * This sets up the SLISTs and the mutex as appropriate. 3204eb6f0de0SAdrian Chadd */ 3205eb6f0de0SAdrian Chadd void 3206eb6f0de0SAdrian Chadd ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an) 3207eb6f0de0SAdrian Chadd { 3208eb6f0de0SAdrian Chadd int i, j; 3209eb6f0de0SAdrian Chadd struct ath_tid *atid; 3210eb6f0de0SAdrian Chadd 3211eb6f0de0SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3212eb6f0de0SAdrian Chadd atid = &an->an_tid[i]; 3213f1bc738eSAdrian Chadd 3214f1bc738eSAdrian Chadd /* XXX now with this bzer(), is the field 0'ing needed? */ 3215f1bc738eSAdrian Chadd bzero(atid, sizeof(*atid)); 3216f1bc738eSAdrian Chadd 32173e6cc97fSAdrian Chadd TAILQ_INIT(&atid->tid_q); 32183e6cc97fSAdrian Chadd TAILQ_INIT(&atid->filtq.tid_q); 3219eb6f0de0SAdrian Chadd atid->tid = i; 3220eb6f0de0SAdrian Chadd atid->an = an; 3221eb6f0de0SAdrian Chadd for (j = 0; j < ATH_TID_MAX_BUFS; j++) 3222eb6f0de0SAdrian Chadd atid->tx_buf[j] = NULL; 3223eb6f0de0SAdrian Chadd atid->baw_head = atid->baw_tail = 0; 3224eb6f0de0SAdrian Chadd atid->paused = 0; 3225eb6f0de0SAdrian Chadd atid->sched = 0; 3226eb6f0de0SAdrian Chadd atid->hwq_depth = 0; 3227eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 3228eb6f0de0SAdrian Chadd if (i == IEEE80211_NONQOS_TID) 32297403d1b9SAdrian Chadd atid->ac = ATH_NONQOS_TID_AC; 3230eb6f0de0SAdrian Chadd else 3231eb6f0de0SAdrian Chadd atid->ac = TID_TO_WME_AC(i); 3232eb6f0de0SAdrian Chadd } 32334f25ddbbSAdrian Chadd an->clrdmask = 1; /* Always start by setting this bit */ 3234eb6f0de0SAdrian Chadd } 3235eb6f0de0SAdrian Chadd 3236eb6f0de0SAdrian Chadd /* 3237eb6f0de0SAdrian Chadd * Pause the current TID. This stops packets from being transmitted 3238eb6f0de0SAdrian Chadd * on it. 3239eb6f0de0SAdrian Chadd * 3240eb6f0de0SAdrian Chadd * Since this is also called from upper layers as well as the driver, 3241eb6f0de0SAdrian Chadd * it will get the TID lock. 3242eb6f0de0SAdrian Chadd */ 3243eb6f0de0SAdrian Chadd static void 3244eb6f0de0SAdrian Chadd ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid) 3245eb6f0de0SAdrian Chadd { 324688b3d483SAdrian Chadd 3247375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3248eb6f0de0SAdrian Chadd tid->paused++; 32491771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n", 32501771c649SAdrian Chadd __func__, 32511771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 32521771c649SAdrian Chadd tid->tid, 32531771c649SAdrian Chadd tid->paused); 3254eb6f0de0SAdrian Chadd } 3255eb6f0de0SAdrian Chadd 3256eb6f0de0SAdrian Chadd /* 3257eb6f0de0SAdrian Chadd * Unpause the current TID, and schedule it if needed. 3258eb6f0de0SAdrian Chadd */ 3259eb6f0de0SAdrian Chadd static void 3260eb6f0de0SAdrian Chadd ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid) 3261eb6f0de0SAdrian Chadd { 3262375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3263eb6f0de0SAdrian Chadd 3264dff5bdf4SAdrian Chadd /* 3265dff5bdf4SAdrian Chadd * There's some odd places where ath_tx_tid_resume() is called 3266dff5bdf4SAdrian Chadd * when it shouldn't be; this works around that particular issue 3267dff5bdf4SAdrian Chadd * until it's actually resolved. 3268dff5bdf4SAdrian Chadd */ 3269dff5bdf4SAdrian Chadd if (tid->paused == 0) { 32701771c649SAdrian Chadd device_printf(sc->sc_dev, 32711771c649SAdrian Chadd "%s: [%6D]: tid=%d, paused=0?\n", 32721771c649SAdrian Chadd __func__, 32731771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 32741771c649SAdrian Chadd tid->tid); 3275dff5bdf4SAdrian Chadd } else { 3276eb6f0de0SAdrian Chadd tid->paused--; 3277dff5bdf4SAdrian Chadd } 3278eb6f0de0SAdrian Chadd 32791771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 32801771c649SAdrian Chadd "%s: [%6D]: tid=%d, unpaused = %d\n", 32811771c649SAdrian Chadd __func__, 32821771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 32831771c649SAdrian Chadd tid->tid, 32841771c649SAdrian Chadd tid->paused); 3285eb6f0de0SAdrian Chadd 32860eb81626SAdrian Chadd if (tid->paused) 3287eb6f0de0SAdrian Chadd return; 32880eb81626SAdrian Chadd 32890eb81626SAdrian Chadd /* 32900eb81626SAdrian Chadd * Override the clrdmask configuration for the next frame 32910eb81626SAdrian Chadd * from this TID, just to get the ball rolling. 32920eb81626SAdrian Chadd */ 32934f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 32940eb81626SAdrian Chadd 32950eb81626SAdrian Chadd if (tid->axq_depth == 0) 32960eb81626SAdrian Chadd return; 3297eb6f0de0SAdrian Chadd 3298f1bc738eSAdrian Chadd /* XXX isfiltered shouldn't ever be 0 at this point */ 3299f1bc738eSAdrian Chadd if (tid->isfiltered == 1) { 330083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n", 330183bbd5ebSRui Paulo __func__); 3302f1bc738eSAdrian Chadd return; 3303f1bc738eSAdrian Chadd } 3304f1bc738eSAdrian Chadd 3305eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 330621bca442SAdrian Chadd 330721bca442SAdrian Chadd /* 330821bca442SAdrian Chadd * Queue the software TX scheduler. 330921bca442SAdrian Chadd */ 331021bca442SAdrian Chadd ath_tx_swq_kick(sc); 3311eb6f0de0SAdrian Chadd } 3312eb6f0de0SAdrian Chadd 3313eb6f0de0SAdrian Chadd /* 3314f1bc738eSAdrian Chadd * Add the given ath_buf to the TID filtered frame list. 3315f1bc738eSAdrian Chadd * This requires the TID be filtered. 3316f1bc738eSAdrian Chadd */ 3317f1bc738eSAdrian Chadd static void 3318f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid, 3319f1bc738eSAdrian Chadd struct ath_buf *bf) 3320f1bc738eSAdrian Chadd { 3321f1bc738eSAdrian Chadd 3322375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3323375307d4SAdrian Chadd 3324f1bc738eSAdrian Chadd if (!tid->isfiltered) 332583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n", 332683bbd5ebSRui Paulo __func__); 3327f1bc738eSAdrian Chadd 3328f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf); 3329f1bc738eSAdrian Chadd 3330f1bc738eSAdrian Chadd /* Set the retry bit and bump the retry counter */ 3331f1bc738eSAdrian Chadd ath_tx_set_retry(sc, bf); 3332f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swfiltered++; 3333f1bc738eSAdrian Chadd 333413aa9ee5SAdrian Chadd ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list); 3335f1bc738eSAdrian Chadd } 3336f1bc738eSAdrian Chadd 3337f1bc738eSAdrian Chadd /* 3338f1bc738eSAdrian Chadd * Handle a completed filtered frame from the given TID. 3339f1bc738eSAdrian Chadd * This just enables/pauses the filtered frame state if required 3340f1bc738eSAdrian Chadd * and appends the filtered frame to the filtered queue. 3341f1bc738eSAdrian Chadd */ 3342f1bc738eSAdrian Chadd static void 3343f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid, 3344f1bc738eSAdrian Chadd struct ath_buf *bf) 3345f1bc738eSAdrian Chadd { 3346f1bc738eSAdrian Chadd 3347375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3348f1bc738eSAdrian Chadd 3349f1bc738eSAdrian Chadd if (! tid->isfiltered) { 335042fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n", 335142fdd8e7SAdrian Chadd __func__, tid->tid); 3352f1bc738eSAdrian Chadd tid->isfiltered = 1; 3353f1bc738eSAdrian Chadd ath_tx_tid_pause(sc, tid); 3354f1bc738eSAdrian Chadd } 3355f1bc738eSAdrian Chadd 3356f1bc738eSAdrian Chadd /* Add the frame to the filter queue */ 3357f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(sc, tid, bf); 3358f1bc738eSAdrian Chadd } 3359f1bc738eSAdrian Chadd 3360f1bc738eSAdrian Chadd /* 3361f1bc738eSAdrian Chadd * Complete the filtered frame TX completion. 3362f1bc738eSAdrian Chadd * 3363f1bc738eSAdrian Chadd * If there are no more frames in the hardware queue, unpause/unfilter 3364f1bc738eSAdrian Chadd * the TID if applicable. Otherwise we will wait for a node PS transition 3365f1bc738eSAdrian Chadd * to unfilter. 3366f1bc738eSAdrian Chadd */ 3367f1bc738eSAdrian Chadd static void 3368f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid) 3369f1bc738eSAdrian Chadd { 3370f1bc738eSAdrian Chadd struct ath_buf *bf; 3371a3fd3b14SAdrian Chadd int do_resume = 0; 3372f1bc738eSAdrian Chadd 3373375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3374f1bc738eSAdrian Chadd 3375f1bc738eSAdrian Chadd if (tid->hwq_depth != 0) 3376f1bc738eSAdrian Chadd return; 3377f1bc738eSAdrian Chadd 337842fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n", 337942fdd8e7SAdrian Chadd __func__, tid->tid); 3380a3fd3b14SAdrian Chadd if (tid->isfiltered == 1) { 3381f1bc738eSAdrian Chadd tid->isfiltered = 0; 3382a3fd3b14SAdrian Chadd do_resume = 1; 3383a3fd3b14SAdrian Chadd } 3384a3fd3b14SAdrian Chadd 33854f25ddbbSAdrian Chadd /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */ 33864f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 3387f1bc738eSAdrian Chadd 3388f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 338913aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) { 339013aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 33913e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3392f1bc738eSAdrian Chadd } 3393f1bc738eSAdrian Chadd 3394c5d230abSAdrian Chadd /* And only resume if we had paused before */ 3395a3fd3b14SAdrian Chadd if (do_resume) 3396f1bc738eSAdrian Chadd ath_tx_tid_resume(sc, tid); 3397f1bc738eSAdrian Chadd } 3398f1bc738eSAdrian Chadd 3399f1bc738eSAdrian Chadd /* 3400f1bc738eSAdrian Chadd * Called when a single (aggregate or otherwise) frame is completed. 3401f1bc738eSAdrian Chadd * 34021f737306SAdrian Chadd * Returns 0 if the buffer could be added to the filtered list 34031f737306SAdrian Chadd * (cloned or otherwise), 1 if the buffer couldn't be added to the 3404f1bc738eSAdrian Chadd * filtered list (failed clone; expired retry) and the caller should 3405f1bc738eSAdrian Chadd * free it and handle it like a failure (eg by sending a BAR.) 34061f737306SAdrian Chadd * 34071f737306SAdrian Chadd * since the buffer may be cloned, bf must be not touched after this 34081f737306SAdrian Chadd * if the return value is 0. 3409f1bc738eSAdrian Chadd */ 3410f1bc738eSAdrian Chadd static int 3411f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid, 3412f1bc738eSAdrian Chadd struct ath_buf *bf) 3413f1bc738eSAdrian Chadd { 3414f1bc738eSAdrian Chadd struct ath_buf *nbf; 3415f1bc738eSAdrian Chadd int retval; 3416f1bc738eSAdrian Chadd 3417375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3418f1bc738eSAdrian Chadd 3419f1bc738eSAdrian Chadd /* 3420f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3421f1bc738eSAdrian Chadd */ 3422f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 34230eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3424f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3425f1bc738eSAdrian Chadd "%s: bf=%p, seqno=%d, exceeded retries\n", 3426f1bc738eSAdrian Chadd __func__, 3427f1bc738eSAdrian Chadd bf, 342842fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 34291f737306SAdrian Chadd retval = 1; /* error */ 34301f737306SAdrian Chadd goto finish; 3431f1bc738eSAdrian Chadd } 3432f1bc738eSAdrian Chadd 3433f1bc738eSAdrian Chadd /* 3434f1bc738eSAdrian Chadd * A busy buffer can't be added to the retry list. 3435f1bc738eSAdrian Chadd * It needs to be cloned. 3436f1bc738eSAdrian Chadd */ 3437f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3438f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3439f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3440f1bc738eSAdrian Chadd "%s: busy buffer clone: %p -> %p\n", 3441f1bc738eSAdrian Chadd __func__, bf, nbf); 3442f1bc738eSAdrian Chadd } else { 3443f1bc738eSAdrian Chadd nbf = bf; 3444f1bc738eSAdrian Chadd } 3445f1bc738eSAdrian Chadd 3446f1bc738eSAdrian Chadd if (nbf == NULL) { 3447f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3448f1bc738eSAdrian Chadd "%s: busy buffer couldn't be cloned (%p)!\n", 3449f1bc738eSAdrian Chadd __func__, bf); 34501f737306SAdrian Chadd retval = 1; /* error */ 3451f1bc738eSAdrian Chadd } else { 3452f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 34531f737306SAdrian Chadd retval = 0; /* ok */ 3454f1bc738eSAdrian Chadd } 34551f737306SAdrian Chadd finish: 3456f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3457f1bc738eSAdrian Chadd 3458f1bc738eSAdrian Chadd return (retval); 3459f1bc738eSAdrian Chadd } 3460f1bc738eSAdrian Chadd 3461f1bc738eSAdrian Chadd static void 3462f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid, 3463f1bc738eSAdrian Chadd struct ath_buf *bf_first, ath_bufhead *bf_q) 3464f1bc738eSAdrian Chadd { 3465f1bc738eSAdrian Chadd struct ath_buf *bf, *bf_next, *nbf; 3466f1bc738eSAdrian Chadd 3467375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3468f1bc738eSAdrian Chadd 3469f1bc738eSAdrian Chadd bf = bf_first; 3470f1bc738eSAdrian Chadd while (bf) { 3471f1bc738eSAdrian Chadd bf_next = bf->bf_next; 3472f1bc738eSAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 3473f1bc738eSAdrian Chadd 3474f1bc738eSAdrian Chadd /* 3475f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3476f1bc738eSAdrian Chadd */ 3477f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 34780eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3479f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 348042fdd8e7SAdrian Chadd "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n", 3481f1bc738eSAdrian Chadd __func__, 348242fdd8e7SAdrian Chadd tid->tid, 3483f1bc738eSAdrian Chadd bf, 348442fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 3485f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3486f1bc738eSAdrian Chadd goto next; 3487f1bc738eSAdrian Chadd } 3488f1bc738eSAdrian Chadd 3489f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3490f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3491f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 349242fdd8e7SAdrian Chadd "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n", 349342fdd8e7SAdrian Chadd __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno)); 3494f1bc738eSAdrian Chadd } else { 3495f1bc738eSAdrian Chadd nbf = bf; 3496f1bc738eSAdrian Chadd } 3497f1bc738eSAdrian Chadd 3498f1bc738eSAdrian Chadd /* 3499f1bc738eSAdrian Chadd * If the buffer couldn't be cloned, add it to bf_q; 3500f1bc738eSAdrian Chadd * the caller will free the buffer(s) as required. 3501f1bc738eSAdrian Chadd */ 3502f1bc738eSAdrian Chadd if (nbf == NULL) { 3503f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 350442fdd8e7SAdrian Chadd "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n", 350542fdd8e7SAdrian Chadd __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno)); 3506f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3507f1bc738eSAdrian Chadd } else { 3508f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3509f1bc738eSAdrian Chadd } 3510f1bc738eSAdrian Chadd next: 3511f1bc738eSAdrian Chadd bf = bf_next; 3512f1bc738eSAdrian Chadd } 3513f1bc738eSAdrian Chadd 3514f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3515f1bc738eSAdrian Chadd } 3516f1bc738eSAdrian Chadd 3517f1bc738eSAdrian Chadd /* 351888b3d483SAdrian Chadd * Suspend the queue because we need to TX a BAR. 351988b3d483SAdrian Chadd */ 352088b3d483SAdrian Chadd static void 352188b3d483SAdrian Chadd ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid) 352288b3d483SAdrian Chadd { 3523375307d4SAdrian Chadd 3524375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 352588b3d483SAdrian Chadd 35260e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35276d07d3e0SAdrian Chadd "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n", 352888b3d483SAdrian Chadd __func__, 35296d07d3e0SAdrian Chadd tid->tid, 3530e60c4fc2SAdrian Chadd tid->bar_wait, 3531e60c4fc2SAdrian Chadd tid->bar_tx); 353288b3d483SAdrian Chadd 353388b3d483SAdrian Chadd /* We shouldn't be called when bar_tx is 1 */ 353488b3d483SAdrian Chadd if (tid->bar_tx) { 353583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 353683bbd5ebSRui Paulo "%s: bar_tx is 1?!\n", __func__); 353788b3d483SAdrian Chadd } 353888b3d483SAdrian Chadd 353988b3d483SAdrian Chadd /* If we've already been called, just be patient. */ 354088b3d483SAdrian Chadd if (tid->bar_wait) 354188b3d483SAdrian Chadd return; 354288b3d483SAdrian Chadd 354388b3d483SAdrian Chadd /* Wait! */ 354488b3d483SAdrian Chadd tid->bar_wait = 1; 354588b3d483SAdrian Chadd 354688b3d483SAdrian Chadd /* Only one pause, no matter how many frames fail */ 354788b3d483SAdrian Chadd ath_tx_tid_pause(sc, tid); 354888b3d483SAdrian Chadd } 354988b3d483SAdrian Chadd 355088b3d483SAdrian Chadd /* 355188b3d483SAdrian Chadd * We've finished with BAR handling - either we succeeded or 355288b3d483SAdrian Chadd * failed. Either way, unsuspend TX. 355388b3d483SAdrian Chadd */ 355488b3d483SAdrian Chadd static void 355588b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid) 355688b3d483SAdrian Chadd { 3557375307d4SAdrian Chadd 3558375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 355988b3d483SAdrian Chadd 35600e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35616d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 356288b3d483SAdrian Chadd __func__, 35639b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 35649b48fb4bSAdrian Chadd ":", 35656d07d3e0SAdrian Chadd tid->tid); 356688b3d483SAdrian Chadd 356788b3d483SAdrian Chadd if (tid->bar_tx == 0 || tid->bar_wait == 0) { 356883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35696d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 357083bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 357183bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait); 357288b3d483SAdrian Chadd } 357388b3d483SAdrian Chadd 357488b3d483SAdrian Chadd tid->bar_tx = tid->bar_wait = 0; 357588b3d483SAdrian Chadd ath_tx_tid_resume(sc, tid); 357688b3d483SAdrian Chadd } 357788b3d483SAdrian Chadd 357888b3d483SAdrian Chadd /* 357988b3d483SAdrian Chadd * Return whether we're ready to TX a BAR frame. 358088b3d483SAdrian Chadd * 358188b3d483SAdrian Chadd * Requires the TID lock be held. 358288b3d483SAdrian Chadd */ 358388b3d483SAdrian Chadd static int 358488b3d483SAdrian Chadd ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid) 358588b3d483SAdrian Chadd { 358688b3d483SAdrian Chadd 3587375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 358888b3d483SAdrian Chadd 358988b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->hwq_depth > 0) 359088b3d483SAdrian Chadd return (0); 359188b3d483SAdrian Chadd 35929b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35936d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar ready\n", 35949b48fb4bSAdrian Chadd __func__, 35959b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 35969b48fb4bSAdrian Chadd ":", 35976d07d3e0SAdrian Chadd tid->tid); 35980e22ed0eSAdrian Chadd 359988b3d483SAdrian Chadd return (1); 360088b3d483SAdrian Chadd } 360188b3d483SAdrian Chadd 360288b3d483SAdrian Chadd /* 360388b3d483SAdrian Chadd * Check whether the current TID is ready to have a BAR 360488b3d483SAdrian Chadd * TXed and if so, do the TX. 360588b3d483SAdrian Chadd * 360688b3d483SAdrian Chadd * Since the TID/TXQ lock can't be held during a call to 360788b3d483SAdrian Chadd * ieee80211_send_bar(), we have to do the dirty thing of unlocking it, 360888b3d483SAdrian Chadd * sending the BAR and locking it again. 360988b3d483SAdrian Chadd * 361088b3d483SAdrian Chadd * Eventually, the code to send the BAR should be broken out 361188b3d483SAdrian Chadd * from this routine so the lock doesn't have to be reacquired 361288b3d483SAdrian Chadd * just to be immediately dropped by the caller. 361388b3d483SAdrian Chadd */ 361488b3d483SAdrian Chadd static void 361588b3d483SAdrian Chadd ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid) 361688b3d483SAdrian Chadd { 361788b3d483SAdrian Chadd struct ieee80211_tx_ampdu *tap; 361888b3d483SAdrian Chadd 3619375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 362088b3d483SAdrian Chadd 36210e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36226d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 362388b3d483SAdrian Chadd __func__, 36249b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36259b48fb4bSAdrian Chadd ":", 36266d07d3e0SAdrian Chadd tid->tid); 362788b3d483SAdrian Chadd 362888b3d483SAdrian Chadd tap = ath_tx_get_tx_tid(tid->an, tid->tid); 362988b3d483SAdrian Chadd 363088b3d483SAdrian Chadd /* 363188b3d483SAdrian Chadd * This is an error condition! 363288b3d483SAdrian Chadd */ 363388b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->bar_tx == 1) { 363483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36356d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 363683bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 363783bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait); 363888b3d483SAdrian Chadd return; 363988b3d483SAdrian Chadd } 364088b3d483SAdrian Chadd 364188b3d483SAdrian Chadd /* Don't do anything if we still have pending frames */ 364288b3d483SAdrian Chadd if (tid->hwq_depth > 0) { 36430e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36446d07d3e0SAdrian Chadd "%s: %6D: TID=%d, hwq_depth=%d, waiting\n", 364588b3d483SAdrian Chadd __func__, 36469b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36479b48fb4bSAdrian Chadd ":", 36486d07d3e0SAdrian Chadd tid->tid, 364988b3d483SAdrian Chadd tid->hwq_depth); 365088b3d483SAdrian Chadd return; 365188b3d483SAdrian Chadd } 365288b3d483SAdrian Chadd 365388b3d483SAdrian Chadd /* We're now about to TX */ 365488b3d483SAdrian Chadd tid->bar_tx = 1; 365588b3d483SAdrian Chadd 365688b3d483SAdrian Chadd /* 36574e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame, 36584e81f27cSAdrian Chadd * just to get the ball rolling. 36594e81f27cSAdrian Chadd */ 36604f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 36614e81f27cSAdrian Chadd 36624e81f27cSAdrian Chadd /* 366388b3d483SAdrian Chadd * Calculate new BAW left edge, now that all frames have either 366488b3d483SAdrian Chadd * succeeded or failed. 366588b3d483SAdrian Chadd * 366688b3d483SAdrian Chadd * XXX verify this is _actually_ the valid value to begin at! 366788b3d483SAdrian Chadd */ 36680e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36696d07d3e0SAdrian Chadd "%s: %6D: TID=%d, new BAW left edge=%d\n", 367088b3d483SAdrian Chadd __func__, 36719b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36729b48fb4bSAdrian Chadd ":", 36736d07d3e0SAdrian Chadd tid->tid, 367488b3d483SAdrian Chadd tap->txa_start); 367588b3d483SAdrian Chadd 367688b3d483SAdrian Chadd /* Try sending the BAR frame */ 367788b3d483SAdrian Chadd /* We can't hold the lock here! */ 367888b3d483SAdrian Chadd 3679375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 368088b3d483SAdrian Chadd if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) { 368188b3d483SAdrian Chadd /* Success? Now we wait for notification that it's done */ 3682375307d4SAdrian Chadd ATH_TX_LOCK(sc); 368388b3d483SAdrian Chadd return; 368488b3d483SAdrian Chadd } 368588b3d483SAdrian Chadd 368688b3d483SAdrian Chadd /* Failure? For now, warn loudly and continue */ 3687375307d4SAdrian Chadd ATH_TX_LOCK(sc); 368883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36896d07d3e0SAdrian Chadd "%s: %6D: TID=%d, failed to TX BAR, continue!\n", 369083bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 36916d07d3e0SAdrian Chadd tid->tid); 369288b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, tid); 369388b3d483SAdrian Chadd } 369488b3d483SAdrian Chadd 3695eb6f0de0SAdrian Chadd static void 3696f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an, 3697f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf) 3698eb6f0de0SAdrian Chadd { 3699eb6f0de0SAdrian Chadd 3700375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3701eb6f0de0SAdrian Chadd 3702eb6f0de0SAdrian Chadd /* 3703eb6f0de0SAdrian Chadd * If the current TID is running AMPDU, update 3704eb6f0de0SAdrian Chadd * the BAW. 3705eb6f0de0SAdrian Chadd */ 3706eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid) && 3707eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw) { 3708eb6f0de0SAdrian Chadd /* 3709eb6f0de0SAdrian Chadd * Only remove the frame from the BAW if it's 3710eb6f0de0SAdrian Chadd * been transmitted at least once; this means 3711eb6f0de0SAdrian Chadd * the frame was in the BAW to begin with. 3712eb6f0de0SAdrian Chadd */ 3713eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries > 0) { 3714eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, tid, bf); 3715eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 3716eb6f0de0SAdrian Chadd } 3717ce597531SAdrian Chadd #if 0 3718eb6f0de0SAdrian Chadd /* 3719eb6f0de0SAdrian Chadd * This has become a non-fatal error now 3720eb6f0de0SAdrian Chadd */ 3721eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 372283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW 3723eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 3724eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 3725ce597531SAdrian Chadd #endif 3726eb6f0de0SAdrian Chadd } 3727b837332dSAdrian Chadd 3728b837332dSAdrian Chadd /* Strip it out of an aggregate list if it was in one */ 3729b837332dSAdrian Chadd bf->bf_next = NULL; 3730b837332dSAdrian Chadd 3731b837332dSAdrian Chadd /* Insert on the free queue to be freed by the caller */ 3732eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 3733eb6f0de0SAdrian Chadd } 3734eb6f0de0SAdrian Chadd 3735f1bc738eSAdrian Chadd static void 3736f1bc738eSAdrian Chadd ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an, 373703682514SAdrian Chadd const char *pfx, struct ath_tid *tid, struct ath_buf *bf) 3738f1bc738eSAdrian Chadd { 3739f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 374083bbd5ebSRui Paulo struct ath_txq *txq; 3741f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3742f1bc738eSAdrian Chadd 374383bbd5ebSRui Paulo txq = sc->sc_ac2q[tid->ac]; 3744f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3745f1bc738eSAdrian Chadd 37466fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3747272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, " 3748f1bc738eSAdrian Chadd "seqno=%d, retry=%d\n", 3749272a8ab6SAdrian Chadd __func__, 3750272a8ab6SAdrian Chadd pfx, 3751272a8ab6SAdrian Chadd ni->ni_macaddr, 3752272a8ab6SAdrian Chadd ":", 3753272a8ab6SAdrian Chadd bf, 3754f1bc738eSAdrian Chadd bf->bf_state.bfs_addedbaw, 3755f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw, 3756f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno), 3757f1bc738eSAdrian Chadd bf->bf_state.bfs_retries); 37586fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3759272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n", 3760272a8ab6SAdrian Chadd __func__, 3761272a8ab6SAdrian Chadd pfx, 3762272a8ab6SAdrian Chadd ni->ni_macaddr, 3763272a8ab6SAdrian Chadd ":", 3764272a8ab6SAdrian Chadd bf, 376503682514SAdrian Chadd txq->axq_qnum, 37664e81f27cSAdrian Chadd txq->axq_depth, 37674e81f27cSAdrian Chadd txq->axq_aggr_depth); 37686fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3769272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, " 3770272a8ab6SAdrian Chadd "isfiltered=%d\n", 3771272a8ab6SAdrian Chadd __func__, 3772272a8ab6SAdrian Chadd pfx, 3773272a8ab6SAdrian Chadd ni->ni_macaddr, 3774272a8ab6SAdrian Chadd ":", 3775272a8ab6SAdrian Chadd bf, 3776f1bc738eSAdrian Chadd tid->axq_depth, 3777f1bc738eSAdrian Chadd tid->hwq_depth, 3778f1bc738eSAdrian Chadd tid->bar_wait, 3779f1bc738eSAdrian Chadd tid->isfiltered); 37806fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3781272a8ab6SAdrian Chadd "%s: %s: %6D: tid %d: " 37824e81f27cSAdrian Chadd "sched=%d, paused=%d, " 37834e81f27cSAdrian Chadd "incomp=%d, baw_head=%d, " 3784f1bc738eSAdrian Chadd "baw_tail=%d txa_start=%d, ni_txseqs=%d\n", 3785272a8ab6SAdrian Chadd __func__, 3786272a8ab6SAdrian Chadd pfx, 3787272a8ab6SAdrian Chadd ni->ni_macaddr, 3788272a8ab6SAdrian Chadd ":", 3789272a8ab6SAdrian Chadd tid->tid, 37904e81f27cSAdrian Chadd tid->sched, tid->paused, 37914e81f27cSAdrian Chadd tid->incomp, tid->baw_head, 3792f1bc738eSAdrian Chadd tid->baw_tail, tap == NULL ? -1 : tap->txa_start, 3793f1bc738eSAdrian Chadd ni->ni_txseqs[tid->tid]); 3794f1bc738eSAdrian Chadd 3795f1bc738eSAdrian Chadd /* XXX Dump the frame, see what it is? */ 3796a2be2710SRui Paulo if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 3797f1bc738eSAdrian Chadd ieee80211_dump_pkt(ni->ni_ic, 3798f1bc738eSAdrian Chadd mtod(bf->bf_m, const uint8_t *), 3799f1bc738eSAdrian Chadd bf->bf_m->m_len, 0, -1); 3800f1bc738eSAdrian Chadd } 3801f1bc738eSAdrian Chadd 3802f1bc738eSAdrian Chadd /* 3803f1bc738eSAdrian Chadd * Free any packets currently pending in the software TX queue. 3804f1bc738eSAdrian Chadd * 3805f1bc738eSAdrian Chadd * This will be called when a node is being deleted. 3806f1bc738eSAdrian Chadd * 3807f1bc738eSAdrian Chadd * It can also be called on an active node during an interface 3808f1bc738eSAdrian Chadd * reset or state transition. 3809f1bc738eSAdrian Chadd * 3810f1bc738eSAdrian Chadd * (From Linux/reference): 3811f1bc738eSAdrian Chadd * 3812f1bc738eSAdrian Chadd * TODO: For frame(s) that are in the retry state, we will reuse the 3813f1bc738eSAdrian Chadd * sequence number(s) without setting the retry bit. The 3814f1bc738eSAdrian Chadd * alternative is to give up on these and BAR the receiver's window 3815f1bc738eSAdrian Chadd * forward. 3816f1bc738eSAdrian Chadd */ 3817f1bc738eSAdrian Chadd static void 3818f1bc738eSAdrian Chadd ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an, 3819f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq) 3820f1bc738eSAdrian Chadd { 3821f1bc738eSAdrian Chadd struct ath_buf *bf; 3822f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3823f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 3824f1bc738eSAdrian Chadd int t; 3825f1bc738eSAdrian Chadd 3826f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3827f1bc738eSAdrian Chadd 3828375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3829f1bc738eSAdrian Chadd 3830f1bc738eSAdrian Chadd /* Walk the queue, free frames */ 3831f1bc738eSAdrian Chadd t = 0; 3832f1bc738eSAdrian Chadd for (;;) { 38333e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 3834f1bc738eSAdrian Chadd if (bf == NULL) { 3835f1bc738eSAdrian Chadd break; 3836f1bc738eSAdrian Chadd } 3837f1bc738eSAdrian Chadd 3838f1bc738eSAdrian Chadd if (t == 0) { 383903682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "norm", tid, bf); 38406fc621c2SAdrian Chadd // t = 1; 3841f1bc738eSAdrian Chadd } 3842f1bc738eSAdrian Chadd 38433e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 3844f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3845f1bc738eSAdrian Chadd } 3846f1bc738eSAdrian Chadd 3847f1bc738eSAdrian Chadd /* And now, drain the filtered frame queue */ 3848f1bc738eSAdrian Chadd t = 0; 3849f1bc738eSAdrian Chadd for (;;) { 385013aa9ee5SAdrian Chadd bf = ATH_TID_FILT_FIRST(tid); 3851f1bc738eSAdrian Chadd if (bf == NULL) 3852f1bc738eSAdrian Chadd break; 3853f1bc738eSAdrian Chadd 3854f1bc738eSAdrian Chadd if (t == 0) { 385503682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "filt", tid, bf); 38566fc621c2SAdrian Chadd // t = 1; 3857f1bc738eSAdrian Chadd } 3858f1bc738eSAdrian Chadd 385913aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3860f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3861f1bc738eSAdrian Chadd } 3862f1bc738eSAdrian Chadd 3863eb6f0de0SAdrian Chadd /* 38644e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame 38654e81f27cSAdrian Chadd * in case there is some future transmission, just to get 38664e81f27cSAdrian Chadd * the ball rolling. 38674e81f27cSAdrian Chadd * 38684e81f27cSAdrian Chadd * This won't hurt things if the TID is about to be freed. 38694e81f27cSAdrian Chadd */ 38704f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 38714e81f27cSAdrian Chadd 38724e81f27cSAdrian Chadd /* 3873eb6f0de0SAdrian Chadd * Now that it's completed, grab the TID lock and update 3874eb6f0de0SAdrian Chadd * the sequence number and BAW window. 3875eb6f0de0SAdrian Chadd * Because sequence numbers have been assigned to frames 3876eb6f0de0SAdrian Chadd * that haven't been sent yet, it's entirely possible 3877eb6f0de0SAdrian Chadd * we'll be called with some pending frames that have not 3878eb6f0de0SAdrian Chadd * been transmitted. 3879eb6f0de0SAdrian Chadd * 3880eb6f0de0SAdrian Chadd * The cleaner solution is to do the sequence number allocation 3881eb6f0de0SAdrian Chadd * when the packet is first transmitted - and thus the "retries" 3882eb6f0de0SAdrian Chadd * check above would be enough to update the BAW/seqno. 3883eb6f0de0SAdrian Chadd */ 3884eb6f0de0SAdrian Chadd 3885eb6f0de0SAdrian Chadd /* But don't do it for non-QoS TIDs */ 3886eb6f0de0SAdrian Chadd if (tap) { 38879b48fb4bSAdrian Chadd #if 1 3888eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 38899b48fb4bSAdrian Chadd "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n", 38909b48fb4bSAdrian Chadd __func__, 38919b48fb4bSAdrian Chadd ni->ni_macaddr, 38929b48fb4bSAdrian Chadd ":", 38939b48fb4bSAdrian Chadd an, 38949b48fb4bSAdrian Chadd tid->tid, 38959b48fb4bSAdrian Chadd tap->txa_start); 3896eb6f0de0SAdrian Chadd #endif 3897eb6f0de0SAdrian Chadd ni->ni_txseqs[tid->tid] = tap->txa_start; 3898eb6f0de0SAdrian Chadd tid->baw_tail = tid->baw_head; 3899eb6f0de0SAdrian Chadd } 3900eb6f0de0SAdrian Chadd } 3901eb6f0de0SAdrian Chadd 3902eb6f0de0SAdrian Chadd /* 390322780332SAdrian Chadd * Reset the TID state. This must be only called once the node has 390422780332SAdrian Chadd * had its frames flushed from this TID, to ensure that no other 390522780332SAdrian Chadd * pause / unpause logic can kick in. 390622780332SAdrian Chadd */ 390722780332SAdrian Chadd static void 390822780332SAdrian Chadd ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid) 390922780332SAdrian Chadd { 391022780332SAdrian Chadd 391122780332SAdrian Chadd #if 0 391222780332SAdrian Chadd tid->bar_wait = tid->bar_tx = tid->isfiltered = 0; 391322780332SAdrian Chadd tid->paused = tid->sched = tid->addba_tx_pending = 0; 391422780332SAdrian Chadd tid->incomp = tid->cleanup_inprogress = 0; 391522780332SAdrian Chadd #endif 391622780332SAdrian Chadd 391722780332SAdrian Chadd /* 391822780332SAdrian Chadd * If we have a bar_wait set, we need to unpause the TID 391922780332SAdrian Chadd * here. Otherwise once cleanup has finished, the TID won't 392022780332SAdrian Chadd * have the right paused counter. 392122780332SAdrian Chadd * 392222780332SAdrian Chadd * XXX I'm not going through resume here - I don't want the 392322780332SAdrian Chadd * node to be rescheuled just yet. This however should be 392422780332SAdrian Chadd * methodized! 392522780332SAdrian Chadd */ 392622780332SAdrian Chadd if (tid->bar_wait) { 392722780332SAdrian Chadd if (tid->paused > 0) { 392822780332SAdrian Chadd tid->paused --; 392922780332SAdrian Chadd } 393022780332SAdrian Chadd } 393122780332SAdrian Chadd 393222780332SAdrian Chadd /* 393322780332SAdrian Chadd * XXX same with a currently filtered TID. 393422780332SAdrian Chadd * 393522780332SAdrian Chadd * Since this is being called during a flush, we assume that 393622780332SAdrian Chadd * the filtered frame list is actually empty. 393722780332SAdrian Chadd * 393822780332SAdrian Chadd * XXX TODO: add in a check to ensure that the filtered queue 393922780332SAdrian Chadd * depth is actually 0! 394022780332SAdrian Chadd */ 394122780332SAdrian Chadd if (tid->isfiltered) { 394222780332SAdrian Chadd if (tid->paused > 0) { 394322780332SAdrian Chadd tid->paused --; 394422780332SAdrian Chadd } 394522780332SAdrian Chadd } 394622780332SAdrian Chadd 394722780332SAdrian Chadd /* 394822780332SAdrian Chadd * Clear BAR, filtered frames, scheduled and ADDBA pending. 394922780332SAdrian Chadd * The TID may be going through cleanup from the last association 395022780332SAdrian Chadd * where things in the BAW are still in the hardware queue. 395122780332SAdrian Chadd */ 395222780332SAdrian Chadd tid->bar_wait = 0; 395322780332SAdrian Chadd tid->bar_tx = 0; 395422780332SAdrian Chadd tid->isfiltered = 0; 395522780332SAdrian Chadd tid->sched = 0; 395622780332SAdrian Chadd tid->addba_tx_pending = 0; 395722780332SAdrian Chadd 395822780332SAdrian Chadd /* 395922780332SAdrian Chadd * XXX TODO: it may just be enough to walk the HWQs and mark 396022780332SAdrian Chadd * frames for that node as non-aggregate; or mark the ath_node 396122780332SAdrian Chadd * with something that indicates that aggregation is no longer 3962f6b6084bSPedro F. Giffuni * occurring. Then we can just toss the BAW complaints and 396322780332SAdrian Chadd * do a complete hard reset of state here - no pause, no 396422780332SAdrian Chadd * complete counter, etc. 396522780332SAdrian Chadd */ 396622a3aee6SAdrian Chadd 396722780332SAdrian Chadd } 396822780332SAdrian Chadd 396922780332SAdrian Chadd /* 3970eb6f0de0SAdrian Chadd * Flush all software queued packets for the given node. 3971eb6f0de0SAdrian Chadd * 3972eb6f0de0SAdrian Chadd * This occurs when a completion handler frees the last buffer 3973eb6f0de0SAdrian Chadd * for a node, and the node is thus freed. This causes the node 3974eb6f0de0SAdrian Chadd * to be cleaned up, which ends up calling ath_tx_node_flush. 3975eb6f0de0SAdrian Chadd */ 3976eb6f0de0SAdrian Chadd void 3977eb6f0de0SAdrian Chadd ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an) 3978eb6f0de0SAdrian Chadd { 3979eb6f0de0SAdrian Chadd int tid; 3980eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 3981eb6f0de0SAdrian Chadd struct ath_buf *bf; 3982eb6f0de0SAdrian Chadd 3983eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 3984eb6f0de0SAdrian Chadd 398503682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p", 398603682514SAdrian Chadd &an->an_node); 398703682514SAdrian Chadd 3988375307d4SAdrian Chadd ATH_TX_LOCK(sc); 39899b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 39909b48fb4bSAdrian Chadd "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, " 399122a3aee6SAdrian Chadd "swq_depth=%d, clrdmask=%d, leak_count=%d\n", 39929b48fb4bSAdrian Chadd __func__, 39939b48fb4bSAdrian Chadd an->an_node.ni_macaddr, 39949b48fb4bSAdrian Chadd ":", 39959b48fb4bSAdrian Chadd an->an_is_powersave, 39969b48fb4bSAdrian Chadd an->an_stack_psq, 39979b48fb4bSAdrian Chadd an->an_tim_set, 39989b48fb4bSAdrian Chadd an->an_swq_depth, 399922a3aee6SAdrian Chadd an->clrdmask, 400022a3aee6SAdrian Chadd an->an_leak_count); 40019b48fb4bSAdrian Chadd 4002eb6f0de0SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 4003eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4004eb6f0de0SAdrian Chadd 4005eb6f0de0SAdrian Chadd /* Free packets */ 4006eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, an, atid, &bf_cq); 400722a3aee6SAdrian Chadd 400823f44d2bSAdrian Chadd /* Remove this tid from the list of active tids */ 400923f44d2bSAdrian Chadd ath_tx_tid_unsched(sc, atid); 401022a3aee6SAdrian Chadd 401122780332SAdrian Chadd /* Reset the per-TID pause, BAR, etc state */ 401222780332SAdrian Chadd ath_tx_tid_reset(sc, atid); 4013eb6f0de0SAdrian Chadd } 401422a3aee6SAdrian Chadd 401522a3aee6SAdrian Chadd /* 401622a3aee6SAdrian Chadd * Clear global leak count 401722a3aee6SAdrian Chadd */ 401822a3aee6SAdrian Chadd an->an_leak_count = 0; 4019375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4020eb6f0de0SAdrian Chadd 4021eb6f0de0SAdrian Chadd /* Handle completed frames */ 4022eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4023eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4024eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4025eb6f0de0SAdrian Chadd } 4026eb6f0de0SAdrian Chadd } 4027eb6f0de0SAdrian Chadd 4028eb6f0de0SAdrian Chadd /* 4029eb6f0de0SAdrian Chadd * Drain all the software TXQs currently with traffic queued. 4030eb6f0de0SAdrian Chadd */ 4031eb6f0de0SAdrian Chadd void 4032eb6f0de0SAdrian Chadd ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq) 4033eb6f0de0SAdrian Chadd { 4034eb6f0de0SAdrian Chadd struct ath_tid *tid; 4035eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4036eb6f0de0SAdrian Chadd struct ath_buf *bf; 4037eb6f0de0SAdrian Chadd 4038eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4039375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4040eb6f0de0SAdrian Chadd 4041eb6f0de0SAdrian Chadd /* 4042eb6f0de0SAdrian Chadd * Iterate over all active tids for the given txq, 4043eb6f0de0SAdrian Chadd * flushing and unsched'ing them 4044eb6f0de0SAdrian Chadd */ 4045eb6f0de0SAdrian Chadd while (! TAILQ_EMPTY(&txq->axq_tidq)) { 4046eb6f0de0SAdrian Chadd tid = TAILQ_FIRST(&txq->axq_tidq); 4047eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, tid->an, tid, &bf_cq); 4048eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 4049eb6f0de0SAdrian Chadd } 4050eb6f0de0SAdrian Chadd 4051375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4052eb6f0de0SAdrian Chadd 4053eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4054eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4055eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4056eb6f0de0SAdrian Chadd } 4057eb6f0de0SAdrian Chadd } 4058eb6f0de0SAdrian Chadd 4059eb6f0de0SAdrian Chadd /* 4060eb6f0de0SAdrian Chadd * Handle completion of non-aggregate session frames. 40610c54de88SAdrian Chadd * 40620c54de88SAdrian Chadd * This (currently) doesn't implement software retransmission of 40630c54de88SAdrian Chadd * non-aggregate frames! 40640c54de88SAdrian Chadd * 40650c54de88SAdrian Chadd * Software retransmission of non-aggregate frames needs to obey 40660c54de88SAdrian Chadd * the strict sequence number ordering, and drop any frames that 40670c54de88SAdrian Chadd * will fail this. 40680c54de88SAdrian Chadd * 40690c54de88SAdrian Chadd * For now, filtered frames and frame transmission will cause 40700c54de88SAdrian Chadd * all kinds of issues. So we don't support them. 40710c54de88SAdrian Chadd * 40720c54de88SAdrian Chadd * So anyone queuing frames via ath_tx_normal_xmit() or 40730c54de88SAdrian Chadd * ath_tx_hw_queue_norm() must override and set CLRDMASK. 4074eb6f0de0SAdrian Chadd */ 4075eb6f0de0SAdrian Chadd void 4076eb6f0de0SAdrian Chadd ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 4077eb6f0de0SAdrian Chadd { 4078eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4079eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4080eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4081eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4082eb6f0de0SAdrian Chadd struct ath_tx_status *ts = &bf->bf_status.ds_txstat; 4083eb6f0de0SAdrian Chadd 4084eb6f0de0SAdrian Chadd /* The TID state is protected behind the TXQ lock */ 4085375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4086eb6f0de0SAdrian Chadd 4087eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n", 4088eb6f0de0SAdrian Chadd __func__, bf, fail, atid->hwq_depth - 1); 4089eb6f0de0SAdrian Chadd 4090eb6f0de0SAdrian Chadd atid->hwq_depth--; 4091f1bc738eSAdrian Chadd 40920c54de88SAdrian Chadd #if 0 40930c54de88SAdrian Chadd /* 40940c54de88SAdrian Chadd * If the frame was filtered, stick it on the filter frame 40950c54de88SAdrian Chadd * queue and complain about it. It shouldn't happen! 40960c54de88SAdrian Chadd */ 40970c54de88SAdrian Chadd if ((ts->ts_status & HAL_TXERR_FILT) || 40980c54de88SAdrian Chadd (ts->ts_status != 0 && atid->isfiltered)) { 409983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 41000c54de88SAdrian Chadd "%s: isfiltered=%d, ts_status=%d: huh?\n", 41010c54de88SAdrian Chadd __func__, 41020c54de88SAdrian Chadd atid->isfiltered, 41030c54de88SAdrian Chadd ts->ts_status); 41040c54de88SAdrian Chadd ath_tx_tid_filt_comp_buf(sc, atid, bf); 41050c54de88SAdrian Chadd } 41060c54de88SAdrian Chadd #endif 4107f1bc738eSAdrian Chadd if (atid->isfiltered) 410883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__); 4109eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 411083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 4111eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4112f1bc738eSAdrian Chadd 4113f172ef75SAdrian Chadd /* If the TID is being cleaned up, track things */ 4114f172ef75SAdrian Chadd /* XXX refactor! */ 4115f172ef75SAdrian Chadd if (atid->cleanup_inprogress) { 4116f172ef75SAdrian Chadd atid->incomp--; 4117f172ef75SAdrian Chadd if (atid->incomp == 0) { 4118f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4119f172ef75SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4120f172ef75SAdrian Chadd __func__, tid); 4121f172ef75SAdrian Chadd atid->cleanup_inprogress = 0; 4122f172ef75SAdrian Chadd ath_tx_tid_resume(sc, atid); 4123f172ef75SAdrian Chadd } 4124f172ef75SAdrian Chadd } 4125f172ef75SAdrian Chadd 4126f1bc738eSAdrian Chadd /* 4127f1bc738eSAdrian Chadd * If the queue is filtered, potentially mark it as complete 4128f1bc738eSAdrian Chadd * and reschedule it as needed. 4129f1bc738eSAdrian Chadd * 4130f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 4131f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 4132f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 4133f1bc738eSAdrian Chadd * (complete or otherwise) frame. 4134f1bc738eSAdrian Chadd * 4135f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 4136f1bc738eSAdrian Chadd */ 4137f1bc738eSAdrian Chadd if (atid->isfiltered) 4138f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4139375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4140eb6f0de0SAdrian Chadd 4141eb6f0de0SAdrian Chadd /* 4142eb6f0de0SAdrian Chadd * punt to rate control if we're not being cleaned up 4143eb6f0de0SAdrian Chadd * during a hw queue drain and the frame wanted an ACK. 4144eb6f0de0SAdrian Chadd */ 4145875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 4146eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 4147eb6f0de0SAdrian Chadd ts, bf->bf_state.bfs_pktlen, 4148eb6f0de0SAdrian Chadd 1, (ts->ts_status == 0) ? 0 : 1); 4149eb6f0de0SAdrian Chadd 4150eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 4151eb6f0de0SAdrian Chadd } 4152eb6f0de0SAdrian Chadd 4153eb6f0de0SAdrian Chadd /* 4154eb6f0de0SAdrian Chadd * Handle cleanup of aggregate session packets that aren't 4155eb6f0de0SAdrian Chadd * an A-MPDU. 4156eb6f0de0SAdrian Chadd * 4157eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4158eb6f0de0SAdrian Chadd * torn down. 4159eb6f0de0SAdrian Chadd */ 4160eb6f0de0SAdrian Chadd static void 4161eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4162eb6f0de0SAdrian Chadd { 4163eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4164eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4165eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4166eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4167eb6f0de0SAdrian Chadd 4168eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n", 4169eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4170eb6f0de0SAdrian Chadd 4171375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4172eb6f0de0SAdrian Chadd atid->incomp--; 4173f172ef75SAdrian Chadd 4174f172ef75SAdrian Chadd /* XXX refactor! */ 4175f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4176f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4177f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 4178f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 4179f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n", 4180f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4181f172ef75SAdrian Chadd } 4182f172ef75SAdrian Chadd 4183eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4184eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4185eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4186eb6f0de0SAdrian Chadd __func__, tid); 4187eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4188eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4189eb6f0de0SAdrian Chadd } 4190375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4191eb6f0de0SAdrian Chadd 4192eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4193eb6f0de0SAdrian Chadd } 4194eb6f0de0SAdrian Chadd 4195f172ef75SAdrian Chadd 4196f172ef75SAdrian Chadd /* 4197f172ef75SAdrian Chadd * This as it currently stands is a bit dumb. Ideally we'd just 4198f172ef75SAdrian Chadd * fail the frame the normal way and have it permanently fail 4199f172ef75SAdrian Chadd * via the normal aggregate completion path. 4200f172ef75SAdrian Chadd */ 4201f172ef75SAdrian Chadd static void 4202f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an, 4203f172ef75SAdrian Chadd int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq) 4204f172ef75SAdrian Chadd { 4205f172ef75SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4206f172ef75SAdrian Chadd struct ath_buf *bf, *bf_next; 4207f172ef75SAdrian Chadd 4208f172ef75SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4209f172ef75SAdrian Chadd 4210f172ef75SAdrian Chadd /* 4211f172ef75SAdrian Chadd * Remove this frame from the queue. 4212f172ef75SAdrian Chadd */ 4213f172ef75SAdrian Chadd ATH_TID_REMOVE(atid, bf_head, bf_list); 4214f172ef75SAdrian Chadd 4215f172ef75SAdrian Chadd /* 4216f172ef75SAdrian Chadd * Loop over all the frames in the aggregate. 4217f172ef75SAdrian Chadd */ 4218f172ef75SAdrian Chadd bf = bf_head; 4219f172ef75SAdrian Chadd while (bf != NULL) { 4220f172ef75SAdrian Chadd bf_next = bf->bf_next; /* next aggregate frame, or NULL */ 4221f172ef75SAdrian Chadd 4222f172ef75SAdrian Chadd /* 4223f172ef75SAdrian Chadd * If it's been added to the BAW we need to kick 4224f172ef75SAdrian Chadd * it out of the BAW before we continue. 4225f172ef75SAdrian Chadd * 4226f172ef75SAdrian Chadd * XXX if it's an aggregate, assert that it's in the 4227f172ef75SAdrian Chadd * BAW - we shouldn't have it be in an aggregate 4228f172ef75SAdrian Chadd * otherwise! 4229f172ef75SAdrian Chadd */ 4230f172ef75SAdrian Chadd if (bf->bf_state.bfs_addedbaw) { 4231f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4232f172ef75SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4233f172ef75SAdrian Chadd } 4234f172ef75SAdrian Chadd 4235f172ef75SAdrian Chadd /* 4236f172ef75SAdrian Chadd * Give it the default completion handler. 4237f172ef75SAdrian Chadd */ 4238f172ef75SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 4239f172ef75SAdrian Chadd bf->bf_next = NULL; 4240f172ef75SAdrian Chadd 4241f172ef75SAdrian Chadd /* 4242f172ef75SAdrian Chadd * Add it to the list to free. 4243f172ef75SAdrian Chadd */ 4244f172ef75SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 4245f172ef75SAdrian Chadd 4246f172ef75SAdrian Chadd /* 4247f172ef75SAdrian Chadd * Now advance to the next frame in the aggregate. 4248f172ef75SAdrian Chadd */ 4249f172ef75SAdrian Chadd bf = bf_next; 4250f172ef75SAdrian Chadd } 4251f172ef75SAdrian Chadd } 4252f172ef75SAdrian Chadd 4253eb6f0de0SAdrian Chadd /* 4254eb6f0de0SAdrian Chadd * Performs transmit side cleanup when TID changes from aggregated to 4255f172ef75SAdrian Chadd * unaggregated and during reassociation. 4256eb6f0de0SAdrian Chadd * 4257f172ef75SAdrian Chadd * For now, this just tosses everything from the TID software queue 4258f172ef75SAdrian Chadd * whether or not it has been retried and marks the TID as 4259f172ef75SAdrian Chadd * pending completion if there's anything for this TID queued to 4260f172ef75SAdrian Chadd * the hardware. 4261eb6f0de0SAdrian Chadd * 42625da3fc10SAdrian Chadd * The caller is responsible for pausing the TID and unpausing the 42635da3fc10SAdrian Chadd * TID if no cleanup was required. Otherwise the cleanup path will 42645da3fc10SAdrian Chadd * unpause the TID once the last hardware queued frame is completed. 4265eb6f0de0SAdrian Chadd */ 4266eb6f0de0SAdrian Chadd static void 426722780332SAdrian Chadd ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid, 426822780332SAdrian Chadd ath_bufhead *bf_cq) 4269eb6f0de0SAdrian Chadd { 4270eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4271eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 427222780332SAdrian Chadd 427322780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4274eb6f0de0SAdrian Chadd 4275d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4276f172ef75SAdrian Chadd "%s: TID %d: called; inprogress=%d\n", __func__, tid, 4277f172ef75SAdrian Chadd atid->cleanup_inprogress); 4278eb6f0de0SAdrian Chadd 4279eb6f0de0SAdrian Chadd /* 4280f1bc738eSAdrian Chadd * Move the filtered frames to the TX queue, before 4281f1bc738eSAdrian Chadd * we run off and discard/process things. 4282f1bc738eSAdrian Chadd */ 4283f172ef75SAdrian Chadd 4284f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 428513aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) { 428613aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(atid, bf, bf_list); 42873e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4288f1bc738eSAdrian Chadd } 4289f1bc738eSAdrian Chadd 4290f1bc738eSAdrian Chadd /* 4291eb6f0de0SAdrian Chadd * Update the frames in the software TX queue: 4292eb6f0de0SAdrian Chadd * 4293eb6f0de0SAdrian Chadd * + Discard retry frames in the queue 4294eb6f0de0SAdrian Chadd * + Fix the completion function to be non-aggregate 4295eb6f0de0SAdrian Chadd */ 42963e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 4297eb6f0de0SAdrian Chadd while (bf) { 4298eb6f0de0SAdrian Chadd /* 4299f172ef75SAdrian Chadd * Grab the next frame in the list, we may 4300f172ef75SAdrian Chadd * be fiddling with the list. 4301eb6f0de0SAdrian Chadd */ 4302f172ef75SAdrian Chadd bf_next = TAILQ_NEXT(bf, bf_list); 4303f172ef75SAdrian Chadd 4304f172ef75SAdrian Chadd /* 4305f172ef75SAdrian Chadd * Free the frame and all subframes. 4306f172ef75SAdrian Chadd */ 4307f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq); 4308f172ef75SAdrian Chadd 4309f172ef75SAdrian Chadd /* 4310f172ef75SAdrian Chadd * Next frame! 4311f172ef75SAdrian Chadd */ 4312eb6f0de0SAdrian Chadd bf = bf_next; 4313eb6f0de0SAdrian Chadd } 4314eb6f0de0SAdrian Chadd 4315eb6f0de0SAdrian Chadd /* 4316f172ef75SAdrian Chadd * If there's anything in the hardware queue we wait 4317f172ef75SAdrian Chadd * for the TID HWQ to empty. 4318eb6f0de0SAdrian Chadd */ 4319f172ef75SAdrian Chadd if (atid->hwq_depth > 0) { 4320f172ef75SAdrian Chadd /* 4321f172ef75SAdrian Chadd * XXX how about we kill atid->incomp, and instead 4322f172ef75SAdrian Chadd * replace it with a macro that checks that atid->hwq_depth 4323f172ef75SAdrian Chadd * is 0? 4324f172ef75SAdrian Chadd */ 4325f172ef75SAdrian Chadd atid->incomp = atid->hwq_depth; 4326eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 1; 4327eb6f0de0SAdrian Chadd } 4328eb6f0de0SAdrian Chadd 4329eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) 4330eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4331eb6f0de0SAdrian Chadd "%s: TID %d: cleanup needed: %d packets\n", 4332eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4333eb6f0de0SAdrian Chadd 433422780332SAdrian Chadd /* Owner now must free completed frames */ 4335eb6f0de0SAdrian Chadd } 4336eb6f0de0SAdrian Chadd 4337eb6f0de0SAdrian Chadd static struct ath_buf * 433838962489SAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 433938962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 4340eb6f0de0SAdrian Chadd { 4341eb6f0de0SAdrian Chadd struct ath_buf *nbf; 4342eb6f0de0SAdrian Chadd int error; 4343eb6f0de0SAdrian Chadd 43443f3a5dbdSAdrian Chadd /* 43453f3a5dbdSAdrian Chadd * Clone the buffer. This will handle the dma unmap and 43463f3a5dbdSAdrian Chadd * copy the node reference to the new buffer. If this 43473f3a5dbdSAdrian Chadd * works out, 'bf' will have no DMA mapping, no mbuf 43483f3a5dbdSAdrian Chadd * pointer and no node reference. 43493f3a5dbdSAdrian Chadd */ 4350eb6f0de0SAdrian Chadd nbf = ath_buf_clone(sc, bf); 4351eb6f0de0SAdrian Chadd 4352eb6f0de0SAdrian Chadd #if 0 435383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n", 4354eb6f0de0SAdrian Chadd __func__); 4355eb6f0de0SAdrian Chadd #endif 4356eb6f0de0SAdrian Chadd 4357eb6f0de0SAdrian Chadd if (nbf == NULL) { 4358eb6f0de0SAdrian Chadd /* Failed to clone */ 435983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 4360eb6f0de0SAdrian Chadd "%s: failed to clone a busy buffer\n", 4361eb6f0de0SAdrian Chadd __func__); 4362eb6f0de0SAdrian Chadd return NULL; 4363eb6f0de0SAdrian Chadd } 4364eb6f0de0SAdrian Chadd 4365eb6f0de0SAdrian Chadd /* Setup the dma for the new buffer */ 4366eb6f0de0SAdrian Chadd error = ath_tx_dmasetup(sc, nbf, nbf->bf_m); 4367eb6f0de0SAdrian Chadd if (error != 0) { 436883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 4369eb6f0de0SAdrian Chadd "%s: failed to setup dma for clone\n", 4370eb6f0de0SAdrian Chadd __func__); 4371eb6f0de0SAdrian Chadd /* 4372eb6f0de0SAdrian Chadd * Put this at the head of the list, not tail; 4373eb6f0de0SAdrian Chadd * that way it doesn't interfere with the 4374eb6f0de0SAdrian Chadd * busy buffer logic (which uses the tail of 4375eb6f0de0SAdrian Chadd * the list.) 4376eb6f0de0SAdrian Chadd */ 4377eb6f0de0SAdrian Chadd ATH_TXBUF_LOCK(sc); 437832c387f7SAdrian Chadd ath_returnbuf_head(sc, nbf); 4379eb6f0de0SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 4380eb6f0de0SAdrian Chadd return NULL; 4381eb6f0de0SAdrian Chadd } 4382eb6f0de0SAdrian Chadd 438338962489SAdrian Chadd /* Update BAW if required, before we free the original buf */ 438438962489SAdrian Chadd if (bf->bf_state.bfs_dobaw) 438538962489SAdrian Chadd ath_tx_switch_baw_buf(sc, an, tid, bf, nbf); 438638962489SAdrian Chadd 43873f3a5dbdSAdrian Chadd /* Free original buffer; return new buffer */ 4388eb6f0de0SAdrian Chadd ath_freebuf(sc, bf); 4389f1bc738eSAdrian Chadd 4390eb6f0de0SAdrian Chadd return nbf; 4391eb6f0de0SAdrian Chadd } 4392eb6f0de0SAdrian Chadd 4393eb6f0de0SAdrian Chadd /* 4394eb6f0de0SAdrian Chadd * Handle retrying an unaggregate frame in an aggregate 4395eb6f0de0SAdrian Chadd * session. 4396eb6f0de0SAdrian Chadd * 4397eb6f0de0SAdrian Chadd * If too many retries occur, pause the TID, wait for 4398eb6f0de0SAdrian Chadd * any further retransmits (as there's no reason why 4399eb6f0de0SAdrian Chadd * non-aggregate frames in an aggregate session are 4400eb6f0de0SAdrian Chadd * transmitted in-order; they just have to be in-BAW) 4401eb6f0de0SAdrian Chadd * and then queue a BAR. 4402eb6f0de0SAdrian Chadd */ 4403eb6f0de0SAdrian Chadd static void 4404eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4405eb6f0de0SAdrian Chadd { 4406eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4407eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4408eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4409eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4410eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4411eb6f0de0SAdrian Chadd 4412375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4413eb6f0de0SAdrian Chadd 4414eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4415eb6f0de0SAdrian Chadd 4416eb6f0de0SAdrian Chadd /* 4417eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4418eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4419eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4420eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4421eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4422eb6f0de0SAdrian Chadd * for us. 4423eb6f0de0SAdrian Chadd */ 4424eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4425eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4426eb6f0de0SAdrian Chadd struct ath_buf *nbf; 442738962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4428eb6f0de0SAdrian Chadd if (nbf) 4429eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4430eb6f0de0SAdrian Chadd bf = nbf; 4431eb6f0de0SAdrian Chadd else 4432eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4433eb6f0de0SAdrian Chadd } 4434eb6f0de0SAdrian Chadd 4435eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4436eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4437eb6f0de0SAdrian Chadd "%s: exceeded retries; seqno %d\n", 4438eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4439eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4440eb6f0de0SAdrian Chadd 4441eb6f0de0SAdrian Chadd /* Update BAW anyway */ 4442eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4443eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4444eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 444583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4446eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4447eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4448eb6f0de0SAdrian Chadd } 4449eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4450eb6f0de0SAdrian Chadd 445188b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 445288b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 445388b3d483SAdrian Chadd 445488b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 445588b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 445688b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 445788b3d483SAdrian Chadd 4458375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4459eb6f0de0SAdrian Chadd 4460eb6f0de0SAdrian Chadd /* Free buffer, bf is free after this call */ 4461eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4462eb6f0de0SAdrian Chadd return; 4463eb6f0de0SAdrian Chadd } 4464eb6f0de0SAdrian Chadd 4465eb6f0de0SAdrian Chadd /* 4466eb6f0de0SAdrian Chadd * This increments the retry counter as well as 4467eb6f0de0SAdrian Chadd * sets the retry flag in the ath_buf and packet 4468eb6f0de0SAdrian Chadd * body. 4469eb6f0de0SAdrian Chadd */ 4470eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4471f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4472eb6f0de0SAdrian Chadd 4473eb6f0de0SAdrian Chadd /* 4474eb6f0de0SAdrian Chadd * Insert this at the head of the queue, so it's 4475eb6f0de0SAdrian Chadd * retried before any current/subsequent frames. 4476eb6f0de0SAdrian Chadd */ 44773e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4478eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 447988b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 448088b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 448188b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4482eb6f0de0SAdrian Chadd 4483375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4484eb6f0de0SAdrian Chadd } 4485eb6f0de0SAdrian Chadd 4486eb6f0de0SAdrian Chadd /* 4487eb6f0de0SAdrian Chadd * Common code for aggregate excessive retry/subframe retry. 4488eb6f0de0SAdrian Chadd * If retrying, queues buffers to bf_q. If not, frees the 4489eb6f0de0SAdrian Chadd * buffers. 4490eb6f0de0SAdrian Chadd * 4491eb6f0de0SAdrian Chadd * XXX should unify this with ath_tx_aggr_retry_unaggr() 4492eb6f0de0SAdrian Chadd */ 4493eb6f0de0SAdrian Chadd static int 4494eb6f0de0SAdrian Chadd ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf, 4495eb6f0de0SAdrian Chadd ath_bufhead *bf_q) 4496eb6f0de0SAdrian Chadd { 4497eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4498eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4499eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4500eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4501eb6f0de0SAdrian Chadd 4502375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4503eb6f0de0SAdrian Chadd 450421840808SAdrian Chadd /* XXX clr11naggr should be done for all subframes */ 4505eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 4506eb6f0de0SAdrian Chadd ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0); 4507f1bc738eSAdrian Chadd 4508eb6f0de0SAdrian Chadd /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */ 4509eb6f0de0SAdrian Chadd 4510eb6f0de0SAdrian Chadd /* 4511eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4512eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4513eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4514eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4515eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4516eb6f0de0SAdrian Chadd * for us. 4517eb6f0de0SAdrian Chadd */ 4518eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4519eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4520eb6f0de0SAdrian Chadd struct ath_buf *nbf; 452138962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4522eb6f0de0SAdrian Chadd if (nbf) 4523eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4524eb6f0de0SAdrian Chadd bf = nbf; 4525eb6f0de0SAdrian Chadd else 4526eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4527eb6f0de0SAdrian Chadd } 4528eb6f0de0SAdrian Chadd 4529eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4530eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4531eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4532eb6f0de0SAdrian Chadd "%s: max retries: seqno %d\n", 4533eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4534eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4535eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 453683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4537eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4538eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4539eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4540eb6f0de0SAdrian Chadd return 1; 4541eb6f0de0SAdrian Chadd } 4542eb6f0de0SAdrian Chadd 4543eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4544f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4545eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Just to make sure */ 4546eb6f0de0SAdrian Chadd 454721840808SAdrian Chadd /* Clear the aggregate state */ 454821840808SAdrian Chadd bf->bf_state.bfs_aggr = 0; 454921840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; /* ??? needed? */ 455021840808SAdrian Chadd bf->bf_state.bfs_nframes = 1; 455121840808SAdrian Chadd 4552eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 4553eb6f0de0SAdrian Chadd return 0; 4554eb6f0de0SAdrian Chadd } 4555eb6f0de0SAdrian Chadd 4556eb6f0de0SAdrian Chadd /* 4557eb6f0de0SAdrian Chadd * error pkt completion for an aggregate destination 4558eb6f0de0SAdrian Chadd */ 4559eb6f0de0SAdrian Chadd static void 4560eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first, 4561eb6f0de0SAdrian Chadd struct ath_tid *tid) 4562eb6f0de0SAdrian Chadd { 4563eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4564eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4565eb6f0de0SAdrian Chadd struct ath_buf *bf_next, *bf; 4566eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4567eb6f0de0SAdrian Chadd int drops = 0; 4568eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4569eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4570eb6f0de0SAdrian Chadd 4571eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 4572eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4573eb6f0de0SAdrian Chadd 4574eb6f0de0SAdrian Chadd /* 4575eb6f0de0SAdrian Chadd * Update rate control - all frames have failed. 4576eb6f0de0SAdrian Chadd * 4577eb6f0de0SAdrian Chadd * XXX use the length in the first frame in the series; 4578eb6f0de0SAdrian Chadd * XXX just so things are consistent for now. 4579eb6f0de0SAdrian Chadd */ 4580eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc, 4581eb6f0de0SAdrian Chadd &bf_first->bf_status.ds_txstat, 4582eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_pktlen, 4583eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes); 4584eb6f0de0SAdrian Chadd 4585375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4586eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 45872d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_failall++; 4588eb6f0de0SAdrian Chadd 4589eb6f0de0SAdrian Chadd /* Retry all subframes */ 4590eb6f0de0SAdrian Chadd bf = bf_first; 4591eb6f0de0SAdrian Chadd while (bf) { 4592eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4593eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 45942d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 4595eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4596eb6f0de0SAdrian Chadd drops++; 4597eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4598eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4599eb6f0de0SAdrian Chadd } 4600eb6f0de0SAdrian Chadd bf = bf_next; 4601eb6f0de0SAdrian Chadd } 4602eb6f0de0SAdrian Chadd 4603eb6f0de0SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 4604eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4605eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 46063e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 4607eb6f0de0SAdrian Chadd } 4608eb6f0de0SAdrian Chadd 460939da9d42SAdrian Chadd /* 461039da9d42SAdrian Chadd * Schedule the TID to be re-tried. 461139da9d42SAdrian Chadd */ 4612eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 4613eb6f0de0SAdrian Chadd 4614eb6f0de0SAdrian Chadd /* 4615eb6f0de0SAdrian Chadd * send bar if we dropped any frames 4616eb6f0de0SAdrian Chadd * 4617eb6f0de0SAdrian Chadd * Keep the txq lock held for now, as we need to ensure 4618eb6f0de0SAdrian Chadd * that ni_txseqs[] is consistent (as it's being updated 4619eb6f0de0SAdrian Chadd * in the ifnet TX context or raw TX context.) 4620eb6f0de0SAdrian Chadd */ 4621eb6f0de0SAdrian Chadd if (drops) { 462288b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 462388b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, tid); 4624eb6f0de0SAdrian Chadd } 4625eb6f0de0SAdrian Chadd 462688b3d483SAdrian Chadd /* 462788b3d483SAdrian Chadd * Send BAR if required 462888b3d483SAdrian Chadd */ 462988b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, tid)) 463088b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, tid); 4631f1bc738eSAdrian Chadd 4632375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 463388b3d483SAdrian Chadd 4634eb6f0de0SAdrian Chadd /* Complete frames which errored out */ 4635eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4636eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4637eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4638eb6f0de0SAdrian Chadd } 4639eb6f0de0SAdrian Chadd } 4640eb6f0de0SAdrian Chadd 4641eb6f0de0SAdrian Chadd /* 4642eb6f0de0SAdrian Chadd * Handle clean-up of packets from an aggregate list. 4643eb6f0de0SAdrian Chadd * 4644eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4645eb6f0de0SAdrian Chadd * torn down. 4646eb6f0de0SAdrian Chadd */ 4647eb6f0de0SAdrian Chadd static void 4648eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first) 4649eb6f0de0SAdrian Chadd { 4650eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4651eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4652eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4653eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4654eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4655eb6f0de0SAdrian Chadd 4656375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4657eb6f0de0SAdrian Chadd 4658eb6f0de0SAdrian Chadd /* update incomp */ 4659f172ef75SAdrian Chadd atid->incomp--; 4660f172ef75SAdrian Chadd 4661f172ef75SAdrian Chadd /* Update the BAW */ 4662302868d9SAdrian Chadd bf = bf_first; 4663eb6f0de0SAdrian Chadd while (bf) { 4664f172ef75SAdrian Chadd /* XXX refactor! */ 4665f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4666f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4667f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 4668f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 4669f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n", 4670f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4671f172ef75SAdrian Chadd } 4672eb6f0de0SAdrian Chadd bf = bf->bf_next; 4673eb6f0de0SAdrian Chadd } 4674eb6f0de0SAdrian Chadd 4675eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4676eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4677eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4678eb6f0de0SAdrian Chadd __func__, tid); 4679eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4680eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4681eb6f0de0SAdrian Chadd } 468288b3d483SAdrian Chadd 468388b3d483SAdrian Chadd /* Send BAR if required */ 4684f1bc738eSAdrian Chadd /* XXX why would we send a BAR when transitioning to non-aggregation? */ 4685302868d9SAdrian Chadd /* 4686302868d9SAdrian Chadd * XXX TODO: we should likely just tear down the BAR state here, 4687302868d9SAdrian Chadd * rather than sending a BAR. 4688302868d9SAdrian Chadd */ 468988b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 469088b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4691f1bc738eSAdrian Chadd 4692375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4693eb6f0de0SAdrian Chadd 4694706bb444SAdrian Chadd /* Handle frame completion as individual frames */ 4695302868d9SAdrian Chadd bf = bf_first; 4696eb6f0de0SAdrian Chadd while (bf) { 4697eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4698706bb444SAdrian Chadd bf->bf_next = NULL; 4699eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 4700eb6f0de0SAdrian Chadd bf = bf_next; 4701eb6f0de0SAdrian Chadd } 4702eb6f0de0SAdrian Chadd } 4703eb6f0de0SAdrian Chadd 4704eb6f0de0SAdrian Chadd /* 4705eb6f0de0SAdrian Chadd * Handle completion of an set of aggregate frames. 4706eb6f0de0SAdrian Chadd * 4707eb6f0de0SAdrian Chadd * Note: the completion handler is the last descriptor in the aggregate, 4708eb6f0de0SAdrian Chadd * not the last descriptor in the first frame. 4709eb6f0de0SAdrian Chadd */ 4710eb6f0de0SAdrian Chadd static void 4711d4365d16SAdrian Chadd ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first, 4712d4365d16SAdrian Chadd int fail) 4713eb6f0de0SAdrian Chadd { 4714eb6f0de0SAdrian Chadd //struct ath_desc *ds = bf->bf_lastds; 4715eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4716eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4717eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4718eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4719eb6f0de0SAdrian Chadd struct ath_tx_status ts; 4720eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4721eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4722eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4723eb6f0de0SAdrian Chadd int seq_st, tx_ok; 4724eb6f0de0SAdrian Chadd int hasba, isaggr; 4725eb6f0de0SAdrian Chadd uint32_t ba[2]; 4726eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4727eb6f0de0SAdrian Chadd int ba_index; 4728eb6f0de0SAdrian Chadd int drops = 0; 4729eb6f0de0SAdrian Chadd int nframes = 0, nbad = 0, nf; 4730eb6f0de0SAdrian Chadd int pktlen; 4731eb6f0de0SAdrian Chadd /* XXX there's too much on the stack? */ 4732b815538dSAdrian Chadd struct ath_rc_series rc[ATH_RC_NUM]; 4733eb6f0de0SAdrian Chadd int txseq; 4734eb6f0de0SAdrian Chadd 4735eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n", 4736eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4737eb6f0de0SAdrian Chadd 47380aa5c1bbSAdrian Chadd /* 47390aa5c1bbSAdrian Chadd * Take a copy; this may be needed -after- bf_first 47400aa5c1bbSAdrian Chadd * has been completed and freed. 47410aa5c1bbSAdrian Chadd */ 47420aa5c1bbSAdrian Chadd ts = bf_first->bf_status.ds_txstat; 47430aa5c1bbSAdrian Chadd 4744f1bc738eSAdrian Chadd TAILQ_INIT(&bf_q); 4745f1bc738eSAdrian Chadd TAILQ_INIT(&bf_cq); 4746f1bc738eSAdrian Chadd 4747eb6f0de0SAdrian Chadd /* The TID state is kept behind the TXQ lock */ 4748375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4749eb6f0de0SAdrian Chadd 4750eb6f0de0SAdrian Chadd atid->hwq_depth--; 4751eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 475283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n", 4753eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4754eb6f0de0SAdrian Chadd 4755eb6f0de0SAdrian Chadd /* 4756f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 4757f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 4758f1bc738eSAdrian Chadd * function. 47590aa5c1bbSAdrian Chadd * 47600aa5c1bbSAdrian Chadd * XXX this is duplicate work, ew. 4761f1bc738eSAdrian Chadd */ 4762f1bc738eSAdrian Chadd if (atid->isfiltered) 4763f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4764f1bc738eSAdrian Chadd 4765f1bc738eSAdrian Chadd /* 4766eb6f0de0SAdrian Chadd * Punt cleanup to the relevant function, not our problem now 4767eb6f0de0SAdrian Chadd */ 4768eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 4769f1bc738eSAdrian Chadd if (atid->isfiltered) 477083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4771f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 4772f1bc738eSAdrian Chadd __func__); 4773375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4774eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(sc, bf_first); 4775eb6f0de0SAdrian Chadd return; 4776eb6f0de0SAdrian Chadd } 4777eb6f0de0SAdrian Chadd 4778eb6f0de0SAdrian Chadd /* 4779f1bc738eSAdrian Chadd * If the frame is filtered, transition to filtered frame 4780f1bc738eSAdrian Chadd * mode and add this to the filtered frame list. 4781f1bc738eSAdrian Chadd * 4782f1bc738eSAdrian Chadd * XXX TODO: figure out how this interoperates with 4783f1bc738eSAdrian Chadd * BAR, pause and cleanup states. 4784f1bc738eSAdrian Chadd */ 4785f1bc738eSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 4786f1bc738eSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 4787f1bc738eSAdrian Chadd if (fail != 0) 478883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4789f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", __func__, fail); 4790f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq); 4791f1bc738eSAdrian Chadd 4792f1bc738eSAdrian Chadd /* Remove from BAW */ 4793f1bc738eSAdrian Chadd TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) { 4794f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 4795f1bc738eSAdrian Chadd drops++; 4796f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4797f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4798f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 479983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4800f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 4801f1bc738eSAdrian Chadd __func__, 4802f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4803f1bc738eSAdrian Chadd } 4804f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4805f1bc738eSAdrian Chadd } 4806f1bc738eSAdrian Chadd /* 4807f1bc738eSAdrian Chadd * If any intermediate frames in the BAW were dropped when 4808f1bc738eSAdrian Chadd * handling filtering things, send a BAR. 4809f1bc738eSAdrian Chadd */ 4810f1bc738eSAdrian Chadd if (drops) 4811f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 4812f1bc738eSAdrian Chadd 4813f1bc738eSAdrian Chadd /* 4814f1bc738eSAdrian Chadd * Finish up by sending a BAR if required and freeing 4815f1bc738eSAdrian Chadd * the frames outside of the TX lock. 4816f1bc738eSAdrian Chadd */ 4817f1bc738eSAdrian Chadd goto finish_send_bar; 4818f1bc738eSAdrian Chadd } 4819f1bc738eSAdrian Chadd 4820f1bc738eSAdrian Chadd /* 4821eb6f0de0SAdrian Chadd * XXX for now, use the first frame in the aggregate for 4822eb6f0de0SAdrian Chadd * XXX rate control completion; it's at least consistent. 4823eb6f0de0SAdrian Chadd */ 4824eb6f0de0SAdrian Chadd pktlen = bf_first->bf_state.bfs_pktlen; 4825eb6f0de0SAdrian Chadd 4826eb6f0de0SAdrian Chadd /* 4827e9a6408eSAdrian Chadd * Handle errors first! 4828e9a6408eSAdrian Chadd * 4829e9a6408eSAdrian Chadd * Here, handle _any_ error as a "exceeded retries" error. 4830e9a6408eSAdrian Chadd * Later on (when filtered frames are to be specially handled) 4831e9a6408eSAdrian Chadd * it'll have to be expanded. 4832eb6f0de0SAdrian Chadd */ 4833e9a6408eSAdrian Chadd #if 0 4834eb6f0de0SAdrian Chadd if (ts.ts_status & HAL_TXERR_XRETRY) { 4835e9a6408eSAdrian Chadd #endif 4836e9a6408eSAdrian Chadd if (ts.ts_status != 0) { 4837375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4838eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(sc, bf_first, atid); 4839eb6f0de0SAdrian Chadd return; 4840eb6f0de0SAdrian Chadd } 4841eb6f0de0SAdrian Chadd 4842eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4843eb6f0de0SAdrian Chadd 4844eb6f0de0SAdrian Chadd /* 4845eb6f0de0SAdrian Chadd * extract starting sequence and block-ack bitmap 4846eb6f0de0SAdrian Chadd */ 4847eb6f0de0SAdrian Chadd /* XXX endian-ness of seq_st, ba? */ 4848eb6f0de0SAdrian Chadd seq_st = ts.ts_seqnum; 4849eb6f0de0SAdrian Chadd hasba = !! (ts.ts_flags & HAL_TX_BA); 4850eb6f0de0SAdrian Chadd tx_ok = (ts.ts_status == 0); 4851eb6f0de0SAdrian Chadd isaggr = bf_first->bf_state.bfs_aggr; 4852eb6f0de0SAdrian Chadd ba[0] = ts.ts_ba_low; 4853eb6f0de0SAdrian Chadd ba[1] = ts.ts_ba_high; 4854eb6f0de0SAdrian Chadd 4855eb6f0de0SAdrian Chadd /* 4856eb6f0de0SAdrian Chadd * Copy the TX completion status and the rate control 4857eb6f0de0SAdrian Chadd * series from the first descriptor, as it may be freed 4858eb6f0de0SAdrian Chadd * before the rate control code can get its grubby fingers 4859eb6f0de0SAdrian Chadd * into things. 4860eb6f0de0SAdrian Chadd */ 4861eb6f0de0SAdrian Chadd memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc)); 4862eb6f0de0SAdrian Chadd 4863eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4864d4365d16SAdrian Chadd "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, " 4865d4365d16SAdrian Chadd "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n", 4866eb6f0de0SAdrian Chadd __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags, 4867eb6f0de0SAdrian Chadd isaggr, seq_st, hasba, ba[0], ba[1]); 4868eb6f0de0SAdrian Chadd 4869b3420862SAdrian Chadd /* 4870b3420862SAdrian Chadd * The reference driver doesn't do this; it simply ignores 4871b3420862SAdrian Chadd * this check in its entirety. 4872b3420862SAdrian Chadd * 4873b3420862SAdrian Chadd * I've seen this occur when using iperf to send traffic 4874b3420862SAdrian Chadd * out tid 1 - the aggregate frames are all marked as TID 1, 4875b3420862SAdrian Chadd * but the TXSTATUS has TID=0. So, let's just ignore this 4876b3420862SAdrian Chadd * check. 4877b3420862SAdrian Chadd */ 4878b3420862SAdrian Chadd #if 0 4879eb6f0de0SAdrian Chadd /* Occasionally, the MAC sends a tx status for the wrong TID. */ 4880eb6f0de0SAdrian Chadd if (tid != ts.ts_tid) { 488183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n", 4882eb6f0de0SAdrian Chadd __func__, tid, ts.ts_tid); 4883eb6f0de0SAdrian Chadd tx_ok = 0; 4884eb6f0de0SAdrian Chadd } 4885b3420862SAdrian Chadd #endif 4886eb6f0de0SAdrian Chadd 4887eb6f0de0SAdrian Chadd /* AR5416 BA bug; this requires an interface reset */ 4888eb6f0de0SAdrian Chadd if (isaggr && tx_ok && (! hasba)) { 488982525db1SAdrian Chadd device_printf(sc->sc_dev, 4890d4365d16SAdrian Chadd "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, " 4891d4365d16SAdrian Chadd "seq_st=%d\n", 4892eb6f0de0SAdrian Chadd __func__, hasba, tx_ok, isaggr, seq_st); 4893eb6f0de0SAdrian Chadd /* XXX TODO: schedule an interface reset */ 48940f078d63SJohn Baldwin #ifdef ATH_DEBUG 48956abbbae5SAdrian Chadd ath_printtxbuf(sc, bf_first, 48966abbbae5SAdrian Chadd sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0); 48970f078d63SJohn Baldwin #endif 4898eb6f0de0SAdrian Chadd } 4899eb6f0de0SAdrian Chadd 4900eb6f0de0SAdrian Chadd /* 4901eb6f0de0SAdrian Chadd * Walk the list of frames, figure out which ones were correctly 4902eb6f0de0SAdrian Chadd * sent and which weren't. 4903eb6f0de0SAdrian Chadd */ 4904eb6f0de0SAdrian Chadd bf = bf_first; 4905eb6f0de0SAdrian Chadd nf = bf_first->bf_state.bfs_nframes; 4906eb6f0de0SAdrian Chadd 4907eb6f0de0SAdrian Chadd /* bf_first is going to be invalid once this list is walked */ 4908eb6f0de0SAdrian Chadd bf_first = NULL; 4909eb6f0de0SAdrian Chadd 4910eb6f0de0SAdrian Chadd /* 4911eb6f0de0SAdrian Chadd * Walk the list of completed frames and determine 4912eb6f0de0SAdrian Chadd * which need to be completed and which need to be 4913eb6f0de0SAdrian Chadd * retransmitted. 4914eb6f0de0SAdrian Chadd * 4915eb6f0de0SAdrian Chadd * For completed frames, the completion functions need 4916eb6f0de0SAdrian Chadd * to be called at the end of this function as the last 4917eb6f0de0SAdrian Chadd * node reference may free the node. 4918eb6f0de0SAdrian Chadd * 4919eb6f0de0SAdrian Chadd * Finally, since the TXQ lock can't be held during the 4920eb6f0de0SAdrian Chadd * completion callback (to avoid lock recursion), 4921eb6f0de0SAdrian Chadd * the completion calls have to be done outside of the 4922eb6f0de0SAdrian Chadd * lock. 4923eb6f0de0SAdrian Chadd */ 4924eb6f0de0SAdrian Chadd while (bf) { 4925eb6f0de0SAdrian Chadd nframes++; 4926d4365d16SAdrian Chadd ba_index = ATH_BA_INDEX(seq_st, 4927d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4928eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4929eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 4930eb6f0de0SAdrian Chadd 4931eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4932eb6f0de0SAdrian Chadd "%s: checking bf=%p seqno=%d; ack=%d\n", 4933eb6f0de0SAdrian Chadd __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 4934eb6f0de0SAdrian Chadd ATH_BA_ISSET(ba, ba_index)); 4935eb6f0de0SAdrian Chadd 4936eb6f0de0SAdrian Chadd if (tx_ok && ATH_BA_ISSET(ba, ba_index)) { 49372d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_ok++; 4938eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4939eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4940eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 494183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4942eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4943eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4944eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4945eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4946eb6f0de0SAdrian Chadd } else { 49472d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 4948eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4949eb6f0de0SAdrian Chadd drops++; 4950eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4951eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4952eb6f0de0SAdrian Chadd } 4953eb6f0de0SAdrian Chadd nbad++; 4954eb6f0de0SAdrian Chadd } 4955eb6f0de0SAdrian Chadd bf = bf_next; 4956eb6f0de0SAdrian Chadd } 4957eb6f0de0SAdrian Chadd 4958eb6f0de0SAdrian Chadd /* 4959eb6f0de0SAdrian Chadd * Now that the BAW updates have been done, unlock 4960eb6f0de0SAdrian Chadd * 4961eb6f0de0SAdrian Chadd * txseq is grabbed before the lock is released so we 4962eb6f0de0SAdrian Chadd * have a consistent view of what -was- in the BAW. 4963eb6f0de0SAdrian Chadd * Anything after this point will not yet have been 4964eb6f0de0SAdrian Chadd * TXed. 4965eb6f0de0SAdrian Chadd */ 4966eb6f0de0SAdrian Chadd txseq = tap->txa_start; 4967375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4968eb6f0de0SAdrian Chadd 4969eb6f0de0SAdrian Chadd if (nframes != nf) 497083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4971eb6f0de0SAdrian Chadd "%s: num frames seen=%d; bf nframes=%d\n", 4972eb6f0de0SAdrian Chadd __func__, nframes, nf); 4973eb6f0de0SAdrian Chadd 4974eb6f0de0SAdrian Chadd /* 4975eb6f0de0SAdrian Chadd * Now we know how many frames were bad, call the rate 4976eb6f0de0SAdrian Chadd * control code. 4977eb6f0de0SAdrian Chadd */ 4978eb6f0de0SAdrian Chadd if (fail == 0) 4979d4365d16SAdrian Chadd ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes, 4980d4365d16SAdrian Chadd nbad); 4981eb6f0de0SAdrian Chadd 4982eb6f0de0SAdrian Chadd /* 4983eb6f0de0SAdrian Chadd * send bar if we dropped any frames 4984eb6f0de0SAdrian Chadd */ 4985eb6f0de0SAdrian Chadd if (drops) { 498688b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 4987375307d4SAdrian Chadd ATH_TX_LOCK(sc); 498888b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 4989375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4990eb6f0de0SAdrian Chadd } 4991eb6f0de0SAdrian Chadd 499239da9d42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 499339da9d42SAdrian Chadd "%s: txa_start now %d\n", __func__, tap->txa_start); 499439da9d42SAdrian Chadd 4995375307d4SAdrian Chadd ATH_TX_LOCK(sc); 499639da9d42SAdrian Chadd 499739da9d42SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 4998eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4999eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 50003e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 5001eb6f0de0SAdrian Chadd } 5002eb6f0de0SAdrian Chadd 500339da9d42SAdrian Chadd /* 500439da9d42SAdrian Chadd * Reschedule to grab some further frames. 500539da9d42SAdrian Chadd */ 500639da9d42SAdrian Chadd ath_tx_tid_sched(sc, atid); 5007eb6f0de0SAdrian Chadd 500888b3d483SAdrian Chadd /* 5009f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 5010f1bc738eSAdrian Chadd * 5011f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 5012f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 5013f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 5014f1bc738eSAdrian Chadd * (complete or otherwise) frame. 5015f1bc738eSAdrian Chadd * 5016f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 5017f1bc738eSAdrian Chadd */ 5018f1bc738eSAdrian Chadd if (atid->isfiltered) 5019f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5020f1bc738eSAdrian Chadd 5021f1bc738eSAdrian Chadd finish_send_bar: 5022f1bc738eSAdrian Chadd 5023f1bc738eSAdrian Chadd /* 502488b3d483SAdrian Chadd * Send BAR if required 502588b3d483SAdrian Chadd */ 502688b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 502788b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 502839da9d42SAdrian Chadd 5029375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 503088b3d483SAdrian Chadd 5031eb6f0de0SAdrian Chadd /* Do deferred completion */ 5032eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 5033eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 5034eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 5035eb6f0de0SAdrian Chadd } 5036eb6f0de0SAdrian Chadd } 5037eb6f0de0SAdrian Chadd 5038eb6f0de0SAdrian Chadd /* 5039eb6f0de0SAdrian Chadd * Handle completion of unaggregated frames in an ADDBA 5040eb6f0de0SAdrian Chadd * session. 5041eb6f0de0SAdrian Chadd * 5042eb6f0de0SAdrian Chadd * Fail is set to 1 if the entry is being freed via a call to 5043eb6f0de0SAdrian Chadd * ath_tx_draintxq(). 5044eb6f0de0SAdrian Chadd */ 5045eb6f0de0SAdrian Chadd static void 5046eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail) 5047eb6f0de0SAdrian Chadd { 5048eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 5049eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5050eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 5051eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 50520aa5c1bbSAdrian Chadd struct ath_tx_status ts; 5053f1bc738eSAdrian Chadd int drops = 0; 5054eb6f0de0SAdrian Chadd 5055eb6f0de0SAdrian Chadd /* 50560aa5c1bbSAdrian Chadd * Take a copy of this; filtering/cloning the frame may free the 50570aa5c1bbSAdrian Chadd * bf pointer. 50580aa5c1bbSAdrian Chadd */ 50590aa5c1bbSAdrian Chadd ts = bf->bf_status.ds_txstat; 50600aa5c1bbSAdrian Chadd 50610aa5c1bbSAdrian Chadd /* 5062eb6f0de0SAdrian Chadd * Update rate control status here, before we possibly 5063eb6f0de0SAdrian Chadd * punt to retry or cleanup. 5064eb6f0de0SAdrian Chadd * 5065eb6f0de0SAdrian Chadd * Do it outside of the TXQ lock. 5066eb6f0de0SAdrian Chadd */ 5067875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 5068eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 5069eb6f0de0SAdrian Chadd &bf->bf_status.ds_txstat, 5070eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, 50710aa5c1bbSAdrian Chadd 1, (ts.ts_status == 0) ? 0 : 1); 5072eb6f0de0SAdrian Chadd 5073eb6f0de0SAdrian Chadd /* 5074eb6f0de0SAdrian Chadd * This is called early so atid->hwq_depth can be tracked. 5075eb6f0de0SAdrian Chadd * This unfortunately means that it's released and regrabbed 5076eb6f0de0SAdrian Chadd * during retry and cleanup. That's rather inefficient. 5077eb6f0de0SAdrian Chadd */ 5078375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5079eb6f0de0SAdrian Chadd 5080eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 508183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__); 5082eb6f0de0SAdrian Chadd 5083d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 5084d4365d16SAdrian Chadd "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n", 5085d4365d16SAdrian Chadd __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth, 5086d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 5087eb6f0de0SAdrian Chadd 5088eb6f0de0SAdrian Chadd atid->hwq_depth--; 5089eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 509083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 5091eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 5092eb6f0de0SAdrian Chadd 5093eb6f0de0SAdrian Chadd /* 5094f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 5095f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 5096f1bc738eSAdrian Chadd * function. 5097f1bc738eSAdrian Chadd */ 5098f1bc738eSAdrian Chadd if (atid->isfiltered) 5099f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5100f1bc738eSAdrian Chadd 5101f1bc738eSAdrian Chadd /* 5102eb6f0de0SAdrian Chadd * If a cleanup is in progress, punt to comp_cleanup; 5103eb6f0de0SAdrian Chadd * rather than handling it here. It's thus their 5104eb6f0de0SAdrian Chadd * responsibility to clean up, call the completion 5105eb6f0de0SAdrian Chadd * function in net80211, etc. 5106eb6f0de0SAdrian Chadd */ 5107eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 5108f1bc738eSAdrian Chadd if (atid->isfiltered) 510983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5110f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 5111f1bc738eSAdrian Chadd __func__); 5112375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5113d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n", 5114d4365d16SAdrian Chadd __func__); 5115eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(sc, bf); 5116eb6f0de0SAdrian Chadd return; 5117eb6f0de0SAdrian Chadd } 5118eb6f0de0SAdrian Chadd 5119eb6f0de0SAdrian Chadd /* 5120f1bc738eSAdrian Chadd * XXX TODO: how does cleanup, BAR and filtered frame handling 5121f1bc738eSAdrian Chadd * overlap? 5122f1bc738eSAdrian Chadd * 5123f1bc738eSAdrian Chadd * If the frame is filtered OR if it's any failure but 5124f1bc738eSAdrian Chadd * the TID is filtered, the frame must be added to the 5125f1bc738eSAdrian Chadd * filtered frame list. 5126f1bc738eSAdrian Chadd * 5127f1bc738eSAdrian Chadd * However - a busy buffer can't be added to the filtered 5128f1bc738eSAdrian Chadd * list as it will end up being recycled without having 5129f1bc738eSAdrian Chadd * been made available for the hardware. 5130f1bc738eSAdrian Chadd */ 51310aa5c1bbSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 51320aa5c1bbSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 5133f1bc738eSAdrian Chadd int freeframe; 5134f1bc738eSAdrian Chadd 5135f1bc738eSAdrian Chadd if (fail != 0) 513683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5137f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", 513883bbd5ebSRui Paulo __func__, fail); 5139f1bc738eSAdrian Chadd freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf); 514042fdd8e7SAdrian Chadd /* 514142fdd8e7SAdrian Chadd * If freeframe=0 then bf is no longer ours; don't 514242fdd8e7SAdrian Chadd * touch it. 514342fdd8e7SAdrian Chadd */ 5144f1bc738eSAdrian Chadd if (freeframe) { 5145f1bc738eSAdrian Chadd /* Remove from BAW */ 5146f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 5147f1bc738eSAdrian Chadd drops++; 5148f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5149f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5150f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 515183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5152f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 5153f1bc738eSAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5154f1bc738eSAdrian Chadd } 5155f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5156f1bc738eSAdrian Chadd } 5157f1bc738eSAdrian Chadd 5158f1bc738eSAdrian Chadd /* 5159f1bc738eSAdrian Chadd * If the frame couldn't be filtered, treat it as a drop and 5160f1bc738eSAdrian Chadd * prepare to send a BAR. 5161f1bc738eSAdrian Chadd */ 5162f1bc738eSAdrian Chadd if (freeframe && drops) 5163f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 5164f1bc738eSAdrian Chadd 5165f1bc738eSAdrian Chadd /* 5166f1bc738eSAdrian Chadd * Send BAR if required 5167f1bc738eSAdrian Chadd */ 5168f1bc738eSAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 5169f1bc738eSAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 5170f1bc738eSAdrian Chadd 5171375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5172f1bc738eSAdrian Chadd /* 5173f1bc738eSAdrian Chadd * If freeframe is set, then the frame couldn't be 5174f1bc738eSAdrian Chadd * cloned and bf is still valid. Just complete/free it. 5175f1bc738eSAdrian Chadd */ 5176f1bc738eSAdrian Chadd if (freeframe) 5177f1bc738eSAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5178f1bc738eSAdrian Chadd 5179f1bc738eSAdrian Chadd return; 5180f1bc738eSAdrian Chadd } 5181f1bc738eSAdrian Chadd /* 5182eb6f0de0SAdrian Chadd * Don't bother with the retry check if all frames 5183eb6f0de0SAdrian Chadd * are being failed (eg during queue deletion.) 5184eb6f0de0SAdrian Chadd */ 5185e9a6408eSAdrian Chadd #if 0 5186eb6f0de0SAdrian Chadd if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) { 5187e9a6408eSAdrian Chadd #endif 51880aa5c1bbSAdrian Chadd if (fail == 0 && ts.ts_status != 0) { 5189375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5190d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n", 5191d4365d16SAdrian Chadd __func__); 5192eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(sc, bf); 5193eb6f0de0SAdrian Chadd return; 5194eb6f0de0SAdrian Chadd } 5195eb6f0de0SAdrian Chadd 5196eb6f0de0SAdrian Chadd /* Success? Complete */ 5197eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n", 5198eb6f0de0SAdrian Chadd __func__, tid, SEQNO(bf->bf_state.bfs_seqno)); 5199eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5200eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5201eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5202eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 520383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5204eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 5205eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5206eb6f0de0SAdrian Chadd } 5207eb6f0de0SAdrian Chadd 520888b3d483SAdrian Chadd /* 5209f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 5210f1bc738eSAdrian Chadd * 5211f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 5212f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 5213f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 5214f1bc738eSAdrian Chadd * (complete or otherwise) frame. 5215f1bc738eSAdrian Chadd * 5216f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 5217f1bc738eSAdrian Chadd */ 5218f1bc738eSAdrian Chadd if (atid->isfiltered) 5219f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5220f1bc738eSAdrian Chadd 5221f1bc738eSAdrian Chadd /* 522288b3d483SAdrian Chadd * Send BAR if required 522388b3d483SAdrian Chadd */ 522488b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 522588b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 522688b3d483SAdrian Chadd 5227375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5228eb6f0de0SAdrian Chadd 5229eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5230eb6f0de0SAdrian Chadd /* bf is freed at this point */ 5231eb6f0de0SAdrian Chadd } 5232eb6f0de0SAdrian Chadd 5233eb6f0de0SAdrian Chadd void 5234eb6f0de0SAdrian Chadd ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 5235eb6f0de0SAdrian Chadd { 5236eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_aggr) 5237eb6f0de0SAdrian Chadd ath_tx_aggr_comp_aggr(sc, bf, fail); 5238eb6f0de0SAdrian Chadd else 5239eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(sc, bf, fail); 5240eb6f0de0SAdrian Chadd } 5241eb6f0de0SAdrian Chadd 5242eb6f0de0SAdrian Chadd /* 5243eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 5244eb6f0de0SAdrian Chadd * 5245eb6f0de0SAdrian Chadd * This is the aggregate version. 5246eb6f0de0SAdrian Chadd */ 5247eb6f0de0SAdrian Chadd void 5248eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an, 5249eb6f0de0SAdrian Chadd struct ath_tid *tid) 5250eb6f0de0SAdrian Chadd { 5251eb6f0de0SAdrian Chadd struct ath_buf *bf; 5252eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5253eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5254eb6f0de0SAdrian Chadd ATH_AGGR_STATUS status; 5255eb6f0de0SAdrian Chadd ath_bufhead bf_q; 5256eb6f0de0SAdrian Chadd 5257eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid); 5258375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5259eb6f0de0SAdrian Chadd 526022a3aee6SAdrian Chadd /* 526122a3aee6SAdrian Chadd * XXX TODO: If we're called for a queue that we're leaking frames to, 526222a3aee6SAdrian Chadd * ensure we only leak one. 526322a3aee6SAdrian Chadd */ 526422a3aee6SAdrian Chadd 5265eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 5266eb6f0de0SAdrian Chadd 5267eb6f0de0SAdrian Chadd if (tid->tid == IEEE80211_NONQOS_TID) 526883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 526983bbd5ebSRui Paulo "%s: called for TID=NONQOS_TID?\n", __func__); 5270eb6f0de0SAdrian Chadd 5271eb6f0de0SAdrian Chadd for (;;) { 5272eb6f0de0SAdrian Chadd status = ATH_AGGR_DONE; 5273eb6f0de0SAdrian Chadd 5274eb6f0de0SAdrian Chadd /* 5275eb6f0de0SAdrian Chadd * If the upper layer has paused the TID, don't 5276eb6f0de0SAdrian Chadd * queue any further packets. 5277eb6f0de0SAdrian Chadd * 5278eb6f0de0SAdrian Chadd * This can also occur from the completion task because 5279eb6f0de0SAdrian Chadd * of packet loss; but as its serialised with this code, 5280eb6f0de0SAdrian Chadd * it won't "appear" half way through queuing packets. 5281eb6f0de0SAdrian Chadd */ 528222a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5283eb6f0de0SAdrian Chadd break; 5284eb6f0de0SAdrian Chadd 52853e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5286eb6f0de0SAdrian Chadd if (bf == NULL) { 5287eb6f0de0SAdrian Chadd break; 5288eb6f0de0SAdrian Chadd } 5289eb6f0de0SAdrian Chadd 5290eb6f0de0SAdrian Chadd /* 5291eb6f0de0SAdrian Chadd * If the packet doesn't fall within the BAW (eg a NULL 5292eb6f0de0SAdrian Chadd * data frame), schedule it directly; continue. 5293eb6f0de0SAdrian Chadd */ 5294eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 5295d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5296d4365d16SAdrian Chadd "%s: non-baw packet\n", 5297eb6f0de0SAdrian Chadd __func__); 52983e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 52992a9f83afSAdrian Chadd 53002a9f83afSAdrian Chadd if (bf->bf_state.bfs_nframes > 1) 530183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 53022a9f83afSAdrian Chadd "%s: aggr=%d, nframes=%d\n", 53032a9f83afSAdrian Chadd __func__, 53042a9f83afSAdrian Chadd bf->bf_state.bfs_aggr, 53052a9f83afSAdrian Chadd bf->bf_state.bfs_nframes); 53062a9f83afSAdrian Chadd 53072a9f83afSAdrian Chadd /* 53082a9f83afSAdrian Chadd * This shouldn't happen - such frames shouldn't 53092a9f83afSAdrian Chadd * ever have been queued as an aggregate in the 53102a9f83afSAdrian Chadd * first place. However, make sure the fields 53112a9f83afSAdrian Chadd * are correctly setup just to be totally sure. 53122a9f83afSAdrian Chadd */ 5313eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 53142a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 53152a9f83afSAdrian Chadd 53164e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 53174e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 53184e81f27cSAdrian Chadd 5319eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5320e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5321e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5322eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5323e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5324eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5325eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5326eb6f0de0SAdrian Chadd 5327eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_nonbaw_pkt++; 5328eb6f0de0SAdrian Chadd 5329eb6f0de0SAdrian Chadd /* Queue the packet; continue */ 5330eb6f0de0SAdrian Chadd goto queuepkt; 5331eb6f0de0SAdrian Chadd } 5332eb6f0de0SAdrian Chadd 5333eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 5334eb6f0de0SAdrian Chadd 5335eb6f0de0SAdrian Chadd /* 5336eb6f0de0SAdrian Chadd * Do a rate control lookup on the first frame in the 5337eb6f0de0SAdrian Chadd * list. The rate control code needs that to occur 5338eb6f0de0SAdrian Chadd * before it can determine whether to TX. 5339eb6f0de0SAdrian Chadd * It's inaccurate because the rate control code doesn't 5340eb6f0de0SAdrian Chadd * really "do" aggregate lookups, so it only considers 5341eb6f0de0SAdrian Chadd * the size of the first frame. 5342eb6f0de0SAdrian Chadd */ 5343eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5344eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = 0; 5345eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = 0; 5346e2e4a2c2SAdrian Chadd 5347e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5348e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5349e2e4a2c2SAdrian Chadd 5350e2e4a2c2SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5351eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5352eb6f0de0SAdrian Chadd 5353eb6f0de0SAdrian Chadd status = ath_tx_form_aggr(sc, an, tid, &bf_q); 5354eb6f0de0SAdrian Chadd 5355eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5356eb6f0de0SAdrian Chadd "%s: ath_tx_form_aggr() status=%d\n", __func__, status); 5357eb6f0de0SAdrian Chadd 5358eb6f0de0SAdrian Chadd /* 5359eb6f0de0SAdrian Chadd * No frames to be picked up - out of BAW 5360eb6f0de0SAdrian Chadd */ 5361eb6f0de0SAdrian Chadd if (TAILQ_EMPTY(&bf_q)) 5362eb6f0de0SAdrian Chadd break; 5363eb6f0de0SAdrian Chadd 5364eb6f0de0SAdrian Chadd /* 5365eb6f0de0SAdrian Chadd * This assumes that the descriptor list in the ath_bufhead 5366eb6f0de0SAdrian Chadd * are already linked together via bf_next pointers. 5367eb6f0de0SAdrian Chadd */ 5368eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&bf_q); 5369eb6f0de0SAdrian Chadd 5370e2e4a2c2SAdrian Chadd if (status == ATH_AGGR_8K_LIMITED) 5371e2e4a2c2SAdrian Chadd sc->sc_aggr_stats.aggr_rts_aggr_limited++; 5372e2e4a2c2SAdrian Chadd 5373eb6f0de0SAdrian Chadd /* 5374eb6f0de0SAdrian Chadd * If it's the only frame send as non-aggregate 5375eb6f0de0SAdrian Chadd * assume that ath_tx_form_aggr() has checked 5376eb6f0de0SAdrian Chadd * whether it's in the BAW and added it appropriately. 5377eb6f0de0SAdrian Chadd */ 5378eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_nframes == 1) { 5379eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5380eb6f0de0SAdrian Chadd "%s: single-frame aggregate\n", __func__); 53814e81f27cSAdrian Chadd 53824e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 53834e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 53844e81f27cSAdrian Chadd 5385eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 538621840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; 5387eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5388eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5389eb6f0de0SAdrian Chadd if (status == ATH_AGGR_BAW_CLOSED) 5390eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_baw_closed_single_pkt++; 5391eb6f0de0SAdrian Chadd else 5392eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_single_pkt++; 5393eb6f0de0SAdrian Chadd } else { 5394eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5395d4365d16SAdrian Chadd "%s: multi-frame aggregate: %d frames, " 5396d4365d16SAdrian Chadd "length %d\n", 5397eb6f0de0SAdrian Chadd __func__, bf->bf_state.bfs_nframes, 5398eb6f0de0SAdrian Chadd bf->bf_state.bfs_al); 5399eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 1; 5400eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++; 5401eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_aggr_pkt++; 5402eb6f0de0SAdrian Chadd 54034e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 54044e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 54054e81f27cSAdrian Chadd 5406eb6f0de0SAdrian Chadd /* 5407e2e4a2c2SAdrian Chadd * Calculate the duration/protection as required. 5408e2e4a2c2SAdrian Chadd */ 5409e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5410e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5411e2e4a2c2SAdrian Chadd 5412e2e4a2c2SAdrian Chadd /* 5413eb6f0de0SAdrian Chadd * Update the rate and rtscts information based on the 5414eb6f0de0SAdrian Chadd * rate decision made by the rate control code; 5415eb6f0de0SAdrian Chadd * the first frame in the aggregate needs it. 5416eb6f0de0SAdrian Chadd */ 5417eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5418eb6f0de0SAdrian Chadd 5419eb6f0de0SAdrian Chadd /* 5420eb6f0de0SAdrian Chadd * Setup the relevant descriptor fields 5421eb6f0de0SAdrian Chadd * for aggregation. The first descriptor 5422eb6f0de0SAdrian Chadd * already points to the rest in the chain. 5423eb6f0de0SAdrian Chadd */ 5424eb6f0de0SAdrian Chadd ath_tx_setds_11n(sc, bf); 5425eb6f0de0SAdrian Chadd 5426eb6f0de0SAdrian Chadd } 5427eb6f0de0SAdrian Chadd queuepkt: 5428eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 5429eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 5430eb6f0de0SAdrian Chadd 5431eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 543283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__); 5433eb6f0de0SAdrian Chadd 543422a3aee6SAdrian Chadd /* 543522a3aee6SAdrian Chadd * Update leak count and frame config if were leaking frames. 543622a3aee6SAdrian Chadd * 543722a3aee6SAdrian Chadd * XXX TODO: it should update all frames in an aggregate 543822a3aee6SAdrian Chadd * correctly! 543922a3aee6SAdrian Chadd */ 544022a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 544122a3aee6SAdrian Chadd 5442eb6f0de0SAdrian Chadd /* Punt to txq */ 5443eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5444eb6f0de0SAdrian Chadd 5445eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5446eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5447eb6f0de0SAdrian Chadd tid->hwq_depth++; 5448eb6f0de0SAdrian Chadd 5449eb6f0de0SAdrian Chadd /* 5450eb6f0de0SAdrian Chadd * Break out if ath_tx_form_aggr() indicated 5451eb6f0de0SAdrian Chadd * there can't be any further progress (eg BAW is full.) 5452eb6f0de0SAdrian Chadd * Checking for an empty txq is done above. 5453eb6f0de0SAdrian Chadd * 5454eb6f0de0SAdrian Chadd * XXX locking on txq here? 5455eb6f0de0SAdrian Chadd */ 545672910f03SAdrian Chadd /* XXX TXQ locking */ 545772910f03SAdrian Chadd if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr || 545822a3aee6SAdrian Chadd (status == ATH_AGGR_BAW_CLOSED || 545922a3aee6SAdrian Chadd status == ATH_AGGR_LEAK_CLOSED)) 5460eb6f0de0SAdrian Chadd break; 5461eb6f0de0SAdrian Chadd } 5462eb6f0de0SAdrian Chadd } 5463eb6f0de0SAdrian Chadd 5464eb6f0de0SAdrian Chadd /* 5465eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 546672910f03SAdrian Chadd * 546772910f03SAdrian Chadd * XXX TODO: this routine doesn't enforce the maximum TXQ depth. 546872910f03SAdrian Chadd * It just dumps frames into the TXQ. We should limit how deep 546972910f03SAdrian Chadd * the transmit queue can grow for frames dispatched to the given 547072910f03SAdrian Chadd * TXQ. 547172910f03SAdrian Chadd * 547272910f03SAdrian Chadd * To avoid locking issues, either we need to own the TXQ lock 547372910f03SAdrian Chadd * at this point, or we need to pass in the maximum frame count 547472910f03SAdrian Chadd * from the caller. 5475eb6f0de0SAdrian Chadd */ 5476eb6f0de0SAdrian Chadd void 5477eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an, 5478eb6f0de0SAdrian Chadd struct ath_tid *tid) 5479eb6f0de0SAdrian Chadd { 5480eb6f0de0SAdrian Chadd struct ath_buf *bf; 5481eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5482eb6f0de0SAdrian Chadd 5483eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n", 5484eb6f0de0SAdrian Chadd __func__, an, tid->tid); 5485eb6f0de0SAdrian Chadd 5486375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5487eb6f0de0SAdrian Chadd 5488eb6f0de0SAdrian Chadd /* Check - is AMPDU pending or running? then print out something */ 5489eb6f0de0SAdrian Chadd if (ath_tx_ampdu_pending(sc, an, tid->tid)) 549083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n", 5491eb6f0de0SAdrian Chadd __func__, tid->tid); 5492eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid)) 549383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n", 5494eb6f0de0SAdrian Chadd __func__, tid->tid); 5495eb6f0de0SAdrian Chadd 5496eb6f0de0SAdrian Chadd for (;;) { 5497eb6f0de0SAdrian Chadd 5498eb6f0de0SAdrian Chadd /* 5499eb6f0de0SAdrian Chadd * If the upper layers have paused the TID, don't 5500eb6f0de0SAdrian Chadd * queue any further packets. 550122a3aee6SAdrian Chadd * 550222a3aee6SAdrian Chadd * XXX if we are leaking frames, make sure we decrement 550322a3aee6SAdrian Chadd * that counter _and_ we continue here. 5504eb6f0de0SAdrian Chadd */ 550522a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5506eb6f0de0SAdrian Chadd break; 5507eb6f0de0SAdrian Chadd 55083e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5509eb6f0de0SAdrian Chadd if (bf == NULL) { 5510eb6f0de0SAdrian Chadd break; 5511eb6f0de0SAdrian Chadd } 5512eb6f0de0SAdrian Chadd 55133e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 5514eb6f0de0SAdrian Chadd 5515eb6f0de0SAdrian Chadd /* Sanity check! */ 5516eb6f0de0SAdrian Chadd if (tid->tid != bf->bf_state.bfs_tid) { 551783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !=" 551883bbd5ebSRui Paulo " tid %d\n", __func__, bf->bf_state.bfs_tid, 551983bbd5ebSRui Paulo tid->tid); 5520eb6f0de0SAdrian Chadd } 5521eb6f0de0SAdrian Chadd /* Normal completion handler */ 5522eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 5523eb6f0de0SAdrian Chadd 55240c54de88SAdrian Chadd /* 55250c54de88SAdrian Chadd * Override this for now, until the non-aggregate 55260c54de88SAdrian Chadd * completion handler correctly handles software retransmits. 55270c54de88SAdrian Chadd */ 55280c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 55290c54de88SAdrian Chadd 55304e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 55314e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 55324e81f27cSAdrian Chadd 5533eb6f0de0SAdrian Chadd /* Program descriptors + rate control */ 5534eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5535e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5536e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5537eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5538e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5539eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5540eb6f0de0SAdrian Chadd 554122a3aee6SAdrian Chadd /* 554222a3aee6SAdrian Chadd * Update the current leak count if 554322a3aee6SAdrian Chadd * we're leaking frames; and set the 554422a3aee6SAdrian Chadd * MORE flag as appropriate. 554522a3aee6SAdrian Chadd */ 554622a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 554722a3aee6SAdrian Chadd 5548eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5549eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5550eb6f0de0SAdrian Chadd tid->hwq_depth++; 5551eb6f0de0SAdrian Chadd 5552eb6f0de0SAdrian Chadd /* Punt to hardware or software txq */ 5553eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5554eb6f0de0SAdrian Chadd } 5555eb6f0de0SAdrian Chadd } 5556eb6f0de0SAdrian Chadd 5557eb6f0de0SAdrian Chadd /* 5558eb6f0de0SAdrian Chadd * Schedule some packets to the given hardware queue. 5559eb6f0de0SAdrian Chadd * 5560eb6f0de0SAdrian Chadd * This function walks the list of TIDs (ie, ath_node TIDs 5561eb6f0de0SAdrian Chadd * with queued traffic) and attempts to schedule traffic 5562eb6f0de0SAdrian Chadd * from them. 5563eb6f0de0SAdrian Chadd * 5564eb6f0de0SAdrian Chadd * TID scheduling is implemented as a FIFO, with TIDs being 5565eb6f0de0SAdrian Chadd * added to the end of the queue after some frames have been 5566eb6f0de0SAdrian Chadd * scheduled. 5567eb6f0de0SAdrian Chadd */ 5568eb6f0de0SAdrian Chadd void 5569eb6f0de0SAdrian Chadd ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq) 5570eb6f0de0SAdrian Chadd { 5571eb6f0de0SAdrian Chadd struct ath_tid *tid, *next, *last; 5572eb6f0de0SAdrian Chadd 5573375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5574eb6f0de0SAdrian Chadd 5575eb6f0de0SAdrian Chadd /* 5576eb6f0de0SAdrian Chadd * Don't schedule if the hardware queue is busy. 5577eb6f0de0SAdrian Chadd * This (hopefully) gives some more time to aggregate 5578eb6f0de0SAdrian Chadd * some packets in the aggregation queue. 557972910f03SAdrian Chadd * 558072910f03SAdrian Chadd * XXX It doesn't stop a parallel sender from sneaking 558172910f03SAdrian Chadd * in transmitting a frame! 5582eb6f0de0SAdrian Chadd */ 558372910f03SAdrian Chadd /* XXX TXQ locking */ 558472910f03SAdrian Chadd if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 558572910f03SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++; 558672910f03SAdrian Chadd return; 558772910f03SAdrian Chadd } 558872910f03SAdrian Chadd if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5589eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++; 5590eb6f0de0SAdrian Chadd return; 5591eb6f0de0SAdrian Chadd } 5592eb6f0de0SAdrian Chadd 5593eb6f0de0SAdrian Chadd last = TAILQ_LAST(&txq->axq_tidq, axq_t_s); 5594eb6f0de0SAdrian Chadd 5595eb6f0de0SAdrian Chadd TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) { 5596eb6f0de0SAdrian Chadd /* 5597eb6f0de0SAdrian Chadd * Suspend paused queues here; they'll be resumed 5598eb6f0de0SAdrian Chadd * once the addba completes or times out. 5599eb6f0de0SAdrian Chadd */ 5600eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n", 5601eb6f0de0SAdrian Chadd __func__, tid->tid, tid->paused); 5602eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 560322a3aee6SAdrian Chadd /* 560422a3aee6SAdrian Chadd * This node may be in power-save and we're leaking 560522a3aee6SAdrian Chadd * a frame; be careful. 560622a3aee6SAdrian Chadd */ 560722a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 56088ec9220eSAdrian Chadd goto loop_done; 5609eb6f0de0SAdrian Chadd } 5610eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, tid->an, tid->tid)) 5611eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(sc, tid->an, tid); 5612eb6f0de0SAdrian Chadd else 5613eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(sc, tid->an, tid); 5614eb6f0de0SAdrian Chadd 5615eb6f0de0SAdrian Chadd /* Not empty? Re-schedule */ 5616eb6f0de0SAdrian Chadd if (tid->axq_depth != 0) 5617eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 5618eb6f0de0SAdrian Chadd 5619b45a991eSAdrian Chadd /* 5620b45a991eSAdrian Chadd * Give the software queue time to aggregate more 5621b45a991eSAdrian Chadd * packets. If we aren't running aggregation then 5622b45a991eSAdrian Chadd * we should still limit the hardware queue depth. 5623b45a991eSAdrian Chadd */ 562472910f03SAdrian Chadd /* XXX TXQ locking */ 562572910f03SAdrian Chadd if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 562672910f03SAdrian Chadd break; 562772910f03SAdrian Chadd } 562872910f03SAdrian Chadd if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5629eb6f0de0SAdrian Chadd break; 5630eb6f0de0SAdrian Chadd } 56318ec9220eSAdrian Chadd loop_done: 5632eb6f0de0SAdrian Chadd /* 5633eb6f0de0SAdrian Chadd * If this was the last entry on the original list, stop. 5634eb6f0de0SAdrian Chadd * Otherwise nodes that have been rescheduled onto the end 5635eb6f0de0SAdrian Chadd * of the TID FIFO list will just keep being rescheduled. 563622a3aee6SAdrian Chadd * 563722a3aee6SAdrian Chadd * XXX What should we do about nodes that were paused 563822a3aee6SAdrian Chadd * but are pending a leaking frame in response to a ps-poll? 563922a3aee6SAdrian Chadd * They'll be put at the front of the list; so they'll 564022a3aee6SAdrian Chadd * prematurely trigger this condition! Ew. 5641eb6f0de0SAdrian Chadd */ 5642eb6f0de0SAdrian Chadd if (tid == last) 5643eb6f0de0SAdrian Chadd break; 5644eb6f0de0SAdrian Chadd } 5645eb6f0de0SAdrian Chadd } 5646eb6f0de0SAdrian Chadd 5647eb6f0de0SAdrian Chadd /* 5648eb6f0de0SAdrian Chadd * TX addba handling 5649eb6f0de0SAdrian Chadd */ 5650eb6f0de0SAdrian Chadd 5651eb6f0de0SAdrian Chadd /* 5652eb6f0de0SAdrian Chadd * Return net80211 TID struct pointer, or NULL for none 5653eb6f0de0SAdrian Chadd */ 5654eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu * 5655eb6f0de0SAdrian Chadd ath_tx_get_tx_tid(struct ath_node *an, int tid) 5656eb6f0de0SAdrian Chadd { 5657eb6f0de0SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 5658eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5659eb6f0de0SAdrian Chadd 5660eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5661eb6f0de0SAdrian Chadd return NULL; 5662eb6f0de0SAdrian Chadd 56632aa563dfSAdrian Chadd tap = &ni->ni_tx_ampdu[tid]; 5664eb6f0de0SAdrian Chadd return tap; 5665eb6f0de0SAdrian Chadd } 5666eb6f0de0SAdrian Chadd 5667eb6f0de0SAdrian Chadd /* 5668eb6f0de0SAdrian Chadd * Is AMPDU-TX running? 5669eb6f0de0SAdrian Chadd */ 5670eb6f0de0SAdrian Chadd static int 5671eb6f0de0SAdrian Chadd ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid) 5672eb6f0de0SAdrian Chadd { 5673eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5674eb6f0de0SAdrian Chadd 5675eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5676eb6f0de0SAdrian Chadd return 0; 5677eb6f0de0SAdrian Chadd 5678eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5679eb6f0de0SAdrian Chadd if (tap == NULL) 5680eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not running */ 5681eb6f0de0SAdrian Chadd 5682eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING); 5683eb6f0de0SAdrian Chadd } 5684eb6f0de0SAdrian Chadd 5685eb6f0de0SAdrian Chadd /* 5686eb6f0de0SAdrian Chadd * Is AMPDU-TX negotiation pending? 5687eb6f0de0SAdrian Chadd */ 5688eb6f0de0SAdrian Chadd static int 5689eb6f0de0SAdrian Chadd ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid) 5690eb6f0de0SAdrian Chadd { 5691eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5692eb6f0de0SAdrian Chadd 5693eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5694eb6f0de0SAdrian Chadd return 0; 5695eb6f0de0SAdrian Chadd 5696eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5697eb6f0de0SAdrian Chadd if (tap == NULL) 5698eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not pending */ 5699eb6f0de0SAdrian Chadd 5700eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND); 5701eb6f0de0SAdrian Chadd } 5702eb6f0de0SAdrian Chadd 5703eb6f0de0SAdrian Chadd /* 5704eb6f0de0SAdrian Chadd * Is AMPDU-TX pending for the given TID? 5705eb6f0de0SAdrian Chadd */ 5706eb6f0de0SAdrian Chadd 5707eb6f0de0SAdrian Chadd 5708eb6f0de0SAdrian Chadd /* 5709eb6f0de0SAdrian Chadd * Method to handle sending an ADDBA request. 5710eb6f0de0SAdrian Chadd * 5711eb6f0de0SAdrian Chadd * We tap this so the relevant flags can be set to pause the TID 5712eb6f0de0SAdrian Chadd * whilst waiting for the response. 5713eb6f0de0SAdrian Chadd * 5714eb6f0de0SAdrian Chadd * XXX there's no timeout handler we can override? 5715eb6f0de0SAdrian Chadd */ 5716eb6f0de0SAdrian Chadd int 5717eb6f0de0SAdrian Chadd ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5718eb6f0de0SAdrian Chadd int dialogtoken, int baparamset, int batimeout) 5719eb6f0de0SAdrian Chadd { 57203797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 57212aa563dfSAdrian Chadd int tid = tap->txa_tid; 5722eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5723eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5724eb6f0de0SAdrian Chadd 5725eb6f0de0SAdrian Chadd /* 5726eb6f0de0SAdrian Chadd * XXX danger Will Robinson! 5727eb6f0de0SAdrian Chadd * 5728eb6f0de0SAdrian Chadd * Although the taskqueue may be running and scheduling some more 5729eb6f0de0SAdrian Chadd * packets, these should all be _before_ the addba sequence number. 5730eb6f0de0SAdrian Chadd * However, net80211 will keep self-assigning sequence numbers 5731eb6f0de0SAdrian Chadd * until addba has been negotiated. 5732eb6f0de0SAdrian Chadd * 5733eb6f0de0SAdrian Chadd * In the past, these packets would be "paused" (which still works 5734eb6f0de0SAdrian Chadd * fine, as they're being scheduled to the driver in the same 5735eb6f0de0SAdrian Chadd * serialised method which is calling the addba request routine) 5736eb6f0de0SAdrian Chadd * and when the aggregation session begins, they'll be dequeued 5737eb6f0de0SAdrian Chadd * as aggregate packets and added to the BAW. However, now there's 5738eb6f0de0SAdrian Chadd * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these 5739eb6f0de0SAdrian Chadd * packets. Thus they never get included in the BAW tracking and 5740eb6f0de0SAdrian Chadd * this can cause the initial burst of packets after the addba 5741eb6f0de0SAdrian Chadd * negotiation to "hang", as they quickly fall outside the BAW. 5742eb6f0de0SAdrian Chadd * 5743eb6f0de0SAdrian Chadd * The "eventual" solution should be to tag these packets with 5744eb6f0de0SAdrian Chadd * dobaw. Although net80211 has given us a sequence number, 5745eb6f0de0SAdrian Chadd * it'll be "after" the left edge of the BAW and thus it'll 5746eb6f0de0SAdrian Chadd * fall within it. 5747eb6f0de0SAdrian Chadd */ 5748375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5749d3a6425bSAdrian Chadd /* 5750d3a6425bSAdrian Chadd * This is a bit annoying. Until net80211 HT code inherits some 5751d3a6425bSAdrian Chadd * (any) locking, we may have this called in parallel BUT only 5752d3a6425bSAdrian Chadd * one response/timeout will be called. Grr. 5753d3a6425bSAdrian Chadd */ 5754d3a6425bSAdrian Chadd if (atid->addba_tx_pending == 0) { 5755eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 5756d3a6425bSAdrian Chadd atid->addba_tx_pending = 1; 5757d3a6425bSAdrian Chadd } 5758375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5759eb6f0de0SAdrian Chadd 5760eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 57619b48fb4bSAdrian Chadd "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n", 57629b48fb4bSAdrian Chadd __func__, 57639b48fb4bSAdrian Chadd ni->ni_macaddr, 57649b48fb4bSAdrian Chadd ":", 57659b48fb4bSAdrian Chadd dialogtoken, baparamset, batimeout); 5766eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5767eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5768eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5769eb6f0de0SAdrian Chadd 5770eb6f0de0SAdrian Chadd return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, 5771eb6f0de0SAdrian Chadd batimeout); 5772eb6f0de0SAdrian Chadd } 5773eb6f0de0SAdrian Chadd 5774eb6f0de0SAdrian Chadd /* 5775eb6f0de0SAdrian Chadd * Handle an ADDBA response. 5776eb6f0de0SAdrian Chadd * 5777eb6f0de0SAdrian Chadd * We unpause the queue so TX'ing can resume. 5778eb6f0de0SAdrian Chadd * 5779eb6f0de0SAdrian Chadd * Any packets TX'ed from this point should be "aggregate" (whether 5780eb6f0de0SAdrian Chadd * aggregate or not) so the BAW is updated. 5781eb6f0de0SAdrian Chadd * 5782eb6f0de0SAdrian Chadd * Note! net80211 keeps self-assigning sequence numbers until 5783eb6f0de0SAdrian Chadd * ampdu is negotiated. This means the initially-negotiated BAW left 5784eb6f0de0SAdrian Chadd * edge won't match the ni->ni_txseq. 5785eb6f0de0SAdrian Chadd * 5786eb6f0de0SAdrian Chadd * So, being very dirty, the BAW left edge is "slid" here to match 5787eb6f0de0SAdrian Chadd * ni->ni_txseq. 5788eb6f0de0SAdrian Chadd * 5789eb6f0de0SAdrian Chadd * What likely SHOULD happen is that all packets subsequent to the 5790eb6f0de0SAdrian Chadd * addba request should be tagged as aggregate and queued as non-aggregate 5791eb6f0de0SAdrian Chadd * frames; thus updating the BAW. For now though, I'll just slide the 5792eb6f0de0SAdrian Chadd * window. 5793eb6f0de0SAdrian Chadd */ 5794eb6f0de0SAdrian Chadd int 5795eb6f0de0SAdrian Chadd ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5796eb6f0de0SAdrian Chadd int status, int code, int batimeout) 5797eb6f0de0SAdrian Chadd { 57983797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 57992aa563dfSAdrian Chadd int tid = tap->txa_tid; 5800eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5801eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5802eb6f0de0SAdrian Chadd int r; 5803eb6f0de0SAdrian Chadd 5804eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 58059b48fb4bSAdrian Chadd "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__, 58069b48fb4bSAdrian Chadd ni->ni_macaddr, 58079b48fb4bSAdrian Chadd ":", 5808eb6f0de0SAdrian Chadd status, code, batimeout); 5809eb6f0de0SAdrian Chadd 5810eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5811eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5812eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5813eb6f0de0SAdrian Chadd 5814eb6f0de0SAdrian Chadd /* 5815eb6f0de0SAdrian Chadd * Call this first, so the interface flags get updated 5816eb6f0de0SAdrian Chadd * before the TID is unpaused. Otherwise a race condition 5817eb6f0de0SAdrian Chadd * exists where the unpaused TID still doesn't yet have 5818eb6f0de0SAdrian Chadd * IEEE80211_AGGR_RUNNING set. 5819eb6f0de0SAdrian Chadd */ 5820eb6f0de0SAdrian Chadd r = sc->sc_addba_response(ni, tap, status, code, batimeout); 5821eb6f0de0SAdrian Chadd 5822375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5823d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 5824eb6f0de0SAdrian Chadd /* 5825eb6f0de0SAdrian Chadd * XXX dirty! 5826eb6f0de0SAdrian Chadd * Slide the BAW left edge to wherever net80211 left it for us. 5827eb6f0de0SAdrian Chadd * Read above for more information. 5828eb6f0de0SAdrian Chadd */ 5829eb6f0de0SAdrian Chadd tap->txa_start = ni->ni_txseqs[tid]; 5830eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 5831375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5832eb6f0de0SAdrian Chadd return r; 5833eb6f0de0SAdrian Chadd } 5834eb6f0de0SAdrian Chadd 5835eb6f0de0SAdrian Chadd 5836eb6f0de0SAdrian Chadd /* 5837eb6f0de0SAdrian Chadd * Stop ADDBA on a queue. 58388405fe86SAdrian Chadd * 58398405fe86SAdrian Chadd * This can be called whilst BAR TX is currently active on the queue, 58408405fe86SAdrian Chadd * so make sure this is unblocked before continuing. 5841eb6f0de0SAdrian Chadd */ 5842eb6f0de0SAdrian Chadd void 5843eb6f0de0SAdrian Chadd ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 5844eb6f0de0SAdrian Chadd { 58453797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 58462aa563dfSAdrian Chadd int tid = tap->txa_tid; 5847eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5848eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 584922780332SAdrian Chadd ath_bufhead bf_cq; 585022780332SAdrian Chadd struct ath_buf *bf; 5851eb6f0de0SAdrian Chadd 58529b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n", 58539b48fb4bSAdrian Chadd __func__, 58549b48fb4bSAdrian Chadd ni->ni_macaddr, 58559b48fb4bSAdrian Chadd ":"); 5856eb6f0de0SAdrian Chadd 58578405fe86SAdrian Chadd /* 58588405fe86SAdrian Chadd * Pause TID traffic early, so there aren't any races 58598405fe86SAdrian Chadd * Unblock the pending BAR held traffic, if it's currently paused. 58608405fe86SAdrian Chadd */ 5861375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5862eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 58638405fe86SAdrian Chadd if (atid->bar_wait) { 58648405fe86SAdrian Chadd /* 58658405fe86SAdrian Chadd * bar_unsuspend() expects bar_tx == 1, as it should be 58668405fe86SAdrian Chadd * called from the TX completion path. This quietens 58678405fe86SAdrian Chadd * the warning. It's cleared for us anyway. 58688405fe86SAdrian Chadd */ 58698405fe86SAdrian Chadd atid->bar_tx = 1; 58708405fe86SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 58718405fe86SAdrian Chadd } 5872375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5873eb6f0de0SAdrian Chadd 5874eb6f0de0SAdrian Chadd /* There's no need to hold the TXQ lock here */ 5875eb6f0de0SAdrian Chadd sc->sc_addba_stop(ni, tap); 5876eb6f0de0SAdrian Chadd 5877eb6f0de0SAdrian Chadd /* 58784dfd4507SAdrian Chadd * ath_tx_tid_cleanup will resume the TID if possible, otherwise 5879eb6f0de0SAdrian Chadd * it'll set the cleanup flag, and it'll be unpaused once 5880eb6f0de0SAdrian Chadd * things have been cleaned up. 5881eb6f0de0SAdrian Chadd */ 588222780332SAdrian Chadd TAILQ_INIT(&bf_cq); 588322780332SAdrian Chadd ATH_TX_LOCK(sc); 588459fbb530SAdrian Chadd 588559fbb530SAdrian Chadd /* 588659fbb530SAdrian Chadd * In case there's a followup call to this, only call it 588759fbb530SAdrian Chadd * if we don't have a cleanup in progress. 588859fbb530SAdrian Chadd * 588959fbb530SAdrian Chadd * Since we've paused the queue above, we need to make 589059fbb530SAdrian Chadd * sure we unpause if there's already a cleanup in 589159fbb530SAdrian Chadd * progress - it means something else is also doing 589259fbb530SAdrian Chadd * this stuff, so we don't need to also keep it paused. 589359fbb530SAdrian Chadd */ 589459fbb530SAdrian Chadd if (atid->cleanup_inprogress) { 589559fbb530SAdrian Chadd ath_tx_tid_resume(sc, atid); 589659fbb530SAdrian Chadd } else { 589722780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, tid, &bf_cq); 58985da3fc10SAdrian Chadd /* 58995da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required. 59005da3fc10SAdrian Chadd */ 59015da3fc10SAdrian Chadd if (! atid->cleanup_inprogress) 59025da3fc10SAdrian Chadd ath_tx_tid_resume(sc, atid); 590359fbb530SAdrian Chadd } 590422780332SAdrian Chadd ATH_TX_UNLOCK(sc); 590522780332SAdrian Chadd 590622780332SAdrian Chadd /* Handle completing frames and fail them */ 590722780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 590822780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 590922780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 591022780332SAdrian Chadd } 591122a3aee6SAdrian Chadd 591222780332SAdrian Chadd } 591322780332SAdrian Chadd 591422780332SAdrian Chadd /* 591522780332SAdrian Chadd * Handle a node reassociation. 591622780332SAdrian Chadd * 591722780332SAdrian Chadd * We may have a bunch of frames queued to the hardware; those need 591822780332SAdrian Chadd * to be marked as cleanup. 591922780332SAdrian Chadd */ 592022780332SAdrian Chadd void 592122780332SAdrian Chadd ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an) 592222780332SAdrian Chadd { 592322780332SAdrian Chadd struct ath_tid *tid; 592422780332SAdrian Chadd int i; 592522780332SAdrian Chadd ath_bufhead bf_cq; 592622780332SAdrian Chadd struct ath_buf *bf; 592722780332SAdrian Chadd 592822780332SAdrian Chadd TAILQ_INIT(&bf_cq); 592922780332SAdrian Chadd 593022780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 593122780332SAdrian Chadd 593222780332SAdrian Chadd ATH_TX_LOCK(sc); 593322780332SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 593422780332SAdrian Chadd tid = &an->an_tid[i]; 593522780332SAdrian Chadd if (tid->hwq_depth == 0) 593622780332SAdrian Chadd continue; 593722780332SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 593822780332SAdrian Chadd "%s: %6D: TID %d: cleaning up TID\n", 593922780332SAdrian Chadd __func__, 594022780332SAdrian Chadd an->an_node.ni_macaddr, 594122780332SAdrian Chadd ":", 594222780332SAdrian Chadd i); 594359fbb530SAdrian Chadd /* 594459fbb530SAdrian Chadd * In case there's a followup call to this, only call it 594559fbb530SAdrian Chadd * if we don't have a cleanup in progress. 594659fbb530SAdrian Chadd */ 594759fbb530SAdrian Chadd if (! tid->cleanup_inprogress) { 594859fbb530SAdrian Chadd ath_tx_tid_pause(sc, tid); 594922780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, i, &bf_cq); 59505da3fc10SAdrian Chadd /* 59515da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required. 59525da3fc10SAdrian Chadd */ 59535da3fc10SAdrian Chadd if (! tid->cleanup_inprogress) 59545da3fc10SAdrian Chadd ath_tx_tid_resume(sc, tid); 595522780332SAdrian Chadd } 595659fbb530SAdrian Chadd } 595722780332SAdrian Chadd ATH_TX_UNLOCK(sc); 595822780332SAdrian Chadd 595922780332SAdrian Chadd /* Handle completing frames and fail them */ 596022780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 596122780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 596222780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 596322780332SAdrian Chadd } 5964eb6f0de0SAdrian Chadd } 5965eb6f0de0SAdrian Chadd 5966eb6f0de0SAdrian Chadd /* 5967eb6f0de0SAdrian Chadd * Note: net80211 bar_timeout() doesn't call this function on BAR failure; 5968eb6f0de0SAdrian Chadd * it simply tears down the aggregation session. Ew. 5969eb6f0de0SAdrian Chadd * 5970eb6f0de0SAdrian Chadd * It however will call ieee80211_ampdu_stop() which will call 5971eb6f0de0SAdrian Chadd * ic->ic_addba_stop(). 5972eb6f0de0SAdrian Chadd * 5973eb6f0de0SAdrian Chadd * XXX This uses a hard-coded max BAR count value; the whole 5974eb6f0de0SAdrian Chadd * XXX BAR TX success or failure should be better handled! 5975eb6f0de0SAdrian Chadd */ 5976eb6f0de0SAdrian Chadd void 5977eb6f0de0SAdrian Chadd ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5978eb6f0de0SAdrian Chadd int status) 5979eb6f0de0SAdrian Chadd { 59803797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 59812aa563dfSAdrian Chadd int tid = tap->txa_tid; 5982eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5983eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5984eb6f0de0SAdrian Chadd int attempts = tap->txa_attempts; 598542fdd8e7SAdrian Chadd int old_txa_start; 5986eb6f0de0SAdrian Chadd 59870e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 598842fdd8e7SAdrian Chadd "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n", 59890e22ed0eSAdrian Chadd __func__, 59909b48fb4bSAdrian Chadd ni->ni_macaddr, 59919b48fb4bSAdrian Chadd ":", 5992e60c4fc2SAdrian Chadd tap->txa_tid, 5993e60c4fc2SAdrian Chadd atid->tid, 59940e22ed0eSAdrian Chadd status, 599542fdd8e7SAdrian Chadd attempts, 599642fdd8e7SAdrian Chadd tap->txa_start, 599742fdd8e7SAdrian Chadd tap->txa_seqpending); 5998eb6f0de0SAdrian Chadd 5999eb6f0de0SAdrian Chadd /* Note: This may update the BAW details */ 600042fdd8e7SAdrian Chadd /* 600142fdd8e7SAdrian Chadd * XXX What if this does slide the BAW along? We need to somehow 600242fdd8e7SAdrian Chadd * XXX either fix things when it does happen, or prevent the 600342fdd8e7SAdrian Chadd * XXX seqpending value to be anything other than exactly what 600442fdd8e7SAdrian Chadd * XXX the hell we want! 600542fdd8e7SAdrian Chadd * 600642fdd8e7SAdrian Chadd * XXX So for now, how I do this inside the TX lock for now 600742fdd8e7SAdrian Chadd * XXX and just correct it afterwards? The below condition should 600842fdd8e7SAdrian Chadd * XXX never happen and if it does I need to fix all kinds of things. 600942fdd8e7SAdrian Chadd */ 601042fdd8e7SAdrian Chadd ATH_TX_LOCK(sc); 601142fdd8e7SAdrian Chadd old_txa_start = tap->txa_start; 6012eb6f0de0SAdrian Chadd sc->sc_bar_response(ni, tap, status); 601342fdd8e7SAdrian Chadd if (tap->txa_start != old_txa_start) { 601442fdd8e7SAdrian Chadd device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n", 601542fdd8e7SAdrian Chadd __func__, 601642fdd8e7SAdrian Chadd tid, 601742fdd8e7SAdrian Chadd tap->txa_start, 601842fdd8e7SAdrian Chadd old_txa_start); 601942fdd8e7SAdrian Chadd } 602042fdd8e7SAdrian Chadd tap->txa_start = old_txa_start; 602142fdd8e7SAdrian Chadd ATH_TX_UNLOCK(sc); 6022eb6f0de0SAdrian Chadd 6023eb6f0de0SAdrian Chadd /* Unpause the TID */ 6024eb6f0de0SAdrian Chadd /* 6025eb6f0de0SAdrian Chadd * XXX if this is attempt=50, the TID will be downgraded 6026eb6f0de0SAdrian Chadd * XXX to a non-aggregate session. So we must unpause the 6027eb6f0de0SAdrian Chadd * XXX TID here or it'll never be done. 6028088d8b81SAdrian Chadd * 6029088d8b81SAdrian Chadd * Also, don't call it if bar_tx/bar_wait are 0; something 6030088d8b81SAdrian Chadd * has beaten us to the punch? (XXX figure out what?) 6031eb6f0de0SAdrian Chadd */ 6032eb6f0de0SAdrian Chadd if (status == 0 || attempts == 50) { 6033375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6034088d8b81SAdrian Chadd if (atid->bar_tx == 0 || atid->bar_wait == 0) 603583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6036088d8b81SAdrian Chadd "%s: huh? bar_tx=%d, bar_wait=%d\n", 6037088d8b81SAdrian Chadd __func__, 6038088d8b81SAdrian Chadd atid->bar_tx, atid->bar_wait); 6039088d8b81SAdrian Chadd else 604088b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 6041375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6042eb6f0de0SAdrian Chadd } 6043eb6f0de0SAdrian Chadd } 6044eb6f0de0SAdrian Chadd 6045eb6f0de0SAdrian Chadd /* 6046eb6f0de0SAdrian Chadd * This is called whenever the pending ADDBA request times out. 6047eb6f0de0SAdrian Chadd * Unpause and reschedule the TID. 6048eb6f0de0SAdrian Chadd */ 6049eb6f0de0SAdrian Chadd void 6050eb6f0de0SAdrian Chadd ath_addba_response_timeout(struct ieee80211_node *ni, 6051eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap) 6052eb6f0de0SAdrian Chadd { 60533797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 60542aa563dfSAdrian Chadd int tid = tap->txa_tid; 6055eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 6056eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 6057eb6f0de0SAdrian Chadd 6058eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 60596d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called; resuming\n", 60609b48fb4bSAdrian Chadd __func__, 60619b48fb4bSAdrian Chadd ni->ni_macaddr, 60626d07d3e0SAdrian Chadd ":", 60636d07d3e0SAdrian Chadd tid); 6064eb6f0de0SAdrian Chadd 6065375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6066d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 6067375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6068d3a6425bSAdrian Chadd 6069eb6f0de0SAdrian Chadd /* Note: This updates the aggregate state to (again) pending */ 6070eb6f0de0SAdrian Chadd sc->sc_addba_response_timeout(ni, tap); 6071eb6f0de0SAdrian Chadd 6072eb6f0de0SAdrian Chadd /* Unpause the TID; which reschedules it */ 6073375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6074eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 6075375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6076eb6f0de0SAdrian Chadd } 60773fdfc330SAdrian Chadd 60780eb81626SAdrian Chadd /* 60790eb81626SAdrian Chadd * Check if a node is asleep or not. 60800eb81626SAdrian Chadd */ 6081548a605dSAdrian Chadd int 60820eb81626SAdrian Chadd ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an) 60830eb81626SAdrian Chadd { 60840eb81626SAdrian Chadd 608522780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 60860eb81626SAdrian Chadd 60870eb81626SAdrian Chadd return (an->an_is_powersave); 60880eb81626SAdrian Chadd } 60890eb81626SAdrian Chadd 60900eb81626SAdrian Chadd /* 60910eb81626SAdrian Chadd * Mark a node as currently "in powersaving." 60920eb81626SAdrian Chadd * This suspends all traffic on the node. 60930eb81626SAdrian Chadd * 60940eb81626SAdrian Chadd * This must be called with the node/tx locks free. 60950eb81626SAdrian Chadd * 60960eb81626SAdrian Chadd * XXX TODO: the locking silliness below is due to how the node 60970eb81626SAdrian Chadd * locking currently works. Right now, the node lock is grabbed 60980eb81626SAdrian Chadd * to do rate control lookups and these are done with the TX 60990eb81626SAdrian Chadd * queue lock held. This means the node lock can't be grabbed 61000eb81626SAdrian Chadd * first here or a LOR will occur. 61010eb81626SAdrian Chadd * 61020eb81626SAdrian Chadd * Eventually (hopefully!) the TX path code will only grab 61030eb81626SAdrian Chadd * the TXQ lock when transmitting and the ath_node lock when 61040eb81626SAdrian Chadd * doing node/TID operations. There are other complications - 61050eb81626SAdrian Chadd * the sched/unsched operations involve walking the per-txq 61060eb81626SAdrian Chadd * 'active tid' list and this requires both locks to be held. 61070eb81626SAdrian Chadd */ 61080eb81626SAdrian Chadd void 61090eb81626SAdrian Chadd ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an) 61100eb81626SAdrian Chadd { 61110eb81626SAdrian Chadd struct ath_tid *atid; 61120eb81626SAdrian Chadd struct ath_txq *txq; 61130eb81626SAdrian Chadd int tid; 61140eb81626SAdrian Chadd 611522780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 61160eb81626SAdrian Chadd 61170eb81626SAdrian Chadd /* Suspend all traffic on the node */ 6118375307d4SAdrian Chadd ATH_TX_LOCK(sc); 611922a3aee6SAdrian Chadd 612022a3aee6SAdrian Chadd if (an->an_is_powersave) { 612183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 612222a3aee6SAdrian Chadd "%s: %6D: node was already asleep!\n", 612383bbd5ebSRui Paulo __func__, an->an_node.ni_macaddr, ":"); 612422a3aee6SAdrian Chadd ATH_TX_UNLOCK(sc); 612522a3aee6SAdrian Chadd return; 612622a3aee6SAdrian Chadd } 612722a3aee6SAdrian Chadd 61280eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 61290eb81626SAdrian Chadd atid = &an->an_tid[tid]; 61300eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 61310eb81626SAdrian Chadd 61320eb81626SAdrian Chadd ath_tx_tid_pause(sc, atid); 61330eb81626SAdrian Chadd } 61340eb81626SAdrian Chadd 61350eb81626SAdrian Chadd /* Mark node as in powersaving */ 61360eb81626SAdrian Chadd an->an_is_powersave = 1; 61370eb81626SAdrian Chadd 613822780332SAdrian Chadd ATH_TX_UNLOCK(sc); 61390eb81626SAdrian Chadd } 61400eb81626SAdrian Chadd 61410eb81626SAdrian Chadd /* 61420eb81626SAdrian Chadd * Mark a node as currently "awake." 61430eb81626SAdrian Chadd * This resumes all traffic to the node. 61440eb81626SAdrian Chadd */ 61450eb81626SAdrian Chadd void 61460eb81626SAdrian Chadd ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an) 61470eb81626SAdrian Chadd { 61480eb81626SAdrian Chadd struct ath_tid *atid; 61490eb81626SAdrian Chadd struct ath_txq *txq; 61500eb81626SAdrian Chadd int tid; 61510eb81626SAdrian Chadd 615222780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 615322780332SAdrian Chadd 615422780332SAdrian Chadd ATH_TX_LOCK(sc); 61550eb81626SAdrian Chadd 615622a3aee6SAdrian Chadd /* !? */ 61570eb81626SAdrian Chadd if (an->an_is_powersave == 0) { 615822780332SAdrian Chadd ATH_TX_UNLOCK(sc); 615983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 61600eb81626SAdrian Chadd "%s: an=%p: node was already awake\n", 61610eb81626SAdrian Chadd __func__, an); 61620eb81626SAdrian Chadd return; 61630eb81626SAdrian Chadd } 61640eb81626SAdrian Chadd 61650eb81626SAdrian Chadd /* Mark node as awake */ 61660eb81626SAdrian Chadd an->an_is_powersave = 0; 616722a3aee6SAdrian Chadd /* 616822a3aee6SAdrian Chadd * Clear any pending leaked frame requests 616922a3aee6SAdrian Chadd */ 617022a3aee6SAdrian Chadd an->an_leak_count = 0; 61710eb81626SAdrian Chadd 61720eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 61730eb81626SAdrian Chadd atid = &an->an_tid[tid]; 61740eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 61750eb81626SAdrian Chadd 61760eb81626SAdrian Chadd ath_tx_tid_resume(sc, atid); 61770eb81626SAdrian Chadd } 6178375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 61790eb81626SAdrian Chadd } 61800eb81626SAdrian Chadd 61813fdfc330SAdrian Chadd static int 61823fdfc330SAdrian Chadd ath_legacy_dma_txsetup(struct ath_softc *sc) 61833fdfc330SAdrian Chadd { 61843fdfc330SAdrian Chadd 61853fdfc330SAdrian Chadd /* nothing new needed */ 61863fdfc330SAdrian Chadd return (0); 61873fdfc330SAdrian Chadd } 61883fdfc330SAdrian Chadd 61893fdfc330SAdrian Chadd static int 61903fdfc330SAdrian Chadd ath_legacy_dma_txteardown(struct ath_softc *sc) 61913fdfc330SAdrian Chadd { 61923fdfc330SAdrian Chadd 61933fdfc330SAdrian Chadd /* nothing new needed */ 61943fdfc330SAdrian Chadd return (0); 61953fdfc330SAdrian Chadd } 61963fdfc330SAdrian Chadd 61973fdfc330SAdrian Chadd void 61983fdfc330SAdrian Chadd ath_xmit_setup_legacy(struct ath_softc *sc) 61993fdfc330SAdrian Chadd { 62001006fc0cSAdrian Chadd /* 62011006fc0cSAdrian Chadd * For now, just set the descriptor length to sizeof(ath_desc); 62021006fc0cSAdrian Chadd * worry about extracting the real length out of the HAL later. 62031006fc0cSAdrian Chadd */ 62041006fc0cSAdrian Chadd sc->sc_tx_desclen = sizeof(struct ath_desc); 6205bb327d28SAdrian Chadd sc->sc_tx_statuslen = sizeof(struct ath_desc); 62061006fc0cSAdrian Chadd sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */ 62073fdfc330SAdrian Chadd 62083fdfc330SAdrian Chadd sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup; 62093fdfc330SAdrian Chadd sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown; 6210f8418db5SAdrian Chadd sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func; 6211746bab5bSAdrian Chadd 6212746bab5bSAdrian Chadd sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart; 6213746bab5bSAdrian Chadd sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff; 6214788e6aa9SAdrian Chadd 6215788e6aa9SAdrian Chadd sc->sc_tx.xmit_drain = ath_legacy_tx_drain; 62163fdfc330SAdrian Chadd } 6217