1b8e788a5SAdrian Chadd /*- 2*718cf2ccSPedro F. Giffuni * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3*718cf2ccSPedro F. Giffuni * 4b8e788a5SAdrian Chadd * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 5c6e9cee2SAdrian Chadd * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 6b8e788a5SAdrian Chadd * All rights reserved. 7b8e788a5SAdrian Chadd * 8b8e788a5SAdrian Chadd * Redistribution and use in source and binary forms, with or without 9b8e788a5SAdrian Chadd * modification, are permitted provided that the following conditions 10b8e788a5SAdrian Chadd * are met: 11b8e788a5SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 12b8e788a5SAdrian Chadd * notice, this list of conditions and the following disclaimer, 13b8e788a5SAdrian Chadd * without modification. 14b8e788a5SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 15b8e788a5SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 16b8e788a5SAdrian Chadd * redistribution must be conditioned upon including a substantially 17b8e788a5SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 18b8e788a5SAdrian Chadd * 19b8e788a5SAdrian Chadd * NO WARRANTY 20b8e788a5SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21b8e788a5SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22b8e788a5SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 23b8e788a5SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 24b8e788a5SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 25b8e788a5SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26b8e788a5SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27b8e788a5SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 28b8e788a5SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29b8e788a5SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30b8e788a5SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 31b8e788a5SAdrian Chadd */ 32b8e788a5SAdrian Chadd 33b8e788a5SAdrian Chadd #include <sys/cdefs.h> 34b8e788a5SAdrian Chadd __FBSDID("$FreeBSD$"); 35b8e788a5SAdrian Chadd 36b8e788a5SAdrian Chadd /* 37b8e788a5SAdrian Chadd * Driver for the Atheros Wireless LAN controller. 38b8e788a5SAdrian Chadd * 39b8e788a5SAdrian Chadd * This software is derived from work of Atsushi Onoe; his contribution 40b8e788a5SAdrian Chadd * is greatly appreciated. 41b8e788a5SAdrian Chadd */ 42b8e788a5SAdrian Chadd 43b8e788a5SAdrian Chadd #include "opt_inet.h" 44b8e788a5SAdrian Chadd #include "opt_ath.h" 45b8e788a5SAdrian Chadd #include "opt_wlan.h" 46b8e788a5SAdrian Chadd 47b8e788a5SAdrian Chadd #include <sys/param.h> 48b8e788a5SAdrian Chadd #include <sys/systm.h> 49b8e788a5SAdrian Chadd #include <sys/sysctl.h> 50b8e788a5SAdrian Chadd #include <sys/mbuf.h> 51b8e788a5SAdrian Chadd #include <sys/malloc.h> 52b8e788a5SAdrian Chadd #include <sys/lock.h> 53b8e788a5SAdrian Chadd #include <sys/mutex.h> 54b8e788a5SAdrian Chadd #include <sys/kernel.h> 55b8e788a5SAdrian Chadd #include <sys/socket.h> 56b8e788a5SAdrian Chadd #include <sys/sockio.h> 57b8e788a5SAdrian Chadd #include <sys/errno.h> 58b8e788a5SAdrian Chadd #include <sys/callout.h> 59b8e788a5SAdrian Chadd #include <sys/bus.h> 60b8e788a5SAdrian Chadd #include <sys/endian.h> 61b8e788a5SAdrian Chadd #include <sys/kthread.h> 62b8e788a5SAdrian Chadd #include <sys/taskqueue.h> 63b8e788a5SAdrian Chadd #include <sys/priv.h> 64f431664cSOlivier Houchard #include <sys/ktr.h> 65b8e788a5SAdrian Chadd 66b8e788a5SAdrian Chadd #include <machine/bus.h> 67b8e788a5SAdrian Chadd 68b8e788a5SAdrian Chadd #include <net/if.h> 6976039bc8SGleb Smirnoff #include <net/if_var.h> 70b8e788a5SAdrian Chadd #include <net/if_dl.h> 71b8e788a5SAdrian Chadd #include <net/if_media.h> 72b8e788a5SAdrian Chadd #include <net/if_types.h> 73b8e788a5SAdrian Chadd #include <net/if_arp.h> 74b8e788a5SAdrian Chadd #include <net/ethernet.h> 75b8e788a5SAdrian Chadd #include <net/if_llc.h> 76b8e788a5SAdrian Chadd 77b8e788a5SAdrian Chadd #include <net80211/ieee80211_var.h> 78b8e788a5SAdrian Chadd #include <net80211/ieee80211_regdomain.h> 79b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_SUPERG 80b8e788a5SAdrian Chadd #include <net80211/ieee80211_superg.h> 81b8e788a5SAdrian Chadd #endif 82b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 83b8e788a5SAdrian Chadd #include <net80211/ieee80211_tdma.h> 84b8e788a5SAdrian Chadd #endif 85eb6f0de0SAdrian Chadd #include <net80211/ieee80211_ht.h> 86b8e788a5SAdrian Chadd 87b8e788a5SAdrian Chadd #include <net/bpf.h> 88b8e788a5SAdrian Chadd 89b8e788a5SAdrian Chadd #ifdef INET 90b8e788a5SAdrian Chadd #include <netinet/in.h> 91b8e788a5SAdrian Chadd #include <netinet/if_ether.h> 92b8e788a5SAdrian Chadd #endif 93b8e788a5SAdrian Chadd 94b8e788a5SAdrian Chadd #include <dev/ath/if_athvar.h> 95b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 96b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_diagcodes.h> 97b8e788a5SAdrian Chadd 98b8e788a5SAdrian Chadd #include <dev/ath/if_ath_debug.h> 99b8e788a5SAdrian Chadd 100b8e788a5SAdrian Chadd #ifdef ATH_TX99_DIAG 101b8e788a5SAdrian Chadd #include <dev/ath/ath_tx99/ath_tx99.h> 102b8e788a5SAdrian Chadd #endif 103b8e788a5SAdrian Chadd 104b8e788a5SAdrian Chadd #include <dev/ath/if_ath_misc.h> 105b8e788a5SAdrian Chadd #include <dev/ath/if_ath_tx.h> 106c1782ce0SAdrian Chadd #include <dev/ath/if_ath_tx_ht.h> 107b8e788a5SAdrian Chadd 108b69b0dccSAdrian Chadd #ifdef ATH_DEBUG_ALQ 109b69b0dccSAdrian Chadd #include <dev/ath/if_ath_alq.h> 110b69b0dccSAdrian Chadd #endif 111b69b0dccSAdrian Chadd 11281a82688SAdrian Chadd /* 113eb6f0de0SAdrian Chadd * How many retries to perform in software 114eb6f0de0SAdrian Chadd */ 115eb6f0de0SAdrian Chadd #define SWMAX_RETRIES 10 116eb6f0de0SAdrian Chadd 1177403d1b9SAdrian Chadd /* 1187403d1b9SAdrian Chadd * What queue to throw the non-QoS TID traffic into 1197403d1b9SAdrian Chadd */ 1207403d1b9SAdrian Chadd #define ATH_NONQOS_TID_AC WME_AC_VO 1217403d1b9SAdrian Chadd 1220eb81626SAdrian Chadd #if 0 1230eb81626SAdrian Chadd static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an); 1240eb81626SAdrian Chadd #endif 125eb6f0de0SAdrian Chadd static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, 126eb6f0de0SAdrian Chadd int tid); 127eb6f0de0SAdrian Chadd static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, 128eb6f0de0SAdrian Chadd int tid); 129a108d2d6SAdrian Chadd static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc, 130a108d2d6SAdrian Chadd struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0); 131eb6f0de0SAdrian Chadd static int ath_tx_action_frame_override_queue(struct ath_softc *sc, 132eb6f0de0SAdrian Chadd struct ieee80211_node *ni, struct mbuf *m0, int *tid); 133f1bc738eSAdrian Chadd static struct ath_buf * 134f1bc738eSAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 135f1bc738eSAdrian Chadd struct ath_tid *tid, struct ath_buf *bf); 136eb6f0de0SAdrian Chadd 137bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 138bb327d28SAdrian Chadd void 139bb327d28SAdrian Chadd ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first) 140bb327d28SAdrian Chadd { 141bb327d28SAdrian Chadd struct ath_buf *bf; 142bb327d28SAdrian Chadd int i, n; 143bb327d28SAdrian Chadd const char *ds; 144bb327d28SAdrian Chadd 145bb327d28SAdrian Chadd /* XXX we should skip out early if debugging isn't enabled! */ 146bb327d28SAdrian Chadd bf = bf_first; 147bb327d28SAdrian Chadd 148bb327d28SAdrian Chadd while (bf != NULL) { 149bb327d28SAdrian Chadd /* XXX should ensure bf_nseg > 0! */ 150bb327d28SAdrian Chadd if (bf->bf_nseg == 0) 151bb327d28SAdrian Chadd break; 152bb327d28SAdrian Chadd n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1; 153bb327d28SAdrian Chadd for (i = 0, ds = (const char *) bf->bf_desc; 154bb327d28SAdrian Chadd i < n; 155bb327d28SAdrian Chadd i++, ds += sc->sc_tx_desclen) { 156bb327d28SAdrian Chadd if_ath_alq_post(&sc->sc_alq, 157bb327d28SAdrian Chadd ATH_ALQ_EDMA_TXDESC, 158bb327d28SAdrian Chadd sc->sc_tx_desclen, 159bb327d28SAdrian Chadd ds); 160bb327d28SAdrian Chadd } 161bb327d28SAdrian Chadd bf = bf->bf_next; 162bb327d28SAdrian Chadd } 163bb327d28SAdrian Chadd } 164bb327d28SAdrian Chadd #endif /* ATH_DEBUG_ALQ */ 165bb327d28SAdrian Chadd 166eb6f0de0SAdrian Chadd /* 16781a82688SAdrian Chadd * Whether to use the 11n rate scenario functions or not 16881a82688SAdrian Chadd */ 16981a82688SAdrian Chadd static inline int 17081a82688SAdrian Chadd ath_tx_is_11n(struct ath_softc *sc) 17181a82688SAdrian Chadd { 1724ddf2cc3SAdrian Chadd return ((sc->sc_ah->ah_magic == 0x20065416) || 1734ddf2cc3SAdrian Chadd (sc->sc_ah->ah_magic == 0x19741014)); 17481a82688SAdrian Chadd } 17581a82688SAdrian Chadd 176eb6f0de0SAdrian Chadd /* 177eb6f0de0SAdrian Chadd * Obtain the current TID from the given frame. 178eb6f0de0SAdrian Chadd * 17915e58d4dSAdrian Chadd * Non-QoS frames get mapped to a TID so frames consistently 18015e58d4dSAdrian Chadd * go on a sensible queue. 181eb6f0de0SAdrian Chadd */ 182eb6f0de0SAdrian Chadd static int 183eb6f0de0SAdrian Chadd ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0) 184eb6f0de0SAdrian Chadd { 185eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 186eb6f0de0SAdrian Chadd 187eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 18815e58d4dSAdrian Chadd 18915e58d4dSAdrian Chadd /* Non-QoS: map frame to a TID queue for software queueing */ 190eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 19115e58d4dSAdrian Chadd return (WME_AC_TO_TID(M_WME_GETAC(m0))); 19215e58d4dSAdrian Chadd 19315e58d4dSAdrian Chadd /* QoS - fetch the TID from the header, ignore mbuf WME */ 19415e58d4dSAdrian Chadd return (ieee80211_gettid(wh)); 195eb6f0de0SAdrian Chadd } 196eb6f0de0SAdrian Chadd 197f1bc738eSAdrian Chadd static void 198f1bc738eSAdrian Chadd ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf) 199f1bc738eSAdrian Chadd { 200f1bc738eSAdrian Chadd struct ieee80211_frame *wh; 201f1bc738eSAdrian Chadd 202f1bc738eSAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 203f1bc738eSAdrian Chadd /* Only update/resync if needed */ 204f1bc738eSAdrian Chadd if (bf->bf_state.bfs_isretried == 0) { 205f1bc738eSAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_RETRY; 206f1bc738eSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 207f1bc738eSAdrian Chadd BUS_DMASYNC_PREWRITE); 208f1bc738eSAdrian Chadd } 209f1bc738eSAdrian Chadd bf->bf_state.bfs_isretried = 1; 210f1bc738eSAdrian Chadd bf->bf_state.bfs_retries ++; 211f1bc738eSAdrian Chadd } 212f1bc738eSAdrian Chadd 213eb6f0de0SAdrian Chadd /* 214eb6f0de0SAdrian Chadd * Determine what the correct AC queue for the given frame 215eb6f0de0SAdrian Chadd * should be. 216eb6f0de0SAdrian Chadd * 21715e58d4dSAdrian Chadd * For QoS frames, obey the TID. That way things like 21815e58d4dSAdrian Chadd * management frames that are related to a given TID 21915e58d4dSAdrian Chadd * are thus serialised with the rest of the TID traffic, 22015e58d4dSAdrian Chadd * regardless of net80211 overriding priority. 221eb6f0de0SAdrian Chadd * 22215e58d4dSAdrian Chadd * For non-QoS frames, return the mbuf WMI priority. 22315e58d4dSAdrian Chadd * 22415e58d4dSAdrian Chadd * This has implications that higher priority non-QoS traffic 22515e58d4dSAdrian Chadd * may end up being scheduled before other non-QoS traffic, 22615e58d4dSAdrian Chadd * leading to out-of-sequence packets being emitted. 22715e58d4dSAdrian Chadd * 22815e58d4dSAdrian Chadd * (It'd be nice to log/count this so we can see if it 22915e58d4dSAdrian Chadd * really is a problem.) 23015e58d4dSAdrian Chadd * 23115e58d4dSAdrian Chadd * TODO: maybe we should throw multicast traffic, QoS or 23215e58d4dSAdrian Chadd * otherwise, into a separate TX queue? 233eb6f0de0SAdrian Chadd */ 234eb6f0de0SAdrian Chadd static int 235eb6f0de0SAdrian Chadd ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0) 236eb6f0de0SAdrian Chadd { 237eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 238eb6f0de0SAdrian Chadd 23915e58d4dSAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 24015e58d4dSAdrian Chadd 24115e58d4dSAdrian Chadd /* 24215e58d4dSAdrian Chadd * QoS data frame (sequence number or otherwise) - 24315e58d4dSAdrian Chadd * return hardware queue mapping for the underlying 24415e58d4dSAdrian Chadd * TID. 24515e58d4dSAdrian Chadd */ 24615e58d4dSAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh)) 24715e58d4dSAdrian Chadd return TID_TO_WME_AC(ieee80211_gettid(wh)); 24815e58d4dSAdrian Chadd 24915e58d4dSAdrian Chadd /* 25015e58d4dSAdrian Chadd * Otherwise - return mbuf QoS pri. 25115e58d4dSAdrian Chadd */ 25215e58d4dSAdrian Chadd return (M_WME_GETAC(m0)); 253eb6f0de0SAdrian Chadd } 254eb6f0de0SAdrian Chadd 255b8e788a5SAdrian Chadd void 256b8e788a5SAdrian Chadd ath_txfrag_cleanup(struct ath_softc *sc, 257b8e788a5SAdrian Chadd ath_bufhead *frags, struct ieee80211_node *ni) 258b8e788a5SAdrian Chadd { 259b8e788a5SAdrian Chadd struct ath_buf *bf, *next; 260b8e788a5SAdrian Chadd 261b8e788a5SAdrian Chadd ATH_TXBUF_LOCK_ASSERT(sc); 262b8e788a5SAdrian Chadd 2636b349e5aSAdrian Chadd TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) { 264b8e788a5SAdrian Chadd /* NB: bf assumed clean */ 2656b349e5aSAdrian Chadd TAILQ_REMOVE(frags, bf, bf_list); 266e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 267b8e788a5SAdrian Chadd ieee80211_node_decref(ni); 268b8e788a5SAdrian Chadd } 269b8e788a5SAdrian Chadd } 270b8e788a5SAdrian Chadd 271b8e788a5SAdrian Chadd /* 272b8e788a5SAdrian Chadd * Setup xmit of a fragmented frame. Allocate a buffer 273b8e788a5SAdrian Chadd * for each frag and bump the node reference count to 274b8e788a5SAdrian Chadd * reflect the held reference to be setup by ath_tx_start. 275b8e788a5SAdrian Chadd */ 276b8e788a5SAdrian Chadd int 277b8e788a5SAdrian Chadd ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags, 278b8e788a5SAdrian Chadd struct mbuf *m0, struct ieee80211_node *ni) 279b8e788a5SAdrian Chadd { 280b8e788a5SAdrian Chadd struct mbuf *m; 281b8e788a5SAdrian Chadd struct ath_buf *bf; 282b8e788a5SAdrian Chadd 283b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 284b8e788a5SAdrian Chadd for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) { 285af33d486SAdrian Chadd /* XXX non-management? */ 286af33d486SAdrian Chadd bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL); 287b8e788a5SAdrian Chadd if (bf == NULL) { /* out of buffers, cleanup */ 28883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n", 289b43facbfSAdrian Chadd __func__); 290b8e788a5SAdrian Chadd ath_txfrag_cleanup(sc, frags, ni); 291b8e788a5SAdrian Chadd break; 292b8e788a5SAdrian Chadd } 293b8e788a5SAdrian Chadd ieee80211_node_incref(ni); 2946b349e5aSAdrian Chadd TAILQ_INSERT_TAIL(frags, bf, bf_list); 295b8e788a5SAdrian Chadd } 296b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 297b8e788a5SAdrian Chadd 2986b349e5aSAdrian Chadd return !TAILQ_EMPTY(frags); 299b8e788a5SAdrian Chadd } 300b8e788a5SAdrian Chadd 301b8e788a5SAdrian Chadd static int 302b8e788a5SAdrian Chadd ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0) 303b8e788a5SAdrian Chadd { 304b8e788a5SAdrian Chadd struct mbuf *m; 305b8e788a5SAdrian Chadd int error; 306b8e788a5SAdrian Chadd 307b8e788a5SAdrian Chadd /* 308b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 309b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 310b8e788a5SAdrian Chadd */ 311b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 312b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 313b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 314b8e788a5SAdrian Chadd if (error == EFBIG) { 315b8e788a5SAdrian Chadd /* XXX packet requires too many descriptors */ 31609067b6eSAdrian Chadd bf->bf_nseg = ATH_MAX_SCATTER + 1; 317b8e788a5SAdrian Chadd } else if (error != 0) { 318b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 319d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 320b8e788a5SAdrian Chadd return error; 321b8e788a5SAdrian Chadd } 322b8e788a5SAdrian Chadd /* 323b8e788a5SAdrian Chadd * Discard null packets and check for packets that 324b8e788a5SAdrian Chadd * require too many TX descriptors. We try to convert 325b8e788a5SAdrian Chadd * the latter to a cluster. 326b8e788a5SAdrian Chadd */ 32709067b6eSAdrian Chadd if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */ 328b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_linear++; 32909067b6eSAdrian Chadd m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER); 330b8e788a5SAdrian Chadd if (m == NULL) { 331d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 332b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nombuf++; 333b8e788a5SAdrian Chadd return ENOMEM; 334b8e788a5SAdrian Chadd } 335b8e788a5SAdrian Chadd m0 = m; 336b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 337b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 338b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 339b8e788a5SAdrian Chadd if (error != 0) { 340b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 341d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 342b8e788a5SAdrian Chadd return error; 343b8e788a5SAdrian Chadd } 34409067b6eSAdrian Chadd KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER, 345b8e788a5SAdrian Chadd ("too many segments after defrag; nseg %u", bf->bf_nseg)); 346b8e788a5SAdrian Chadd } else if (bf->bf_nseg == 0) { /* null packet, discard */ 347b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nodata++; 348d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 349b8e788a5SAdrian Chadd return EIO; 350b8e788a5SAdrian Chadd } 351b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n", 352b8e788a5SAdrian Chadd __func__, m0, m0->m_pkthdr.len); 353b8e788a5SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 354b8e788a5SAdrian Chadd bf->bf_m = m0; 355b8e788a5SAdrian Chadd 356b8e788a5SAdrian Chadd return 0; 357b8e788a5SAdrian Chadd } 358b8e788a5SAdrian Chadd 3596edf1dc7SAdrian Chadd /* 3606e84772fSAdrian Chadd * Chain together segments+descriptors for a frame - 11n or otherwise. 3616e84772fSAdrian Chadd * 3626e84772fSAdrian Chadd * For aggregates, this is called on each frame in the aggregate. 3636edf1dc7SAdrian Chadd */ 364b8e788a5SAdrian Chadd static void 3656e84772fSAdrian Chadd ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0, 3666e84772fSAdrian Chadd struct ath_buf *bf, int is_aggr, int is_first_subframe, 3676e84772fSAdrian Chadd int is_last_subframe) 368b8e788a5SAdrian Chadd { 369b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 3706e84772fSAdrian Chadd char *ds; 3712b200bb4SAdrian Chadd int i, bp, dsp; 37246634305SAdrian Chadd HAL_DMA_ADDR bufAddrList[4]; 37346634305SAdrian Chadd uint32_t segLenList[4]; 3742b200bb4SAdrian Chadd int numTxMaps = 1; 375e2137b86SAdrian Chadd int isFirstDesc = 1; 37646634305SAdrian Chadd 3773d9b1596SAdrian Chadd /* 3783d9b1596SAdrian Chadd * XXX There's txdma and txdma_mgmt; the descriptor 3793d9b1596SAdrian Chadd * sizes must match. 3803d9b1596SAdrian Chadd */ 3813d9b1596SAdrian Chadd struct ath_descdma *dd = &sc->sc_txdma; 382b8e788a5SAdrian Chadd 383b8e788a5SAdrian Chadd /* 384b8e788a5SAdrian Chadd * Fillin the remainder of the descriptor info. 385b8e788a5SAdrian Chadd */ 38646634305SAdrian Chadd 3872b200bb4SAdrian Chadd /* 388378a752fSAdrian Chadd * We need the number of TX data pointers in each descriptor. 389378a752fSAdrian Chadd * EDMA and later chips support 4 TX buffers per descriptor; 390378a752fSAdrian Chadd * previous chips just support one. 3912b200bb4SAdrian Chadd */ 392378a752fSAdrian Chadd numTxMaps = sc->sc_tx_nmaps; 3932b200bb4SAdrian Chadd 3942b200bb4SAdrian Chadd /* 3952b200bb4SAdrian Chadd * For EDMA and later chips ensure the TX map is fully populated 3962b200bb4SAdrian Chadd * before advancing to the next descriptor. 3972b200bb4SAdrian Chadd */ 3986e84772fSAdrian Chadd ds = (char *) bf->bf_desc; 3992b200bb4SAdrian Chadd bp = dsp = 0; 4002b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 4012b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 4022b200bb4SAdrian Chadd for (i = 0; i < bf->bf_nseg; i++) { 4032b200bb4SAdrian Chadd bufAddrList[bp] = bf->bf_segs[i].ds_addr; 4042b200bb4SAdrian Chadd segLenList[bp] = bf->bf_segs[i].ds_len; 4052b200bb4SAdrian Chadd bp++; 4062b200bb4SAdrian Chadd 4072b200bb4SAdrian Chadd /* 4082b200bb4SAdrian Chadd * Go to the next segment if this isn't the last segment 4092b200bb4SAdrian Chadd * and there's space in the current TX map. 4102b200bb4SAdrian Chadd */ 4112b200bb4SAdrian Chadd if ((i != bf->bf_nseg - 1) && (bp < numTxMaps)) 4122b200bb4SAdrian Chadd continue; 4132b200bb4SAdrian Chadd 4142b200bb4SAdrian Chadd /* 4152b200bb4SAdrian Chadd * Last segment or we're out of buffer pointers. 4162b200bb4SAdrian Chadd */ 4172b200bb4SAdrian Chadd bp = 0; 41846634305SAdrian Chadd 419b8e788a5SAdrian Chadd if (i == bf->bf_nseg - 1) 42042083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 421b8e788a5SAdrian Chadd else 42242083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 4232b200bb4SAdrian Chadd bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 42446634305SAdrian Chadd 42546634305SAdrian Chadd /* 426fc56c9c5SAdrian Chadd * XXX This assumes that bfs_txq is the actual destination 427fc56c9c5SAdrian Chadd * hardware queue at this point. It may not have been 428fc56c9c5SAdrian Chadd * assigned, it may actually be pointing to the multicast 429fc56c9c5SAdrian Chadd * software TXQ id. These must be fixed! 43046634305SAdrian Chadd */ 43142083b3dSAdrian Chadd ath_hal_filltxdesc(ah, (struct ath_desc *) ds 43246634305SAdrian Chadd , bufAddrList 43346634305SAdrian Chadd , segLenList 4342b200bb4SAdrian Chadd , bf->bf_descid /* XXX desc id */ 435fc56c9c5SAdrian Chadd , bf->bf_state.bfs_tx_queue 436e2137b86SAdrian Chadd , isFirstDesc /* first segment */ 437b8e788a5SAdrian Chadd , i == bf->bf_nseg - 1 /* last segment */ 43842083b3dSAdrian Chadd , (struct ath_desc *) ds0 /* first descriptor */ 439b8e788a5SAdrian Chadd ); 44021840808SAdrian Chadd 4416e84772fSAdrian Chadd /* 4426e84772fSAdrian Chadd * Make sure the 11n aggregate fields are cleared. 4436e84772fSAdrian Chadd * 4446e84772fSAdrian Chadd * XXX TODO: this doesn't need to be called for 4456e84772fSAdrian Chadd * aggregate frames; as it'll be called on all 4466e84772fSAdrian Chadd * sub-frames. Since the descriptors are in 4476e84772fSAdrian Chadd * non-cacheable memory, this leads to some 4486e84772fSAdrian Chadd * rather slow writes on MIPS/ARM platforms. 4496e84772fSAdrian Chadd */ 45021840808SAdrian Chadd if (ath_tx_is_11n(sc)) 4515d9b19f7SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds); 45221840808SAdrian Chadd 4536e84772fSAdrian Chadd /* 4546e84772fSAdrian Chadd * If 11n is enabled, set it up as if it's an aggregate 4556e84772fSAdrian Chadd * frame. 4566e84772fSAdrian Chadd */ 4576e84772fSAdrian Chadd if (is_last_subframe) { 4586e84772fSAdrian Chadd ath_hal_set11n_aggr_last(sc->sc_ah, 4596e84772fSAdrian Chadd (struct ath_desc *) ds); 4606e84772fSAdrian Chadd } else if (is_aggr) { 4616e84772fSAdrian Chadd /* 4626e84772fSAdrian Chadd * This clears the aggrlen field; so 4636e84772fSAdrian Chadd * the caller needs to call set_aggr_first()! 4646e84772fSAdrian Chadd * 4656e84772fSAdrian Chadd * XXX TODO: don't call this for the first 4666e84772fSAdrian Chadd * descriptor in the first frame in an 4676e84772fSAdrian Chadd * aggregate! 4686e84772fSAdrian Chadd */ 4696e84772fSAdrian Chadd ath_hal_set11n_aggr_middle(sc->sc_ah, 4706e84772fSAdrian Chadd (struct ath_desc *) ds, 4716e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 4726e84772fSAdrian Chadd } 473e2137b86SAdrian Chadd isFirstDesc = 0; 47442083b3dSAdrian Chadd bf->bf_lastds = (struct ath_desc *) ds; 4752b200bb4SAdrian Chadd 4762b200bb4SAdrian Chadd /* 4772b200bb4SAdrian Chadd * Don't forget to skip to the next descriptor. 4782b200bb4SAdrian Chadd */ 47942083b3dSAdrian Chadd ds += sc->sc_tx_desclen; 4802b200bb4SAdrian Chadd dsp++; 4812b200bb4SAdrian Chadd 4822b200bb4SAdrian Chadd /* 4832b200bb4SAdrian Chadd * .. and don't forget to blank these out! 4842b200bb4SAdrian Chadd */ 4852b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 4862b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 487b8e788a5SAdrian Chadd } 4884d7f8837SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 48981a82688SAdrian Chadd } 49081a82688SAdrian Chadd 491eb6f0de0SAdrian Chadd /* 492d34a7347SAdrian Chadd * Set the rate control fields in the given descriptor based on 493d34a7347SAdrian Chadd * the bf_state fields and node state. 494d34a7347SAdrian Chadd * 495d34a7347SAdrian Chadd * The bfs fields should already be set with the relevant rate 496d34a7347SAdrian Chadd * control information, including whether MRR is to be enabled. 497d34a7347SAdrian Chadd * 498d34a7347SAdrian Chadd * Since the FreeBSD HAL currently sets up the first TX rate 499d34a7347SAdrian Chadd * in ath_hal_setuptxdesc(), this will setup the MRR 500d34a7347SAdrian Chadd * conditionally for the pre-11n chips, and call ath_buf_set_rate 501d34a7347SAdrian Chadd * unconditionally for 11n chips. These require the 11n rate 502d34a7347SAdrian Chadd * scenario to be set if MCS rates are enabled, so it's easier 503d34a7347SAdrian Chadd * to just always call it. The caller can then only set rates 2, 3 504d34a7347SAdrian Chadd * and 4 if multi-rate retry is needed. 505d34a7347SAdrian Chadd */ 506d34a7347SAdrian Chadd static void 507d34a7347SAdrian Chadd ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni, 508d34a7347SAdrian Chadd struct ath_buf *bf) 509d34a7347SAdrian Chadd { 510d34a7347SAdrian Chadd struct ath_rc_series *rc = bf->bf_state.bfs_rc; 511d34a7347SAdrian Chadd 512d34a7347SAdrian Chadd /* If mrr is disabled, blank tries 1, 2, 3 */ 513d34a7347SAdrian Chadd if (! bf->bf_state.bfs_ismrr) 514d34a7347SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 515d34a7347SAdrian Chadd 516491e1248SAdrian Chadd #if 0 517491e1248SAdrian Chadd /* 518491e1248SAdrian Chadd * If NOACK is set, just set ntries=1. 519491e1248SAdrian Chadd */ 520491e1248SAdrian Chadd else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) { 521491e1248SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 522491e1248SAdrian Chadd rc[0].tries = 1; 523491e1248SAdrian Chadd } 524491e1248SAdrian Chadd #endif 525491e1248SAdrian Chadd 526d34a7347SAdrian Chadd /* 527d34a7347SAdrian Chadd * Always call - that way a retried descriptor will 528d34a7347SAdrian Chadd * have the MRR fields overwritten. 529d34a7347SAdrian Chadd * 530d34a7347SAdrian Chadd * XXX TODO: see if this is really needed - setting up 531d34a7347SAdrian Chadd * the first descriptor should set the MRR fields to 0 532d34a7347SAdrian Chadd * for us anyway. 533d34a7347SAdrian Chadd */ 534d34a7347SAdrian Chadd if (ath_tx_is_11n(sc)) { 535d34a7347SAdrian Chadd ath_buf_set_rate(sc, ni, bf); 536d34a7347SAdrian Chadd } else { 537d34a7347SAdrian Chadd ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc 538d34a7347SAdrian Chadd , rc[1].ratecode, rc[1].tries 539d34a7347SAdrian Chadd , rc[2].ratecode, rc[2].tries 540d34a7347SAdrian Chadd , rc[3].ratecode, rc[3].tries 541d34a7347SAdrian Chadd ); 542d34a7347SAdrian Chadd } 543d34a7347SAdrian Chadd } 544d34a7347SAdrian Chadd 545d34a7347SAdrian Chadd /* 546eb6f0de0SAdrian Chadd * Setup segments+descriptors for an 11n aggregate. 547eb6f0de0SAdrian Chadd * bf_first is the first buffer in the aggregate. 548eb6f0de0SAdrian Chadd * The descriptor list must already been linked together using 549eb6f0de0SAdrian Chadd * bf->bf_next. 550eb6f0de0SAdrian Chadd */ 551eb6f0de0SAdrian Chadd static void 552eb6f0de0SAdrian Chadd ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first) 553eb6f0de0SAdrian Chadd { 554eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_prev = NULL; 5556e84772fSAdrian Chadd struct ath_desc *ds0 = bf_first->bf_desc; 556eb6f0de0SAdrian Chadd 557eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n", 558eb6f0de0SAdrian Chadd __func__, bf_first->bf_state.bfs_nframes, 559eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_al); 560eb6f0de0SAdrian Chadd 5617d9dd2acSAdrian Chadd bf = bf_first; 5627d9dd2acSAdrian Chadd 5637d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 56483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n", 5657d9dd2acSAdrian Chadd __func__, bf, 0); 5667d9dd2acSAdrian Chadd if (bf->bf_state.bfs_rc[0].ratecode == 0) 56783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n", 5687d9dd2acSAdrian Chadd __func__, bf, 0); 5697d9dd2acSAdrian Chadd 570eb6f0de0SAdrian Chadd /* 5716e84772fSAdrian Chadd * Setup all descriptors of all subframes - this will 5726e84772fSAdrian Chadd * call ath_hal_set11naggrmiddle() on every frame. 573eb6f0de0SAdrian Chadd */ 574eb6f0de0SAdrian Chadd while (bf != NULL) { 575eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 576eb6f0de0SAdrian Chadd "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n", 577eb6f0de0SAdrian Chadd __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen, 578eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 579eb6f0de0SAdrian Chadd 5806e84772fSAdrian Chadd /* 5816e84772fSAdrian Chadd * Setup the initial fields for the first descriptor - all 5826e84772fSAdrian Chadd * the non-11n specific stuff. 5836e84772fSAdrian Chadd */ 5846e84772fSAdrian Chadd ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc 5856e84772fSAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 5866e84772fSAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 5876e84772fSAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 5886e84772fSAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 5896e84772fSAdrian Chadd , bf->bf_state.bfs_txrate0 5906e84772fSAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 5916e84772fSAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 5926e84772fSAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 5936e84772fSAdrian Chadd , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */ 5946e84772fSAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 5956e84772fSAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 5966e84772fSAdrian Chadd ); 5976e84772fSAdrian Chadd 5986e84772fSAdrian Chadd /* 5996e84772fSAdrian Chadd * First descriptor? Setup the rate control and initial 6006e84772fSAdrian Chadd * aggregate header information. 6016e84772fSAdrian Chadd */ 6026e84772fSAdrian Chadd if (bf == bf_first) { 6036e84772fSAdrian Chadd /* 6046e84772fSAdrian Chadd * setup first desc with rate and aggr info 6056e84772fSAdrian Chadd */ 6066e84772fSAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 6076e84772fSAdrian Chadd } 6086e84772fSAdrian Chadd 6096e84772fSAdrian Chadd /* 6106e84772fSAdrian Chadd * Setup the descriptors for a multi-descriptor frame. 6116e84772fSAdrian Chadd * This is both aggregate and non-aggregate aware. 6126e84772fSAdrian Chadd */ 6136e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds0, bf, 6146e84772fSAdrian Chadd 1, /* is_aggr */ 6156e84772fSAdrian Chadd !! (bf == bf_first), /* is_first_subframe */ 6166e84772fSAdrian Chadd !! (bf->bf_next == NULL) /* is_last_subframe */ 6176e84772fSAdrian Chadd ); 6186e84772fSAdrian Chadd 6196e84772fSAdrian Chadd if (bf == bf_first) { 6206e84772fSAdrian Chadd /* 6216e84772fSAdrian Chadd * Initialise the first 11n aggregate with the 6226e84772fSAdrian Chadd * aggregate length and aggregate enable bits. 6236e84772fSAdrian Chadd */ 6246e84772fSAdrian Chadd ath_hal_set11n_aggr_first(sc->sc_ah, 6256e84772fSAdrian Chadd ds0, 6266e84772fSAdrian Chadd bf->bf_state.bfs_al, 6276e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 6286e84772fSAdrian Chadd } 629eb6f0de0SAdrian Chadd 630eb6f0de0SAdrian Chadd /* 631eb6f0de0SAdrian Chadd * Link the last descriptor of the previous frame 632eb6f0de0SAdrian Chadd * to the beginning descriptor of this frame. 633eb6f0de0SAdrian Chadd */ 634eb6f0de0SAdrian Chadd if (bf_prev != NULL) 635bb069955SAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds, 636bb069955SAdrian Chadd bf->bf_daddr); 637eb6f0de0SAdrian Chadd 638eb6f0de0SAdrian Chadd /* Save a copy so we can link the next descriptor in */ 639eb6f0de0SAdrian Chadd bf_prev = bf; 640eb6f0de0SAdrian Chadd bf = bf->bf_next; 641eb6f0de0SAdrian Chadd } 642eb6f0de0SAdrian Chadd 643eb6f0de0SAdrian Chadd /* 644eb6f0de0SAdrian Chadd * Set the first descriptor bf_lastds field to point to 645eb6f0de0SAdrian Chadd * the last descriptor in the last subframe, that's where 646eb6f0de0SAdrian Chadd * the status update will occur. 647eb6f0de0SAdrian Chadd */ 648eb6f0de0SAdrian Chadd bf_first->bf_lastds = bf_prev->bf_lastds; 649eb6f0de0SAdrian Chadd 650eb6f0de0SAdrian Chadd /* 651eb6f0de0SAdrian Chadd * And bf_last in the first descriptor points to the end of 652eb6f0de0SAdrian Chadd * the aggregate list. 653eb6f0de0SAdrian Chadd */ 654eb6f0de0SAdrian Chadd bf_first->bf_last = bf_prev; 655eb6f0de0SAdrian Chadd 656bbdf3df1SAdrian Chadd /* 657bbdf3df1SAdrian Chadd * For non-AR9300 NICs, which require the rate control 658bbdf3df1SAdrian Chadd * in the final descriptor - let's set that up now. 659bbdf3df1SAdrian Chadd * 660bbdf3df1SAdrian Chadd * This is because the filltxdesc() HAL call doesn't 661bbdf3df1SAdrian Chadd * populate the last segment with rate control information 662bbdf3df1SAdrian Chadd * if firstSeg is also true. For non-aggregate frames 663bbdf3df1SAdrian Chadd * that is fine, as the first frame already has rate control 664bbdf3df1SAdrian Chadd * info. But if the last frame in an aggregate has one 665bbdf3df1SAdrian Chadd * descriptor, both firstseg and lastseg will be true and 666bbdf3df1SAdrian Chadd * the rate info isn't copied. 667bbdf3df1SAdrian Chadd * 668bbdf3df1SAdrian Chadd * This is inefficient on MIPS/ARM platforms that have 669bbdf3df1SAdrian Chadd * non-cachable memory for TX descriptors, but we'll just 670bbdf3df1SAdrian Chadd * make do for now. 671bbdf3df1SAdrian Chadd * 672bbdf3df1SAdrian Chadd * As to why the rate table is stashed in the last descriptor 673bbdf3df1SAdrian Chadd * rather than the first descriptor? Because proctxdesc() 674bbdf3df1SAdrian Chadd * is called on the final descriptor in an MPDU or A-MPDU - 675bbdf3df1SAdrian Chadd * ie, the one that gets updated by the hardware upon 676bbdf3df1SAdrian Chadd * completion. That way proctxdesc() doesn't need to know 677bbdf3df1SAdrian Chadd * about the first _and_ last TX descriptor. 678bbdf3df1SAdrian Chadd */ 679bbdf3df1SAdrian Chadd ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0); 680bbdf3df1SAdrian Chadd 681eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__); 682eb6f0de0SAdrian Chadd } 683eb6f0de0SAdrian Chadd 68446634305SAdrian Chadd /* 68546634305SAdrian Chadd * Hand-off a frame to the multicast TX queue. 68646634305SAdrian Chadd * 68746634305SAdrian Chadd * This is a software TXQ which will be appended to the CAB queue 68846634305SAdrian Chadd * during the beacon setup code. 68946634305SAdrian Chadd * 69046634305SAdrian Chadd * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID 691fc56c9c5SAdrian Chadd * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated 69246634305SAdrian Chadd * with the actual hardware txq, or all of this will fall apart. 69346634305SAdrian Chadd * 69446634305SAdrian Chadd * XXX It may not be a bad idea to just stuff the QCU ID into bf_state 695fc56c9c5SAdrian Chadd * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated 69646634305SAdrian Chadd * correctly. 69746634305SAdrian Chadd */ 698eb6f0de0SAdrian Chadd static void 699eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 700eb6f0de0SAdrian Chadd struct ath_buf *bf) 701eb6f0de0SAdrian Chadd { 702375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 703375307d4SAdrian Chadd 704eb6f0de0SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 705eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 70656a85978SAdrian Chadd 70797c9a8e8SAdrian Chadd /* 70897c9a8e8SAdrian Chadd * Ensure that the tx queue is the cabq, so things get 70997c9a8e8SAdrian Chadd * mapped correctly. 71097c9a8e8SAdrian Chadd */ 71197c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) { 71283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 71397c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 71483bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue, 71597c9a8e8SAdrian Chadd txq->axq_qnum); 71697c9a8e8SAdrian Chadd } 71797c9a8e8SAdrian Chadd 71856a85978SAdrian Chadd ATH_TXQ_LOCK(txq); 7190891354cSAdrian Chadd if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) { 7200891354cSAdrian Chadd struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s); 721eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 722eb6f0de0SAdrian Chadd 723eb6f0de0SAdrian Chadd /* mark previous frame */ 7240891354cSAdrian Chadd wh = mtod(bf_last->bf_m, struct ieee80211_frame *); 725eb6f0de0SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 7260891354cSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap, 727eb6f0de0SAdrian Chadd BUS_DMASYNC_PREWRITE); 728eb6f0de0SAdrian Chadd 729eb6f0de0SAdrian Chadd /* link descriptor */ 7300891354cSAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, 7310891354cSAdrian Chadd bf_last->bf_lastds, 7320891354cSAdrian Chadd bf->bf_daddr); 733eb6f0de0SAdrian Chadd } 734eb6f0de0SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 735b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 736eb6f0de0SAdrian Chadd } 737eb6f0de0SAdrian Chadd 738eb6f0de0SAdrian Chadd /* 739eb6f0de0SAdrian Chadd * Hand-off packet to a hardware queue. 740eb6f0de0SAdrian Chadd */ 741eb6f0de0SAdrian Chadd static void 742d4365d16SAdrian Chadd ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 743d4365d16SAdrian Chadd struct ath_buf *bf) 744eb6f0de0SAdrian Chadd { 745eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 7469be82a42SAdrian Chadd struct ath_buf *bf_first; 74781a82688SAdrian Chadd 748b8e788a5SAdrian Chadd /* 749b8e788a5SAdrian Chadd * Insert the frame on the outbound list and pass it on 750b8e788a5SAdrian Chadd * to the hardware. Multicast frames buffered for power 751b8e788a5SAdrian Chadd * save stations and transmit from the CAB queue are stored 752b8e788a5SAdrian Chadd * on a s/w only queue and loaded on to the CAB queue in 753b8e788a5SAdrian Chadd * the SWBA handler since frames only go out on DTIM and 754b8e788a5SAdrian Chadd * to avoid possible races. 755b8e788a5SAdrian Chadd */ 756375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 757b8e788a5SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 758eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 759eb6f0de0SAdrian Chadd KASSERT(txq->axq_qnum != ATH_TXQ_SWQ, 760eb6f0de0SAdrian Chadd ("ath_tx_handoff_hw called for mcast queue")); 761eb6f0de0SAdrian Chadd 7629be82a42SAdrian Chadd /* 763f5c30c4eSAdrian Chadd * XXX We should instead just verify that sc_txstart_cnt 764f5c30c4eSAdrian Chadd * or ath_txproc_cnt > 0. That would mean that 765f5c30c4eSAdrian Chadd * the reset is going to be waiting for us to complete. 7669be82a42SAdrian Chadd */ 767f5c30c4eSAdrian Chadd if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) { 768f5c30c4eSAdrian Chadd device_printf(sc->sc_dev, 769f5c30c4eSAdrian Chadd "%s: TX dispatch without holding txcount/txstart refcnt!\n", 770ef27340cSAdrian Chadd __func__); 771ef27340cSAdrian Chadd } 772f5c30c4eSAdrian Chadd 773f5c30c4eSAdrian Chadd /* 774f5c30c4eSAdrian Chadd * XXX .. this is going to cause the hardware to get upset; 775f5c30c4eSAdrian Chadd * so we really should find some way to drop or queue 776f5c30c4eSAdrian Chadd * things. 777f5c30c4eSAdrian Chadd */ 778ef27340cSAdrian Chadd 779b837332dSAdrian Chadd ATH_TXQ_LOCK(txq); 780b8e788a5SAdrian Chadd 781b8e788a5SAdrian Chadd /* 7829be82a42SAdrian Chadd * XXX TODO: if there's a holdingbf, then 7839be82a42SAdrian Chadd * ATH_TXQ_PUTRUNNING should be clear. 7849be82a42SAdrian Chadd * 7859be82a42SAdrian Chadd * If there is a holdingbf and the list is empty, 7869be82a42SAdrian Chadd * then axq_link should be pointing to the holdingbf. 7879be82a42SAdrian Chadd * 7889be82a42SAdrian Chadd * Otherwise it should point to the last descriptor 7899be82a42SAdrian Chadd * in the last ath_buf. 7909be82a42SAdrian Chadd * 7919be82a42SAdrian Chadd * In any case, we should really ensure that we 7929be82a42SAdrian Chadd * update the previous descriptor link pointer to 7939be82a42SAdrian Chadd * this descriptor, regardless of all of the above state. 7949be82a42SAdrian Chadd * 7959be82a42SAdrian Chadd * For now this is captured by having axq_link point 7969be82a42SAdrian Chadd * to either the holdingbf (if the TXQ list is empty) 7979be82a42SAdrian Chadd * or the end of the list (if the TXQ list isn't empty.) 7989be82a42SAdrian Chadd * I'd rather just kill axq_link here and do it as above. 799b8e788a5SAdrian Chadd */ 80003682514SAdrian Chadd 801b8e788a5SAdrian Chadd /* 8029be82a42SAdrian Chadd * Append the frame to the TX queue. 803b8e788a5SAdrian Chadd */ 804b8e788a5SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 805b1dddc28SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, 806b1dddc28SAdrian Chadd "ath_tx_handoff: non-tdma: txq=%u, add bf=%p " 80703682514SAdrian Chadd "depth=%d", 80803682514SAdrian Chadd txq->axq_qnum, 80903682514SAdrian Chadd bf, 81003682514SAdrian Chadd txq->axq_depth); 81103682514SAdrian Chadd 8129be82a42SAdrian Chadd /* 8139be82a42SAdrian Chadd * If there's a link pointer, update it. 8149be82a42SAdrian Chadd * 8159be82a42SAdrian Chadd * XXX we should replace this with the above logic, just 8169be82a42SAdrian Chadd * to kill axq_link with fire. 8179be82a42SAdrian Chadd */ 8189be82a42SAdrian Chadd if (txq->axq_link != NULL) { 819b8e788a5SAdrian Chadd *txq->axq_link = bf->bf_daddr; 820b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 821b8e788a5SAdrian Chadd "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 822b8e788a5SAdrian Chadd txq->axq_qnum, txq->axq_link, 823d4365d16SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 824d4365d16SAdrian Chadd txq->axq_depth); 82503682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 82603682514SAdrian Chadd "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) " 82703682514SAdrian Chadd "lastds=%d", 82803682514SAdrian Chadd txq->axq_qnum, txq->axq_link, 82903682514SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 83003682514SAdrian Chadd bf->bf_lastds); 831b8e788a5SAdrian Chadd } 83297c9a8e8SAdrian Chadd 8339be82a42SAdrian Chadd /* 8349be82a42SAdrian Chadd * If we've not pushed anything into the hardware yet, 8359be82a42SAdrian Chadd * push the head of the queue into the TxDP. 8369be82a42SAdrian Chadd * 8379be82a42SAdrian Chadd * Once we've started DMA, there's no guarantee that 8389be82a42SAdrian Chadd * updating the TxDP with a new value will actually work. 8399be82a42SAdrian Chadd * So we just don't do that - if we hit the end of the list, 8409be82a42SAdrian Chadd * we keep that buffer around (the "holding buffer") and 8419be82a42SAdrian Chadd * re-start DMA by updating the link pointer of _that_ 8429be82a42SAdrian Chadd * descriptor and then restart DMA. 8439be82a42SAdrian Chadd */ 8449be82a42SAdrian Chadd if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) { 8459be82a42SAdrian Chadd bf_first = TAILQ_FIRST(&txq->axq_q); 8469be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING; 8479be82a42SAdrian Chadd ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr); 8489be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 8499be82a42SAdrian Chadd "%s: TXDP[%u] = %p (%p) depth %d\n", 8509be82a42SAdrian Chadd __func__, txq->axq_qnum, 8519be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 8529be82a42SAdrian Chadd txq->axq_depth); 8539be82a42SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 8549be82a42SAdrian Chadd "ath_tx_handoff: TXDP[%u] = %p (%p) " 8559be82a42SAdrian Chadd "lastds=%p depth %d", 8569be82a42SAdrian Chadd txq->axq_qnum, 8579be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 8589be82a42SAdrian Chadd bf_first->bf_lastds, 8599be82a42SAdrian Chadd txq->axq_depth); 8609be82a42SAdrian Chadd } 8619be82a42SAdrian Chadd 8629be82a42SAdrian Chadd /* 8639be82a42SAdrian Chadd * Ensure that the bf TXQ matches this TXQ, so later 8649be82a42SAdrian Chadd * checking and holding buffer manipulation is sane. 8659be82a42SAdrian Chadd */ 86697c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) { 86783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 86897c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 86983bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue, 87097c9a8e8SAdrian Chadd txq->axq_qnum); 87197c9a8e8SAdrian Chadd } 87297c9a8e8SAdrian Chadd 8739be82a42SAdrian Chadd /* 8749be82a42SAdrian Chadd * Track aggregate queue depth. 8759be82a42SAdrian Chadd */ 8766edf1dc7SAdrian Chadd if (bf->bf_state.bfs_aggr) 8776edf1dc7SAdrian Chadd txq->axq_aggr_depth++; 8789be82a42SAdrian Chadd 8799be82a42SAdrian Chadd /* 8809be82a42SAdrian Chadd * Update the link pointer. 8819be82a42SAdrian Chadd */ 882bb069955SAdrian Chadd ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); 8839be82a42SAdrian Chadd 8849be82a42SAdrian Chadd /* 8859be82a42SAdrian Chadd * Start DMA. 8869be82a42SAdrian Chadd * 8879be82a42SAdrian Chadd * If we wrote a TxDP above, DMA will start from here. 8889be82a42SAdrian Chadd * 8899be82a42SAdrian Chadd * If DMA is running, it'll do nothing. 8909be82a42SAdrian Chadd * 8919be82a42SAdrian Chadd * If the DMA engine hit the end of the QCU list (ie LINK=NULL, 8929be82a42SAdrian Chadd * or VEOL) then it stops at the last transmitted write. 8939be82a42SAdrian Chadd * We then append a new frame by updating the link pointer 8949be82a42SAdrian Chadd * in that descriptor and then kick TxE here; it will re-read 8959be82a42SAdrian Chadd * that last descriptor and find the new descriptor to transmit. 8969be82a42SAdrian Chadd * 8979be82a42SAdrian Chadd * This is why we keep the holding descriptor around. 8989be82a42SAdrian Chadd */ 899b8e788a5SAdrian Chadd ath_hal_txstart(ah, txq->axq_qnum); 900b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 90103682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 1, 90203682514SAdrian Chadd "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum); 903b8e788a5SAdrian Chadd } 904eb6f0de0SAdrian Chadd 905eb6f0de0SAdrian Chadd /* 906eb6f0de0SAdrian Chadd * Restart TX DMA for the given TXQ. 907eb6f0de0SAdrian Chadd * 908eb6f0de0SAdrian Chadd * This must be called whether the queue is empty or not. 909eb6f0de0SAdrian Chadd */ 910746bab5bSAdrian Chadd static void 911746bab5bSAdrian Chadd ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq) 912eb6f0de0SAdrian Chadd { 913b1f3262cSAdrian Chadd struct ath_buf *bf, *bf_last; 914eb6f0de0SAdrian Chadd 915b837332dSAdrian Chadd ATH_TXQ_LOCK_ASSERT(txq); 916eb6f0de0SAdrian Chadd 917b1f3262cSAdrian Chadd /* XXX make this ATH_TXQ_FIRST */ 918eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&txq->axq_q); 919b1f3262cSAdrian Chadd bf_last = ATH_TXQ_LAST(txq, axq_q_s); 920b1f3262cSAdrian Chadd 921eb6f0de0SAdrian Chadd if (bf == NULL) 922eb6f0de0SAdrian Chadd return; 923eb6f0de0SAdrian Chadd 9249be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_RESET, 9259be82a42SAdrian Chadd "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n", 9269be82a42SAdrian Chadd __func__, 9279be82a42SAdrian Chadd txq->axq_qnum, 9289be82a42SAdrian Chadd bf, 9299be82a42SAdrian Chadd bf_last, 9309be82a42SAdrian Chadd (uint32_t) bf->bf_daddr); 9319be82a42SAdrian Chadd 9326112d22cSAdrian Chadd #ifdef ATH_DEBUG 9339be82a42SAdrian Chadd if (sc->sc_debug & ATH_DEBUG_RESET) 9349be82a42SAdrian Chadd ath_tx_dump(sc, txq); 9356112d22cSAdrian Chadd #endif 9369be82a42SAdrian Chadd 9379be82a42SAdrian Chadd /* 9389be82a42SAdrian Chadd * This is called from a restart, so DMA is known to be 9399be82a42SAdrian Chadd * completely stopped. 9409be82a42SAdrian Chadd */ 9419be82a42SAdrian Chadd KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)), 9429be82a42SAdrian Chadd ("%s: Q%d: called with PUTRUNNING=1\n", 9439be82a42SAdrian Chadd __func__, 9449be82a42SAdrian Chadd txq->axq_qnum)); 9459be82a42SAdrian Chadd 9469be82a42SAdrian Chadd ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr); 9479be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING; 9489be82a42SAdrian Chadd 9496112d22cSAdrian Chadd ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds, 9506112d22cSAdrian Chadd &txq->axq_link); 9516112d22cSAdrian Chadd ath_hal_txstart(sc->sc_ah, txq->axq_qnum); 952eb6f0de0SAdrian Chadd } 953eb6f0de0SAdrian Chadd 954eb6f0de0SAdrian Chadd /* 955eb6f0de0SAdrian Chadd * Hand off a packet to the hardware (or mcast queue.) 956eb6f0de0SAdrian Chadd * 957eb6f0de0SAdrian Chadd * The relevant hardware txq should be locked. 958eb6f0de0SAdrian Chadd */ 959eb6f0de0SAdrian Chadd static void 960746bab5bSAdrian Chadd ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq, 961746bab5bSAdrian Chadd struct ath_buf *bf) 962eb6f0de0SAdrian Chadd { 963375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 964eb6f0de0SAdrian Chadd 965bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 966bb327d28SAdrian Chadd if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC)) 967bb327d28SAdrian Chadd ath_tx_alq_post(sc, bf); 968bb327d28SAdrian Chadd #endif 969bb327d28SAdrian Chadd 970eb6f0de0SAdrian Chadd if (txq->axq_qnum == ATH_TXQ_SWQ) 971eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(sc, txq, bf); 972eb6f0de0SAdrian Chadd else 973eb6f0de0SAdrian Chadd ath_tx_handoff_hw(sc, txq, bf); 974b8e788a5SAdrian Chadd } 975b8e788a5SAdrian Chadd 97681a82688SAdrian Chadd static int 97781a82688SAdrian Chadd ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni, 978d4365d16SAdrian Chadd struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen, 979d4365d16SAdrian Chadd int *keyix) 98081a82688SAdrian Chadd { 98112be5b9cSAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 98212be5b9cSAdrian Chadd "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n", 98312be5b9cSAdrian Chadd __func__, 98412be5b9cSAdrian Chadd *hdrlen, 98512be5b9cSAdrian Chadd *pktlen, 98612be5b9cSAdrian Chadd isfrag, 98712be5b9cSAdrian Chadd iswep, 98812be5b9cSAdrian Chadd m0); 98912be5b9cSAdrian Chadd 99081a82688SAdrian Chadd if (iswep) { 99181a82688SAdrian Chadd const struct ieee80211_cipher *cip; 99281a82688SAdrian Chadd struct ieee80211_key *k; 99381a82688SAdrian Chadd 99481a82688SAdrian Chadd /* 99581a82688SAdrian Chadd * Construct the 802.11 header+trailer for an encrypted 99681a82688SAdrian Chadd * frame. The only reason this can fail is because of an 99781a82688SAdrian Chadd * unknown or unsupported cipher/key type. 99881a82688SAdrian Chadd */ 99981a82688SAdrian Chadd k = ieee80211_crypto_encap(ni, m0); 100081a82688SAdrian Chadd if (k == NULL) { 100181a82688SAdrian Chadd /* 100281a82688SAdrian Chadd * This can happen when the key is yanked after the 100381a82688SAdrian Chadd * frame was queued. Just discard the frame; the 100481a82688SAdrian Chadd * 802.11 layer counts failures and provides 100581a82688SAdrian Chadd * debugging/diagnostics. 100681a82688SAdrian Chadd */ 1007d4365d16SAdrian Chadd return (0); 100881a82688SAdrian Chadd } 100981a82688SAdrian Chadd /* 101081a82688SAdrian Chadd * Adjust the packet + header lengths for the crypto 101181a82688SAdrian Chadd * additions and calculate the h/w key index. When 101281a82688SAdrian Chadd * a s/w mic is done the frame will have had any mic 101381a82688SAdrian Chadd * added to it prior to entry so m0->m_pkthdr.len will 101481a82688SAdrian Chadd * account for it. Otherwise we need to add it to the 101581a82688SAdrian Chadd * packet length. 101681a82688SAdrian Chadd */ 101781a82688SAdrian Chadd cip = k->wk_cipher; 101881a82688SAdrian Chadd (*hdrlen) += cip->ic_header; 101981a82688SAdrian Chadd (*pktlen) += cip->ic_header + cip->ic_trailer; 102081a82688SAdrian Chadd /* NB: frags always have any TKIP MIC done in s/w */ 102181a82688SAdrian Chadd if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag) 102281a82688SAdrian Chadd (*pktlen) += cip->ic_miclen; 102381a82688SAdrian Chadd (*keyix) = k->wk_keyix; 102481a82688SAdrian Chadd } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) { 102581a82688SAdrian Chadd /* 102681a82688SAdrian Chadd * Use station key cache slot, if assigned. 102781a82688SAdrian Chadd */ 102881a82688SAdrian Chadd (*keyix) = ni->ni_ucastkey.wk_keyix; 102981a82688SAdrian Chadd if ((*keyix) == IEEE80211_KEYIX_NONE) 103081a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 103181a82688SAdrian Chadd } else 103281a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 103381a82688SAdrian Chadd 1034d4365d16SAdrian Chadd return (1); 103581a82688SAdrian Chadd } 103681a82688SAdrian Chadd 1037e2e4a2c2SAdrian Chadd /* 1038e2e4a2c2SAdrian Chadd * Calculate whether interoperability protection is required for 1039e2e4a2c2SAdrian Chadd * this frame. 1040e2e4a2c2SAdrian Chadd * 1041e2e4a2c2SAdrian Chadd * This requires the rate control information be filled in, 1042e2e4a2c2SAdrian Chadd * as the protection requirement depends upon the current 1043e2e4a2c2SAdrian Chadd * operating mode / PHY. 1044e2e4a2c2SAdrian Chadd */ 1045e2e4a2c2SAdrian Chadd static void 1046e2e4a2c2SAdrian Chadd ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf) 1047e2e4a2c2SAdrian Chadd { 1048e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1049e2e4a2c2SAdrian Chadd uint8_t rix; 1050e2e4a2c2SAdrian Chadd uint16_t flags; 1051e2e4a2c2SAdrian Chadd int shortPreamble; 1052e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 10537a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic; 1054e2e4a2c2SAdrian Chadd 1055e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1056e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1057e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1058e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1059e2e4a2c2SAdrian Chadd 10605abc0b25SAdrian Chadd /* Disable frame protection for TOA probe frames */ 10615abc0b25SAdrian Chadd if (bf->bf_flags & ATH_BUF_TOA_PROBE) { 10625abc0b25SAdrian Chadd /* XXX count */ 10635abc0b25SAdrian Chadd flags &= ~(HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA); 10645abc0b25SAdrian Chadd bf->bf_state.bfs_doprot = 0; 10655abc0b25SAdrian Chadd goto finish; 10665abc0b25SAdrian Chadd } 10675abc0b25SAdrian Chadd 1068e2e4a2c2SAdrian Chadd /* 1069e2e4a2c2SAdrian Chadd * If 802.11g protection is enabled, determine whether 1070e2e4a2c2SAdrian Chadd * to use RTS/CTS or just CTS. Note that this is only 1071e2e4a2c2SAdrian Chadd * done for OFDM unicast frames. 1072e2e4a2c2SAdrian Chadd */ 1073e2e4a2c2SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1074e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_OFDM && 1075e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1076e2e4a2c2SAdrian Chadd bf->bf_state.bfs_doprot = 1; 1077e2e4a2c2SAdrian Chadd /* XXX fragments must use CCK rates w/ protection */ 1078e2e4a2c2SAdrian Chadd if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1079e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1080e2e4a2c2SAdrian Chadd } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1081e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 1082e2e4a2c2SAdrian Chadd } 1083e2e4a2c2SAdrian Chadd /* 1084e2e4a2c2SAdrian Chadd * For frags it would be desirable to use the 1085e2e4a2c2SAdrian Chadd * highest CCK rate for RTS/CTS. But stations 1086e2e4a2c2SAdrian Chadd * farther away may detect it at a lower CCK rate 1087e2e4a2c2SAdrian Chadd * so use the configured protection rate instead 1088e2e4a2c2SAdrian Chadd * (for now). 1089e2e4a2c2SAdrian Chadd */ 1090e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_protect++; 1091e2e4a2c2SAdrian Chadd } 1092e2e4a2c2SAdrian Chadd 1093e2e4a2c2SAdrian Chadd /* 1094e2e4a2c2SAdrian Chadd * If 11n protection is enabled and it's a HT frame, 1095e2e4a2c2SAdrian Chadd * enable RTS. 1096e2e4a2c2SAdrian Chadd * 1097e2e4a2c2SAdrian Chadd * XXX ic_htprotmode or ic_curhtprotmode? 1098e2e4a2c2SAdrian Chadd * XXX should it_htprotmode only matter if ic_curhtprotmode 1099e2e4a2c2SAdrian Chadd * XXX indicates it's not a HT pure environment? 1100e2e4a2c2SAdrian Chadd */ 1101e2e4a2c2SAdrian Chadd if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) && 1102e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_HT && 1103e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1104e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1105e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_htprotect++; 1106e2e4a2c2SAdrian Chadd } 11075abc0b25SAdrian Chadd 11085abc0b25SAdrian Chadd finish: 1109e2e4a2c2SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1110e2e4a2c2SAdrian Chadd } 1111e2e4a2c2SAdrian Chadd 1112e2e4a2c2SAdrian Chadd /* 1113e2e4a2c2SAdrian Chadd * Update the frame duration given the currently selected rate. 1114e2e4a2c2SAdrian Chadd * 1115e2e4a2c2SAdrian Chadd * This also updates the frame duration value, so it will require 1116e2e4a2c2SAdrian Chadd * a DMA flush. 1117e2e4a2c2SAdrian Chadd */ 1118e2e4a2c2SAdrian Chadd static void 1119e2e4a2c2SAdrian Chadd ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf) 1120e2e4a2c2SAdrian Chadd { 1121e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1122e2e4a2c2SAdrian Chadd uint8_t rix; 1123e2e4a2c2SAdrian Chadd uint16_t flags; 1124e2e4a2c2SAdrian Chadd int shortPreamble; 1125e2e4a2c2SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1126e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1127e2e4a2c2SAdrian Chadd int isfrag = bf->bf_m->m_flags & M_FRAG; 1128e2e4a2c2SAdrian Chadd 1129e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1130e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1131e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1132e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1133e2e4a2c2SAdrian Chadd 1134e2e4a2c2SAdrian Chadd /* 1135e2e4a2c2SAdrian Chadd * Calculate duration. This logically belongs in the 802.11 1136e2e4a2c2SAdrian Chadd * layer but it lacks sufficient information to calculate it. 1137e2e4a2c2SAdrian Chadd */ 1138e2e4a2c2SAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0 && 1139e2e4a2c2SAdrian Chadd (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 1140e2e4a2c2SAdrian Chadd u_int16_t dur; 1141e2e4a2c2SAdrian Chadd if (shortPreamble) 1142e2e4a2c2SAdrian Chadd dur = rt->info[rix].spAckDuration; 1143e2e4a2c2SAdrian Chadd else 1144e2e4a2c2SAdrian Chadd dur = rt->info[rix].lpAckDuration; 1145e2e4a2c2SAdrian Chadd if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) { 1146e2e4a2c2SAdrian Chadd dur += dur; /* additional SIFS+ACK */ 1147e2e4a2c2SAdrian Chadd /* 1148e2e4a2c2SAdrian Chadd * Include the size of next fragment so NAV is 1149e2e4a2c2SAdrian Chadd * updated properly. The last fragment uses only 1150e2e4a2c2SAdrian Chadd * the ACK duration 11519572684aSAdrian Chadd * 11529572684aSAdrian Chadd * XXX TODO: ensure that the rate lookup for each 11539572684aSAdrian Chadd * fragment is the same as the rate used by the 11549572684aSAdrian Chadd * first fragment! 1155e2e4a2c2SAdrian Chadd */ 1156cd7dffd0SAdrian Chadd dur += ath_hal_computetxtime(ah, 1157cd7dffd0SAdrian Chadd rt, 1158cd7dffd0SAdrian Chadd bf->bf_nextfraglen, 11597ff1939dSAdrian Chadd rix, shortPreamble, 11607ff1939dSAdrian Chadd AH_TRUE); 1161e2e4a2c2SAdrian Chadd } 1162e2e4a2c2SAdrian Chadd if (isfrag) { 1163e2e4a2c2SAdrian Chadd /* 1164e2e4a2c2SAdrian Chadd * Force hardware to use computed duration for next 1165e2e4a2c2SAdrian Chadd * fragment by disabling multi-rate retry which updates 1166e2e4a2c2SAdrian Chadd * duration based on the multi-rate duration table. 1167e2e4a2c2SAdrian Chadd */ 1168e2e4a2c2SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1169e2e4a2c2SAdrian Chadd bf->bf_state.bfs_try0 = ATH_TXMGTTRY; 1170e2e4a2c2SAdrian Chadd /* XXX update bfs_rc[0].try? */ 1171e2e4a2c2SAdrian Chadd } 1172e2e4a2c2SAdrian Chadd 1173e2e4a2c2SAdrian Chadd /* Update the duration field itself */ 1174e2e4a2c2SAdrian Chadd *(u_int16_t *)wh->i_dur = htole16(dur); 1175e2e4a2c2SAdrian Chadd } 1176e2e4a2c2SAdrian Chadd } 1177e2e4a2c2SAdrian Chadd 1178e42b5dbaSAdrian Chadd static uint8_t 1179e42b5dbaSAdrian Chadd ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt, 1180eb6f0de0SAdrian Chadd int cix, int shortPreamble) 118179f02dbfSAdrian Chadd { 1182e42b5dbaSAdrian Chadd uint8_t ctsrate; 1183e42b5dbaSAdrian Chadd 118479f02dbfSAdrian Chadd /* 118579f02dbfSAdrian Chadd * CTS transmit rate is derived from the transmit rate 118679f02dbfSAdrian Chadd * by looking in the h/w rate table. We must also factor 118779f02dbfSAdrian Chadd * in whether or not a short preamble is to be used. 118879f02dbfSAdrian Chadd */ 118979f02dbfSAdrian Chadd /* NB: cix is set above where RTS/CTS is enabled */ 119079f02dbfSAdrian Chadd KASSERT(cix != 0xff, ("cix not setup")); 1191e42b5dbaSAdrian Chadd ctsrate = rt->info[cix].rateCode; 1192e42b5dbaSAdrian Chadd 1193e42b5dbaSAdrian Chadd /* XXX this should only matter for legacy rates */ 1194e42b5dbaSAdrian Chadd if (shortPreamble) 1195e42b5dbaSAdrian Chadd ctsrate |= rt->info[cix].shortPreamble; 1196e42b5dbaSAdrian Chadd 1197d4365d16SAdrian Chadd return (ctsrate); 1198e42b5dbaSAdrian Chadd } 1199e42b5dbaSAdrian Chadd 1200e42b5dbaSAdrian Chadd /* 1201e42b5dbaSAdrian Chadd * Calculate the RTS/CTS duration for legacy frames. 1202e42b5dbaSAdrian Chadd */ 1203e42b5dbaSAdrian Chadd static int 1204e42b5dbaSAdrian Chadd ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix, 1205e42b5dbaSAdrian Chadd int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt, 1206e42b5dbaSAdrian Chadd int flags) 1207e42b5dbaSAdrian Chadd { 1208e42b5dbaSAdrian Chadd int ctsduration = 0; 1209e42b5dbaSAdrian Chadd 1210e42b5dbaSAdrian Chadd /* This mustn't be called for HT modes */ 1211e42b5dbaSAdrian Chadd if (rt->info[cix].phy == IEEE80211_T_HT) { 1212e42b5dbaSAdrian Chadd printf("%s: HT rate where it shouldn't be (0x%x)\n", 1213e42b5dbaSAdrian Chadd __func__, rt->info[cix].rateCode); 1214d4365d16SAdrian Chadd return (-1); 1215e42b5dbaSAdrian Chadd } 1216e42b5dbaSAdrian Chadd 121779f02dbfSAdrian Chadd /* 121879f02dbfSAdrian Chadd * Compute the transmit duration based on the frame 121979f02dbfSAdrian Chadd * size and the size of an ACK frame. We call into the 122079f02dbfSAdrian Chadd * HAL to do the computation since it depends on the 122179f02dbfSAdrian Chadd * characteristics of the actual PHY being used. 122279f02dbfSAdrian Chadd * 122379f02dbfSAdrian Chadd * NB: CTS is assumed the same size as an ACK so we can 122479f02dbfSAdrian Chadd * use the precalculated ACK durations. 122579f02dbfSAdrian Chadd */ 122679f02dbfSAdrian Chadd if (shortPreamble) { 122779f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1228e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].spAckDuration; 1229e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 12307ff1939dSAdrian Chadd rt, pktlen, rix, AH_TRUE, AH_TRUE); 123179f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1232e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].spAckDuration; 123379f02dbfSAdrian Chadd } else { 123479f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1235e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].lpAckDuration; 1236e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 12377ff1939dSAdrian Chadd rt, pktlen, rix, AH_FALSE, AH_TRUE); 123879f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1239e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].lpAckDuration; 124079f02dbfSAdrian Chadd } 1241e42b5dbaSAdrian Chadd 1242d4365d16SAdrian Chadd return (ctsduration); 124379f02dbfSAdrian Chadd } 124479f02dbfSAdrian Chadd 1245eb6f0de0SAdrian Chadd /* 1246eb6f0de0SAdrian Chadd * Update the given ath_buf with updated rts/cts setup and duration 1247eb6f0de0SAdrian Chadd * values. 1248eb6f0de0SAdrian Chadd * 1249eb6f0de0SAdrian Chadd * To support rate lookups for each software retry, the rts/cts rate 1250eb6f0de0SAdrian Chadd * and cts duration must be re-calculated. 1251eb6f0de0SAdrian Chadd * 1252eb6f0de0SAdrian Chadd * This function assumes the RTS/CTS flags have been set as needed; 1253eb6f0de0SAdrian Chadd * mrr has been disabled; and the rate control lookup has been done. 1254eb6f0de0SAdrian Chadd * 1255eb6f0de0SAdrian Chadd * XXX TODO: MRR need only be disabled for the pre-11n NICs. 1256eb6f0de0SAdrian Chadd * XXX The 11n NICs support per-rate RTS/CTS configuration. 1257eb6f0de0SAdrian Chadd */ 1258eb6f0de0SAdrian Chadd static void 1259eb6f0de0SAdrian Chadd ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf) 1260eb6f0de0SAdrian Chadd { 1261eb6f0de0SAdrian Chadd uint16_t ctsduration = 0; 1262eb6f0de0SAdrian Chadd uint8_t ctsrate = 0; 1263eb6f0de0SAdrian Chadd uint8_t rix = bf->bf_state.bfs_rc[0].rix; 1264eb6f0de0SAdrian Chadd uint8_t cix = 0; 1265eb6f0de0SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1266eb6f0de0SAdrian Chadd 1267eb6f0de0SAdrian Chadd /* 1268eb6f0de0SAdrian Chadd * No RTS/CTS enabled? Don't bother. 1269eb6f0de0SAdrian Chadd */ 1270875a9451SAdrian Chadd if ((bf->bf_state.bfs_txflags & 1271eb6f0de0SAdrian Chadd (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) { 1272eb6f0de0SAdrian Chadd /* XXX is this really needed? */ 1273eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 1274eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1275eb6f0de0SAdrian Chadd return; 1276eb6f0de0SAdrian Chadd } 1277eb6f0de0SAdrian Chadd 1278eb6f0de0SAdrian Chadd /* 1279eb6f0de0SAdrian Chadd * If protection is enabled, use the protection rix control 1280eb6f0de0SAdrian Chadd * rate. Otherwise use the rate0 control rate. 1281eb6f0de0SAdrian Chadd */ 1282eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_doprot) 1283eb6f0de0SAdrian Chadd rix = sc->sc_protrix; 1284eb6f0de0SAdrian Chadd else 1285eb6f0de0SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1286eb6f0de0SAdrian Chadd 1287eb6f0de0SAdrian Chadd /* 1288eb6f0de0SAdrian Chadd * If the raw path has hard-coded ctsrate0 to something, 1289eb6f0de0SAdrian Chadd * use it. 1290eb6f0de0SAdrian Chadd */ 1291eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ctsrate0 != 0) 1292eb6f0de0SAdrian Chadd cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0); 1293eb6f0de0SAdrian Chadd else 1294eb6f0de0SAdrian Chadd /* Control rate from above */ 1295eb6f0de0SAdrian Chadd cix = rt->info[rix].controlRate; 1296eb6f0de0SAdrian Chadd 1297eb6f0de0SAdrian Chadd /* Calculate the rtscts rate for the given cix */ 1298eb6f0de0SAdrian Chadd ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix, 1299eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream); 1300eb6f0de0SAdrian Chadd 1301eb6f0de0SAdrian Chadd /* The 11n chipsets do ctsduration calculations for you */ 1302eb6f0de0SAdrian Chadd if (! ath_tx_is_11n(sc)) 1303eb6f0de0SAdrian Chadd ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix, 1304eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen, 1305875a9451SAdrian Chadd rt, bf->bf_state.bfs_txflags); 1306eb6f0de0SAdrian Chadd 1307eb6f0de0SAdrian Chadd /* Squirrel away in ath_buf */ 1308eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = ctsrate; 1309eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = ctsduration; 1310eb6f0de0SAdrian Chadd 1311eb6f0de0SAdrian Chadd /* 1312eb6f0de0SAdrian Chadd * Must disable multi-rate retry when using RTS/CTS. 1313eb6f0de0SAdrian Chadd */ 1314af017101SAdrian Chadd if (!sc->sc_mrrprot) { 1315eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1316eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = 1317eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */ 1318eb6f0de0SAdrian Chadd } 1319af017101SAdrian Chadd } 1320eb6f0de0SAdrian Chadd 1321eb6f0de0SAdrian Chadd /* 1322eb6f0de0SAdrian Chadd * Setup the descriptor chain for a normal or fast-frame 1323eb6f0de0SAdrian Chadd * frame. 132446634305SAdrian Chadd * 132546634305SAdrian Chadd * XXX TODO: extend to include the destination hardware QCU ID. 132646634305SAdrian Chadd * Make sure that is correct. Make sure that when being added 132746634305SAdrian Chadd * to the mcastq, the CABQ QCUID is set or things will get a bit 132846634305SAdrian Chadd * odd. 1329eb6f0de0SAdrian Chadd */ 1330eb6f0de0SAdrian Chadd static void 1331eb6f0de0SAdrian Chadd ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf) 1332eb6f0de0SAdrian Chadd { 1333eb6f0de0SAdrian Chadd struct ath_desc *ds = bf->bf_desc; 1334eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1335eb6f0de0SAdrian Chadd 13367d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 133783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 133883bbd5ebSRui Paulo "%s: bf=%p, txrate0=%d\n", __func__, bf, 0); 13397d9dd2acSAdrian Chadd 1340eb6f0de0SAdrian Chadd ath_hal_setuptxdesc(ah, ds 1341eb6f0de0SAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 1342eb6f0de0SAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 1343eb6f0de0SAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 1344eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 1345eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txrate0 1346eb6f0de0SAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 1347eb6f0de0SAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 1348eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 1349875a9451SAdrian Chadd , bf->bf_state.bfs_txflags /* flags */ 1350eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 1351eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 1352eb6f0de0SAdrian Chadd ); 1353eb6f0de0SAdrian Chadd 1354eb6f0de0SAdrian Chadd /* 1355eb6f0de0SAdrian Chadd * This will be overriden when the descriptor chain is written. 1356eb6f0de0SAdrian Chadd */ 1357eb6f0de0SAdrian Chadd bf->bf_lastds = ds; 1358eb6f0de0SAdrian Chadd bf->bf_last = bf; 1359eb6f0de0SAdrian Chadd 1360d34a7347SAdrian Chadd /* Set rate control and descriptor chain for this frame */ 1361d34a7347SAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 13626e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0); 1363eb6f0de0SAdrian Chadd } 1364eb6f0de0SAdrian Chadd 1365eb6f0de0SAdrian Chadd /* 1366eb6f0de0SAdrian Chadd * Do a rate lookup. 1367eb6f0de0SAdrian Chadd * 1368eb6f0de0SAdrian Chadd * This performs a rate lookup for the given ath_buf only if it's required. 1369eb6f0de0SAdrian Chadd * Non-data frames and raw frames don't require it. 1370eb6f0de0SAdrian Chadd * 1371eb6f0de0SAdrian Chadd * This populates the primary and MRR entries; MRR values are 1372eb6f0de0SAdrian Chadd * then disabled later on if something requires it (eg RTS/CTS on 1373eb6f0de0SAdrian Chadd * pre-11n chipsets. 1374eb6f0de0SAdrian Chadd * 1375eb6f0de0SAdrian Chadd * This needs to be done before the RTS/CTS fields are calculated 1376eb6f0de0SAdrian Chadd * as they may depend upon the rate chosen. 1377eb6f0de0SAdrian Chadd */ 1378eb6f0de0SAdrian Chadd static void 1379eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf) 1380eb6f0de0SAdrian Chadd { 1381eb6f0de0SAdrian Chadd uint8_t rate, rix; 1382eb6f0de0SAdrian Chadd int try0; 1383eb6f0de0SAdrian Chadd 1384eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_doratelookup) 1385eb6f0de0SAdrian Chadd return; 1386eb6f0de0SAdrian Chadd 1387eb6f0de0SAdrian Chadd /* Get rid of any previous state */ 1388eb6f0de0SAdrian Chadd bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1389eb6f0de0SAdrian Chadd 1390eb6f0de0SAdrian Chadd ATH_NODE_LOCK(ATH_NODE(bf->bf_node)); 1391eb6f0de0SAdrian Chadd ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream, 1392eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, &rix, &try0, &rate); 1393eb6f0de0SAdrian Chadd 1394eb6f0de0SAdrian Chadd /* In case MRR is disabled, make sure rc[0] is setup correctly */ 1395eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1396eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = rate; 1397eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1398eb6f0de0SAdrian Chadd 1399eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY) 1400eb6f0de0SAdrian Chadd ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix, 1401eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc); 1402eb6f0de0SAdrian Chadd ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node)); 1403eb6f0de0SAdrian Chadd 1404eb6f0de0SAdrian Chadd sc->sc_txrix = rix; /* for LED blinking */ 1405eb6f0de0SAdrian Chadd sc->sc_lastdatarix = rix; /* for fast frames */ 1406eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1407eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = rate; 1408eb6f0de0SAdrian Chadd } 1409eb6f0de0SAdrian Chadd 1410eb6f0de0SAdrian Chadd /* 14110c54de88SAdrian Chadd * Update the CLRDMASK bit in the ath_buf if it needs to be set. 14120c54de88SAdrian Chadd */ 14130c54de88SAdrian Chadd static void 14140c54de88SAdrian Chadd ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid, 14150c54de88SAdrian Chadd struct ath_buf *bf) 14160c54de88SAdrian Chadd { 14174f25ddbbSAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 14180c54de88SAdrian Chadd 1419375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 14200c54de88SAdrian Chadd 14214f25ddbbSAdrian Chadd if (an->clrdmask == 1) { 14220c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 14234f25ddbbSAdrian Chadd an->clrdmask = 0; 14240c54de88SAdrian Chadd } 14250c54de88SAdrian Chadd } 14260c54de88SAdrian Chadd 14270c54de88SAdrian Chadd /* 142822a3aee6SAdrian Chadd * Return whether this frame should be software queued or 142922a3aee6SAdrian Chadd * direct dispatched. 143022a3aee6SAdrian Chadd * 143122a3aee6SAdrian Chadd * When doing powersave, BAR frames should be queued but other management 143222a3aee6SAdrian Chadd * frames should be directly sent. 143322a3aee6SAdrian Chadd * 143422a3aee6SAdrian Chadd * When not doing powersave, stick BAR frames into the hardware queue 143522a3aee6SAdrian Chadd * so it goes out even though the queue is paused. 143622a3aee6SAdrian Chadd * 143722a3aee6SAdrian Chadd * For now, management frames are also software queued by default. 143822a3aee6SAdrian Chadd */ 143922a3aee6SAdrian Chadd static int 144022a3aee6SAdrian Chadd ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an, 144122a3aee6SAdrian Chadd struct mbuf *m0, int *queue_to_head) 144222a3aee6SAdrian Chadd { 144322a3aee6SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 144422a3aee6SAdrian Chadd struct ieee80211_frame *wh; 144522a3aee6SAdrian Chadd uint8_t type, subtype; 144622a3aee6SAdrian Chadd 144722a3aee6SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 144822a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 144922a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 145022a3aee6SAdrian Chadd 145122a3aee6SAdrian Chadd (*queue_to_head) = 0; 145222a3aee6SAdrian Chadd 145322a3aee6SAdrian Chadd /* If it's not in powersave - direct-dispatch BAR */ 145422a3aee6SAdrian Chadd if ((ATH_NODE(ni)->an_is_powersave == 0) 145522a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 145622a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 145722a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 145822a3aee6SAdrian Chadd "%s: BAR: TX'ing direct\n", __func__); 145922a3aee6SAdrian Chadd return (0); 146022a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 146122a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 146222a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 146322a3aee6SAdrian Chadd /* BAR TX whilst asleep; queue */ 146422a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 146522a3aee6SAdrian Chadd "%s: swq: TX'ing\n", __func__); 146622a3aee6SAdrian Chadd (*queue_to_head) = 1; 146722a3aee6SAdrian Chadd return (1); 146822a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 146922a3aee6SAdrian Chadd && (type == IEEE80211_FC0_TYPE_MGT || 147022a3aee6SAdrian Chadd type == IEEE80211_FC0_TYPE_CTL)) { 147122a3aee6SAdrian Chadd /* 147222a3aee6SAdrian Chadd * Other control/mgmt frame; bypass software queuing 147322a3aee6SAdrian Chadd * for now! 147422a3aee6SAdrian Chadd */ 147583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 147622a3aee6SAdrian Chadd "%s: %6D: Node is asleep; sending mgmt " 147722a3aee6SAdrian Chadd "(type=%d, subtype=%d)\n", 147883bbd5ebSRui Paulo __func__, ni->ni_macaddr, ":", type, subtype); 147922a3aee6SAdrian Chadd return (0); 148022a3aee6SAdrian Chadd } else { 148122a3aee6SAdrian Chadd return (1); 148222a3aee6SAdrian Chadd } 148322a3aee6SAdrian Chadd } 148422a3aee6SAdrian Chadd 148522a3aee6SAdrian Chadd 148622a3aee6SAdrian Chadd /* 1487eb6f0de0SAdrian Chadd * Transmit the given frame to the hardware. 1488eb6f0de0SAdrian Chadd * 1489eb6f0de0SAdrian Chadd * The frame must already be setup; rate control must already have 1490eb6f0de0SAdrian Chadd * been done. 1491eb6f0de0SAdrian Chadd * 1492eb6f0de0SAdrian Chadd * XXX since the TXQ lock is being held here (and I dislike holding 1493eb6f0de0SAdrian Chadd * it for this long when not doing software aggregation), later on 1494eb6f0de0SAdrian Chadd * break this function into "setup_normal" and "xmit_normal". The 1495eb6f0de0SAdrian Chadd * lock only needs to be held for the ath_tx_handoff call. 149622a3aee6SAdrian Chadd * 149722a3aee6SAdrian Chadd * XXX we don't update the leak count here - if we're doing 149822a3aee6SAdrian Chadd * direct frame dispatch, we need to be able to do it without 149922a3aee6SAdrian Chadd * decrementing the leak count (eg multicast queue frames.) 1500eb6f0de0SAdrian Chadd */ 1501eb6f0de0SAdrian Chadd static void 1502eb6f0de0SAdrian Chadd ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq, 1503eb6f0de0SAdrian Chadd struct ath_buf *bf) 1504eb6f0de0SAdrian Chadd { 15050c54de88SAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 15060c54de88SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 1507eb6f0de0SAdrian Chadd 1508375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1509eb6f0de0SAdrian Chadd 15100c54de88SAdrian Chadd /* 15110c54de88SAdrian Chadd * For now, just enable CLRDMASK. ath_tx_xmit_normal() does 15120c54de88SAdrian Chadd * set a completion handler however it doesn't (yet) properly 15130c54de88SAdrian Chadd * handle the strict ordering requirements needed for normal, 15140c54de88SAdrian Chadd * non-aggregate session frames. 15150c54de88SAdrian Chadd * 15160c54de88SAdrian Chadd * Once this is implemented, only set CLRDMASK like this for 15170c54de88SAdrian Chadd * frames that must go out - eg management/raw frames. 15180c54de88SAdrian Chadd */ 15190c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 15200c54de88SAdrian Chadd 1521eb6f0de0SAdrian Chadd /* Setup the descriptor before handoff */ 1522eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 1523e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 1524e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 1525eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 1526e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 1527eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 1528eb6f0de0SAdrian Chadd 15290c54de88SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 15300c54de88SAdrian Chadd tid->hwq_depth++; 15310c54de88SAdrian Chadd 15320c54de88SAdrian Chadd /* Assign the completion handler */ 15330c54de88SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 15344e81f27cSAdrian Chadd 1535eb6f0de0SAdrian Chadd /* Hand off to hardware */ 1536eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 1537eb6f0de0SAdrian Chadd } 1538eb6f0de0SAdrian Chadd 1539d05b576dSAdrian Chadd /* 1540d05b576dSAdrian Chadd * Do the basic frame setup stuff that's required before the frame 1541d05b576dSAdrian Chadd * is added to a software queue. 1542d05b576dSAdrian Chadd * 1543d05b576dSAdrian Chadd * All frames get mostly the same treatment and it's done once. 1544d05b576dSAdrian Chadd * Retransmits fiddle with things like the rate control setup, 1545d05b576dSAdrian Chadd * setting the retransmit bit in the packet; doing relevant DMA/bus 1546d05b576dSAdrian Chadd * syncing and relinking it (back) into the hardware TX queue. 1547d05b576dSAdrian Chadd * 1548d05b576dSAdrian Chadd * Note that this may cause the mbuf to be reallocated, so 1549d05b576dSAdrian Chadd * m0 may not be valid. 1550d05b576dSAdrian Chadd */ 1551eb6f0de0SAdrian Chadd static int 1552eb6f0de0SAdrian Chadd ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni, 1553b43facbfSAdrian Chadd struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq) 1554b8e788a5SAdrian Chadd { 1555b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 15567a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic; 1557b8e788a5SAdrian Chadd const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams; 1558b8e788a5SAdrian Chadd int error, iswep, ismcast, isfrag, ismrr; 1559eb6f0de0SAdrian Chadd int keyix, hdrlen, pktlen, try0 = 0; 1560eb6f0de0SAdrian Chadd u_int8_t rix = 0, txrate = 0; 1561b8e788a5SAdrian Chadd struct ath_desc *ds; 1562b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 1563eb6f0de0SAdrian Chadd u_int subtype, flags; 1564b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 1565b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 1566b8e788a5SAdrian Chadd HAL_BOOL shortPreamble; 1567b8e788a5SAdrian Chadd struct ath_node *an; 156815e58d4dSAdrian Chadd 156915e58d4dSAdrian Chadd /* XXX TODO: this pri is only used for non-QoS check, right? */ 1570b8e788a5SAdrian Chadd u_int pri; 1571b8e788a5SAdrian Chadd 15727561cb5cSAdrian Chadd /* 15737561cb5cSAdrian Chadd * To ensure that both sequence numbers and the CCMP PN handling 15747561cb5cSAdrian Chadd * is "correct", make sure that the relevant TID queue is locked. 15757561cb5cSAdrian Chadd * Otherwise the CCMP PN and seqno may appear out of order, causing 15767561cb5cSAdrian Chadd * re-ordered frames to have out of order CCMP PN's, resulting 15777561cb5cSAdrian Chadd * in many, many frame drops. 15787561cb5cSAdrian Chadd */ 1579375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 15807561cb5cSAdrian Chadd 1581b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 15825945b5f5SKevin Lo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1583b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1584b8e788a5SAdrian Chadd isfrag = m0->m_flags & M_FRAG; 1585b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 1586b8e788a5SAdrian Chadd /* 1587b8e788a5SAdrian Chadd * Packet length must not include any 1588b8e788a5SAdrian Chadd * pad bytes; deduct them here. 1589b8e788a5SAdrian Chadd */ 1590b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3); 1591b8e788a5SAdrian Chadd 159281a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 1593eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen, 1594eb6f0de0SAdrian Chadd &pktlen, &keyix)) { 1595d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 1596b8e788a5SAdrian Chadd return EIO; 1597b8e788a5SAdrian Chadd } 1598b8e788a5SAdrian Chadd 1599b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 1600b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1601b8e788a5SAdrian Chadd 1602b8e788a5SAdrian Chadd pktlen += IEEE80211_CRC_LEN; 1603b8e788a5SAdrian Chadd 1604b8e788a5SAdrian Chadd /* 1605b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 1606b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 1607b8e788a5SAdrian Chadd */ 1608b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 1609b8e788a5SAdrian Chadd if (error != 0) 1610b8e788a5SAdrian Chadd return error; 1611f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 1612b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 1613b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 1614b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1615b8e788a5SAdrian Chadd 1616b8e788a5SAdrian Chadd /* setup descriptors */ 1617b8e788a5SAdrian Chadd ds = bf->bf_desc; 1618b8e788a5SAdrian Chadd rt = sc->sc_currates; 1619b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1620b8e788a5SAdrian Chadd 1621b8e788a5SAdrian Chadd /* 1622b8e788a5SAdrian Chadd * NB: the 802.11 layer marks whether or not we should 1623b8e788a5SAdrian Chadd * use short preamble based on the current mode and 1624b8e788a5SAdrian Chadd * negotiated parameters. 1625b8e788a5SAdrian Chadd */ 1626b8e788a5SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1627b8e788a5SAdrian Chadd (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 1628b8e788a5SAdrian Chadd shortPreamble = AH_TRUE; 1629b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_shortpre++; 1630b8e788a5SAdrian Chadd } else { 1631b8e788a5SAdrian Chadd shortPreamble = AH_FALSE; 1632b8e788a5SAdrian Chadd } 1633b8e788a5SAdrian Chadd 1634b8e788a5SAdrian Chadd an = ATH_NODE(ni); 16354e81f27cSAdrian Chadd //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 16364e81f27cSAdrian Chadd flags = 0; 1637b8e788a5SAdrian Chadd ismrr = 0; /* default no multi-rate retry*/ 163815e58d4dSAdrian Chadd 163915e58d4dSAdrian Chadd pri = ath_tx_getac(sc, m0); /* honor classification */ 1640b8e788a5SAdrian Chadd /* XXX use txparams instead of fixed values */ 1641b8e788a5SAdrian Chadd /* 1642b8e788a5SAdrian Chadd * Calculate Atheros packet type from IEEE80211 packet header, 1643b8e788a5SAdrian Chadd * setup for rate calculations, and select h/w transmit queue. 1644b8e788a5SAdrian Chadd */ 1645b8e788a5SAdrian Chadd switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1646b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_MGT: 1647b8e788a5SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1648b8e788a5SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 1649b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_BEACON; 1650b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1651b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PROBE_RESP; 1652b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 1653b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_ATIM; 1654b8e788a5SAdrian Chadd else 1655b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* XXX */ 1656b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1657b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1658b8e788a5SAdrian Chadd if (shortPreamble) 1659b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1660b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1661b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1662b8e788a5SAdrian Chadd break; 1663b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_CTL: 1664b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */ 1665b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1666b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1667b8e788a5SAdrian Chadd if (shortPreamble) 1668b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1669b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1670b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1671b8e788a5SAdrian Chadd break; 1672b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_DATA: 1673b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* default */ 1674b8e788a5SAdrian Chadd /* 1675b8e788a5SAdrian Chadd * Data frames: multicast frames go out at a fixed rate, 1676b8e788a5SAdrian Chadd * EAPOL frames use the mgmt frame rate; otherwise consult 1677b8e788a5SAdrian Chadd * the rate control module for the rate to use. 1678b8e788a5SAdrian Chadd */ 1679b8e788a5SAdrian Chadd if (ismcast) { 1680b8e788a5SAdrian Chadd rix = an->an_mcastrix; 1681b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1682b8e788a5SAdrian Chadd if (shortPreamble) 1683b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1684b8e788a5SAdrian Chadd try0 = 1; 1685b8e788a5SAdrian Chadd } else if (m0->m_flags & M_EAPOL) { 1686b8e788a5SAdrian Chadd /* XXX? maybe always use long preamble? */ 1687b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1688b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1689b8e788a5SAdrian Chadd if (shortPreamble) 1690b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1691b8e788a5SAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */ 1692b8e788a5SAdrian Chadd } else { 1693eb6f0de0SAdrian Chadd /* 1694eb6f0de0SAdrian Chadd * Do rate lookup on each TX, rather than using 1695eb6f0de0SAdrian Chadd * the hard-coded TX information decided here. 1696eb6f0de0SAdrian Chadd */ 1697b8e788a5SAdrian Chadd ismrr = 1; 1698eb6f0de0SAdrian Chadd bf->bf_state.bfs_doratelookup = 1; 1699b8e788a5SAdrian Chadd } 1700b8e788a5SAdrian Chadd if (cap->cap_wmeParams[pri].wmep_noackPolicy) 1701b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 1702b8e788a5SAdrian Chadd break; 1703b8e788a5SAdrian Chadd default: 170476e6fd5dSGleb Smirnoff device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n", 1705b8e788a5SAdrian Chadd wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1706b8e788a5SAdrian Chadd /* XXX statistic */ 1707c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1708d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 1709b8e788a5SAdrian Chadd return EIO; 1710b8e788a5SAdrian Chadd } 1711b8e788a5SAdrian Chadd 1712447fd44aSAdrian Chadd /* 1713447fd44aSAdrian Chadd * There are two known scenarios where the frame AC doesn't match 1714447fd44aSAdrian Chadd * what the destination TXQ is. 1715447fd44aSAdrian Chadd * 1716447fd44aSAdrian Chadd * + non-QoS frames (eg management?) that the net80211 stack has 1717447fd44aSAdrian Chadd * assigned a higher AC to, but since it's a non-QoS TID, it's 1718447fd44aSAdrian Chadd * being thrown into TID 16. TID 16 gets the AC_BE queue. 1719447fd44aSAdrian Chadd * It's quite possible that management frames should just be 1720447fd44aSAdrian Chadd * direct dispatched to hardware rather than go via the software 1721447fd44aSAdrian Chadd * queue; that should be investigated in the future. There are 1722447fd44aSAdrian Chadd * some specific scenarios where this doesn't make sense, mostly 1723447fd44aSAdrian Chadd * surrounding ADDBA request/response - hence why that is special 1724447fd44aSAdrian Chadd * cased. 1725447fd44aSAdrian Chadd * 1726447fd44aSAdrian Chadd * + Multicast frames going into the VAP mcast queue. That shows up 1727447fd44aSAdrian Chadd * as "TXQ 11". 1728447fd44aSAdrian Chadd * 1729447fd44aSAdrian Chadd * This driver should eventually support separate TID and TXQ locking, 1730447fd44aSAdrian Chadd * allowing for arbitrary AC frames to appear on arbitrary software 1731447fd44aSAdrian Chadd * queues, being queued to the "correct" hardware queue when needed. 1732447fd44aSAdrian Chadd */ 1733447fd44aSAdrian Chadd #if 0 17346deb7f32SAdrian Chadd if (txq != sc->sc_ac2q[pri]) { 173583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 17366deb7f32SAdrian Chadd "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n", 17376deb7f32SAdrian Chadd __func__, 17386deb7f32SAdrian Chadd txq, 17396deb7f32SAdrian Chadd txq->axq_qnum, 17406deb7f32SAdrian Chadd pri, 17416deb7f32SAdrian Chadd sc->sc_ac2q[pri], 17426deb7f32SAdrian Chadd sc->sc_ac2q[pri]->axq_qnum); 17436deb7f32SAdrian Chadd } 1744447fd44aSAdrian Chadd #endif 17456deb7f32SAdrian Chadd 1746b8e788a5SAdrian Chadd /* 1747b8e788a5SAdrian Chadd * Calculate miscellaneous flags. 1748b8e788a5SAdrian Chadd */ 1749b8e788a5SAdrian Chadd if (ismcast) { 1750b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 1751b8e788a5SAdrian Chadd } else if (pktlen > vap->iv_rtsthreshold && 1752b8e788a5SAdrian Chadd (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) { 1753b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 1754b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_rts++; 1755b8e788a5SAdrian Chadd } 1756b8e788a5SAdrian Chadd if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */ 1757b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_noack++; 1758b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 1759b8e788a5SAdrian Chadd if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) { 1760b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_TDMA, 1761b8e788a5SAdrian Chadd "%s: discard frame, ACK required w/ TDMA\n", __func__); 1762b8e788a5SAdrian Chadd sc->sc_stats.ast_tdma_ack++; 1763c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1764d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 1765b8e788a5SAdrian Chadd return EIO; 1766b8e788a5SAdrian Chadd } 1767b8e788a5SAdrian Chadd #endif 1768b8e788a5SAdrian Chadd 17695abc0b25SAdrian Chadd /* 17705abc0b25SAdrian Chadd * If it's a frame to do location reporting on, 17715abc0b25SAdrian Chadd * communicate it to the HAL. 17725abc0b25SAdrian Chadd */ 17735abc0b25SAdrian Chadd if (ieee80211_get_toa_params(m0, NULL)) { 17745abc0b25SAdrian Chadd device_printf(sc->sc_dev, 17755abc0b25SAdrian Chadd "%s: setting TX positioning bit\n", __func__); 17765abc0b25SAdrian Chadd flags |= HAL_TXDESC_POS; 17775abc0b25SAdrian Chadd 17785abc0b25SAdrian Chadd /* 17795abc0b25SAdrian Chadd * Note: The hardware reports timestamps for 17805abc0b25SAdrian Chadd * each of the RX'ed packets as part of the packet 17815abc0b25SAdrian Chadd * exchange. So this means things like RTS/CTS 17825abc0b25SAdrian Chadd * exchanges, as well as the final ACK. 17835abc0b25SAdrian Chadd * 17845abc0b25SAdrian Chadd * So, if you send a RTS-protected NULL data frame, 17855abc0b25SAdrian Chadd * you'll get an RX report for the RTS response, then 17865abc0b25SAdrian Chadd * an RX report for the NULL frame, and then the TX 17875abc0b25SAdrian Chadd * completion at the end. 17885abc0b25SAdrian Chadd * 17895abc0b25SAdrian Chadd * NOTE: it doesn't work right for CCK frames; 17905abc0b25SAdrian Chadd * there's no channel info data provided unless 17915abc0b25SAdrian Chadd * it's OFDM or HT. Will have to dig into it. 17925abc0b25SAdrian Chadd */ 17935abc0b25SAdrian Chadd flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 17945abc0b25SAdrian Chadd bf->bf_flags |= ATH_BUF_TOA_PROBE; 17955abc0b25SAdrian Chadd } 17965abc0b25SAdrian Chadd 1797bcf5fc49SAdrian Chadd #if 0 1798bcf5fc49SAdrian Chadd /* 1799bcf5fc49SAdrian Chadd * Placeholder: if you want to transmit with the azimuth 1800bcf5fc49SAdrian Chadd * timestamp in the end of the payload, here's where you 1801bcf5fc49SAdrian Chadd * should set the TXDESC field. 1802bcf5fc49SAdrian Chadd */ 1803bcf5fc49SAdrian Chadd flags |= HAL_TXDESC_HWTS; 1804bcf5fc49SAdrian Chadd #endif 1805bcf5fc49SAdrian Chadd 1806b8e788a5SAdrian Chadd /* 1807eb6f0de0SAdrian Chadd * Determine if a tx interrupt should be generated for 1808eb6f0de0SAdrian Chadd * this descriptor. We take a tx interrupt to reap 1809eb6f0de0SAdrian Chadd * descriptors when the h/w hits an EOL condition or 1810eb6f0de0SAdrian Chadd * when the descriptor is specifically marked to generate 1811eb6f0de0SAdrian Chadd * an interrupt. We periodically mark descriptors in this 1812eb6f0de0SAdrian Chadd * way to insure timely replenishing of the supply needed 1813eb6f0de0SAdrian Chadd * for sending frames. Defering interrupts reduces system 1814eb6f0de0SAdrian Chadd * load and potentially allows more concurrent work to be 1815eb6f0de0SAdrian Chadd * done but if done to aggressively can cause senders to 1816eb6f0de0SAdrian Chadd * backup. 1817eb6f0de0SAdrian Chadd * 1818eb6f0de0SAdrian Chadd * NB: use >= to deal with sc_txintrperiod changing 1819eb6f0de0SAdrian Chadd * dynamically through sysctl. 1820b8e788a5SAdrian Chadd */ 1821eb6f0de0SAdrian Chadd if (flags & HAL_TXDESC_INTREQ) { 1822eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1823eb6f0de0SAdrian Chadd } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) { 1824eb6f0de0SAdrian Chadd flags |= HAL_TXDESC_INTREQ; 1825eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1826eb6f0de0SAdrian Chadd } 1827e42b5dbaSAdrian Chadd 1828eb6f0de0SAdrian Chadd /* This point forward is actual TX bits */ 1829b8e788a5SAdrian Chadd 1830b8e788a5SAdrian Chadd /* 1831b8e788a5SAdrian Chadd * At this point we are committed to sending the frame 1832b8e788a5SAdrian Chadd * and we don't need to look at m_nextpkt; clear it in 1833b8e788a5SAdrian Chadd * case this frame is part of frag chain. 1834b8e788a5SAdrian Chadd */ 1835b8e788a5SAdrian Chadd m0->m_nextpkt = NULL; 1836b8e788a5SAdrian Chadd 1837b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 1838b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len, 1839b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 1840b8e788a5SAdrian Chadd 1841b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 1842b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 1843b8e788a5SAdrian Chadd if (iswep) 1844b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1845b8e788a5SAdrian Chadd if (isfrag) 1846b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 1847b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 184812087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni); 1849b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 1850b8e788a5SAdrian Chadd 1851b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 1852b8e788a5SAdrian Chadd } 1853b8e788a5SAdrian Chadd 1854eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 1855eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1856c1782ce0SAdrian Chadd 1857b8e788a5SAdrian Chadd /* 1858eb6f0de0SAdrian Chadd * ath_buf_set_rate needs at least one rate/try to setup 1859eb6f0de0SAdrian Chadd * the rate scenario. 1860b8e788a5SAdrian Chadd */ 1861eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1862eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1863eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 1864eb6f0de0SAdrian Chadd 1865eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 1866eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 1867eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 1868eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 186912087a07SAdrian Chadd bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni); 1870eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 1871eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1872eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 1873eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = sc->sc_txantenna; 1874875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1875eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = shortPreamble; 1876eb6f0de0SAdrian Chadd 1877eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 1878eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */ 1879eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; /* calculated later */ 1880eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1881eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 1882eb6f0de0SAdrian Chadd 1883eb6f0de0SAdrian Chadd return 0; 1884eb6f0de0SAdrian Chadd } 1885eb6f0de0SAdrian Chadd 1886b8e788a5SAdrian Chadd /* 18874e81f27cSAdrian Chadd * Queue a frame to the hardware or software queue. 1888eb6f0de0SAdrian Chadd * 1889eb6f0de0SAdrian Chadd * This can be called by the net80211 code. 1890eb6f0de0SAdrian Chadd * 1891eb6f0de0SAdrian Chadd * XXX what about locking? Or, push the seqno assign into the 1892eb6f0de0SAdrian Chadd * XXX aggregate scheduler so its serialised? 18934e81f27cSAdrian Chadd * 18944e81f27cSAdrian Chadd * XXX When sending management frames via ath_raw_xmit(), 18954e81f27cSAdrian Chadd * should CLRDMASK be set unconditionally? 1896b8e788a5SAdrian Chadd */ 1897eb6f0de0SAdrian Chadd int 1898eb6f0de0SAdrian Chadd ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, 1899eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 1900eb6f0de0SAdrian Chadd { 1901eb6f0de0SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 1902eb6f0de0SAdrian Chadd struct ath_vap *avp = ATH_VAP(vap); 19039c85ff91SAdrian Chadd int r = 0; 1904eb6f0de0SAdrian Chadd u_int pri; 1905eb6f0de0SAdrian Chadd int tid; 1906eb6f0de0SAdrian Chadd struct ath_txq *txq; 1907eb6f0de0SAdrian Chadd int ismcast; 1908eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 1909eb6f0de0SAdrian Chadd int is_ampdu, is_ampdu_tx, is_ampdu_pending; 1910a108d2d6SAdrian Chadd ieee80211_seq seqno; 1911eb6f0de0SAdrian Chadd uint8_t type, subtype; 191222a3aee6SAdrian Chadd int queue_to_head; 1913eb6f0de0SAdrian Chadd 1914375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1915375307d4SAdrian Chadd 1916eb6f0de0SAdrian Chadd /* 1917eb6f0de0SAdrian Chadd * Determine the target hardware queue. 1918eb6f0de0SAdrian Chadd * 1919b43facbfSAdrian Chadd * For multicast frames, the txq gets overridden appropriately 192015e58d4dSAdrian Chadd * depending upon the state of PS. If powersave is enabled 192115e58d4dSAdrian Chadd * then they get added to the cabq for later transmit. 192215e58d4dSAdrian Chadd * 192315e58d4dSAdrian Chadd * The "fun" issue here is that group addressed frames should 192415e58d4dSAdrian Chadd * have the sequence number from a different pool, rather than 192515e58d4dSAdrian Chadd * the per-TID pool. That means that even QoS group addressed 192615e58d4dSAdrian Chadd * frames will have a sequence number from that global value, 192715e58d4dSAdrian Chadd * which means if we transmit different group addressed frames 192815e58d4dSAdrian Chadd * at different traffic priorities, the sequence numbers will 192915e58d4dSAdrian Chadd * all be out of whack. So - chances are, the right thing 193015e58d4dSAdrian Chadd * to do here is to always put group addressed frames into the BE 193115e58d4dSAdrian Chadd * queue, and ignore the TID for queue selection. 1932eb6f0de0SAdrian Chadd * 1933eb6f0de0SAdrian Chadd * For any other frame, we do a TID/QoS lookup inside the frame 1934eb6f0de0SAdrian Chadd * to see what the TID should be. If it's a non-QoS frame, the 1935eb6f0de0SAdrian Chadd * AC and TID are overridden. The TID/TXQ code assumes the 1936eb6f0de0SAdrian Chadd * TID is on a predictable hardware TXQ, so we don't support 1937eb6f0de0SAdrian Chadd * having a node TID queued to multiple hardware TXQs. 1938eb6f0de0SAdrian Chadd * This may change in the future but would require some locking 1939eb6f0de0SAdrian Chadd * fudgery. 1940eb6f0de0SAdrian Chadd */ 1941eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 1942eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 1943eb6f0de0SAdrian Chadd 1944eb6f0de0SAdrian Chadd txq = sc->sc_ac2q[pri]; 1945eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1946eb6f0de0SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1947eb6f0de0SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1948eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1949eb6f0de0SAdrian Chadd 19509c85ff91SAdrian Chadd /* 19519c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 19529c85ff91SAdrian Chadd * 19539c85ff91SAdrian Chadd * XXX duplicated in ath_raw_xmit(). 19549c85ff91SAdrian Chadd */ 19559c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 195692e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 195792e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 19589c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 19599c85ff91SAdrian Chadd m_freem(m0); 196055cf0326SAdrian Chadd return (ENOBUFS); 19619c85ff91SAdrian Chadd } 19629c85ff91SAdrian Chadd } 19639c85ff91SAdrian Chadd 196422a3aee6SAdrian Chadd /* 196522a3aee6SAdrian Chadd * Enforce how deep the unicast queue can grow. 196622a3aee6SAdrian Chadd * 196722a3aee6SAdrian Chadd * If the node is in power save then we don't want 196822a3aee6SAdrian Chadd * the software queue to grow too deep, or a node may 196922a3aee6SAdrian Chadd * end up consuming all of the ath_buf entries. 197022a3aee6SAdrian Chadd * 197122a3aee6SAdrian Chadd * For now, only do this for DATA frames. 197222a3aee6SAdrian Chadd * 197322a3aee6SAdrian Chadd * We will want to cap how many management/control 197422a3aee6SAdrian Chadd * frames get punted to the software queue so it doesn't 197522a3aee6SAdrian Chadd * fill up. But the correct solution isn't yet obvious. 197622a3aee6SAdrian Chadd * In any case, this check should at least let frames pass 197722a3aee6SAdrian Chadd * that we are direct-dispatching. 197822a3aee6SAdrian Chadd * 197922a3aee6SAdrian Chadd * XXX TODO: duplicate this to the raw xmit path! 198022a3aee6SAdrian Chadd */ 198122a3aee6SAdrian Chadd if (type == IEEE80211_FC0_TYPE_DATA && 198222a3aee6SAdrian Chadd ATH_NODE(ni)->an_is_powersave && 198322a3aee6SAdrian Chadd ATH_NODE(ni)->an_swq_depth > 198422a3aee6SAdrian Chadd sc->sc_txq_node_psq_maxdepth) { 198522a3aee6SAdrian Chadd sc->sc_stats.ast_tx_node_psq_overflow++; 198622a3aee6SAdrian Chadd m_freem(m0); 198722a3aee6SAdrian Chadd return (ENOBUFS); 198822a3aee6SAdrian Chadd } 198922a3aee6SAdrian Chadd 1990eb6f0de0SAdrian Chadd /* A-MPDU TX */ 1991eb6f0de0SAdrian Chadd is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid); 1992eb6f0de0SAdrian Chadd is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1993eb6f0de0SAdrian Chadd is_ampdu = is_ampdu_tx | is_ampdu_pending; 1994eb6f0de0SAdrian Chadd 1995a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1996a108d2d6SAdrian Chadd __func__, tid, pri, is_ampdu); 1997eb6f0de0SAdrian Chadd 199846634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 199946634305SAdrian Chadd bf->bf_state.bfs_tid = tid; 2000fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 200146634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 200246634305SAdrian Chadd 2003b837332dSAdrian Chadd #if 1 2004c5940c30SAdrian Chadd /* 2005b43facbfSAdrian Chadd * When servicing one or more stations in power-save mode 2006b43facbfSAdrian Chadd * (or) if there is some mcast data waiting on the mcast 2007b43facbfSAdrian Chadd * queue (to prevent out of order delivery) multicast frames 2008b43facbfSAdrian Chadd * must be bufferd until after the beacon. 2009b43facbfSAdrian Chadd * 2010b43facbfSAdrian Chadd * TODO: we should lock the mcastq before we check the length. 2011c5940c30SAdrian Chadd */ 2012b837332dSAdrian Chadd if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 2013eb6f0de0SAdrian Chadd txq = &avp->av_mcastq; 201446634305SAdrian Chadd /* 201546634305SAdrian Chadd * Mark the frame as eventually belonging on the CAB 201646634305SAdrian Chadd * queue, so the descriptor setup functions will 201746634305SAdrian Chadd * correctly initialise the descriptor 'qcuId' field. 201846634305SAdrian Chadd */ 2019fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum; 202046634305SAdrian Chadd } 2021b837332dSAdrian Chadd #endif 2022eb6f0de0SAdrian Chadd 2023eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 2024eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 2025eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 2026eb6f0de0SAdrian Chadd 20277561cb5cSAdrian Chadd /* A-MPDU TX? Manually set sequence number */ 20287561cb5cSAdrian Chadd /* 20297561cb5cSAdrian Chadd * Don't do it whilst pending; the net80211 layer still 20307561cb5cSAdrian Chadd * assigns them. 203115e58d4dSAdrian Chadd * 203215e58d4dSAdrian Chadd * Don't assign A-MPDU sequence numbers to group address 203315e58d4dSAdrian Chadd * frames; they come from a different sequence number space. 20347561cb5cSAdrian Chadd */ 203515e58d4dSAdrian Chadd if (is_ampdu_tx && (! IEEE80211_IS_MULTICAST(wh->i_addr1))) { 2036eb6f0de0SAdrian Chadd /* 2037eb6f0de0SAdrian Chadd * Always call; this function will 2038eb6f0de0SAdrian Chadd * handle making sure that null data frames 203915e58d4dSAdrian Chadd * and group-addressed frames don't get a sequence number 204015e58d4dSAdrian Chadd * from the current TID and thus mess with the BAW. 2041eb6f0de0SAdrian Chadd */ 2042a108d2d6SAdrian Chadd seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0); 204342f4d061SAdrian Chadd 204442f4d061SAdrian Chadd /* 204515e58d4dSAdrian Chadd * Don't add QoS NULL frames and group-addressed frames 204615e58d4dSAdrian Chadd * to the BAW. 204742f4d061SAdrian Chadd */ 2048a108d2d6SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh) && 204915e58d4dSAdrian Chadd (! IEEE80211_IS_MULTICAST(wh->i_addr1)) && 205015e58d4dSAdrian Chadd (subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL)) { 2051eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 1; 2052eb6f0de0SAdrian Chadd } 2053c1782ce0SAdrian Chadd } 2054c1782ce0SAdrian Chadd 2055eb6f0de0SAdrian Chadd /* 2056eb6f0de0SAdrian Chadd * If needed, the sequence number has been assigned. 2057eb6f0de0SAdrian Chadd * Squirrel it away somewhere easy to get to. 2058eb6f0de0SAdrian Chadd */ 2059a108d2d6SAdrian Chadd bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT; 2060b8e788a5SAdrian Chadd 2061eb6f0de0SAdrian Chadd /* Is ampdu pending? fetch the seqno and print it out */ 2062eb6f0de0SAdrian Chadd if (is_ampdu_pending) 2063eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 2064eb6f0de0SAdrian Chadd "%s: tid %d: ampdu pending, seqno %d\n", 2065eb6f0de0SAdrian Chadd __func__, tid, M_SEQNO_GET(m0)); 2066eb6f0de0SAdrian Chadd 206715e58d4dSAdrian Chadd /* This also sets up the DMA map; crypto; frame parameters, etc */ 2068b43facbfSAdrian Chadd r = ath_tx_normal_setup(sc, ni, bf, m0, txq); 2069eb6f0de0SAdrian Chadd 2070eb6f0de0SAdrian Chadd if (r != 0) 20717561cb5cSAdrian Chadd goto done; 2072eb6f0de0SAdrian Chadd 2073eb6f0de0SAdrian Chadd /* At this point m0 could have changed! */ 2074eb6f0de0SAdrian Chadd m0 = bf->bf_m; 2075eb6f0de0SAdrian Chadd 2076eb6f0de0SAdrian Chadd #if 1 2077eb6f0de0SAdrian Chadd /* 2078eb6f0de0SAdrian Chadd * If it's a multicast frame, do a direct-dispatch to the 2079eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2080eb6f0de0SAdrian Chadd * queuing it. 2081eb6f0de0SAdrian Chadd */ 2082eb6f0de0SAdrian Chadd /* 2083eb6f0de0SAdrian Chadd * If it's a BAR frame, do a direct dispatch to the 2084eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2085eb6f0de0SAdrian Chadd * queuing it, as the TID will now be paused. 2086eb6f0de0SAdrian Chadd * Sending a BAR frame can occur from the net80211 txa timer 2087eb6f0de0SAdrian Chadd * (ie, retries) or from the ath txtask (completion call.) 2088eb6f0de0SAdrian Chadd * It queues directly to hardware because the TID is paused 2089eb6f0de0SAdrian Chadd * at this point (and won't be unpaused until the BAR has 2090eb6f0de0SAdrian Chadd * either been TXed successfully or max retries has been 2091eb6f0de0SAdrian Chadd * reached.) 2092eb6f0de0SAdrian Chadd */ 209322a3aee6SAdrian Chadd /* 209422a3aee6SAdrian Chadd * Until things are better debugged - if this node is asleep 209522a3aee6SAdrian Chadd * and we're sending it a non-BAR frame, direct dispatch it. 209622a3aee6SAdrian Chadd * Why? Because we need to figure out what's actually being 209722a3aee6SAdrian Chadd * sent - eg, during reassociation/reauthentication after 209822a3aee6SAdrian Chadd * the node (last) disappeared whilst asleep, the driver should 209922a3aee6SAdrian Chadd * have unpaused/unsleep'ed the node. So until that is 210022a3aee6SAdrian Chadd * sorted out, use this workaround. 210122a3aee6SAdrian Chadd */ 2102eb6f0de0SAdrian Chadd if (txq == &avp->av_mcastq) { 2103d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 21040b96ef63SAdrian Chadd "%s: bf=%p: mcastq: TX'ing\n", __func__, bf); 21054e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2106eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 210722a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 210822a3aee6SAdrian Chadd &queue_to_head)) { 210922a3aee6SAdrian Chadd ath_tx_swq(sc, ni, txq, queue_to_head, bf); 211022a3aee6SAdrian Chadd } else { 21114e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2112eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2113eb6f0de0SAdrian Chadd } 2114eb6f0de0SAdrian Chadd #else 2115eb6f0de0SAdrian Chadd /* 2116eb6f0de0SAdrian Chadd * For now, since there's no software queue, 2117eb6f0de0SAdrian Chadd * direct-dispatch to the hardware. 2118eb6f0de0SAdrian Chadd */ 21194e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 212022a3aee6SAdrian Chadd /* 212122a3aee6SAdrian Chadd * Update the current leak count if 212222a3aee6SAdrian Chadd * we're leaking frames; and set the 212322a3aee6SAdrian Chadd * MORE flag as appropriate. 212422a3aee6SAdrian Chadd */ 212522a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 2126eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2127eb6f0de0SAdrian Chadd #endif 21287561cb5cSAdrian Chadd done: 2129b8e788a5SAdrian Chadd return 0; 2130b8e788a5SAdrian Chadd } 2131b8e788a5SAdrian Chadd 2132b8e788a5SAdrian Chadd static int 2133b8e788a5SAdrian Chadd ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni, 2134b8e788a5SAdrian Chadd struct ath_buf *bf, struct mbuf *m0, 2135b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2136b8e788a5SAdrian Chadd { 21377a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic; 2138b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 2139b8e788a5SAdrian Chadd int error, ismcast, ismrr; 2140b8e788a5SAdrian Chadd int keyix, hdrlen, pktlen, try0, txantenna; 2141eb6f0de0SAdrian Chadd u_int8_t rix, txrate; 2142b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 2143eb6f0de0SAdrian Chadd u_int flags; 2144b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 2145b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 2146b8e788a5SAdrian Chadd struct ath_desc *ds; 2147b8e788a5SAdrian Chadd u_int pri; 2148eb6f0de0SAdrian Chadd int o_tid = -1; 2149eb6f0de0SAdrian Chadd int do_override; 215022a3aee6SAdrian Chadd uint8_t type, subtype; 215122a3aee6SAdrian Chadd int queue_to_head; 2152f5c30c4eSAdrian Chadd struct ath_node *an = ATH_NODE(ni); 2153b8e788a5SAdrian Chadd 2154375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2155375307d4SAdrian Chadd 2156b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2157b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2158b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 2159b8e788a5SAdrian Chadd /* 2160b8e788a5SAdrian Chadd * Packet length must not include any 2161b8e788a5SAdrian Chadd * pad bytes; deduct them here. 2162b8e788a5SAdrian Chadd */ 2163b8e788a5SAdrian Chadd /* XXX honor IEEE80211_BPF_DATAPAD */ 2164b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN; 2165b8e788a5SAdrian Chadd 216622a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 216722a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 216822a3aee6SAdrian Chadd 216903682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, 217003682514SAdrian Chadd "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf); 217103682514SAdrian Chadd 2172eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n", 2173eb6f0de0SAdrian Chadd __func__, ismcast); 2174eb6f0de0SAdrian Chadd 21757561cb5cSAdrian Chadd pri = params->ibp_pri & 3; 21767561cb5cSAdrian Chadd /* Override pri if the frame isn't a QoS one */ 21777561cb5cSAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 21787561cb5cSAdrian Chadd pri = ath_tx_getac(sc, m0); 21797561cb5cSAdrian Chadd 21807561cb5cSAdrian Chadd /* XXX If it's an ADDBA, override the correct queue */ 21817561cb5cSAdrian Chadd do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid); 21827561cb5cSAdrian Chadd 21837561cb5cSAdrian Chadd /* Map ADDBA to the correct priority */ 21847561cb5cSAdrian Chadd if (do_override) { 218515e58d4dSAdrian Chadd #if 1 218683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 21877561cb5cSAdrian Chadd "%s: overriding tid %d pri %d -> %d\n", 21887561cb5cSAdrian Chadd __func__, o_tid, pri, TID_TO_WME_AC(o_tid)); 21897561cb5cSAdrian Chadd #endif 21907561cb5cSAdrian Chadd pri = TID_TO_WME_AC(o_tid); 21917561cb5cSAdrian Chadd } 21927561cb5cSAdrian Chadd 219315e58d4dSAdrian Chadd /* 219415e58d4dSAdrian Chadd * "pri" is the hardware queue to transmit on. 219515e58d4dSAdrian Chadd * 219615e58d4dSAdrian Chadd * Look at the description in ath_tx_start() to understand 219715e58d4dSAdrian Chadd * what needs to be "fixed" here so we just use the TID 219815e58d4dSAdrian Chadd * for QoS frames. 219915e58d4dSAdrian Chadd */ 220015e58d4dSAdrian Chadd 220181a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 2202eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, 2203eb6f0de0SAdrian Chadd m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0, 2204eb6f0de0SAdrian Chadd &hdrlen, &pktlen, &keyix)) { 2205d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 2206b8e788a5SAdrian Chadd return EIO; 2207b8e788a5SAdrian Chadd } 2208b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 2209b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2210b8e788a5SAdrian Chadd 2211eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 2212eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 2213eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 2214eb6f0de0SAdrian Chadd 2215b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 2216b8e788a5SAdrian Chadd if (error != 0) 2217b8e788a5SAdrian Chadd return error; 2218b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 2219b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2220f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 2221b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 2222b8e788a5SAdrian Chadd 22234e81f27cSAdrian Chadd /* Always enable CLRDMASK for raw frames for now.. */ 2224b8e788a5SAdrian Chadd flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 2225b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 2226b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_RTS) 2227b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 2228eb6f0de0SAdrian Chadd else if (params->ibp_flags & IEEE80211_BPF_CTS) { 2229eb6f0de0SAdrian Chadd /* XXX assume 11g/11n protection? */ 2230eb6f0de0SAdrian Chadd bf->bf_state.bfs_doprot = 1; 2231b8e788a5SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 2232eb6f0de0SAdrian Chadd } 2233b8e788a5SAdrian Chadd /* XXX leave ismcast to injector? */ 2234b8e788a5SAdrian Chadd if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast) 2235b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 2236b8e788a5SAdrian Chadd 2237b8e788a5SAdrian Chadd rt = sc->sc_currates; 2238b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2239f5c30c4eSAdrian Chadd 2240f5c30c4eSAdrian Chadd /* Fetch first rate information */ 2241b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate0); 2242f5c30c4eSAdrian Chadd try0 = params->ibp_try0; 2243f5c30c4eSAdrian Chadd 2244f5c30c4eSAdrian Chadd /* 2245f5c30c4eSAdrian Chadd * Override EAPOL rate as appropriate. 2246f5c30c4eSAdrian Chadd */ 2247f5c30c4eSAdrian Chadd if (m0->m_flags & M_EAPOL) { 2248f5c30c4eSAdrian Chadd /* XXX? maybe always use long preamble? */ 2249f5c30c4eSAdrian Chadd rix = an->an_mgmtrix; 2250f5c30c4eSAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */ 2251f5c30c4eSAdrian Chadd } 2252f5c30c4eSAdrian Chadd 22535abc0b25SAdrian Chadd /* 22545abc0b25SAdrian Chadd * If it's a frame to do location reporting on, 22555abc0b25SAdrian Chadd * communicate it to the HAL. 22565abc0b25SAdrian Chadd */ 22575abc0b25SAdrian Chadd if (ieee80211_get_toa_params(m0, NULL)) { 22585abc0b25SAdrian Chadd device_printf(sc->sc_dev, 22595abc0b25SAdrian Chadd "%s: setting TX positioning bit\n", __func__); 22605abc0b25SAdrian Chadd flags |= HAL_TXDESC_POS; 22615abc0b25SAdrian Chadd flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 22625abc0b25SAdrian Chadd bf->bf_flags |= ATH_BUF_TOA_PROBE; 22635abc0b25SAdrian Chadd } 22645abc0b25SAdrian Chadd 2265b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 2266b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) 2267b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 2268b8e788a5SAdrian Chadd sc->sc_txrix = rix; 2269b8e788a5SAdrian Chadd ismrr = (params->ibp_try1 != 0); 2270b8e788a5SAdrian Chadd txantenna = params->ibp_pri >> 2; 2271b8e788a5SAdrian Chadd if (txantenna == 0) /* XXX? */ 2272b8e788a5SAdrian Chadd txantenna = sc->sc_txantenna; 227379f02dbfSAdrian Chadd 227479f02dbfSAdrian Chadd /* 2275eb6f0de0SAdrian Chadd * Since ctsrate is fixed, store it away for later 2276eb6f0de0SAdrian Chadd * use when the descriptor fields are being set. 227779f02dbfSAdrian Chadd */ 2278eb6f0de0SAdrian Chadd if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) 2279eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate; 228079f02dbfSAdrian Chadd 2281b8e788a5SAdrian Chadd /* 2282b8e788a5SAdrian Chadd * NB: we mark all packets as type PSPOLL so the h/w won't 2283b8e788a5SAdrian Chadd * set the sequence number, duration, etc. 2284b8e788a5SAdrian Chadd */ 2285b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; 2286b8e788a5SAdrian Chadd 2287b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 2288b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len, 2289b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 2290b8e788a5SAdrian Chadd 2291b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 2292b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 22935945b5f5SKevin Lo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) 2294b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2295b8e788a5SAdrian Chadd if (m0->m_flags & M_FRAG) 2296b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 2297b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 229812087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = MIN(params->ibp_power, 229912087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2300b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 2301b8e788a5SAdrian Chadd 2302b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 2303b8e788a5SAdrian Chadd } 2304b8e788a5SAdrian Chadd 2305b8e788a5SAdrian Chadd /* 2306b8e788a5SAdrian Chadd * Formulate first tx descriptor with tx controls. 2307b8e788a5SAdrian Chadd */ 2308b8e788a5SAdrian Chadd ds = bf->bf_desc; 2309b8e788a5SAdrian Chadd /* XXX check return value? */ 2310eb6f0de0SAdrian Chadd 2311eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 2312eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 2313eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 2314eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 231512087a07SAdrian Chadd bf->bf_state.bfs_txpower = MIN(params->ibp_power, 231612087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2317eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 2318eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 2319eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 2320eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = txantenna; 2321875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 2322eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = 2323eb6f0de0SAdrian Chadd !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2324b8e788a5SAdrian Chadd 232546634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 232646634305SAdrian Chadd bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); 2327fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum; 232846634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 232946634305SAdrian Chadd 2330eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 2331eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 2332eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 2333eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 2334eb6f0de0SAdrian Chadd 2335eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 2336eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 2337eb6f0de0SAdrian Chadd 2338f5c30c4eSAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 2339eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 2340eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 2341c1782ce0SAdrian Chadd 2342c1782ce0SAdrian Chadd if (ismrr) { 2343eb6f0de0SAdrian Chadd int rix; 2344c1782ce0SAdrian Chadd 2345b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate1); 2346eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].rix = rix; 2347eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].tries = params->ibp_try1; 2348c1782ce0SAdrian Chadd 2349eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate2); 2350eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].rix = rix; 2351eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].tries = params->ibp_try2; 2352eb6f0de0SAdrian Chadd 2353eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate3); 2354eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = rix; 2355eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = params->ibp_try3; 2356c1782ce0SAdrian Chadd } 2357eb6f0de0SAdrian Chadd /* 2358eb6f0de0SAdrian Chadd * All the required rate control decisions have been made; 2359eb6f0de0SAdrian Chadd * fill in the rc flags. 2360eb6f0de0SAdrian Chadd */ 2361eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 2362b8e788a5SAdrian Chadd 2363b8e788a5SAdrian Chadd /* NB: no buffered multicast in power save support */ 2364eb6f0de0SAdrian Chadd 2365eb6f0de0SAdrian Chadd /* 2366eb6f0de0SAdrian Chadd * If we're overiding the ADDBA destination, dump directly 2367eb6f0de0SAdrian Chadd * into the hardware queue, right after any pending 2368eb6f0de0SAdrian Chadd * frames to that node are. 2369eb6f0de0SAdrian Chadd */ 2370eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n", 2371eb6f0de0SAdrian Chadd __func__, do_override); 2372eb6f0de0SAdrian Chadd 237394eefcf1SAdrian Chadd #if 1 237422a3aee6SAdrian Chadd /* 237522a3aee6SAdrian Chadd * Put addba frames in the right place in the right TID/HWQ. 237622a3aee6SAdrian Chadd */ 2377eb6f0de0SAdrian Chadd if (do_override) { 23784e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 237922a3aee6SAdrian Chadd /* 238022a3aee6SAdrian Chadd * XXX if it's addba frames, should we be leaking 238122a3aee6SAdrian Chadd * them out via the frame leak method? 238222a3aee6SAdrian Chadd * XXX for now let's not risk it; but we may wish 238322a3aee6SAdrian Chadd * to investigate this later. 238422a3aee6SAdrian Chadd */ 2385eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 238622a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 238722a3aee6SAdrian Chadd &queue_to_head)) { 2388eb6f0de0SAdrian Chadd /* Queue to software queue */ 238922a3aee6SAdrian Chadd ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf); 239022a3aee6SAdrian Chadd } else { 239122a3aee6SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 239222a3aee6SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2393eb6f0de0SAdrian Chadd } 239494eefcf1SAdrian Chadd #else 239594eefcf1SAdrian Chadd /* Direct-dispatch to the hardware */ 239694eefcf1SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 239722a3aee6SAdrian Chadd /* 239822a3aee6SAdrian Chadd * Update the current leak count if 239922a3aee6SAdrian Chadd * we're leaking frames; and set the 240022a3aee6SAdrian Chadd * MORE flag as appropriate. 240122a3aee6SAdrian Chadd */ 240222a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 240394eefcf1SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 240494eefcf1SAdrian Chadd #endif 2405b8e788a5SAdrian Chadd return 0; 2406b8e788a5SAdrian Chadd } 2407b8e788a5SAdrian Chadd 2408eb6f0de0SAdrian Chadd /* 2409eb6f0de0SAdrian Chadd * Send a raw frame. 2410eb6f0de0SAdrian Chadd * 2411eb6f0de0SAdrian Chadd * This can be called by net80211. 2412eb6f0de0SAdrian Chadd */ 2413b8e788a5SAdrian Chadd int 2414b8e788a5SAdrian Chadd ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2415b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2416b8e788a5SAdrian Chadd { 2417b8e788a5SAdrian Chadd struct ieee80211com *ic = ni->ni_ic; 24183797bf08SAdrian Chadd struct ath_softc *sc = ic->ic_softc; 2419b8e788a5SAdrian Chadd struct ath_buf *bf; 24209c85ff91SAdrian Chadd struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *); 24219c85ff91SAdrian Chadd int error = 0; 2422b8e788a5SAdrian Chadd 2423ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2424ef27340cSAdrian Chadd if (sc->sc_inreset_cnt > 0) { 242583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 242683bbd5ebSRui Paulo "%s: sc_inreset_cnt > 0; bailing\n", __func__); 2427ef27340cSAdrian Chadd error = EIO; 2428ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2429f5c30c4eSAdrian Chadd goto badbad; 2430ef27340cSAdrian Chadd } 2431ef27340cSAdrian Chadd sc->sc_txstart_cnt++; 2432ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2433ef27340cSAdrian Chadd 2434f5c30c4eSAdrian Chadd /* Wake the hardware up already */ 2435f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2436f5c30c4eSAdrian Chadd ath_power_set_power_state(sc, HAL_PM_AWAKE); 2437f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2438f5c30c4eSAdrian Chadd 24391b5c5f5aSAdrian Chadd ATH_TX_LOCK(sc); 24401b5c5f5aSAdrian Chadd 24417a79cebfSGleb Smirnoff if (!sc->sc_running || sc->sc_invalid) { 24427a79cebfSGleb Smirnoff DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d", 24437a79cebfSGleb Smirnoff __func__, sc->sc_running, sc->sc_invalid); 2444b8e788a5SAdrian Chadd m_freem(m); 2445b8e788a5SAdrian Chadd error = ENETDOWN; 2446b8e788a5SAdrian Chadd goto bad; 2447b8e788a5SAdrian Chadd } 24489c85ff91SAdrian Chadd 24499c85ff91SAdrian Chadd /* 24509c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 24519c85ff91SAdrian Chadd * 24529c85ff91SAdrian Chadd * XXX duplicated in ath_tx_start(). 24539c85ff91SAdrian Chadd */ 24549c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 245592e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 245692e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 24579c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 24589c85ff91SAdrian Chadd error = ENOBUFS; 24599c85ff91SAdrian Chadd } 24609c85ff91SAdrian Chadd 24619c85ff91SAdrian Chadd if (error != 0) { 24629c85ff91SAdrian Chadd m_freem(m); 24639c85ff91SAdrian Chadd goto bad; 24649c85ff91SAdrian Chadd } 24659c85ff91SAdrian Chadd } 24669c85ff91SAdrian Chadd 2467b8e788a5SAdrian Chadd /* 2468b8e788a5SAdrian Chadd * Grab a TX buffer and associated resources. 2469b8e788a5SAdrian Chadd */ 2470af33d486SAdrian Chadd bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT); 2471b8e788a5SAdrian Chadd if (bf == NULL) { 2472b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nobuf++; 2473b8e788a5SAdrian Chadd m_freem(m); 2474b8e788a5SAdrian Chadd error = ENOBUFS; 2475b8e788a5SAdrian Chadd goto bad; 2476b8e788a5SAdrian Chadd } 247703682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n", 247803682514SAdrian Chadd m, params, bf); 2479b8e788a5SAdrian Chadd 2480b8e788a5SAdrian Chadd if (params == NULL) { 2481b8e788a5SAdrian Chadd /* 2482b8e788a5SAdrian Chadd * Legacy path; interpret frame contents to decide 2483b8e788a5SAdrian Chadd * precisely how to send the frame. 2484b8e788a5SAdrian Chadd */ 2485b8e788a5SAdrian Chadd if (ath_tx_start(sc, ni, bf, m)) { 2486b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2487b8e788a5SAdrian Chadd goto bad2; 2488b8e788a5SAdrian Chadd } 2489b8e788a5SAdrian Chadd } else { 2490b8e788a5SAdrian Chadd /* 2491b8e788a5SAdrian Chadd * Caller supplied explicit parameters to use in 2492b8e788a5SAdrian Chadd * sending the frame. 2493b8e788a5SAdrian Chadd */ 2494b8e788a5SAdrian Chadd if (ath_tx_raw_start(sc, ni, bf, m, params)) { 2495b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2496b8e788a5SAdrian Chadd goto bad2; 2497b8e788a5SAdrian Chadd } 2498b8e788a5SAdrian Chadd } 2499b8e788a5SAdrian Chadd sc->sc_wd_timer = 5; 2500b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw++; 2501b8e788a5SAdrian Chadd 2502548a605dSAdrian Chadd /* 2503548a605dSAdrian Chadd * Update the TIM - if there's anything queued to the 2504548a605dSAdrian Chadd * software queue and power save is enabled, we should 2505548a605dSAdrian Chadd * set the TIM. 2506548a605dSAdrian Chadd */ 2507548a605dSAdrian Chadd ath_tx_update_tim(sc, ni, 1); 2508548a605dSAdrian Chadd 2509974185bbSAdrian Chadd ATH_TX_UNLOCK(sc); 2510974185bbSAdrian Chadd 2511ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2512ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2513ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2514ef27340cSAdrian Chadd 2515f5c30c4eSAdrian Chadd 2516f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */ 2517f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2518f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc); 2519f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2520f5c30c4eSAdrian Chadd 2521b8e788a5SAdrian Chadd return 0; 2522f5c30c4eSAdrian Chadd 2523b8e788a5SAdrian Chadd bad2: 252403682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, " 252503682514SAdrian Chadd "bf=%p", 252603682514SAdrian Chadd m, 252703682514SAdrian Chadd params, 252803682514SAdrian Chadd bf); 2529b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 2530e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 2531b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 25321b5c5f5aSAdrian Chadd 2533f5c30c4eSAdrian Chadd bad: 25341b5c5f5aSAdrian Chadd ATH_TX_UNLOCK(sc); 25351b5c5f5aSAdrian Chadd 2536ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2537ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2538ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2539f5c30c4eSAdrian Chadd 2540f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */ 2541f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2542f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc); 2543f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2544f5c30c4eSAdrian Chadd 2545f5c30c4eSAdrian Chadd badbad: 254603682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p", 254703682514SAdrian Chadd m, params); 2548b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw_fail++; 2549ef27340cSAdrian Chadd 2550b8e788a5SAdrian Chadd return error; 2551b8e788a5SAdrian Chadd } 2552eb6f0de0SAdrian Chadd 2553eb6f0de0SAdrian Chadd /* Some helper functions */ 2554eb6f0de0SAdrian Chadd 2555eb6f0de0SAdrian Chadd /* 2556eb6f0de0SAdrian Chadd * ADDBA (and potentially others) need to be placed in the same 2557eb6f0de0SAdrian Chadd * hardware queue as the TID/node it's relating to. This is so 2558eb6f0de0SAdrian Chadd * it goes out after any pending non-aggregate frames to the 2559eb6f0de0SAdrian Chadd * same node/TID. 2560eb6f0de0SAdrian Chadd * 2561eb6f0de0SAdrian Chadd * If this isn't done, the ADDBA can go out before the frames 2562eb6f0de0SAdrian Chadd * queued in hardware. Even though these frames have a sequence 2563eb6f0de0SAdrian Chadd * number -earlier- than the ADDBA can be transmitted (but 2564eb6f0de0SAdrian Chadd * no frames whose sequence numbers are after the ADDBA should 2565eb6f0de0SAdrian Chadd * be!) they'll arrive after the ADDBA - and the receiving end 2566eb6f0de0SAdrian Chadd * will simply drop them as being out of the BAW. 2567eb6f0de0SAdrian Chadd * 2568eb6f0de0SAdrian Chadd * The frames can't be appended to the TID software queue - it'll 2569eb6f0de0SAdrian Chadd * never be sent out. So these frames have to be directly 2570eb6f0de0SAdrian Chadd * dispatched to the hardware, rather than queued in software. 2571eb6f0de0SAdrian Chadd * So if this function returns true, the TXQ has to be 2572eb6f0de0SAdrian Chadd * overridden and it has to be directly dispatched. 2573eb6f0de0SAdrian Chadd * 2574eb6f0de0SAdrian Chadd * It's a dirty hack, but someone's gotta do it. 2575eb6f0de0SAdrian Chadd */ 2576eb6f0de0SAdrian Chadd 2577eb6f0de0SAdrian Chadd /* 2578eb6f0de0SAdrian Chadd * XXX doesn't belong here! 2579eb6f0de0SAdrian Chadd */ 2580eb6f0de0SAdrian Chadd static int 2581eb6f0de0SAdrian Chadd ieee80211_is_action(struct ieee80211_frame *wh) 2582eb6f0de0SAdrian Chadd { 2583eb6f0de0SAdrian Chadd /* Type: Management frame? */ 2584eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != 2585eb6f0de0SAdrian Chadd IEEE80211_FC0_TYPE_MGT) 2586eb6f0de0SAdrian Chadd return 0; 2587eb6f0de0SAdrian Chadd 2588eb6f0de0SAdrian Chadd /* Subtype: Action frame? */ 2589eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) != 2590eb6f0de0SAdrian Chadd IEEE80211_FC0_SUBTYPE_ACTION) 2591eb6f0de0SAdrian Chadd return 0; 2592eb6f0de0SAdrian Chadd 2593eb6f0de0SAdrian Chadd return 1; 2594eb6f0de0SAdrian Chadd } 2595eb6f0de0SAdrian Chadd 2596eb6f0de0SAdrian Chadd #define MS(_v, _f) (((_v) & _f) >> _f##_S) 2597eb6f0de0SAdrian Chadd /* 2598eb6f0de0SAdrian Chadd * Return an alternate TID for ADDBA request frames. 2599eb6f0de0SAdrian Chadd * 2600eb6f0de0SAdrian Chadd * Yes, this likely should be done in the net80211 layer. 2601eb6f0de0SAdrian Chadd */ 2602eb6f0de0SAdrian Chadd static int 2603eb6f0de0SAdrian Chadd ath_tx_action_frame_override_queue(struct ath_softc *sc, 2604eb6f0de0SAdrian Chadd struct ieee80211_node *ni, 2605eb6f0de0SAdrian Chadd struct mbuf *m0, int *tid) 2606eb6f0de0SAdrian Chadd { 2607eb6f0de0SAdrian Chadd struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 2608eb6f0de0SAdrian Chadd struct ieee80211_action_ba_addbarequest *ia; 2609eb6f0de0SAdrian Chadd uint8_t *frm; 2610eb6f0de0SAdrian Chadd uint16_t baparamset; 2611eb6f0de0SAdrian Chadd 2612eb6f0de0SAdrian Chadd /* Not action frame? Bail */ 2613eb6f0de0SAdrian Chadd if (! ieee80211_is_action(wh)) 2614eb6f0de0SAdrian Chadd return 0; 2615eb6f0de0SAdrian Chadd 2616eb6f0de0SAdrian Chadd /* XXX Not needed for frames we send? */ 2617eb6f0de0SAdrian Chadd #if 0 2618eb6f0de0SAdrian Chadd /* Correct length? */ 2619eb6f0de0SAdrian Chadd if (! ieee80211_parse_action(ni, m)) 2620eb6f0de0SAdrian Chadd return 0; 2621eb6f0de0SAdrian Chadd #endif 2622eb6f0de0SAdrian Chadd 2623eb6f0de0SAdrian Chadd /* Extract out action frame */ 2624eb6f0de0SAdrian Chadd frm = (u_int8_t *)&wh[1]; 2625eb6f0de0SAdrian Chadd ia = (struct ieee80211_action_ba_addbarequest *) frm; 2626eb6f0de0SAdrian Chadd 2627eb6f0de0SAdrian Chadd /* Not ADDBA? Bail */ 2628eb6f0de0SAdrian Chadd if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA) 2629eb6f0de0SAdrian Chadd return 0; 2630eb6f0de0SAdrian Chadd if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST) 2631eb6f0de0SAdrian Chadd return 0; 2632eb6f0de0SAdrian Chadd 2633eb6f0de0SAdrian Chadd /* Extract TID, return it */ 2634eb6f0de0SAdrian Chadd baparamset = le16toh(ia->rq_baparamset); 2635eb6f0de0SAdrian Chadd *tid = (int) MS(baparamset, IEEE80211_BAPS_TID); 2636eb6f0de0SAdrian Chadd 2637eb6f0de0SAdrian Chadd return 1; 2638eb6f0de0SAdrian Chadd } 2639eb6f0de0SAdrian Chadd #undef MS 2640eb6f0de0SAdrian Chadd 2641eb6f0de0SAdrian Chadd /* Per-node software queue operations */ 2642eb6f0de0SAdrian Chadd 2643eb6f0de0SAdrian Chadd /* 2644eb6f0de0SAdrian Chadd * Add the current packet to the given BAW. 2645eb6f0de0SAdrian Chadd * It is assumed that the current packet 2646eb6f0de0SAdrian Chadd * 2647eb6f0de0SAdrian Chadd * + fits inside the BAW; 2648eb6f0de0SAdrian Chadd * + already has had a sequence number allocated. 2649eb6f0de0SAdrian Chadd * 2650eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2651eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2652eb6f0de0SAdrian Chadd */ 2653eb6f0de0SAdrian Chadd void 2654eb6f0de0SAdrian Chadd ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an, 2655eb6f0de0SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 2656eb6f0de0SAdrian Chadd { 2657eb6f0de0SAdrian Chadd int index, cindex; 2658eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2659eb6f0de0SAdrian Chadd 2660375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2661eb6f0de0SAdrian Chadd 2662eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_isretried) 2663eb6f0de0SAdrian Chadd return; 2664eb6f0de0SAdrian Chadd 2665c7c07341SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2666c7c07341SAdrian Chadd 26677561cb5cSAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 266883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 26697561cb5cSAdrian Chadd "%s: dobaw=0, seqno=%d, window %d:%d\n", 267083bbd5ebSRui Paulo __func__, SEQNO(bf->bf_state.bfs_seqno), 267183bbd5ebSRui Paulo tap->txa_start, tap->txa_wnd); 26727561cb5cSAdrian Chadd } 26737561cb5cSAdrian Chadd 2674eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_addedbaw) 267583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2676a108d2d6SAdrian Chadd "%s: re-added? tid=%d, seqno %d; window %d:%d; " 2677d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2678a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2679d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 2680d4365d16SAdrian Chadd tid->baw_tail); 2681eb6f0de0SAdrian Chadd 2682eb6f0de0SAdrian Chadd /* 26837561cb5cSAdrian Chadd * Verify that the given sequence number is not outside of the 26847561cb5cSAdrian Chadd * BAW. Complain loudly if that's the case. 26857561cb5cSAdrian Chadd */ 26867561cb5cSAdrian Chadd if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 26877561cb5cSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno))) { 268883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 26897561cb5cSAdrian Chadd "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; " 26907561cb5cSAdrian Chadd "baw head=%d tail=%d\n", 26917561cb5cSAdrian Chadd __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 26927561cb5cSAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 26937561cb5cSAdrian Chadd tid->baw_tail); 26947561cb5cSAdrian Chadd } 26957561cb5cSAdrian Chadd 26967561cb5cSAdrian Chadd /* 2697eb6f0de0SAdrian Chadd * ni->ni_txseqs[] is the currently allocated seqno. 2698eb6f0de0SAdrian Chadd * the txa state contains the current baw start. 2699eb6f0de0SAdrian Chadd */ 2700eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno)); 2701eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2702eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2703a108d2d6SAdrian Chadd "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d " 2704d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2705a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2706d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head, 2707d4365d16SAdrian Chadd tid->baw_tail); 2708eb6f0de0SAdrian Chadd 2709eb6f0de0SAdrian Chadd 2710eb6f0de0SAdrian Chadd #if 0 2711eb6f0de0SAdrian Chadd assert(tid->tx_buf[cindex] == NULL); 2712eb6f0de0SAdrian Chadd #endif 2713eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != NULL) { 271483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2715eb6f0de0SAdrian Chadd "%s: ba packet dup (index=%d, cindex=%d, " 2716eb6f0de0SAdrian Chadd "head=%d, tail=%d)\n", 2717eb6f0de0SAdrian Chadd __func__, index, cindex, tid->baw_head, tid->baw_tail); 271883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2719eb6f0de0SAdrian Chadd "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n", 2720eb6f0de0SAdrian Chadd __func__, 2721eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 2722eb6f0de0SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno), 2723eb6f0de0SAdrian Chadd bf, 2724eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno) 2725eb6f0de0SAdrian Chadd ); 2726eb6f0de0SAdrian Chadd } 2727eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = bf; 2728eb6f0de0SAdrian Chadd 2729d4365d16SAdrian Chadd if (index >= ((tid->baw_tail - tid->baw_head) & 2730d4365d16SAdrian Chadd (ATH_TID_MAX_BUFS - 1))) { 2731eb6f0de0SAdrian Chadd tid->baw_tail = cindex; 2732eb6f0de0SAdrian Chadd INCR(tid->baw_tail, ATH_TID_MAX_BUFS); 2733eb6f0de0SAdrian Chadd } 2734eb6f0de0SAdrian Chadd } 2735eb6f0de0SAdrian Chadd 2736eb6f0de0SAdrian Chadd /* 273738962489SAdrian Chadd * Flip the BAW buffer entry over from the existing one to the new one. 273838962489SAdrian Chadd * 273938962489SAdrian Chadd * When software retransmitting a (sub-)frame, it is entirely possible that 274038962489SAdrian Chadd * the frame ath_buf is marked as BUSY and can't be immediately reused. 274138962489SAdrian Chadd * In that instance the buffer is cloned and the new buffer is used for 274238962489SAdrian Chadd * retransmit. We thus need to update the ath_buf slot in the BAW buf 274338962489SAdrian Chadd * tracking array to maintain consistency. 274438962489SAdrian Chadd */ 274538962489SAdrian Chadd static void 274638962489SAdrian Chadd ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an, 274738962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf) 274838962489SAdrian Chadd { 274938962489SAdrian Chadd int index, cindex; 275038962489SAdrian Chadd struct ieee80211_tx_ampdu *tap; 275138962489SAdrian Chadd int seqno = SEQNO(old_bf->bf_state.bfs_seqno); 275238962489SAdrian Chadd 2753375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 275438962489SAdrian Chadd 275538962489SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 275638962489SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 275738962489SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 275838962489SAdrian Chadd 275938962489SAdrian Chadd /* 276038962489SAdrian Chadd * Just warn for now; if it happens then we should find out 276138962489SAdrian Chadd * about it. It's highly likely the aggregation session will 276238962489SAdrian Chadd * soon hang. 276338962489SAdrian Chadd */ 276438962489SAdrian Chadd if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) { 276583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 276683bbd5ebSRui Paulo "%s: retransmitted buffer" 276738962489SAdrian Chadd " has mismatching seqno's, BA session may hang.\n", 276838962489SAdrian Chadd __func__); 276983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 277083bbd5ebSRui Paulo "%s: old seqno=%d, new_seqno=%d\n", __func__, 277183bbd5ebSRui Paulo old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno); 277238962489SAdrian Chadd } 277338962489SAdrian Chadd 277438962489SAdrian Chadd if (tid->tx_buf[cindex] != old_bf) { 277583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 277683bbd5ebSRui Paulo "%s: ath_buf pointer incorrect; " 277783bbd5ebSRui Paulo " has m BA session may hang.\n", __func__); 277883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 277983bbd5ebSRui Paulo "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf); 278038962489SAdrian Chadd } 278138962489SAdrian Chadd 278238962489SAdrian Chadd tid->tx_buf[cindex] = new_bf; 278338962489SAdrian Chadd } 278438962489SAdrian Chadd 278538962489SAdrian Chadd /* 2786eb6f0de0SAdrian Chadd * seq_start - left edge of BAW 2787eb6f0de0SAdrian Chadd * seq_next - current/next sequence number to allocate 2788eb6f0de0SAdrian Chadd * 2789eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2790eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2791eb6f0de0SAdrian Chadd */ 2792eb6f0de0SAdrian Chadd static void 2793eb6f0de0SAdrian Chadd ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an, 2794eb6f0de0SAdrian Chadd struct ath_tid *tid, const struct ath_buf *bf) 2795eb6f0de0SAdrian Chadd { 2796eb6f0de0SAdrian Chadd int index, cindex; 2797eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2798eb6f0de0SAdrian Chadd int seqno = SEQNO(bf->bf_state.bfs_seqno); 2799eb6f0de0SAdrian Chadd 2800375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2801eb6f0de0SAdrian Chadd 2802eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2803eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 2804eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2805eb6f0de0SAdrian Chadd 2806eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2807a108d2d6SAdrian Chadd "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, " 2808d4365d16SAdrian Chadd "baw head=%d, tail=%d\n", 2809a108d2d6SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index, 2810eb6f0de0SAdrian Chadd cindex, tid->baw_head, tid->baw_tail); 2811eb6f0de0SAdrian Chadd 2812eb6f0de0SAdrian Chadd /* 2813eb6f0de0SAdrian Chadd * If this occurs then we have a big problem - something else 2814eb6f0de0SAdrian Chadd * has slid tap->txa_start along without updating the BAW 2815eb6f0de0SAdrian Chadd * tracking start/end pointers. Thus the TX BAW state is now 2816eb6f0de0SAdrian Chadd * completely busted. 2817eb6f0de0SAdrian Chadd * 2818eb6f0de0SAdrian Chadd * But for now, since I haven't yet fixed TDMA and buffer cloning, 2819eb6f0de0SAdrian Chadd * it's quite possible that a cloned buffer is making its way 2820eb6f0de0SAdrian Chadd * here and causing it to fire off. Disable TDMA for now. 2821eb6f0de0SAdrian Chadd */ 2822eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != bf) { 282383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2824eb6f0de0SAdrian Chadd "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n", 282583bbd5ebSRui Paulo __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 2826eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 28273527f6a9SAdrian Chadd (tid->tx_buf[cindex] != NULL) ? 28283527f6a9SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1); 2829eb6f0de0SAdrian Chadd } 2830eb6f0de0SAdrian Chadd 2831eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = NULL; 2832eb6f0de0SAdrian Chadd 2833d4365d16SAdrian Chadd while (tid->baw_head != tid->baw_tail && 2834d4365d16SAdrian Chadd !tid->tx_buf[tid->baw_head]) { 2835eb6f0de0SAdrian Chadd INCR(tap->txa_start, IEEE80211_SEQ_RANGE); 2836eb6f0de0SAdrian Chadd INCR(tid->baw_head, ATH_TID_MAX_BUFS); 2837eb6f0de0SAdrian Chadd } 2838d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 283942fdd8e7SAdrian Chadd "%s: tid=%d: baw is now %d:%d, baw head=%d\n", 284042fdd8e7SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head); 2841eb6f0de0SAdrian Chadd } 2842eb6f0de0SAdrian Chadd 284322a3aee6SAdrian Chadd static void 284422a3aee6SAdrian Chadd ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid, 284522a3aee6SAdrian Chadd struct ath_buf *bf) 284622a3aee6SAdrian Chadd { 284722a3aee6SAdrian Chadd struct ieee80211_frame *wh; 284822a3aee6SAdrian Chadd 284922a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 285022a3aee6SAdrian Chadd 285122a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 285222a3aee6SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 285322a3aee6SAdrian Chadd 285422a3aee6SAdrian Chadd /* 285522a3aee6SAdrian Chadd * Update MORE based on the software/net80211 queue states. 285622a3aee6SAdrian Chadd */ 285722a3aee6SAdrian Chadd if ((tid->an->an_stack_psq > 0) 285822a3aee6SAdrian Chadd || (tid->an->an_swq_depth > 0)) 285922a3aee6SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 286022a3aee6SAdrian Chadd else 286122a3aee6SAdrian Chadd wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA; 286222a3aee6SAdrian Chadd 286322a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE, 286422a3aee6SAdrian Chadd "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n", 286522a3aee6SAdrian Chadd __func__, 286622a3aee6SAdrian Chadd tid->an->an_node.ni_macaddr, 286722a3aee6SAdrian Chadd ":", 286822a3aee6SAdrian Chadd tid->an->an_leak_count, 286922a3aee6SAdrian Chadd tid->an->an_stack_psq, 287022a3aee6SAdrian Chadd tid->an->an_swq_depth, 287122a3aee6SAdrian Chadd !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA)); 287222a3aee6SAdrian Chadd 287322a3aee6SAdrian Chadd /* 287422a3aee6SAdrian Chadd * Re-sync the underlying buffer. 287522a3aee6SAdrian Chadd */ 287622a3aee6SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 287722a3aee6SAdrian Chadd BUS_DMASYNC_PREWRITE); 287822a3aee6SAdrian Chadd 287922a3aee6SAdrian Chadd tid->an->an_leak_count --; 288022a3aee6SAdrian Chadd } 288122a3aee6SAdrian Chadd } 288222a3aee6SAdrian Chadd 288322a3aee6SAdrian Chadd static int 288422a3aee6SAdrian Chadd ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid) 288522a3aee6SAdrian Chadd { 288622a3aee6SAdrian Chadd 288722a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 288822a3aee6SAdrian Chadd 288922a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 289022a3aee6SAdrian Chadd return (1); 289122a3aee6SAdrian Chadd } 289222a3aee6SAdrian Chadd if (tid->paused) 289322a3aee6SAdrian Chadd return (0); 289422a3aee6SAdrian Chadd return (1); 289522a3aee6SAdrian Chadd } 289622a3aee6SAdrian Chadd 2897eb6f0de0SAdrian Chadd /* 2898eb6f0de0SAdrian Chadd * Mark the current node/TID as ready to TX. 2899eb6f0de0SAdrian Chadd * 2900eb6f0de0SAdrian Chadd * This is done to make it easy for the software scheduler to 2901eb6f0de0SAdrian Chadd * find which nodes have data to send. 2902eb6f0de0SAdrian Chadd * 2903eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2904eb6f0de0SAdrian Chadd */ 290522a3aee6SAdrian Chadd void 2906eb6f0de0SAdrian Chadd ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid) 2907eb6f0de0SAdrian Chadd { 2908eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2909eb6f0de0SAdrian Chadd 2910375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2911eb6f0de0SAdrian Chadd 291222a3aee6SAdrian Chadd /* 291322a3aee6SAdrian Chadd * If we are leaking out a frame to this destination 291422a3aee6SAdrian Chadd * for PS-POLL, ensure that we allow scheduling to 291522a3aee6SAdrian Chadd * occur. 291622a3aee6SAdrian Chadd */ 291722a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 2918eb6f0de0SAdrian Chadd return; /* paused, can't schedule yet */ 2919eb6f0de0SAdrian Chadd 2920eb6f0de0SAdrian Chadd if (tid->sched) 2921eb6f0de0SAdrian Chadd return; /* already scheduled */ 2922eb6f0de0SAdrian Chadd 2923eb6f0de0SAdrian Chadd tid->sched = 1; 2924eb6f0de0SAdrian Chadd 292522a3aee6SAdrian Chadd #if 0 292622a3aee6SAdrian Chadd /* 292722a3aee6SAdrian Chadd * If this is a sleeping node we're leaking to, given 292822a3aee6SAdrian Chadd * it a higher priority. This is so bad for QoS it hurts. 292922a3aee6SAdrian Chadd */ 293022a3aee6SAdrian Chadd if (tid->an->an_leak_count) { 293122a3aee6SAdrian Chadd TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem); 293222a3aee6SAdrian Chadd } else { 293322a3aee6SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 293422a3aee6SAdrian Chadd } 293522a3aee6SAdrian Chadd #endif 293622a3aee6SAdrian Chadd 293722a3aee6SAdrian Chadd /* 293822a3aee6SAdrian Chadd * We can't do the above - it'll confuse the TXQ software 293922a3aee6SAdrian Chadd * scheduler which will keep checking the _head_ TID 294022a3aee6SAdrian Chadd * in the list to see if it has traffic. If we queue 294122a3aee6SAdrian Chadd * a TID to the head of the list and it doesn't transmit, 294222a3aee6SAdrian Chadd * we'll check it again. 294322a3aee6SAdrian Chadd * 294422a3aee6SAdrian Chadd * So, get the rest of this leaking frames support working 294522a3aee6SAdrian Chadd * and reliable first and _then_ optimise it so they're 294622a3aee6SAdrian Chadd * pushed out in front of any other pending software 294722a3aee6SAdrian Chadd * queued nodes. 294822a3aee6SAdrian Chadd */ 2949eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2950eb6f0de0SAdrian Chadd } 2951eb6f0de0SAdrian Chadd 2952eb6f0de0SAdrian Chadd /* 2953eb6f0de0SAdrian Chadd * Mark the current node as no longer needing to be polled for 2954eb6f0de0SAdrian Chadd * TX packets. 2955eb6f0de0SAdrian Chadd * 2956eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2957eb6f0de0SAdrian Chadd */ 2958eb6f0de0SAdrian Chadd static void 2959eb6f0de0SAdrian Chadd ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid) 2960eb6f0de0SAdrian Chadd { 2961eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2962eb6f0de0SAdrian Chadd 2963375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2964eb6f0de0SAdrian Chadd 2965eb6f0de0SAdrian Chadd if (tid->sched == 0) 2966eb6f0de0SAdrian Chadd return; 2967eb6f0de0SAdrian Chadd 2968eb6f0de0SAdrian Chadd tid->sched = 0; 2969eb6f0de0SAdrian Chadd TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem); 2970eb6f0de0SAdrian Chadd } 2971eb6f0de0SAdrian Chadd 2972eb6f0de0SAdrian Chadd /* 2973eb6f0de0SAdrian Chadd * Assign a sequence number manually to the given frame. 2974eb6f0de0SAdrian Chadd * 2975eb6f0de0SAdrian Chadd * This should only be called for A-MPDU TX frames. 297615e58d4dSAdrian Chadd * 297715e58d4dSAdrian Chadd * Note: for group addressed frames, the sequence number 297815e58d4dSAdrian Chadd * should be from NONQOS_TID, and net80211 should have 297915e58d4dSAdrian Chadd * already assigned it for us. 2980eb6f0de0SAdrian Chadd */ 2981a108d2d6SAdrian Chadd static ieee80211_seq 2982eb6f0de0SAdrian Chadd ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni, 2983eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 2984eb6f0de0SAdrian Chadd { 2985eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 298615e58d4dSAdrian Chadd int tid; 2987eb6f0de0SAdrian Chadd ieee80211_seq seqno; 2988eb6f0de0SAdrian Chadd uint8_t subtype; 2989eb6f0de0SAdrian Chadd 2990eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 299115e58d4dSAdrian Chadd tid = ieee80211_gettid(wh); 299215e58d4dSAdrian Chadd 299315e58d4dSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, qos has seq=%d\n", 299415e58d4dSAdrian Chadd __func__, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2995eb6f0de0SAdrian Chadd 2996eb6f0de0SAdrian Chadd /* XXX Is it a control frame? Ignore */ 2997eb6f0de0SAdrian Chadd 2998eb6f0de0SAdrian Chadd /* Does the packet require a sequence number? */ 2999eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 3000eb6f0de0SAdrian Chadd return -1; 3001eb6f0de0SAdrian Chadd 3002375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 30037561cb5cSAdrian Chadd 3004eb6f0de0SAdrian Chadd /* 3005eb6f0de0SAdrian Chadd * Is it a QOS NULL Data frame? Give it a sequence number from 3006eb6f0de0SAdrian Chadd * the default TID (IEEE80211_NONQOS_TID.) 3007eb6f0de0SAdrian Chadd * 3008eb6f0de0SAdrian Chadd * The RX path of everything I've looked at doesn't include the NULL 3009eb6f0de0SAdrian Chadd * data frame sequence number in the aggregation state updates, so 3010eb6f0de0SAdrian Chadd * assigning it a sequence number there will cause a BAW hole on the 3011eb6f0de0SAdrian Chadd * RX side. 3012eb6f0de0SAdrian Chadd */ 3013eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 3014eb6f0de0SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) { 30157561cb5cSAdrian Chadd /* XXX no locking for this TID? This is a bit of a problem. */ 3016eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 3017eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 301815e58d4dSAdrian Chadd } else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 301915e58d4dSAdrian Chadd /* 302015e58d4dSAdrian Chadd * group addressed frames get a sequence number from 302115e58d4dSAdrian Chadd * a different sequence number space. 302215e58d4dSAdrian Chadd */ 302315e58d4dSAdrian Chadd seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 302415e58d4dSAdrian Chadd INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 3025eb6f0de0SAdrian Chadd } else { 3026eb6f0de0SAdrian Chadd /* Manually assign sequence number */ 3027eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[tid]; 3028eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE); 3029eb6f0de0SAdrian Chadd } 3030eb6f0de0SAdrian Chadd *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); 3031eb6f0de0SAdrian Chadd M_SEQNO_SET(m0, seqno); 3032eb6f0de0SAdrian Chadd 3033eb6f0de0SAdrian Chadd /* Return so caller can do something with it if needed */ 303439d54676SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 303539d54676SAdrian Chadd "%s: -> subtype=0x%x, tid=%d, seqno=%d\n", 303639d54676SAdrian Chadd __func__, subtype, tid, seqno); 3037eb6f0de0SAdrian Chadd return seqno; 3038eb6f0de0SAdrian Chadd } 3039eb6f0de0SAdrian Chadd 3040eb6f0de0SAdrian Chadd /* 3041eb6f0de0SAdrian Chadd * Attempt to direct dispatch an aggregate frame to hardware. 3042eb6f0de0SAdrian Chadd * If the frame is out of BAW, queue. 3043eb6f0de0SAdrian Chadd * Otherwise, schedule it as a single frame. 3044eb6f0de0SAdrian Chadd */ 3045eb6f0de0SAdrian Chadd static void 304646634305SAdrian Chadd ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 304746634305SAdrian Chadd struct ath_txq *txq, struct ath_buf *bf) 3048eb6f0de0SAdrian Chadd { 3049eb6f0de0SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 3050eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 3051eb6f0de0SAdrian Chadd 3052375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3053eb6f0de0SAdrian Chadd 3054eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3055eb6f0de0SAdrian Chadd 3056eb6f0de0SAdrian Chadd /* paused? queue */ 305722a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 30583e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 30590f04c5a2SAdrian Chadd /* XXX don't sched - we're paused! */ 3060eb6f0de0SAdrian Chadd return; 3061eb6f0de0SAdrian Chadd } 3062eb6f0de0SAdrian Chadd 3063eb6f0de0SAdrian Chadd /* outside baw? queue */ 3064eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw && 3065eb6f0de0SAdrian Chadd (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 3066eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)))) { 30673e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3068eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 3069eb6f0de0SAdrian Chadd return; 3070eb6f0de0SAdrian Chadd } 3071eb6f0de0SAdrian Chadd 30722a9f83afSAdrian Chadd /* 30732a9f83afSAdrian Chadd * This is a temporary check and should be removed once 30742a9f83afSAdrian Chadd * all the relevant code paths have been fixed. 30752a9f83afSAdrian Chadd * 30762a9f83afSAdrian Chadd * During aggregate retries, it's possible that the head 30772a9f83afSAdrian Chadd * frame will fail (which has the bfs_aggr and bfs_nframes 30782a9f83afSAdrian Chadd * fields set for said aggregate) and will be retried as 30792a9f83afSAdrian Chadd * a single frame. In this instance, the values should 30802a9f83afSAdrian Chadd * be reset or the completion code will get upset with you. 30812a9f83afSAdrian Chadd */ 30822a9f83afSAdrian Chadd if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) { 3083b372f122SRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 308483bbd5ebSRui Paulo "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__, 308583bbd5ebSRui Paulo bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes); 30862a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 30872a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 30882a9f83afSAdrian Chadd } 30892a9f83afSAdrian Chadd 30904e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 30914e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 30924e81f27cSAdrian Chadd 3093eb6f0de0SAdrian Chadd /* Direct dispatch to hardware */ 3094eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 3095e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 3096e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 3097eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 3098e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 3099eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 3100eb6f0de0SAdrian Chadd 3101eb6f0de0SAdrian Chadd /* Statistics */ 3102eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_low_hwq_single_pkt++; 3103eb6f0de0SAdrian Chadd 3104eb6f0de0SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 3105eb6f0de0SAdrian Chadd tid->hwq_depth++; 3106eb6f0de0SAdrian Chadd 3107eb6f0de0SAdrian Chadd /* Add to BAW */ 3108eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 3109eb6f0de0SAdrian Chadd ath_tx_addto_baw(sc, an, tid, bf); 3110eb6f0de0SAdrian Chadd bf->bf_state.bfs_addedbaw = 1; 3111eb6f0de0SAdrian Chadd } 3112eb6f0de0SAdrian Chadd 3113eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 3114eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 3115eb6f0de0SAdrian Chadd 311622a3aee6SAdrian Chadd /* 311722a3aee6SAdrian Chadd * Update the current leak count if 311822a3aee6SAdrian Chadd * we're leaking frames; and set the 311922a3aee6SAdrian Chadd * MORE flag as appropriate. 312022a3aee6SAdrian Chadd */ 312122a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 312222a3aee6SAdrian Chadd 3123eb6f0de0SAdrian Chadd /* Hand off to hardware */ 3124eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 3125eb6f0de0SAdrian Chadd } 3126eb6f0de0SAdrian Chadd 3127eb6f0de0SAdrian Chadd /* 3128eb6f0de0SAdrian Chadd * Attempt to send the packet. 3129eb6f0de0SAdrian Chadd * If the queue isn't busy, direct-dispatch. 3130eb6f0de0SAdrian Chadd * If the queue is busy enough, queue the given packet on the 3131eb6f0de0SAdrian Chadd * relevant software queue. 3132eb6f0de0SAdrian Chadd */ 3133eb6f0de0SAdrian Chadd void 313422a3aee6SAdrian Chadd ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, 313522a3aee6SAdrian Chadd struct ath_txq *txq, int queue_to_head, struct ath_buf *bf) 3136eb6f0de0SAdrian Chadd { 3137eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 3138eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 3139eb6f0de0SAdrian Chadd struct ath_tid *atid; 3140eb6f0de0SAdrian Chadd int pri, tid; 3141eb6f0de0SAdrian Chadd struct mbuf *m0 = bf->bf_m; 3142eb6f0de0SAdrian Chadd 3143375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 31447561cb5cSAdrian Chadd 3145eb6f0de0SAdrian Chadd /* Fetch the TID - non-QoS frames get assigned to TID 16 */ 3146eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 3147eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 3148eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 3149eb6f0de0SAdrian Chadd atid = &an->an_tid[tid]; 3150eb6f0de0SAdrian Chadd 3151a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 3152a108d2d6SAdrian Chadd __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 3153eb6f0de0SAdrian Chadd 3154eb6f0de0SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 315546634305SAdrian Chadd /* XXX potentially duplicate info, re-check */ 3156eb6f0de0SAdrian Chadd bf->bf_state.bfs_tid = tid; 3157fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 3158eb6f0de0SAdrian Chadd bf->bf_state.bfs_pri = pri; 3159eb6f0de0SAdrian Chadd 3160eb6f0de0SAdrian Chadd /* 3161eb6f0de0SAdrian Chadd * If the hardware queue isn't busy, queue it directly. 3162eb6f0de0SAdrian Chadd * If the hardware queue is busy, queue it. 3163eb6f0de0SAdrian Chadd * If the TID is paused or the traffic it outside BAW, software 3164eb6f0de0SAdrian Chadd * queue it. 316522a3aee6SAdrian Chadd * 316622a3aee6SAdrian Chadd * If the node is in power-save and we're leaking a frame, 316722a3aee6SAdrian Chadd * leak a single frame. 3168eb6f0de0SAdrian Chadd */ 316922a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, atid)) { 3170eb6f0de0SAdrian Chadd /* TID is paused, queue */ 3171a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__); 317222a3aee6SAdrian Chadd /* 317322a3aee6SAdrian Chadd * If the caller requested that it be sent at a high 317422a3aee6SAdrian Chadd * priority, queue it at the head of the list. 317522a3aee6SAdrian Chadd */ 317622a3aee6SAdrian Chadd if (queue_to_head) 317722a3aee6SAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 317822a3aee6SAdrian Chadd else 31793e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3180eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_pending(sc, an, tid)) { 3181eb6f0de0SAdrian Chadd /* AMPDU pending; queue */ 3182a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__); 31833e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3184eb6f0de0SAdrian Chadd /* XXX sched? */ 3185eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_running(sc, an, tid)) { 318657af292dSAdrian Chadd /* 318757af292dSAdrian Chadd * AMPDU running, queue single-frame if the hardware queue 318857af292dSAdrian Chadd * isn't busy. 318957af292dSAdrian Chadd * 319057af292dSAdrian Chadd * If the hardware queue is busy, sending an aggregate frame 319157af292dSAdrian Chadd * then just hold off so we can queue more aggregate frames. 319257af292dSAdrian Chadd * 319357af292dSAdrian Chadd * Otherwise we may end up with single frames leaking through 319457af292dSAdrian Chadd * because we are dispatching them too quickly. 319557af292dSAdrian Chadd * 319657af292dSAdrian Chadd * TODO: maybe we should treat this as two policies - minimise 319757af292dSAdrian Chadd * latency, or maximise throughput. Then for BE/BK we can 319857af292dSAdrian Chadd * maximise throughput, and VO/VI (if AMPDU is enabled!) 319957af292dSAdrian Chadd * minimise latency. 320057af292dSAdrian Chadd */ 320139f24578SAdrian Chadd 320239f24578SAdrian Chadd /* 320339f24578SAdrian Chadd * Always queue the frame to the tail of the list. 320439f24578SAdrian Chadd */ 32053e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 320639f24578SAdrian Chadd 320739f24578SAdrian Chadd /* 320839f24578SAdrian Chadd * If the hardware queue isn't busy, direct dispatch 320957af292dSAdrian Chadd * the head frame in the list. 321039f24578SAdrian Chadd * 321157af292dSAdrian Chadd * Note: if we're say, configured to do ADDBA but not A-MPDU 321257af292dSAdrian Chadd * then maybe we want to still queue two non-aggregate frames 321357af292dSAdrian Chadd * to the hardware. Again with the per-TID policy 321457af292dSAdrian Chadd * configuration..) 321572910f03SAdrian Chadd * 321639f24578SAdrian Chadd * Otherwise, schedule the TID. 321739f24578SAdrian Chadd */ 321872910f03SAdrian Chadd /* XXX TXQ locking */ 321957af292dSAdrian Chadd if (txq->axq_depth + txq->fifo.axq_depth == 0) { 322057af292dSAdrian Chadd 32213e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 32223e6cc97fSAdrian Chadd ATH_TID_REMOVE(atid, bf, bf_list); 32232a9f83afSAdrian Chadd 32242a9f83afSAdrian Chadd /* 32252a9f83afSAdrian Chadd * Ensure it's definitely treated as a non-AMPDU 32262a9f83afSAdrian Chadd * frame - this information may have been left 32272a9f83afSAdrian Chadd * over from a previous attempt. 32282a9f83afSAdrian Chadd */ 32292a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 32302a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 32312a9f83afSAdrian Chadd 32322a9f83afSAdrian Chadd /* Queue to the hardware */ 323346634305SAdrian Chadd ath_tx_xmit_aggr(sc, an, txq, bf); 3234a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3235a108d2d6SAdrian Chadd "%s: xmit_aggr\n", 3236a108d2d6SAdrian Chadd __func__); 3237d4365d16SAdrian Chadd } else { 3238d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3239a108d2d6SAdrian Chadd "%s: ampdu; swq'ing\n", 3240a108d2d6SAdrian Chadd __func__); 324103682514SAdrian Chadd 3242eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3243eb6f0de0SAdrian Chadd } 324472910f03SAdrian Chadd /* 324572910f03SAdrian Chadd * If we're not doing A-MPDU, be prepared to direct dispatch 324672910f03SAdrian Chadd * up to both limits if possible. This particular corner 324772910f03SAdrian Chadd * case may end up with packet starvation between aggregate 3248f6b6084bSPedro F. Giffuni * traffic and non-aggregate traffic: we want to ensure 324972910f03SAdrian Chadd * that non-aggregate stations get a few frames queued to the 325072910f03SAdrian Chadd * hardware before the aggregate station(s) get their chance. 325172910f03SAdrian Chadd * 325272910f03SAdrian Chadd * So if you only ever see a couple of frames direct dispatched 325372910f03SAdrian Chadd * to the hardware from a non-AMPDU client, check both here 325472910f03SAdrian Chadd * and in the software queue dispatcher to ensure that those 325572910f03SAdrian Chadd * non-AMPDU stations get a fair chance to transmit. 325672910f03SAdrian Chadd */ 325772910f03SAdrian Chadd /* XXX TXQ locking */ 325872910f03SAdrian Chadd } else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) && 325972910f03SAdrian Chadd (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) { 3260eb6f0de0SAdrian Chadd /* AMPDU not running, attempt direct dispatch */ 3261a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__); 32620a544719SAdrian Chadd /* See if clrdmask needs to be set */ 32630a544719SAdrian Chadd ath_tx_update_clrdmask(sc, atid, bf); 326422a3aee6SAdrian Chadd 326522a3aee6SAdrian Chadd /* 326622a3aee6SAdrian Chadd * Update the current leak count if 326722a3aee6SAdrian Chadd * we're leaking frames; and set the 326822a3aee6SAdrian Chadd * MORE flag as appropriate. 326922a3aee6SAdrian Chadd */ 327022a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, atid, bf); 327122a3aee6SAdrian Chadd 327222a3aee6SAdrian Chadd /* 327322a3aee6SAdrian Chadd * Dispatch the frame. 327422a3aee6SAdrian Chadd */ 3275eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 3276eb6f0de0SAdrian Chadd } else { 3277eb6f0de0SAdrian Chadd /* Busy; queue */ 3278a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__); 32793e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3280eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3281eb6f0de0SAdrian Chadd } 3282eb6f0de0SAdrian Chadd } 3283eb6f0de0SAdrian Chadd 3284eb6f0de0SAdrian Chadd /* 32854f25ddbbSAdrian Chadd * Only set the clrdmask bit if none of the nodes are currently 32864f25ddbbSAdrian Chadd * filtered. 32874f25ddbbSAdrian Chadd * 32884f25ddbbSAdrian Chadd * XXX TODO: go through all the callers and check to see 32894f25ddbbSAdrian Chadd * which are being called in the context of looping over all 32904f25ddbbSAdrian Chadd * TIDs (eg, if all tids are being paused, resumed, etc.) 32914f25ddbbSAdrian Chadd * That'll avoid O(n^2) complexity here. 32924f25ddbbSAdrian Chadd */ 32934f25ddbbSAdrian Chadd static void 32944f25ddbbSAdrian Chadd ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an) 32954f25ddbbSAdrian Chadd { 32964f25ddbbSAdrian Chadd int i; 32974f25ddbbSAdrian Chadd 32984f25ddbbSAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 32994f25ddbbSAdrian Chadd 33004f25ddbbSAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 33014f25ddbbSAdrian Chadd if (an->an_tid[i].isfiltered == 1) 3302f74d878fSAdrian Chadd return; 33034f25ddbbSAdrian Chadd } 33044f25ddbbSAdrian Chadd an->clrdmask = 1; 33054f25ddbbSAdrian Chadd } 33064f25ddbbSAdrian Chadd 33074f25ddbbSAdrian Chadd /* 3308eb6f0de0SAdrian Chadd * Configure the per-TID node state. 3309eb6f0de0SAdrian Chadd * 3310eb6f0de0SAdrian Chadd * This likely belongs in if_ath_node.c but I can't think of anywhere 3311eb6f0de0SAdrian Chadd * else to put it just yet. 3312eb6f0de0SAdrian Chadd * 3313eb6f0de0SAdrian Chadd * This sets up the SLISTs and the mutex as appropriate. 3314eb6f0de0SAdrian Chadd */ 3315eb6f0de0SAdrian Chadd void 3316eb6f0de0SAdrian Chadd ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an) 3317eb6f0de0SAdrian Chadd { 3318eb6f0de0SAdrian Chadd int i, j; 3319eb6f0de0SAdrian Chadd struct ath_tid *atid; 3320eb6f0de0SAdrian Chadd 3321eb6f0de0SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3322eb6f0de0SAdrian Chadd atid = &an->an_tid[i]; 3323f1bc738eSAdrian Chadd 3324f1bc738eSAdrian Chadd /* XXX now with this bzer(), is the field 0'ing needed? */ 3325f1bc738eSAdrian Chadd bzero(atid, sizeof(*atid)); 3326f1bc738eSAdrian Chadd 33273e6cc97fSAdrian Chadd TAILQ_INIT(&atid->tid_q); 33283e6cc97fSAdrian Chadd TAILQ_INIT(&atid->filtq.tid_q); 3329eb6f0de0SAdrian Chadd atid->tid = i; 3330eb6f0de0SAdrian Chadd atid->an = an; 3331eb6f0de0SAdrian Chadd for (j = 0; j < ATH_TID_MAX_BUFS; j++) 3332eb6f0de0SAdrian Chadd atid->tx_buf[j] = NULL; 3333eb6f0de0SAdrian Chadd atid->baw_head = atid->baw_tail = 0; 3334eb6f0de0SAdrian Chadd atid->paused = 0; 3335eb6f0de0SAdrian Chadd atid->sched = 0; 3336eb6f0de0SAdrian Chadd atid->hwq_depth = 0; 3337eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 3338eb6f0de0SAdrian Chadd if (i == IEEE80211_NONQOS_TID) 33397403d1b9SAdrian Chadd atid->ac = ATH_NONQOS_TID_AC; 3340eb6f0de0SAdrian Chadd else 3341eb6f0de0SAdrian Chadd atid->ac = TID_TO_WME_AC(i); 3342eb6f0de0SAdrian Chadd } 33434f25ddbbSAdrian Chadd an->clrdmask = 1; /* Always start by setting this bit */ 3344eb6f0de0SAdrian Chadd } 3345eb6f0de0SAdrian Chadd 3346eb6f0de0SAdrian Chadd /* 3347eb6f0de0SAdrian Chadd * Pause the current TID. This stops packets from being transmitted 3348eb6f0de0SAdrian Chadd * on it. 3349eb6f0de0SAdrian Chadd * 3350eb6f0de0SAdrian Chadd * Since this is also called from upper layers as well as the driver, 3351eb6f0de0SAdrian Chadd * it will get the TID lock. 3352eb6f0de0SAdrian Chadd */ 3353eb6f0de0SAdrian Chadd static void 3354eb6f0de0SAdrian Chadd ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid) 3355eb6f0de0SAdrian Chadd { 335688b3d483SAdrian Chadd 3357375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3358eb6f0de0SAdrian Chadd tid->paused++; 33591771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n", 33601771c649SAdrian Chadd __func__, 33611771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 33621771c649SAdrian Chadd tid->tid, 33631771c649SAdrian Chadd tid->paused); 3364eb6f0de0SAdrian Chadd } 3365eb6f0de0SAdrian Chadd 3366eb6f0de0SAdrian Chadd /* 3367eb6f0de0SAdrian Chadd * Unpause the current TID, and schedule it if needed. 3368eb6f0de0SAdrian Chadd */ 3369eb6f0de0SAdrian Chadd static void 3370eb6f0de0SAdrian Chadd ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid) 3371eb6f0de0SAdrian Chadd { 3372375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3373eb6f0de0SAdrian Chadd 3374dff5bdf4SAdrian Chadd /* 3375dff5bdf4SAdrian Chadd * There's some odd places where ath_tx_tid_resume() is called 3376dff5bdf4SAdrian Chadd * when it shouldn't be; this works around that particular issue 3377dff5bdf4SAdrian Chadd * until it's actually resolved. 3378dff5bdf4SAdrian Chadd */ 3379dff5bdf4SAdrian Chadd if (tid->paused == 0) { 33801771c649SAdrian Chadd device_printf(sc->sc_dev, 33811771c649SAdrian Chadd "%s: [%6D]: tid=%d, paused=0?\n", 33821771c649SAdrian Chadd __func__, 33831771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 33841771c649SAdrian Chadd tid->tid); 3385dff5bdf4SAdrian Chadd } else { 3386eb6f0de0SAdrian Chadd tid->paused--; 3387dff5bdf4SAdrian Chadd } 3388eb6f0de0SAdrian Chadd 33891771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 33901771c649SAdrian Chadd "%s: [%6D]: tid=%d, unpaused = %d\n", 33911771c649SAdrian Chadd __func__, 33921771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 33931771c649SAdrian Chadd tid->tid, 33941771c649SAdrian Chadd tid->paused); 3395eb6f0de0SAdrian Chadd 33960eb81626SAdrian Chadd if (tid->paused) 3397eb6f0de0SAdrian Chadd return; 33980eb81626SAdrian Chadd 33990eb81626SAdrian Chadd /* 34000eb81626SAdrian Chadd * Override the clrdmask configuration for the next frame 34010eb81626SAdrian Chadd * from this TID, just to get the ball rolling. 34020eb81626SAdrian Chadd */ 34034f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 34040eb81626SAdrian Chadd 34050eb81626SAdrian Chadd if (tid->axq_depth == 0) 34060eb81626SAdrian Chadd return; 3407eb6f0de0SAdrian Chadd 3408f1bc738eSAdrian Chadd /* XXX isfiltered shouldn't ever be 0 at this point */ 3409f1bc738eSAdrian Chadd if (tid->isfiltered == 1) { 341083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n", 341183bbd5ebSRui Paulo __func__); 3412f1bc738eSAdrian Chadd return; 3413f1bc738eSAdrian Chadd } 3414f1bc738eSAdrian Chadd 3415eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 341621bca442SAdrian Chadd 341721bca442SAdrian Chadd /* 341821bca442SAdrian Chadd * Queue the software TX scheduler. 341921bca442SAdrian Chadd */ 342021bca442SAdrian Chadd ath_tx_swq_kick(sc); 3421eb6f0de0SAdrian Chadd } 3422eb6f0de0SAdrian Chadd 3423eb6f0de0SAdrian Chadd /* 3424f1bc738eSAdrian Chadd * Add the given ath_buf to the TID filtered frame list. 3425f1bc738eSAdrian Chadd * This requires the TID be filtered. 3426f1bc738eSAdrian Chadd */ 3427f1bc738eSAdrian Chadd static void 3428f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid, 3429f1bc738eSAdrian Chadd struct ath_buf *bf) 3430f1bc738eSAdrian Chadd { 3431f1bc738eSAdrian Chadd 3432375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3433375307d4SAdrian Chadd 3434f1bc738eSAdrian Chadd if (!tid->isfiltered) 343583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n", 343683bbd5ebSRui Paulo __func__); 3437f1bc738eSAdrian Chadd 3438f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf); 3439f1bc738eSAdrian Chadd 3440f1bc738eSAdrian Chadd /* Set the retry bit and bump the retry counter */ 3441f1bc738eSAdrian Chadd ath_tx_set_retry(sc, bf); 3442f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swfiltered++; 3443f1bc738eSAdrian Chadd 344413aa9ee5SAdrian Chadd ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list); 3445f1bc738eSAdrian Chadd } 3446f1bc738eSAdrian Chadd 3447f1bc738eSAdrian Chadd /* 3448f1bc738eSAdrian Chadd * Handle a completed filtered frame from the given TID. 3449f1bc738eSAdrian Chadd * This just enables/pauses the filtered frame state if required 3450f1bc738eSAdrian Chadd * and appends the filtered frame to the filtered queue. 3451f1bc738eSAdrian Chadd */ 3452f1bc738eSAdrian Chadd static void 3453f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid, 3454f1bc738eSAdrian Chadd struct ath_buf *bf) 3455f1bc738eSAdrian Chadd { 3456f1bc738eSAdrian Chadd 3457375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3458f1bc738eSAdrian Chadd 3459f1bc738eSAdrian Chadd if (! tid->isfiltered) { 346042fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n", 346142fdd8e7SAdrian Chadd __func__, tid->tid); 3462f1bc738eSAdrian Chadd tid->isfiltered = 1; 3463f1bc738eSAdrian Chadd ath_tx_tid_pause(sc, tid); 3464f1bc738eSAdrian Chadd } 3465f1bc738eSAdrian Chadd 3466f1bc738eSAdrian Chadd /* Add the frame to the filter queue */ 3467f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(sc, tid, bf); 3468f1bc738eSAdrian Chadd } 3469f1bc738eSAdrian Chadd 3470f1bc738eSAdrian Chadd /* 3471f1bc738eSAdrian Chadd * Complete the filtered frame TX completion. 3472f1bc738eSAdrian Chadd * 3473f1bc738eSAdrian Chadd * If there are no more frames in the hardware queue, unpause/unfilter 3474f1bc738eSAdrian Chadd * the TID if applicable. Otherwise we will wait for a node PS transition 3475f1bc738eSAdrian Chadd * to unfilter. 3476f1bc738eSAdrian Chadd */ 3477f1bc738eSAdrian Chadd static void 3478f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid) 3479f1bc738eSAdrian Chadd { 3480f1bc738eSAdrian Chadd struct ath_buf *bf; 3481a3fd3b14SAdrian Chadd int do_resume = 0; 3482f1bc738eSAdrian Chadd 3483375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3484f1bc738eSAdrian Chadd 3485f1bc738eSAdrian Chadd if (tid->hwq_depth != 0) 3486f1bc738eSAdrian Chadd return; 3487f1bc738eSAdrian Chadd 348842fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n", 348942fdd8e7SAdrian Chadd __func__, tid->tid); 3490a3fd3b14SAdrian Chadd if (tid->isfiltered == 1) { 3491f1bc738eSAdrian Chadd tid->isfiltered = 0; 3492a3fd3b14SAdrian Chadd do_resume = 1; 3493a3fd3b14SAdrian Chadd } 3494a3fd3b14SAdrian Chadd 34954f25ddbbSAdrian Chadd /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */ 34964f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 3497f1bc738eSAdrian Chadd 3498f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 349913aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) { 350013aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 35013e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3502f1bc738eSAdrian Chadd } 3503f1bc738eSAdrian Chadd 3504c5d230abSAdrian Chadd /* And only resume if we had paused before */ 3505a3fd3b14SAdrian Chadd if (do_resume) 3506f1bc738eSAdrian Chadd ath_tx_tid_resume(sc, tid); 3507f1bc738eSAdrian Chadd } 3508f1bc738eSAdrian Chadd 3509f1bc738eSAdrian Chadd /* 3510f1bc738eSAdrian Chadd * Called when a single (aggregate or otherwise) frame is completed. 3511f1bc738eSAdrian Chadd * 35121f737306SAdrian Chadd * Returns 0 if the buffer could be added to the filtered list 35131f737306SAdrian Chadd * (cloned or otherwise), 1 if the buffer couldn't be added to the 3514f1bc738eSAdrian Chadd * filtered list (failed clone; expired retry) and the caller should 3515f1bc738eSAdrian Chadd * free it and handle it like a failure (eg by sending a BAR.) 35161f737306SAdrian Chadd * 35171f737306SAdrian Chadd * since the buffer may be cloned, bf must be not touched after this 35181f737306SAdrian Chadd * if the return value is 0. 3519f1bc738eSAdrian Chadd */ 3520f1bc738eSAdrian Chadd static int 3521f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid, 3522f1bc738eSAdrian Chadd struct ath_buf *bf) 3523f1bc738eSAdrian Chadd { 3524f1bc738eSAdrian Chadd struct ath_buf *nbf; 3525f1bc738eSAdrian Chadd int retval; 3526f1bc738eSAdrian Chadd 3527375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3528f1bc738eSAdrian Chadd 3529f1bc738eSAdrian Chadd /* 3530f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3531f1bc738eSAdrian Chadd */ 3532f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 35330eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3534f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3535f1bc738eSAdrian Chadd "%s: bf=%p, seqno=%d, exceeded retries\n", 3536f1bc738eSAdrian Chadd __func__, 3537f1bc738eSAdrian Chadd bf, 353842fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 35391f737306SAdrian Chadd retval = 1; /* error */ 35401f737306SAdrian Chadd goto finish; 3541f1bc738eSAdrian Chadd } 3542f1bc738eSAdrian Chadd 3543f1bc738eSAdrian Chadd /* 3544f1bc738eSAdrian Chadd * A busy buffer can't be added to the retry list. 3545f1bc738eSAdrian Chadd * It needs to be cloned. 3546f1bc738eSAdrian Chadd */ 3547f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3548f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3549f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3550f1bc738eSAdrian Chadd "%s: busy buffer clone: %p -> %p\n", 3551f1bc738eSAdrian Chadd __func__, bf, nbf); 3552f1bc738eSAdrian Chadd } else { 3553f1bc738eSAdrian Chadd nbf = bf; 3554f1bc738eSAdrian Chadd } 3555f1bc738eSAdrian Chadd 3556f1bc738eSAdrian Chadd if (nbf == NULL) { 3557f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3558f1bc738eSAdrian Chadd "%s: busy buffer couldn't be cloned (%p)!\n", 3559f1bc738eSAdrian Chadd __func__, bf); 35601f737306SAdrian Chadd retval = 1; /* error */ 3561f1bc738eSAdrian Chadd } else { 3562f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 35631f737306SAdrian Chadd retval = 0; /* ok */ 3564f1bc738eSAdrian Chadd } 35651f737306SAdrian Chadd finish: 3566f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3567f1bc738eSAdrian Chadd 3568f1bc738eSAdrian Chadd return (retval); 3569f1bc738eSAdrian Chadd } 3570f1bc738eSAdrian Chadd 3571f1bc738eSAdrian Chadd static void 3572f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid, 3573f1bc738eSAdrian Chadd struct ath_buf *bf_first, ath_bufhead *bf_q) 3574f1bc738eSAdrian Chadd { 3575f1bc738eSAdrian Chadd struct ath_buf *bf, *bf_next, *nbf; 3576f1bc738eSAdrian Chadd 3577375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3578f1bc738eSAdrian Chadd 3579f1bc738eSAdrian Chadd bf = bf_first; 3580f1bc738eSAdrian Chadd while (bf) { 3581f1bc738eSAdrian Chadd bf_next = bf->bf_next; 3582f1bc738eSAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 3583f1bc738eSAdrian Chadd 3584f1bc738eSAdrian Chadd /* 3585f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3586f1bc738eSAdrian Chadd */ 3587f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 35880eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3589f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 359042fdd8e7SAdrian Chadd "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n", 3591f1bc738eSAdrian Chadd __func__, 359242fdd8e7SAdrian Chadd tid->tid, 3593f1bc738eSAdrian Chadd bf, 359442fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 3595f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3596f1bc738eSAdrian Chadd goto next; 3597f1bc738eSAdrian Chadd } 3598f1bc738eSAdrian Chadd 3599f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3600f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3601f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 360242fdd8e7SAdrian Chadd "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n", 360342fdd8e7SAdrian Chadd __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno)); 3604f1bc738eSAdrian Chadd } else { 3605f1bc738eSAdrian Chadd nbf = bf; 3606f1bc738eSAdrian Chadd } 3607f1bc738eSAdrian Chadd 3608f1bc738eSAdrian Chadd /* 3609f1bc738eSAdrian Chadd * If the buffer couldn't be cloned, add it to bf_q; 3610f1bc738eSAdrian Chadd * the caller will free the buffer(s) as required. 3611f1bc738eSAdrian Chadd */ 3612f1bc738eSAdrian Chadd if (nbf == NULL) { 3613f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 361442fdd8e7SAdrian Chadd "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n", 361542fdd8e7SAdrian Chadd __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno)); 3616f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3617f1bc738eSAdrian Chadd } else { 3618f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3619f1bc738eSAdrian Chadd } 3620f1bc738eSAdrian Chadd next: 3621f1bc738eSAdrian Chadd bf = bf_next; 3622f1bc738eSAdrian Chadd } 3623f1bc738eSAdrian Chadd 3624f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3625f1bc738eSAdrian Chadd } 3626f1bc738eSAdrian Chadd 3627f1bc738eSAdrian Chadd /* 362888b3d483SAdrian Chadd * Suspend the queue because we need to TX a BAR. 362988b3d483SAdrian Chadd */ 363088b3d483SAdrian Chadd static void 363188b3d483SAdrian Chadd ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid) 363288b3d483SAdrian Chadd { 3633375307d4SAdrian Chadd 3634375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 363588b3d483SAdrian Chadd 36360e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36376d07d3e0SAdrian Chadd "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n", 363888b3d483SAdrian Chadd __func__, 36396d07d3e0SAdrian Chadd tid->tid, 3640e60c4fc2SAdrian Chadd tid->bar_wait, 3641e60c4fc2SAdrian Chadd tid->bar_tx); 364288b3d483SAdrian Chadd 364388b3d483SAdrian Chadd /* We shouldn't be called when bar_tx is 1 */ 364488b3d483SAdrian Chadd if (tid->bar_tx) { 364583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 364683bbd5ebSRui Paulo "%s: bar_tx is 1?!\n", __func__); 364788b3d483SAdrian Chadd } 364888b3d483SAdrian Chadd 364988b3d483SAdrian Chadd /* If we've already been called, just be patient. */ 365088b3d483SAdrian Chadd if (tid->bar_wait) 365188b3d483SAdrian Chadd return; 365288b3d483SAdrian Chadd 365388b3d483SAdrian Chadd /* Wait! */ 365488b3d483SAdrian Chadd tid->bar_wait = 1; 365588b3d483SAdrian Chadd 365688b3d483SAdrian Chadd /* Only one pause, no matter how many frames fail */ 365788b3d483SAdrian Chadd ath_tx_tid_pause(sc, tid); 365888b3d483SAdrian Chadd } 365988b3d483SAdrian Chadd 366088b3d483SAdrian Chadd /* 366188b3d483SAdrian Chadd * We've finished with BAR handling - either we succeeded or 366288b3d483SAdrian Chadd * failed. Either way, unsuspend TX. 366388b3d483SAdrian Chadd */ 366488b3d483SAdrian Chadd static void 366588b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid) 366688b3d483SAdrian Chadd { 3667375307d4SAdrian Chadd 3668375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 366988b3d483SAdrian Chadd 36700e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36716d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 367288b3d483SAdrian Chadd __func__, 36739b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36749b48fb4bSAdrian Chadd ":", 36756d07d3e0SAdrian Chadd tid->tid); 367688b3d483SAdrian Chadd 367788b3d483SAdrian Chadd if (tid->bar_tx == 0 || tid->bar_wait == 0) { 367883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36796d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 368083bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 368183bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait); 368288b3d483SAdrian Chadd } 368388b3d483SAdrian Chadd 368488b3d483SAdrian Chadd tid->bar_tx = tid->bar_wait = 0; 368588b3d483SAdrian Chadd ath_tx_tid_resume(sc, tid); 368688b3d483SAdrian Chadd } 368788b3d483SAdrian Chadd 368888b3d483SAdrian Chadd /* 368988b3d483SAdrian Chadd * Return whether we're ready to TX a BAR frame. 369088b3d483SAdrian Chadd * 369188b3d483SAdrian Chadd * Requires the TID lock be held. 369288b3d483SAdrian Chadd */ 369388b3d483SAdrian Chadd static int 369488b3d483SAdrian Chadd ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid) 369588b3d483SAdrian Chadd { 369688b3d483SAdrian Chadd 3697375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 369888b3d483SAdrian Chadd 369988b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->hwq_depth > 0) 370088b3d483SAdrian Chadd return (0); 370188b3d483SAdrian Chadd 37029b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 37036d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar ready\n", 37049b48fb4bSAdrian Chadd __func__, 37059b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 37069b48fb4bSAdrian Chadd ":", 37076d07d3e0SAdrian Chadd tid->tid); 37080e22ed0eSAdrian Chadd 370988b3d483SAdrian Chadd return (1); 371088b3d483SAdrian Chadd } 371188b3d483SAdrian Chadd 371288b3d483SAdrian Chadd /* 371388b3d483SAdrian Chadd * Check whether the current TID is ready to have a BAR 371488b3d483SAdrian Chadd * TXed and if so, do the TX. 371588b3d483SAdrian Chadd * 371688b3d483SAdrian Chadd * Since the TID/TXQ lock can't be held during a call to 371788b3d483SAdrian Chadd * ieee80211_send_bar(), we have to do the dirty thing of unlocking it, 371888b3d483SAdrian Chadd * sending the BAR and locking it again. 371988b3d483SAdrian Chadd * 372088b3d483SAdrian Chadd * Eventually, the code to send the BAR should be broken out 372188b3d483SAdrian Chadd * from this routine so the lock doesn't have to be reacquired 372288b3d483SAdrian Chadd * just to be immediately dropped by the caller. 372388b3d483SAdrian Chadd */ 372488b3d483SAdrian Chadd static void 372588b3d483SAdrian Chadd ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid) 372688b3d483SAdrian Chadd { 372788b3d483SAdrian Chadd struct ieee80211_tx_ampdu *tap; 372888b3d483SAdrian Chadd 3729375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 373088b3d483SAdrian Chadd 37310e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 37326d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 373388b3d483SAdrian Chadd __func__, 37349b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 37359b48fb4bSAdrian Chadd ":", 37366d07d3e0SAdrian Chadd tid->tid); 373788b3d483SAdrian Chadd 373888b3d483SAdrian Chadd tap = ath_tx_get_tx_tid(tid->an, tid->tid); 373988b3d483SAdrian Chadd 374088b3d483SAdrian Chadd /* 374188b3d483SAdrian Chadd * This is an error condition! 374288b3d483SAdrian Chadd */ 374388b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->bar_tx == 1) { 374483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 37456d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 374683bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 374783bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait); 374888b3d483SAdrian Chadd return; 374988b3d483SAdrian Chadd } 375088b3d483SAdrian Chadd 375188b3d483SAdrian Chadd /* Don't do anything if we still have pending frames */ 375288b3d483SAdrian Chadd if (tid->hwq_depth > 0) { 37530e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 37546d07d3e0SAdrian Chadd "%s: %6D: TID=%d, hwq_depth=%d, waiting\n", 375588b3d483SAdrian Chadd __func__, 37569b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 37579b48fb4bSAdrian Chadd ":", 37586d07d3e0SAdrian Chadd tid->tid, 375988b3d483SAdrian Chadd tid->hwq_depth); 376088b3d483SAdrian Chadd return; 376188b3d483SAdrian Chadd } 376288b3d483SAdrian Chadd 376388b3d483SAdrian Chadd /* We're now about to TX */ 376488b3d483SAdrian Chadd tid->bar_tx = 1; 376588b3d483SAdrian Chadd 376688b3d483SAdrian Chadd /* 37674e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame, 37684e81f27cSAdrian Chadd * just to get the ball rolling. 37694e81f27cSAdrian Chadd */ 37704f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 37714e81f27cSAdrian Chadd 37724e81f27cSAdrian Chadd /* 377388b3d483SAdrian Chadd * Calculate new BAW left edge, now that all frames have either 377488b3d483SAdrian Chadd * succeeded or failed. 377588b3d483SAdrian Chadd * 377688b3d483SAdrian Chadd * XXX verify this is _actually_ the valid value to begin at! 377788b3d483SAdrian Chadd */ 37780e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 37796d07d3e0SAdrian Chadd "%s: %6D: TID=%d, new BAW left edge=%d\n", 378088b3d483SAdrian Chadd __func__, 37819b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 37829b48fb4bSAdrian Chadd ":", 37836d07d3e0SAdrian Chadd tid->tid, 378488b3d483SAdrian Chadd tap->txa_start); 378588b3d483SAdrian Chadd 378688b3d483SAdrian Chadd /* Try sending the BAR frame */ 378788b3d483SAdrian Chadd /* We can't hold the lock here! */ 378888b3d483SAdrian Chadd 3789375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 379088b3d483SAdrian Chadd if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) { 379188b3d483SAdrian Chadd /* Success? Now we wait for notification that it's done */ 3792375307d4SAdrian Chadd ATH_TX_LOCK(sc); 379388b3d483SAdrian Chadd return; 379488b3d483SAdrian Chadd } 379588b3d483SAdrian Chadd 379688b3d483SAdrian Chadd /* Failure? For now, warn loudly and continue */ 3797375307d4SAdrian Chadd ATH_TX_LOCK(sc); 379883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 37996d07d3e0SAdrian Chadd "%s: %6D: TID=%d, failed to TX BAR, continue!\n", 380083bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 38016d07d3e0SAdrian Chadd tid->tid); 380288b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, tid); 380388b3d483SAdrian Chadd } 380488b3d483SAdrian Chadd 3805eb6f0de0SAdrian Chadd static void 3806f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an, 3807f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf) 3808eb6f0de0SAdrian Chadd { 3809eb6f0de0SAdrian Chadd 3810375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3811eb6f0de0SAdrian Chadd 3812eb6f0de0SAdrian Chadd /* 3813eb6f0de0SAdrian Chadd * If the current TID is running AMPDU, update 3814eb6f0de0SAdrian Chadd * the BAW. 3815eb6f0de0SAdrian Chadd */ 3816eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid) && 3817eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw) { 3818eb6f0de0SAdrian Chadd /* 3819eb6f0de0SAdrian Chadd * Only remove the frame from the BAW if it's 3820eb6f0de0SAdrian Chadd * been transmitted at least once; this means 3821eb6f0de0SAdrian Chadd * the frame was in the BAW to begin with. 3822eb6f0de0SAdrian Chadd */ 3823eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries > 0) { 3824eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, tid, bf); 3825eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 3826eb6f0de0SAdrian Chadd } 3827ce597531SAdrian Chadd #if 0 3828eb6f0de0SAdrian Chadd /* 3829eb6f0de0SAdrian Chadd * This has become a non-fatal error now 3830eb6f0de0SAdrian Chadd */ 3831eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 383283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW 3833eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 3834eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 3835ce597531SAdrian Chadd #endif 3836eb6f0de0SAdrian Chadd } 3837b837332dSAdrian Chadd 3838b837332dSAdrian Chadd /* Strip it out of an aggregate list if it was in one */ 3839b837332dSAdrian Chadd bf->bf_next = NULL; 3840b837332dSAdrian Chadd 3841b837332dSAdrian Chadd /* Insert on the free queue to be freed by the caller */ 3842eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 3843eb6f0de0SAdrian Chadd } 3844eb6f0de0SAdrian Chadd 3845f1bc738eSAdrian Chadd static void 3846f1bc738eSAdrian Chadd ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an, 384703682514SAdrian Chadd const char *pfx, struct ath_tid *tid, struct ath_buf *bf) 3848f1bc738eSAdrian Chadd { 3849f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 385083bbd5ebSRui Paulo struct ath_txq *txq; 3851f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3852f1bc738eSAdrian Chadd 385383bbd5ebSRui Paulo txq = sc->sc_ac2q[tid->ac]; 3854f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3855f1bc738eSAdrian Chadd 38566fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3857272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, " 3858f1bc738eSAdrian Chadd "seqno=%d, retry=%d\n", 3859272a8ab6SAdrian Chadd __func__, 3860272a8ab6SAdrian Chadd pfx, 3861272a8ab6SAdrian Chadd ni->ni_macaddr, 3862272a8ab6SAdrian Chadd ":", 3863272a8ab6SAdrian Chadd bf, 3864f1bc738eSAdrian Chadd bf->bf_state.bfs_addedbaw, 3865f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw, 3866f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno), 3867f1bc738eSAdrian Chadd bf->bf_state.bfs_retries); 38686fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3869272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n", 3870272a8ab6SAdrian Chadd __func__, 3871272a8ab6SAdrian Chadd pfx, 3872272a8ab6SAdrian Chadd ni->ni_macaddr, 3873272a8ab6SAdrian Chadd ":", 3874272a8ab6SAdrian Chadd bf, 387503682514SAdrian Chadd txq->axq_qnum, 38764e81f27cSAdrian Chadd txq->axq_depth, 38774e81f27cSAdrian Chadd txq->axq_aggr_depth); 38786fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3879272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, " 3880272a8ab6SAdrian Chadd "isfiltered=%d\n", 3881272a8ab6SAdrian Chadd __func__, 3882272a8ab6SAdrian Chadd pfx, 3883272a8ab6SAdrian Chadd ni->ni_macaddr, 3884272a8ab6SAdrian Chadd ":", 3885272a8ab6SAdrian Chadd bf, 3886f1bc738eSAdrian Chadd tid->axq_depth, 3887f1bc738eSAdrian Chadd tid->hwq_depth, 3888f1bc738eSAdrian Chadd tid->bar_wait, 3889f1bc738eSAdrian Chadd tid->isfiltered); 38906fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3891272a8ab6SAdrian Chadd "%s: %s: %6D: tid %d: " 38924e81f27cSAdrian Chadd "sched=%d, paused=%d, " 38934e81f27cSAdrian Chadd "incomp=%d, baw_head=%d, " 3894f1bc738eSAdrian Chadd "baw_tail=%d txa_start=%d, ni_txseqs=%d\n", 3895272a8ab6SAdrian Chadd __func__, 3896272a8ab6SAdrian Chadd pfx, 3897272a8ab6SAdrian Chadd ni->ni_macaddr, 3898272a8ab6SAdrian Chadd ":", 3899272a8ab6SAdrian Chadd tid->tid, 39004e81f27cSAdrian Chadd tid->sched, tid->paused, 39014e81f27cSAdrian Chadd tid->incomp, tid->baw_head, 3902f1bc738eSAdrian Chadd tid->baw_tail, tap == NULL ? -1 : tap->txa_start, 3903f1bc738eSAdrian Chadd ni->ni_txseqs[tid->tid]); 3904f1bc738eSAdrian Chadd 3905f1bc738eSAdrian Chadd /* XXX Dump the frame, see what it is? */ 3906a2be2710SRui Paulo if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 3907f1bc738eSAdrian Chadd ieee80211_dump_pkt(ni->ni_ic, 3908f1bc738eSAdrian Chadd mtod(bf->bf_m, const uint8_t *), 3909f1bc738eSAdrian Chadd bf->bf_m->m_len, 0, -1); 3910f1bc738eSAdrian Chadd } 3911f1bc738eSAdrian Chadd 3912f1bc738eSAdrian Chadd /* 3913f1bc738eSAdrian Chadd * Free any packets currently pending in the software TX queue. 3914f1bc738eSAdrian Chadd * 3915f1bc738eSAdrian Chadd * This will be called when a node is being deleted. 3916f1bc738eSAdrian Chadd * 3917f1bc738eSAdrian Chadd * It can also be called on an active node during an interface 3918f1bc738eSAdrian Chadd * reset or state transition. 3919f1bc738eSAdrian Chadd * 3920f1bc738eSAdrian Chadd * (From Linux/reference): 3921f1bc738eSAdrian Chadd * 3922f1bc738eSAdrian Chadd * TODO: For frame(s) that are in the retry state, we will reuse the 3923f1bc738eSAdrian Chadd * sequence number(s) without setting the retry bit. The 3924f1bc738eSAdrian Chadd * alternative is to give up on these and BAR the receiver's window 3925f1bc738eSAdrian Chadd * forward. 3926f1bc738eSAdrian Chadd */ 3927f1bc738eSAdrian Chadd static void 3928f1bc738eSAdrian Chadd ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an, 3929f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq) 3930f1bc738eSAdrian Chadd { 3931f1bc738eSAdrian Chadd struct ath_buf *bf; 3932f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3933f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 3934f1bc738eSAdrian Chadd int t; 3935f1bc738eSAdrian Chadd 3936f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3937f1bc738eSAdrian Chadd 3938375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3939f1bc738eSAdrian Chadd 3940f1bc738eSAdrian Chadd /* Walk the queue, free frames */ 3941f1bc738eSAdrian Chadd t = 0; 3942f1bc738eSAdrian Chadd for (;;) { 39433e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 3944f1bc738eSAdrian Chadd if (bf == NULL) { 3945f1bc738eSAdrian Chadd break; 3946f1bc738eSAdrian Chadd } 3947f1bc738eSAdrian Chadd 3948f1bc738eSAdrian Chadd if (t == 0) { 394903682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "norm", tid, bf); 39506fc621c2SAdrian Chadd // t = 1; 3951f1bc738eSAdrian Chadd } 3952f1bc738eSAdrian Chadd 39533e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 3954f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3955f1bc738eSAdrian Chadd } 3956f1bc738eSAdrian Chadd 3957f1bc738eSAdrian Chadd /* And now, drain the filtered frame queue */ 3958f1bc738eSAdrian Chadd t = 0; 3959f1bc738eSAdrian Chadd for (;;) { 396013aa9ee5SAdrian Chadd bf = ATH_TID_FILT_FIRST(tid); 3961f1bc738eSAdrian Chadd if (bf == NULL) 3962f1bc738eSAdrian Chadd break; 3963f1bc738eSAdrian Chadd 3964f1bc738eSAdrian Chadd if (t == 0) { 396503682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "filt", tid, bf); 39666fc621c2SAdrian Chadd // t = 1; 3967f1bc738eSAdrian Chadd } 3968f1bc738eSAdrian Chadd 396913aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3970f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3971f1bc738eSAdrian Chadd } 3972f1bc738eSAdrian Chadd 3973eb6f0de0SAdrian Chadd /* 39744e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame 39754e81f27cSAdrian Chadd * in case there is some future transmission, just to get 39764e81f27cSAdrian Chadd * the ball rolling. 39774e81f27cSAdrian Chadd * 39784e81f27cSAdrian Chadd * This won't hurt things if the TID is about to be freed. 39794e81f27cSAdrian Chadd */ 39804f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 39814e81f27cSAdrian Chadd 39824e81f27cSAdrian Chadd /* 3983eb6f0de0SAdrian Chadd * Now that it's completed, grab the TID lock and update 3984eb6f0de0SAdrian Chadd * the sequence number and BAW window. 3985eb6f0de0SAdrian Chadd * Because sequence numbers have been assigned to frames 3986eb6f0de0SAdrian Chadd * that haven't been sent yet, it's entirely possible 3987eb6f0de0SAdrian Chadd * we'll be called with some pending frames that have not 3988eb6f0de0SAdrian Chadd * been transmitted. 3989eb6f0de0SAdrian Chadd * 3990eb6f0de0SAdrian Chadd * The cleaner solution is to do the sequence number allocation 3991eb6f0de0SAdrian Chadd * when the packet is first transmitted - and thus the "retries" 3992eb6f0de0SAdrian Chadd * check above would be enough to update the BAW/seqno. 3993eb6f0de0SAdrian Chadd */ 3994eb6f0de0SAdrian Chadd 3995eb6f0de0SAdrian Chadd /* But don't do it for non-QoS TIDs */ 3996eb6f0de0SAdrian Chadd if (tap) { 39979b48fb4bSAdrian Chadd #if 1 3998eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 39999b48fb4bSAdrian Chadd "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n", 40009b48fb4bSAdrian Chadd __func__, 40019b48fb4bSAdrian Chadd ni->ni_macaddr, 40029b48fb4bSAdrian Chadd ":", 40039b48fb4bSAdrian Chadd an, 40049b48fb4bSAdrian Chadd tid->tid, 40059b48fb4bSAdrian Chadd tap->txa_start); 4006eb6f0de0SAdrian Chadd #endif 4007eb6f0de0SAdrian Chadd ni->ni_txseqs[tid->tid] = tap->txa_start; 4008eb6f0de0SAdrian Chadd tid->baw_tail = tid->baw_head; 4009eb6f0de0SAdrian Chadd } 4010eb6f0de0SAdrian Chadd } 4011eb6f0de0SAdrian Chadd 4012eb6f0de0SAdrian Chadd /* 401322780332SAdrian Chadd * Reset the TID state. This must be only called once the node has 401422780332SAdrian Chadd * had its frames flushed from this TID, to ensure that no other 401522780332SAdrian Chadd * pause / unpause logic can kick in. 401622780332SAdrian Chadd */ 401722780332SAdrian Chadd static void 401822780332SAdrian Chadd ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid) 401922780332SAdrian Chadd { 402022780332SAdrian Chadd 402122780332SAdrian Chadd #if 0 402222780332SAdrian Chadd tid->bar_wait = tid->bar_tx = tid->isfiltered = 0; 402322780332SAdrian Chadd tid->paused = tid->sched = tid->addba_tx_pending = 0; 402422780332SAdrian Chadd tid->incomp = tid->cleanup_inprogress = 0; 402522780332SAdrian Chadd #endif 402622780332SAdrian Chadd 402722780332SAdrian Chadd /* 402822780332SAdrian Chadd * If we have a bar_wait set, we need to unpause the TID 402922780332SAdrian Chadd * here. Otherwise once cleanup has finished, the TID won't 403022780332SAdrian Chadd * have the right paused counter. 403122780332SAdrian Chadd * 403222780332SAdrian Chadd * XXX I'm not going through resume here - I don't want the 403322780332SAdrian Chadd * node to be rescheuled just yet. This however should be 403422780332SAdrian Chadd * methodized! 403522780332SAdrian Chadd */ 403622780332SAdrian Chadd if (tid->bar_wait) { 403722780332SAdrian Chadd if (tid->paused > 0) { 403822780332SAdrian Chadd tid->paused --; 403922780332SAdrian Chadd } 404022780332SAdrian Chadd } 404122780332SAdrian Chadd 404222780332SAdrian Chadd /* 404322780332SAdrian Chadd * XXX same with a currently filtered TID. 404422780332SAdrian Chadd * 404522780332SAdrian Chadd * Since this is being called during a flush, we assume that 404622780332SAdrian Chadd * the filtered frame list is actually empty. 404722780332SAdrian Chadd * 404822780332SAdrian Chadd * XXX TODO: add in a check to ensure that the filtered queue 404922780332SAdrian Chadd * depth is actually 0! 405022780332SAdrian Chadd */ 405122780332SAdrian Chadd if (tid->isfiltered) { 405222780332SAdrian Chadd if (tid->paused > 0) { 405322780332SAdrian Chadd tid->paused --; 405422780332SAdrian Chadd } 405522780332SAdrian Chadd } 405622780332SAdrian Chadd 405722780332SAdrian Chadd /* 405822780332SAdrian Chadd * Clear BAR, filtered frames, scheduled and ADDBA pending. 405922780332SAdrian Chadd * The TID may be going through cleanup from the last association 406022780332SAdrian Chadd * where things in the BAW are still in the hardware queue. 406122780332SAdrian Chadd */ 406222780332SAdrian Chadd tid->bar_wait = 0; 406322780332SAdrian Chadd tid->bar_tx = 0; 406422780332SAdrian Chadd tid->isfiltered = 0; 406522780332SAdrian Chadd tid->sched = 0; 406622780332SAdrian Chadd tid->addba_tx_pending = 0; 406722780332SAdrian Chadd 406822780332SAdrian Chadd /* 406922780332SAdrian Chadd * XXX TODO: it may just be enough to walk the HWQs and mark 407022780332SAdrian Chadd * frames for that node as non-aggregate; or mark the ath_node 407122780332SAdrian Chadd * with something that indicates that aggregation is no longer 4072f6b6084bSPedro F. Giffuni * occurring. Then we can just toss the BAW complaints and 407322780332SAdrian Chadd * do a complete hard reset of state here - no pause, no 407422780332SAdrian Chadd * complete counter, etc. 407522780332SAdrian Chadd */ 407622a3aee6SAdrian Chadd 407722780332SAdrian Chadd } 407822780332SAdrian Chadd 407922780332SAdrian Chadd /* 4080eb6f0de0SAdrian Chadd * Flush all software queued packets for the given node. 4081eb6f0de0SAdrian Chadd * 4082eb6f0de0SAdrian Chadd * This occurs when a completion handler frees the last buffer 4083eb6f0de0SAdrian Chadd * for a node, and the node is thus freed. This causes the node 4084eb6f0de0SAdrian Chadd * to be cleaned up, which ends up calling ath_tx_node_flush. 4085eb6f0de0SAdrian Chadd */ 4086eb6f0de0SAdrian Chadd void 4087eb6f0de0SAdrian Chadd ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an) 4088eb6f0de0SAdrian Chadd { 4089eb6f0de0SAdrian Chadd int tid; 4090eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4091eb6f0de0SAdrian Chadd struct ath_buf *bf; 4092eb6f0de0SAdrian Chadd 4093eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4094eb6f0de0SAdrian Chadd 409503682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p", 409603682514SAdrian Chadd &an->an_node); 409703682514SAdrian Chadd 4098375307d4SAdrian Chadd ATH_TX_LOCK(sc); 40999b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 41009b48fb4bSAdrian Chadd "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, " 410122a3aee6SAdrian Chadd "swq_depth=%d, clrdmask=%d, leak_count=%d\n", 41029b48fb4bSAdrian Chadd __func__, 41039b48fb4bSAdrian Chadd an->an_node.ni_macaddr, 41049b48fb4bSAdrian Chadd ":", 41059b48fb4bSAdrian Chadd an->an_is_powersave, 41069b48fb4bSAdrian Chadd an->an_stack_psq, 41079b48fb4bSAdrian Chadd an->an_tim_set, 41089b48fb4bSAdrian Chadd an->an_swq_depth, 410922a3aee6SAdrian Chadd an->clrdmask, 411022a3aee6SAdrian Chadd an->an_leak_count); 41119b48fb4bSAdrian Chadd 4112eb6f0de0SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 4113eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4114eb6f0de0SAdrian Chadd 4115eb6f0de0SAdrian Chadd /* Free packets */ 4116eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, an, atid, &bf_cq); 411722a3aee6SAdrian Chadd 411823f44d2bSAdrian Chadd /* Remove this tid from the list of active tids */ 411923f44d2bSAdrian Chadd ath_tx_tid_unsched(sc, atid); 412022a3aee6SAdrian Chadd 412122780332SAdrian Chadd /* Reset the per-TID pause, BAR, etc state */ 412222780332SAdrian Chadd ath_tx_tid_reset(sc, atid); 4123eb6f0de0SAdrian Chadd } 412422a3aee6SAdrian Chadd 412522a3aee6SAdrian Chadd /* 412622a3aee6SAdrian Chadd * Clear global leak count 412722a3aee6SAdrian Chadd */ 412822a3aee6SAdrian Chadd an->an_leak_count = 0; 4129375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4130eb6f0de0SAdrian Chadd 4131eb6f0de0SAdrian Chadd /* Handle completed frames */ 4132eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4133eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4134eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4135eb6f0de0SAdrian Chadd } 4136eb6f0de0SAdrian Chadd } 4137eb6f0de0SAdrian Chadd 4138eb6f0de0SAdrian Chadd /* 4139eb6f0de0SAdrian Chadd * Drain all the software TXQs currently with traffic queued. 4140eb6f0de0SAdrian Chadd */ 4141eb6f0de0SAdrian Chadd void 4142eb6f0de0SAdrian Chadd ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq) 4143eb6f0de0SAdrian Chadd { 4144eb6f0de0SAdrian Chadd struct ath_tid *tid; 4145eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4146eb6f0de0SAdrian Chadd struct ath_buf *bf; 4147eb6f0de0SAdrian Chadd 4148eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4149375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4150eb6f0de0SAdrian Chadd 4151eb6f0de0SAdrian Chadd /* 4152eb6f0de0SAdrian Chadd * Iterate over all active tids for the given txq, 4153eb6f0de0SAdrian Chadd * flushing and unsched'ing them 4154eb6f0de0SAdrian Chadd */ 4155eb6f0de0SAdrian Chadd while (! TAILQ_EMPTY(&txq->axq_tidq)) { 4156eb6f0de0SAdrian Chadd tid = TAILQ_FIRST(&txq->axq_tidq); 4157eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, tid->an, tid, &bf_cq); 4158eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 4159eb6f0de0SAdrian Chadd } 4160eb6f0de0SAdrian Chadd 4161375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4162eb6f0de0SAdrian Chadd 4163eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4164eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4165eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4166eb6f0de0SAdrian Chadd } 4167eb6f0de0SAdrian Chadd } 4168eb6f0de0SAdrian Chadd 4169eb6f0de0SAdrian Chadd /* 4170eb6f0de0SAdrian Chadd * Handle completion of non-aggregate session frames. 41710c54de88SAdrian Chadd * 41720c54de88SAdrian Chadd * This (currently) doesn't implement software retransmission of 41730c54de88SAdrian Chadd * non-aggregate frames! 41740c54de88SAdrian Chadd * 41750c54de88SAdrian Chadd * Software retransmission of non-aggregate frames needs to obey 41760c54de88SAdrian Chadd * the strict sequence number ordering, and drop any frames that 41770c54de88SAdrian Chadd * will fail this. 41780c54de88SAdrian Chadd * 41790c54de88SAdrian Chadd * For now, filtered frames and frame transmission will cause 41800c54de88SAdrian Chadd * all kinds of issues. So we don't support them. 41810c54de88SAdrian Chadd * 41820c54de88SAdrian Chadd * So anyone queuing frames via ath_tx_normal_xmit() or 41830c54de88SAdrian Chadd * ath_tx_hw_queue_norm() must override and set CLRDMASK. 4184eb6f0de0SAdrian Chadd */ 4185eb6f0de0SAdrian Chadd void 4186eb6f0de0SAdrian Chadd ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 4187eb6f0de0SAdrian Chadd { 4188eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4189eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4190eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4191eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4192eb6f0de0SAdrian Chadd struct ath_tx_status *ts = &bf->bf_status.ds_txstat; 4193eb6f0de0SAdrian Chadd 4194eb6f0de0SAdrian Chadd /* The TID state is protected behind the TXQ lock */ 4195375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4196eb6f0de0SAdrian Chadd 4197eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n", 4198eb6f0de0SAdrian Chadd __func__, bf, fail, atid->hwq_depth - 1); 4199eb6f0de0SAdrian Chadd 4200eb6f0de0SAdrian Chadd atid->hwq_depth--; 4201f1bc738eSAdrian Chadd 42020c54de88SAdrian Chadd #if 0 42030c54de88SAdrian Chadd /* 42040c54de88SAdrian Chadd * If the frame was filtered, stick it on the filter frame 42050c54de88SAdrian Chadd * queue and complain about it. It shouldn't happen! 42060c54de88SAdrian Chadd */ 42070c54de88SAdrian Chadd if ((ts->ts_status & HAL_TXERR_FILT) || 42080c54de88SAdrian Chadd (ts->ts_status != 0 && atid->isfiltered)) { 420983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 42100c54de88SAdrian Chadd "%s: isfiltered=%d, ts_status=%d: huh?\n", 42110c54de88SAdrian Chadd __func__, 42120c54de88SAdrian Chadd atid->isfiltered, 42130c54de88SAdrian Chadd ts->ts_status); 42140c54de88SAdrian Chadd ath_tx_tid_filt_comp_buf(sc, atid, bf); 42150c54de88SAdrian Chadd } 42160c54de88SAdrian Chadd #endif 4217f1bc738eSAdrian Chadd if (atid->isfiltered) 421883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__); 4219eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 422083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 4221eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4222f1bc738eSAdrian Chadd 4223f172ef75SAdrian Chadd /* If the TID is being cleaned up, track things */ 4224f172ef75SAdrian Chadd /* XXX refactor! */ 4225f172ef75SAdrian Chadd if (atid->cleanup_inprogress) { 4226f172ef75SAdrian Chadd atid->incomp--; 4227f172ef75SAdrian Chadd if (atid->incomp == 0) { 4228f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4229f172ef75SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4230f172ef75SAdrian Chadd __func__, tid); 4231f172ef75SAdrian Chadd atid->cleanup_inprogress = 0; 4232f172ef75SAdrian Chadd ath_tx_tid_resume(sc, atid); 4233f172ef75SAdrian Chadd } 4234f172ef75SAdrian Chadd } 4235f172ef75SAdrian Chadd 4236f1bc738eSAdrian Chadd /* 4237f1bc738eSAdrian Chadd * If the queue is filtered, potentially mark it as complete 4238f1bc738eSAdrian Chadd * and reschedule it as needed. 4239f1bc738eSAdrian Chadd * 4240f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 4241f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 4242f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 4243f1bc738eSAdrian Chadd * (complete or otherwise) frame. 4244f1bc738eSAdrian Chadd * 4245f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 4246f1bc738eSAdrian Chadd */ 4247f1bc738eSAdrian Chadd if (atid->isfiltered) 4248f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4249375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4250eb6f0de0SAdrian Chadd 4251eb6f0de0SAdrian Chadd /* 4252eb6f0de0SAdrian Chadd * punt to rate control if we're not being cleaned up 4253eb6f0de0SAdrian Chadd * during a hw queue drain and the frame wanted an ACK. 4254eb6f0de0SAdrian Chadd */ 4255875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 4256eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 4257eb6f0de0SAdrian Chadd ts, bf->bf_state.bfs_pktlen, 4258eb6f0de0SAdrian Chadd 1, (ts->ts_status == 0) ? 0 : 1); 4259eb6f0de0SAdrian Chadd 4260eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 4261eb6f0de0SAdrian Chadd } 4262eb6f0de0SAdrian Chadd 4263eb6f0de0SAdrian Chadd /* 4264eb6f0de0SAdrian Chadd * Handle cleanup of aggregate session packets that aren't 4265eb6f0de0SAdrian Chadd * an A-MPDU. 4266eb6f0de0SAdrian Chadd * 4267eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4268eb6f0de0SAdrian Chadd * torn down. 4269eb6f0de0SAdrian Chadd */ 4270eb6f0de0SAdrian Chadd static void 4271eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4272eb6f0de0SAdrian Chadd { 4273eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4274eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4275eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4276eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4277eb6f0de0SAdrian Chadd 4278eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n", 4279eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4280eb6f0de0SAdrian Chadd 4281375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4282eb6f0de0SAdrian Chadd atid->incomp--; 4283f172ef75SAdrian Chadd 4284f172ef75SAdrian Chadd /* XXX refactor! */ 4285f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4286f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4287f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 4288f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 4289f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n", 4290f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4291f172ef75SAdrian Chadd } 4292f172ef75SAdrian Chadd 4293eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4294eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4295eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4296eb6f0de0SAdrian Chadd __func__, tid); 4297eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4298eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4299eb6f0de0SAdrian Chadd } 4300375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4301eb6f0de0SAdrian Chadd 4302eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4303eb6f0de0SAdrian Chadd } 4304eb6f0de0SAdrian Chadd 4305f172ef75SAdrian Chadd 4306f172ef75SAdrian Chadd /* 4307f172ef75SAdrian Chadd * This as it currently stands is a bit dumb. Ideally we'd just 4308f172ef75SAdrian Chadd * fail the frame the normal way and have it permanently fail 4309f172ef75SAdrian Chadd * via the normal aggregate completion path. 4310f172ef75SAdrian Chadd */ 4311f172ef75SAdrian Chadd static void 4312f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an, 4313f172ef75SAdrian Chadd int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq) 4314f172ef75SAdrian Chadd { 4315f172ef75SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4316f172ef75SAdrian Chadd struct ath_buf *bf, *bf_next; 4317f172ef75SAdrian Chadd 4318f172ef75SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4319f172ef75SAdrian Chadd 4320f172ef75SAdrian Chadd /* 4321f172ef75SAdrian Chadd * Remove this frame from the queue. 4322f172ef75SAdrian Chadd */ 4323f172ef75SAdrian Chadd ATH_TID_REMOVE(atid, bf_head, bf_list); 4324f172ef75SAdrian Chadd 4325f172ef75SAdrian Chadd /* 4326f172ef75SAdrian Chadd * Loop over all the frames in the aggregate. 4327f172ef75SAdrian Chadd */ 4328f172ef75SAdrian Chadd bf = bf_head; 4329f172ef75SAdrian Chadd while (bf != NULL) { 4330f172ef75SAdrian Chadd bf_next = bf->bf_next; /* next aggregate frame, or NULL */ 4331f172ef75SAdrian Chadd 4332f172ef75SAdrian Chadd /* 4333f172ef75SAdrian Chadd * If it's been added to the BAW we need to kick 4334f172ef75SAdrian Chadd * it out of the BAW before we continue. 4335f172ef75SAdrian Chadd * 4336f172ef75SAdrian Chadd * XXX if it's an aggregate, assert that it's in the 4337f172ef75SAdrian Chadd * BAW - we shouldn't have it be in an aggregate 4338f172ef75SAdrian Chadd * otherwise! 4339f172ef75SAdrian Chadd */ 4340f172ef75SAdrian Chadd if (bf->bf_state.bfs_addedbaw) { 4341f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4342f172ef75SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4343f172ef75SAdrian Chadd } 4344f172ef75SAdrian Chadd 4345f172ef75SAdrian Chadd /* 4346f172ef75SAdrian Chadd * Give it the default completion handler. 4347f172ef75SAdrian Chadd */ 4348f172ef75SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 4349f172ef75SAdrian Chadd bf->bf_next = NULL; 4350f172ef75SAdrian Chadd 4351f172ef75SAdrian Chadd /* 4352f172ef75SAdrian Chadd * Add it to the list to free. 4353f172ef75SAdrian Chadd */ 4354f172ef75SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 4355f172ef75SAdrian Chadd 4356f172ef75SAdrian Chadd /* 4357f172ef75SAdrian Chadd * Now advance to the next frame in the aggregate. 4358f172ef75SAdrian Chadd */ 4359f172ef75SAdrian Chadd bf = bf_next; 4360f172ef75SAdrian Chadd } 4361f172ef75SAdrian Chadd } 4362f172ef75SAdrian Chadd 4363eb6f0de0SAdrian Chadd /* 4364eb6f0de0SAdrian Chadd * Performs transmit side cleanup when TID changes from aggregated to 4365f172ef75SAdrian Chadd * unaggregated and during reassociation. 4366eb6f0de0SAdrian Chadd * 4367f172ef75SAdrian Chadd * For now, this just tosses everything from the TID software queue 4368f172ef75SAdrian Chadd * whether or not it has been retried and marks the TID as 4369f172ef75SAdrian Chadd * pending completion if there's anything for this TID queued to 4370f172ef75SAdrian Chadd * the hardware. 4371eb6f0de0SAdrian Chadd * 43725da3fc10SAdrian Chadd * The caller is responsible for pausing the TID and unpausing the 43735da3fc10SAdrian Chadd * TID if no cleanup was required. Otherwise the cleanup path will 43745da3fc10SAdrian Chadd * unpause the TID once the last hardware queued frame is completed. 4375eb6f0de0SAdrian Chadd */ 4376eb6f0de0SAdrian Chadd static void 437722780332SAdrian Chadd ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid, 437822780332SAdrian Chadd ath_bufhead *bf_cq) 4379eb6f0de0SAdrian Chadd { 4380eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4381eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 438222780332SAdrian Chadd 438322780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4384eb6f0de0SAdrian Chadd 4385d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4386f172ef75SAdrian Chadd "%s: TID %d: called; inprogress=%d\n", __func__, tid, 4387f172ef75SAdrian Chadd atid->cleanup_inprogress); 4388eb6f0de0SAdrian Chadd 4389eb6f0de0SAdrian Chadd /* 4390f1bc738eSAdrian Chadd * Move the filtered frames to the TX queue, before 4391f1bc738eSAdrian Chadd * we run off and discard/process things. 4392f1bc738eSAdrian Chadd */ 4393f172ef75SAdrian Chadd 4394f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 439513aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) { 439613aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(atid, bf, bf_list); 43973e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4398f1bc738eSAdrian Chadd } 4399f1bc738eSAdrian Chadd 4400f1bc738eSAdrian Chadd /* 4401eb6f0de0SAdrian Chadd * Update the frames in the software TX queue: 4402eb6f0de0SAdrian Chadd * 4403eb6f0de0SAdrian Chadd * + Discard retry frames in the queue 4404eb6f0de0SAdrian Chadd * + Fix the completion function to be non-aggregate 4405eb6f0de0SAdrian Chadd */ 44063e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 4407eb6f0de0SAdrian Chadd while (bf) { 4408eb6f0de0SAdrian Chadd /* 4409f172ef75SAdrian Chadd * Grab the next frame in the list, we may 4410f172ef75SAdrian Chadd * be fiddling with the list. 4411eb6f0de0SAdrian Chadd */ 4412f172ef75SAdrian Chadd bf_next = TAILQ_NEXT(bf, bf_list); 4413f172ef75SAdrian Chadd 4414f172ef75SAdrian Chadd /* 4415f172ef75SAdrian Chadd * Free the frame and all subframes. 4416f172ef75SAdrian Chadd */ 4417f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq); 4418f172ef75SAdrian Chadd 4419f172ef75SAdrian Chadd /* 4420f172ef75SAdrian Chadd * Next frame! 4421f172ef75SAdrian Chadd */ 4422eb6f0de0SAdrian Chadd bf = bf_next; 4423eb6f0de0SAdrian Chadd } 4424eb6f0de0SAdrian Chadd 4425eb6f0de0SAdrian Chadd /* 4426f172ef75SAdrian Chadd * If there's anything in the hardware queue we wait 4427f172ef75SAdrian Chadd * for the TID HWQ to empty. 4428eb6f0de0SAdrian Chadd */ 4429f172ef75SAdrian Chadd if (atid->hwq_depth > 0) { 4430f172ef75SAdrian Chadd /* 4431f172ef75SAdrian Chadd * XXX how about we kill atid->incomp, and instead 4432f172ef75SAdrian Chadd * replace it with a macro that checks that atid->hwq_depth 4433f172ef75SAdrian Chadd * is 0? 4434f172ef75SAdrian Chadd */ 4435f172ef75SAdrian Chadd atid->incomp = atid->hwq_depth; 4436eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 1; 4437eb6f0de0SAdrian Chadd } 4438eb6f0de0SAdrian Chadd 4439eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) 4440eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4441eb6f0de0SAdrian Chadd "%s: TID %d: cleanup needed: %d packets\n", 4442eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4443eb6f0de0SAdrian Chadd 444422780332SAdrian Chadd /* Owner now must free completed frames */ 4445eb6f0de0SAdrian Chadd } 4446eb6f0de0SAdrian Chadd 4447eb6f0de0SAdrian Chadd static struct ath_buf * 444838962489SAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 444938962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 4450eb6f0de0SAdrian Chadd { 4451eb6f0de0SAdrian Chadd struct ath_buf *nbf; 4452eb6f0de0SAdrian Chadd int error; 4453eb6f0de0SAdrian Chadd 44543f3a5dbdSAdrian Chadd /* 44553f3a5dbdSAdrian Chadd * Clone the buffer. This will handle the dma unmap and 44563f3a5dbdSAdrian Chadd * copy the node reference to the new buffer. If this 44573f3a5dbdSAdrian Chadd * works out, 'bf' will have no DMA mapping, no mbuf 44583f3a5dbdSAdrian Chadd * pointer and no node reference. 44593f3a5dbdSAdrian Chadd */ 4460eb6f0de0SAdrian Chadd nbf = ath_buf_clone(sc, bf); 4461eb6f0de0SAdrian Chadd 4462eb6f0de0SAdrian Chadd #if 0 446383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n", 4464eb6f0de0SAdrian Chadd __func__); 4465eb6f0de0SAdrian Chadd #endif 4466eb6f0de0SAdrian Chadd 4467eb6f0de0SAdrian Chadd if (nbf == NULL) { 4468eb6f0de0SAdrian Chadd /* Failed to clone */ 446983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 4470eb6f0de0SAdrian Chadd "%s: failed to clone a busy buffer\n", 4471eb6f0de0SAdrian Chadd __func__); 4472eb6f0de0SAdrian Chadd return NULL; 4473eb6f0de0SAdrian Chadd } 4474eb6f0de0SAdrian Chadd 4475eb6f0de0SAdrian Chadd /* Setup the dma for the new buffer */ 4476eb6f0de0SAdrian Chadd error = ath_tx_dmasetup(sc, nbf, nbf->bf_m); 4477eb6f0de0SAdrian Chadd if (error != 0) { 447883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 4479eb6f0de0SAdrian Chadd "%s: failed to setup dma for clone\n", 4480eb6f0de0SAdrian Chadd __func__); 4481eb6f0de0SAdrian Chadd /* 4482eb6f0de0SAdrian Chadd * Put this at the head of the list, not tail; 4483eb6f0de0SAdrian Chadd * that way it doesn't interfere with the 4484eb6f0de0SAdrian Chadd * busy buffer logic (which uses the tail of 4485eb6f0de0SAdrian Chadd * the list.) 4486eb6f0de0SAdrian Chadd */ 4487eb6f0de0SAdrian Chadd ATH_TXBUF_LOCK(sc); 448832c387f7SAdrian Chadd ath_returnbuf_head(sc, nbf); 4489eb6f0de0SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 4490eb6f0de0SAdrian Chadd return NULL; 4491eb6f0de0SAdrian Chadd } 4492eb6f0de0SAdrian Chadd 449338962489SAdrian Chadd /* Update BAW if required, before we free the original buf */ 449438962489SAdrian Chadd if (bf->bf_state.bfs_dobaw) 449538962489SAdrian Chadd ath_tx_switch_baw_buf(sc, an, tid, bf, nbf); 449638962489SAdrian Chadd 44973f3a5dbdSAdrian Chadd /* Free original buffer; return new buffer */ 4498eb6f0de0SAdrian Chadd ath_freebuf(sc, bf); 4499f1bc738eSAdrian Chadd 4500eb6f0de0SAdrian Chadd return nbf; 4501eb6f0de0SAdrian Chadd } 4502eb6f0de0SAdrian Chadd 4503eb6f0de0SAdrian Chadd /* 4504eb6f0de0SAdrian Chadd * Handle retrying an unaggregate frame in an aggregate 4505eb6f0de0SAdrian Chadd * session. 4506eb6f0de0SAdrian Chadd * 4507eb6f0de0SAdrian Chadd * If too many retries occur, pause the TID, wait for 4508eb6f0de0SAdrian Chadd * any further retransmits (as there's no reason why 4509eb6f0de0SAdrian Chadd * non-aggregate frames in an aggregate session are 4510eb6f0de0SAdrian Chadd * transmitted in-order; they just have to be in-BAW) 4511eb6f0de0SAdrian Chadd * and then queue a BAR. 4512eb6f0de0SAdrian Chadd */ 4513eb6f0de0SAdrian Chadd static void 4514eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4515eb6f0de0SAdrian Chadd { 4516eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4517eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4518eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4519eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4520eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4521eb6f0de0SAdrian Chadd 4522375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4523eb6f0de0SAdrian Chadd 4524eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4525eb6f0de0SAdrian Chadd 4526eb6f0de0SAdrian Chadd /* 4527eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4528eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4529eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4530eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4531eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4532eb6f0de0SAdrian Chadd * for us. 4533eb6f0de0SAdrian Chadd */ 4534eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4535eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4536eb6f0de0SAdrian Chadd struct ath_buf *nbf; 453738962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4538eb6f0de0SAdrian Chadd if (nbf) 4539eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4540eb6f0de0SAdrian Chadd bf = nbf; 4541eb6f0de0SAdrian Chadd else 4542eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4543eb6f0de0SAdrian Chadd } 4544eb6f0de0SAdrian Chadd 4545eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4546eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4547eb6f0de0SAdrian Chadd "%s: exceeded retries; seqno %d\n", 4548eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4549eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4550eb6f0de0SAdrian Chadd 4551eb6f0de0SAdrian Chadd /* Update BAW anyway */ 4552eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4553eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4554eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 455583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4556eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4557eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4558eb6f0de0SAdrian Chadd } 4559eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4560eb6f0de0SAdrian Chadd 456188b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 456288b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 456388b3d483SAdrian Chadd 456488b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 456588b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 456688b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 456788b3d483SAdrian Chadd 4568375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4569eb6f0de0SAdrian Chadd 4570eb6f0de0SAdrian Chadd /* Free buffer, bf is free after this call */ 4571eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4572eb6f0de0SAdrian Chadd return; 4573eb6f0de0SAdrian Chadd } 4574eb6f0de0SAdrian Chadd 4575eb6f0de0SAdrian Chadd /* 4576eb6f0de0SAdrian Chadd * This increments the retry counter as well as 4577eb6f0de0SAdrian Chadd * sets the retry flag in the ath_buf and packet 4578eb6f0de0SAdrian Chadd * body. 4579eb6f0de0SAdrian Chadd */ 4580eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4581f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4582eb6f0de0SAdrian Chadd 4583eb6f0de0SAdrian Chadd /* 4584eb6f0de0SAdrian Chadd * Insert this at the head of the queue, so it's 4585eb6f0de0SAdrian Chadd * retried before any current/subsequent frames. 4586eb6f0de0SAdrian Chadd */ 45873e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4588eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 458988b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 459088b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 459188b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4592eb6f0de0SAdrian Chadd 4593375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4594eb6f0de0SAdrian Chadd } 4595eb6f0de0SAdrian Chadd 4596eb6f0de0SAdrian Chadd /* 4597eb6f0de0SAdrian Chadd * Common code for aggregate excessive retry/subframe retry. 4598eb6f0de0SAdrian Chadd * If retrying, queues buffers to bf_q. If not, frees the 4599eb6f0de0SAdrian Chadd * buffers. 4600eb6f0de0SAdrian Chadd * 4601eb6f0de0SAdrian Chadd * XXX should unify this with ath_tx_aggr_retry_unaggr() 4602eb6f0de0SAdrian Chadd */ 4603eb6f0de0SAdrian Chadd static int 4604eb6f0de0SAdrian Chadd ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf, 4605eb6f0de0SAdrian Chadd ath_bufhead *bf_q) 4606eb6f0de0SAdrian Chadd { 4607eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4608eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4609eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4610eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4611eb6f0de0SAdrian Chadd 4612375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4613eb6f0de0SAdrian Chadd 461421840808SAdrian Chadd /* XXX clr11naggr should be done for all subframes */ 4615eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 4616eb6f0de0SAdrian Chadd ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0); 4617f1bc738eSAdrian Chadd 4618eb6f0de0SAdrian Chadd /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */ 4619eb6f0de0SAdrian Chadd 4620eb6f0de0SAdrian Chadd /* 4621eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4622eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4623eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4624eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4625eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4626eb6f0de0SAdrian Chadd * for us. 4627eb6f0de0SAdrian Chadd */ 4628eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4629eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4630eb6f0de0SAdrian Chadd struct ath_buf *nbf; 463138962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4632eb6f0de0SAdrian Chadd if (nbf) 4633eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4634eb6f0de0SAdrian Chadd bf = nbf; 4635eb6f0de0SAdrian Chadd else 4636eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4637eb6f0de0SAdrian Chadd } 4638eb6f0de0SAdrian Chadd 4639eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4640eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4641eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4642eb6f0de0SAdrian Chadd "%s: max retries: seqno %d\n", 4643eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4644eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4645eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 464683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4647eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4648eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4649eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4650eb6f0de0SAdrian Chadd return 1; 4651eb6f0de0SAdrian Chadd } 4652eb6f0de0SAdrian Chadd 4653eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4654f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4655eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Just to make sure */ 4656eb6f0de0SAdrian Chadd 465721840808SAdrian Chadd /* Clear the aggregate state */ 465821840808SAdrian Chadd bf->bf_state.bfs_aggr = 0; 465921840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; /* ??? needed? */ 466021840808SAdrian Chadd bf->bf_state.bfs_nframes = 1; 466121840808SAdrian Chadd 4662eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 4663eb6f0de0SAdrian Chadd return 0; 4664eb6f0de0SAdrian Chadd } 4665eb6f0de0SAdrian Chadd 4666eb6f0de0SAdrian Chadd /* 4667eb6f0de0SAdrian Chadd * error pkt completion for an aggregate destination 4668eb6f0de0SAdrian Chadd */ 4669eb6f0de0SAdrian Chadd static void 4670eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first, 4671eb6f0de0SAdrian Chadd struct ath_tid *tid) 4672eb6f0de0SAdrian Chadd { 4673eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4674eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4675eb6f0de0SAdrian Chadd struct ath_buf *bf_next, *bf; 4676eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4677eb6f0de0SAdrian Chadd int drops = 0; 4678eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4679eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4680eb6f0de0SAdrian Chadd 4681eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 4682eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4683eb6f0de0SAdrian Chadd 4684eb6f0de0SAdrian Chadd /* 4685eb6f0de0SAdrian Chadd * Update rate control - all frames have failed. 4686eb6f0de0SAdrian Chadd * 4687eb6f0de0SAdrian Chadd * XXX use the length in the first frame in the series; 4688eb6f0de0SAdrian Chadd * XXX just so things are consistent for now. 4689eb6f0de0SAdrian Chadd */ 4690eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc, 4691eb6f0de0SAdrian Chadd &bf_first->bf_status.ds_txstat, 4692eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_pktlen, 4693eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes); 4694eb6f0de0SAdrian Chadd 4695375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4696eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 46972d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_failall++; 4698eb6f0de0SAdrian Chadd 4699eb6f0de0SAdrian Chadd /* Retry all subframes */ 4700eb6f0de0SAdrian Chadd bf = bf_first; 4701eb6f0de0SAdrian Chadd while (bf) { 4702eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4703eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 47042d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 4705eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4706eb6f0de0SAdrian Chadd drops++; 4707eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4708eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4709eb6f0de0SAdrian Chadd } 4710eb6f0de0SAdrian Chadd bf = bf_next; 4711eb6f0de0SAdrian Chadd } 4712eb6f0de0SAdrian Chadd 4713eb6f0de0SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 4714eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4715eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 47163e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 4717eb6f0de0SAdrian Chadd } 4718eb6f0de0SAdrian Chadd 471939da9d42SAdrian Chadd /* 472039da9d42SAdrian Chadd * Schedule the TID to be re-tried. 472139da9d42SAdrian Chadd */ 4722eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 4723eb6f0de0SAdrian Chadd 4724eb6f0de0SAdrian Chadd /* 4725eb6f0de0SAdrian Chadd * send bar if we dropped any frames 4726eb6f0de0SAdrian Chadd * 4727eb6f0de0SAdrian Chadd * Keep the txq lock held for now, as we need to ensure 4728eb6f0de0SAdrian Chadd * that ni_txseqs[] is consistent (as it's being updated 4729eb6f0de0SAdrian Chadd * in the ifnet TX context or raw TX context.) 4730eb6f0de0SAdrian Chadd */ 4731eb6f0de0SAdrian Chadd if (drops) { 473288b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 473388b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, tid); 4734eb6f0de0SAdrian Chadd } 4735eb6f0de0SAdrian Chadd 473688b3d483SAdrian Chadd /* 473788b3d483SAdrian Chadd * Send BAR if required 473888b3d483SAdrian Chadd */ 473988b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, tid)) 474088b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, tid); 4741f1bc738eSAdrian Chadd 4742375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 474388b3d483SAdrian Chadd 4744eb6f0de0SAdrian Chadd /* Complete frames which errored out */ 4745eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4746eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4747eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4748eb6f0de0SAdrian Chadd } 4749eb6f0de0SAdrian Chadd } 4750eb6f0de0SAdrian Chadd 4751eb6f0de0SAdrian Chadd /* 4752eb6f0de0SAdrian Chadd * Handle clean-up of packets from an aggregate list. 4753eb6f0de0SAdrian Chadd * 4754eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4755eb6f0de0SAdrian Chadd * torn down. 4756eb6f0de0SAdrian Chadd */ 4757eb6f0de0SAdrian Chadd static void 4758eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first) 4759eb6f0de0SAdrian Chadd { 4760eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4761eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4762eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4763eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4764eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4765eb6f0de0SAdrian Chadd 4766375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4767eb6f0de0SAdrian Chadd 4768eb6f0de0SAdrian Chadd /* update incomp */ 4769f172ef75SAdrian Chadd atid->incomp--; 4770f172ef75SAdrian Chadd 4771f172ef75SAdrian Chadd /* Update the BAW */ 4772302868d9SAdrian Chadd bf = bf_first; 4773eb6f0de0SAdrian Chadd while (bf) { 4774f172ef75SAdrian Chadd /* XXX refactor! */ 4775f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4776f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4777f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 4778f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 4779f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n", 4780f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4781f172ef75SAdrian Chadd } 4782eb6f0de0SAdrian Chadd bf = bf->bf_next; 4783eb6f0de0SAdrian Chadd } 4784eb6f0de0SAdrian Chadd 4785eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4786eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4787eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4788eb6f0de0SAdrian Chadd __func__, tid); 4789eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4790eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4791eb6f0de0SAdrian Chadd } 479288b3d483SAdrian Chadd 479388b3d483SAdrian Chadd /* Send BAR if required */ 4794f1bc738eSAdrian Chadd /* XXX why would we send a BAR when transitioning to non-aggregation? */ 4795302868d9SAdrian Chadd /* 4796302868d9SAdrian Chadd * XXX TODO: we should likely just tear down the BAR state here, 4797302868d9SAdrian Chadd * rather than sending a BAR. 4798302868d9SAdrian Chadd */ 479988b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 480088b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4801f1bc738eSAdrian Chadd 4802375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4803eb6f0de0SAdrian Chadd 4804706bb444SAdrian Chadd /* Handle frame completion as individual frames */ 4805302868d9SAdrian Chadd bf = bf_first; 4806eb6f0de0SAdrian Chadd while (bf) { 4807eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4808706bb444SAdrian Chadd bf->bf_next = NULL; 4809eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 4810eb6f0de0SAdrian Chadd bf = bf_next; 4811eb6f0de0SAdrian Chadd } 4812eb6f0de0SAdrian Chadd } 4813eb6f0de0SAdrian Chadd 4814eb6f0de0SAdrian Chadd /* 4815eb6f0de0SAdrian Chadd * Handle completion of an set of aggregate frames. 4816eb6f0de0SAdrian Chadd * 4817eb6f0de0SAdrian Chadd * Note: the completion handler is the last descriptor in the aggregate, 4818eb6f0de0SAdrian Chadd * not the last descriptor in the first frame. 4819eb6f0de0SAdrian Chadd */ 4820eb6f0de0SAdrian Chadd static void 4821d4365d16SAdrian Chadd ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first, 4822d4365d16SAdrian Chadd int fail) 4823eb6f0de0SAdrian Chadd { 4824eb6f0de0SAdrian Chadd //struct ath_desc *ds = bf->bf_lastds; 4825eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4826eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4827eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4828eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4829eb6f0de0SAdrian Chadd struct ath_tx_status ts; 4830eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4831eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4832eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4833eb6f0de0SAdrian Chadd int seq_st, tx_ok; 4834eb6f0de0SAdrian Chadd int hasba, isaggr; 4835eb6f0de0SAdrian Chadd uint32_t ba[2]; 4836eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4837eb6f0de0SAdrian Chadd int ba_index; 4838eb6f0de0SAdrian Chadd int drops = 0; 4839eb6f0de0SAdrian Chadd int nframes = 0, nbad = 0, nf; 4840eb6f0de0SAdrian Chadd int pktlen; 4841eb6f0de0SAdrian Chadd /* XXX there's too much on the stack? */ 4842b815538dSAdrian Chadd struct ath_rc_series rc[ATH_RC_NUM]; 4843eb6f0de0SAdrian Chadd int txseq; 4844eb6f0de0SAdrian Chadd 4845eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n", 4846eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4847eb6f0de0SAdrian Chadd 48480aa5c1bbSAdrian Chadd /* 48490aa5c1bbSAdrian Chadd * Take a copy; this may be needed -after- bf_first 48500aa5c1bbSAdrian Chadd * has been completed and freed. 48510aa5c1bbSAdrian Chadd */ 48520aa5c1bbSAdrian Chadd ts = bf_first->bf_status.ds_txstat; 48530aa5c1bbSAdrian Chadd 4854f1bc738eSAdrian Chadd TAILQ_INIT(&bf_q); 4855f1bc738eSAdrian Chadd TAILQ_INIT(&bf_cq); 4856f1bc738eSAdrian Chadd 4857eb6f0de0SAdrian Chadd /* The TID state is kept behind the TXQ lock */ 4858375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4859eb6f0de0SAdrian Chadd 4860eb6f0de0SAdrian Chadd atid->hwq_depth--; 4861eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 486283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n", 4863eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4864eb6f0de0SAdrian Chadd 4865eb6f0de0SAdrian Chadd /* 4866f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 4867f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 4868f1bc738eSAdrian Chadd * function. 48690aa5c1bbSAdrian Chadd * 48700aa5c1bbSAdrian Chadd * XXX this is duplicate work, ew. 4871f1bc738eSAdrian Chadd */ 4872f1bc738eSAdrian Chadd if (atid->isfiltered) 4873f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4874f1bc738eSAdrian Chadd 4875f1bc738eSAdrian Chadd /* 4876eb6f0de0SAdrian Chadd * Punt cleanup to the relevant function, not our problem now 4877eb6f0de0SAdrian Chadd */ 4878eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 4879f1bc738eSAdrian Chadd if (atid->isfiltered) 488083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4881f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 4882f1bc738eSAdrian Chadd __func__); 4883375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4884eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(sc, bf_first); 4885eb6f0de0SAdrian Chadd return; 4886eb6f0de0SAdrian Chadd } 4887eb6f0de0SAdrian Chadd 4888eb6f0de0SAdrian Chadd /* 4889f1bc738eSAdrian Chadd * If the frame is filtered, transition to filtered frame 4890f1bc738eSAdrian Chadd * mode and add this to the filtered frame list. 4891f1bc738eSAdrian Chadd * 4892f1bc738eSAdrian Chadd * XXX TODO: figure out how this interoperates with 4893f1bc738eSAdrian Chadd * BAR, pause and cleanup states. 4894f1bc738eSAdrian Chadd */ 4895f1bc738eSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 4896f1bc738eSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 4897f1bc738eSAdrian Chadd if (fail != 0) 489883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4899f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", __func__, fail); 4900f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq); 4901f1bc738eSAdrian Chadd 4902f1bc738eSAdrian Chadd /* Remove from BAW */ 4903f1bc738eSAdrian Chadd TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) { 4904f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 4905f1bc738eSAdrian Chadd drops++; 4906f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4907f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4908f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 490983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4910f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 4911f1bc738eSAdrian Chadd __func__, 4912f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4913f1bc738eSAdrian Chadd } 4914f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4915f1bc738eSAdrian Chadd } 4916f1bc738eSAdrian Chadd /* 4917f1bc738eSAdrian Chadd * If any intermediate frames in the BAW were dropped when 4918f1bc738eSAdrian Chadd * handling filtering things, send a BAR. 4919f1bc738eSAdrian Chadd */ 4920f1bc738eSAdrian Chadd if (drops) 4921f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 4922f1bc738eSAdrian Chadd 4923f1bc738eSAdrian Chadd /* 4924f1bc738eSAdrian Chadd * Finish up by sending a BAR if required and freeing 4925f1bc738eSAdrian Chadd * the frames outside of the TX lock. 4926f1bc738eSAdrian Chadd */ 4927f1bc738eSAdrian Chadd goto finish_send_bar; 4928f1bc738eSAdrian Chadd } 4929f1bc738eSAdrian Chadd 4930f1bc738eSAdrian Chadd /* 4931eb6f0de0SAdrian Chadd * XXX for now, use the first frame in the aggregate for 4932eb6f0de0SAdrian Chadd * XXX rate control completion; it's at least consistent. 4933eb6f0de0SAdrian Chadd */ 4934eb6f0de0SAdrian Chadd pktlen = bf_first->bf_state.bfs_pktlen; 4935eb6f0de0SAdrian Chadd 4936eb6f0de0SAdrian Chadd /* 4937e9a6408eSAdrian Chadd * Handle errors first! 4938e9a6408eSAdrian Chadd * 4939e9a6408eSAdrian Chadd * Here, handle _any_ error as a "exceeded retries" error. 4940e9a6408eSAdrian Chadd * Later on (when filtered frames are to be specially handled) 4941e9a6408eSAdrian Chadd * it'll have to be expanded. 4942eb6f0de0SAdrian Chadd */ 4943e9a6408eSAdrian Chadd #if 0 4944eb6f0de0SAdrian Chadd if (ts.ts_status & HAL_TXERR_XRETRY) { 4945e9a6408eSAdrian Chadd #endif 4946e9a6408eSAdrian Chadd if (ts.ts_status != 0) { 4947375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4948eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(sc, bf_first, atid); 4949eb6f0de0SAdrian Chadd return; 4950eb6f0de0SAdrian Chadd } 4951eb6f0de0SAdrian Chadd 4952eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4953eb6f0de0SAdrian Chadd 4954eb6f0de0SAdrian Chadd /* 4955eb6f0de0SAdrian Chadd * extract starting sequence and block-ack bitmap 4956eb6f0de0SAdrian Chadd */ 4957eb6f0de0SAdrian Chadd /* XXX endian-ness of seq_st, ba? */ 4958eb6f0de0SAdrian Chadd seq_st = ts.ts_seqnum; 4959eb6f0de0SAdrian Chadd hasba = !! (ts.ts_flags & HAL_TX_BA); 4960eb6f0de0SAdrian Chadd tx_ok = (ts.ts_status == 0); 4961eb6f0de0SAdrian Chadd isaggr = bf_first->bf_state.bfs_aggr; 4962eb6f0de0SAdrian Chadd ba[0] = ts.ts_ba_low; 4963eb6f0de0SAdrian Chadd ba[1] = ts.ts_ba_high; 4964eb6f0de0SAdrian Chadd 4965eb6f0de0SAdrian Chadd /* 4966eb6f0de0SAdrian Chadd * Copy the TX completion status and the rate control 4967eb6f0de0SAdrian Chadd * series from the first descriptor, as it may be freed 4968eb6f0de0SAdrian Chadd * before the rate control code can get its grubby fingers 4969eb6f0de0SAdrian Chadd * into things. 4970eb6f0de0SAdrian Chadd */ 4971eb6f0de0SAdrian Chadd memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc)); 4972eb6f0de0SAdrian Chadd 4973eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4974d4365d16SAdrian Chadd "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, " 4975d4365d16SAdrian Chadd "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n", 4976eb6f0de0SAdrian Chadd __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags, 4977eb6f0de0SAdrian Chadd isaggr, seq_st, hasba, ba[0], ba[1]); 4978eb6f0de0SAdrian Chadd 4979b3420862SAdrian Chadd /* 4980b3420862SAdrian Chadd * The reference driver doesn't do this; it simply ignores 4981b3420862SAdrian Chadd * this check in its entirety. 4982b3420862SAdrian Chadd * 4983b3420862SAdrian Chadd * I've seen this occur when using iperf to send traffic 4984b3420862SAdrian Chadd * out tid 1 - the aggregate frames are all marked as TID 1, 4985b3420862SAdrian Chadd * but the TXSTATUS has TID=0. So, let's just ignore this 4986b3420862SAdrian Chadd * check. 4987b3420862SAdrian Chadd */ 4988b3420862SAdrian Chadd #if 0 4989eb6f0de0SAdrian Chadd /* Occasionally, the MAC sends a tx status for the wrong TID. */ 4990eb6f0de0SAdrian Chadd if (tid != ts.ts_tid) { 499183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n", 4992eb6f0de0SAdrian Chadd __func__, tid, ts.ts_tid); 4993eb6f0de0SAdrian Chadd tx_ok = 0; 4994eb6f0de0SAdrian Chadd } 4995b3420862SAdrian Chadd #endif 4996eb6f0de0SAdrian Chadd 4997eb6f0de0SAdrian Chadd /* AR5416 BA bug; this requires an interface reset */ 4998eb6f0de0SAdrian Chadd if (isaggr && tx_ok && (! hasba)) { 499982525db1SAdrian Chadd device_printf(sc->sc_dev, 5000d4365d16SAdrian Chadd "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, " 5001d4365d16SAdrian Chadd "seq_st=%d\n", 5002eb6f0de0SAdrian Chadd __func__, hasba, tx_ok, isaggr, seq_st); 5003eb6f0de0SAdrian Chadd /* XXX TODO: schedule an interface reset */ 50040f078d63SJohn Baldwin #ifdef ATH_DEBUG 50056abbbae5SAdrian Chadd ath_printtxbuf(sc, bf_first, 50066abbbae5SAdrian Chadd sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0); 50070f078d63SJohn Baldwin #endif 5008eb6f0de0SAdrian Chadd } 5009eb6f0de0SAdrian Chadd 5010eb6f0de0SAdrian Chadd /* 5011eb6f0de0SAdrian Chadd * Walk the list of frames, figure out which ones were correctly 5012eb6f0de0SAdrian Chadd * sent and which weren't. 5013eb6f0de0SAdrian Chadd */ 5014eb6f0de0SAdrian Chadd bf = bf_first; 5015eb6f0de0SAdrian Chadd nf = bf_first->bf_state.bfs_nframes; 5016eb6f0de0SAdrian Chadd 5017eb6f0de0SAdrian Chadd /* bf_first is going to be invalid once this list is walked */ 5018eb6f0de0SAdrian Chadd bf_first = NULL; 5019eb6f0de0SAdrian Chadd 5020eb6f0de0SAdrian Chadd /* 5021eb6f0de0SAdrian Chadd * Walk the list of completed frames and determine 5022eb6f0de0SAdrian Chadd * which need to be completed and which need to be 5023eb6f0de0SAdrian Chadd * retransmitted. 5024eb6f0de0SAdrian Chadd * 5025eb6f0de0SAdrian Chadd * For completed frames, the completion functions need 5026eb6f0de0SAdrian Chadd * to be called at the end of this function as the last 5027eb6f0de0SAdrian Chadd * node reference may free the node. 5028eb6f0de0SAdrian Chadd * 5029eb6f0de0SAdrian Chadd * Finally, since the TXQ lock can't be held during the 5030eb6f0de0SAdrian Chadd * completion callback (to avoid lock recursion), 5031eb6f0de0SAdrian Chadd * the completion calls have to be done outside of the 5032eb6f0de0SAdrian Chadd * lock. 5033eb6f0de0SAdrian Chadd */ 5034eb6f0de0SAdrian Chadd while (bf) { 5035eb6f0de0SAdrian Chadd nframes++; 5036d4365d16SAdrian Chadd ba_index = ATH_BA_INDEX(seq_st, 5037d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 5038eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 5039eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 5040eb6f0de0SAdrian Chadd 5041eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5042eb6f0de0SAdrian Chadd "%s: checking bf=%p seqno=%d; ack=%d\n", 5043eb6f0de0SAdrian Chadd __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 5044eb6f0de0SAdrian Chadd ATH_BA_ISSET(ba, ba_index)); 5045eb6f0de0SAdrian Chadd 5046eb6f0de0SAdrian Chadd if (tx_ok && ATH_BA_ISSET(ba, ba_index)) { 50472d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_ok++; 5048eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5049eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5050eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 505183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5052eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 5053eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5054eb6f0de0SAdrian Chadd bf->bf_next = NULL; 5055eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 5056eb6f0de0SAdrian Chadd } else { 50572d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 5058eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 5059eb6f0de0SAdrian Chadd drops++; 5060eb6f0de0SAdrian Chadd bf->bf_next = NULL; 5061eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 5062eb6f0de0SAdrian Chadd } 5063eb6f0de0SAdrian Chadd nbad++; 5064eb6f0de0SAdrian Chadd } 5065eb6f0de0SAdrian Chadd bf = bf_next; 5066eb6f0de0SAdrian Chadd } 5067eb6f0de0SAdrian Chadd 5068eb6f0de0SAdrian Chadd /* 5069eb6f0de0SAdrian Chadd * Now that the BAW updates have been done, unlock 5070eb6f0de0SAdrian Chadd * 5071eb6f0de0SAdrian Chadd * txseq is grabbed before the lock is released so we 5072eb6f0de0SAdrian Chadd * have a consistent view of what -was- in the BAW. 5073eb6f0de0SAdrian Chadd * Anything after this point will not yet have been 5074eb6f0de0SAdrian Chadd * TXed. 5075eb6f0de0SAdrian Chadd */ 5076eb6f0de0SAdrian Chadd txseq = tap->txa_start; 5077375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5078eb6f0de0SAdrian Chadd 5079eb6f0de0SAdrian Chadd if (nframes != nf) 508083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5081eb6f0de0SAdrian Chadd "%s: num frames seen=%d; bf nframes=%d\n", 5082eb6f0de0SAdrian Chadd __func__, nframes, nf); 5083eb6f0de0SAdrian Chadd 5084eb6f0de0SAdrian Chadd /* 5085eb6f0de0SAdrian Chadd * Now we know how many frames were bad, call the rate 5086eb6f0de0SAdrian Chadd * control code. 5087eb6f0de0SAdrian Chadd */ 5088eb6f0de0SAdrian Chadd if (fail == 0) 5089d4365d16SAdrian Chadd ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes, 5090d4365d16SAdrian Chadd nbad); 5091eb6f0de0SAdrian Chadd 5092eb6f0de0SAdrian Chadd /* 5093eb6f0de0SAdrian Chadd * send bar if we dropped any frames 5094eb6f0de0SAdrian Chadd */ 5095eb6f0de0SAdrian Chadd if (drops) { 509688b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 5097375307d4SAdrian Chadd ATH_TX_LOCK(sc); 509888b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 5099375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5100eb6f0de0SAdrian Chadd } 5101eb6f0de0SAdrian Chadd 510239da9d42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 510339da9d42SAdrian Chadd "%s: txa_start now %d\n", __func__, tap->txa_start); 510439da9d42SAdrian Chadd 5105375307d4SAdrian Chadd ATH_TX_LOCK(sc); 510639da9d42SAdrian Chadd 510739da9d42SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 5108eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 5109eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 51103e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 5111eb6f0de0SAdrian Chadd } 5112eb6f0de0SAdrian Chadd 511339da9d42SAdrian Chadd /* 511439da9d42SAdrian Chadd * Reschedule to grab some further frames. 511539da9d42SAdrian Chadd */ 511639da9d42SAdrian Chadd ath_tx_tid_sched(sc, atid); 5117eb6f0de0SAdrian Chadd 511888b3d483SAdrian Chadd /* 5119f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 5120f1bc738eSAdrian Chadd * 5121f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 5122f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 5123f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 5124f1bc738eSAdrian Chadd * (complete or otherwise) frame. 5125f1bc738eSAdrian Chadd * 5126f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 5127f1bc738eSAdrian Chadd */ 5128f1bc738eSAdrian Chadd if (atid->isfiltered) 5129f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5130f1bc738eSAdrian Chadd 5131f1bc738eSAdrian Chadd finish_send_bar: 5132f1bc738eSAdrian Chadd 5133f1bc738eSAdrian Chadd /* 513488b3d483SAdrian Chadd * Send BAR if required 513588b3d483SAdrian Chadd */ 513688b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 513788b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 513839da9d42SAdrian Chadd 5139375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 514088b3d483SAdrian Chadd 5141eb6f0de0SAdrian Chadd /* Do deferred completion */ 5142eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 5143eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 5144eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 5145eb6f0de0SAdrian Chadd } 5146eb6f0de0SAdrian Chadd } 5147eb6f0de0SAdrian Chadd 5148eb6f0de0SAdrian Chadd /* 5149eb6f0de0SAdrian Chadd * Handle completion of unaggregated frames in an ADDBA 5150eb6f0de0SAdrian Chadd * session. 5151eb6f0de0SAdrian Chadd * 5152eb6f0de0SAdrian Chadd * Fail is set to 1 if the entry is being freed via a call to 5153eb6f0de0SAdrian Chadd * ath_tx_draintxq(). 5154eb6f0de0SAdrian Chadd */ 5155eb6f0de0SAdrian Chadd static void 5156eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail) 5157eb6f0de0SAdrian Chadd { 5158eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 5159eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5160eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 5161eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 51620aa5c1bbSAdrian Chadd struct ath_tx_status ts; 5163f1bc738eSAdrian Chadd int drops = 0; 5164eb6f0de0SAdrian Chadd 5165eb6f0de0SAdrian Chadd /* 51660aa5c1bbSAdrian Chadd * Take a copy of this; filtering/cloning the frame may free the 51670aa5c1bbSAdrian Chadd * bf pointer. 51680aa5c1bbSAdrian Chadd */ 51690aa5c1bbSAdrian Chadd ts = bf->bf_status.ds_txstat; 51700aa5c1bbSAdrian Chadd 51710aa5c1bbSAdrian Chadd /* 5172eb6f0de0SAdrian Chadd * Update rate control status here, before we possibly 5173eb6f0de0SAdrian Chadd * punt to retry or cleanup. 5174eb6f0de0SAdrian Chadd * 5175eb6f0de0SAdrian Chadd * Do it outside of the TXQ lock. 5176eb6f0de0SAdrian Chadd */ 5177875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 5178eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 5179eb6f0de0SAdrian Chadd &bf->bf_status.ds_txstat, 5180eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, 51810aa5c1bbSAdrian Chadd 1, (ts.ts_status == 0) ? 0 : 1); 5182eb6f0de0SAdrian Chadd 5183eb6f0de0SAdrian Chadd /* 5184eb6f0de0SAdrian Chadd * This is called early so atid->hwq_depth can be tracked. 5185eb6f0de0SAdrian Chadd * This unfortunately means that it's released and regrabbed 5186eb6f0de0SAdrian Chadd * during retry and cleanup. That's rather inefficient. 5187eb6f0de0SAdrian Chadd */ 5188375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5189eb6f0de0SAdrian Chadd 5190eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 519183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__); 5192eb6f0de0SAdrian Chadd 5193d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 5194d4365d16SAdrian Chadd "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n", 5195d4365d16SAdrian Chadd __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth, 5196d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 5197eb6f0de0SAdrian Chadd 5198eb6f0de0SAdrian Chadd atid->hwq_depth--; 5199eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 520083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 5201eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 5202eb6f0de0SAdrian Chadd 5203eb6f0de0SAdrian Chadd /* 5204f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 5205f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 5206f1bc738eSAdrian Chadd * function. 5207f1bc738eSAdrian Chadd */ 5208f1bc738eSAdrian Chadd if (atid->isfiltered) 5209f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5210f1bc738eSAdrian Chadd 5211f1bc738eSAdrian Chadd /* 5212eb6f0de0SAdrian Chadd * If a cleanup is in progress, punt to comp_cleanup; 5213eb6f0de0SAdrian Chadd * rather than handling it here. It's thus their 5214eb6f0de0SAdrian Chadd * responsibility to clean up, call the completion 5215eb6f0de0SAdrian Chadd * function in net80211, etc. 5216eb6f0de0SAdrian Chadd */ 5217eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 5218f1bc738eSAdrian Chadd if (atid->isfiltered) 521983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5220f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 5221f1bc738eSAdrian Chadd __func__); 5222375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5223d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n", 5224d4365d16SAdrian Chadd __func__); 5225eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(sc, bf); 5226eb6f0de0SAdrian Chadd return; 5227eb6f0de0SAdrian Chadd } 5228eb6f0de0SAdrian Chadd 5229eb6f0de0SAdrian Chadd /* 5230f1bc738eSAdrian Chadd * XXX TODO: how does cleanup, BAR and filtered frame handling 5231f1bc738eSAdrian Chadd * overlap? 5232f1bc738eSAdrian Chadd * 5233f1bc738eSAdrian Chadd * If the frame is filtered OR if it's any failure but 5234f1bc738eSAdrian Chadd * the TID is filtered, the frame must be added to the 5235f1bc738eSAdrian Chadd * filtered frame list. 5236f1bc738eSAdrian Chadd * 5237f1bc738eSAdrian Chadd * However - a busy buffer can't be added to the filtered 5238f1bc738eSAdrian Chadd * list as it will end up being recycled without having 5239f1bc738eSAdrian Chadd * been made available for the hardware. 5240f1bc738eSAdrian Chadd */ 52410aa5c1bbSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 52420aa5c1bbSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 5243f1bc738eSAdrian Chadd int freeframe; 5244f1bc738eSAdrian Chadd 5245f1bc738eSAdrian Chadd if (fail != 0) 524683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5247f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", 524883bbd5ebSRui Paulo __func__, fail); 5249f1bc738eSAdrian Chadd freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf); 525042fdd8e7SAdrian Chadd /* 525142fdd8e7SAdrian Chadd * If freeframe=0 then bf is no longer ours; don't 525242fdd8e7SAdrian Chadd * touch it. 525342fdd8e7SAdrian Chadd */ 5254f1bc738eSAdrian Chadd if (freeframe) { 5255f1bc738eSAdrian Chadd /* Remove from BAW */ 5256f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 5257f1bc738eSAdrian Chadd drops++; 5258f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5259f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5260f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 526183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5262f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 5263f1bc738eSAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5264f1bc738eSAdrian Chadd } 5265f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5266f1bc738eSAdrian Chadd } 5267f1bc738eSAdrian Chadd 5268f1bc738eSAdrian Chadd /* 5269f1bc738eSAdrian Chadd * If the frame couldn't be filtered, treat it as a drop and 5270f1bc738eSAdrian Chadd * prepare to send a BAR. 5271f1bc738eSAdrian Chadd */ 5272f1bc738eSAdrian Chadd if (freeframe && drops) 5273f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 5274f1bc738eSAdrian Chadd 5275f1bc738eSAdrian Chadd /* 5276f1bc738eSAdrian Chadd * Send BAR if required 5277f1bc738eSAdrian Chadd */ 5278f1bc738eSAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 5279f1bc738eSAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 5280f1bc738eSAdrian Chadd 5281375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5282f1bc738eSAdrian Chadd /* 5283f1bc738eSAdrian Chadd * If freeframe is set, then the frame couldn't be 5284f1bc738eSAdrian Chadd * cloned and bf is still valid. Just complete/free it. 5285f1bc738eSAdrian Chadd */ 5286f1bc738eSAdrian Chadd if (freeframe) 5287f1bc738eSAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5288f1bc738eSAdrian Chadd 5289f1bc738eSAdrian Chadd return; 5290f1bc738eSAdrian Chadd } 5291f1bc738eSAdrian Chadd /* 5292eb6f0de0SAdrian Chadd * Don't bother with the retry check if all frames 5293eb6f0de0SAdrian Chadd * are being failed (eg during queue deletion.) 5294eb6f0de0SAdrian Chadd */ 5295e9a6408eSAdrian Chadd #if 0 5296eb6f0de0SAdrian Chadd if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) { 5297e9a6408eSAdrian Chadd #endif 52980aa5c1bbSAdrian Chadd if (fail == 0 && ts.ts_status != 0) { 5299375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5300d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n", 5301d4365d16SAdrian Chadd __func__); 5302eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(sc, bf); 5303eb6f0de0SAdrian Chadd return; 5304eb6f0de0SAdrian Chadd } 5305eb6f0de0SAdrian Chadd 5306eb6f0de0SAdrian Chadd /* Success? Complete */ 5307eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n", 5308eb6f0de0SAdrian Chadd __func__, tid, SEQNO(bf->bf_state.bfs_seqno)); 5309eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5310eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5311eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5312eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 531383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5314eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 5315eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5316eb6f0de0SAdrian Chadd } 5317eb6f0de0SAdrian Chadd 531888b3d483SAdrian Chadd /* 5319f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 5320f1bc738eSAdrian Chadd * 5321f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 5322f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 5323f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 5324f1bc738eSAdrian Chadd * (complete or otherwise) frame. 5325f1bc738eSAdrian Chadd * 5326f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 5327f1bc738eSAdrian Chadd */ 5328f1bc738eSAdrian Chadd if (atid->isfiltered) 5329f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5330f1bc738eSAdrian Chadd 5331f1bc738eSAdrian Chadd /* 533288b3d483SAdrian Chadd * Send BAR if required 533388b3d483SAdrian Chadd */ 533488b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 533588b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 533688b3d483SAdrian Chadd 5337375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5338eb6f0de0SAdrian Chadd 5339eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5340eb6f0de0SAdrian Chadd /* bf is freed at this point */ 5341eb6f0de0SAdrian Chadd } 5342eb6f0de0SAdrian Chadd 5343eb6f0de0SAdrian Chadd void 5344eb6f0de0SAdrian Chadd ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 5345eb6f0de0SAdrian Chadd { 5346eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_aggr) 5347eb6f0de0SAdrian Chadd ath_tx_aggr_comp_aggr(sc, bf, fail); 5348eb6f0de0SAdrian Chadd else 5349eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(sc, bf, fail); 5350eb6f0de0SAdrian Chadd } 5351eb6f0de0SAdrian Chadd 5352eb6f0de0SAdrian Chadd /* 5353eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 5354eb6f0de0SAdrian Chadd * 5355eb6f0de0SAdrian Chadd * This is the aggregate version. 5356eb6f0de0SAdrian Chadd */ 5357eb6f0de0SAdrian Chadd void 5358eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an, 5359eb6f0de0SAdrian Chadd struct ath_tid *tid) 5360eb6f0de0SAdrian Chadd { 5361eb6f0de0SAdrian Chadd struct ath_buf *bf; 5362eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5363eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5364eb6f0de0SAdrian Chadd ATH_AGGR_STATUS status; 5365eb6f0de0SAdrian Chadd ath_bufhead bf_q; 5366eb6f0de0SAdrian Chadd 5367eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid); 5368375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5369eb6f0de0SAdrian Chadd 537022a3aee6SAdrian Chadd /* 537122a3aee6SAdrian Chadd * XXX TODO: If we're called for a queue that we're leaking frames to, 537222a3aee6SAdrian Chadd * ensure we only leak one. 537322a3aee6SAdrian Chadd */ 537422a3aee6SAdrian Chadd 5375eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 5376eb6f0de0SAdrian Chadd 5377eb6f0de0SAdrian Chadd if (tid->tid == IEEE80211_NONQOS_TID) 537883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 537983bbd5ebSRui Paulo "%s: called for TID=NONQOS_TID?\n", __func__); 5380eb6f0de0SAdrian Chadd 5381eb6f0de0SAdrian Chadd for (;;) { 5382eb6f0de0SAdrian Chadd status = ATH_AGGR_DONE; 5383eb6f0de0SAdrian Chadd 5384eb6f0de0SAdrian Chadd /* 5385eb6f0de0SAdrian Chadd * If the upper layer has paused the TID, don't 5386eb6f0de0SAdrian Chadd * queue any further packets. 5387eb6f0de0SAdrian Chadd * 5388eb6f0de0SAdrian Chadd * This can also occur from the completion task because 5389eb6f0de0SAdrian Chadd * of packet loss; but as its serialised with this code, 5390eb6f0de0SAdrian Chadd * it won't "appear" half way through queuing packets. 5391eb6f0de0SAdrian Chadd */ 539222a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5393eb6f0de0SAdrian Chadd break; 5394eb6f0de0SAdrian Chadd 53953e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5396eb6f0de0SAdrian Chadd if (bf == NULL) { 5397eb6f0de0SAdrian Chadd break; 5398eb6f0de0SAdrian Chadd } 5399eb6f0de0SAdrian Chadd 5400eb6f0de0SAdrian Chadd /* 5401eb6f0de0SAdrian Chadd * If the packet doesn't fall within the BAW (eg a NULL 5402eb6f0de0SAdrian Chadd * data frame), schedule it directly; continue. 5403eb6f0de0SAdrian Chadd */ 5404eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 5405d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5406d4365d16SAdrian Chadd "%s: non-baw packet\n", 5407eb6f0de0SAdrian Chadd __func__); 54083e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 54092a9f83afSAdrian Chadd 54102a9f83afSAdrian Chadd if (bf->bf_state.bfs_nframes > 1) 541183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 54122a9f83afSAdrian Chadd "%s: aggr=%d, nframes=%d\n", 54132a9f83afSAdrian Chadd __func__, 54142a9f83afSAdrian Chadd bf->bf_state.bfs_aggr, 54152a9f83afSAdrian Chadd bf->bf_state.bfs_nframes); 54162a9f83afSAdrian Chadd 54172a9f83afSAdrian Chadd /* 54182a9f83afSAdrian Chadd * This shouldn't happen - such frames shouldn't 54192a9f83afSAdrian Chadd * ever have been queued as an aggregate in the 54202a9f83afSAdrian Chadd * first place. However, make sure the fields 54212a9f83afSAdrian Chadd * are correctly setup just to be totally sure. 54222a9f83afSAdrian Chadd */ 5423eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 54242a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 54252a9f83afSAdrian Chadd 54264e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 54274e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 54284e81f27cSAdrian Chadd 5429eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5430e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5431e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5432eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5433e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5434eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5435eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5436eb6f0de0SAdrian Chadd 5437eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_nonbaw_pkt++; 5438eb6f0de0SAdrian Chadd 5439eb6f0de0SAdrian Chadd /* Queue the packet; continue */ 5440eb6f0de0SAdrian Chadd goto queuepkt; 5441eb6f0de0SAdrian Chadd } 5442eb6f0de0SAdrian Chadd 5443eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 5444eb6f0de0SAdrian Chadd 5445eb6f0de0SAdrian Chadd /* 5446eb6f0de0SAdrian Chadd * Do a rate control lookup on the first frame in the 5447eb6f0de0SAdrian Chadd * list. The rate control code needs that to occur 5448eb6f0de0SAdrian Chadd * before it can determine whether to TX. 5449eb6f0de0SAdrian Chadd * It's inaccurate because the rate control code doesn't 5450eb6f0de0SAdrian Chadd * really "do" aggregate lookups, so it only considers 5451eb6f0de0SAdrian Chadd * the size of the first frame. 5452eb6f0de0SAdrian Chadd */ 5453eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5454eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = 0; 5455eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = 0; 5456e2e4a2c2SAdrian Chadd 5457e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5458e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5459e2e4a2c2SAdrian Chadd 5460e2e4a2c2SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5461eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5462eb6f0de0SAdrian Chadd 5463eb6f0de0SAdrian Chadd status = ath_tx_form_aggr(sc, an, tid, &bf_q); 5464eb6f0de0SAdrian Chadd 5465eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5466eb6f0de0SAdrian Chadd "%s: ath_tx_form_aggr() status=%d\n", __func__, status); 5467eb6f0de0SAdrian Chadd 5468eb6f0de0SAdrian Chadd /* 5469eb6f0de0SAdrian Chadd * No frames to be picked up - out of BAW 5470eb6f0de0SAdrian Chadd */ 5471eb6f0de0SAdrian Chadd if (TAILQ_EMPTY(&bf_q)) 5472eb6f0de0SAdrian Chadd break; 5473eb6f0de0SAdrian Chadd 5474eb6f0de0SAdrian Chadd /* 5475eb6f0de0SAdrian Chadd * This assumes that the descriptor list in the ath_bufhead 5476eb6f0de0SAdrian Chadd * are already linked together via bf_next pointers. 5477eb6f0de0SAdrian Chadd */ 5478eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&bf_q); 5479eb6f0de0SAdrian Chadd 5480e2e4a2c2SAdrian Chadd if (status == ATH_AGGR_8K_LIMITED) 5481e2e4a2c2SAdrian Chadd sc->sc_aggr_stats.aggr_rts_aggr_limited++; 5482e2e4a2c2SAdrian Chadd 5483eb6f0de0SAdrian Chadd /* 5484eb6f0de0SAdrian Chadd * If it's the only frame send as non-aggregate 5485eb6f0de0SAdrian Chadd * assume that ath_tx_form_aggr() has checked 5486eb6f0de0SAdrian Chadd * whether it's in the BAW and added it appropriately. 5487eb6f0de0SAdrian Chadd */ 5488eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_nframes == 1) { 5489eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5490eb6f0de0SAdrian Chadd "%s: single-frame aggregate\n", __func__); 54914e81f27cSAdrian Chadd 54924e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 54934e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 54944e81f27cSAdrian Chadd 5495eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 549621840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; 5497eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5498eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5499eb6f0de0SAdrian Chadd if (status == ATH_AGGR_BAW_CLOSED) 5500eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_baw_closed_single_pkt++; 5501eb6f0de0SAdrian Chadd else 5502eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_single_pkt++; 5503eb6f0de0SAdrian Chadd } else { 5504eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5505d4365d16SAdrian Chadd "%s: multi-frame aggregate: %d frames, " 5506d4365d16SAdrian Chadd "length %d\n", 5507eb6f0de0SAdrian Chadd __func__, bf->bf_state.bfs_nframes, 5508eb6f0de0SAdrian Chadd bf->bf_state.bfs_al); 5509eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 1; 5510eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++; 5511eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_aggr_pkt++; 5512eb6f0de0SAdrian Chadd 55134e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 55144e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 55154e81f27cSAdrian Chadd 5516eb6f0de0SAdrian Chadd /* 5517e2e4a2c2SAdrian Chadd * Calculate the duration/protection as required. 5518e2e4a2c2SAdrian Chadd */ 5519e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5520e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5521e2e4a2c2SAdrian Chadd 5522e2e4a2c2SAdrian Chadd /* 5523eb6f0de0SAdrian Chadd * Update the rate and rtscts information based on the 5524eb6f0de0SAdrian Chadd * rate decision made by the rate control code; 5525eb6f0de0SAdrian Chadd * the first frame in the aggregate needs it. 5526eb6f0de0SAdrian Chadd */ 5527eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5528eb6f0de0SAdrian Chadd 5529eb6f0de0SAdrian Chadd /* 5530eb6f0de0SAdrian Chadd * Setup the relevant descriptor fields 5531eb6f0de0SAdrian Chadd * for aggregation. The first descriptor 5532eb6f0de0SAdrian Chadd * already points to the rest in the chain. 5533eb6f0de0SAdrian Chadd */ 5534eb6f0de0SAdrian Chadd ath_tx_setds_11n(sc, bf); 5535eb6f0de0SAdrian Chadd 5536eb6f0de0SAdrian Chadd } 5537eb6f0de0SAdrian Chadd queuepkt: 5538eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 5539eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 5540eb6f0de0SAdrian Chadd 5541eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 554283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__); 5543eb6f0de0SAdrian Chadd 554422a3aee6SAdrian Chadd /* 554522a3aee6SAdrian Chadd * Update leak count and frame config if were leaking frames. 554622a3aee6SAdrian Chadd * 554722a3aee6SAdrian Chadd * XXX TODO: it should update all frames in an aggregate 554822a3aee6SAdrian Chadd * correctly! 554922a3aee6SAdrian Chadd */ 555022a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 555122a3aee6SAdrian Chadd 5552eb6f0de0SAdrian Chadd /* Punt to txq */ 5553eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5554eb6f0de0SAdrian Chadd 5555eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5556eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5557eb6f0de0SAdrian Chadd tid->hwq_depth++; 5558eb6f0de0SAdrian Chadd 5559eb6f0de0SAdrian Chadd /* 5560eb6f0de0SAdrian Chadd * Break out if ath_tx_form_aggr() indicated 5561eb6f0de0SAdrian Chadd * there can't be any further progress (eg BAW is full.) 5562eb6f0de0SAdrian Chadd * Checking for an empty txq is done above. 5563eb6f0de0SAdrian Chadd * 5564eb6f0de0SAdrian Chadd * XXX locking on txq here? 5565eb6f0de0SAdrian Chadd */ 556672910f03SAdrian Chadd /* XXX TXQ locking */ 556772910f03SAdrian Chadd if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr || 556822a3aee6SAdrian Chadd (status == ATH_AGGR_BAW_CLOSED || 556922a3aee6SAdrian Chadd status == ATH_AGGR_LEAK_CLOSED)) 5570eb6f0de0SAdrian Chadd break; 5571eb6f0de0SAdrian Chadd } 5572eb6f0de0SAdrian Chadd } 5573eb6f0de0SAdrian Chadd 5574eb6f0de0SAdrian Chadd /* 5575eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 557672910f03SAdrian Chadd * 557772910f03SAdrian Chadd * XXX TODO: this routine doesn't enforce the maximum TXQ depth. 557872910f03SAdrian Chadd * It just dumps frames into the TXQ. We should limit how deep 557972910f03SAdrian Chadd * the transmit queue can grow for frames dispatched to the given 558072910f03SAdrian Chadd * TXQ. 558172910f03SAdrian Chadd * 558272910f03SAdrian Chadd * To avoid locking issues, either we need to own the TXQ lock 558372910f03SAdrian Chadd * at this point, or we need to pass in the maximum frame count 558472910f03SAdrian Chadd * from the caller. 5585eb6f0de0SAdrian Chadd */ 5586eb6f0de0SAdrian Chadd void 5587eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an, 5588eb6f0de0SAdrian Chadd struct ath_tid *tid) 5589eb6f0de0SAdrian Chadd { 5590eb6f0de0SAdrian Chadd struct ath_buf *bf; 5591eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5592eb6f0de0SAdrian Chadd 5593eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n", 5594eb6f0de0SAdrian Chadd __func__, an, tid->tid); 5595eb6f0de0SAdrian Chadd 5596375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5597eb6f0de0SAdrian Chadd 5598eb6f0de0SAdrian Chadd /* Check - is AMPDU pending or running? then print out something */ 5599eb6f0de0SAdrian Chadd if (ath_tx_ampdu_pending(sc, an, tid->tid)) 560083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n", 5601eb6f0de0SAdrian Chadd __func__, tid->tid); 5602eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid)) 560383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n", 5604eb6f0de0SAdrian Chadd __func__, tid->tid); 5605eb6f0de0SAdrian Chadd 5606eb6f0de0SAdrian Chadd for (;;) { 5607eb6f0de0SAdrian Chadd 5608eb6f0de0SAdrian Chadd /* 5609eb6f0de0SAdrian Chadd * If the upper layers have paused the TID, don't 5610eb6f0de0SAdrian Chadd * queue any further packets. 561122a3aee6SAdrian Chadd * 561222a3aee6SAdrian Chadd * XXX if we are leaking frames, make sure we decrement 561322a3aee6SAdrian Chadd * that counter _and_ we continue here. 5614eb6f0de0SAdrian Chadd */ 561522a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5616eb6f0de0SAdrian Chadd break; 5617eb6f0de0SAdrian Chadd 56183e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5619eb6f0de0SAdrian Chadd if (bf == NULL) { 5620eb6f0de0SAdrian Chadd break; 5621eb6f0de0SAdrian Chadd } 5622eb6f0de0SAdrian Chadd 56233e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 5624eb6f0de0SAdrian Chadd 5625eb6f0de0SAdrian Chadd /* Sanity check! */ 5626eb6f0de0SAdrian Chadd if (tid->tid != bf->bf_state.bfs_tid) { 562783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !=" 562883bbd5ebSRui Paulo " tid %d\n", __func__, bf->bf_state.bfs_tid, 562983bbd5ebSRui Paulo tid->tid); 5630eb6f0de0SAdrian Chadd } 5631eb6f0de0SAdrian Chadd /* Normal completion handler */ 5632eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 5633eb6f0de0SAdrian Chadd 56340c54de88SAdrian Chadd /* 56350c54de88SAdrian Chadd * Override this for now, until the non-aggregate 56360c54de88SAdrian Chadd * completion handler correctly handles software retransmits. 56370c54de88SAdrian Chadd */ 56380c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 56390c54de88SAdrian Chadd 56404e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 56414e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 56424e81f27cSAdrian Chadd 5643eb6f0de0SAdrian Chadd /* Program descriptors + rate control */ 5644eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5645e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5646e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5647eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5648e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5649eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5650eb6f0de0SAdrian Chadd 565122a3aee6SAdrian Chadd /* 565222a3aee6SAdrian Chadd * Update the current leak count if 565322a3aee6SAdrian Chadd * we're leaking frames; and set the 565422a3aee6SAdrian Chadd * MORE flag as appropriate. 565522a3aee6SAdrian Chadd */ 565622a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 565722a3aee6SAdrian Chadd 5658eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5659eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5660eb6f0de0SAdrian Chadd tid->hwq_depth++; 5661eb6f0de0SAdrian Chadd 5662eb6f0de0SAdrian Chadd /* Punt to hardware or software txq */ 5663eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5664eb6f0de0SAdrian Chadd } 5665eb6f0de0SAdrian Chadd } 5666eb6f0de0SAdrian Chadd 5667eb6f0de0SAdrian Chadd /* 5668eb6f0de0SAdrian Chadd * Schedule some packets to the given hardware queue. 5669eb6f0de0SAdrian Chadd * 5670eb6f0de0SAdrian Chadd * This function walks the list of TIDs (ie, ath_node TIDs 5671eb6f0de0SAdrian Chadd * with queued traffic) and attempts to schedule traffic 5672eb6f0de0SAdrian Chadd * from them. 5673eb6f0de0SAdrian Chadd * 5674eb6f0de0SAdrian Chadd * TID scheduling is implemented as a FIFO, with TIDs being 5675eb6f0de0SAdrian Chadd * added to the end of the queue after some frames have been 5676eb6f0de0SAdrian Chadd * scheduled. 5677eb6f0de0SAdrian Chadd */ 5678eb6f0de0SAdrian Chadd void 5679eb6f0de0SAdrian Chadd ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq) 5680eb6f0de0SAdrian Chadd { 5681eb6f0de0SAdrian Chadd struct ath_tid *tid, *next, *last; 5682eb6f0de0SAdrian Chadd 5683375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5684eb6f0de0SAdrian Chadd 5685eb6f0de0SAdrian Chadd /* 568657af292dSAdrian Chadd * For non-EDMA chips, aggr frames that have been built are 568757af292dSAdrian Chadd * in axq_aggr_depth, whether they've been scheduled or not. 568857af292dSAdrian Chadd * There's no FIFO, so txq->axq_depth is what's been scheduled 568957af292dSAdrian Chadd * to the hardware. 569072910f03SAdrian Chadd * 569157af292dSAdrian Chadd * For EDMA chips, we do it in two stages. The existing code 569257af292dSAdrian Chadd * builds a list of frames to go to the hardware and the EDMA 569357af292dSAdrian Chadd * code turns it into a single entry to push into the FIFO. 569457af292dSAdrian Chadd * That way we don't take up one packet per FIFO slot. 569557af292dSAdrian Chadd * We do push one aggregate per FIFO slot though, just to keep 569657af292dSAdrian Chadd * things simple. 569757af292dSAdrian Chadd * 569857af292dSAdrian Chadd * The FIFO depth is what's in the hardware; the txq->axq_depth 569957af292dSAdrian Chadd * is what's been scheduled to the FIFO. 570057af292dSAdrian Chadd * 570157af292dSAdrian Chadd * fifo.axq_depth is the number of frames (or aggregates) pushed 570257af292dSAdrian Chadd * into the EDMA FIFO. For multi-frame lists, this is the number 570357af292dSAdrian Chadd * of frames pushed in. 570457af292dSAdrian Chadd * axq_fifo_depth is the number of FIFO slots currently busy. 5705eb6f0de0SAdrian Chadd */ 570657af292dSAdrian Chadd 570757af292dSAdrian Chadd /* For EDMA and non-EDMA, check built/scheduled against aggr limit */ 570857af292dSAdrian Chadd if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr) { 570972910f03SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++; 571072910f03SAdrian Chadd return; 571172910f03SAdrian Chadd } 571257af292dSAdrian Chadd 571357af292dSAdrian Chadd /* 571457af292dSAdrian Chadd * For non-EDMA chips, axq_depth is the "what's scheduled to 571557af292dSAdrian Chadd * the hardware list". For EDMA it's "What's built for the hardware" 571657af292dSAdrian Chadd * and fifo.axq_depth is how many frames have been dispatched 571757af292dSAdrian Chadd * already to the hardware. 571857af292dSAdrian Chadd */ 571957af292dSAdrian Chadd if (txq->axq_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_nonaggr) { 5720eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++; 5721eb6f0de0SAdrian Chadd return; 5722eb6f0de0SAdrian Chadd } 5723eb6f0de0SAdrian Chadd 5724eb6f0de0SAdrian Chadd last = TAILQ_LAST(&txq->axq_tidq, axq_t_s); 5725eb6f0de0SAdrian Chadd 5726eb6f0de0SAdrian Chadd TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) { 5727eb6f0de0SAdrian Chadd /* 5728eb6f0de0SAdrian Chadd * Suspend paused queues here; they'll be resumed 5729eb6f0de0SAdrian Chadd * once the addba completes or times out. 5730eb6f0de0SAdrian Chadd */ 5731eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n", 5732eb6f0de0SAdrian Chadd __func__, tid->tid, tid->paused); 5733eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 573422a3aee6SAdrian Chadd /* 573522a3aee6SAdrian Chadd * This node may be in power-save and we're leaking 573622a3aee6SAdrian Chadd * a frame; be careful. 573722a3aee6SAdrian Chadd */ 573822a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 57398ec9220eSAdrian Chadd goto loop_done; 5740eb6f0de0SAdrian Chadd } 5741eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, tid->an, tid->tid)) 5742eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(sc, tid->an, tid); 5743eb6f0de0SAdrian Chadd else 5744eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(sc, tid->an, tid); 5745eb6f0de0SAdrian Chadd 5746eb6f0de0SAdrian Chadd /* Not empty? Re-schedule */ 5747eb6f0de0SAdrian Chadd if (tid->axq_depth != 0) 5748eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 5749eb6f0de0SAdrian Chadd 5750b45a991eSAdrian Chadd /* 5751b45a991eSAdrian Chadd * Give the software queue time to aggregate more 5752b45a991eSAdrian Chadd * packets. If we aren't running aggregation then 5753b45a991eSAdrian Chadd * we should still limit the hardware queue depth. 5754b45a991eSAdrian Chadd */ 575572910f03SAdrian Chadd /* XXX TXQ locking */ 575672910f03SAdrian Chadd if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 575772910f03SAdrian Chadd break; 575872910f03SAdrian Chadd } 575972910f03SAdrian Chadd if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5760eb6f0de0SAdrian Chadd break; 5761eb6f0de0SAdrian Chadd } 57628ec9220eSAdrian Chadd loop_done: 5763eb6f0de0SAdrian Chadd /* 5764eb6f0de0SAdrian Chadd * If this was the last entry on the original list, stop. 5765eb6f0de0SAdrian Chadd * Otherwise nodes that have been rescheduled onto the end 5766eb6f0de0SAdrian Chadd * of the TID FIFO list will just keep being rescheduled. 576722a3aee6SAdrian Chadd * 576822a3aee6SAdrian Chadd * XXX What should we do about nodes that were paused 576922a3aee6SAdrian Chadd * but are pending a leaking frame in response to a ps-poll? 577022a3aee6SAdrian Chadd * They'll be put at the front of the list; so they'll 577122a3aee6SAdrian Chadd * prematurely trigger this condition! Ew. 5772eb6f0de0SAdrian Chadd */ 5773eb6f0de0SAdrian Chadd if (tid == last) 5774eb6f0de0SAdrian Chadd break; 5775eb6f0de0SAdrian Chadd } 5776eb6f0de0SAdrian Chadd } 5777eb6f0de0SAdrian Chadd 5778eb6f0de0SAdrian Chadd /* 5779eb6f0de0SAdrian Chadd * TX addba handling 5780eb6f0de0SAdrian Chadd */ 5781eb6f0de0SAdrian Chadd 5782eb6f0de0SAdrian Chadd /* 5783eb6f0de0SAdrian Chadd * Return net80211 TID struct pointer, or NULL for none 5784eb6f0de0SAdrian Chadd */ 5785eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu * 5786eb6f0de0SAdrian Chadd ath_tx_get_tx_tid(struct ath_node *an, int tid) 5787eb6f0de0SAdrian Chadd { 5788eb6f0de0SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 5789eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5790eb6f0de0SAdrian Chadd 5791eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5792eb6f0de0SAdrian Chadd return NULL; 5793eb6f0de0SAdrian Chadd 57942aa563dfSAdrian Chadd tap = &ni->ni_tx_ampdu[tid]; 5795eb6f0de0SAdrian Chadd return tap; 5796eb6f0de0SAdrian Chadd } 5797eb6f0de0SAdrian Chadd 5798eb6f0de0SAdrian Chadd /* 5799eb6f0de0SAdrian Chadd * Is AMPDU-TX running? 5800eb6f0de0SAdrian Chadd */ 5801eb6f0de0SAdrian Chadd static int 5802eb6f0de0SAdrian Chadd ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid) 5803eb6f0de0SAdrian Chadd { 5804eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5805eb6f0de0SAdrian Chadd 5806eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5807eb6f0de0SAdrian Chadd return 0; 5808eb6f0de0SAdrian Chadd 5809eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5810eb6f0de0SAdrian Chadd if (tap == NULL) 5811eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not running */ 5812eb6f0de0SAdrian Chadd 5813eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING); 5814eb6f0de0SAdrian Chadd } 5815eb6f0de0SAdrian Chadd 5816eb6f0de0SAdrian Chadd /* 5817eb6f0de0SAdrian Chadd * Is AMPDU-TX negotiation pending? 5818eb6f0de0SAdrian Chadd */ 5819eb6f0de0SAdrian Chadd static int 5820eb6f0de0SAdrian Chadd ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid) 5821eb6f0de0SAdrian Chadd { 5822eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5823eb6f0de0SAdrian Chadd 5824eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5825eb6f0de0SAdrian Chadd return 0; 5826eb6f0de0SAdrian Chadd 5827eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5828eb6f0de0SAdrian Chadd if (tap == NULL) 5829eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not pending */ 5830eb6f0de0SAdrian Chadd 5831eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND); 5832eb6f0de0SAdrian Chadd } 5833eb6f0de0SAdrian Chadd 5834eb6f0de0SAdrian Chadd /* 5835eb6f0de0SAdrian Chadd * Is AMPDU-TX pending for the given TID? 5836eb6f0de0SAdrian Chadd */ 5837eb6f0de0SAdrian Chadd 5838eb6f0de0SAdrian Chadd 5839eb6f0de0SAdrian Chadd /* 5840eb6f0de0SAdrian Chadd * Method to handle sending an ADDBA request. 5841eb6f0de0SAdrian Chadd * 5842eb6f0de0SAdrian Chadd * We tap this so the relevant flags can be set to pause the TID 5843eb6f0de0SAdrian Chadd * whilst waiting for the response. 5844eb6f0de0SAdrian Chadd * 5845eb6f0de0SAdrian Chadd * XXX there's no timeout handler we can override? 5846eb6f0de0SAdrian Chadd */ 5847eb6f0de0SAdrian Chadd int 5848eb6f0de0SAdrian Chadd ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5849eb6f0de0SAdrian Chadd int dialogtoken, int baparamset, int batimeout) 5850eb6f0de0SAdrian Chadd { 58513797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 58522aa563dfSAdrian Chadd int tid = tap->txa_tid; 5853eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5854eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5855eb6f0de0SAdrian Chadd 5856eb6f0de0SAdrian Chadd /* 5857eb6f0de0SAdrian Chadd * XXX danger Will Robinson! 5858eb6f0de0SAdrian Chadd * 5859eb6f0de0SAdrian Chadd * Although the taskqueue may be running and scheduling some more 5860eb6f0de0SAdrian Chadd * packets, these should all be _before_ the addba sequence number. 5861eb6f0de0SAdrian Chadd * However, net80211 will keep self-assigning sequence numbers 5862eb6f0de0SAdrian Chadd * until addba has been negotiated. 5863eb6f0de0SAdrian Chadd * 5864eb6f0de0SAdrian Chadd * In the past, these packets would be "paused" (which still works 5865eb6f0de0SAdrian Chadd * fine, as they're being scheduled to the driver in the same 5866eb6f0de0SAdrian Chadd * serialised method which is calling the addba request routine) 5867eb6f0de0SAdrian Chadd * and when the aggregation session begins, they'll be dequeued 5868eb6f0de0SAdrian Chadd * as aggregate packets and added to the BAW. However, now there's 5869eb6f0de0SAdrian Chadd * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these 5870eb6f0de0SAdrian Chadd * packets. Thus they never get included in the BAW tracking and 5871eb6f0de0SAdrian Chadd * this can cause the initial burst of packets after the addba 5872eb6f0de0SAdrian Chadd * negotiation to "hang", as they quickly fall outside the BAW. 5873eb6f0de0SAdrian Chadd * 5874eb6f0de0SAdrian Chadd * The "eventual" solution should be to tag these packets with 5875eb6f0de0SAdrian Chadd * dobaw. Although net80211 has given us a sequence number, 5876eb6f0de0SAdrian Chadd * it'll be "after" the left edge of the BAW and thus it'll 5877eb6f0de0SAdrian Chadd * fall within it. 5878eb6f0de0SAdrian Chadd */ 5879375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5880d3a6425bSAdrian Chadd /* 5881d3a6425bSAdrian Chadd * This is a bit annoying. Until net80211 HT code inherits some 5882d3a6425bSAdrian Chadd * (any) locking, we may have this called in parallel BUT only 5883d3a6425bSAdrian Chadd * one response/timeout will be called. Grr. 5884d3a6425bSAdrian Chadd */ 5885d3a6425bSAdrian Chadd if (atid->addba_tx_pending == 0) { 5886eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 5887d3a6425bSAdrian Chadd atid->addba_tx_pending = 1; 5888d3a6425bSAdrian Chadd } 5889375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5890eb6f0de0SAdrian Chadd 5891eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 58929b48fb4bSAdrian Chadd "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n", 58939b48fb4bSAdrian Chadd __func__, 58949b48fb4bSAdrian Chadd ni->ni_macaddr, 58959b48fb4bSAdrian Chadd ":", 58969b48fb4bSAdrian Chadd dialogtoken, baparamset, batimeout); 5897eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5898eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5899eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5900eb6f0de0SAdrian Chadd 5901eb6f0de0SAdrian Chadd return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, 5902eb6f0de0SAdrian Chadd batimeout); 5903eb6f0de0SAdrian Chadd } 5904eb6f0de0SAdrian Chadd 5905eb6f0de0SAdrian Chadd /* 5906eb6f0de0SAdrian Chadd * Handle an ADDBA response. 5907eb6f0de0SAdrian Chadd * 5908eb6f0de0SAdrian Chadd * We unpause the queue so TX'ing can resume. 5909eb6f0de0SAdrian Chadd * 5910eb6f0de0SAdrian Chadd * Any packets TX'ed from this point should be "aggregate" (whether 5911eb6f0de0SAdrian Chadd * aggregate or not) so the BAW is updated. 5912eb6f0de0SAdrian Chadd * 5913eb6f0de0SAdrian Chadd * Note! net80211 keeps self-assigning sequence numbers until 5914eb6f0de0SAdrian Chadd * ampdu is negotiated. This means the initially-negotiated BAW left 5915eb6f0de0SAdrian Chadd * edge won't match the ni->ni_txseq. 5916eb6f0de0SAdrian Chadd * 5917eb6f0de0SAdrian Chadd * So, being very dirty, the BAW left edge is "slid" here to match 5918eb6f0de0SAdrian Chadd * ni->ni_txseq. 5919eb6f0de0SAdrian Chadd * 5920eb6f0de0SAdrian Chadd * What likely SHOULD happen is that all packets subsequent to the 5921eb6f0de0SAdrian Chadd * addba request should be tagged as aggregate and queued as non-aggregate 5922eb6f0de0SAdrian Chadd * frames; thus updating the BAW. For now though, I'll just slide the 5923eb6f0de0SAdrian Chadd * window. 5924eb6f0de0SAdrian Chadd */ 5925eb6f0de0SAdrian Chadd int 5926eb6f0de0SAdrian Chadd ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5927eb6f0de0SAdrian Chadd int status, int code, int batimeout) 5928eb6f0de0SAdrian Chadd { 59293797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 59302aa563dfSAdrian Chadd int tid = tap->txa_tid; 5931eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5932eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5933eb6f0de0SAdrian Chadd int r; 5934eb6f0de0SAdrian Chadd 5935eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 59369b48fb4bSAdrian Chadd "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__, 59379b48fb4bSAdrian Chadd ni->ni_macaddr, 59389b48fb4bSAdrian Chadd ":", 5939eb6f0de0SAdrian Chadd status, code, batimeout); 5940eb6f0de0SAdrian Chadd 5941eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5942eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5943eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5944eb6f0de0SAdrian Chadd 5945eb6f0de0SAdrian Chadd /* 5946eb6f0de0SAdrian Chadd * Call this first, so the interface flags get updated 5947eb6f0de0SAdrian Chadd * before the TID is unpaused. Otherwise a race condition 5948eb6f0de0SAdrian Chadd * exists where the unpaused TID still doesn't yet have 5949eb6f0de0SAdrian Chadd * IEEE80211_AGGR_RUNNING set. 5950eb6f0de0SAdrian Chadd */ 5951eb6f0de0SAdrian Chadd r = sc->sc_addba_response(ni, tap, status, code, batimeout); 5952eb6f0de0SAdrian Chadd 5953375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5954d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 5955eb6f0de0SAdrian Chadd /* 5956eb6f0de0SAdrian Chadd * XXX dirty! 5957eb6f0de0SAdrian Chadd * Slide the BAW left edge to wherever net80211 left it for us. 5958eb6f0de0SAdrian Chadd * Read above for more information. 5959eb6f0de0SAdrian Chadd */ 5960eb6f0de0SAdrian Chadd tap->txa_start = ni->ni_txseqs[tid]; 5961eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 5962375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5963eb6f0de0SAdrian Chadd return r; 5964eb6f0de0SAdrian Chadd } 5965eb6f0de0SAdrian Chadd 5966eb6f0de0SAdrian Chadd 5967eb6f0de0SAdrian Chadd /* 5968eb6f0de0SAdrian Chadd * Stop ADDBA on a queue. 59698405fe86SAdrian Chadd * 59708405fe86SAdrian Chadd * This can be called whilst BAR TX is currently active on the queue, 59718405fe86SAdrian Chadd * so make sure this is unblocked before continuing. 5972eb6f0de0SAdrian Chadd */ 5973eb6f0de0SAdrian Chadd void 5974eb6f0de0SAdrian Chadd ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 5975eb6f0de0SAdrian Chadd { 59763797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 59772aa563dfSAdrian Chadd int tid = tap->txa_tid; 5978eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5979eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 598022780332SAdrian Chadd ath_bufhead bf_cq; 598122780332SAdrian Chadd struct ath_buf *bf; 5982eb6f0de0SAdrian Chadd 59839b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n", 59849b48fb4bSAdrian Chadd __func__, 59859b48fb4bSAdrian Chadd ni->ni_macaddr, 59869b48fb4bSAdrian Chadd ":"); 5987eb6f0de0SAdrian Chadd 59888405fe86SAdrian Chadd /* 59898405fe86SAdrian Chadd * Pause TID traffic early, so there aren't any races 59908405fe86SAdrian Chadd * Unblock the pending BAR held traffic, if it's currently paused. 59918405fe86SAdrian Chadd */ 5992375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5993eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 59948405fe86SAdrian Chadd if (atid->bar_wait) { 59958405fe86SAdrian Chadd /* 59968405fe86SAdrian Chadd * bar_unsuspend() expects bar_tx == 1, as it should be 59978405fe86SAdrian Chadd * called from the TX completion path. This quietens 59988405fe86SAdrian Chadd * the warning. It's cleared for us anyway. 59998405fe86SAdrian Chadd */ 60008405fe86SAdrian Chadd atid->bar_tx = 1; 60018405fe86SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 60028405fe86SAdrian Chadd } 6003375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6004eb6f0de0SAdrian Chadd 6005eb6f0de0SAdrian Chadd /* There's no need to hold the TXQ lock here */ 6006eb6f0de0SAdrian Chadd sc->sc_addba_stop(ni, tap); 6007eb6f0de0SAdrian Chadd 6008eb6f0de0SAdrian Chadd /* 60094dfd4507SAdrian Chadd * ath_tx_tid_cleanup will resume the TID if possible, otherwise 6010eb6f0de0SAdrian Chadd * it'll set the cleanup flag, and it'll be unpaused once 6011eb6f0de0SAdrian Chadd * things have been cleaned up. 6012eb6f0de0SAdrian Chadd */ 601322780332SAdrian Chadd TAILQ_INIT(&bf_cq); 601422780332SAdrian Chadd ATH_TX_LOCK(sc); 601559fbb530SAdrian Chadd 601659fbb530SAdrian Chadd /* 601759fbb530SAdrian Chadd * In case there's a followup call to this, only call it 601859fbb530SAdrian Chadd * if we don't have a cleanup in progress. 601959fbb530SAdrian Chadd * 602059fbb530SAdrian Chadd * Since we've paused the queue above, we need to make 602159fbb530SAdrian Chadd * sure we unpause if there's already a cleanup in 602259fbb530SAdrian Chadd * progress - it means something else is also doing 602359fbb530SAdrian Chadd * this stuff, so we don't need to also keep it paused. 602459fbb530SAdrian Chadd */ 602559fbb530SAdrian Chadd if (atid->cleanup_inprogress) { 602659fbb530SAdrian Chadd ath_tx_tid_resume(sc, atid); 602759fbb530SAdrian Chadd } else { 602822780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, tid, &bf_cq); 60295da3fc10SAdrian Chadd /* 60305da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required. 60315da3fc10SAdrian Chadd */ 60325da3fc10SAdrian Chadd if (! atid->cleanup_inprogress) 60335da3fc10SAdrian Chadd ath_tx_tid_resume(sc, atid); 603459fbb530SAdrian Chadd } 603522780332SAdrian Chadd ATH_TX_UNLOCK(sc); 603622780332SAdrian Chadd 603722780332SAdrian Chadd /* Handle completing frames and fail them */ 603822780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 603922780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 604022780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 604122780332SAdrian Chadd } 604222a3aee6SAdrian Chadd 604322780332SAdrian Chadd } 604422780332SAdrian Chadd 604522780332SAdrian Chadd /* 604622780332SAdrian Chadd * Handle a node reassociation. 604722780332SAdrian Chadd * 604822780332SAdrian Chadd * We may have a bunch of frames queued to the hardware; those need 604922780332SAdrian Chadd * to be marked as cleanup. 605022780332SAdrian Chadd */ 605122780332SAdrian Chadd void 605222780332SAdrian Chadd ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an) 605322780332SAdrian Chadd { 605422780332SAdrian Chadd struct ath_tid *tid; 605522780332SAdrian Chadd int i; 605622780332SAdrian Chadd ath_bufhead bf_cq; 605722780332SAdrian Chadd struct ath_buf *bf; 605822780332SAdrian Chadd 605922780332SAdrian Chadd TAILQ_INIT(&bf_cq); 606022780332SAdrian Chadd 606122780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 606222780332SAdrian Chadd 606322780332SAdrian Chadd ATH_TX_LOCK(sc); 606422780332SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 606522780332SAdrian Chadd tid = &an->an_tid[i]; 606622780332SAdrian Chadd if (tid->hwq_depth == 0) 606722780332SAdrian Chadd continue; 606822780332SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 606922780332SAdrian Chadd "%s: %6D: TID %d: cleaning up TID\n", 607022780332SAdrian Chadd __func__, 607122780332SAdrian Chadd an->an_node.ni_macaddr, 607222780332SAdrian Chadd ":", 607322780332SAdrian Chadd i); 607459fbb530SAdrian Chadd /* 607559fbb530SAdrian Chadd * In case there's a followup call to this, only call it 607659fbb530SAdrian Chadd * if we don't have a cleanup in progress. 607759fbb530SAdrian Chadd */ 607859fbb530SAdrian Chadd if (! tid->cleanup_inprogress) { 607959fbb530SAdrian Chadd ath_tx_tid_pause(sc, tid); 608022780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, i, &bf_cq); 60815da3fc10SAdrian Chadd /* 60825da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required. 60835da3fc10SAdrian Chadd */ 60845da3fc10SAdrian Chadd if (! tid->cleanup_inprogress) 60855da3fc10SAdrian Chadd ath_tx_tid_resume(sc, tid); 608622780332SAdrian Chadd } 608759fbb530SAdrian Chadd } 608822780332SAdrian Chadd ATH_TX_UNLOCK(sc); 608922780332SAdrian Chadd 609022780332SAdrian Chadd /* Handle completing frames and fail them */ 609122780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 609222780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 609322780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 609422780332SAdrian Chadd } 6095eb6f0de0SAdrian Chadd } 6096eb6f0de0SAdrian Chadd 6097eb6f0de0SAdrian Chadd /* 6098eb6f0de0SAdrian Chadd * Note: net80211 bar_timeout() doesn't call this function on BAR failure; 6099eb6f0de0SAdrian Chadd * it simply tears down the aggregation session. Ew. 6100eb6f0de0SAdrian Chadd * 6101eb6f0de0SAdrian Chadd * It however will call ieee80211_ampdu_stop() which will call 6102eb6f0de0SAdrian Chadd * ic->ic_addba_stop(). 6103eb6f0de0SAdrian Chadd * 6104eb6f0de0SAdrian Chadd * XXX This uses a hard-coded max BAR count value; the whole 6105eb6f0de0SAdrian Chadd * XXX BAR TX success or failure should be better handled! 6106eb6f0de0SAdrian Chadd */ 6107eb6f0de0SAdrian Chadd void 6108eb6f0de0SAdrian Chadd ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 6109eb6f0de0SAdrian Chadd int status) 6110eb6f0de0SAdrian Chadd { 61113797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 61122aa563dfSAdrian Chadd int tid = tap->txa_tid; 6113eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 6114eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 6115eb6f0de0SAdrian Chadd int attempts = tap->txa_attempts; 611642fdd8e7SAdrian Chadd int old_txa_start; 6117eb6f0de0SAdrian Chadd 61180e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 611942fdd8e7SAdrian Chadd "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n", 61200e22ed0eSAdrian Chadd __func__, 61219b48fb4bSAdrian Chadd ni->ni_macaddr, 61229b48fb4bSAdrian Chadd ":", 6123e60c4fc2SAdrian Chadd tap->txa_tid, 6124e60c4fc2SAdrian Chadd atid->tid, 61250e22ed0eSAdrian Chadd status, 612642fdd8e7SAdrian Chadd attempts, 612742fdd8e7SAdrian Chadd tap->txa_start, 612842fdd8e7SAdrian Chadd tap->txa_seqpending); 6129eb6f0de0SAdrian Chadd 6130eb6f0de0SAdrian Chadd /* Note: This may update the BAW details */ 613142fdd8e7SAdrian Chadd /* 613242fdd8e7SAdrian Chadd * XXX What if this does slide the BAW along? We need to somehow 613342fdd8e7SAdrian Chadd * XXX either fix things when it does happen, or prevent the 613442fdd8e7SAdrian Chadd * XXX seqpending value to be anything other than exactly what 613542fdd8e7SAdrian Chadd * XXX the hell we want! 613642fdd8e7SAdrian Chadd * 613742fdd8e7SAdrian Chadd * XXX So for now, how I do this inside the TX lock for now 613842fdd8e7SAdrian Chadd * XXX and just correct it afterwards? The below condition should 613942fdd8e7SAdrian Chadd * XXX never happen and if it does I need to fix all kinds of things. 614042fdd8e7SAdrian Chadd */ 614142fdd8e7SAdrian Chadd ATH_TX_LOCK(sc); 614242fdd8e7SAdrian Chadd old_txa_start = tap->txa_start; 6143eb6f0de0SAdrian Chadd sc->sc_bar_response(ni, tap, status); 614442fdd8e7SAdrian Chadd if (tap->txa_start != old_txa_start) { 614542fdd8e7SAdrian Chadd device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n", 614642fdd8e7SAdrian Chadd __func__, 614742fdd8e7SAdrian Chadd tid, 614842fdd8e7SAdrian Chadd tap->txa_start, 614942fdd8e7SAdrian Chadd old_txa_start); 615042fdd8e7SAdrian Chadd } 615142fdd8e7SAdrian Chadd tap->txa_start = old_txa_start; 615242fdd8e7SAdrian Chadd ATH_TX_UNLOCK(sc); 6153eb6f0de0SAdrian Chadd 6154eb6f0de0SAdrian Chadd /* Unpause the TID */ 6155eb6f0de0SAdrian Chadd /* 6156eb6f0de0SAdrian Chadd * XXX if this is attempt=50, the TID will be downgraded 6157eb6f0de0SAdrian Chadd * XXX to a non-aggregate session. So we must unpause the 6158eb6f0de0SAdrian Chadd * XXX TID here or it'll never be done. 6159088d8b81SAdrian Chadd * 6160088d8b81SAdrian Chadd * Also, don't call it if bar_tx/bar_wait are 0; something 6161088d8b81SAdrian Chadd * has beaten us to the punch? (XXX figure out what?) 6162eb6f0de0SAdrian Chadd */ 6163eb6f0de0SAdrian Chadd if (status == 0 || attempts == 50) { 6164375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6165088d8b81SAdrian Chadd if (atid->bar_tx == 0 || atid->bar_wait == 0) 616683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6167088d8b81SAdrian Chadd "%s: huh? bar_tx=%d, bar_wait=%d\n", 6168088d8b81SAdrian Chadd __func__, 6169088d8b81SAdrian Chadd atid->bar_tx, atid->bar_wait); 6170088d8b81SAdrian Chadd else 617188b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 6172375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6173eb6f0de0SAdrian Chadd } 6174eb6f0de0SAdrian Chadd } 6175eb6f0de0SAdrian Chadd 6176eb6f0de0SAdrian Chadd /* 6177eb6f0de0SAdrian Chadd * This is called whenever the pending ADDBA request times out. 6178eb6f0de0SAdrian Chadd * Unpause and reschedule the TID. 6179eb6f0de0SAdrian Chadd */ 6180eb6f0de0SAdrian Chadd void 6181eb6f0de0SAdrian Chadd ath_addba_response_timeout(struct ieee80211_node *ni, 6182eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap) 6183eb6f0de0SAdrian Chadd { 61843797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 61852aa563dfSAdrian Chadd int tid = tap->txa_tid; 6186eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 6187eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 6188eb6f0de0SAdrian Chadd 6189eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 61906d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called; resuming\n", 61919b48fb4bSAdrian Chadd __func__, 61929b48fb4bSAdrian Chadd ni->ni_macaddr, 61936d07d3e0SAdrian Chadd ":", 61946d07d3e0SAdrian Chadd tid); 6195eb6f0de0SAdrian Chadd 6196375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6197d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 6198375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6199d3a6425bSAdrian Chadd 6200eb6f0de0SAdrian Chadd /* Note: This updates the aggregate state to (again) pending */ 6201eb6f0de0SAdrian Chadd sc->sc_addba_response_timeout(ni, tap); 6202eb6f0de0SAdrian Chadd 6203eb6f0de0SAdrian Chadd /* Unpause the TID; which reschedules it */ 6204375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6205eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 6206375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6207eb6f0de0SAdrian Chadd } 62083fdfc330SAdrian Chadd 62090eb81626SAdrian Chadd /* 62100eb81626SAdrian Chadd * Check if a node is asleep or not. 62110eb81626SAdrian Chadd */ 6212548a605dSAdrian Chadd int 62130eb81626SAdrian Chadd ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an) 62140eb81626SAdrian Chadd { 62150eb81626SAdrian Chadd 621622780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 62170eb81626SAdrian Chadd 62180eb81626SAdrian Chadd return (an->an_is_powersave); 62190eb81626SAdrian Chadd } 62200eb81626SAdrian Chadd 62210eb81626SAdrian Chadd /* 62220eb81626SAdrian Chadd * Mark a node as currently "in powersaving." 62230eb81626SAdrian Chadd * This suspends all traffic on the node. 62240eb81626SAdrian Chadd * 62250eb81626SAdrian Chadd * This must be called with the node/tx locks free. 62260eb81626SAdrian Chadd * 62270eb81626SAdrian Chadd * XXX TODO: the locking silliness below is due to how the node 62280eb81626SAdrian Chadd * locking currently works. Right now, the node lock is grabbed 62290eb81626SAdrian Chadd * to do rate control lookups and these are done with the TX 62300eb81626SAdrian Chadd * queue lock held. This means the node lock can't be grabbed 62310eb81626SAdrian Chadd * first here or a LOR will occur. 62320eb81626SAdrian Chadd * 62330eb81626SAdrian Chadd * Eventually (hopefully!) the TX path code will only grab 62340eb81626SAdrian Chadd * the TXQ lock when transmitting and the ath_node lock when 62350eb81626SAdrian Chadd * doing node/TID operations. There are other complications - 62360eb81626SAdrian Chadd * the sched/unsched operations involve walking the per-txq 62370eb81626SAdrian Chadd * 'active tid' list and this requires both locks to be held. 62380eb81626SAdrian Chadd */ 62390eb81626SAdrian Chadd void 62400eb81626SAdrian Chadd ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an) 62410eb81626SAdrian Chadd { 62420eb81626SAdrian Chadd struct ath_tid *atid; 62430eb81626SAdrian Chadd struct ath_txq *txq; 62440eb81626SAdrian Chadd int tid; 62450eb81626SAdrian Chadd 624622780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 62470eb81626SAdrian Chadd 62480eb81626SAdrian Chadd /* Suspend all traffic on the node */ 6249375307d4SAdrian Chadd ATH_TX_LOCK(sc); 625022a3aee6SAdrian Chadd 625122a3aee6SAdrian Chadd if (an->an_is_powersave) { 625283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 625322a3aee6SAdrian Chadd "%s: %6D: node was already asleep!\n", 625483bbd5ebSRui Paulo __func__, an->an_node.ni_macaddr, ":"); 625522a3aee6SAdrian Chadd ATH_TX_UNLOCK(sc); 625622a3aee6SAdrian Chadd return; 625722a3aee6SAdrian Chadd } 625822a3aee6SAdrian Chadd 62590eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 62600eb81626SAdrian Chadd atid = &an->an_tid[tid]; 62610eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 62620eb81626SAdrian Chadd 62630eb81626SAdrian Chadd ath_tx_tid_pause(sc, atid); 62640eb81626SAdrian Chadd } 62650eb81626SAdrian Chadd 62660eb81626SAdrian Chadd /* Mark node as in powersaving */ 62670eb81626SAdrian Chadd an->an_is_powersave = 1; 62680eb81626SAdrian Chadd 626922780332SAdrian Chadd ATH_TX_UNLOCK(sc); 62700eb81626SAdrian Chadd } 62710eb81626SAdrian Chadd 62720eb81626SAdrian Chadd /* 62730eb81626SAdrian Chadd * Mark a node as currently "awake." 62740eb81626SAdrian Chadd * This resumes all traffic to the node. 62750eb81626SAdrian Chadd */ 62760eb81626SAdrian Chadd void 62770eb81626SAdrian Chadd ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an) 62780eb81626SAdrian Chadd { 62790eb81626SAdrian Chadd struct ath_tid *atid; 62800eb81626SAdrian Chadd struct ath_txq *txq; 62810eb81626SAdrian Chadd int tid; 62820eb81626SAdrian Chadd 628322780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 628422780332SAdrian Chadd 628522780332SAdrian Chadd ATH_TX_LOCK(sc); 62860eb81626SAdrian Chadd 628722a3aee6SAdrian Chadd /* !? */ 62880eb81626SAdrian Chadd if (an->an_is_powersave == 0) { 628922780332SAdrian Chadd ATH_TX_UNLOCK(sc); 629083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 62910eb81626SAdrian Chadd "%s: an=%p: node was already awake\n", 62920eb81626SAdrian Chadd __func__, an); 62930eb81626SAdrian Chadd return; 62940eb81626SAdrian Chadd } 62950eb81626SAdrian Chadd 62960eb81626SAdrian Chadd /* Mark node as awake */ 62970eb81626SAdrian Chadd an->an_is_powersave = 0; 629822a3aee6SAdrian Chadd /* 629922a3aee6SAdrian Chadd * Clear any pending leaked frame requests 630022a3aee6SAdrian Chadd */ 630122a3aee6SAdrian Chadd an->an_leak_count = 0; 63020eb81626SAdrian Chadd 63030eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 63040eb81626SAdrian Chadd atid = &an->an_tid[tid]; 63050eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 63060eb81626SAdrian Chadd 63070eb81626SAdrian Chadd ath_tx_tid_resume(sc, atid); 63080eb81626SAdrian Chadd } 6309375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 63100eb81626SAdrian Chadd } 63110eb81626SAdrian Chadd 63123fdfc330SAdrian Chadd static int 63133fdfc330SAdrian Chadd ath_legacy_dma_txsetup(struct ath_softc *sc) 63143fdfc330SAdrian Chadd { 63153fdfc330SAdrian Chadd 63163fdfc330SAdrian Chadd /* nothing new needed */ 63173fdfc330SAdrian Chadd return (0); 63183fdfc330SAdrian Chadd } 63193fdfc330SAdrian Chadd 63203fdfc330SAdrian Chadd static int 63213fdfc330SAdrian Chadd ath_legacy_dma_txteardown(struct ath_softc *sc) 63223fdfc330SAdrian Chadd { 63233fdfc330SAdrian Chadd 63243fdfc330SAdrian Chadd /* nothing new needed */ 63253fdfc330SAdrian Chadd return (0); 63263fdfc330SAdrian Chadd } 63273fdfc330SAdrian Chadd 63283fdfc330SAdrian Chadd void 63293fdfc330SAdrian Chadd ath_xmit_setup_legacy(struct ath_softc *sc) 63303fdfc330SAdrian Chadd { 63311006fc0cSAdrian Chadd /* 63321006fc0cSAdrian Chadd * For now, just set the descriptor length to sizeof(ath_desc); 63331006fc0cSAdrian Chadd * worry about extracting the real length out of the HAL later. 63341006fc0cSAdrian Chadd */ 63351006fc0cSAdrian Chadd sc->sc_tx_desclen = sizeof(struct ath_desc); 6336bb327d28SAdrian Chadd sc->sc_tx_statuslen = sizeof(struct ath_desc); 63371006fc0cSAdrian Chadd sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */ 63383fdfc330SAdrian Chadd 63393fdfc330SAdrian Chadd sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup; 63403fdfc330SAdrian Chadd sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown; 6341f8418db5SAdrian Chadd sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func; 6342746bab5bSAdrian Chadd 6343746bab5bSAdrian Chadd sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart; 6344746bab5bSAdrian Chadd sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff; 6345788e6aa9SAdrian Chadd 6346788e6aa9SAdrian Chadd sc->sc_tx.xmit_drain = ath_legacy_tx_drain; 63473fdfc330SAdrian Chadd } 6348