1b8e788a5SAdrian Chadd /*- 2b8e788a5SAdrian Chadd * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3c6e9cee2SAdrian Chadd * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 4b8e788a5SAdrian Chadd * All rights reserved. 5b8e788a5SAdrian Chadd * 6b8e788a5SAdrian Chadd * Redistribution and use in source and binary forms, with or without 7b8e788a5SAdrian Chadd * modification, are permitted provided that the following conditions 8b8e788a5SAdrian Chadd * are met: 9b8e788a5SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 10b8e788a5SAdrian Chadd * notice, this list of conditions and the following disclaimer, 11b8e788a5SAdrian Chadd * without modification. 12b8e788a5SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13b8e788a5SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14b8e788a5SAdrian Chadd * redistribution must be conditioned upon including a substantially 15b8e788a5SAdrian Chadd * similar Disclaimer requirement for further binary redistribution. 16b8e788a5SAdrian Chadd * 17b8e788a5SAdrian Chadd * NO WARRANTY 18b8e788a5SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19b8e788a5SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20b8e788a5SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21b8e788a5SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22b8e788a5SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23b8e788a5SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24b8e788a5SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25b8e788a5SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26b8e788a5SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27b8e788a5SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28b8e788a5SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES. 29b8e788a5SAdrian Chadd */ 30b8e788a5SAdrian Chadd 31b8e788a5SAdrian Chadd #include <sys/cdefs.h> 32b8e788a5SAdrian Chadd __FBSDID("$FreeBSD$"); 33b8e788a5SAdrian Chadd 34b8e788a5SAdrian Chadd /* 35b8e788a5SAdrian Chadd * Driver for the Atheros Wireless LAN controller. 36b8e788a5SAdrian Chadd * 37b8e788a5SAdrian Chadd * This software is derived from work of Atsushi Onoe; his contribution 38b8e788a5SAdrian Chadd * is greatly appreciated. 39b8e788a5SAdrian Chadd */ 40b8e788a5SAdrian Chadd 41b8e788a5SAdrian Chadd #include "opt_inet.h" 42b8e788a5SAdrian Chadd #include "opt_ath.h" 43b8e788a5SAdrian Chadd #include "opt_wlan.h" 44b8e788a5SAdrian Chadd 45b8e788a5SAdrian Chadd #include <sys/param.h> 46b8e788a5SAdrian Chadd #include <sys/systm.h> 47b8e788a5SAdrian Chadd #include <sys/sysctl.h> 48b8e788a5SAdrian Chadd #include <sys/mbuf.h> 49b8e788a5SAdrian Chadd #include <sys/malloc.h> 50b8e788a5SAdrian Chadd #include <sys/lock.h> 51b8e788a5SAdrian Chadd #include <sys/mutex.h> 52b8e788a5SAdrian Chadd #include <sys/kernel.h> 53b8e788a5SAdrian Chadd #include <sys/socket.h> 54b8e788a5SAdrian Chadd #include <sys/sockio.h> 55b8e788a5SAdrian Chadd #include <sys/errno.h> 56b8e788a5SAdrian Chadd #include <sys/callout.h> 57b8e788a5SAdrian Chadd #include <sys/bus.h> 58b8e788a5SAdrian Chadd #include <sys/endian.h> 59b8e788a5SAdrian Chadd #include <sys/kthread.h> 60b8e788a5SAdrian Chadd #include <sys/taskqueue.h> 61b8e788a5SAdrian Chadd #include <sys/priv.h> 62f431664cSOlivier Houchard #include <sys/ktr.h> 63b8e788a5SAdrian Chadd 64b8e788a5SAdrian Chadd #include <machine/bus.h> 65b8e788a5SAdrian Chadd 66b8e788a5SAdrian Chadd #include <net/if.h> 6776039bc8SGleb Smirnoff #include <net/if_var.h> 68b8e788a5SAdrian Chadd #include <net/if_dl.h> 69b8e788a5SAdrian Chadd #include <net/if_media.h> 70b8e788a5SAdrian Chadd #include <net/if_types.h> 71b8e788a5SAdrian Chadd #include <net/if_arp.h> 72b8e788a5SAdrian Chadd #include <net/ethernet.h> 73b8e788a5SAdrian Chadd #include <net/if_llc.h> 74b8e788a5SAdrian Chadd 75b8e788a5SAdrian Chadd #include <net80211/ieee80211_var.h> 76b8e788a5SAdrian Chadd #include <net80211/ieee80211_regdomain.h> 77b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_SUPERG 78b8e788a5SAdrian Chadd #include <net80211/ieee80211_superg.h> 79b8e788a5SAdrian Chadd #endif 80b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 81b8e788a5SAdrian Chadd #include <net80211/ieee80211_tdma.h> 82b8e788a5SAdrian Chadd #endif 83eb6f0de0SAdrian Chadd #include <net80211/ieee80211_ht.h> 84b8e788a5SAdrian Chadd 85b8e788a5SAdrian Chadd #include <net/bpf.h> 86b8e788a5SAdrian Chadd 87b8e788a5SAdrian Chadd #ifdef INET 88b8e788a5SAdrian Chadd #include <netinet/in.h> 89b8e788a5SAdrian Chadd #include <netinet/if_ether.h> 90b8e788a5SAdrian Chadd #endif 91b8e788a5SAdrian Chadd 92b8e788a5SAdrian Chadd #include <dev/ath/if_athvar.h> 93b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 94b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_diagcodes.h> 95b8e788a5SAdrian Chadd 96b8e788a5SAdrian Chadd #include <dev/ath/if_ath_debug.h> 97b8e788a5SAdrian Chadd 98b8e788a5SAdrian Chadd #ifdef ATH_TX99_DIAG 99b8e788a5SAdrian Chadd #include <dev/ath/ath_tx99/ath_tx99.h> 100b8e788a5SAdrian Chadd #endif 101b8e788a5SAdrian Chadd 102b8e788a5SAdrian Chadd #include <dev/ath/if_ath_misc.h> 103b8e788a5SAdrian Chadd #include <dev/ath/if_ath_tx.h> 104c1782ce0SAdrian Chadd #include <dev/ath/if_ath_tx_ht.h> 105b8e788a5SAdrian Chadd 106b69b0dccSAdrian Chadd #ifdef ATH_DEBUG_ALQ 107b69b0dccSAdrian Chadd #include <dev/ath/if_ath_alq.h> 108b69b0dccSAdrian Chadd #endif 109b69b0dccSAdrian Chadd 11081a82688SAdrian Chadd /* 111eb6f0de0SAdrian Chadd * How many retries to perform in software 112eb6f0de0SAdrian Chadd */ 113eb6f0de0SAdrian Chadd #define SWMAX_RETRIES 10 114eb6f0de0SAdrian Chadd 1157403d1b9SAdrian Chadd /* 1167403d1b9SAdrian Chadd * What queue to throw the non-QoS TID traffic into 1177403d1b9SAdrian Chadd */ 1187403d1b9SAdrian Chadd #define ATH_NONQOS_TID_AC WME_AC_VO 1197403d1b9SAdrian Chadd 1200eb81626SAdrian Chadd #if 0 1210eb81626SAdrian Chadd static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an); 1220eb81626SAdrian Chadd #endif 123eb6f0de0SAdrian Chadd static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, 124eb6f0de0SAdrian Chadd int tid); 125eb6f0de0SAdrian Chadd static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, 126eb6f0de0SAdrian Chadd int tid); 127a108d2d6SAdrian Chadd static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc, 128a108d2d6SAdrian Chadd struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0); 129eb6f0de0SAdrian Chadd static int ath_tx_action_frame_override_queue(struct ath_softc *sc, 130eb6f0de0SAdrian Chadd struct ieee80211_node *ni, struct mbuf *m0, int *tid); 131f1bc738eSAdrian Chadd static struct ath_buf * 132f1bc738eSAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 133f1bc738eSAdrian Chadd struct ath_tid *tid, struct ath_buf *bf); 134eb6f0de0SAdrian Chadd 135bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 136bb327d28SAdrian Chadd void 137bb327d28SAdrian Chadd ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first) 138bb327d28SAdrian Chadd { 139bb327d28SAdrian Chadd struct ath_buf *bf; 140bb327d28SAdrian Chadd int i, n; 141bb327d28SAdrian Chadd const char *ds; 142bb327d28SAdrian Chadd 143bb327d28SAdrian Chadd /* XXX we should skip out early if debugging isn't enabled! */ 144bb327d28SAdrian Chadd bf = bf_first; 145bb327d28SAdrian Chadd 146bb327d28SAdrian Chadd while (bf != NULL) { 147bb327d28SAdrian Chadd /* XXX should ensure bf_nseg > 0! */ 148bb327d28SAdrian Chadd if (bf->bf_nseg == 0) 149bb327d28SAdrian Chadd break; 150bb327d28SAdrian Chadd n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1; 151bb327d28SAdrian Chadd for (i = 0, ds = (const char *) bf->bf_desc; 152bb327d28SAdrian Chadd i < n; 153bb327d28SAdrian Chadd i++, ds += sc->sc_tx_desclen) { 154bb327d28SAdrian Chadd if_ath_alq_post(&sc->sc_alq, 155bb327d28SAdrian Chadd ATH_ALQ_EDMA_TXDESC, 156bb327d28SAdrian Chadd sc->sc_tx_desclen, 157bb327d28SAdrian Chadd ds); 158bb327d28SAdrian Chadd } 159bb327d28SAdrian Chadd bf = bf->bf_next; 160bb327d28SAdrian Chadd } 161bb327d28SAdrian Chadd } 162bb327d28SAdrian Chadd #endif /* ATH_DEBUG_ALQ */ 163bb327d28SAdrian Chadd 164eb6f0de0SAdrian Chadd /* 16581a82688SAdrian Chadd * Whether to use the 11n rate scenario functions or not 16681a82688SAdrian Chadd */ 16781a82688SAdrian Chadd static inline int 16881a82688SAdrian Chadd ath_tx_is_11n(struct ath_softc *sc) 16981a82688SAdrian Chadd { 1704ddf2cc3SAdrian Chadd return ((sc->sc_ah->ah_magic == 0x20065416) || 1714ddf2cc3SAdrian Chadd (sc->sc_ah->ah_magic == 0x19741014)); 17281a82688SAdrian Chadd } 17381a82688SAdrian Chadd 174eb6f0de0SAdrian Chadd /* 175eb6f0de0SAdrian Chadd * Obtain the current TID from the given frame. 176eb6f0de0SAdrian Chadd * 177eb6f0de0SAdrian Chadd * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.) 178eb6f0de0SAdrian Chadd * This has implications for which AC/priority the packet is placed 179eb6f0de0SAdrian Chadd * in. 180eb6f0de0SAdrian Chadd */ 181eb6f0de0SAdrian Chadd static int 182eb6f0de0SAdrian Chadd ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0) 183eb6f0de0SAdrian Chadd { 184eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 185eb6f0de0SAdrian Chadd int pri = M_WME_GETAC(m0); 186eb6f0de0SAdrian Chadd 187eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 188eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 189eb6f0de0SAdrian Chadd return IEEE80211_NONQOS_TID; 190eb6f0de0SAdrian Chadd else 191eb6f0de0SAdrian Chadd return WME_AC_TO_TID(pri); 192eb6f0de0SAdrian Chadd } 193eb6f0de0SAdrian Chadd 194f1bc738eSAdrian Chadd static void 195f1bc738eSAdrian Chadd ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf) 196f1bc738eSAdrian Chadd { 197f1bc738eSAdrian Chadd struct ieee80211_frame *wh; 198f1bc738eSAdrian Chadd 199f1bc738eSAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 200f1bc738eSAdrian Chadd /* Only update/resync if needed */ 201f1bc738eSAdrian Chadd if (bf->bf_state.bfs_isretried == 0) { 202f1bc738eSAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_RETRY; 203f1bc738eSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 204f1bc738eSAdrian Chadd BUS_DMASYNC_PREWRITE); 205f1bc738eSAdrian Chadd } 206f1bc738eSAdrian Chadd bf->bf_state.bfs_isretried = 1; 207f1bc738eSAdrian Chadd bf->bf_state.bfs_retries ++; 208f1bc738eSAdrian Chadd } 209f1bc738eSAdrian Chadd 210eb6f0de0SAdrian Chadd /* 211eb6f0de0SAdrian Chadd * Determine what the correct AC queue for the given frame 212eb6f0de0SAdrian Chadd * should be. 213eb6f0de0SAdrian Chadd * 214eb6f0de0SAdrian Chadd * This code assumes that the TIDs map consistently to 215eb6f0de0SAdrian Chadd * the underlying hardware (or software) ath_txq. 216eb6f0de0SAdrian Chadd * Since the sender may try to set an AC which is 217eb6f0de0SAdrian Chadd * arbitrary, non-QoS TIDs may end up being put on 218eb6f0de0SAdrian Chadd * completely different ACs. There's no way to put a 219eb6f0de0SAdrian Chadd * TID into multiple ath_txq's for scheduling, so 220eb6f0de0SAdrian Chadd * for now we override the AC/TXQ selection and set 221eb6f0de0SAdrian Chadd * non-QOS TID frames into the BE queue. 222eb6f0de0SAdrian Chadd * 223eb6f0de0SAdrian Chadd * This may be completely incorrect - specifically, 224eb6f0de0SAdrian Chadd * some management frames may end up out of order 225eb6f0de0SAdrian Chadd * compared to the QoS traffic they're controlling. 226eb6f0de0SAdrian Chadd * I'll look into this later. 227eb6f0de0SAdrian Chadd */ 228eb6f0de0SAdrian Chadd static int 229eb6f0de0SAdrian Chadd ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0) 230eb6f0de0SAdrian Chadd { 231eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 232eb6f0de0SAdrian Chadd int pri = M_WME_GETAC(m0); 233eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *); 234eb6f0de0SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh)) 235eb6f0de0SAdrian Chadd return pri; 236eb6f0de0SAdrian Chadd 2377403d1b9SAdrian Chadd return ATH_NONQOS_TID_AC; 238eb6f0de0SAdrian Chadd } 239eb6f0de0SAdrian Chadd 240b8e788a5SAdrian Chadd void 241b8e788a5SAdrian Chadd ath_txfrag_cleanup(struct ath_softc *sc, 242b8e788a5SAdrian Chadd ath_bufhead *frags, struct ieee80211_node *ni) 243b8e788a5SAdrian Chadd { 244b8e788a5SAdrian Chadd struct ath_buf *bf, *next; 245b8e788a5SAdrian Chadd 246b8e788a5SAdrian Chadd ATH_TXBUF_LOCK_ASSERT(sc); 247b8e788a5SAdrian Chadd 2486b349e5aSAdrian Chadd TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) { 249b8e788a5SAdrian Chadd /* NB: bf assumed clean */ 2506b349e5aSAdrian Chadd TAILQ_REMOVE(frags, bf, bf_list); 251e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 252b8e788a5SAdrian Chadd ieee80211_node_decref(ni); 253b8e788a5SAdrian Chadd } 254b8e788a5SAdrian Chadd } 255b8e788a5SAdrian Chadd 256b8e788a5SAdrian Chadd /* 257b8e788a5SAdrian Chadd * Setup xmit of a fragmented frame. Allocate a buffer 258b8e788a5SAdrian Chadd * for each frag and bump the node reference count to 259b8e788a5SAdrian Chadd * reflect the held reference to be setup by ath_tx_start. 260b8e788a5SAdrian Chadd */ 261b8e788a5SAdrian Chadd int 262b8e788a5SAdrian Chadd ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags, 263b8e788a5SAdrian Chadd struct mbuf *m0, struct ieee80211_node *ni) 264b8e788a5SAdrian Chadd { 265b8e788a5SAdrian Chadd struct mbuf *m; 266b8e788a5SAdrian Chadd struct ath_buf *bf; 267b8e788a5SAdrian Chadd 268b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 269b8e788a5SAdrian Chadd for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) { 270af33d486SAdrian Chadd /* XXX non-management? */ 271af33d486SAdrian Chadd bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL); 272b8e788a5SAdrian Chadd if (bf == NULL) { /* out of buffers, cleanup */ 27383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n", 274b43facbfSAdrian Chadd __func__); 275b8e788a5SAdrian Chadd ath_txfrag_cleanup(sc, frags, ni); 276b8e788a5SAdrian Chadd break; 277b8e788a5SAdrian Chadd } 278b8e788a5SAdrian Chadd ieee80211_node_incref(ni); 2796b349e5aSAdrian Chadd TAILQ_INSERT_TAIL(frags, bf, bf_list); 280b8e788a5SAdrian Chadd } 281b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 282b8e788a5SAdrian Chadd 2836b349e5aSAdrian Chadd return !TAILQ_EMPTY(frags); 284b8e788a5SAdrian Chadd } 285b8e788a5SAdrian Chadd 286b8e788a5SAdrian Chadd static int 287b8e788a5SAdrian Chadd ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0) 288b8e788a5SAdrian Chadd { 289b8e788a5SAdrian Chadd struct mbuf *m; 290b8e788a5SAdrian Chadd int error; 291b8e788a5SAdrian Chadd 292b8e788a5SAdrian Chadd /* 293b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 294b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 295b8e788a5SAdrian Chadd */ 296b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 297b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 298b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 299b8e788a5SAdrian Chadd if (error == EFBIG) { 300b8e788a5SAdrian Chadd /* XXX packet requires too many descriptors */ 30109067b6eSAdrian Chadd bf->bf_nseg = ATH_MAX_SCATTER + 1; 302b8e788a5SAdrian Chadd } else if (error != 0) { 303b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 304d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 305b8e788a5SAdrian Chadd return error; 306b8e788a5SAdrian Chadd } 307b8e788a5SAdrian Chadd /* 308b8e788a5SAdrian Chadd * Discard null packets and check for packets that 309b8e788a5SAdrian Chadd * require too many TX descriptors. We try to convert 310b8e788a5SAdrian Chadd * the latter to a cluster. 311b8e788a5SAdrian Chadd */ 31209067b6eSAdrian Chadd if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */ 313b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_linear++; 31409067b6eSAdrian Chadd m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER); 315b8e788a5SAdrian Chadd if (m == NULL) { 316d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 317b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nombuf++; 318b8e788a5SAdrian Chadd return ENOMEM; 319b8e788a5SAdrian Chadd } 320b8e788a5SAdrian Chadd m0 = m; 321b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 322b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg, 323b8e788a5SAdrian Chadd BUS_DMA_NOWAIT); 324b8e788a5SAdrian Chadd if (error != 0) { 325b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++; 326d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 327b8e788a5SAdrian Chadd return error; 328b8e788a5SAdrian Chadd } 32909067b6eSAdrian Chadd KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER, 330b8e788a5SAdrian Chadd ("too many segments after defrag; nseg %u", bf->bf_nseg)); 331b8e788a5SAdrian Chadd } else if (bf->bf_nseg == 0) { /* null packet, discard */ 332b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nodata++; 333d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 334b8e788a5SAdrian Chadd return EIO; 335b8e788a5SAdrian Chadd } 336b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n", 337b8e788a5SAdrian Chadd __func__, m0, m0->m_pkthdr.len); 338b8e788a5SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 339b8e788a5SAdrian Chadd bf->bf_m = m0; 340b8e788a5SAdrian Chadd 341b8e788a5SAdrian Chadd return 0; 342b8e788a5SAdrian Chadd } 343b8e788a5SAdrian Chadd 3446edf1dc7SAdrian Chadd /* 3456e84772fSAdrian Chadd * Chain together segments+descriptors for a frame - 11n or otherwise. 3466e84772fSAdrian Chadd * 3476e84772fSAdrian Chadd * For aggregates, this is called on each frame in the aggregate. 3486edf1dc7SAdrian Chadd */ 349b8e788a5SAdrian Chadd static void 3506e84772fSAdrian Chadd ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0, 3516e84772fSAdrian Chadd struct ath_buf *bf, int is_aggr, int is_first_subframe, 3526e84772fSAdrian Chadd int is_last_subframe) 353b8e788a5SAdrian Chadd { 354b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 3556e84772fSAdrian Chadd char *ds; 3562b200bb4SAdrian Chadd int i, bp, dsp; 35746634305SAdrian Chadd HAL_DMA_ADDR bufAddrList[4]; 35846634305SAdrian Chadd uint32_t segLenList[4]; 3592b200bb4SAdrian Chadd int numTxMaps = 1; 360e2137b86SAdrian Chadd int isFirstDesc = 1; 36146634305SAdrian Chadd 3623d9b1596SAdrian Chadd /* 3633d9b1596SAdrian Chadd * XXX There's txdma and txdma_mgmt; the descriptor 3643d9b1596SAdrian Chadd * sizes must match. 3653d9b1596SAdrian Chadd */ 3663d9b1596SAdrian Chadd struct ath_descdma *dd = &sc->sc_txdma; 367b8e788a5SAdrian Chadd 368b8e788a5SAdrian Chadd /* 369b8e788a5SAdrian Chadd * Fillin the remainder of the descriptor info. 370b8e788a5SAdrian Chadd */ 37146634305SAdrian Chadd 3722b200bb4SAdrian Chadd /* 373378a752fSAdrian Chadd * We need the number of TX data pointers in each descriptor. 374378a752fSAdrian Chadd * EDMA and later chips support 4 TX buffers per descriptor; 375378a752fSAdrian Chadd * previous chips just support one. 3762b200bb4SAdrian Chadd */ 377378a752fSAdrian Chadd numTxMaps = sc->sc_tx_nmaps; 3782b200bb4SAdrian Chadd 3792b200bb4SAdrian Chadd /* 3802b200bb4SAdrian Chadd * For EDMA and later chips ensure the TX map is fully populated 3812b200bb4SAdrian Chadd * before advancing to the next descriptor. 3822b200bb4SAdrian Chadd */ 3836e84772fSAdrian Chadd ds = (char *) bf->bf_desc; 3842b200bb4SAdrian Chadd bp = dsp = 0; 3852b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 3862b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 3872b200bb4SAdrian Chadd for (i = 0; i < bf->bf_nseg; i++) { 3882b200bb4SAdrian Chadd bufAddrList[bp] = bf->bf_segs[i].ds_addr; 3892b200bb4SAdrian Chadd segLenList[bp] = bf->bf_segs[i].ds_len; 3902b200bb4SAdrian Chadd bp++; 3912b200bb4SAdrian Chadd 3922b200bb4SAdrian Chadd /* 3932b200bb4SAdrian Chadd * Go to the next segment if this isn't the last segment 3942b200bb4SAdrian Chadd * and there's space in the current TX map. 3952b200bb4SAdrian Chadd */ 3962b200bb4SAdrian Chadd if ((i != bf->bf_nseg - 1) && (bp < numTxMaps)) 3972b200bb4SAdrian Chadd continue; 3982b200bb4SAdrian Chadd 3992b200bb4SAdrian Chadd /* 4002b200bb4SAdrian Chadd * Last segment or we're out of buffer pointers. 4012b200bb4SAdrian Chadd */ 4022b200bb4SAdrian Chadd bp = 0; 40346634305SAdrian Chadd 404b8e788a5SAdrian Chadd if (i == bf->bf_nseg - 1) 40542083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 406b8e788a5SAdrian Chadd else 40742083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 4082b200bb4SAdrian Chadd bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 40946634305SAdrian Chadd 41046634305SAdrian Chadd /* 411fc56c9c5SAdrian Chadd * XXX This assumes that bfs_txq is the actual destination 412fc56c9c5SAdrian Chadd * hardware queue at this point. It may not have been 413fc56c9c5SAdrian Chadd * assigned, it may actually be pointing to the multicast 414fc56c9c5SAdrian Chadd * software TXQ id. These must be fixed! 41546634305SAdrian Chadd */ 41642083b3dSAdrian Chadd ath_hal_filltxdesc(ah, (struct ath_desc *) ds 41746634305SAdrian Chadd , bufAddrList 41846634305SAdrian Chadd , segLenList 4192b200bb4SAdrian Chadd , bf->bf_descid /* XXX desc id */ 420fc56c9c5SAdrian Chadd , bf->bf_state.bfs_tx_queue 421e2137b86SAdrian Chadd , isFirstDesc /* first segment */ 422b8e788a5SAdrian Chadd , i == bf->bf_nseg - 1 /* last segment */ 42342083b3dSAdrian Chadd , (struct ath_desc *) ds0 /* first descriptor */ 424b8e788a5SAdrian Chadd ); 42521840808SAdrian Chadd 4266e84772fSAdrian Chadd /* 4276e84772fSAdrian Chadd * Make sure the 11n aggregate fields are cleared. 4286e84772fSAdrian Chadd * 4296e84772fSAdrian Chadd * XXX TODO: this doesn't need to be called for 4306e84772fSAdrian Chadd * aggregate frames; as it'll be called on all 4316e84772fSAdrian Chadd * sub-frames. Since the descriptors are in 4326e84772fSAdrian Chadd * non-cacheable memory, this leads to some 4336e84772fSAdrian Chadd * rather slow writes on MIPS/ARM platforms. 4346e84772fSAdrian Chadd */ 43521840808SAdrian Chadd if (ath_tx_is_11n(sc)) 4365d9b19f7SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds); 43721840808SAdrian Chadd 4386e84772fSAdrian Chadd /* 4396e84772fSAdrian Chadd * If 11n is enabled, set it up as if it's an aggregate 4406e84772fSAdrian Chadd * frame. 4416e84772fSAdrian Chadd */ 4426e84772fSAdrian Chadd if (is_last_subframe) { 4436e84772fSAdrian Chadd ath_hal_set11n_aggr_last(sc->sc_ah, 4446e84772fSAdrian Chadd (struct ath_desc *) ds); 4456e84772fSAdrian Chadd } else if (is_aggr) { 4466e84772fSAdrian Chadd /* 4476e84772fSAdrian Chadd * This clears the aggrlen field; so 4486e84772fSAdrian Chadd * the caller needs to call set_aggr_first()! 4496e84772fSAdrian Chadd * 4506e84772fSAdrian Chadd * XXX TODO: don't call this for the first 4516e84772fSAdrian Chadd * descriptor in the first frame in an 4526e84772fSAdrian Chadd * aggregate! 4536e84772fSAdrian Chadd */ 4546e84772fSAdrian Chadd ath_hal_set11n_aggr_middle(sc->sc_ah, 4556e84772fSAdrian Chadd (struct ath_desc *) ds, 4566e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 4576e84772fSAdrian Chadd } 458e2137b86SAdrian Chadd isFirstDesc = 0; 45942083b3dSAdrian Chadd bf->bf_lastds = (struct ath_desc *) ds; 4602b200bb4SAdrian Chadd 4612b200bb4SAdrian Chadd /* 4622b200bb4SAdrian Chadd * Don't forget to skip to the next descriptor. 4632b200bb4SAdrian Chadd */ 46442083b3dSAdrian Chadd ds += sc->sc_tx_desclen; 4652b200bb4SAdrian Chadd dsp++; 4662b200bb4SAdrian Chadd 4672b200bb4SAdrian Chadd /* 4682b200bb4SAdrian Chadd * .. and don't forget to blank these out! 4692b200bb4SAdrian Chadd */ 4702b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList)); 4712b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList)); 472b8e788a5SAdrian Chadd } 4734d7f8837SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 47481a82688SAdrian Chadd } 47581a82688SAdrian Chadd 476eb6f0de0SAdrian Chadd /* 477d34a7347SAdrian Chadd * Set the rate control fields in the given descriptor based on 478d34a7347SAdrian Chadd * the bf_state fields and node state. 479d34a7347SAdrian Chadd * 480d34a7347SAdrian Chadd * The bfs fields should already be set with the relevant rate 481d34a7347SAdrian Chadd * control information, including whether MRR is to be enabled. 482d34a7347SAdrian Chadd * 483d34a7347SAdrian Chadd * Since the FreeBSD HAL currently sets up the first TX rate 484d34a7347SAdrian Chadd * in ath_hal_setuptxdesc(), this will setup the MRR 485d34a7347SAdrian Chadd * conditionally for the pre-11n chips, and call ath_buf_set_rate 486d34a7347SAdrian Chadd * unconditionally for 11n chips. These require the 11n rate 487d34a7347SAdrian Chadd * scenario to be set if MCS rates are enabled, so it's easier 488d34a7347SAdrian Chadd * to just always call it. The caller can then only set rates 2, 3 489d34a7347SAdrian Chadd * and 4 if multi-rate retry is needed. 490d34a7347SAdrian Chadd */ 491d34a7347SAdrian Chadd static void 492d34a7347SAdrian Chadd ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni, 493d34a7347SAdrian Chadd struct ath_buf *bf) 494d34a7347SAdrian Chadd { 495d34a7347SAdrian Chadd struct ath_rc_series *rc = bf->bf_state.bfs_rc; 496d34a7347SAdrian Chadd 497d34a7347SAdrian Chadd /* If mrr is disabled, blank tries 1, 2, 3 */ 498d34a7347SAdrian Chadd if (! bf->bf_state.bfs_ismrr) 499d34a7347SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 500d34a7347SAdrian Chadd 501491e1248SAdrian Chadd #if 0 502491e1248SAdrian Chadd /* 503491e1248SAdrian Chadd * If NOACK is set, just set ntries=1. 504491e1248SAdrian Chadd */ 505491e1248SAdrian Chadd else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) { 506491e1248SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0; 507491e1248SAdrian Chadd rc[0].tries = 1; 508491e1248SAdrian Chadd } 509491e1248SAdrian Chadd #endif 510491e1248SAdrian Chadd 511d34a7347SAdrian Chadd /* 512d34a7347SAdrian Chadd * Always call - that way a retried descriptor will 513d34a7347SAdrian Chadd * have the MRR fields overwritten. 514d34a7347SAdrian Chadd * 515d34a7347SAdrian Chadd * XXX TODO: see if this is really needed - setting up 516d34a7347SAdrian Chadd * the first descriptor should set the MRR fields to 0 517d34a7347SAdrian Chadd * for us anyway. 518d34a7347SAdrian Chadd */ 519d34a7347SAdrian Chadd if (ath_tx_is_11n(sc)) { 520d34a7347SAdrian Chadd ath_buf_set_rate(sc, ni, bf); 521d34a7347SAdrian Chadd } else { 522d34a7347SAdrian Chadd ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc 523d34a7347SAdrian Chadd , rc[1].ratecode, rc[1].tries 524d34a7347SAdrian Chadd , rc[2].ratecode, rc[2].tries 525d34a7347SAdrian Chadd , rc[3].ratecode, rc[3].tries 526d34a7347SAdrian Chadd ); 527d34a7347SAdrian Chadd } 528d34a7347SAdrian Chadd } 529d34a7347SAdrian Chadd 530d34a7347SAdrian Chadd /* 531eb6f0de0SAdrian Chadd * Setup segments+descriptors for an 11n aggregate. 532eb6f0de0SAdrian Chadd * bf_first is the first buffer in the aggregate. 533eb6f0de0SAdrian Chadd * The descriptor list must already been linked together using 534eb6f0de0SAdrian Chadd * bf->bf_next. 535eb6f0de0SAdrian Chadd */ 536eb6f0de0SAdrian Chadd static void 537eb6f0de0SAdrian Chadd ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first) 538eb6f0de0SAdrian Chadd { 539eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_prev = NULL; 5406e84772fSAdrian Chadd struct ath_desc *ds0 = bf_first->bf_desc; 541eb6f0de0SAdrian Chadd 542eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n", 543eb6f0de0SAdrian Chadd __func__, bf_first->bf_state.bfs_nframes, 544eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_al); 545eb6f0de0SAdrian Chadd 5467d9dd2acSAdrian Chadd bf = bf_first; 5477d9dd2acSAdrian Chadd 5487d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 54983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n", 5507d9dd2acSAdrian Chadd __func__, bf, 0); 5517d9dd2acSAdrian Chadd if (bf->bf_state.bfs_rc[0].ratecode == 0) 55283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n", 5537d9dd2acSAdrian Chadd __func__, bf, 0); 5547d9dd2acSAdrian Chadd 555eb6f0de0SAdrian Chadd /* 5566e84772fSAdrian Chadd * Setup all descriptors of all subframes - this will 5576e84772fSAdrian Chadd * call ath_hal_set11naggrmiddle() on every frame. 558eb6f0de0SAdrian Chadd */ 559eb6f0de0SAdrian Chadd while (bf != NULL) { 560eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 561eb6f0de0SAdrian Chadd "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n", 562eb6f0de0SAdrian Chadd __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen, 563eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 564eb6f0de0SAdrian Chadd 5656e84772fSAdrian Chadd /* 5666e84772fSAdrian Chadd * Setup the initial fields for the first descriptor - all 5676e84772fSAdrian Chadd * the non-11n specific stuff. 5686e84772fSAdrian Chadd */ 5696e84772fSAdrian Chadd ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc 5706e84772fSAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 5716e84772fSAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 5726e84772fSAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 5736e84772fSAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 5746e84772fSAdrian Chadd , bf->bf_state.bfs_txrate0 5756e84772fSAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 5766e84772fSAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 5776e84772fSAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 5786e84772fSAdrian Chadd , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */ 5796e84772fSAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 5806e84772fSAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 5816e84772fSAdrian Chadd ); 5826e84772fSAdrian Chadd 5836e84772fSAdrian Chadd /* 5846e84772fSAdrian Chadd * First descriptor? Setup the rate control and initial 5856e84772fSAdrian Chadd * aggregate header information. 5866e84772fSAdrian Chadd */ 5876e84772fSAdrian Chadd if (bf == bf_first) { 5886e84772fSAdrian Chadd /* 5896e84772fSAdrian Chadd * setup first desc with rate and aggr info 5906e84772fSAdrian Chadd */ 5916e84772fSAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 5926e84772fSAdrian Chadd } 5936e84772fSAdrian Chadd 5946e84772fSAdrian Chadd /* 5956e84772fSAdrian Chadd * Setup the descriptors for a multi-descriptor frame. 5966e84772fSAdrian Chadd * This is both aggregate and non-aggregate aware. 5976e84772fSAdrian Chadd */ 5986e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds0, bf, 5996e84772fSAdrian Chadd 1, /* is_aggr */ 6006e84772fSAdrian Chadd !! (bf == bf_first), /* is_first_subframe */ 6016e84772fSAdrian Chadd !! (bf->bf_next == NULL) /* is_last_subframe */ 6026e84772fSAdrian Chadd ); 6036e84772fSAdrian Chadd 6046e84772fSAdrian Chadd if (bf == bf_first) { 6056e84772fSAdrian Chadd /* 6066e84772fSAdrian Chadd * Initialise the first 11n aggregate with the 6076e84772fSAdrian Chadd * aggregate length and aggregate enable bits. 6086e84772fSAdrian Chadd */ 6096e84772fSAdrian Chadd ath_hal_set11n_aggr_first(sc->sc_ah, 6106e84772fSAdrian Chadd ds0, 6116e84772fSAdrian Chadd bf->bf_state.bfs_al, 6126e84772fSAdrian Chadd bf->bf_state.bfs_ndelim); 6136e84772fSAdrian Chadd } 614eb6f0de0SAdrian Chadd 615eb6f0de0SAdrian Chadd /* 616eb6f0de0SAdrian Chadd * Link the last descriptor of the previous frame 617eb6f0de0SAdrian Chadd * to the beginning descriptor of this frame. 618eb6f0de0SAdrian Chadd */ 619eb6f0de0SAdrian Chadd if (bf_prev != NULL) 620bb069955SAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds, 621bb069955SAdrian Chadd bf->bf_daddr); 622eb6f0de0SAdrian Chadd 623eb6f0de0SAdrian Chadd /* Save a copy so we can link the next descriptor in */ 624eb6f0de0SAdrian Chadd bf_prev = bf; 625eb6f0de0SAdrian Chadd bf = bf->bf_next; 626eb6f0de0SAdrian Chadd } 627eb6f0de0SAdrian Chadd 628eb6f0de0SAdrian Chadd /* 629eb6f0de0SAdrian Chadd * Set the first descriptor bf_lastds field to point to 630eb6f0de0SAdrian Chadd * the last descriptor in the last subframe, that's where 631eb6f0de0SAdrian Chadd * the status update will occur. 632eb6f0de0SAdrian Chadd */ 633eb6f0de0SAdrian Chadd bf_first->bf_lastds = bf_prev->bf_lastds; 634eb6f0de0SAdrian Chadd 635eb6f0de0SAdrian Chadd /* 636eb6f0de0SAdrian Chadd * And bf_last in the first descriptor points to the end of 637eb6f0de0SAdrian Chadd * the aggregate list. 638eb6f0de0SAdrian Chadd */ 639eb6f0de0SAdrian Chadd bf_first->bf_last = bf_prev; 640eb6f0de0SAdrian Chadd 641bbdf3df1SAdrian Chadd /* 642bbdf3df1SAdrian Chadd * For non-AR9300 NICs, which require the rate control 643bbdf3df1SAdrian Chadd * in the final descriptor - let's set that up now. 644bbdf3df1SAdrian Chadd * 645bbdf3df1SAdrian Chadd * This is because the filltxdesc() HAL call doesn't 646bbdf3df1SAdrian Chadd * populate the last segment with rate control information 647bbdf3df1SAdrian Chadd * if firstSeg is also true. For non-aggregate frames 648bbdf3df1SAdrian Chadd * that is fine, as the first frame already has rate control 649bbdf3df1SAdrian Chadd * info. But if the last frame in an aggregate has one 650bbdf3df1SAdrian Chadd * descriptor, both firstseg and lastseg will be true and 651bbdf3df1SAdrian Chadd * the rate info isn't copied. 652bbdf3df1SAdrian Chadd * 653bbdf3df1SAdrian Chadd * This is inefficient on MIPS/ARM platforms that have 654bbdf3df1SAdrian Chadd * non-cachable memory for TX descriptors, but we'll just 655bbdf3df1SAdrian Chadd * make do for now. 656bbdf3df1SAdrian Chadd * 657bbdf3df1SAdrian Chadd * As to why the rate table is stashed in the last descriptor 658bbdf3df1SAdrian Chadd * rather than the first descriptor? Because proctxdesc() 659bbdf3df1SAdrian Chadd * is called on the final descriptor in an MPDU or A-MPDU - 660bbdf3df1SAdrian Chadd * ie, the one that gets updated by the hardware upon 661bbdf3df1SAdrian Chadd * completion. That way proctxdesc() doesn't need to know 662bbdf3df1SAdrian Chadd * about the first _and_ last TX descriptor. 663bbdf3df1SAdrian Chadd */ 664bbdf3df1SAdrian Chadd ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0); 665bbdf3df1SAdrian Chadd 666eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__); 667eb6f0de0SAdrian Chadd } 668eb6f0de0SAdrian Chadd 66946634305SAdrian Chadd /* 67046634305SAdrian Chadd * Hand-off a frame to the multicast TX queue. 67146634305SAdrian Chadd * 67246634305SAdrian Chadd * This is a software TXQ which will be appended to the CAB queue 67346634305SAdrian Chadd * during the beacon setup code. 67446634305SAdrian Chadd * 67546634305SAdrian Chadd * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID 676fc56c9c5SAdrian Chadd * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated 67746634305SAdrian Chadd * with the actual hardware txq, or all of this will fall apart. 67846634305SAdrian Chadd * 67946634305SAdrian Chadd * XXX It may not be a bad idea to just stuff the QCU ID into bf_state 680fc56c9c5SAdrian Chadd * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated 68146634305SAdrian Chadd * correctly. 68246634305SAdrian Chadd */ 683eb6f0de0SAdrian Chadd static void 684eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 685eb6f0de0SAdrian Chadd struct ath_buf *bf) 686eb6f0de0SAdrian Chadd { 687375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 688375307d4SAdrian Chadd 689eb6f0de0SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 690eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 69156a85978SAdrian Chadd 69297c9a8e8SAdrian Chadd /* 69397c9a8e8SAdrian Chadd * Ensure that the tx queue is the cabq, so things get 69497c9a8e8SAdrian Chadd * mapped correctly. 69597c9a8e8SAdrian Chadd */ 69697c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) { 69783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 69897c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 69983bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue, 70097c9a8e8SAdrian Chadd txq->axq_qnum); 70197c9a8e8SAdrian Chadd } 70297c9a8e8SAdrian Chadd 70356a85978SAdrian Chadd ATH_TXQ_LOCK(txq); 7040891354cSAdrian Chadd if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) { 7050891354cSAdrian Chadd struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s); 706eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 707eb6f0de0SAdrian Chadd 708eb6f0de0SAdrian Chadd /* mark previous frame */ 7090891354cSAdrian Chadd wh = mtod(bf_last->bf_m, struct ieee80211_frame *); 710eb6f0de0SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 7110891354cSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap, 712eb6f0de0SAdrian Chadd BUS_DMASYNC_PREWRITE); 713eb6f0de0SAdrian Chadd 714eb6f0de0SAdrian Chadd /* link descriptor */ 7150891354cSAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, 7160891354cSAdrian Chadd bf_last->bf_lastds, 7170891354cSAdrian Chadd bf->bf_daddr); 718eb6f0de0SAdrian Chadd } 719eb6f0de0SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 720b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 721eb6f0de0SAdrian Chadd } 722eb6f0de0SAdrian Chadd 723eb6f0de0SAdrian Chadd /* 724eb6f0de0SAdrian Chadd * Hand-off packet to a hardware queue. 725eb6f0de0SAdrian Chadd */ 726eb6f0de0SAdrian Chadd static void 727d4365d16SAdrian Chadd ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 728d4365d16SAdrian Chadd struct ath_buf *bf) 729eb6f0de0SAdrian Chadd { 730eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 7319be82a42SAdrian Chadd struct ath_buf *bf_first; 73281a82688SAdrian Chadd 733b8e788a5SAdrian Chadd /* 734b8e788a5SAdrian Chadd * Insert the frame on the outbound list and pass it on 735b8e788a5SAdrian Chadd * to the hardware. Multicast frames buffered for power 736b8e788a5SAdrian Chadd * save stations and transmit from the CAB queue are stored 737b8e788a5SAdrian Chadd * on a s/w only queue and loaded on to the CAB queue in 738b8e788a5SAdrian Chadd * the SWBA handler since frames only go out on DTIM and 739b8e788a5SAdrian Chadd * to avoid possible races. 740b8e788a5SAdrian Chadd */ 741375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 742b8e788a5SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 743eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags)); 744eb6f0de0SAdrian Chadd KASSERT(txq->axq_qnum != ATH_TXQ_SWQ, 745eb6f0de0SAdrian Chadd ("ath_tx_handoff_hw called for mcast queue")); 746eb6f0de0SAdrian Chadd 7479be82a42SAdrian Chadd /* 748f5c30c4eSAdrian Chadd * XXX We should instead just verify that sc_txstart_cnt 749f5c30c4eSAdrian Chadd * or ath_txproc_cnt > 0. That would mean that 750f5c30c4eSAdrian Chadd * the reset is going to be waiting for us to complete. 7519be82a42SAdrian Chadd */ 752f5c30c4eSAdrian Chadd if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) { 753f5c30c4eSAdrian Chadd device_printf(sc->sc_dev, 754f5c30c4eSAdrian Chadd "%s: TX dispatch without holding txcount/txstart refcnt!\n", 755ef27340cSAdrian Chadd __func__); 756ef27340cSAdrian Chadd } 757f5c30c4eSAdrian Chadd 758f5c30c4eSAdrian Chadd /* 759f5c30c4eSAdrian Chadd * XXX .. this is going to cause the hardware to get upset; 760f5c30c4eSAdrian Chadd * so we really should find some way to drop or queue 761f5c30c4eSAdrian Chadd * things. 762f5c30c4eSAdrian Chadd */ 763ef27340cSAdrian Chadd 764b837332dSAdrian Chadd ATH_TXQ_LOCK(txq); 765b8e788a5SAdrian Chadd 766b8e788a5SAdrian Chadd /* 7679be82a42SAdrian Chadd * XXX TODO: if there's a holdingbf, then 7689be82a42SAdrian Chadd * ATH_TXQ_PUTRUNNING should be clear. 7699be82a42SAdrian Chadd * 7709be82a42SAdrian Chadd * If there is a holdingbf and the list is empty, 7719be82a42SAdrian Chadd * then axq_link should be pointing to the holdingbf. 7729be82a42SAdrian Chadd * 7739be82a42SAdrian Chadd * Otherwise it should point to the last descriptor 7749be82a42SAdrian Chadd * in the last ath_buf. 7759be82a42SAdrian Chadd * 7769be82a42SAdrian Chadd * In any case, we should really ensure that we 7779be82a42SAdrian Chadd * update the previous descriptor link pointer to 7789be82a42SAdrian Chadd * this descriptor, regardless of all of the above state. 7799be82a42SAdrian Chadd * 7809be82a42SAdrian Chadd * For now this is captured by having axq_link point 7819be82a42SAdrian Chadd * to either the holdingbf (if the TXQ list is empty) 7829be82a42SAdrian Chadd * or the end of the list (if the TXQ list isn't empty.) 7839be82a42SAdrian Chadd * I'd rather just kill axq_link here and do it as above. 784b8e788a5SAdrian Chadd */ 78503682514SAdrian Chadd 786b8e788a5SAdrian Chadd /* 7879be82a42SAdrian Chadd * Append the frame to the TX queue. 788b8e788a5SAdrian Chadd */ 789b8e788a5SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 790b1dddc28SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, 791b1dddc28SAdrian Chadd "ath_tx_handoff: non-tdma: txq=%u, add bf=%p " 79203682514SAdrian Chadd "depth=%d", 79303682514SAdrian Chadd txq->axq_qnum, 79403682514SAdrian Chadd bf, 79503682514SAdrian Chadd txq->axq_depth); 79603682514SAdrian Chadd 7979be82a42SAdrian Chadd /* 7989be82a42SAdrian Chadd * If there's a link pointer, update it. 7999be82a42SAdrian Chadd * 8009be82a42SAdrian Chadd * XXX we should replace this with the above logic, just 8019be82a42SAdrian Chadd * to kill axq_link with fire. 8029be82a42SAdrian Chadd */ 8039be82a42SAdrian Chadd if (txq->axq_link != NULL) { 804b8e788a5SAdrian Chadd *txq->axq_link = bf->bf_daddr; 805b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 806b8e788a5SAdrian Chadd "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 807b8e788a5SAdrian Chadd txq->axq_qnum, txq->axq_link, 808d4365d16SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 809d4365d16SAdrian Chadd txq->axq_depth); 81003682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 81103682514SAdrian Chadd "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) " 81203682514SAdrian Chadd "lastds=%d", 81303682514SAdrian Chadd txq->axq_qnum, txq->axq_link, 81403682514SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc, 81503682514SAdrian Chadd bf->bf_lastds); 816b8e788a5SAdrian Chadd } 81797c9a8e8SAdrian Chadd 8189be82a42SAdrian Chadd /* 8199be82a42SAdrian Chadd * If we've not pushed anything into the hardware yet, 8209be82a42SAdrian Chadd * push the head of the queue into the TxDP. 8219be82a42SAdrian Chadd * 8229be82a42SAdrian Chadd * Once we've started DMA, there's no guarantee that 8239be82a42SAdrian Chadd * updating the TxDP with a new value will actually work. 8249be82a42SAdrian Chadd * So we just don't do that - if we hit the end of the list, 8259be82a42SAdrian Chadd * we keep that buffer around (the "holding buffer") and 8269be82a42SAdrian Chadd * re-start DMA by updating the link pointer of _that_ 8279be82a42SAdrian Chadd * descriptor and then restart DMA. 8289be82a42SAdrian Chadd */ 8299be82a42SAdrian Chadd if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) { 8309be82a42SAdrian Chadd bf_first = TAILQ_FIRST(&txq->axq_q); 8319be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING; 8329be82a42SAdrian Chadd ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr); 8339be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 8349be82a42SAdrian Chadd "%s: TXDP[%u] = %p (%p) depth %d\n", 8359be82a42SAdrian Chadd __func__, txq->axq_qnum, 8369be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 8379be82a42SAdrian Chadd txq->axq_depth); 8389be82a42SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5, 8399be82a42SAdrian Chadd "ath_tx_handoff: TXDP[%u] = %p (%p) " 8409be82a42SAdrian Chadd "lastds=%p depth %d", 8419be82a42SAdrian Chadd txq->axq_qnum, 8429be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 8439be82a42SAdrian Chadd bf_first->bf_lastds, 8449be82a42SAdrian Chadd txq->axq_depth); 8459be82a42SAdrian Chadd } 8469be82a42SAdrian Chadd 8479be82a42SAdrian Chadd /* 8489be82a42SAdrian Chadd * Ensure that the bf TXQ matches this TXQ, so later 8499be82a42SAdrian Chadd * checking and holding buffer manipulation is sane. 8509be82a42SAdrian Chadd */ 85197c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) { 85283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 85397c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 85483bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue, 85597c9a8e8SAdrian Chadd txq->axq_qnum); 85697c9a8e8SAdrian Chadd } 85797c9a8e8SAdrian Chadd 8589be82a42SAdrian Chadd /* 8599be82a42SAdrian Chadd * Track aggregate queue depth. 8609be82a42SAdrian Chadd */ 8616edf1dc7SAdrian Chadd if (bf->bf_state.bfs_aggr) 8626edf1dc7SAdrian Chadd txq->axq_aggr_depth++; 8639be82a42SAdrian Chadd 8649be82a42SAdrian Chadd /* 8659be82a42SAdrian Chadd * Update the link pointer. 8669be82a42SAdrian Chadd */ 867bb069955SAdrian Chadd ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); 8689be82a42SAdrian Chadd 8699be82a42SAdrian Chadd /* 8709be82a42SAdrian Chadd * Start DMA. 8719be82a42SAdrian Chadd * 8729be82a42SAdrian Chadd * If we wrote a TxDP above, DMA will start from here. 8739be82a42SAdrian Chadd * 8749be82a42SAdrian Chadd * If DMA is running, it'll do nothing. 8759be82a42SAdrian Chadd * 8769be82a42SAdrian Chadd * If the DMA engine hit the end of the QCU list (ie LINK=NULL, 8779be82a42SAdrian Chadd * or VEOL) then it stops at the last transmitted write. 8789be82a42SAdrian Chadd * We then append a new frame by updating the link pointer 8799be82a42SAdrian Chadd * in that descriptor and then kick TxE here; it will re-read 8809be82a42SAdrian Chadd * that last descriptor and find the new descriptor to transmit. 8819be82a42SAdrian Chadd * 8829be82a42SAdrian Chadd * This is why we keep the holding descriptor around. 8839be82a42SAdrian Chadd */ 884b8e788a5SAdrian Chadd ath_hal_txstart(ah, txq->axq_qnum); 885b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq); 88603682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 1, 88703682514SAdrian Chadd "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum); 888b8e788a5SAdrian Chadd } 889eb6f0de0SAdrian Chadd 890eb6f0de0SAdrian Chadd /* 891eb6f0de0SAdrian Chadd * Restart TX DMA for the given TXQ. 892eb6f0de0SAdrian Chadd * 893eb6f0de0SAdrian Chadd * This must be called whether the queue is empty or not. 894eb6f0de0SAdrian Chadd */ 895746bab5bSAdrian Chadd static void 896746bab5bSAdrian Chadd ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq) 897eb6f0de0SAdrian Chadd { 898b1f3262cSAdrian Chadd struct ath_buf *bf, *bf_last; 899eb6f0de0SAdrian Chadd 900b837332dSAdrian Chadd ATH_TXQ_LOCK_ASSERT(txq); 901eb6f0de0SAdrian Chadd 902b1f3262cSAdrian Chadd /* XXX make this ATH_TXQ_FIRST */ 903eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&txq->axq_q); 904b1f3262cSAdrian Chadd bf_last = ATH_TXQ_LAST(txq, axq_q_s); 905b1f3262cSAdrian Chadd 906eb6f0de0SAdrian Chadd if (bf == NULL) 907eb6f0de0SAdrian Chadd return; 908eb6f0de0SAdrian Chadd 9099be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_RESET, 9109be82a42SAdrian Chadd "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n", 9119be82a42SAdrian Chadd __func__, 9129be82a42SAdrian Chadd txq->axq_qnum, 9139be82a42SAdrian Chadd bf, 9149be82a42SAdrian Chadd bf_last, 9159be82a42SAdrian Chadd (uint32_t) bf->bf_daddr); 9169be82a42SAdrian Chadd 9176112d22cSAdrian Chadd #ifdef ATH_DEBUG 9189be82a42SAdrian Chadd if (sc->sc_debug & ATH_DEBUG_RESET) 9199be82a42SAdrian Chadd ath_tx_dump(sc, txq); 9206112d22cSAdrian Chadd #endif 9219be82a42SAdrian Chadd 9229be82a42SAdrian Chadd /* 9239be82a42SAdrian Chadd * This is called from a restart, so DMA is known to be 9249be82a42SAdrian Chadd * completely stopped. 9259be82a42SAdrian Chadd */ 9269be82a42SAdrian Chadd KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)), 9279be82a42SAdrian Chadd ("%s: Q%d: called with PUTRUNNING=1\n", 9289be82a42SAdrian Chadd __func__, 9299be82a42SAdrian Chadd txq->axq_qnum)); 9309be82a42SAdrian Chadd 9319be82a42SAdrian Chadd ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr); 9329be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING; 9339be82a42SAdrian Chadd 9346112d22cSAdrian Chadd ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds, 9356112d22cSAdrian Chadd &txq->axq_link); 9366112d22cSAdrian Chadd ath_hal_txstart(sc->sc_ah, txq->axq_qnum); 937eb6f0de0SAdrian Chadd } 938eb6f0de0SAdrian Chadd 939eb6f0de0SAdrian Chadd /* 940eb6f0de0SAdrian Chadd * Hand off a packet to the hardware (or mcast queue.) 941eb6f0de0SAdrian Chadd * 942eb6f0de0SAdrian Chadd * The relevant hardware txq should be locked. 943eb6f0de0SAdrian Chadd */ 944eb6f0de0SAdrian Chadd static void 945746bab5bSAdrian Chadd ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq, 946746bab5bSAdrian Chadd struct ath_buf *bf) 947eb6f0de0SAdrian Chadd { 948375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 949eb6f0de0SAdrian Chadd 950bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ 951bb327d28SAdrian Chadd if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC)) 952bb327d28SAdrian Chadd ath_tx_alq_post(sc, bf); 953bb327d28SAdrian Chadd #endif 954bb327d28SAdrian Chadd 955eb6f0de0SAdrian Chadd if (txq->axq_qnum == ATH_TXQ_SWQ) 956eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(sc, txq, bf); 957eb6f0de0SAdrian Chadd else 958eb6f0de0SAdrian Chadd ath_tx_handoff_hw(sc, txq, bf); 959b8e788a5SAdrian Chadd } 960b8e788a5SAdrian Chadd 96181a82688SAdrian Chadd static int 96281a82688SAdrian Chadd ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni, 963d4365d16SAdrian Chadd struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen, 964d4365d16SAdrian Chadd int *keyix) 96581a82688SAdrian Chadd { 96612be5b9cSAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, 96712be5b9cSAdrian Chadd "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n", 96812be5b9cSAdrian Chadd __func__, 96912be5b9cSAdrian Chadd *hdrlen, 97012be5b9cSAdrian Chadd *pktlen, 97112be5b9cSAdrian Chadd isfrag, 97212be5b9cSAdrian Chadd iswep, 97312be5b9cSAdrian Chadd m0); 97412be5b9cSAdrian Chadd 97581a82688SAdrian Chadd if (iswep) { 97681a82688SAdrian Chadd const struct ieee80211_cipher *cip; 97781a82688SAdrian Chadd struct ieee80211_key *k; 97881a82688SAdrian Chadd 97981a82688SAdrian Chadd /* 98081a82688SAdrian Chadd * Construct the 802.11 header+trailer for an encrypted 98181a82688SAdrian Chadd * frame. The only reason this can fail is because of an 98281a82688SAdrian Chadd * unknown or unsupported cipher/key type. 98381a82688SAdrian Chadd */ 98481a82688SAdrian Chadd k = ieee80211_crypto_encap(ni, m0); 98581a82688SAdrian Chadd if (k == NULL) { 98681a82688SAdrian Chadd /* 98781a82688SAdrian Chadd * This can happen when the key is yanked after the 98881a82688SAdrian Chadd * frame was queued. Just discard the frame; the 98981a82688SAdrian Chadd * 802.11 layer counts failures and provides 99081a82688SAdrian Chadd * debugging/diagnostics. 99181a82688SAdrian Chadd */ 992d4365d16SAdrian Chadd return (0); 99381a82688SAdrian Chadd } 99481a82688SAdrian Chadd /* 99581a82688SAdrian Chadd * Adjust the packet + header lengths for the crypto 99681a82688SAdrian Chadd * additions and calculate the h/w key index. When 99781a82688SAdrian Chadd * a s/w mic is done the frame will have had any mic 99881a82688SAdrian Chadd * added to it prior to entry so m0->m_pkthdr.len will 99981a82688SAdrian Chadd * account for it. Otherwise we need to add it to the 100081a82688SAdrian Chadd * packet length. 100181a82688SAdrian Chadd */ 100281a82688SAdrian Chadd cip = k->wk_cipher; 100381a82688SAdrian Chadd (*hdrlen) += cip->ic_header; 100481a82688SAdrian Chadd (*pktlen) += cip->ic_header + cip->ic_trailer; 100581a82688SAdrian Chadd /* NB: frags always have any TKIP MIC done in s/w */ 100681a82688SAdrian Chadd if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag) 100781a82688SAdrian Chadd (*pktlen) += cip->ic_miclen; 100881a82688SAdrian Chadd (*keyix) = k->wk_keyix; 100981a82688SAdrian Chadd } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) { 101081a82688SAdrian Chadd /* 101181a82688SAdrian Chadd * Use station key cache slot, if assigned. 101281a82688SAdrian Chadd */ 101381a82688SAdrian Chadd (*keyix) = ni->ni_ucastkey.wk_keyix; 101481a82688SAdrian Chadd if ((*keyix) == IEEE80211_KEYIX_NONE) 101581a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 101681a82688SAdrian Chadd } else 101781a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID; 101881a82688SAdrian Chadd 1019d4365d16SAdrian Chadd return (1); 102081a82688SAdrian Chadd } 102181a82688SAdrian Chadd 1022e2e4a2c2SAdrian Chadd /* 1023e2e4a2c2SAdrian Chadd * Calculate whether interoperability protection is required for 1024e2e4a2c2SAdrian Chadd * this frame. 1025e2e4a2c2SAdrian Chadd * 1026e2e4a2c2SAdrian Chadd * This requires the rate control information be filled in, 1027e2e4a2c2SAdrian Chadd * as the protection requirement depends upon the current 1028e2e4a2c2SAdrian Chadd * operating mode / PHY. 1029e2e4a2c2SAdrian Chadd */ 1030e2e4a2c2SAdrian Chadd static void 1031e2e4a2c2SAdrian Chadd ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf) 1032e2e4a2c2SAdrian Chadd { 1033e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1034e2e4a2c2SAdrian Chadd uint8_t rix; 1035e2e4a2c2SAdrian Chadd uint16_t flags; 1036e2e4a2c2SAdrian Chadd int shortPreamble; 1037e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 10387a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic; 1039e2e4a2c2SAdrian Chadd 1040e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1041e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1042e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1043e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1044e2e4a2c2SAdrian Chadd 1045*5abc0b25SAdrian Chadd /* Disable frame protection for TOA probe frames */ 1046*5abc0b25SAdrian Chadd if (bf->bf_flags & ATH_BUF_TOA_PROBE) { 1047*5abc0b25SAdrian Chadd /* XXX count */ 1048*5abc0b25SAdrian Chadd flags &= ~(HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA); 1049*5abc0b25SAdrian Chadd bf->bf_state.bfs_doprot = 0; 1050*5abc0b25SAdrian Chadd goto finish; 1051*5abc0b25SAdrian Chadd } 1052*5abc0b25SAdrian Chadd 1053e2e4a2c2SAdrian Chadd /* 1054e2e4a2c2SAdrian Chadd * If 802.11g protection is enabled, determine whether 1055e2e4a2c2SAdrian Chadd * to use RTS/CTS or just CTS. Note that this is only 1056e2e4a2c2SAdrian Chadd * done for OFDM unicast frames. 1057e2e4a2c2SAdrian Chadd */ 1058e2e4a2c2SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1059e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_OFDM && 1060e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1061e2e4a2c2SAdrian Chadd bf->bf_state.bfs_doprot = 1; 1062e2e4a2c2SAdrian Chadd /* XXX fragments must use CCK rates w/ protection */ 1063e2e4a2c2SAdrian Chadd if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1064e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1065e2e4a2c2SAdrian Chadd } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1066e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 1067e2e4a2c2SAdrian Chadd } 1068e2e4a2c2SAdrian Chadd /* 1069e2e4a2c2SAdrian Chadd * For frags it would be desirable to use the 1070e2e4a2c2SAdrian Chadd * highest CCK rate for RTS/CTS. But stations 1071e2e4a2c2SAdrian Chadd * farther away may detect it at a lower CCK rate 1072e2e4a2c2SAdrian Chadd * so use the configured protection rate instead 1073e2e4a2c2SAdrian Chadd * (for now). 1074e2e4a2c2SAdrian Chadd */ 1075e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_protect++; 1076e2e4a2c2SAdrian Chadd } 1077e2e4a2c2SAdrian Chadd 1078e2e4a2c2SAdrian Chadd /* 1079e2e4a2c2SAdrian Chadd * If 11n protection is enabled and it's a HT frame, 1080e2e4a2c2SAdrian Chadd * enable RTS. 1081e2e4a2c2SAdrian Chadd * 1082e2e4a2c2SAdrian Chadd * XXX ic_htprotmode or ic_curhtprotmode? 1083e2e4a2c2SAdrian Chadd * XXX should it_htprotmode only matter if ic_curhtprotmode 1084e2e4a2c2SAdrian Chadd * XXX indicates it's not a HT pure environment? 1085e2e4a2c2SAdrian Chadd */ 1086e2e4a2c2SAdrian Chadd if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) && 1087e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_HT && 1088e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) { 1089e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 1090e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_htprotect++; 1091e2e4a2c2SAdrian Chadd } 1092*5abc0b25SAdrian Chadd 1093*5abc0b25SAdrian Chadd finish: 1094e2e4a2c2SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1095e2e4a2c2SAdrian Chadd } 1096e2e4a2c2SAdrian Chadd 1097e2e4a2c2SAdrian Chadd /* 1098e2e4a2c2SAdrian Chadd * Update the frame duration given the currently selected rate. 1099e2e4a2c2SAdrian Chadd * 1100e2e4a2c2SAdrian Chadd * This also updates the frame duration value, so it will require 1101e2e4a2c2SAdrian Chadd * a DMA flush. 1102e2e4a2c2SAdrian Chadd */ 1103e2e4a2c2SAdrian Chadd static void 1104e2e4a2c2SAdrian Chadd ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf) 1105e2e4a2c2SAdrian Chadd { 1106e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh; 1107e2e4a2c2SAdrian Chadd uint8_t rix; 1108e2e4a2c2SAdrian Chadd uint16_t flags; 1109e2e4a2c2SAdrian Chadd int shortPreamble; 1110e2e4a2c2SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1111e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1112e2e4a2c2SAdrian Chadd int isfrag = bf->bf_m->m_flags & M_FRAG; 1113e2e4a2c2SAdrian Chadd 1114e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags; 1115e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1116e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream; 1117e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 1118e2e4a2c2SAdrian Chadd 1119e2e4a2c2SAdrian Chadd /* 1120e2e4a2c2SAdrian Chadd * Calculate duration. This logically belongs in the 802.11 1121e2e4a2c2SAdrian Chadd * layer but it lacks sufficient information to calculate it. 1122e2e4a2c2SAdrian Chadd */ 1123e2e4a2c2SAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0 && 1124e2e4a2c2SAdrian Chadd (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 1125e2e4a2c2SAdrian Chadd u_int16_t dur; 1126e2e4a2c2SAdrian Chadd if (shortPreamble) 1127e2e4a2c2SAdrian Chadd dur = rt->info[rix].spAckDuration; 1128e2e4a2c2SAdrian Chadd else 1129e2e4a2c2SAdrian Chadd dur = rt->info[rix].lpAckDuration; 1130e2e4a2c2SAdrian Chadd if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) { 1131e2e4a2c2SAdrian Chadd dur += dur; /* additional SIFS+ACK */ 1132e2e4a2c2SAdrian Chadd /* 1133e2e4a2c2SAdrian Chadd * Include the size of next fragment so NAV is 1134e2e4a2c2SAdrian Chadd * updated properly. The last fragment uses only 1135e2e4a2c2SAdrian Chadd * the ACK duration 11369572684aSAdrian Chadd * 11379572684aSAdrian Chadd * XXX TODO: ensure that the rate lookup for each 11389572684aSAdrian Chadd * fragment is the same as the rate used by the 11399572684aSAdrian Chadd * first fragment! 1140e2e4a2c2SAdrian Chadd */ 1141cd7dffd0SAdrian Chadd dur += ath_hal_computetxtime(ah, 1142cd7dffd0SAdrian Chadd rt, 1143cd7dffd0SAdrian Chadd bf->bf_nextfraglen, 11447ff1939dSAdrian Chadd rix, shortPreamble, 11457ff1939dSAdrian Chadd AH_TRUE); 1146e2e4a2c2SAdrian Chadd } 1147e2e4a2c2SAdrian Chadd if (isfrag) { 1148e2e4a2c2SAdrian Chadd /* 1149e2e4a2c2SAdrian Chadd * Force hardware to use computed duration for next 1150e2e4a2c2SAdrian Chadd * fragment by disabling multi-rate retry which updates 1151e2e4a2c2SAdrian Chadd * duration based on the multi-rate duration table. 1152e2e4a2c2SAdrian Chadd */ 1153e2e4a2c2SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1154e2e4a2c2SAdrian Chadd bf->bf_state.bfs_try0 = ATH_TXMGTTRY; 1155e2e4a2c2SAdrian Chadd /* XXX update bfs_rc[0].try? */ 1156e2e4a2c2SAdrian Chadd } 1157e2e4a2c2SAdrian Chadd 1158e2e4a2c2SAdrian Chadd /* Update the duration field itself */ 1159e2e4a2c2SAdrian Chadd *(u_int16_t *)wh->i_dur = htole16(dur); 1160e2e4a2c2SAdrian Chadd } 1161e2e4a2c2SAdrian Chadd } 1162e2e4a2c2SAdrian Chadd 1163e42b5dbaSAdrian Chadd static uint8_t 1164e42b5dbaSAdrian Chadd ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt, 1165eb6f0de0SAdrian Chadd int cix, int shortPreamble) 116679f02dbfSAdrian Chadd { 1167e42b5dbaSAdrian Chadd uint8_t ctsrate; 1168e42b5dbaSAdrian Chadd 116979f02dbfSAdrian Chadd /* 117079f02dbfSAdrian Chadd * CTS transmit rate is derived from the transmit rate 117179f02dbfSAdrian Chadd * by looking in the h/w rate table. We must also factor 117279f02dbfSAdrian Chadd * in whether or not a short preamble is to be used. 117379f02dbfSAdrian Chadd */ 117479f02dbfSAdrian Chadd /* NB: cix is set above where RTS/CTS is enabled */ 117579f02dbfSAdrian Chadd KASSERT(cix != 0xff, ("cix not setup")); 1176e42b5dbaSAdrian Chadd ctsrate = rt->info[cix].rateCode; 1177e42b5dbaSAdrian Chadd 1178e42b5dbaSAdrian Chadd /* XXX this should only matter for legacy rates */ 1179e42b5dbaSAdrian Chadd if (shortPreamble) 1180e42b5dbaSAdrian Chadd ctsrate |= rt->info[cix].shortPreamble; 1181e42b5dbaSAdrian Chadd 1182d4365d16SAdrian Chadd return (ctsrate); 1183e42b5dbaSAdrian Chadd } 1184e42b5dbaSAdrian Chadd 1185e42b5dbaSAdrian Chadd /* 1186e42b5dbaSAdrian Chadd * Calculate the RTS/CTS duration for legacy frames. 1187e42b5dbaSAdrian Chadd */ 1188e42b5dbaSAdrian Chadd static int 1189e42b5dbaSAdrian Chadd ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix, 1190e42b5dbaSAdrian Chadd int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt, 1191e42b5dbaSAdrian Chadd int flags) 1192e42b5dbaSAdrian Chadd { 1193e42b5dbaSAdrian Chadd int ctsduration = 0; 1194e42b5dbaSAdrian Chadd 1195e42b5dbaSAdrian Chadd /* This mustn't be called for HT modes */ 1196e42b5dbaSAdrian Chadd if (rt->info[cix].phy == IEEE80211_T_HT) { 1197e42b5dbaSAdrian Chadd printf("%s: HT rate where it shouldn't be (0x%x)\n", 1198e42b5dbaSAdrian Chadd __func__, rt->info[cix].rateCode); 1199d4365d16SAdrian Chadd return (-1); 1200e42b5dbaSAdrian Chadd } 1201e42b5dbaSAdrian Chadd 120279f02dbfSAdrian Chadd /* 120379f02dbfSAdrian Chadd * Compute the transmit duration based on the frame 120479f02dbfSAdrian Chadd * size and the size of an ACK frame. We call into the 120579f02dbfSAdrian Chadd * HAL to do the computation since it depends on the 120679f02dbfSAdrian Chadd * characteristics of the actual PHY being used. 120779f02dbfSAdrian Chadd * 120879f02dbfSAdrian Chadd * NB: CTS is assumed the same size as an ACK so we can 120979f02dbfSAdrian Chadd * use the precalculated ACK durations. 121079f02dbfSAdrian Chadd */ 121179f02dbfSAdrian Chadd if (shortPreamble) { 121279f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1213e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].spAckDuration; 1214e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 12157ff1939dSAdrian Chadd rt, pktlen, rix, AH_TRUE, AH_TRUE); 121679f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1217e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].spAckDuration; 121879f02dbfSAdrian Chadd } else { 121979f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1220e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].lpAckDuration; 1221e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah, 12227ff1939dSAdrian Chadd rt, pktlen, rix, AH_FALSE, AH_TRUE); 122379f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1224e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].lpAckDuration; 122579f02dbfSAdrian Chadd } 1226e42b5dbaSAdrian Chadd 1227d4365d16SAdrian Chadd return (ctsduration); 122879f02dbfSAdrian Chadd } 122979f02dbfSAdrian Chadd 1230eb6f0de0SAdrian Chadd /* 1231eb6f0de0SAdrian Chadd * Update the given ath_buf with updated rts/cts setup and duration 1232eb6f0de0SAdrian Chadd * values. 1233eb6f0de0SAdrian Chadd * 1234eb6f0de0SAdrian Chadd * To support rate lookups for each software retry, the rts/cts rate 1235eb6f0de0SAdrian Chadd * and cts duration must be re-calculated. 1236eb6f0de0SAdrian Chadd * 1237eb6f0de0SAdrian Chadd * This function assumes the RTS/CTS flags have been set as needed; 1238eb6f0de0SAdrian Chadd * mrr has been disabled; and the rate control lookup has been done. 1239eb6f0de0SAdrian Chadd * 1240eb6f0de0SAdrian Chadd * XXX TODO: MRR need only be disabled for the pre-11n NICs. 1241eb6f0de0SAdrian Chadd * XXX The 11n NICs support per-rate RTS/CTS configuration. 1242eb6f0de0SAdrian Chadd */ 1243eb6f0de0SAdrian Chadd static void 1244eb6f0de0SAdrian Chadd ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf) 1245eb6f0de0SAdrian Chadd { 1246eb6f0de0SAdrian Chadd uint16_t ctsduration = 0; 1247eb6f0de0SAdrian Chadd uint8_t ctsrate = 0; 1248eb6f0de0SAdrian Chadd uint8_t rix = bf->bf_state.bfs_rc[0].rix; 1249eb6f0de0SAdrian Chadd uint8_t cix = 0; 1250eb6f0de0SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates; 1251eb6f0de0SAdrian Chadd 1252eb6f0de0SAdrian Chadd /* 1253eb6f0de0SAdrian Chadd * No RTS/CTS enabled? Don't bother. 1254eb6f0de0SAdrian Chadd */ 1255875a9451SAdrian Chadd if ((bf->bf_state.bfs_txflags & 1256eb6f0de0SAdrian Chadd (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) { 1257eb6f0de0SAdrian Chadd /* XXX is this really needed? */ 1258eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 1259eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1260eb6f0de0SAdrian Chadd return; 1261eb6f0de0SAdrian Chadd } 1262eb6f0de0SAdrian Chadd 1263eb6f0de0SAdrian Chadd /* 1264eb6f0de0SAdrian Chadd * If protection is enabled, use the protection rix control 1265eb6f0de0SAdrian Chadd * rate. Otherwise use the rate0 control rate. 1266eb6f0de0SAdrian Chadd */ 1267eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_doprot) 1268eb6f0de0SAdrian Chadd rix = sc->sc_protrix; 1269eb6f0de0SAdrian Chadd else 1270eb6f0de0SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix; 1271eb6f0de0SAdrian Chadd 1272eb6f0de0SAdrian Chadd /* 1273eb6f0de0SAdrian Chadd * If the raw path has hard-coded ctsrate0 to something, 1274eb6f0de0SAdrian Chadd * use it. 1275eb6f0de0SAdrian Chadd */ 1276eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ctsrate0 != 0) 1277eb6f0de0SAdrian Chadd cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0); 1278eb6f0de0SAdrian Chadd else 1279eb6f0de0SAdrian Chadd /* Control rate from above */ 1280eb6f0de0SAdrian Chadd cix = rt->info[rix].controlRate; 1281eb6f0de0SAdrian Chadd 1282eb6f0de0SAdrian Chadd /* Calculate the rtscts rate for the given cix */ 1283eb6f0de0SAdrian Chadd ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix, 1284eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream); 1285eb6f0de0SAdrian Chadd 1286eb6f0de0SAdrian Chadd /* The 11n chipsets do ctsduration calculations for you */ 1287eb6f0de0SAdrian Chadd if (! ath_tx_is_11n(sc)) 1288eb6f0de0SAdrian Chadd ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix, 1289eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen, 1290875a9451SAdrian Chadd rt, bf->bf_state.bfs_txflags); 1291eb6f0de0SAdrian Chadd 1292eb6f0de0SAdrian Chadd /* Squirrel away in ath_buf */ 1293eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = ctsrate; 1294eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = ctsduration; 1295eb6f0de0SAdrian Chadd 1296eb6f0de0SAdrian Chadd /* 1297eb6f0de0SAdrian Chadd * Must disable multi-rate retry when using RTS/CTS. 1298eb6f0de0SAdrian Chadd */ 1299af017101SAdrian Chadd if (!sc->sc_mrrprot) { 1300eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = 0; 1301eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = 1302eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */ 1303eb6f0de0SAdrian Chadd } 1304af017101SAdrian Chadd } 1305eb6f0de0SAdrian Chadd 1306eb6f0de0SAdrian Chadd /* 1307eb6f0de0SAdrian Chadd * Setup the descriptor chain for a normal or fast-frame 1308eb6f0de0SAdrian Chadd * frame. 130946634305SAdrian Chadd * 131046634305SAdrian Chadd * XXX TODO: extend to include the destination hardware QCU ID. 131146634305SAdrian Chadd * Make sure that is correct. Make sure that when being added 131246634305SAdrian Chadd * to the mcastq, the CABQ QCUID is set or things will get a bit 131346634305SAdrian Chadd * odd. 1314eb6f0de0SAdrian Chadd */ 1315eb6f0de0SAdrian Chadd static void 1316eb6f0de0SAdrian Chadd ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf) 1317eb6f0de0SAdrian Chadd { 1318eb6f0de0SAdrian Chadd struct ath_desc *ds = bf->bf_desc; 1319eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 1320eb6f0de0SAdrian Chadd 13217d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0) 132283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 132383bbd5ebSRui Paulo "%s: bf=%p, txrate0=%d\n", __func__, bf, 0); 13247d9dd2acSAdrian Chadd 1325eb6f0de0SAdrian Chadd ath_hal_setuptxdesc(ah, ds 1326eb6f0de0SAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */ 1327eb6f0de0SAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */ 1328eb6f0de0SAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */ 1329eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */ 1330eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txrate0 1331eb6f0de0SAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 1332eb6f0de0SAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */ 1333eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */ 1334875a9451SAdrian Chadd , bf->bf_state.bfs_txflags /* flags */ 1335eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 1336eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 1337eb6f0de0SAdrian Chadd ); 1338eb6f0de0SAdrian Chadd 1339eb6f0de0SAdrian Chadd /* 1340eb6f0de0SAdrian Chadd * This will be overriden when the descriptor chain is written. 1341eb6f0de0SAdrian Chadd */ 1342eb6f0de0SAdrian Chadd bf->bf_lastds = ds; 1343eb6f0de0SAdrian Chadd bf->bf_last = bf; 1344eb6f0de0SAdrian Chadd 1345d34a7347SAdrian Chadd /* Set rate control and descriptor chain for this frame */ 1346d34a7347SAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf); 13476e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0); 1348eb6f0de0SAdrian Chadd } 1349eb6f0de0SAdrian Chadd 1350eb6f0de0SAdrian Chadd /* 1351eb6f0de0SAdrian Chadd * Do a rate lookup. 1352eb6f0de0SAdrian Chadd * 1353eb6f0de0SAdrian Chadd * This performs a rate lookup for the given ath_buf only if it's required. 1354eb6f0de0SAdrian Chadd * Non-data frames and raw frames don't require it. 1355eb6f0de0SAdrian Chadd * 1356eb6f0de0SAdrian Chadd * This populates the primary and MRR entries; MRR values are 1357eb6f0de0SAdrian Chadd * then disabled later on if something requires it (eg RTS/CTS on 1358eb6f0de0SAdrian Chadd * pre-11n chipsets. 1359eb6f0de0SAdrian Chadd * 1360eb6f0de0SAdrian Chadd * This needs to be done before the RTS/CTS fields are calculated 1361eb6f0de0SAdrian Chadd * as they may depend upon the rate chosen. 1362eb6f0de0SAdrian Chadd */ 1363eb6f0de0SAdrian Chadd static void 1364eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf) 1365eb6f0de0SAdrian Chadd { 1366eb6f0de0SAdrian Chadd uint8_t rate, rix; 1367eb6f0de0SAdrian Chadd int try0; 1368eb6f0de0SAdrian Chadd 1369eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_doratelookup) 1370eb6f0de0SAdrian Chadd return; 1371eb6f0de0SAdrian Chadd 1372eb6f0de0SAdrian Chadd /* Get rid of any previous state */ 1373eb6f0de0SAdrian Chadd bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1374eb6f0de0SAdrian Chadd 1375eb6f0de0SAdrian Chadd ATH_NODE_LOCK(ATH_NODE(bf->bf_node)); 1376eb6f0de0SAdrian Chadd ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream, 1377eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, &rix, &try0, &rate); 1378eb6f0de0SAdrian Chadd 1379eb6f0de0SAdrian Chadd /* In case MRR is disabled, make sure rc[0] is setup correctly */ 1380eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1381eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = rate; 1382eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1383eb6f0de0SAdrian Chadd 1384eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY) 1385eb6f0de0SAdrian Chadd ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix, 1386eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc); 1387eb6f0de0SAdrian Chadd ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node)); 1388eb6f0de0SAdrian Chadd 1389eb6f0de0SAdrian Chadd sc->sc_txrix = rix; /* for LED blinking */ 1390eb6f0de0SAdrian Chadd sc->sc_lastdatarix = rix; /* for fast frames */ 1391eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1392eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = rate; 1393eb6f0de0SAdrian Chadd } 1394eb6f0de0SAdrian Chadd 1395eb6f0de0SAdrian Chadd /* 13960c54de88SAdrian Chadd * Update the CLRDMASK bit in the ath_buf if it needs to be set. 13970c54de88SAdrian Chadd */ 13980c54de88SAdrian Chadd static void 13990c54de88SAdrian Chadd ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid, 14000c54de88SAdrian Chadd struct ath_buf *bf) 14010c54de88SAdrian Chadd { 14024f25ddbbSAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 14030c54de88SAdrian Chadd 1404375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 14050c54de88SAdrian Chadd 14064f25ddbbSAdrian Chadd if (an->clrdmask == 1) { 14070c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 14084f25ddbbSAdrian Chadd an->clrdmask = 0; 14090c54de88SAdrian Chadd } 14100c54de88SAdrian Chadd } 14110c54de88SAdrian Chadd 14120c54de88SAdrian Chadd /* 141322a3aee6SAdrian Chadd * Return whether this frame should be software queued or 141422a3aee6SAdrian Chadd * direct dispatched. 141522a3aee6SAdrian Chadd * 141622a3aee6SAdrian Chadd * When doing powersave, BAR frames should be queued but other management 141722a3aee6SAdrian Chadd * frames should be directly sent. 141822a3aee6SAdrian Chadd * 141922a3aee6SAdrian Chadd * When not doing powersave, stick BAR frames into the hardware queue 142022a3aee6SAdrian Chadd * so it goes out even though the queue is paused. 142122a3aee6SAdrian Chadd * 142222a3aee6SAdrian Chadd * For now, management frames are also software queued by default. 142322a3aee6SAdrian Chadd */ 142422a3aee6SAdrian Chadd static int 142522a3aee6SAdrian Chadd ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an, 142622a3aee6SAdrian Chadd struct mbuf *m0, int *queue_to_head) 142722a3aee6SAdrian Chadd { 142822a3aee6SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 142922a3aee6SAdrian Chadd struct ieee80211_frame *wh; 143022a3aee6SAdrian Chadd uint8_t type, subtype; 143122a3aee6SAdrian Chadd 143222a3aee6SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 143322a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 143422a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 143522a3aee6SAdrian Chadd 143622a3aee6SAdrian Chadd (*queue_to_head) = 0; 143722a3aee6SAdrian Chadd 143822a3aee6SAdrian Chadd /* If it's not in powersave - direct-dispatch BAR */ 143922a3aee6SAdrian Chadd if ((ATH_NODE(ni)->an_is_powersave == 0) 144022a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 144122a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 144222a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 144322a3aee6SAdrian Chadd "%s: BAR: TX'ing direct\n", __func__); 144422a3aee6SAdrian Chadd return (0); 144522a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 144622a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL && 144722a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) { 144822a3aee6SAdrian Chadd /* BAR TX whilst asleep; queue */ 144922a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 145022a3aee6SAdrian Chadd "%s: swq: TX'ing\n", __func__); 145122a3aee6SAdrian Chadd (*queue_to_head) = 1; 145222a3aee6SAdrian Chadd return (1); 145322a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1) 145422a3aee6SAdrian Chadd && (type == IEEE80211_FC0_TYPE_MGT || 145522a3aee6SAdrian Chadd type == IEEE80211_FC0_TYPE_CTL)) { 145622a3aee6SAdrian Chadd /* 145722a3aee6SAdrian Chadd * Other control/mgmt frame; bypass software queuing 145822a3aee6SAdrian Chadd * for now! 145922a3aee6SAdrian Chadd */ 146083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 146122a3aee6SAdrian Chadd "%s: %6D: Node is asleep; sending mgmt " 146222a3aee6SAdrian Chadd "(type=%d, subtype=%d)\n", 146383bbd5ebSRui Paulo __func__, ni->ni_macaddr, ":", type, subtype); 146422a3aee6SAdrian Chadd return (0); 146522a3aee6SAdrian Chadd } else { 146622a3aee6SAdrian Chadd return (1); 146722a3aee6SAdrian Chadd } 146822a3aee6SAdrian Chadd } 146922a3aee6SAdrian Chadd 147022a3aee6SAdrian Chadd 147122a3aee6SAdrian Chadd /* 1472eb6f0de0SAdrian Chadd * Transmit the given frame to the hardware. 1473eb6f0de0SAdrian Chadd * 1474eb6f0de0SAdrian Chadd * The frame must already be setup; rate control must already have 1475eb6f0de0SAdrian Chadd * been done. 1476eb6f0de0SAdrian Chadd * 1477eb6f0de0SAdrian Chadd * XXX since the TXQ lock is being held here (and I dislike holding 1478eb6f0de0SAdrian Chadd * it for this long when not doing software aggregation), later on 1479eb6f0de0SAdrian Chadd * break this function into "setup_normal" and "xmit_normal". The 1480eb6f0de0SAdrian Chadd * lock only needs to be held for the ath_tx_handoff call. 148122a3aee6SAdrian Chadd * 148222a3aee6SAdrian Chadd * XXX we don't update the leak count here - if we're doing 148322a3aee6SAdrian Chadd * direct frame dispatch, we need to be able to do it without 148422a3aee6SAdrian Chadd * decrementing the leak count (eg multicast queue frames.) 1485eb6f0de0SAdrian Chadd */ 1486eb6f0de0SAdrian Chadd static void 1487eb6f0de0SAdrian Chadd ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq, 1488eb6f0de0SAdrian Chadd struct ath_buf *bf) 1489eb6f0de0SAdrian Chadd { 14900c54de88SAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node); 14910c54de88SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 1492eb6f0de0SAdrian Chadd 1493375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1494eb6f0de0SAdrian Chadd 14950c54de88SAdrian Chadd /* 14960c54de88SAdrian Chadd * For now, just enable CLRDMASK. ath_tx_xmit_normal() does 14970c54de88SAdrian Chadd * set a completion handler however it doesn't (yet) properly 14980c54de88SAdrian Chadd * handle the strict ordering requirements needed for normal, 14990c54de88SAdrian Chadd * non-aggregate session frames. 15000c54de88SAdrian Chadd * 15010c54de88SAdrian Chadd * Once this is implemented, only set CLRDMASK like this for 15020c54de88SAdrian Chadd * frames that must go out - eg management/raw frames. 15030c54de88SAdrian Chadd */ 15040c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 15050c54de88SAdrian Chadd 1506eb6f0de0SAdrian Chadd /* Setup the descriptor before handoff */ 1507eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 1508e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 1509e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 1510eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 1511e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 1512eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 1513eb6f0de0SAdrian Chadd 15140c54de88SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 15150c54de88SAdrian Chadd tid->hwq_depth++; 15160c54de88SAdrian Chadd 15170c54de88SAdrian Chadd /* Assign the completion handler */ 15180c54de88SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 15194e81f27cSAdrian Chadd 1520eb6f0de0SAdrian Chadd /* Hand off to hardware */ 1521eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 1522eb6f0de0SAdrian Chadd } 1523eb6f0de0SAdrian Chadd 1524d05b576dSAdrian Chadd /* 1525d05b576dSAdrian Chadd * Do the basic frame setup stuff that's required before the frame 1526d05b576dSAdrian Chadd * is added to a software queue. 1527d05b576dSAdrian Chadd * 1528d05b576dSAdrian Chadd * All frames get mostly the same treatment and it's done once. 1529d05b576dSAdrian Chadd * Retransmits fiddle with things like the rate control setup, 1530d05b576dSAdrian Chadd * setting the retransmit bit in the packet; doing relevant DMA/bus 1531d05b576dSAdrian Chadd * syncing and relinking it (back) into the hardware TX queue. 1532d05b576dSAdrian Chadd * 1533d05b576dSAdrian Chadd * Note that this may cause the mbuf to be reallocated, so 1534d05b576dSAdrian Chadd * m0 may not be valid. 1535d05b576dSAdrian Chadd */ 1536eb6f0de0SAdrian Chadd static int 1537eb6f0de0SAdrian Chadd ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni, 1538b43facbfSAdrian Chadd struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq) 1539b8e788a5SAdrian Chadd { 1540b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 1541b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 15427a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic; 1543b8e788a5SAdrian Chadd const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams; 1544b8e788a5SAdrian Chadd int error, iswep, ismcast, isfrag, ismrr; 1545eb6f0de0SAdrian Chadd int keyix, hdrlen, pktlen, try0 = 0; 1546eb6f0de0SAdrian Chadd u_int8_t rix = 0, txrate = 0; 1547b8e788a5SAdrian Chadd struct ath_desc *ds; 1548b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 1549eb6f0de0SAdrian Chadd u_int subtype, flags; 1550b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 1551b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 1552b8e788a5SAdrian Chadd HAL_BOOL shortPreamble; 1553b8e788a5SAdrian Chadd struct ath_node *an; 1554b8e788a5SAdrian Chadd u_int pri; 1555b8e788a5SAdrian Chadd 15567561cb5cSAdrian Chadd /* 15577561cb5cSAdrian Chadd * To ensure that both sequence numbers and the CCMP PN handling 15587561cb5cSAdrian Chadd * is "correct", make sure that the relevant TID queue is locked. 15597561cb5cSAdrian Chadd * Otherwise the CCMP PN and seqno may appear out of order, causing 15607561cb5cSAdrian Chadd * re-ordered frames to have out of order CCMP PN's, resulting 15617561cb5cSAdrian Chadd * in many, many frame drops. 15627561cb5cSAdrian Chadd */ 1563375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 15647561cb5cSAdrian Chadd 1565b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 15665945b5f5SKevin Lo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1567b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1568b8e788a5SAdrian Chadd isfrag = m0->m_flags & M_FRAG; 1569b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 1570b8e788a5SAdrian Chadd /* 1571b8e788a5SAdrian Chadd * Packet length must not include any 1572b8e788a5SAdrian Chadd * pad bytes; deduct them here. 1573b8e788a5SAdrian Chadd */ 1574b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3); 1575b8e788a5SAdrian Chadd 157681a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 1577eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen, 1578eb6f0de0SAdrian Chadd &pktlen, &keyix)) { 1579d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 1580b8e788a5SAdrian Chadd return EIO; 1581b8e788a5SAdrian Chadd } 1582b8e788a5SAdrian Chadd 1583b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 1584b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1585b8e788a5SAdrian Chadd 1586b8e788a5SAdrian Chadd pktlen += IEEE80211_CRC_LEN; 1587b8e788a5SAdrian Chadd 1588b8e788a5SAdrian Chadd /* 1589b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This 1590b8e788a5SAdrian Chadd * also calculates the number of descriptors we need. 1591b8e788a5SAdrian Chadd */ 1592b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 1593b8e788a5SAdrian Chadd if (error != 0) 1594b8e788a5SAdrian Chadd return error; 1595f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 1596b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 1597b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 1598b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1599b8e788a5SAdrian Chadd 1600b8e788a5SAdrian Chadd /* setup descriptors */ 1601b8e788a5SAdrian Chadd ds = bf->bf_desc; 1602b8e788a5SAdrian Chadd rt = sc->sc_currates; 1603b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1604b8e788a5SAdrian Chadd 1605b8e788a5SAdrian Chadd /* 1606b8e788a5SAdrian Chadd * NB: the 802.11 layer marks whether or not we should 1607b8e788a5SAdrian Chadd * use short preamble based on the current mode and 1608b8e788a5SAdrian Chadd * negotiated parameters. 1609b8e788a5SAdrian Chadd */ 1610b8e788a5SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1611b8e788a5SAdrian Chadd (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 1612b8e788a5SAdrian Chadd shortPreamble = AH_TRUE; 1613b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_shortpre++; 1614b8e788a5SAdrian Chadd } else { 1615b8e788a5SAdrian Chadd shortPreamble = AH_FALSE; 1616b8e788a5SAdrian Chadd } 1617b8e788a5SAdrian Chadd 1618b8e788a5SAdrian Chadd an = ATH_NODE(ni); 16194e81f27cSAdrian Chadd //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 16204e81f27cSAdrian Chadd flags = 0; 1621b8e788a5SAdrian Chadd ismrr = 0; /* default no multi-rate retry*/ 1622b8e788a5SAdrian Chadd pri = M_WME_GETAC(m0); /* honor classification */ 1623b8e788a5SAdrian Chadd /* XXX use txparams instead of fixed values */ 1624b8e788a5SAdrian Chadd /* 1625b8e788a5SAdrian Chadd * Calculate Atheros packet type from IEEE80211 packet header, 1626b8e788a5SAdrian Chadd * setup for rate calculations, and select h/w transmit queue. 1627b8e788a5SAdrian Chadd */ 1628b8e788a5SAdrian Chadd switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1629b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_MGT: 1630b8e788a5SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1631b8e788a5SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 1632b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_BEACON; 1633b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1634b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PROBE_RESP; 1635b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 1636b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_ATIM; 1637b8e788a5SAdrian Chadd else 1638b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* XXX */ 1639b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1640b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1641b8e788a5SAdrian Chadd if (shortPreamble) 1642b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1643b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1644b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1645b8e788a5SAdrian Chadd break; 1646b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_CTL: 1647b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */ 1648b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1649b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1650b8e788a5SAdrian Chadd if (shortPreamble) 1651b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1652b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY; 1653b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1654b8e788a5SAdrian Chadd break; 1655b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_DATA: 1656b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* default */ 1657b8e788a5SAdrian Chadd /* 1658b8e788a5SAdrian Chadd * Data frames: multicast frames go out at a fixed rate, 1659b8e788a5SAdrian Chadd * EAPOL frames use the mgmt frame rate; otherwise consult 1660b8e788a5SAdrian Chadd * the rate control module for the rate to use. 1661b8e788a5SAdrian Chadd */ 1662b8e788a5SAdrian Chadd if (ismcast) { 1663b8e788a5SAdrian Chadd rix = an->an_mcastrix; 1664b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1665b8e788a5SAdrian Chadd if (shortPreamble) 1666b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1667b8e788a5SAdrian Chadd try0 = 1; 1668b8e788a5SAdrian Chadd } else if (m0->m_flags & M_EAPOL) { 1669b8e788a5SAdrian Chadd /* XXX? maybe always use long preamble? */ 1670b8e788a5SAdrian Chadd rix = an->an_mgmtrix; 1671b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 1672b8e788a5SAdrian Chadd if (shortPreamble) 1673b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 1674b8e788a5SAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */ 1675b8e788a5SAdrian Chadd } else { 1676eb6f0de0SAdrian Chadd /* 1677eb6f0de0SAdrian Chadd * Do rate lookup on each TX, rather than using 1678eb6f0de0SAdrian Chadd * the hard-coded TX information decided here. 1679eb6f0de0SAdrian Chadd */ 1680b8e788a5SAdrian Chadd ismrr = 1; 1681eb6f0de0SAdrian Chadd bf->bf_state.bfs_doratelookup = 1; 1682b8e788a5SAdrian Chadd } 1683b8e788a5SAdrian Chadd if (cap->cap_wmeParams[pri].wmep_noackPolicy) 1684b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 1685b8e788a5SAdrian Chadd break; 1686b8e788a5SAdrian Chadd default: 168776e6fd5dSGleb Smirnoff device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n", 1688b8e788a5SAdrian Chadd wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1689b8e788a5SAdrian Chadd /* XXX statistic */ 1690c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1691d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 1692b8e788a5SAdrian Chadd return EIO; 1693b8e788a5SAdrian Chadd } 1694b8e788a5SAdrian Chadd 1695447fd44aSAdrian Chadd /* 1696447fd44aSAdrian Chadd * There are two known scenarios where the frame AC doesn't match 1697447fd44aSAdrian Chadd * what the destination TXQ is. 1698447fd44aSAdrian Chadd * 1699447fd44aSAdrian Chadd * + non-QoS frames (eg management?) that the net80211 stack has 1700447fd44aSAdrian Chadd * assigned a higher AC to, but since it's a non-QoS TID, it's 1701447fd44aSAdrian Chadd * being thrown into TID 16. TID 16 gets the AC_BE queue. 1702447fd44aSAdrian Chadd * It's quite possible that management frames should just be 1703447fd44aSAdrian Chadd * direct dispatched to hardware rather than go via the software 1704447fd44aSAdrian Chadd * queue; that should be investigated in the future. There are 1705447fd44aSAdrian Chadd * some specific scenarios where this doesn't make sense, mostly 1706447fd44aSAdrian Chadd * surrounding ADDBA request/response - hence why that is special 1707447fd44aSAdrian Chadd * cased. 1708447fd44aSAdrian Chadd * 1709447fd44aSAdrian Chadd * + Multicast frames going into the VAP mcast queue. That shows up 1710447fd44aSAdrian Chadd * as "TXQ 11". 1711447fd44aSAdrian Chadd * 1712447fd44aSAdrian Chadd * This driver should eventually support separate TID and TXQ locking, 1713447fd44aSAdrian Chadd * allowing for arbitrary AC frames to appear on arbitrary software 1714447fd44aSAdrian Chadd * queues, being queued to the "correct" hardware queue when needed. 1715447fd44aSAdrian Chadd */ 1716447fd44aSAdrian Chadd #if 0 17176deb7f32SAdrian Chadd if (txq != sc->sc_ac2q[pri]) { 171883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 17196deb7f32SAdrian Chadd "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n", 17206deb7f32SAdrian Chadd __func__, 17216deb7f32SAdrian Chadd txq, 17226deb7f32SAdrian Chadd txq->axq_qnum, 17236deb7f32SAdrian Chadd pri, 17246deb7f32SAdrian Chadd sc->sc_ac2q[pri], 17256deb7f32SAdrian Chadd sc->sc_ac2q[pri]->axq_qnum); 17266deb7f32SAdrian Chadd } 1727447fd44aSAdrian Chadd #endif 17286deb7f32SAdrian Chadd 1729b8e788a5SAdrian Chadd /* 1730b8e788a5SAdrian Chadd * Calculate miscellaneous flags. 1731b8e788a5SAdrian Chadd */ 1732b8e788a5SAdrian Chadd if (ismcast) { 1733b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 1734b8e788a5SAdrian Chadd } else if (pktlen > vap->iv_rtsthreshold && 1735b8e788a5SAdrian Chadd (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) { 1736b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 1737b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_rts++; 1738b8e788a5SAdrian Chadd } 1739b8e788a5SAdrian Chadd if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */ 1740b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_noack++; 1741b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA 1742b8e788a5SAdrian Chadd if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) { 1743b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_TDMA, 1744b8e788a5SAdrian Chadd "%s: discard frame, ACK required w/ TDMA\n", __func__); 1745b8e788a5SAdrian Chadd sc->sc_stats.ast_tdma_ack++; 1746c23a9d98SAdrian Chadd /* XXX free tx dmamap */ 1747d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 1748b8e788a5SAdrian Chadd return EIO; 1749b8e788a5SAdrian Chadd } 1750b8e788a5SAdrian Chadd #endif 1751b8e788a5SAdrian Chadd 1752*5abc0b25SAdrian Chadd /* 1753*5abc0b25SAdrian Chadd * If it's a frame to do location reporting on, 1754*5abc0b25SAdrian Chadd * communicate it to the HAL. 1755*5abc0b25SAdrian Chadd */ 1756*5abc0b25SAdrian Chadd if (ieee80211_get_toa_params(m0, NULL)) { 1757*5abc0b25SAdrian Chadd device_printf(sc->sc_dev, 1758*5abc0b25SAdrian Chadd "%s: setting TX positioning bit\n", __func__); 1759*5abc0b25SAdrian Chadd flags |= HAL_TXDESC_POS; 1760*5abc0b25SAdrian Chadd 1761*5abc0b25SAdrian Chadd /* 1762*5abc0b25SAdrian Chadd * Note: The hardware reports timestamps for 1763*5abc0b25SAdrian Chadd * each of the RX'ed packets as part of the packet 1764*5abc0b25SAdrian Chadd * exchange. So this means things like RTS/CTS 1765*5abc0b25SAdrian Chadd * exchanges, as well as the final ACK. 1766*5abc0b25SAdrian Chadd * 1767*5abc0b25SAdrian Chadd * So, if you send a RTS-protected NULL data frame, 1768*5abc0b25SAdrian Chadd * you'll get an RX report for the RTS response, then 1769*5abc0b25SAdrian Chadd * an RX report for the NULL frame, and then the TX 1770*5abc0b25SAdrian Chadd * completion at the end. 1771*5abc0b25SAdrian Chadd * 1772*5abc0b25SAdrian Chadd * NOTE: it doesn't work right for CCK frames; 1773*5abc0b25SAdrian Chadd * there's no channel info data provided unless 1774*5abc0b25SAdrian Chadd * it's OFDM or HT. Will have to dig into it. 1775*5abc0b25SAdrian Chadd */ 1776*5abc0b25SAdrian Chadd flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 1777*5abc0b25SAdrian Chadd bf->bf_flags |= ATH_BUF_TOA_PROBE; 1778*5abc0b25SAdrian Chadd } 1779*5abc0b25SAdrian Chadd 1780bcf5fc49SAdrian Chadd #if 0 1781bcf5fc49SAdrian Chadd /* 1782bcf5fc49SAdrian Chadd * Placeholder: if you want to transmit with the azimuth 1783bcf5fc49SAdrian Chadd * timestamp in the end of the payload, here's where you 1784bcf5fc49SAdrian Chadd * should set the TXDESC field. 1785bcf5fc49SAdrian Chadd */ 1786bcf5fc49SAdrian Chadd flags |= HAL_TXDESC_HWTS; 1787bcf5fc49SAdrian Chadd #endif 1788bcf5fc49SAdrian Chadd 1789b8e788a5SAdrian Chadd /* 1790eb6f0de0SAdrian Chadd * Determine if a tx interrupt should be generated for 1791eb6f0de0SAdrian Chadd * this descriptor. We take a tx interrupt to reap 1792eb6f0de0SAdrian Chadd * descriptors when the h/w hits an EOL condition or 1793eb6f0de0SAdrian Chadd * when the descriptor is specifically marked to generate 1794eb6f0de0SAdrian Chadd * an interrupt. We periodically mark descriptors in this 1795eb6f0de0SAdrian Chadd * way to insure timely replenishing of the supply needed 1796eb6f0de0SAdrian Chadd * for sending frames. Defering interrupts reduces system 1797eb6f0de0SAdrian Chadd * load and potentially allows more concurrent work to be 1798eb6f0de0SAdrian Chadd * done but if done to aggressively can cause senders to 1799eb6f0de0SAdrian Chadd * backup. 1800eb6f0de0SAdrian Chadd * 1801eb6f0de0SAdrian Chadd * NB: use >= to deal with sc_txintrperiod changing 1802eb6f0de0SAdrian Chadd * dynamically through sysctl. 1803b8e788a5SAdrian Chadd */ 1804eb6f0de0SAdrian Chadd if (flags & HAL_TXDESC_INTREQ) { 1805eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1806eb6f0de0SAdrian Chadd } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) { 1807eb6f0de0SAdrian Chadd flags |= HAL_TXDESC_INTREQ; 1808eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0; 1809eb6f0de0SAdrian Chadd } 1810e42b5dbaSAdrian Chadd 1811eb6f0de0SAdrian Chadd /* This point forward is actual TX bits */ 1812b8e788a5SAdrian Chadd 1813b8e788a5SAdrian Chadd /* 1814b8e788a5SAdrian Chadd * At this point we are committed to sending the frame 1815b8e788a5SAdrian Chadd * and we don't need to look at m_nextpkt; clear it in 1816b8e788a5SAdrian Chadd * case this frame is part of frag chain. 1817b8e788a5SAdrian Chadd */ 1818b8e788a5SAdrian Chadd m0->m_nextpkt = NULL; 1819b8e788a5SAdrian Chadd 1820b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 1821b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len, 1822b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 1823b8e788a5SAdrian Chadd 1824b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 1825b8e788a5SAdrian Chadd u_int64_t tsf = ath_hal_gettsf64(ah); 1826b8e788a5SAdrian Chadd 1827b8e788a5SAdrian Chadd sc->sc_tx_th.wt_tsf = htole64(tsf); 1828b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 1829b8e788a5SAdrian Chadd if (iswep) 1830b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1831b8e788a5SAdrian Chadd if (isfrag) 1832b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 1833b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 183412087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni); 1835b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 1836b8e788a5SAdrian Chadd 1837b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 1838b8e788a5SAdrian Chadd } 1839b8e788a5SAdrian Chadd 1840eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 1841eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1842c1782ce0SAdrian Chadd 1843b8e788a5SAdrian Chadd /* 1844eb6f0de0SAdrian Chadd * ath_buf_set_rate needs at least one rate/try to setup 1845eb6f0de0SAdrian Chadd * the rate scenario. 1846b8e788a5SAdrian Chadd */ 1847eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 1848eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 1849eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 1850eb6f0de0SAdrian Chadd 1851eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 1852eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 1853eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 1854eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 185512087a07SAdrian Chadd bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni); 1856eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 1857eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 1858eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 1859eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = sc->sc_txantenna; 1860875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 1861eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = shortPreamble; 1862eb6f0de0SAdrian Chadd 1863eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 1864eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */ 1865eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; /* calculated later */ 1866eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 1867eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 1868eb6f0de0SAdrian Chadd 1869eb6f0de0SAdrian Chadd return 0; 1870eb6f0de0SAdrian Chadd } 1871eb6f0de0SAdrian Chadd 1872b8e788a5SAdrian Chadd /* 18734e81f27cSAdrian Chadd * Queue a frame to the hardware or software queue. 1874eb6f0de0SAdrian Chadd * 1875eb6f0de0SAdrian Chadd * This can be called by the net80211 code. 1876eb6f0de0SAdrian Chadd * 1877eb6f0de0SAdrian Chadd * XXX what about locking? Or, push the seqno assign into the 1878eb6f0de0SAdrian Chadd * XXX aggregate scheduler so its serialised? 18794e81f27cSAdrian Chadd * 18804e81f27cSAdrian Chadd * XXX When sending management frames via ath_raw_xmit(), 18814e81f27cSAdrian Chadd * should CLRDMASK be set unconditionally? 1882b8e788a5SAdrian Chadd */ 1883eb6f0de0SAdrian Chadd int 1884eb6f0de0SAdrian Chadd ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, 1885eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 1886eb6f0de0SAdrian Chadd { 1887eb6f0de0SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 1888eb6f0de0SAdrian Chadd struct ath_vap *avp = ATH_VAP(vap); 18899c85ff91SAdrian Chadd int r = 0; 1890eb6f0de0SAdrian Chadd u_int pri; 1891eb6f0de0SAdrian Chadd int tid; 1892eb6f0de0SAdrian Chadd struct ath_txq *txq; 1893eb6f0de0SAdrian Chadd int ismcast; 1894eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh; 1895eb6f0de0SAdrian Chadd int is_ampdu, is_ampdu_tx, is_ampdu_pending; 1896a108d2d6SAdrian Chadd ieee80211_seq seqno; 1897eb6f0de0SAdrian Chadd uint8_t type, subtype; 189822a3aee6SAdrian Chadd int queue_to_head; 1899eb6f0de0SAdrian Chadd 1900375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 1901375307d4SAdrian Chadd 1902eb6f0de0SAdrian Chadd /* 1903eb6f0de0SAdrian Chadd * Determine the target hardware queue. 1904eb6f0de0SAdrian Chadd * 1905b43facbfSAdrian Chadd * For multicast frames, the txq gets overridden appropriately 1906b43facbfSAdrian Chadd * depending upon the state of PS. 1907eb6f0de0SAdrian Chadd * 1908eb6f0de0SAdrian Chadd * For any other frame, we do a TID/QoS lookup inside the frame 1909eb6f0de0SAdrian Chadd * to see what the TID should be. If it's a non-QoS frame, the 1910eb6f0de0SAdrian Chadd * AC and TID are overridden. The TID/TXQ code assumes the 1911eb6f0de0SAdrian Chadd * TID is on a predictable hardware TXQ, so we don't support 1912eb6f0de0SAdrian Chadd * having a node TID queued to multiple hardware TXQs. 1913eb6f0de0SAdrian Chadd * This may change in the future but would require some locking 1914eb6f0de0SAdrian Chadd * fudgery. 1915eb6f0de0SAdrian Chadd */ 1916eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 1917eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 1918eb6f0de0SAdrian Chadd 1919eb6f0de0SAdrian Chadd txq = sc->sc_ac2q[pri]; 1920eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 1921eb6f0de0SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1922eb6f0de0SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1923eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1924eb6f0de0SAdrian Chadd 19259c85ff91SAdrian Chadd /* 19269c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 19279c85ff91SAdrian Chadd * 19289c85ff91SAdrian Chadd * XXX duplicated in ath_raw_xmit(). 19299c85ff91SAdrian Chadd */ 19309c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 193192e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 193292e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 19339c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 19349c85ff91SAdrian Chadd m_freem(m0); 193555cf0326SAdrian Chadd return (ENOBUFS); 19369c85ff91SAdrian Chadd } 19379c85ff91SAdrian Chadd } 19389c85ff91SAdrian Chadd 193922a3aee6SAdrian Chadd /* 194022a3aee6SAdrian Chadd * Enforce how deep the unicast queue can grow. 194122a3aee6SAdrian Chadd * 194222a3aee6SAdrian Chadd * If the node is in power save then we don't want 194322a3aee6SAdrian Chadd * the software queue to grow too deep, or a node may 194422a3aee6SAdrian Chadd * end up consuming all of the ath_buf entries. 194522a3aee6SAdrian Chadd * 194622a3aee6SAdrian Chadd * For now, only do this for DATA frames. 194722a3aee6SAdrian Chadd * 194822a3aee6SAdrian Chadd * We will want to cap how many management/control 194922a3aee6SAdrian Chadd * frames get punted to the software queue so it doesn't 195022a3aee6SAdrian Chadd * fill up. But the correct solution isn't yet obvious. 195122a3aee6SAdrian Chadd * In any case, this check should at least let frames pass 195222a3aee6SAdrian Chadd * that we are direct-dispatching. 195322a3aee6SAdrian Chadd * 195422a3aee6SAdrian Chadd * XXX TODO: duplicate this to the raw xmit path! 195522a3aee6SAdrian Chadd */ 195622a3aee6SAdrian Chadd if (type == IEEE80211_FC0_TYPE_DATA && 195722a3aee6SAdrian Chadd ATH_NODE(ni)->an_is_powersave && 195822a3aee6SAdrian Chadd ATH_NODE(ni)->an_swq_depth > 195922a3aee6SAdrian Chadd sc->sc_txq_node_psq_maxdepth) { 196022a3aee6SAdrian Chadd sc->sc_stats.ast_tx_node_psq_overflow++; 196122a3aee6SAdrian Chadd m_freem(m0); 196222a3aee6SAdrian Chadd return (ENOBUFS); 196322a3aee6SAdrian Chadd } 196422a3aee6SAdrian Chadd 1965eb6f0de0SAdrian Chadd /* A-MPDU TX */ 1966eb6f0de0SAdrian Chadd is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid); 1967eb6f0de0SAdrian Chadd is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1968eb6f0de0SAdrian Chadd is_ampdu = is_ampdu_tx | is_ampdu_pending; 1969eb6f0de0SAdrian Chadd 1970a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1971a108d2d6SAdrian Chadd __func__, tid, pri, is_ampdu); 1972eb6f0de0SAdrian Chadd 197346634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 197446634305SAdrian Chadd bf->bf_state.bfs_tid = tid; 1975fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 197646634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 197746634305SAdrian Chadd 1978b837332dSAdrian Chadd #if 1 1979c5940c30SAdrian Chadd /* 1980b43facbfSAdrian Chadd * When servicing one or more stations in power-save mode 1981b43facbfSAdrian Chadd * (or) if there is some mcast data waiting on the mcast 1982b43facbfSAdrian Chadd * queue (to prevent out of order delivery) multicast frames 1983b43facbfSAdrian Chadd * must be bufferd until after the beacon. 1984b43facbfSAdrian Chadd * 1985b43facbfSAdrian Chadd * TODO: we should lock the mcastq before we check the length. 1986c5940c30SAdrian Chadd */ 1987b837332dSAdrian Chadd if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 1988eb6f0de0SAdrian Chadd txq = &avp->av_mcastq; 198946634305SAdrian Chadd /* 199046634305SAdrian Chadd * Mark the frame as eventually belonging on the CAB 199146634305SAdrian Chadd * queue, so the descriptor setup functions will 199246634305SAdrian Chadd * correctly initialise the descriptor 'qcuId' field. 199346634305SAdrian Chadd */ 1994fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum; 199546634305SAdrian Chadd } 1996b837332dSAdrian Chadd #endif 1997eb6f0de0SAdrian Chadd 1998eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 1999eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 2000eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 2001eb6f0de0SAdrian Chadd 20027561cb5cSAdrian Chadd /* A-MPDU TX? Manually set sequence number */ 20037561cb5cSAdrian Chadd /* 20047561cb5cSAdrian Chadd * Don't do it whilst pending; the net80211 layer still 20057561cb5cSAdrian Chadd * assigns them. 20067561cb5cSAdrian Chadd */ 20077561cb5cSAdrian Chadd if (is_ampdu_tx) { 2008eb6f0de0SAdrian Chadd /* 2009eb6f0de0SAdrian Chadd * Always call; this function will 2010eb6f0de0SAdrian Chadd * handle making sure that null data frames 2011eb6f0de0SAdrian Chadd * don't get a sequence number from the current 2012eb6f0de0SAdrian Chadd * TID and thus mess with the BAW. 2013eb6f0de0SAdrian Chadd */ 2014a108d2d6SAdrian Chadd seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0); 201542f4d061SAdrian Chadd 201642f4d061SAdrian Chadd /* 201742f4d061SAdrian Chadd * Don't add QoS NULL frames to the BAW. 201842f4d061SAdrian Chadd */ 2019a108d2d6SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh) && 2020a108d2d6SAdrian Chadd subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) { 2021eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 1; 2022eb6f0de0SAdrian Chadd } 2023c1782ce0SAdrian Chadd } 2024c1782ce0SAdrian Chadd 2025eb6f0de0SAdrian Chadd /* 2026eb6f0de0SAdrian Chadd * If needed, the sequence number has been assigned. 2027eb6f0de0SAdrian Chadd * Squirrel it away somewhere easy to get to. 2028eb6f0de0SAdrian Chadd */ 2029a108d2d6SAdrian Chadd bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT; 2030b8e788a5SAdrian Chadd 2031eb6f0de0SAdrian Chadd /* Is ampdu pending? fetch the seqno and print it out */ 2032eb6f0de0SAdrian Chadd if (is_ampdu_pending) 2033eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 2034eb6f0de0SAdrian Chadd "%s: tid %d: ampdu pending, seqno %d\n", 2035eb6f0de0SAdrian Chadd __func__, tid, M_SEQNO_GET(m0)); 2036eb6f0de0SAdrian Chadd 2037eb6f0de0SAdrian Chadd /* This also sets up the DMA map */ 2038b43facbfSAdrian Chadd r = ath_tx_normal_setup(sc, ni, bf, m0, txq); 2039eb6f0de0SAdrian Chadd 2040eb6f0de0SAdrian Chadd if (r != 0) 20417561cb5cSAdrian Chadd goto done; 2042eb6f0de0SAdrian Chadd 2043eb6f0de0SAdrian Chadd /* At this point m0 could have changed! */ 2044eb6f0de0SAdrian Chadd m0 = bf->bf_m; 2045eb6f0de0SAdrian Chadd 2046eb6f0de0SAdrian Chadd #if 1 2047eb6f0de0SAdrian Chadd /* 2048eb6f0de0SAdrian Chadd * If it's a multicast frame, do a direct-dispatch to the 2049eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2050eb6f0de0SAdrian Chadd * queuing it. 2051eb6f0de0SAdrian Chadd */ 2052eb6f0de0SAdrian Chadd /* 2053eb6f0de0SAdrian Chadd * If it's a BAR frame, do a direct dispatch to the 2054eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software 2055eb6f0de0SAdrian Chadd * queuing it, as the TID will now be paused. 2056eb6f0de0SAdrian Chadd * Sending a BAR frame can occur from the net80211 txa timer 2057eb6f0de0SAdrian Chadd * (ie, retries) or from the ath txtask (completion call.) 2058eb6f0de0SAdrian Chadd * It queues directly to hardware because the TID is paused 2059eb6f0de0SAdrian Chadd * at this point (and won't be unpaused until the BAR has 2060eb6f0de0SAdrian Chadd * either been TXed successfully or max retries has been 2061eb6f0de0SAdrian Chadd * reached.) 2062eb6f0de0SAdrian Chadd */ 206322a3aee6SAdrian Chadd /* 206422a3aee6SAdrian Chadd * Until things are better debugged - if this node is asleep 206522a3aee6SAdrian Chadd * and we're sending it a non-BAR frame, direct dispatch it. 206622a3aee6SAdrian Chadd * Why? Because we need to figure out what's actually being 206722a3aee6SAdrian Chadd * sent - eg, during reassociation/reauthentication after 206822a3aee6SAdrian Chadd * the node (last) disappeared whilst asleep, the driver should 206922a3aee6SAdrian Chadd * have unpaused/unsleep'ed the node. So until that is 207022a3aee6SAdrian Chadd * sorted out, use this workaround. 207122a3aee6SAdrian Chadd */ 2072eb6f0de0SAdrian Chadd if (txq == &avp->av_mcastq) { 2073d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 20740b96ef63SAdrian Chadd "%s: bf=%p: mcastq: TX'ing\n", __func__, bf); 20754e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2076eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 207722a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 207822a3aee6SAdrian Chadd &queue_to_head)) { 207922a3aee6SAdrian Chadd ath_tx_swq(sc, ni, txq, queue_to_head, bf); 208022a3aee6SAdrian Chadd } else { 20814e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2082eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2083eb6f0de0SAdrian Chadd } 2084eb6f0de0SAdrian Chadd #else 2085eb6f0de0SAdrian Chadd /* 2086eb6f0de0SAdrian Chadd * For now, since there's no software queue, 2087eb6f0de0SAdrian Chadd * direct-dispatch to the hardware. 2088eb6f0de0SAdrian Chadd */ 20894e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 209022a3aee6SAdrian Chadd /* 209122a3aee6SAdrian Chadd * Update the current leak count if 209222a3aee6SAdrian Chadd * we're leaking frames; and set the 209322a3aee6SAdrian Chadd * MORE flag as appropriate. 209422a3aee6SAdrian Chadd */ 209522a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 2096eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 2097eb6f0de0SAdrian Chadd #endif 20987561cb5cSAdrian Chadd done: 2099b8e788a5SAdrian Chadd return 0; 2100b8e788a5SAdrian Chadd } 2101b8e788a5SAdrian Chadd 2102b8e788a5SAdrian Chadd static int 2103b8e788a5SAdrian Chadd ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni, 2104b8e788a5SAdrian Chadd struct ath_buf *bf, struct mbuf *m0, 2105b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2106b8e788a5SAdrian Chadd { 21077a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic; 2108b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah; 2109b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap; 2110b8e788a5SAdrian Chadd int error, ismcast, ismrr; 2111b8e788a5SAdrian Chadd int keyix, hdrlen, pktlen, try0, txantenna; 2112eb6f0de0SAdrian Chadd u_int8_t rix, txrate; 2113b8e788a5SAdrian Chadd struct ieee80211_frame *wh; 2114eb6f0de0SAdrian Chadd u_int flags; 2115b8e788a5SAdrian Chadd HAL_PKT_TYPE atype; 2116b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt; 2117b8e788a5SAdrian Chadd struct ath_desc *ds; 2118b8e788a5SAdrian Chadd u_int pri; 2119eb6f0de0SAdrian Chadd int o_tid = -1; 2120eb6f0de0SAdrian Chadd int do_override; 212122a3aee6SAdrian Chadd uint8_t type, subtype; 212222a3aee6SAdrian Chadd int queue_to_head; 2123f5c30c4eSAdrian Chadd struct ath_node *an = ATH_NODE(ni); 2124b8e788a5SAdrian Chadd 2125375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2126375307d4SAdrian Chadd 2127b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2128b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2129b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh); 2130b8e788a5SAdrian Chadd /* 2131b8e788a5SAdrian Chadd * Packet length must not include any 2132b8e788a5SAdrian Chadd * pad bytes; deduct them here. 2133b8e788a5SAdrian Chadd */ 2134b8e788a5SAdrian Chadd /* XXX honor IEEE80211_BPF_DATAPAD */ 2135b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN; 2136b8e788a5SAdrian Chadd 213722a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 213822a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 213922a3aee6SAdrian Chadd 214003682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, 214103682514SAdrian Chadd "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf); 214203682514SAdrian Chadd 2143eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n", 2144eb6f0de0SAdrian Chadd __func__, ismcast); 2145eb6f0de0SAdrian Chadd 21467561cb5cSAdrian Chadd pri = params->ibp_pri & 3; 21477561cb5cSAdrian Chadd /* Override pri if the frame isn't a QoS one */ 21487561cb5cSAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 21497561cb5cSAdrian Chadd pri = ath_tx_getac(sc, m0); 21507561cb5cSAdrian Chadd 21517561cb5cSAdrian Chadd /* XXX If it's an ADDBA, override the correct queue */ 21527561cb5cSAdrian Chadd do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid); 21537561cb5cSAdrian Chadd 21547561cb5cSAdrian Chadd /* Map ADDBA to the correct priority */ 21557561cb5cSAdrian Chadd if (do_override) { 21567561cb5cSAdrian Chadd #if 0 215783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 21587561cb5cSAdrian Chadd "%s: overriding tid %d pri %d -> %d\n", 21597561cb5cSAdrian Chadd __func__, o_tid, pri, TID_TO_WME_AC(o_tid)); 21607561cb5cSAdrian Chadd #endif 21617561cb5cSAdrian Chadd pri = TID_TO_WME_AC(o_tid); 21627561cb5cSAdrian Chadd } 21637561cb5cSAdrian Chadd 216481a82688SAdrian Chadd /* Handle encryption twiddling if needed */ 2165eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, 2166eb6f0de0SAdrian Chadd m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0, 2167eb6f0de0SAdrian Chadd &hdrlen, &pktlen, &keyix)) { 2168d07be335SAdrian Chadd ieee80211_free_mbuf(m0); 2169b8e788a5SAdrian Chadd return EIO; 2170b8e788a5SAdrian Chadd } 2171b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */ 2172b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2173b8e788a5SAdrian Chadd 2174eb6f0de0SAdrian Chadd /* Do the generic frame setup */ 2175eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */ 2176eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 2177eb6f0de0SAdrian Chadd 2178b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0); 2179b8e788a5SAdrian Chadd if (error != 0) 2180b8e788a5SAdrian Chadd return error; 2181b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */ 2182b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2183f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 2184b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */ 2185b8e788a5SAdrian Chadd 21864e81f27cSAdrian Chadd /* Always enable CLRDMASK for raw frames for now.. */ 2187b8e788a5SAdrian Chadd flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 2188b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 2189b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_RTS) 2190b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; 2191eb6f0de0SAdrian Chadd else if (params->ibp_flags & IEEE80211_BPF_CTS) { 2192eb6f0de0SAdrian Chadd /* XXX assume 11g/11n protection? */ 2193eb6f0de0SAdrian Chadd bf->bf_state.bfs_doprot = 1; 2194b8e788a5SAdrian Chadd flags |= HAL_TXDESC_CTSENA; 2195eb6f0de0SAdrian Chadd } 2196b8e788a5SAdrian Chadd /* XXX leave ismcast to injector? */ 2197b8e788a5SAdrian Chadd if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast) 2198b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; 2199b8e788a5SAdrian Chadd 2200b8e788a5SAdrian Chadd rt = sc->sc_currates; 2201b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2202f5c30c4eSAdrian Chadd 2203f5c30c4eSAdrian Chadd /* Fetch first rate information */ 2204b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate0); 2205f5c30c4eSAdrian Chadd try0 = params->ibp_try0; 2206f5c30c4eSAdrian Chadd 2207f5c30c4eSAdrian Chadd /* 2208f5c30c4eSAdrian Chadd * Override EAPOL rate as appropriate. 2209f5c30c4eSAdrian Chadd */ 2210f5c30c4eSAdrian Chadd if (m0->m_flags & M_EAPOL) { 2211f5c30c4eSAdrian Chadd /* XXX? maybe always use long preamble? */ 2212f5c30c4eSAdrian Chadd rix = an->an_mgmtrix; 2213f5c30c4eSAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */ 2214f5c30c4eSAdrian Chadd } 2215f5c30c4eSAdrian Chadd 2216*5abc0b25SAdrian Chadd /* 2217*5abc0b25SAdrian Chadd * If it's a frame to do location reporting on, 2218*5abc0b25SAdrian Chadd * communicate it to the HAL. 2219*5abc0b25SAdrian Chadd */ 2220*5abc0b25SAdrian Chadd if (ieee80211_get_toa_params(m0, NULL)) { 2221*5abc0b25SAdrian Chadd device_printf(sc->sc_dev, 2222*5abc0b25SAdrian Chadd "%s: setting TX positioning bit\n", __func__); 2223*5abc0b25SAdrian Chadd flags |= HAL_TXDESC_POS; 2224*5abc0b25SAdrian Chadd flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 2225*5abc0b25SAdrian Chadd bf->bf_flags |= ATH_BUF_TOA_PROBE; 2226*5abc0b25SAdrian Chadd } 2227*5abc0b25SAdrian Chadd 2228b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode; 2229b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) 2230b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble; 2231b8e788a5SAdrian Chadd sc->sc_txrix = rix; 2232b8e788a5SAdrian Chadd ismrr = (params->ibp_try1 != 0); 2233b8e788a5SAdrian Chadd txantenna = params->ibp_pri >> 2; 2234b8e788a5SAdrian Chadd if (txantenna == 0) /* XXX? */ 2235b8e788a5SAdrian Chadd txantenna = sc->sc_txantenna; 223679f02dbfSAdrian Chadd 223779f02dbfSAdrian Chadd /* 2238eb6f0de0SAdrian Chadd * Since ctsrate is fixed, store it away for later 2239eb6f0de0SAdrian Chadd * use when the descriptor fields are being set. 224079f02dbfSAdrian Chadd */ 2241eb6f0de0SAdrian Chadd if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) 2242eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate; 224379f02dbfSAdrian Chadd 2244b8e788a5SAdrian Chadd /* 2245b8e788a5SAdrian Chadd * NB: we mark all packets as type PSPOLL so the h/w won't 2246b8e788a5SAdrian Chadd * set the sequence number, duration, etc. 2247b8e788a5SAdrian Chadd */ 2248b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; 2249b8e788a5SAdrian Chadd 2250b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 2251b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len, 2252b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1); 2253b8e788a5SAdrian Chadd 2254b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) { 2255b8e788a5SAdrian Chadd u_int64_t tsf = ath_hal_gettsf64(ah); 2256b8e788a5SAdrian Chadd 2257b8e788a5SAdrian Chadd sc->sc_tx_th.wt_tsf = htole64(tsf); 2258b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 22595945b5f5SKevin Lo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) 2260b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2261b8e788a5SAdrian Chadd if (m0->m_flags & M_FRAG) 2262b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 2263b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 226412087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = MIN(params->ibp_power, 226512087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2266b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 2267b8e788a5SAdrian Chadd 2268b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0); 2269b8e788a5SAdrian Chadd } 2270b8e788a5SAdrian Chadd 2271b8e788a5SAdrian Chadd /* 2272b8e788a5SAdrian Chadd * Formulate first tx descriptor with tx controls. 2273b8e788a5SAdrian Chadd */ 2274b8e788a5SAdrian Chadd ds = bf->bf_desc; 2275b8e788a5SAdrian Chadd /* XXX check return value? */ 2276eb6f0de0SAdrian Chadd 2277eb6f0de0SAdrian Chadd /* Store the decided rate index values away */ 2278eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen; 2279eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen; 2280eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype; 228112087a07SAdrian Chadd bf->bf_state.bfs_txpower = MIN(params->ibp_power, 228212087a07SAdrian Chadd ieee80211_get_node_txpower(ni)); 2283eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate; 2284eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0; 2285eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix; 2286eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = txantenna; 2287875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags; 2288eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = 2289eb6f0de0SAdrian Chadd !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2290b8e788a5SAdrian Chadd 229146634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 229246634305SAdrian Chadd bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); 2293fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum; 229446634305SAdrian Chadd bf->bf_state.bfs_pri = pri; 229546634305SAdrian Chadd 2296eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */ 2297eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; 2298eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0; 2299eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr; 2300eb6f0de0SAdrian Chadd 2301eb6f0de0SAdrian Chadd /* Blank the legacy rate array */ 2302eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 2303eb6f0de0SAdrian Chadd 2304f5c30c4eSAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix; 2305eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0; 2306eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate; 2307c1782ce0SAdrian Chadd 2308c1782ce0SAdrian Chadd if (ismrr) { 2309eb6f0de0SAdrian Chadd int rix; 2310c1782ce0SAdrian Chadd 2311b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate1); 2312eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].rix = rix; 2313eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].tries = params->ibp_try1; 2314c1782ce0SAdrian Chadd 2315eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate2); 2316eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].rix = rix; 2317eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].tries = params->ibp_try2; 2318eb6f0de0SAdrian Chadd 2319eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate3); 2320eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = rix; 2321eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = params->ibp_try3; 2322c1782ce0SAdrian Chadd } 2323eb6f0de0SAdrian Chadd /* 2324eb6f0de0SAdrian Chadd * All the required rate control decisions have been made; 2325eb6f0de0SAdrian Chadd * fill in the rc flags. 2326eb6f0de0SAdrian Chadd */ 2327eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 2328b8e788a5SAdrian Chadd 2329b8e788a5SAdrian Chadd /* NB: no buffered multicast in power save support */ 2330eb6f0de0SAdrian Chadd 2331eb6f0de0SAdrian Chadd /* 2332eb6f0de0SAdrian Chadd * If we're overiding the ADDBA destination, dump directly 2333eb6f0de0SAdrian Chadd * into the hardware queue, right after any pending 2334eb6f0de0SAdrian Chadd * frames to that node are. 2335eb6f0de0SAdrian Chadd */ 2336eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n", 2337eb6f0de0SAdrian Chadd __func__, do_override); 2338eb6f0de0SAdrian Chadd 233994eefcf1SAdrian Chadd #if 1 234022a3aee6SAdrian Chadd /* 234122a3aee6SAdrian Chadd * Put addba frames in the right place in the right TID/HWQ. 234222a3aee6SAdrian Chadd */ 2343eb6f0de0SAdrian Chadd if (do_override) { 23444e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 234522a3aee6SAdrian Chadd /* 234622a3aee6SAdrian Chadd * XXX if it's addba frames, should we be leaking 234722a3aee6SAdrian Chadd * them out via the frame leak method? 234822a3aee6SAdrian Chadd * XXX for now let's not risk it; but we may wish 234922a3aee6SAdrian Chadd * to investigate this later. 235022a3aee6SAdrian Chadd */ 2351eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 235222a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 235322a3aee6SAdrian Chadd &queue_to_head)) { 2354eb6f0de0SAdrian Chadd /* Queue to software queue */ 235522a3aee6SAdrian Chadd ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf); 235622a3aee6SAdrian Chadd } else { 235722a3aee6SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 235822a3aee6SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2359eb6f0de0SAdrian Chadd } 236094eefcf1SAdrian Chadd #else 236194eefcf1SAdrian Chadd /* Direct-dispatch to the hardware */ 236294eefcf1SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 236322a3aee6SAdrian Chadd /* 236422a3aee6SAdrian Chadd * Update the current leak count if 236522a3aee6SAdrian Chadd * we're leaking frames; and set the 236622a3aee6SAdrian Chadd * MORE flag as appropriate. 236722a3aee6SAdrian Chadd */ 236822a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 236994eefcf1SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 237094eefcf1SAdrian Chadd #endif 2371b8e788a5SAdrian Chadd return 0; 2372b8e788a5SAdrian Chadd } 2373b8e788a5SAdrian Chadd 2374eb6f0de0SAdrian Chadd /* 2375eb6f0de0SAdrian Chadd * Send a raw frame. 2376eb6f0de0SAdrian Chadd * 2377eb6f0de0SAdrian Chadd * This can be called by net80211. 2378eb6f0de0SAdrian Chadd */ 2379b8e788a5SAdrian Chadd int 2380b8e788a5SAdrian Chadd ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2381b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params) 2382b8e788a5SAdrian Chadd { 2383b8e788a5SAdrian Chadd struct ieee80211com *ic = ni->ni_ic; 23843797bf08SAdrian Chadd struct ath_softc *sc = ic->ic_softc; 2385b8e788a5SAdrian Chadd struct ath_buf *bf; 23869c85ff91SAdrian Chadd struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *); 23879c85ff91SAdrian Chadd int error = 0; 2388b8e788a5SAdrian Chadd 2389ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2390ef27340cSAdrian Chadd if (sc->sc_inreset_cnt > 0) { 239183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 239283bbd5ebSRui Paulo "%s: sc_inreset_cnt > 0; bailing\n", __func__); 2393ef27340cSAdrian Chadd error = EIO; 2394ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2395f5c30c4eSAdrian Chadd goto badbad; 2396ef27340cSAdrian Chadd } 2397ef27340cSAdrian Chadd sc->sc_txstart_cnt++; 2398ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2399ef27340cSAdrian Chadd 2400f5c30c4eSAdrian Chadd /* Wake the hardware up already */ 2401f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2402f5c30c4eSAdrian Chadd ath_power_set_power_state(sc, HAL_PM_AWAKE); 2403f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2404f5c30c4eSAdrian Chadd 24051b5c5f5aSAdrian Chadd ATH_TX_LOCK(sc); 24061b5c5f5aSAdrian Chadd 24077a79cebfSGleb Smirnoff if (!sc->sc_running || sc->sc_invalid) { 24087a79cebfSGleb Smirnoff DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d", 24097a79cebfSGleb Smirnoff __func__, sc->sc_running, sc->sc_invalid); 2410b8e788a5SAdrian Chadd m_freem(m); 2411b8e788a5SAdrian Chadd error = ENETDOWN; 2412b8e788a5SAdrian Chadd goto bad; 2413b8e788a5SAdrian Chadd } 24149c85ff91SAdrian Chadd 24159c85ff91SAdrian Chadd /* 24169c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow. 24179c85ff91SAdrian Chadd * 24189c85ff91SAdrian Chadd * XXX duplicated in ath_tx_start(). 24199c85ff91SAdrian Chadd */ 24209c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 242192e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 242292e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) { 24239c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++; 24249c85ff91SAdrian Chadd error = ENOBUFS; 24259c85ff91SAdrian Chadd } 24269c85ff91SAdrian Chadd 24279c85ff91SAdrian Chadd if (error != 0) { 24289c85ff91SAdrian Chadd m_freem(m); 24299c85ff91SAdrian Chadd goto bad; 24309c85ff91SAdrian Chadd } 24319c85ff91SAdrian Chadd } 24329c85ff91SAdrian Chadd 2433b8e788a5SAdrian Chadd /* 2434b8e788a5SAdrian Chadd * Grab a TX buffer and associated resources. 2435b8e788a5SAdrian Chadd */ 2436af33d486SAdrian Chadd bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT); 2437b8e788a5SAdrian Chadd if (bf == NULL) { 2438b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nobuf++; 2439b8e788a5SAdrian Chadd m_freem(m); 2440b8e788a5SAdrian Chadd error = ENOBUFS; 2441b8e788a5SAdrian Chadd goto bad; 2442b8e788a5SAdrian Chadd } 244303682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n", 244403682514SAdrian Chadd m, params, bf); 2445b8e788a5SAdrian Chadd 2446b8e788a5SAdrian Chadd if (params == NULL) { 2447b8e788a5SAdrian Chadd /* 2448b8e788a5SAdrian Chadd * Legacy path; interpret frame contents to decide 2449b8e788a5SAdrian Chadd * precisely how to send the frame. 2450b8e788a5SAdrian Chadd */ 2451b8e788a5SAdrian Chadd if (ath_tx_start(sc, ni, bf, m)) { 2452b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2453b8e788a5SAdrian Chadd goto bad2; 2454b8e788a5SAdrian Chadd } 2455b8e788a5SAdrian Chadd } else { 2456b8e788a5SAdrian Chadd /* 2457b8e788a5SAdrian Chadd * Caller supplied explicit parameters to use in 2458b8e788a5SAdrian Chadd * sending the frame. 2459b8e788a5SAdrian Chadd */ 2460b8e788a5SAdrian Chadd if (ath_tx_raw_start(sc, ni, bf, m, params)) { 2461b8e788a5SAdrian Chadd error = EIO; /* XXX */ 2462b8e788a5SAdrian Chadd goto bad2; 2463b8e788a5SAdrian Chadd } 2464b8e788a5SAdrian Chadd } 2465b8e788a5SAdrian Chadd sc->sc_wd_timer = 5; 2466b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw++; 2467b8e788a5SAdrian Chadd 2468548a605dSAdrian Chadd /* 2469548a605dSAdrian Chadd * Update the TIM - if there's anything queued to the 2470548a605dSAdrian Chadd * software queue and power save is enabled, we should 2471548a605dSAdrian Chadd * set the TIM. 2472548a605dSAdrian Chadd */ 2473548a605dSAdrian Chadd ath_tx_update_tim(sc, ni, 1); 2474548a605dSAdrian Chadd 2475974185bbSAdrian Chadd ATH_TX_UNLOCK(sc); 2476974185bbSAdrian Chadd 2477ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2478ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2479ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2480ef27340cSAdrian Chadd 2481f5c30c4eSAdrian Chadd 2482f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */ 2483f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2484f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc); 2485f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2486f5c30c4eSAdrian Chadd 2487b8e788a5SAdrian Chadd return 0; 2488f5c30c4eSAdrian Chadd 2489b8e788a5SAdrian Chadd bad2: 249003682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, " 249103682514SAdrian Chadd "bf=%p", 249203682514SAdrian Chadd m, 249303682514SAdrian Chadd params, 249403682514SAdrian Chadd bf); 2495b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc); 2496e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf); 2497b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 24981b5c5f5aSAdrian Chadd 2499f5c30c4eSAdrian Chadd bad: 25001b5c5f5aSAdrian Chadd ATH_TX_UNLOCK(sc); 25011b5c5f5aSAdrian Chadd 2502ef27340cSAdrian Chadd ATH_PCU_LOCK(sc); 2503ef27340cSAdrian Chadd sc->sc_txstart_cnt--; 2504ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc); 2505f5c30c4eSAdrian Chadd 2506f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */ 2507f5c30c4eSAdrian Chadd ATH_LOCK(sc); 2508f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc); 2509f5c30c4eSAdrian Chadd ATH_UNLOCK(sc); 2510f5c30c4eSAdrian Chadd 2511f5c30c4eSAdrian Chadd badbad: 251203682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p", 251303682514SAdrian Chadd m, params); 2514b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw_fail++; 2515ef27340cSAdrian Chadd 2516b8e788a5SAdrian Chadd return error; 2517b8e788a5SAdrian Chadd } 2518eb6f0de0SAdrian Chadd 2519eb6f0de0SAdrian Chadd /* Some helper functions */ 2520eb6f0de0SAdrian Chadd 2521eb6f0de0SAdrian Chadd /* 2522eb6f0de0SAdrian Chadd * ADDBA (and potentially others) need to be placed in the same 2523eb6f0de0SAdrian Chadd * hardware queue as the TID/node it's relating to. This is so 2524eb6f0de0SAdrian Chadd * it goes out after any pending non-aggregate frames to the 2525eb6f0de0SAdrian Chadd * same node/TID. 2526eb6f0de0SAdrian Chadd * 2527eb6f0de0SAdrian Chadd * If this isn't done, the ADDBA can go out before the frames 2528eb6f0de0SAdrian Chadd * queued in hardware. Even though these frames have a sequence 2529eb6f0de0SAdrian Chadd * number -earlier- than the ADDBA can be transmitted (but 2530eb6f0de0SAdrian Chadd * no frames whose sequence numbers are after the ADDBA should 2531eb6f0de0SAdrian Chadd * be!) they'll arrive after the ADDBA - and the receiving end 2532eb6f0de0SAdrian Chadd * will simply drop them as being out of the BAW. 2533eb6f0de0SAdrian Chadd * 2534eb6f0de0SAdrian Chadd * The frames can't be appended to the TID software queue - it'll 2535eb6f0de0SAdrian Chadd * never be sent out. So these frames have to be directly 2536eb6f0de0SAdrian Chadd * dispatched to the hardware, rather than queued in software. 2537eb6f0de0SAdrian Chadd * So if this function returns true, the TXQ has to be 2538eb6f0de0SAdrian Chadd * overridden and it has to be directly dispatched. 2539eb6f0de0SAdrian Chadd * 2540eb6f0de0SAdrian Chadd * It's a dirty hack, but someone's gotta do it. 2541eb6f0de0SAdrian Chadd */ 2542eb6f0de0SAdrian Chadd 2543eb6f0de0SAdrian Chadd /* 2544eb6f0de0SAdrian Chadd * XXX doesn't belong here! 2545eb6f0de0SAdrian Chadd */ 2546eb6f0de0SAdrian Chadd static int 2547eb6f0de0SAdrian Chadd ieee80211_is_action(struct ieee80211_frame *wh) 2548eb6f0de0SAdrian Chadd { 2549eb6f0de0SAdrian Chadd /* Type: Management frame? */ 2550eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != 2551eb6f0de0SAdrian Chadd IEEE80211_FC0_TYPE_MGT) 2552eb6f0de0SAdrian Chadd return 0; 2553eb6f0de0SAdrian Chadd 2554eb6f0de0SAdrian Chadd /* Subtype: Action frame? */ 2555eb6f0de0SAdrian Chadd if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) != 2556eb6f0de0SAdrian Chadd IEEE80211_FC0_SUBTYPE_ACTION) 2557eb6f0de0SAdrian Chadd return 0; 2558eb6f0de0SAdrian Chadd 2559eb6f0de0SAdrian Chadd return 1; 2560eb6f0de0SAdrian Chadd } 2561eb6f0de0SAdrian Chadd 2562eb6f0de0SAdrian Chadd #define MS(_v, _f) (((_v) & _f) >> _f##_S) 2563eb6f0de0SAdrian Chadd /* 2564eb6f0de0SAdrian Chadd * Return an alternate TID for ADDBA request frames. 2565eb6f0de0SAdrian Chadd * 2566eb6f0de0SAdrian Chadd * Yes, this likely should be done in the net80211 layer. 2567eb6f0de0SAdrian Chadd */ 2568eb6f0de0SAdrian Chadd static int 2569eb6f0de0SAdrian Chadd ath_tx_action_frame_override_queue(struct ath_softc *sc, 2570eb6f0de0SAdrian Chadd struct ieee80211_node *ni, 2571eb6f0de0SAdrian Chadd struct mbuf *m0, int *tid) 2572eb6f0de0SAdrian Chadd { 2573eb6f0de0SAdrian Chadd struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 2574eb6f0de0SAdrian Chadd struct ieee80211_action_ba_addbarequest *ia; 2575eb6f0de0SAdrian Chadd uint8_t *frm; 2576eb6f0de0SAdrian Chadd uint16_t baparamset; 2577eb6f0de0SAdrian Chadd 2578eb6f0de0SAdrian Chadd /* Not action frame? Bail */ 2579eb6f0de0SAdrian Chadd if (! ieee80211_is_action(wh)) 2580eb6f0de0SAdrian Chadd return 0; 2581eb6f0de0SAdrian Chadd 2582eb6f0de0SAdrian Chadd /* XXX Not needed for frames we send? */ 2583eb6f0de0SAdrian Chadd #if 0 2584eb6f0de0SAdrian Chadd /* Correct length? */ 2585eb6f0de0SAdrian Chadd if (! ieee80211_parse_action(ni, m)) 2586eb6f0de0SAdrian Chadd return 0; 2587eb6f0de0SAdrian Chadd #endif 2588eb6f0de0SAdrian Chadd 2589eb6f0de0SAdrian Chadd /* Extract out action frame */ 2590eb6f0de0SAdrian Chadd frm = (u_int8_t *)&wh[1]; 2591eb6f0de0SAdrian Chadd ia = (struct ieee80211_action_ba_addbarequest *) frm; 2592eb6f0de0SAdrian Chadd 2593eb6f0de0SAdrian Chadd /* Not ADDBA? Bail */ 2594eb6f0de0SAdrian Chadd if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA) 2595eb6f0de0SAdrian Chadd return 0; 2596eb6f0de0SAdrian Chadd if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST) 2597eb6f0de0SAdrian Chadd return 0; 2598eb6f0de0SAdrian Chadd 2599eb6f0de0SAdrian Chadd /* Extract TID, return it */ 2600eb6f0de0SAdrian Chadd baparamset = le16toh(ia->rq_baparamset); 2601eb6f0de0SAdrian Chadd *tid = (int) MS(baparamset, IEEE80211_BAPS_TID); 2602eb6f0de0SAdrian Chadd 2603eb6f0de0SAdrian Chadd return 1; 2604eb6f0de0SAdrian Chadd } 2605eb6f0de0SAdrian Chadd #undef MS 2606eb6f0de0SAdrian Chadd 2607eb6f0de0SAdrian Chadd /* Per-node software queue operations */ 2608eb6f0de0SAdrian Chadd 2609eb6f0de0SAdrian Chadd /* 2610eb6f0de0SAdrian Chadd * Add the current packet to the given BAW. 2611eb6f0de0SAdrian Chadd * It is assumed that the current packet 2612eb6f0de0SAdrian Chadd * 2613eb6f0de0SAdrian Chadd * + fits inside the BAW; 2614eb6f0de0SAdrian Chadd * + already has had a sequence number allocated. 2615eb6f0de0SAdrian Chadd * 2616eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2617eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2618eb6f0de0SAdrian Chadd */ 2619eb6f0de0SAdrian Chadd void 2620eb6f0de0SAdrian Chadd ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an, 2621eb6f0de0SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 2622eb6f0de0SAdrian Chadd { 2623eb6f0de0SAdrian Chadd int index, cindex; 2624eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2625eb6f0de0SAdrian Chadd 2626375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2627eb6f0de0SAdrian Chadd 2628eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_isretried) 2629eb6f0de0SAdrian Chadd return; 2630eb6f0de0SAdrian Chadd 2631c7c07341SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2632c7c07341SAdrian Chadd 26337561cb5cSAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 263483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 26357561cb5cSAdrian Chadd "%s: dobaw=0, seqno=%d, window %d:%d\n", 263683bbd5ebSRui Paulo __func__, SEQNO(bf->bf_state.bfs_seqno), 263783bbd5ebSRui Paulo tap->txa_start, tap->txa_wnd); 26387561cb5cSAdrian Chadd } 26397561cb5cSAdrian Chadd 2640eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_addedbaw) 264183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2642a108d2d6SAdrian Chadd "%s: re-added? tid=%d, seqno %d; window %d:%d; " 2643d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2644a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2645d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 2646d4365d16SAdrian Chadd tid->baw_tail); 2647eb6f0de0SAdrian Chadd 2648eb6f0de0SAdrian Chadd /* 26497561cb5cSAdrian Chadd * Verify that the given sequence number is not outside of the 26507561cb5cSAdrian Chadd * BAW. Complain loudly if that's the case. 26517561cb5cSAdrian Chadd */ 26527561cb5cSAdrian Chadd if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 26537561cb5cSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno))) { 265483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 26557561cb5cSAdrian Chadd "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; " 26567561cb5cSAdrian Chadd "baw head=%d tail=%d\n", 26577561cb5cSAdrian Chadd __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 26587561cb5cSAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head, 26597561cb5cSAdrian Chadd tid->baw_tail); 26607561cb5cSAdrian Chadd } 26617561cb5cSAdrian Chadd 26627561cb5cSAdrian Chadd /* 2663eb6f0de0SAdrian Chadd * ni->ni_txseqs[] is the currently allocated seqno. 2664eb6f0de0SAdrian Chadd * the txa state contains the current baw start. 2665eb6f0de0SAdrian Chadd */ 2666eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno)); 2667eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2668eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2669a108d2d6SAdrian Chadd "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d " 2670d4365d16SAdrian Chadd "baw head=%d tail=%d\n", 2671a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2672d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head, 2673d4365d16SAdrian Chadd tid->baw_tail); 2674eb6f0de0SAdrian Chadd 2675eb6f0de0SAdrian Chadd 2676eb6f0de0SAdrian Chadd #if 0 2677eb6f0de0SAdrian Chadd assert(tid->tx_buf[cindex] == NULL); 2678eb6f0de0SAdrian Chadd #endif 2679eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != NULL) { 268083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2681eb6f0de0SAdrian Chadd "%s: ba packet dup (index=%d, cindex=%d, " 2682eb6f0de0SAdrian Chadd "head=%d, tail=%d)\n", 2683eb6f0de0SAdrian Chadd __func__, index, cindex, tid->baw_head, tid->baw_tail); 268483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2685eb6f0de0SAdrian Chadd "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n", 2686eb6f0de0SAdrian Chadd __func__, 2687eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 2688eb6f0de0SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno), 2689eb6f0de0SAdrian Chadd bf, 2690eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno) 2691eb6f0de0SAdrian Chadd ); 2692eb6f0de0SAdrian Chadd } 2693eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = bf; 2694eb6f0de0SAdrian Chadd 2695d4365d16SAdrian Chadd if (index >= ((tid->baw_tail - tid->baw_head) & 2696d4365d16SAdrian Chadd (ATH_TID_MAX_BUFS - 1))) { 2697eb6f0de0SAdrian Chadd tid->baw_tail = cindex; 2698eb6f0de0SAdrian Chadd INCR(tid->baw_tail, ATH_TID_MAX_BUFS); 2699eb6f0de0SAdrian Chadd } 2700eb6f0de0SAdrian Chadd } 2701eb6f0de0SAdrian Chadd 2702eb6f0de0SAdrian Chadd /* 270338962489SAdrian Chadd * Flip the BAW buffer entry over from the existing one to the new one. 270438962489SAdrian Chadd * 270538962489SAdrian Chadd * When software retransmitting a (sub-)frame, it is entirely possible that 270638962489SAdrian Chadd * the frame ath_buf is marked as BUSY and can't be immediately reused. 270738962489SAdrian Chadd * In that instance the buffer is cloned and the new buffer is used for 270838962489SAdrian Chadd * retransmit. We thus need to update the ath_buf slot in the BAW buf 270938962489SAdrian Chadd * tracking array to maintain consistency. 271038962489SAdrian Chadd */ 271138962489SAdrian Chadd static void 271238962489SAdrian Chadd ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an, 271338962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf) 271438962489SAdrian Chadd { 271538962489SAdrian Chadd int index, cindex; 271638962489SAdrian Chadd struct ieee80211_tx_ampdu *tap; 271738962489SAdrian Chadd int seqno = SEQNO(old_bf->bf_state.bfs_seqno); 271838962489SAdrian Chadd 2719375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 272038962489SAdrian Chadd 272138962489SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 272238962489SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 272338962489SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 272438962489SAdrian Chadd 272538962489SAdrian Chadd /* 272638962489SAdrian Chadd * Just warn for now; if it happens then we should find out 272738962489SAdrian Chadd * about it. It's highly likely the aggregation session will 272838962489SAdrian Chadd * soon hang. 272938962489SAdrian Chadd */ 273038962489SAdrian Chadd if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) { 273183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 273283bbd5ebSRui Paulo "%s: retransmitted buffer" 273338962489SAdrian Chadd " has mismatching seqno's, BA session may hang.\n", 273438962489SAdrian Chadd __func__); 273583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 273683bbd5ebSRui Paulo "%s: old seqno=%d, new_seqno=%d\n", __func__, 273783bbd5ebSRui Paulo old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno); 273838962489SAdrian Chadd } 273938962489SAdrian Chadd 274038962489SAdrian Chadd if (tid->tx_buf[cindex] != old_bf) { 274183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 274283bbd5ebSRui Paulo "%s: ath_buf pointer incorrect; " 274383bbd5ebSRui Paulo " has m BA session may hang.\n", __func__); 274483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 274583bbd5ebSRui Paulo "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf); 274638962489SAdrian Chadd } 274738962489SAdrian Chadd 274838962489SAdrian Chadd tid->tx_buf[cindex] = new_bf; 274938962489SAdrian Chadd } 275038962489SAdrian Chadd 275138962489SAdrian Chadd /* 2752eb6f0de0SAdrian Chadd * seq_start - left edge of BAW 2753eb6f0de0SAdrian Chadd * seq_next - current/next sequence number to allocate 2754eb6f0de0SAdrian Chadd * 2755eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and 2756eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked. 2757eb6f0de0SAdrian Chadd */ 2758eb6f0de0SAdrian Chadd static void 2759eb6f0de0SAdrian Chadd ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an, 2760eb6f0de0SAdrian Chadd struct ath_tid *tid, const struct ath_buf *bf) 2761eb6f0de0SAdrian Chadd { 2762eb6f0de0SAdrian Chadd int index, cindex; 2763eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 2764eb6f0de0SAdrian Chadd int seqno = SEQNO(bf->bf_state.bfs_seqno); 2765eb6f0de0SAdrian Chadd 2766375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2767eb6f0de0SAdrian Chadd 2768eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 2769eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno); 2770eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2771eb6f0de0SAdrian Chadd 2772eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2773a108d2d6SAdrian Chadd "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, " 2774d4365d16SAdrian Chadd "baw head=%d, tail=%d\n", 2775a108d2d6SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index, 2776eb6f0de0SAdrian Chadd cindex, tid->baw_head, tid->baw_tail); 2777eb6f0de0SAdrian Chadd 2778eb6f0de0SAdrian Chadd /* 2779eb6f0de0SAdrian Chadd * If this occurs then we have a big problem - something else 2780eb6f0de0SAdrian Chadd * has slid tap->txa_start along without updating the BAW 2781eb6f0de0SAdrian Chadd * tracking start/end pointers. Thus the TX BAW state is now 2782eb6f0de0SAdrian Chadd * completely busted. 2783eb6f0de0SAdrian Chadd * 2784eb6f0de0SAdrian Chadd * But for now, since I haven't yet fixed TDMA and buffer cloning, 2785eb6f0de0SAdrian Chadd * it's quite possible that a cloned buffer is making its way 2786eb6f0de0SAdrian Chadd * here and causing it to fire off. Disable TDMA for now. 2787eb6f0de0SAdrian Chadd */ 2788eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != bf) { 278983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2790eb6f0de0SAdrian Chadd "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n", 279183bbd5ebSRui Paulo __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 2792eb6f0de0SAdrian Chadd tid->tx_buf[cindex], 27933527f6a9SAdrian Chadd (tid->tx_buf[cindex] != NULL) ? 27943527f6a9SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1); 2795eb6f0de0SAdrian Chadd } 2796eb6f0de0SAdrian Chadd 2797eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = NULL; 2798eb6f0de0SAdrian Chadd 2799d4365d16SAdrian Chadd while (tid->baw_head != tid->baw_tail && 2800d4365d16SAdrian Chadd !tid->tx_buf[tid->baw_head]) { 2801eb6f0de0SAdrian Chadd INCR(tap->txa_start, IEEE80211_SEQ_RANGE); 2802eb6f0de0SAdrian Chadd INCR(tid->baw_head, ATH_TID_MAX_BUFS); 2803eb6f0de0SAdrian Chadd } 2804d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 280542fdd8e7SAdrian Chadd "%s: tid=%d: baw is now %d:%d, baw head=%d\n", 280642fdd8e7SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head); 2807eb6f0de0SAdrian Chadd } 2808eb6f0de0SAdrian Chadd 280922a3aee6SAdrian Chadd static void 281022a3aee6SAdrian Chadd ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid, 281122a3aee6SAdrian Chadd struct ath_buf *bf) 281222a3aee6SAdrian Chadd { 281322a3aee6SAdrian Chadd struct ieee80211_frame *wh; 281422a3aee6SAdrian Chadd 281522a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 281622a3aee6SAdrian Chadd 281722a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 281822a3aee6SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *); 281922a3aee6SAdrian Chadd 282022a3aee6SAdrian Chadd /* 282122a3aee6SAdrian Chadd * Update MORE based on the software/net80211 queue states. 282222a3aee6SAdrian Chadd */ 282322a3aee6SAdrian Chadd if ((tid->an->an_stack_psq > 0) 282422a3aee6SAdrian Chadd || (tid->an->an_swq_depth > 0)) 282522a3aee6SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 282622a3aee6SAdrian Chadd else 282722a3aee6SAdrian Chadd wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA; 282822a3aee6SAdrian Chadd 282922a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE, 283022a3aee6SAdrian Chadd "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n", 283122a3aee6SAdrian Chadd __func__, 283222a3aee6SAdrian Chadd tid->an->an_node.ni_macaddr, 283322a3aee6SAdrian Chadd ":", 283422a3aee6SAdrian Chadd tid->an->an_leak_count, 283522a3aee6SAdrian Chadd tid->an->an_stack_psq, 283622a3aee6SAdrian Chadd tid->an->an_swq_depth, 283722a3aee6SAdrian Chadd !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA)); 283822a3aee6SAdrian Chadd 283922a3aee6SAdrian Chadd /* 284022a3aee6SAdrian Chadd * Re-sync the underlying buffer. 284122a3aee6SAdrian Chadd */ 284222a3aee6SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 284322a3aee6SAdrian Chadd BUS_DMASYNC_PREWRITE); 284422a3aee6SAdrian Chadd 284522a3aee6SAdrian Chadd tid->an->an_leak_count --; 284622a3aee6SAdrian Chadd } 284722a3aee6SAdrian Chadd } 284822a3aee6SAdrian Chadd 284922a3aee6SAdrian Chadd static int 285022a3aee6SAdrian Chadd ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid) 285122a3aee6SAdrian Chadd { 285222a3aee6SAdrian Chadd 285322a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 285422a3aee6SAdrian Chadd 285522a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) { 285622a3aee6SAdrian Chadd return (1); 285722a3aee6SAdrian Chadd } 285822a3aee6SAdrian Chadd if (tid->paused) 285922a3aee6SAdrian Chadd return (0); 286022a3aee6SAdrian Chadd return (1); 286122a3aee6SAdrian Chadd } 286222a3aee6SAdrian Chadd 2863eb6f0de0SAdrian Chadd /* 2864eb6f0de0SAdrian Chadd * Mark the current node/TID as ready to TX. 2865eb6f0de0SAdrian Chadd * 2866eb6f0de0SAdrian Chadd * This is done to make it easy for the software scheduler to 2867eb6f0de0SAdrian Chadd * find which nodes have data to send. 2868eb6f0de0SAdrian Chadd * 2869eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2870eb6f0de0SAdrian Chadd */ 287122a3aee6SAdrian Chadd void 2872eb6f0de0SAdrian Chadd ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid) 2873eb6f0de0SAdrian Chadd { 2874eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2875eb6f0de0SAdrian Chadd 2876375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2877eb6f0de0SAdrian Chadd 287822a3aee6SAdrian Chadd /* 287922a3aee6SAdrian Chadd * If we are leaking out a frame to this destination 288022a3aee6SAdrian Chadd * for PS-POLL, ensure that we allow scheduling to 288122a3aee6SAdrian Chadd * occur. 288222a3aee6SAdrian Chadd */ 288322a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 2884eb6f0de0SAdrian Chadd return; /* paused, can't schedule yet */ 2885eb6f0de0SAdrian Chadd 2886eb6f0de0SAdrian Chadd if (tid->sched) 2887eb6f0de0SAdrian Chadd return; /* already scheduled */ 2888eb6f0de0SAdrian Chadd 2889eb6f0de0SAdrian Chadd tid->sched = 1; 2890eb6f0de0SAdrian Chadd 289122a3aee6SAdrian Chadd #if 0 289222a3aee6SAdrian Chadd /* 289322a3aee6SAdrian Chadd * If this is a sleeping node we're leaking to, given 289422a3aee6SAdrian Chadd * it a higher priority. This is so bad for QoS it hurts. 289522a3aee6SAdrian Chadd */ 289622a3aee6SAdrian Chadd if (tid->an->an_leak_count) { 289722a3aee6SAdrian Chadd TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem); 289822a3aee6SAdrian Chadd } else { 289922a3aee6SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 290022a3aee6SAdrian Chadd } 290122a3aee6SAdrian Chadd #endif 290222a3aee6SAdrian Chadd 290322a3aee6SAdrian Chadd /* 290422a3aee6SAdrian Chadd * We can't do the above - it'll confuse the TXQ software 290522a3aee6SAdrian Chadd * scheduler which will keep checking the _head_ TID 290622a3aee6SAdrian Chadd * in the list to see if it has traffic. If we queue 290722a3aee6SAdrian Chadd * a TID to the head of the list and it doesn't transmit, 290822a3aee6SAdrian Chadd * we'll check it again. 290922a3aee6SAdrian Chadd * 291022a3aee6SAdrian Chadd * So, get the rest of this leaking frames support working 291122a3aee6SAdrian Chadd * and reliable first and _then_ optimise it so they're 291222a3aee6SAdrian Chadd * pushed out in front of any other pending software 291322a3aee6SAdrian Chadd * queued nodes. 291422a3aee6SAdrian Chadd */ 2915eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2916eb6f0de0SAdrian Chadd } 2917eb6f0de0SAdrian Chadd 2918eb6f0de0SAdrian Chadd /* 2919eb6f0de0SAdrian Chadd * Mark the current node as no longer needing to be polled for 2920eb6f0de0SAdrian Chadd * TX packets. 2921eb6f0de0SAdrian Chadd * 2922eb6f0de0SAdrian Chadd * The TXQ lock must be held. 2923eb6f0de0SAdrian Chadd */ 2924eb6f0de0SAdrian Chadd static void 2925eb6f0de0SAdrian Chadd ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid) 2926eb6f0de0SAdrian Chadd { 2927eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2928eb6f0de0SAdrian Chadd 2929375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 2930eb6f0de0SAdrian Chadd 2931eb6f0de0SAdrian Chadd if (tid->sched == 0) 2932eb6f0de0SAdrian Chadd return; 2933eb6f0de0SAdrian Chadd 2934eb6f0de0SAdrian Chadd tid->sched = 0; 2935eb6f0de0SAdrian Chadd TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem); 2936eb6f0de0SAdrian Chadd } 2937eb6f0de0SAdrian Chadd 2938eb6f0de0SAdrian Chadd /* 2939eb6f0de0SAdrian Chadd * Assign a sequence number manually to the given frame. 2940eb6f0de0SAdrian Chadd * 2941eb6f0de0SAdrian Chadd * This should only be called for A-MPDU TX frames. 2942eb6f0de0SAdrian Chadd */ 2943a108d2d6SAdrian Chadd static ieee80211_seq 2944eb6f0de0SAdrian Chadd ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni, 2945eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0) 2946eb6f0de0SAdrian Chadd { 2947eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 2948eb6f0de0SAdrian Chadd int tid, pri; 2949eb6f0de0SAdrian Chadd ieee80211_seq seqno; 2950eb6f0de0SAdrian Chadd uint8_t subtype; 2951eb6f0de0SAdrian Chadd 2952eb6f0de0SAdrian Chadd /* TID lookup */ 2953eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 2954eb6f0de0SAdrian Chadd pri = M_WME_GETAC(m0); /* honor classification */ 2955eb6f0de0SAdrian Chadd tid = WME_AC_TO_TID(pri); 2956a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n", 2957a108d2d6SAdrian Chadd __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2958eb6f0de0SAdrian Chadd 2959eb6f0de0SAdrian Chadd /* XXX Is it a control frame? Ignore */ 2960eb6f0de0SAdrian Chadd 2961eb6f0de0SAdrian Chadd /* Does the packet require a sequence number? */ 2962eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh)) 2963eb6f0de0SAdrian Chadd return -1; 2964eb6f0de0SAdrian Chadd 2965375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 29667561cb5cSAdrian Chadd 2967eb6f0de0SAdrian Chadd /* 2968eb6f0de0SAdrian Chadd * Is it a QOS NULL Data frame? Give it a sequence number from 2969eb6f0de0SAdrian Chadd * the default TID (IEEE80211_NONQOS_TID.) 2970eb6f0de0SAdrian Chadd * 2971eb6f0de0SAdrian Chadd * The RX path of everything I've looked at doesn't include the NULL 2972eb6f0de0SAdrian Chadd * data frame sequence number in the aggregation state updates, so 2973eb6f0de0SAdrian Chadd * assigning it a sequence number there will cause a BAW hole on the 2974eb6f0de0SAdrian Chadd * RX side. 2975eb6f0de0SAdrian Chadd */ 2976eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2977eb6f0de0SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) { 29787561cb5cSAdrian Chadd /* XXX no locking for this TID? This is a bit of a problem. */ 2979eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 2980eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 2981eb6f0de0SAdrian Chadd } else { 2982eb6f0de0SAdrian Chadd /* Manually assign sequence number */ 2983eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[tid]; 2984eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE); 2985eb6f0de0SAdrian Chadd } 2986eb6f0de0SAdrian Chadd *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); 2987eb6f0de0SAdrian Chadd M_SEQNO_SET(m0, seqno); 2988eb6f0de0SAdrian Chadd 2989eb6f0de0SAdrian Chadd /* Return so caller can do something with it if needed */ 2990a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: -> seqno=%d\n", __func__, seqno); 2991eb6f0de0SAdrian Chadd return seqno; 2992eb6f0de0SAdrian Chadd } 2993eb6f0de0SAdrian Chadd 2994eb6f0de0SAdrian Chadd /* 2995eb6f0de0SAdrian Chadd * Attempt to direct dispatch an aggregate frame to hardware. 2996eb6f0de0SAdrian Chadd * If the frame is out of BAW, queue. 2997eb6f0de0SAdrian Chadd * Otherwise, schedule it as a single frame. 2998eb6f0de0SAdrian Chadd */ 2999eb6f0de0SAdrian Chadd static void 300046634305SAdrian Chadd ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 300146634305SAdrian Chadd struct ath_txq *txq, struct ath_buf *bf) 3002eb6f0de0SAdrian Chadd { 3003eb6f0de0SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 3004eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 3005eb6f0de0SAdrian Chadd 3006375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3007eb6f0de0SAdrian Chadd 3008eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3009eb6f0de0SAdrian Chadd 3010eb6f0de0SAdrian Chadd /* paused? queue */ 301122a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 30123e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 30130f04c5a2SAdrian Chadd /* XXX don't sched - we're paused! */ 3014eb6f0de0SAdrian Chadd return; 3015eb6f0de0SAdrian Chadd } 3016eb6f0de0SAdrian Chadd 3017eb6f0de0SAdrian Chadd /* outside baw? queue */ 3018eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw && 3019eb6f0de0SAdrian Chadd (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 3020eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)))) { 30213e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3022eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 3023eb6f0de0SAdrian Chadd return; 3024eb6f0de0SAdrian Chadd } 3025eb6f0de0SAdrian Chadd 30262a9f83afSAdrian Chadd /* 30272a9f83afSAdrian Chadd * This is a temporary check and should be removed once 30282a9f83afSAdrian Chadd * all the relevant code paths have been fixed. 30292a9f83afSAdrian Chadd * 30302a9f83afSAdrian Chadd * During aggregate retries, it's possible that the head 30312a9f83afSAdrian Chadd * frame will fail (which has the bfs_aggr and bfs_nframes 30322a9f83afSAdrian Chadd * fields set for said aggregate) and will be retried as 30332a9f83afSAdrian Chadd * a single frame. In this instance, the values should 30342a9f83afSAdrian Chadd * be reset or the completion code will get upset with you. 30352a9f83afSAdrian Chadd */ 30362a9f83afSAdrian Chadd if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) { 3037b372f122SRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 303883bbd5ebSRui Paulo "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__, 303983bbd5ebSRui Paulo bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes); 30402a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 30412a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 30422a9f83afSAdrian Chadd } 30432a9f83afSAdrian Chadd 30444e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 30454e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 30464e81f27cSAdrian Chadd 3047eb6f0de0SAdrian Chadd /* Direct dispatch to hardware */ 3048eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 3049e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 3050e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 3051eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 3052e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 3053eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 3054eb6f0de0SAdrian Chadd 3055eb6f0de0SAdrian Chadd /* Statistics */ 3056eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_low_hwq_single_pkt++; 3057eb6f0de0SAdrian Chadd 3058eb6f0de0SAdrian Chadd /* Track per-TID hardware queue depth correctly */ 3059eb6f0de0SAdrian Chadd tid->hwq_depth++; 3060eb6f0de0SAdrian Chadd 3061eb6f0de0SAdrian Chadd /* Add to BAW */ 3062eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 3063eb6f0de0SAdrian Chadd ath_tx_addto_baw(sc, an, tid, bf); 3064eb6f0de0SAdrian Chadd bf->bf_state.bfs_addedbaw = 1; 3065eb6f0de0SAdrian Chadd } 3066eb6f0de0SAdrian Chadd 3067eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 3068eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 3069eb6f0de0SAdrian Chadd 307022a3aee6SAdrian Chadd /* 307122a3aee6SAdrian Chadd * Update the current leak count if 307222a3aee6SAdrian Chadd * we're leaking frames; and set the 307322a3aee6SAdrian Chadd * MORE flag as appropriate. 307422a3aee6SAdrian Chadd */ 307522a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 307622a3aee6SAdrian Chadd 3077eb6f0de0SAdrian Chadd /* Hand off to hardware */ 3078eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 3079eb6f0de0SAdrian Chadd } 3080eb6f0de0SAdrian Chadd 3081eb6f0de0SAdrian Chadd /* 3082eb6f0de0SAdrian Chadd * Attempt to send the packet. 3083eb6f0de0SAdrian Chadd * If the queue isn't busy, direct-dispatch. 3084eb6f0de0SAdrian Chadd * If the queue is busy enough, queue the given packet on the 3085eb6f0de0SAdrian Chadd * relevant software queue. 3086eb6f0de0SAdrian Chadd */ 3087eb6f0de0SAdrian Chadd void 308822a3aee6SAdrian Chadd ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, 308922a3aee6SAdrian Chadd struct ath_txq *txq, int queue_to_head, struct ath_buf *bf) 3090eb6f0de0SAdrian Chadd { 3091eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 3092eb6f0de0SAdrian Chadd struct ieee80211_frame *wh; 3093eb6f0de0SAdrian Chadd struct ath_tid *atid; 3094eb6f0de0SAdrian Chadd int pri, tid; 3095eb6f0de0SAdrian Chadd struct mbuf *m0 = bf->bf_m; 3096eb6f0de0SAdrian Chadd 3097375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 30987561cb5cSAdrian Chadd 3099eb6f0de0SAdrian Chadd /* Fetch the TID - non-QoS frames get assigned to TID 16 */ 3100eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *); 3101eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0); 3102eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0); 3103eb6f0de0SAdrian Chadd atid = &an->an_tid[tid]; 3104eb6f0de0SAdrian Chadd 3105a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 3106a108d2d6SAdrian Chadd __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 3107eb6f0de0SAdrian Chadd 3108eb6f0de0SAdrian Chadd /* Set local packet state, used to queue packets to hardware */ 310946634305SAdrian Chadd /* XXX potentially duplicate info, re-check */ 3110eb6f0de0SAdrian Chadd bf->bf_state.bfs_tid = tid; 3111fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum; 3112eb6f0de0SAdrian Chadd bf->bf_state.bfs_pri = pri; 3113eb6f0de0SAdrian Chadd 3114eb6f0de0SAdrian Chadd /* 3115eb6f0de0SAdrian Chadd * If the hardware queue isn't busy, queue it directly. 3116eb6f0de0SAdrian Chadd * If the hardware queue is busy, queue it. 3117eb6f0de0SAdrian Chadd * If the TID is paused or the traffic it outside BAW, software 3118eb6f0de0SAdrian Chadd * queue it. 311922a3aee6SAdrian Chadd * 312022a3aee6SAdrian Chadd * If the node is in power-save and we're leaking a frame, 312122a3aee6SAdrian Chadd * leak a single frame. 3122eb6f0de0SAdrian Chadd */ 312322a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, atid)) { 3124eb6f0de0SAdrian Chadd /* TID is paused, queue */ 3125a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__); 312622a3aee6SAdrian Chadd /* 312722a3aee6SAdrian Chadd * If the caller requested that it be sent at a high 312822a3aee6SAdrian Chadd * priority, queue it at the head of the list. 312922a3aee6SAdrian Chadd */ 313022a3aee6SAdrian Chadd if (queue_to_head) 313122a3aee6SAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 313222a3aee6SAdrian Chadd else 31333e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3134eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_pending(sc, an, tid)) { 3135eb6f0de0SAdrian Chadd /* AMPDU pending; queue */ 3136a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__); 31373e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3138eb6f0de0SAdrian Chadd /* XXX sched? */ 3139eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_running(sc, an, tid)) { 3140eb6f0de0SAdrian Chadd /* AMPDU running, attempt direct dispatch if possible */ 314139f24578SAdrian Chadd 314239f24578SAdrian Chadd /* 314339f24578SAdrian Chadd * Always queue the frame to the tail of the list. 314439f24578SAdrian Chadd */ 31453e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 314639f24578SAdrian Chadd 314739f24578SAdrian Chadd /* 314839f24578SAdrian Chadd * If the hardware queue isn't busy, direct dispatch 314939f24578SAdrian Chadd * the head frame in the list. Don't schedule the 315039f24578SAdrian Chadd * TID - let it build some more frames first? 315139f24578SAdrian Chadd * 315272910f03SAdrian Chadd * When running A-MPDU, always just check the hardware 315372910f03SAdrian Chadd * queue depth against the aggregate frame limit. 315472910f03SAdrian Chadd * We don't want to burst a large number of single frames 315572910f03SAdrian Chadd * out to the hardware; we want to aggressively hold back. 315672910f03SAdrian Chadd * 315739f24578SAdrian Chadd * Otherwise, schedule the TID. 315839f24578SAdrian Chadd */ 315972910f03SAdrian Chadd /* XXX TXQ locking */ 316072910f03SAdrian Chadd if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_aggr) { 31613e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 31623e6cc97fSAdrian Chadd ATH_TID_REMOVE(atid, bf, bf_list); 31632a9f83afSAdrian Chadd 31642a9f83afSAdrian Chadd /* 31652a9f83afSAdrian Chadd * Ensure it's definitely treated as a non-AMPDU 31662a9f83afSAdrian Chadd * frame - this information may have been left 31672a9f83afSAdrian Chadd * over from a previous attempt. 31682a9f83afSAdrian Chadd */ 31692a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0; 31702a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 31712a9f83afSAdrian Chadd 31722a9f83afSAdrian Chadd /* Queue to the hardware */ 317346634305SAdrian Chadd ath_tx_xmit_aggr(sc, an, txq, bf); 3174a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3175a108d2d6SAdrian Chadd "%s: xmit_aggr\n", 3176a108d2d6SAdrian Chadd __func__); 3177d4365d16SAdrian Chadd } else { 3178d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 3179a108d2d6SAdrian Chadd "%s: ampdu; swq'ing\n", 3180a108d2d6SAdrian Chadd __func__); 318103682514SAdrian Chadd 3182eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3183eb6f0de0SAdrian Chadd } 318472910f03SAdrian Chadd /* 318572910f03SAdrian Chadd * If we're not doing A-MPDU, be prepared to direct dispatch 318672910f03SAdrian Chadd * up to both limits if possible. This particular corner 318772910f03SAdrian Chadd * case may end up with packet starvation between aggregate 3188f6b6084bSPedro F. Giffuni * traffic and non-aggregate traffic: we want to ensure 318972910f03SAdrian Chadd * that non-aggregate stations get a few frames queued to the 319072910f03SAdrian Chadd * hardware before the aggregate station(s) get their chance. 319172910f03SAdrian Chadd * 319272910f03SAdrian Chadd * So if you only ever see a couple of frames direct dispatched 319372910f03SAdrian Chadd * to the hardware from a non-AMPDU client, check both here 319472910f03SAdrian Chadd * and in the software queue dispatcher to ensure that those 319572910f03SAdrian Chadd * non-AMPDU stations get a fair chance to transmit. 319672910f03SAdrian Chadd */ 319772910f03SAdrian Chadd /* XXX TXQ locking */ 319872910f03SAdrian Chadd } else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) && 319972910f03SAdrian Chadd (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) { 3200eb6f0de0SAdrian Chadd /* AMPDU not running, attempt direct dispatch */ 3201a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__); 32020a544719SAdrian Chadd /* See if clrdmask needs to be set */ 32030a544719SAdrian Chadd ath_tx_update_clrdmask(sc, atid, bf); 320422a3aee6SAdrian Chadd 320522a3aee6SAdrian Chadd /* 320622a3aee6SAdrian Chadd * Update the current leak count if 320722a3aee6SAdrian Chadd * we're leaking frames; and set the 320822a3aee6SAdrian Chadd * MORE flag as appropriate. 320922a3aee6SAdrian Chadd */ 321022a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, atid, bf); 321122a3aee6SAdrian Chadd 321222a3aee6SAdrian Chadd /* 321322a3aee6SAdrian Chadd * Dispatch the frame. 321422a3aee6SAdrian Chadd */ 3215eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf); 3216eb6f0de0SAdrian Chadd } else { 3217eb6f0de0SAdrian Chadd /* Busy; queue */ 3218a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__); 32193e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3220eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 3221eb6f0de0SAdrian Chadd } 3222eb6f0de0SAdrian Chadd } 3223eb6f0de0SAdrian Chadd 3224eb6f0de0SAdrian Chadd /* 32254f25ddbbSAdrian Chadd * Only set the clrdmask bit if none of the nodes are currently 32264f25ddbbSAdrian Chadd * filtered. 32274f25ddbbSAdrian Chadd * 32284f25ddbbSAdrian Chadd * XXX TODO: go through all the callers and check to see 32294f25ddbbSAdrian Chadd * which are being called in the context of looping over all 32304f25ddbbSAdrian Chadd * TIDs (eg, if all tids are being paused, resumed, etc.) 32314f25ddbbSAdrian Chadd * That'll avoid O(n^2) complexity here. 32324f25ddbbSAdrian Chadd */ 32334f25ddbbSAdrian Chadd static void 32344f25ddbbSAdrian Chadd ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an) 32354f25ddbbSAdrian Chadd { 32364f25ddbbSAdrian Chadd int i; 32374f25ddbbSAdrian Chadd 32384f25ddbbSAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 32394f25ddbbSAdrian Chadd 32404f25ddbbSAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 32414f25ddbbSAdrian Chadd if (an->an_tid[i].isfiltered == 1) 3242f74d878fSAdrian Chadd return; 32434f25ddbbSAdrian Chadd } 32444f25ddbbSAdrian Chadd an->clrdmask = 1; 32454f25ddbbSAdrian Chadd } 32464f25ddbbSAdrian Chadd 32474f25ddbbSAdrian Chadd /* 3248eb6f0de0SAdrian Chadd * Configure the per-TID node state. 3249eb6f0de0SAdrian Chadd * 3250eb6f0de0SAdrian Chadd * This likely belongs in if_ath_node.c but I can't think of anywhere 3251eb6f0de0SAdrian Chadd * else to put it just yet. 3252eb6f0de0SAdrian Chadd * 3253eb6f0de0SAdrian Chadd * This sets up the SLISTs and the mutex as appropriate. 3254eb6f0de0SAdrian Chadd */ 3255eb6f0de0SAdrian Chadd void 3256eb6f0de0SAdrian Chadd ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an) 3257eb6f0de0SAdrian Chadd { 3258eb6f0de0SAdrian Chadd int i, j; 3259eb6f0de0SAdrian Chadd struct ath_tid *atid; 3260eb6f0de0SAdrian Chadd 3261eb6f0de0SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3262eb6f0de0SAdrian Chadd atid = &an->an_tid[i]; 3263f1bc738eSAdrian Chadd 3264f1bc738eSAdrian Chadd /* XXX now with this bzer(), is the field 0'ing needed? */ 3265f1bc738eSAdrian Chadd bzero(atid, sizeof(*atid)); 3266f1bc738eSAdrian Chadd 32673e6cc97fSAdrian Chadd TAILQ_INIT(&atid->tid_q); 32683e6cc97fSAdrian Chadd TAILQ_INIT(&atid->filtq.tid_q); 3269eb6f0de0SAdrian Chadd atid->tid = i; 3270eb6f0de0SAdrian Chadd atid->an = an; 3271eb6f0de0SAdrian Chadd for (j = 0; j < ATH_TID_MAX_BUFS; j++) 3272eb6f0de0SAdrian Chadd atid->tx_buf[j] = NULL; 3273eb6f0de0SAdrian Chadd atid->baw_head = atid->baw_tail = 0; 3274eb6f0de0SAdrian Chadd atid->paused = 0; 3275eb6f0de0SAdrian Chadd atid->sched = 0; 3276eb6f0de0SAdrian Chadd atid->hwq_depth = 0; 3277eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 3278eb6f0de0SAdrian Chadd if (i == IEEE80211_NONQOS_TID) 32797403d1b9SAdrian Chadd atid->ac = ATH_NONQOS_TID_AC; 3280eb6f0de0SAdrian Chadd else 3281eb6f0de0SAdrian Chadd atid->ac = TID_TO_WME_AC(i); 3282eb6f0de0SAdrian Chadd } 32834f25ddbbSAdrian Chadd an->clrdmask = 1; /* Always start by setting this bit */ 3284eb6f0de0SAdrian Chadd } 3285eb6f0de0SAdrian Chadd 3286eb6f0de0SAdrian Chadd /* 3287eb6f0de0SAdrian Chadd * Pause the current TID. This stops packets from being transmitted 3288eb6f0de0SAdrian Chadd * on it. 3289eb6f0de0SAdrian Chadd * 3290eb6f0de0SAdrian Chadd * Since this is also called from upper layers as well as the driver, 3291eb6f0de0SAdrian Chadd * it will get the TID lock. 3292eb6f0de0SAdrian Chadd */ 3293eb6f0de0SAdrian Chadd static void 3294eb6f0de0SAdrian Chadd ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid) 3295eb6f0de0SAdrian Chadd { 329688b3d483SAdrian Chadd 3297375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3298eb6f0de0SAdrian Chadd tid->paused++; 32991771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n", 33001771c649SAdrian Chadd __func__, 33011771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 33021771c649SAdrian Chadd tid->tid, 33031771c649SAdrian Chadd tid->paused); 3304eb6f0de0SAdrian Chadd } 3305eb6f0de0SAdrian Chadd 3306eb6f0de0SAdrian Chadd /* 3307eb6f0de0SAdrian Chadd * Unpause the current TID, and schedule it if needed. 3308eb6f0de0SAdrian Chadd */ 3309eb6f0de0SAdrian Chadd static void 3310eb6f0de0SAdrian Chadd ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid) 3311eb6f0de0SAdrian Chadd { 3312375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3313eb6f0de0SAdrian Chadd 3314dff5bdf4SAdrian Chadd /* 3315dff5bdf4SAdrian Chadd * There's some odd places where ath_tx_tid_resume() is called 3316dff5bdf4SAdrian Chadd * when it shouldn't be; this works around that particular issue 3317dff5bdf4SAdrian Chadd * until it's actually resolved. 3318dff5bdf4SAdrian Chadd */ 3319dff5bdf4SAdrian Chadd if (tid->paused == 0) { 33201771c649SAdrian Chadd device_printf(sc->sc_dev, 33211771c649SAdrian Chadd "%s: [%6D]: tid=%d, paused=0?\n", 33221771c649SAdrian Chadd __func__, 33231771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 33241771c649SAdrian Chadd tid->tid); 3325dff5bdf4SAdrian Chadd } else { 3326eb6f0de0SAdrian Chadd tid->paused--; 3327dff5bdf4SAdrian Chadd } 3328eb6f0de0SAdrian Chadd 33291771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 33301771c649SAdrian Chadd "%s: [%6D]: tid=%d, unpaused = %d\n", 33311771c649SAdrian Chadd __func__, 33321771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":", 33331771c649SAdrian Chadd tid->tid, 33341771c649SAdrian Chadd tid->paused); 3335eb6f0de0SAdrian Chadd 33360eb81626SAdrian Chadd if (tid->paused) 3337eb6f0de0SAdrian Chadd return; 33380eb81626SAdrian Chadd 33390eb81626SAdrian Chadd /* 33400eb81626SAdrian Chadd * Override the clrdmask configuration for the next frame 33410eb81626SAdrian Chadd * from this TID, just to get the ball rolling. 33420eb81626SAdrian Chadd */ 33434f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 33440eb81626SAdrian Chadd 33450eb81626SAdrian Chadd if (tid->axq_depth == 0) 33460eb81626SAdrian Chadd return; 3347eb6f0de0SAdrian Chadd 3348f1bc738eSAdrian Chadd /* XXX isfiltered shouldn't ever be 0 at this point */ 3349f1bc738eSAdrian Chadd if (tid->isfiltered == 1) { 335083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n", 335183bbd5ebSRui Paulo __func__); 3352f1bc738eSAdrian Chadd return; 3353f1bc738eSAdrian Chadd } 3354f1bc738eSAdrian Chadd 3355eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 335621bca442SAdrian Chadd 335721bca442SAdrian Chadd /* 335821bca442SAdrian Chadd * Queue the software TX scheduler. 335921bca442SAdrian Chadd */ 336021bca442SAdrian Chadd ath_tx_swq_kick(sc); 3361eb6f0de0SAdrian Chadd } 3362eb6f0de0SAdrian Chadd 3363eb6f0de0SAdrian Chadd /* 3364f1bc738eSAdrian Chadd * Add the given ath_buf to the TID filtered frame list. 3365f1bc738eSAdrian Chadd * This requires the TID be filtered. 3366f1bc738eSAdrian Chadd */ 3367f1bc738eSAdrian Chadd static void 3368f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid, 3369f1bc738eSAdrian Chadd struct ath_buf *bf) 3370f1bc738eSAdrian Chadd { 3371f1bc738eSAdrian Chadd 3372375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3373375307d4SAdrian Chadd 3374f1bc738eSAdrian Chadd if (!tid->isfiltered) 337583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n", 337683bbd5ebSRui Paulo __func__); 3377f1bc738eSAdrian Chadd 3378f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf); 3379f1bc738eSAdrian Chadd 3380f1bc738eSAdrian Chadd /* Set the retry bit and bump the retry counter */ 3381f1bc738eSAdrian Chadd ath_tx_set_retry(sc, bf); 3382f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swfiltered++; 3383f1bc738eSAdrian Chadd 338413aa9ee5SAdrian Chadd ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list); 3385f1bc738eSAdrian Chadd } 3386f1bc738eSAdrian Chadd 3387f1bc738eSAdrian Chadd /* 3388f1bc738eSAdrian Chadd * Handle a completed filtered frame from the given TID. 3389f1bc738eSAdrian Chadd * This just enables/pauses the filtered frame state if required 3390f1bc738eSAdrian Chadd * and appends the filtered frame to the filtered queue. 3391f1bc738eSAdrian Chadd */ 3392f1bc738eSAdrian Chadd static void 3393f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid, 3394f1bc738eSAdrian Chadd struct ath_buf *bf) 3395f1bc738eSAdrian Chadd { 3396f1bc738eSAdrian Chadd 3397375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3398f1bc738eSAdrian Chadd 3399f1bc738eSAdrian Chadd if (! tid->isfiltered) { 340042fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n", 340142fdd8e7SAdrian Chadd __func__, tid->tid); 3402f1bc738eSAdrian Chadd tid->isfiltered = 1; 3403f1bc738eSAdrian Chadd ath_tx_tid_pause(sc, tid); 3404f1bc738eSAdrian Chadd } 3405f1bc738eSAdrian Chadd 3406f1bc738eSAdrian Chadd /* Add the frame to the filter queue */ 3407f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(sc, tid, bf); 3408f1bc738eSAdrian Chadd } 3409f1bc738eSAdrian Chadd 3410f1bc738eSAdrian Chadd /* 3411f1bc738eSAdrian Chadd * Complete the filtered frame TX completion. 3412f1bc738eSAdrian Chadd * 3413f1bc738eSAdrian Chadd * If there are no more frames in the hardware queue, unpause/unfilter 3414f1bc738eSAdrian Chadd * the TID if applicable. Otherwise we will wait for a node PS transition 3415f1bc738eSAdrian Chadd * to unfilter. 3416f1bc738eSAdrian Chadd */ 3417f1bc738eSAdrian Chadd static void 3418f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid) 3419f1bc738eSAdrian Chadd { 3420f1bc738eSAdrian Chadd struct ath_buf *bf; 3421a3fd3b14SAdrian Chadd int do_resume = 0; 3422f1bc738eSAdrian Chadd 3423375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3424f1bc738eSAdrian Chadd 3425f1bc738eSAdrian Chadd if (tid->hwq_depth != 0) 3426f1bc738eSAdrian Chadd return; 3427f1bc738eSAdrian Chadd 342842fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n", 342942fdd8e7SAdrian Chadd __func__, tid->tid); 3430a3fd3b14SAdrian Chadd if (tid->isfiltered == 1) { 3431f1bc738eSAdrian Chadd tid->isfiltered = 0; 3432a3fd3b14SAdrian Chadd do_resume = 1; 3433a3fd3b14SAdrian Chadd } 3434a3fd3b14SAdrian Chadd 34354f25ddbbSAdrian Chadd /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */ 34364f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 3437f1bc738eSAdrian Chadd 3438f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 343913aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) { 344013aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 34413e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3442f1bc738eSAdrian Chadd } 3443f1bc738eSAdrian Chadd 3444c5d230abSAdrian Chadd /* And only resume if we had paused before */ 3445a3fd3b14SAdrian Chadd if (do_resume) 3446f1bc738eSAdrian Chadd ath_tx_tid_resume(sc, tid); 3447f1bc738eSAdrian Chadd } 3448f1bc738eSAdrian Chadd 3449f1bc738eSAdrian Chadd /* 3450f1bc738eSAdrian Chadd * Called when a single (aggregate or otherwise) frame is completed. 3451f1bc738eSAdrian Chadd * 34521f737306SAdrian Chadd * Returns 0 if the buffer could be added to the filtered list 34531f737306SAdrian Chadd * (cloned or otherwise), 1 if the buffer couldn't be added to the 3454f1bc738eSAdrian Chadd * filtered list (failed clone; expired retry) and the caller should 3455f1bc738eSAdrian Chadd * free it and handle it like a failure (eg by sending a BAR.) 34561f737306SAdrian Chadd * 34571f737306SAdrian Chadd * since the buffer may be cloned, bf must be not touched after this 34581f737306SAdrian Chadd * if the return value is 0. 3459f1bc738eSAdrian Chadd */ 3460f1bc738eSAdrian Chadd static int 3461f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid, 3462f1bc738eSAdrian Chadd struct ath_buf *bf) 3463f1bc738eSAdrian Chadd { 3464f1bc738eSAdrian Chadd struct ath_buf *nbf; 3465f1bc738eSAdrian Chadd int retval; 3466f1bc738eSAdrian Chadd 3467375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3468f1bc738eSAdrian Chadd 3469f1bc738eSAdrian Chadd /* 3470f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3471f1bc738eSAdrian Chadd */ 3472f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 34730eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3474f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3475f1bc738eSAdrian Chadd "%s: bf=%p, seqno=%d, exceeded retries\n", 3476f1bc738eSAdrian Chadd __func__, 3477f1bc738eSAdrian Chadd bf, 347842fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 34791f737306SAdrian Chadd retval = 1; /* error */ 34801f737306SAdrian Chadd goto finish; 3481f1bc738eSAdrian Chadd } 3482f1bc738eSAdrian Chadd 3483f1bc738eSAdrian Chadd /* 3484f1bc738eSAdrian Chadd * A busy buffer can't be added to the retry list. 3485f1bc738eSAdrian Chadd * It needs to be cloned. 3486f1bc738eSAdrian Chadd */ 3487f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3488f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3489f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3490f1bc738eSAdrian Chadd "%s: busy buffer clone: %p -> %p\n", 3491f1bc738eSAdrian Chadd __func__, bf, nbf); 3492f1bc738eSAdrian Chadd } else { 3493f1bc738eSAdrian Chadd nbf = bf; 3494f1bc738eSAdrian Chadd } 3495f1bc738eSAdrian Chadd 3496f1bc738eSAdrian Chadd if (nbf == NULL) { 3497f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3498f1bc738eSAdrian Chadd "%s: busy buffer couldn't be cloned (%p)!\n", 3499f1bc738eSAdrian Chadd __func__, bf); 35001f737306SAdrian Chadd retval = 1; /* error */ 3501f1bc738eSAdrian Chadd } else { 3502f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 35031f737306SAdrian Chadd retval = 0; /* ok */ 3504f1bc738eSAdrian Chadd } 35051f737306SAdrian Chadd finish: 3506f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3507f1bc738eSAdrian Chadd 3508f1bc738eSAdrian Chadd return (retval); 3509f1bc738eSAdrian Chadd } 3510f1bc738eSAdrian Chadd 3511f1bc738eSAdrian Chadd static void 3512f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid, 3513f1bc738eSAdrian Chadd struct ath_buf *bf_first, ath_bufhead *bf_q) 3514f1bc738eSAdrian Chadd { 3515f1bc738eSAdrian Chadd struct ath_buf *bf, *bf_next, *nbf; 3516f1bc738eSAdrian Chadd 3517375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3518f1bc738eSAdrian Chadd 3519f1bc738eSAdrian Chadd bf = bf_first; 3520f1bc738eSAdrian Chadd while (bf) { 3521f1bc738eSAdrian Chadd bf_next = bf->bf_next; 3522f1bc738eSAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 3523f1bc738eSAdrian Chadd 3524f1bc738eSAdrian Chadd /* 3525f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever. 3526f1bc738eSAdrian Chadd */ 3527f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 35280eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 3529f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 353042fdd8e7SAdrian Chadd "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n", 3531f1bc738eSAdrian Chadd __func__, 353242fdd8e7SAdrian Chadd tid->tid, 3533f1bc738eSAdrian Chadd bf, 353442fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 3535f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3536f1bc738eSAdrian Chadd goto next; 3537f1bc738eSAdrian Chadd } 3538f1bc738eSAdrian Chadd 3539f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) { 3540f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3541f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 354242fdd8e7SAdrian Chadd "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n", 354342fdd8e7SAdrian Chadd __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno)); 3544f1bc738eSAdrian Chadd } else { 3545f1bc738eSAdrian Chadd nbf = bf; 3546f1bc738eSAdrian Chadd } 3547f1bc738eSAdrian Chadd 3548f1bc738eSAdrian Chadd /* 3549f1bc738eSAdrian Chadd * If the buffer couldn't be cloned, add it to bf_q; 3550f1bc738eSAdrian Chadd * the caller will free the buffer(s) as required. 3551f1bc738eSAdrian Chadd */ 3552f1bc738eSAdrian Chadd if (nbf == NULL) { 3553f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 355442fdd8e7SAdrian Chadd "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n", 355542fdd8e7SAdrian Chadd __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno)); 3556f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3557f1bc738eSAdrian Chadd } else { 3558f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3559f1bc738eSAdrian Chadd } 3560f1bc738eSAdrian Chadd next: 3561f1bc738eSAdrian Chadd bf = bf_next; 3562f1bc738eSAdrian Chadd } 3563f1bc738eSAdrian Chadd 3564f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid); 3565f1bc738eSAdrian Chadd } 3566f1bc738eSAdrian Chadd 3567f1bc738eSAdrian Chadd /* 356888b3d483SAdrian Chadd * Suspend the queue because we need to TX a BAR. 356988b3d483SAdrian Chadd */ 357088b3d483SAdrian Chadd static void 357188b3d483SAdrian Chadd ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid) 357288b3d483SAdrian Chadd { 3573375307d4SAdrian Chadd 3574375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 357588b3d483SAdrian Chadd 35760e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 35776d07d3e0SAdrian Chadd "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n", 357888b3d483SAdrian Chadd __func__, 35796d07d3e0SAdrian Chadd tid->tid, 3580e60c4fc2SAdrian Chadd tid->bar_wait, 3581e60c4fc2SAdrian Chadd tid->bar_tx); 358288b3d483SAdrian Chadd 358388b3d483SAdrian Chadd /* We shouldn't be called when bar_tx is 1 */ 358488b3d483SAdrian Chadd if (tid->bar_tx) { 358583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 358683bbd5ebSRui Paulo "%s: bar_tx is 1?!\n", __func__); 358788b3d483SAdrian Chadd } 358888b3d483SAdrian Chadd 358988b3d483SAdrian Chadd /* If we've already been called, just be patient. */ 359088b3d483SAdrian Chadd if (tid->bar_wait) 359188b3d483SAdrian Chadd return; 359288b3d483SAdrian Chadd 359388b3d483SAdrian Chadd /* Wait! */ 359488b3d483SAdrian Chadd tid->bar_wait = 1; 359588b3d483SAdrian Chadd 359688b3d483SAdrian Chadd /* Only one pause, no matter how many frames fail */ 359788b3d483SAdrian Chadd ath_tx_tid_pause(sc, tid); 359888b3d483SAdrian Chadd } 359988b3d483SAdrian Chadd 360088b3d483SAdrian Chadd /* 360188b3d483SAdrian Chadd * We've finished with BAR handling - either we succeeded or 360288b3d483SAdrian Chadd * failed. Either way, unsuspend TX. 360388b3d483SAdrian Chadd */ 360488b3d483SAdrian Chadd static void 360588b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid) 360688b3d483SAdrian Chadd { 3607375307d4SAdrian Chadd 3608375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 360988b3d483SAdrian Chadd 36100e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36116d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 361288b3d483SAdrian Chadd __func__, 36139b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36149b48fb4bSAdrian Chadd ":", 36156d07d3e0SAdrian Chadd tid->tid); 361688b3d483SAdrian Chadd 361788b3d483SAdrian Chadd if (tid->bar_tx == 0 || tid->bar_wait == 0) { 361883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36196d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 362083bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 362183bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait); 362288b3d483SAdrian Chadd } 362388b3d483SAdrian Chadd 362488b3d483SAdrian Chadd tid->bar_tx = tid->bar_wait = 0; 362588b3d483SAdrian Chadd ath_tx_tid_resume(sc, tid); 362688b3d483SAdrian Chadd } 362788b3d483SAdrian Chadd 362888b3d483SAdrian Chadd /* 362988b3d483SAdrian Chadd * Return whether we're ready to TX a BAR frame. 363088b3d483SAdrian Chadd * 363188b3d483SAdrian Chadd * Requires the TID lock be held. 363288b3d483SAdrian Chadd */ 363388b3d483SAdrian Chadd static int 363488b3d483SAdrian Chadd ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid) 363588b3d483SAdrian Chadd { 363688b3d483SAdrian Chadd 3637375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 363888b3d483SAdrian Chadd 363988b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->hwq_depth > 0) 364088b3d483SAdrian Chadd return (0); 364188b3d483SAdrian Chadd 36429b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36436d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar ready\n", 36449b48fb4bSAdrian Chadd __func__, 36459b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36469b48fb4bSAdrian Chadd ":", 36476d07d3e0SAdrian Chadd tid->tid); 36480e22ed0eSAdrian Chadd 364988b3d483SAdrian Chadd return (1); 365088b3d483SAdrian Chadd } 365188b3d483SAdrian Chadd 365288b3d483SAdrian Chadd /* 365388b3d483SAdrian Chadd * Check whether the current TID is ready to have a BAR 365488b3d483SAdrian Chadd * TXed and if so, do the TX. 365588b3d483SAdrian Chadd * 365688b3d483SAdrian Chadd * Since the TID/TXQ lock can't be held during a call to 365788b3d483SAdrian Chadd * ieee80211_send_bar(), we have to do the dirty thing of unlocking it, 365888b3d483SAdrian Chadd * sending the BAR and locking it again. 365988b3d483SAdrian Chadd * 366088b3d483SAdrian Chadd * Eventually, the code to send the BAR should be broken out 366188b3d483SAdrian Chadd * from this routine so the lock doesn't have to be reacquired 366288b3d483SAdrian Chadd * just to be immediately dropped by the caller. 366388b3d483SAdrian Chadd */ 366488b3d483SAdrian Chadd static void 366588b3d483SAdrian Chadd ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid) 366688b3d483SAdrian Chadd { 366788b3d483SAdrian Chadd struct ieee80211_tx_ampdu *tap; 366888b3d483SAdrian Chadd 3669375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 367088b3d483SAdrian Chadd 36710e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36726d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n", 367388b3d483SAdrian Chadd __func__, 36749b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36759b48fb4bSAdrian Chadd ":", 36766d07d3e0SAdrian Chadd tid->tid); 367788b3d483SAdrian Chadd 367888b3d483SAdrian Chadd tap = ath_tx_get_tx_tid(tid->an, tid->tid); 367988b3d483SAdrian Chadd 368088b3d483SAdrian Chadd /* 368188b3d483SAdrian Chadd * This is an error condition! 368288b3d483SAdrian Chadd */ 368388b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->bar_tx == 1) { 368483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36856d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 368683bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 368783bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait); 368888b3d483SAdrian Chadd return; 368988b3d483SAdrian Chadd } 369088b3d483SAdrian Chadd 369188b3d483SAdrian Chadd /* Don't do anything if we still have pending frames */ 369288b3d483SAdrian Chadd if (tid->hwq_depth > 0) { 36930e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 36946d07d3e0SAdrian Chadd "%s: %6D: TID=%d, hwq_depth=%d, waiting\n", 369588b3d483SAdrian Chadd __func__, 36969b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 36979b48fb4bSAdrian Chadd ":", 36986d07d3e0SAdrian Chadd tid->tid, 369988b3d483SAdrian Chadd tid->hwq_depth); 370088b3d483SAdrian Chadd return; 370188b3d483SAdrian Chadd } 370288b3d483SAdrian Chadd 370388b3d483SAdrian Chadd /* We're now about to TX */ 370488b3d483SAdrian Chadd tid->bar_tx = 1; 370588b3d483SAdrian Chadd 370688b3d483SAdrian Chadd /* 37074e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame, 37084e81f27cSAdrian Chadd * just to get the ball rolling. 37094e81f27cSAdrian Chadd */ 37104f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 37114e81f27cSAdrian Chadd 37124e81f27cSAdrian Chadd /* 371388b3d483SAdrian Chadd * Calculate new BAW left edge, now that all frames have either 371488b3d483SAdrian Chadd * succeeded or failed. 371588b3d483SAdrian Chadd * 371688b3d483SAdrian Chadd * XXX verify this is _actually_ the valid value to begin at! 371788b3d483SAdrian Chadd */ 37180e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 37196d07d3e0SAdrian Chadd "%s: %6D: TID=%d, new BAW left edge=%d\n", 372088b3d483SAdrian Chadd __func__, 37219b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr, 37229b48fb4bSAdrian Chadd ":", 37236d07d3e0SAdrian Chadd tid->tid, 372488b3d483SAdrian Chadd tap->txa_start); 372588b3d483SAdrian Chadd 372688b3d483SAdrian Chadd /* Try sending the BAR frame */ 372788b3d483SAdrian Chadd /* We can't hold the lock here! */ 372888b3d483SAdrian Chadd 3729375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 373088b3d483SAdrian Chadd if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) { 373188b3d483SAdrian Chadd /* Success? Now we wait for notification that it's done */ 3732375307d4SAdrian Chadd ATH_TX_LOCK(sc); 373388b3d483SAdrian Chadd return; 373488b3d483SAdrian Chadd } 373588b3d483SAdrian Chadd 373688b3d483SAdrian Chadd /* Failure? For now, warn loudly and continue */ 3737375307d4SAdrian Chadd ATH_TX_LOCK(sc); 373883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 37396d07d3e0SAdrian Chadd "%s: %6D: TID=%d, failed to TX BAR, continue!\n", 374083bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":", 37416d07d3e0SAdrian Chadd tid->tid); 374288b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, tid); 374388b3d483SAdrian Chadd } 374488b3d483SAdrian Chadd 3745eb6f0de0SAdrian Chadd static void 3746f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an, 3747f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf) 3748eb6f0de0SAdrian Chadd { 3749eb6f0de0SAdrian Chadd 3750375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3751eb6f0de0SAdrian Chadd 3752eb6f0de0SAdrian Chadd /* 3753eb6f0de0SAdrian Chadd * If the current TID is running AMPDU, update 3754eb6f0de0SAdrian Chadd * the BAW. 3755eb6f0de0SAdrian Chadd */ 3756eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid) && 3757eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw) { 3758eb6f0de0SAdrian Chadd /* 3759eb6f0de0SAdrian Chadd * Only remove the frame from the BAW if it's 3760eb6f0de0SAdrian Chadd * been transmitted at least once; this means 3761eb6f0de0SAdrian Chadd * the frame was in the BAW to begin with. 3762eb6f0de0SAdrian Chadd */ 3763eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries > 0) { 3764eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, tid, bf); 3765eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 3766eb6f0de0SAdrian Chadd } 3767ce597531SAdrian Chadd #if 0 3768eb6f0de0SAdrian Chadd /* 3769eb6f0de0SAdrian Chadd * This has become a non-fatal error now 3770eb6f0de0SAdrian Chadd */ 3771eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 377283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW 3773eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 3774eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 3775ce597531SAdrian Chadd #endif 3776eb6f0de0SAdrian Chadd } 3777b837332dSAdrian Chadd 3778b837332dSAdrian Chadd /* Strip it out of an aggregate list if it was in one */ 3779b837332dSAdrian Chadd bf->bf_next = NULL; 3780b837332dSAdrian Chadd 3781b837332dSAdrian Chadd /* Insert on the free queue to be freed by the caller */ 3782eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 3783eb6f0de0SAdrian Chadd } 3784eb6f0de0SAdrian Chadd 3785f1bc738eSAdrian Chadd static void 3786f1bc738eSAdrian Chadd ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an, 378703682514SAdrian Chadd const char *pfx, struct ath_tid *tid, struct ath_buf *bf) 3788f1bc738eSAdrian Chadd { 3789f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 379083bbd5ebSRui Paulo struct ath_txq *txq; 3791f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3792f1bc738eSAdrian Chadd 379383bbd5ebSRui Paulo txq = sc->sc_ac2q[tid->ac]; 3794f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3795f1bc738eSAdrian Chadd 37966fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3797272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, " 3798f1bc738eSAdrian Chadd "seqno=%d, retry=%d\n", 3799272a8ab6SAdrian Chadd __func__, 3800272a8ab6SAdrian Chadd pfx, 3801272a8ab6SAdrian Chadd ni->ni_macaddr, 3802272a8ab6SAdrian Chadd ":", 3803272a8ab6SAdrian Chadd bf, 3804f1bc738eSAdrian Chadd bf->bf_state.bfs_addedbaw, 3805f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw, 3806f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno), 3807f1bc738eSAdrian Chadd bf->bf_state.bfs_retries); 38086fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3809272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n", 3810272a8ab6SAdrian Chadd __func__, 3811272a8ab6SAdrian Chadd pfx, 3812272a8ab6SAdrian Chadd ni->ni_macaddr, 3813272a8ab6SAdrian Chadd ":", 3814272a8ab6SAdrian Chadd bf, 381503682514SAdrian Chadd txq->axq_qnum, 38164e81f27cSAdrian Chadd txq->axq_depth, 38174e81f27cSAdrian Chadd txq->axq_aggr_depth); 38186fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3819272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, " 3820272a8ab6SAdrian Chadd "isfiltered=%d\n", 3821272a8ab6SAdrian Chadd __func__, 3822272a8ab6SAdrian Chadd pfx, 3823272a8ab6SAdrian Chadd ni->ni_macaddr, 3824272a8ab6SAdrian Chadd ":", 3825272a8ab6SAdrian Chadd bf, 3826f1bc738eSAdrian Chadd tid->axq_depth, 3827f1bc738eSAdrian Chadd tid->hwq_depth, 3828f1bc738eSAdrian Chadd tid->bar_wait, 3829f1bc738eSAdrian Chadd tid->isfiltered); 38306fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3831272a8ab6SAdrian Chadd "%s: %s: %6D: tid %d: " 38324e81f27cSAdrian Chadd "sched=%d, paused=%d, " 38334e81f27cSAdrian Chadd "incomp=%d, baw_head=%d, " 3834f1bc738eSAdrian Chadd "baw_tail=%d txa_start=%d, ni_txseqs=%d\n", 3835272a8ab6SAdrian Chadd __func__, 3836272a8ab6SAdrian Chadd pfx, 3837272a8ab6SAdrian Chadd ni->ni_macaddr, 3838272a8ab6SAdrian Chadd ":", 3839272a8ab6SAdrian Chadd tid->tid, 38404e81f27cSAdrian Chadd tid->sched, tid->paused, 38414e81f27cSAdrian Chadd tid->incomp, tid->baw_head, 3842f1bc738eSAdrian Chadd tid->baw_tail, tap == NULL ? -1 : tap->txa_start, 3843f1bc738eSAdrian Chadd ni->ni_txseqs[tid->tid]); 3844f1bc738eSAdrian Chadd 3845f1bc738eSAdrian Chadd /* XXX Dump the frame, see what it is? */ 3846a2be2710SRui Paulo if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 3847f1bc738eSAdrian Chadd ieee80211_dump_pkt(ni->ni_ic, 3848f1bc738eSAdrian Chadd mtod(bf->bf_m, const uint8_t *), 3849f1bc738eSAdrian Chadd bf->bf_m->m_len, 0, -1); 3850f1bc738eSAdrian Chadd } 3851f1bc738eSAdrian Chadd 3852f1bc738eSAdrian Chadd /* 3853f1bc738eSAdrian Chadd * Free any packets currently pending in the software TX queue. 3854f1bc738eSAdrian Chadd * 3855f1bc738eSAdrian Chadd * This will be called when a node is being deleted. 3856f1bc738eSAdrian Chadd * 3857f1bc738eSAdrian Chadd * It can also be called on an active node during an interface 3858f1bc738eSAdrian Chadd * reset or state transition. 3859f1bc738eSAdrian Chadd * 3860f1bc738eSAdrian Chadd * (From Linux/reference): 3861f1bc738eSAdrian Chadd * 3862f1bc738eSAdrian Chadd * TODO: For frame(s) that are in the retry state, we will reuse the 3863f1bc738eSAdrian Chadd * sequence number(s) without setting the retry bit. The 3864f1bc738eSAdrian Chadd * alternative is to give up on these and BAR the receiver's window 3865f1bc738eSAdrian Chadd * forward. 3866f1bc738eSAdrian Chadd */ 3867f1bc738eSAdrian Chadd static void 3868f1bc738eSAdrian Chadd ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an, 3869f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq) 3870f1bc738eSAdrian Chadd { 3871f1bc738eSAdrian Chadd struct ath_buf *bf; 3872f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap; 3873f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node; 3874f1bc738eSAdrian Chadd int t; 3875f1bc738eSAdrian Chadd 3876f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 3877f1bc738eSAdrian Chadd 3878375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 3879f1bc738eSAdrian Chadd 3880f1bc738eSAdrian Chadd /* Walk the queue, free frames */ 3881f1bc738eSAdrian Chadd t = 0; 3882f1bc738eSAdrian Chadd for (;;) { 38833e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 3884f1bc738eSAdrian Chadd if (bf == NULL) { 3885f1bc738eSAdrian Chadd break; 3886f1bc738eSAdrian Chadd } 3887f1bc738eSAdrian Chadd 3888f1bc738eSAdrian Chadd if (t == 0) { 388903682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "norm", tid, bf); 38906fc621c2SAdrian Chadd // t = 1; 3891f1bc738eSAdrian Chadd } 3892f1bc738eSAdrian Chadd 38933e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 3894f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3895f1bc738eSAdrian Chadd } 3896f1bc738eSAdrian Chadd 3897f1bc738eSAdrian Chadd /* And now, drain the filtered frame queue */ 3898f1bc738eSAdrian Chadd t = 0; 3899f1bc738eSAdrian Chadd for (;;) { 390013aa9ee5SAdrian Chadd bf = ATH_TID_FILT_FIRST(tid); 3901f1bc738eSAdrian Chadd if (bf == NULL) 3902f1bc738eSAdrian Chadd break; 3903f1bc738eSAdrian Chadd 3904f1bc738eSAdrian Chadd if (t == 0) { 390503682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "filt", tid, bf); 39066fc621c2SAdrian Chadd // t = 1; 3907f1bc738eSAdrian Chadd } 3908f1bc738eSAdrian Chadd 390913aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3910f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3911f1bc738eSAdrian Chadd } 3912f1bc738eSAdrian Chadd 3913eb6f0de0SAdrian Chadd /* 39144e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame 39154e81f27cSAdrian Chadd * in case there is some future transmission, just to get 39164e81f27cSAdrian Chadd * the ball rolling. 39174e81f27cSAdrian Chadd * 39184e81f27cSAdrian Chadd * This won't hurt things if the TID is about to be freed. 39194e81f27cSAdrian Chadd */ 39204f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an); 39214e81f27cSAdrian Chadd 39224e81f27cSAdrian Chadd /* 3923eb6f0de0SAdrian Chadd * Now that it's completed, grab the TID lock and update 3924eb6f0de0SAdrian Chadd * the sequence number and BAW window. 3925eb6f0de0SAdrian Chadd * Because sequence numbers have been assigned to frames 3926eb6f0de0SAdrian Chadd * that haven't been sent yet, it's entirely possible 3927eb6f0de0SAdrian Chadd * we'll be called with some pending frames that have not 3928eb6f0de0SAdrian Chadd * been transmitted. 3929eb6f0de0SAdrian Chadd * 3930eb6f0de0SAdrian Chadd * The cleaner solution is to do the sequence number allocation 3931eb6f0de0SAdrian Chadd * when the packet is first transmitted - and thus the "retries" 3932eb6f0de0SAdrian Chadd * check above would be enough to update the BAW/seqno. 3933eb6f0de0SAdrian Chadd */ 3934eb6f0de0SAdrian Chadd 3935eb6f0de0SAdrian Chadd /* But don't do it for non-QoS TIDs */ 3936eb6f0de0SAdrian Chadd if (tap) { 39379b48fb4bSAdrian Chadd #if 1 3938eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 39399b48fb4bSAdrian Chadd "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n", 39409b48fb4bSAdrian Chadd __func__, 39419b48fb4bSAdrian Chadd ni->ni_macaddr, 39429b48fb4bSAdrian Chadd ":", 39439b48fb4bSAdrian Chadd an, 39449b48fb4bSAdrian Chadd tid->tid, 39459b48fb4bSAdrian Chadd tap->txa_start); 3946eb6f0de0SAdrian Chadd #endif 3947eb6f0de0SAdrian Chadd ni->ni_txseqs[tid->tid] = tap->txa_start; 3948eb6f0de0SAdrian Chadd tid->baw_tail = tid->baw_head; 3949eb6f0de0SAdrian Chadd } 3950eb6f0de0SAdrian Chadd } 3951eb6f0de0SAdrian Chadd 3952eb6f0de0SAdrian Chadd /* 395322780332SAdrian Chadd * Reset the TID state. This must be only called once the node has 395422780332SAdrian Chadd * had its frames flushed from this TID, to ensure that no other 395522780332SAdrian Chadd * pause / unpause logic can kick in. 395622780332SAdrian Chadd */ 395722780332SAdrian Chadd static void 395822780332SAdrian Chadd ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid) 395922780332SAdrian Chadd { 396022780332SAdrian Chadd 396122780332SAdrian Chadd #if 0 396222780332SAdrian Chadd tid->bar_wait = tid->bar_tx = tid->isfiltered = 0; 396322780332SAdrian Chadd tid->paused = tid->sched = tid->addba_tx_pending = 0; 396422780332SAdrian Chadd tid->incomp = tid->cleanup_inprogress = 0; 396522780332SAdrian Chadd #endif 396622780332SAdrian Chadd 396722780332SAdrian Chadd /* 396822780332SAdrian Chadd * If we have a bar_wait set, we need to unpause the TID 396922780332SAdrian Chadd * here. Otherwise once cleanup has finished, the TID won't 397022780332SAdrian Chadd * have the right paused counter. 397122780332SAdrian Chadd * 397222780332SAdrian Chadd * XXX I'm not going through resume here - I don't want the 397322780332SAdrian Chadd * node to be rescheuled just yet. This however should be 397422780332SAdrian Chadd * methodized! 397522780332SAdrian Chadd */ 397622780332SAdrian Chadd if (tid->bar_wait) { 397722780332SAdrian Chadd if (tid->paused > 0) { 397822780332SAdrian Chadd tid->paused --; 397922780332SAdrian Chadd } 398022780332SAdrian Chadd } 398122780332SAdrian Chadd 398222780332SAdrian Chadd /* 398322780332SAdrian Chadd * XXX same with a currently filtered TID. 398422780332SAdrian Chadd * 398522780332SAdrian Chadd * Since this is being called during a flush, we assume that 398622780332SAdrian Chadd * the filtered frame list is actually empty. 398722780332SAdrian Chadd * 398822780332SAdrian Chadd * XXX TODO: add in a check to ensure that the filtered queue 398922780332SAdrian Chadd * depth is actually 0! 399022780332SAdrian Chadd */ 399122780332SAdrian Chadd if (tid->isfiltered) { 399222780332SAdrian Chadd if (tid->paused > 0) { 399322780332SAdrian Chadd tid->paused --; 399422780332SAdrian Chadd } 399522780332SAdrian Chadd } 399622780332SAdrian Chadd 399722780332SAdrian Chadd /* 399822780332SAdrian Chadd * Clear BAR, filtered frames, scheduled and ADDBA pending. 399922780332SAdrian Chadd * The TID may be going through cleanup from the last association 400022780332SAdrian Chadd * where things in the BAW are still in the hardware queue. 400122780332SAdrian Chadd */ 400222780332SAdrian Chadd tid->bar_wait = 0; 400322780332SAdrian Chadd tid->bar_tx = 0; 400422780332SAdrian Chadd tid->isfiltered = 0; 400522780332SAdrian Chadd tid->sched = 0; 400622780332SAdrian Chadd tid->addba_tx_pending = 0; 400722780332SAdrian Chadd 400822780332SAdrian Chadd /* 400922780332SAdrian Chadd * XXX TODO: it may just be enough to walk the HWQs and mark 401022780332SAdrian Chadd * frames for that node as non-aggregate; or mark the ath_node 401122780332SAdrian Chadd * with something that indicates that aggregation is no longer 4012f6b6084bSPedro F. Giffuni * occurring. Then we can just toss the BAW complaints and 401322780332SAdrian Chadd * do a complete hard reset of state here - no pause, no 401422780332SAdrian Chadd * complete counter, etc. 401522780332SAdrian Chadd */ 401622a3aee6SAdrian Chadd 401722780332SAdrian Chadd } 401822780332SAdrian Chadd 401922780332SAdrian Chadd /* 4020eb6f0de0SAdrian Chadd * Flush all software queued packets for the given node. 4021eb6f0de0SAdrian Chadd * 4022eb6f0de0SAdrian Chadd * This occurs when a completion handler frees the last buffer 4023eb6f0de0SAdrian Chadd * for a node, and the node is thus freed. This causes the node 4024eb6f0de0SAdrian Chadd * to be cleaned up, which ends up calling ath_tx_node_flush. 4025eb6f0de0SAdrian Chadd */ 4026eb6f0de0SAdrian Chadd void 4027eb6f0de0SAdrian Chadd ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an) 4028eb6f0de0SAdrian Chadd { 4029eb6f0de0SAdrian Chadd int tid; 4030eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4031eb6f0de0SAdrian Chadd struct ath_buf *bf; 4032eb6f0de0SAdrian Chadd 4033eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4034eb6f0de0SAdrian Chadd 403503682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p", 403603682514SAdrian Chadd &an->an_node); 403703682514SAdrian Chadd 4038375307d4SAdrian Chadd ATH_TX_LOCK(sc); 40399b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 40409b48fb4bSAdrian Chadd "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, " 404122a3aee6SAdrian Chadd "swq_depth=%d, clrdmask=%d, leak_count=%d\n", 40429b48fb4bSAdrian Chadd __func__, 40439b48fb4bSAdrian Chadd an->an_node.ni_macaddr, 40449b48fb4bSAdrian Chadd ":", 40459b48fb4bSAdrian Chadd an->an_is_powersave, 40469b48fb4bSAdrian Chadd an->an_stack_psq, 40479b48fb4bSAdrian Chadd an->an_tim_set, 40489b48fb4bSAdrian Chadd an->an_swq_depth, 404922a3aee6SAdrian Chadd an->clrdmask, 405022a3aee6SAdrian Chadd an->an_leak_count); 40519b48fb4bSAdrian Chadd 4052eb6f0de0SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 4053eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4054eb6f0de0SAdrian Chadd 4055eb6f0de0SAdrian Chadd /* Free packets */ 4056eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, an, atid, &bf_cq); 405722a3aee6SAdrian Chadd 405823f44d2bSAdrian Chadd /* Remove this tid from the list of active tids */ 405923f44d2bSAdrian Chadd ath_tx_tid_unsched(sc, atid); 406022a3aee6SAdrian Chadd 406122780332SAdrian Chadd /* Reset the per-TID pause, BAR, etc state */ 406222780332SAdrian Chadd ath_tx_tid_reset(sc, atid); 4063eb6f0de0SAdrian Chadd } 406422a3aee6SAdrian Chadd 406522a3aee6SAdrian Chadd /* 406622a3aee6SAdrian Chadd * Clear global leak count 406722a3aee6SAdrian Chadd */ 406822a3aee6SAdrian Chadd an->an_leak_count = 0; 4069375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4070eb6f0de0SAdrian Chadd 4071eb6f0de0SAdrian Chadd /* Handle completed frames */ 4072eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4073eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4074eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4075eb6f0de0SAdrian Chadd } 4076eb6f0de0SAdrian Chadd } 4077eb6f0de0SAdrian Chadd 4078eb6f0de0SAdrian Chadd /* 4079eb6f0de0SAdrian Chadd * Drain all the software TXQs currently with traffic queued. 4080eb6f0de0SAdrian Chadd */ 4081eb6f0de0SAdrian Chadd void 4082eb6f0de0SAdrian Chadd ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq) 4083eb6f0de0SAdrian Chadd { 4084eb6f0de0SAdrian Chadd struct ath_tid *tid; 4085eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4086eb6f0de0SAdrian Chadd struct ath_buf *bf; 4087eb6f0de0SAdrian Chadd 4088eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4089375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4090eb6f0de0SAdrian Chadd 4091eb6f0de0SAdrian Chadd /* 4092eb6f0de0SAdrian Chadd * Iterate over all active tids for the given txq, 4093eb6f0de0SAdrian Chadd * flushing and unsched'ing them 4094eb6f0de0SAdrian Chadd */ 4095eb6f0de0SAdrian Chadd while (! TAILQ_EMPTY(&txq->axq_tidq)) { 4096eb6f0de0SAdrian Chadd tid = TAILQ_FIRST(&txq->axq_tidq); 4097eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, tid->an, tid, &bf_cq); 4098eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 4099eb6f0de0SAdrian Chadd } 4100eb6f0de0SAdrian Chadd 4101375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4102eb6f0de0SAdrian Chadd 4103eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4104eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4105eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4106eb6f0de0SAdrian Chadd } 4107eb6f0de0SAdrian Chadd } 4108eb6f0de0SAdrian Chadd 4109eb6f0de0SAdrian Chadd /* 4110eb6f0de0SAdrian Chadd * Handle completion of non-aggregate session frames. 41110c54de88SAdrian Chadd * 41120c54de88SAdrian Chadd * This (currently) doesn't implement software retransmission of 41130c54de88SAdrian Chadd * non-aggregate frames! 41140c54de88SAdrian Chadd * 41150c54de88SAdrian Chadd * Software retransmission of non-aggregate frames needs to obey 41160c54de88SAdrian Chadd * the strict sequence number ordering, and drop any frames that 41170c54de88SAdrian Chadd * will fail this. 41180c54de88SAdrian Chadd * 41190c54de88SAdrian Chadd * For now, filtered frames and frame transmission will cause 41200c54de88SAdrian Chadd * all kinds of issues. So we don't support them. 41210c54de88SAdrian Chadd * 41220c54de88SAdrian Chadd * So anyone queuing frames via ath_tx_normal_xmit() or 41230c54de88SAdrian Chadd * ath_tx_hw_queue_norm() must override and set CLRDMASK. 4124eb6f0de0SAdrian Chadd */ 4125eb6f0de0SAdrian Chadd void 4126eb6f0de0SAdrian Chadd ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 4127eb6f0de0SAdrian Chadd { 4128eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4129eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4130eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4131eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4132eb6f0de0SAdrian Chadd struct ath_tx_status *ts = &bf->bf_status.ds_txstat; 4133eb6f0de0SAdrian Chadd 4134eb6f0de0SAdrian Chadd /* The TID state is protected behind the TXQ lock */ 4135375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4136eb6f0de0SAdrian Chadd 4137eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n", 4138eb6f0de0SAdrian Chadd __func__, bf, fail, atid->hwq_depth - 1); 4139eb6f0de0SAdrian Chadd 4140eb6f0de0SAdrian Chadd atid->hwq_depth--; 4141f1bc738eSAdrian Chadd 41420c54de88SAdrian Chadd #if 0 41430c54de88SAdrian Chadd /* 41440c54de88SAdrian Chadd * If the frame was filtered, stick it on the filter frame 41450c54de88SAdrian Chadd * queue and complain about it. It shouldn't happen! 41460c54de88SAdrian Chadd */ 41470c54de88SAdrian Chadd if ((ts->ts_status & HAL_TXERR_FILT) || 41480c54de88SAdrian Chadd (ts->ts_status != 0 && atid->isfiltered)) { 414983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 41500c54de88SAdrian Chadd "%s: isfiltered=%d, ts_status=%d: huh?\n", 41510c54de88SAdrian Chadd __func__, 41520c54de88SAdrian Chadd atid->isfiltered, 41530c54de88SAdrian Chadd ts->ts_status); 41540c54de88SAdrian Chadd ath_tx_tid_filt_comp_buf(sc, atid, bf); 41550c54de88SAdrian Chadd } 41560c54de88SAdrian Chadd #endif 4157f1bc738eSAdrian Chadd if (atid->isfiltered) 415883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__); 4159eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 416083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 4161eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4162f1bc738eSAdrian Chadd 4163f172ef75SAdrian Chadd /* If the TID is being cleaned up, track things */ 4164f172ef75SAdrian Chadd /* XXX refactor! */ 4165f172ef75SAdrian Chadd if (atid->cleanup_inprogress) { 4166f172ef75SAdrian Chadd atid->incomp--; 4167f172ef75SAdrian Chadd if (atid->incomp == 0) { 4168f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4169f172ef75SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4170f172ef75SAdrian Chadd __func__, tid); 4171f172ef75SAdrian Chadd atid->cleanup_inprogress = 0; 4172f172ef75SAdrian Chadd ath_tx_tid_resume(sc, atid); 4173f172ef75SAdrian Chadd } 4174f172ef75SAdrian Chadd } 4175f172ef75SAdrian Chadd 4176f1bc738eSAdrian Chadd /* 4177f1bc738eSAdrian Chadd * If the queue is filtered, potentially mark it as complete 4178f1bc738eSAdrian Chadd * and reschedule it as needed. 4179f1bc738eSAdrian Chadd * 4180f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 4181f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 4182f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 4183f1bc738eSAdrian Chadd * (complete or otherwise) frame. 4184f1bc738eSAdrian Chadd * 4185f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 4186f1bc738eSAdrian Chadd */ 4187f1bc738eSAdrian Chadd if (atid->isfiltered) 4188f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4189375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4190eb6f0de0SAdrian Chadd 4191eb6f0de0SAdrian Chadd /* 4192eb6f0de0SAdrian Chadd * punt to rate control if we're not being cleaned up 4193eb6f0de0SAdrian Chadd * during a hw queue drain and the frame wanted an ACK. 4194eb6f0de0SAdrian Chadd */ 4195875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 4196eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 4197eb6f0de0SAdrian Chadd ts, bf->bf_state.bfs_pktlen, 4198eb6f0de0SAdrian Chadd 1, (ts->ts_status == 0) ? 0 : 1); 4199eb6f0de0SAdrian Chadd 4200eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 4201eb6f0de0SAdrian Chadd } 4202eb6f0de0SAdrian Chadd 4203eb6f0de0SAdrian Chadd /* 4204eb6f0de0SAdrian Chadd * Handle cleanup of aggregate session packets that aren't 4205eb6f0de0SAdrian Chadd * an A-MPDU. 4206eb6f0de0SAdrian Chadd * 4207eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4208eb6f0de0SAdrian Chadd * torn down. 4209eb6f0de0SAdrian Chadd */ 4210eb6f0de0SAdrian Chadd static void 4211eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4212eb6f0de0SAdrian Chadd { 4213eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4214eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4215eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4216eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4217eb6f0de0SAdrian Chadd 4218eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n", 4219eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4220eb6f0de0SAdrian Chadd 4221375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4222eb6f0de0SAdrian Chadd atid->incomp--; 4223f172ef75SAdrian Chadd 4224f172ef75SAdrian Chadd /* XXX refactor! */ 4225f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4226f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4227f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 4228f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 4229f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n", 4230f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4231f172ef75SAdrian Chadd } 4232f172ef75SAdrian Chadd 4233eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4234eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4235eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4236eb6f0de0SAdrian Chadd __func__, tid); 4237eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4238eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4239eb6f0de0SAdrian Chadd } 4240375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4241eb6f0de0SAdrian Chadd 4242eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4243eb6f0de0SAdrian Chadd } 4244eb6f0de0SAdrian Chadd 4245f172ef75SAdrian Chadd 4246f172ef75SAdrian Chadd /* 4247f172ef75SAdrian Chadd * This as it currently stands is a bit dumb. Ideally we'd just 4248f172ef75SAdrian Chadd * fail the frame the normal way and have it permanently fail 4249f172ef75SAdrian Chadd * via the normal aggregate completion path. 4250f172ef75SAdrian Chadd */ 4251f172ef75SAdrian Chadd static void 4252f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an, 4253f172ef75SAdrian Chadd int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq) 4254f172ef75SAdrian Chadd { 4255f172ef75SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4256f172ef75SAdrian Chadd struct ath_buf *bf, *bf_next; 4257f172ef75SAdrian Chadd 4258f172ef75SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4259f172ef75SAdrian Chadd 4260f172ef75SAdrian Chadd /* 4261f172ef75SAdrian Chadd * Remove this frame from the queue. 4262f172ef75SAdrian Chadd */ 4263f172ef75SAdrian Chadd ATH_TID_REMOVE(atid, bf_head, bf_list); 4264f172ef75SAdrian Chadd 4265f172ef75SAdrian Chadd /* 4266f172ef75SAdrian Chadd * Loop over all the frames in the aggregate. 4267f172ef75SAdrian Chadd */ 4268f172ef75SAdrian Chadd bf = bf_head; 4269f172ef75SAdrian Chadd while (bf != NULL) { 4270f172ef75SAdrian Chadd bf_next = bf->bf_next; /* next aggregate frame, or NULL */ 4271f172ef75SAdrian Chadd 4272f172ef75SAdrian Chadd /* 4273f172ef75SAdrian Chadd * If it's been added to the BAW we need to kick 4274f172ef75SAdrian Chadd * it out of the BAW before we continue. 4275f172ef75SAdrian Chadd * 4276f172ef75SAdrian Chadd * XXX if it's an aggregate, assert that it's in the 4277f172ef75SAdrian Chadd * BAW - we shouldn't have it be in an aggregate 4278f172ef75SAdrian Chadd * otherwise! 4279f172ef75SAdrian Chadd */ 4280f172ef75SAdrian Chadd if (bf->bf_state.bfs_addedbaw) { 4281f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4282f172ef75SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4283f172ef75SAdrian Chadd } 4284f172ef75SAdrian Chadd 4285f172ef75SAdrian Chadd /* 4286f172ef75SAdrian Chadd * Give it the default completion handler. 4287f172ef75SAdrian Chadd */ 4288f172ef75SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 4289f172ef75SAdrian Chadd bf->bf_next = NULL; 4290f172ef75SAdrian Chadd 4291f172ef75SAdrian Chadd /* 4292f172ef75SAdrian Chadd * Add it to the list to free. 4293f172ef75SAdrian Chadd */ 4294f172ef75SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 4295f172ef75SAdrian Chadd 4296f172ef75SAdrian Chadd /* 4297f172ef75SAdrian Chadd * Now advance to the next frame in the aggregate. 4298f172ef75SAdrian Chadd */ 4299f172ef75SAdrian Chadd bf = bf_next; 4300f172ef75SAdrian Chadd } 4301f172ef75SAdrian Chadd } 4302f172ef75SAdrian Chadd 4303eb6f0de0SAdrian Chadd /* 4304eb6f0de0SAdrian Chadd * Performs transmit side cleanup when TID changes from aggregated to 4305f172ef75SAdrian Chadd * unaggregated and during reassociation. 4306eb6f0de0SAdrian Chadd * 4307f172ef75SAdrian Chadd * For now, this just tosses everything from the TID software queue 4308f172ef75SAdrian Chadd * whether or not it has been retried and marks the TID as 4309f172ef75SAdrian Chadd * pending completion if there's anything for this TID queued to 4310f172ef75SAdrian Chadd * the hardware. 4311eb6f0de0SAdrian Chadd * 43125da3fc10SAdrian Chadd * The caller is responsible for pausing the TID and unpausing the 43135da3fc10SAdrian Chadd * TID if no cleanup was required. Otherwise the cleanup path will 43145da3fc10SAdrian Chadd * unpause the TID once the last hardware queued frame is completed. 4315eb6f0de0SAdrian Chadd */ 4316eb6f0de0SAdrian Chadd static void 431722780332SAdrian Chadd ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid, 431822780332SAdrian Chadd ath_bufhead *bf_cq) 4319eb6f0de0SAdrian Chadd { 4320eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4321eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 432222780332SAdrian Chadd 432322780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4324eb6f0de0SAdrian Chadd 4325d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4326f172ef75SAdrian Chadd "%s: TID %d: called; inprogress=%d\n", __func__, tid, 4327f172ef75SAdrian Chadd atid->cleanup_inprogress); 4328eb6f0de0SAdrian Chadd 4329eb6f0de0SAdrian Chadd /* 4330f1bc738eSAdrian Chadd * Move the filtered frames to the TX queue, before 4331f1bc738eSAdrian Chadd * we run off and discard/process things. 4332f1bc738eSAdrian Chadd */ 4333f172ef75SAdrian Chadd 4334f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */ 433513aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) { 433613aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(atid, bf, bf_list); 43373e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4338f1bc738eSAdrian Chadd } 4339f1bc738eSAdrian Chadd 4340f1bc738eSAdrian Chadd /* 4341eb6f0de0SAdrian Chadd * Update the frames in the software TX queue: 4342eb6f0de0SAdrian Chadd * 4343eb6f0de0SAdrian Chadd * + Discard retry frames in the queue 4344eb6f0de0SAdrian Chadd * + Fix the completion function to be non-aggregate 4345eb6f0de0SAdrian Chadd */ 43463e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid); 4347eb6f0de0SAdrian Chadd while (bf) { 4348eb6f0de0SAdrian Chadd /* 4349f172ef75SAdrian Chadd * Grab the next frame in the list, we may 4350f172ef75SAdrian Chadd * be fiddling with the list. 4351eb6f0de0SAdrian Chadd */ 4352f172ef75SAdrian Chadd bf_next = TAILQ_NEXT(bf, bf_list); 4353f172ef75SAdrian Chadd 4354f172ef75SAdrian Chadd /* 4355f172ef75SAdrian Chadd * Free the frame and all subframes. 4356f172ef75SAdrian Chadd */ 4357f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq); 4358f172ef75SAdrian Chadd 4359f172ef75SAdrian Chadd /* 4360f172ef75SAdrian Chadd * Next frame! 4361f172ef75SAdrian Chadd */ 4362eb6f0de0SAdrian Chadd bf = bf_next; 4363eb6f0de0SAdrian Chadd } 4364eb6f0de0SAdrian Chadd 4365eb6f0de0SAdrian Chadd /* 4366f172ef75SAdrian Chadd * If there's anything in the hardware queue we wait 4367f172ef75SAdrian Chadd * for the TID HWQ to empty. 4368eb6f0de0SAdrian Chadd */ 4369f172ef75SAdrian Chadd if (atid->hwq_depth > 0) { 4370f172ef75SAdrian Chadd /* 4371f172ef75SAdrian Chadd * XXX how about we kill atid->incomp, and instead 4372f172ef75SAdrian Chadd * replace it with a macro that checks that atid->hwq_depth 4373f172ef75SAdrian Chadd * is 0? 4374f172ef75SAdrian Chadd */ 4375f172ef75SAdrian Chadd atid->incomp = atid->hwq_depth; 4376eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 1; 4377eb6f0de0SAdrian Chadd } 4378eb6f0de0SAdrian Chadd 4379eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) 4380eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4381eb6f0de0SAdrian Chadd "%s: TID %d: cleanup needed: %d packets\n", 4382eb6f0de0SAdrian Chadd __func__, tid, atid->incomp); 4383eb6f0de0SAdrian Chadd 438422780332SAdrian Chadd /* Owner now must free completed frames */ 4385eb6f0de0SAdrian Chadd } 4386eb6f0de0SAdrian Chadd 4387eb6f0de0SAdrian Chadd static struct ath_buf * 438838962489SAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 438938962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf) 4390eb6f0de0SAdrian Chadd { 4391eb6f0de0SAdrian Chadd struct ath_buf *nbf; 4392eb6f0de0SAdrian Chadd int error; 4393eb6f0de0SAdrian Chadd 43943f3a5dbdSAdrian Chadd /* 43953f3a5dbdSAdrian Chadd * Clone the buffer. This will handle the dma unmap and 43963f3a5dbdSAdrian Chadd * copy the node reference to the new buffer. If this 43973f3a5dbdSAdrian Chadd * works out, 'bf' will have no DMA mapping, no mbuf 43983f3a5dbdSAdrian Chadd * pointer and no node reference. 43993f3a5dbdSAdrian Chadd */ 4400eb6f0de0SAdrian Chadd nbf = ath_buf_clone(sc, bf); 4401eb6f0de0SAdrian Chadd 4402eb6f0de0SAdrian Chadd #if 0 440383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n", 4404eb6f0de0SAdrian Chadd __func__); 4405eb6f0de0SAdrian Chadd #endif 4406eb6f0de0SAdrian Chadd 4407eb6f0de0SAdrian Chadd if (nbf == NULL) { 4408eb6f0de0SAdrian Chadd /* Failed to clone */ 440983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 4410eb6f0de0SAdrian Chadd "%s: failed to clone a busy buffer\n", 4411eb6f0de0SAdrian Chadd __func__); 4412eb6f0de0SAdrian Chadd return NULL; 4413eb6f0de0SAdrian Chadd } 4414eb6f0de0SAdrian Chadd 4415eb6f0de0SAdrian Chadd /* Setup the dma for the new buffer */ 4416eb6f0de0SAdrian Chadd error = ath_tx_dmasetup(sc, nbf, nbf->bf_m); 4417eb6f0de0SAdrian Chadd if (error != 0) { 441883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 4419eb6f0de0SAdrian Chadd "%s: failed to setup dma for clone\n", 4420eb6f0de0SAdrian Chadd __func__); 4421eb6f0de0SAdrian Chadd /* 4422eb6f0de0SAdrian Chadd * Put this at the head of the list, not tail; 4423eb6f0de0SAdrian Chadd * that way it doesn't interfere with the 4424eb6f0de0SAdrian Chadd * busy buffer logic (which uses the tail of 4425eb6f0de0SAdrian Chadd * the list.) 4426eb6f0de0SAdrian Chadd */ 4427eb6f0de0SAdrian Chadd ATH_TXBUF_LOCK(sc); 442832c387f7SAdrian Chadd ath_returnbuf_head(sc, nbf); 4429eb6f0de0SAdrian Chadd ATH_TXBUF_UNLOCK(sc); 4430eb6f0de0SAdrian Chadd return NULL; 4431eb6f0de0SAdrian Chadd } 4432eb6f0de0SAdrian Chadd 443338962489SAdrian Chadd /* Update BAW if required, before we free the original buf */ 443438962489SAdrian Chadd if (bf->bf_state.bfs_dobaw) 443538962489SAdrian Chadd ath_tx_switch_baw_buf(sc, an, tid, bf, nbf); 443638962489SAdrian Chadd 44373f3a5dbdSAdrian Chadd /* Free original buffer; return new buffer */ 4438eb6f0de0SAdrian Chadd ath_freebuf(sc, bf); 4439f1bc738eSAdrian Chadd 4440eb6f0de0SAdrian Chadd return nbf; 4441eb6f0de0SAdrian Chadd } 4442eb6f0de0SAdrian Chadd 4443eb6f0de0SAdrian Chadd /* 4444eb6f0de0SAdrian Chadd * Handle retrying an unaggregate frame in an aggregate 4445eb6f0de0SAdrian Chadd * session. 4446eb6f0de0SAdrian Chadd * 4447eb6f0de0SAdrian Chadd * If too many retries occur, pause the TID, wait for 4448eb6f0de0SAdrian Chadd * any further retransmits (as there's no reason why 4449eb6f0de0SAdrian Chadd * non-aggregate frames in an aggregate session are 4450eb6f0de0SAdrian Chadd * transmitted in-order; they just have to be in-BAW) 4451eb6f0de0SAdrian Chadd * and then queue a BAR. 4452eb6f0de0SAdrian Chadd */ 4453eb6f0de0SAdrian Chadd static void 4454eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4455eb6f0de0SAdrian Chadd { 4456eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4457eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4458eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4459eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4460eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4461eb6f0de0SAdrian Chadd 4462375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4463eb6f0de0SAdrian Chadd 4464eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4465eb6f0de0SAdrian Chadd 4466eb6f0de0SAdrian Chadd /* 4467eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4468eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4469eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4470eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4471eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4472eb6f0de0SAdrian Chadd * for us. 4473eb6f0de0SAdrian Chadd */ 4474eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4475eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4476eb6f0de0SAdrian Chadd struct ath_buf *nbf; 447738962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4478eb6f0de0SAdrian Chadd if (nbf) 4479eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4480eb6f0de0SAdrian Chadd bf = nbf; 4481eb6f0de0SAdrian Chadd else 4482eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4483eb6f0de0SAdrian Chadd } 4484eb6f0de0SAdrian Chadd 4485eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4486eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4487eb6f0de0SAdrian Chadd "%s: exceeded retries; seqno %d\n", 4488eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4489eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4490eb6f0de0SAdrian Chadd 4491eb6f0de0SAdrian Chadd /* Update BAW anyway */ 4492eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4493eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4494eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw) 449583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4496eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4497eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4498eb6f0de0SAdrian Chadd } 4499eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4500eb6f0de0SAdrian Chadd 450188b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 450288b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 450388b3d483SAdrian Chadd 450488b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 450588b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 450688b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 450788b3d483SAdrian Chadd 4508375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4509eb6f0de0SAdrian Chadd 4510eb6f0de0SAdrian Chadd /* Free buffer, bf is free after this call */ 4511eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4512eb6f0de0SAdrian Chadd return; 4513eb6f0de0SAdrian Chadd } 4514eb6f0de0SAdrian Chadd 4515eb6f0de0SAdrian Chadd /* 4516eb6f0de0SAdrian Chadd * This increments the retry counter as well as 4517eb6f0de0SAdrian Chadd * sets the retry flag in the ath_buf and packet 4518eb6f0de0SAdrian Chadd * body. 4519eb6f0de0SAdrian Chadd */ 4520eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4521f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4522eb6f0de0SAdrian Chadd 4523eb6f0de0SAdrian Chadd /* 4524eb6f0de0SAdrian Chadd * Insert this at the head of the queue, so it's 4525eb6f0de0SAdrian Chadd * retried before any current/subsequent frames. 4526eb6f0de0SAdrian Chadd */ 45273e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4528eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid); 452988b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */ 453088b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 453188b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4532eb6f0de0SAdrian Chadd 4533375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4534eb6f0de0SAdrian Chadd } 4535eb6f0de0SAdrian Chadd 4536eb6f0de0SAdrian Chadd /* 4537eb6f0de0SAdrian Chadd * Common code for aggregate excessive retry/subframe retry. 4538eb6f0de0SAdrian Chadd * If retrying, queues buffers to bf_q. If not, frees the 4539eb6f0de0SAdrian Chadd * buffers. 4540eb6f0de0SAdrian Chadd * 4541eb6f0de0SAdrian Chadd * XXX should unify this with ath_tx_aggr_retry_unaggr() 4542eb6f0de0SAdrian Chadd */ 4543eb6f0de0SAdrian Chadd static int 4544eb6f0de0SAdrian Chadd ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf, 4545eb6f0de0SAdrian Chadd ath_bufhead *bf_q) 4546eb6f0de0SAdrian Chadd { 4547eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 4548eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4549eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 4550eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4551eb6f0de0SAdrian Chadd 4552375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 4553eb6f0de0SAdrian Chadd 455421840808SAdrian Chadd /* XXX clr11naggr should be done for all subframes */ 4555eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 4556eb6f0de0SAdrian Chadd ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0); 4557f1bc738eSAdrian Chadd 4558eb6f0de0SAdrian Chadd /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */ 4559eb6f0de0SAdrian Chadd 4560eb6f0de0SAdrian Chadd /* 4561eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly 4562eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer. 4563eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer. 4564eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max 4565eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer 4566eb6f0de0SAdrian Chadd * for us. 4567eb6f0de0SAdrian Chadd */ 4568eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4569eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) { 4570eb6f0de0SAdrian Chadd struct ath_buf *nbf; 457138962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf); 4572eb6f0de0SAdrian Chadd if (nbf) 4573eb6f0de0SAdrian Chadd /* bf has been freed at this point */ 4574eb6f0de0SAdrian Chadd bf = nbf; 4575eb6f0de0SAdrian Chadd else 4576eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4577eb6f0de0SAdrian Chadd } 4578eb6f0de0SAdrian Chadd 4579eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4580eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++; 4581eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4582eb6f0de0SAdrian Chadd "%s: max retries: seqno %d\n", 4583eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4584eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4585eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 458683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4587eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4588eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4589eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4590eb6f0de0SAdrian Chadd return 1; 4591eb6f0de0SAdrian Chadd } 4592eb6f0de0SAdrian Chadd 4593eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf); 4594f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++; 4595eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Just to make sure */ 4596eb6f0de0SAdrian Chadd 459721840808SAdrian Chadd /* Clear the aggregate state */ 459821840808SAdrian Chadd bf->bf_state.bfs_aggr = 0; 459921840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; /* ??? needed? */ 460021840808SAdrian Chadd bf->bf_state.bfs_nframes = 1; 460121840808SAdrian Chadd 4602eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 4603eb6f0de0SAdrian Chadd return 0; 4604eb6f0de0SAdrian Chadd } 4605eb6f0de0SAdrian Chadd 4606eb6f0de0SAdrian Chadd /* 4607eb6f0de0SAdrian Chadd * error pkt completion for an aggregate destination 4608eb6f0de0SAdrian Chadd */ 4609eb6f0de0SAdrian Chadd static void 4610eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first, 4611eb6f0de0SAdrian Chadd struct ath_tid *tid) 4612eb6f0de0SAdrian Chadd { 4613eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4614eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4615eb6f0de0SAdrian Chadd struct ath_buf *bf_next, *bf; 4616eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4617eb6f0de0SAdrian Chadd int drops = 0; 4618eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4619eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4620eb6f0de0SAdrian Chadd 4621eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 4622eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq); 4623eb6f0de0SAdrian Chadd 4624eb6f0de0SAdrian Chadd /* 4625eb6f0de0SAdrian Chadd * Update rate control - all frames have failed. 4626eb6f0de0SAdrian Chadd * 4627eb6f0de0SAdrian Chadd * XXX use the length in the first frame in the series; 4628eb6f0de0SAdrian Chadd * XXX just so things are consistent for now. 4629eb6f0de0SAdrian Chadd */ 4630eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc, 4631eb6f0de0SAdrian Chadd &bf_first->bf_status.ds_txstat, 4632eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_pktlen, 4633eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes); 4634eb6f0de0SAdrian Chadd 4635375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4636eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 46372d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_failall++; 4638eb6f0de0SAdrian Chadd 4639eb6f0de0SAdrian Chadd /* Retry all subframes */ 4640eb6f0de0SAdrian Chadd bf = bf_first; 4641eb6f0de0SAdrian Chadd while (bf) { 4642eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4643eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 46442d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 4645eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4646eb6f0de0SAdrian Chadd drops++; 4647eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4648eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4649eb6f0de0SAdrian Chadd } 4650eb6f0de0SAdrian Chadd bf = bf_next; 4651eb6f0de0SAdrian Chadd } 4652eb6f0de0SAdrian Chadd 4653eb6f0de0SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 4654eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4655eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 46563e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list); 4657eb6f0de0SAdrian Chadd } 4658eb6f0de0SAdrian Chadd 465939da9d42SAdrian Chadd /* 466039da9d42SAdrian Chadd * Schedule the TID to be re-tried. 466139da9d42SAdrian Chadd */ 4662eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 4663eb6f0de0SAdrian Chadd 4664eb6f0de0SAdrian Chadd /* 4665eb6f0de0SAdrian Chadd * send bar if we dropped any frames 4666eb6f0de0SAdrian Chadd * 4667eb6f0de0SAdrian Chadd * Keep the txq lock held for now, as we need to ensure 4668eb6f0de0SAdrian Chadd * that ni_txseqs[] is consistent (as it's being updated 4669eb6f0de0SAdrian Chadd * in the ifnet TX context or raw TX context.) 4670eb6f0de0SAdrian Chadd */ 4671eb6f0de0SAdrian Chadd if (drops) { 467288b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 467388b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, tid); 4674eb6f0de0SAdrian Chadd } 4675eb6f0de0SAdrian Chadd 467688b3d483SAdrian Chadd /* 467788b3d483SAdrian Chadd * Send BAR if required 467888b3d483SAdrian Chadd */ 467988b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, tid)) 468088b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, tid); 4681f1bc738eSAdrian Chadd 4682375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 468388b3d483SAdrian Chadd 4684eb6f0de0SAdrian Chadd /* Complete frames which errored out */ 4685eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4686eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 4687eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 4688eb6f0de0SAdrian Chadd } 4689eb6f0de0SAdrian Chadd } 4690eb6f0de0SAdrian Chadd 4691eb6f0de0SAdrian Chadd /* 4692eb6f0de0SAdrian Chadd * Handle clean-up of packets from an aggregate list. 4693eb6f0de0SAdrian Chadd * 4694eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being 4695eb6f0de0SAdrian Chadd * torn down. 4696eb6f0de0SAdrian Chadd */ 4697eb6f0de0SAdrian Chadd static void 4698eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first) 4699eb6f0de0SAdrian Chadd { 4700eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4701eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4702eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4703eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4704eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4705eb6f0de0SAdrian Chadd 4706375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4707eb6f0de0SAdrian Chadd 4708eb6f0de0SAdrian Chadd /* update incomp */ 4709f172ef75SAdrian Chadd atid->incomp--; 4710f172ef75SAdrian Chadd 4711f172ef75SAdrian Chadd /* Update the BAW */ 4712302868d9SAdrian Chadd bf = bf_first; 4713eb6f0de0SAdrian Chadd while (bf) { 4714f172ef75SAdrian Chadd /* XXX refactor! */ 4715f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4716f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4717f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 4718f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 4719f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n", 4720f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4721f172ef75SAdrian Chadd } 4722eb6f0de0SAdrian Chadd bf = bf->bf_next; 4723eb6f0de0SAdrian Chadd } 4724eb6f0de0SAdrian Chadd 4725eb6f0de0SAdrian Chadd if (atid->incomp == 0) { 4726eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4727eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n", 4728eb6f0de0SAdrian Chadd __func__, tid); 4729eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0; 4730eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 4731eb6f0de0SAdrian Chadd } 473288b3d483SAdrian Chadd 473388b3d483SAdrian Chadd /* Send BAR if required */ 4734f1bc738eSAdrian Chadd /* XXX why would we send a BAR when transitioning to non-aggregation? */ 4735302868d9SAdrian Chadd /* 4736302868d9SAdrian Chadd * XXX TODO: we should likely just tear down the BAR state here, 4737302868d9SAdrian Chadd * rather than sending a BAR. 4738302868d9SAdrian Chadd */ 473988b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 474088b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 4741f1bc738eSAdrian Chadd 4742375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4743eb6f0de0SAdrian Chadd 4744706bb444SAdrian Chadd /* Handle frame completion as individual frames */ 4745302868d9SAdrian Chadd bf = bf_first; 4746eb6f0de0SAdrian Chadd while (bf) { 4747eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4748706bb444SAdrian Chadd bf->bf_next = NULL; 4749eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 4750eb6f0de0SAdrian Chadd bf = bf_next; 4751eb6f0de0SAdrian Chadd } 4752eb6f0de0SAdrian Chadd } 4753eb6f0de0SAdrian Chadd 4754eb6f0de0SAdrian Chadd /* 4755eb6f0de0SAdrian Chadd * Handle completion of an set of aggregate frames. 4756eb6f0de0SAdrian Chadd * 4757eb6f0de0SAdrian Chadd * Note: the completion handler is the last descriptor in the aggregate, 4758eb6f0de0SAdrian Chadd * not the last descriptor in the first frame. 4759eb6f0de0SAdrian Chadd */ 4760eb6f0de0SAdrian Chadd static void 4761d4365d16SAdrian Chadd ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first, 4762d4365d16SAdrian Chadd int fail) 4763eb6f0de0SAdrian Chadd { 4764eb6f0de0SAdrian Chadd //struct ath_desc *ds = bf->bf_lastds; 4765eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node; 4766eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 4767eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid; 4768eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 4769eb6f0de0SAdrian Chadd struct ath_tx_status ts; 4770eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 4771eb6f0de0SAdrian Chadd ath_bufhead bf_q; 4772eb6f0de0SAdrian Chadd ath_bufhead bf_cq; 4773eb6f0de0SAdrian Chadd int seq_st, tx_ok; 4774eb6f0de0SAdrian Chadd int hasba, isaggr; 4775eb6f0de0SAdrian Chadd uint32_t ba[2]; 4776eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next; 4777eb6f0de0SAdrian Chadd int ba_index; 4778eb6f0de0SAdrian Chadd int drops = 0; 4779eb6f0de0SAdrian Chadd int nframes = 0, nbad = 0, nf; 4780eb6f0de0SAdrian Chadd int pktlen; 4781eb6f0de0SAdrian Chadd /* XXX there's too much on the stack? */ 4782b815538dSAdrian Chadd struct ath_rc_series rc[ATH_RC_NUM]; 4783eb6f0de0SAdrian Chadd int txseq; 4784eb6f0de0SAdrian Chadd 4785eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n", 4786eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4787eb6f0de0SAdrian Chadd 47880aa5c1bbSAdrian Chadd /* 47890aa5c1bbSAdrian Chadd * Take a copy; this may be needed -after- bf_first 47900aa5c1bbSAdrian Chadd * has been completed and freed. 47910aa5c1bbSAdrian Chadd */ 47920aa5c1bbSAdrian Chadd ts = bf_first->bf_status.ds_txstat; 47930aa5c1bbSAdrian Chadd 4794f1bc738eSAdrian Chadd TAILQ_INIT(&bf_q); 4795f1bc738eSAdrian Chadd TAILQ_INIT(&bf_cq); 4796f1bc738eSAdrian Chadd 4797eb6f0de0SAdrian Chadd /* The TID state is kept behind the TXQ lock */ 4798375307d4SAdrian Chadd ATH_TX_LOCK(sc); 4799eb6f0de0SAdrian Chadd 4800eb6f0de0SAdrian Chadd atid->hwq_depth--; 4801eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 480283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n", 4803eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 4804eb6f0de0SAdrian Chadd 4805eb6f0de0SAdrian Chadd /* 4806f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 4807f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 4808f1bc738eSAdrian Chadd * function. 48090aa5c1bbSAdrian Chadd * 48100aa5c1bbSAdrian Chadd * XXX this is duplicate work, ew. 4811f1bc738eSAdrian Chadd */ 4812f1bc738eSAdrian Chadd if (atid->isfiltered) 4813f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 4814f1bc738eSAdrian Chadd 4815f1bc738eSAdrian Chadd /* 4816eb6f0de0SAdrian Chadd * Punt cleanup to the relevant function, not our problem now 4817eb6f0de0SAdrian Chadd */ 4818eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 4819f1bc738eSAdrian Chadd if (atid->isfiltered) 482083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4821f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 4822f1bc738eSAdrian Chadd __func__); 4823375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4824eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(sc, bf_first); 4825eb6f0de0SAdrian Chadd return; 4826eb6f0de0SAdrian Chadd } 4827eb6f0de0SAdrian Chadd 4828eb6f0de0SAdrian Chadd /* 4829f1bc738eSAdrian Chadd * If the frame is filtered, transition to filtered frame 4830f1bc738eSAdrian Chadd * mode and add this to the filtered frame list. 4831f1bc738eSAdrian Chadd * 4832f1bc738eSAdrian Chadd * XXX TODO: figure out how this interoperates with 4833f1bc738eSAdrian Chadd * BAR, pause and cleanup states. 4834f1bc738eSAdrian Chadd */ 4835f1bc738eSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 4836f1bc738eSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 4837f1bc738eSAdrian Chadd if (fail != 0) 483883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4839f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", __func__, fail); 4840f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq); 4841f1bc738eSAdrian Chadd 4842f1bc738eSAdrian Chadd /* Remove from BAW */ 4843f1bc738eSAdrian Chadd TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) { 4844f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 4845f1bc738eSAdrian Chadd drops++; 4846f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 4847f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4848f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 484983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4850f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 4851f1bc738eSAdrian Chadd __func__, 4852f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4853f1bc738eSAdrian Chadd } 4854f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4855f1bc738eSAdrian Chadd } 4856f1bc738eSAdrian Chadd /* 4857f1bc738eSAdrian Chadd * If any intermediate frames in the BAW were dropped when 4858f1bc738eSAdrian Chadd * handling filtering things, send a BAR. 4859f1bc738eSAdrian Chadd */ 4860f1bc738eSAdrian Chadd if (drops) 4861f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 4862f1bc738eSAdrian Chadd 4863f1bc738eSAdrian Chadd /* 4864f1bc738eSAdrian Chadd * Finish up by sending a BAR if required and freeing 4865f1bc738eSAdrian Chadd * the frames outside of the TX lock. 4866f1bc738eSAdrian Chadd */ 4867f1bc738eSAdrian Chadd goto finish_send_bar; 4868f1bc738eSAdrian Chadd } 4869f1bc738eSAdrian Chadd 4870f1bc738eSAdrian Chadd /* 4871eb6f0de0SAdrian Chadd * XXX for now, use the first frame in the aggregate for 4872eb6f0de0SAdrian Chadd * XXX rate control completion; it's at least consistent. 4873eb6f0de0SAdrian Chadd */ 4874eb6f0de0SAdrian Chadd pktlen = bf_first->bf_state.bfs_pktlen; 4875eb6f0de0SAdrian Chadd 4876eb6f0de0SAdrian Chadd /* 4877e9a6408eSAdrian Chadd * Handle errors first! 4878e9a6408eSAdrian Chadd * 4879e9a6408eSAdrian Chadd * Here, handle _any_ error as a "exceeded retries" error. 4880e9a6408eSAdrian Chadd * Later on (when filtered frames are to be specially handled) 4881e9a6408eSAdrian Chadd * it'll have to be expanded. 4882eb6f0de0SAdrian Chadd */ 4883e9a6408eSAdrian Chadd #if 0 4884eb6f0de0SAdrian Chadd if (ts.ts_status & HAL_TXERR_XRETRY) { 4885e9a6408eSAdrian Chadd #endif 4886e9a6408eSAdrian Chadd if (ts.ts_status != 0) { 4887375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 4888eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(sc, bf_first, atid); 4889eb6f0de0SAdrian Chadd return; 4890eb6f0de0SAdrian Chadd } 4891eb6f0de0SAdrian Chadd 4892eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 4893eb6f0de0SAdrian Chadd 4894eb6f0de0SAdrian Chadd /* 4895eb6f0de0SAdrian Chadd * extract starting sequence and block-ack bitmap 4896eb6f0de0SAdrian Chadd */ 4897eb6f0de0SAdrian Chadd /* XXX endian-ness of seq_st, ba? */ 4898eb6f0de0SAdrian Chadd seq_st = ts.ts_seqnum; 4899eb6f0de0SAdrian Chadd hasba = !! (ts.ts_flags & HAL_TX_BA); 4900eb6f0de0SAdrian Chadd tx_ok = (ts.ts_status == 0); 4901eb6f0de0SAdrian Chadd isaggr = bf_first->bf_state.bfs_aggr; 4902eb6f0de0SAdrian Chadd ba[0] = ts.ts_ba_low; 4903eb6f0de0SAdrian Chadd ba[1] = ts.ts_ba_high; 4904eb6f0de0SAdrian Chadd 4905eb6f0de0SAdrian Chadd /* 4906eb6f0de0SAdrian Chadd * Copy the TX completion status and the rate control 4907eb6f0de0SAdrian Chadd * series from the first descriptor, as it may be freed 4908eb6f0de0SAdrian Chadd * before the rate control code can get its grubby fingers 4909eb6f0de0SAdrian Chadd * into things. 4910eb6f0de0SAdrian Chadd */ 4911eb6f0de0SAdrian Chadd memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc)); 4912eb6f0de0SAdrian Chadd 4913eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4914d4365d16SAdrian Chadd "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, " 4915d4365d16SAdrian Chadd "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n", 4916eb6f0de0SAdrian Chadd __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags, 4917eb6f0de0SAdrian Chadd isaggr, seq_st, hasba, ba[0], ba[1]); 4918eb6f0de0SAdrian Chadd 4919b3420862SAdrian Chadd /* 4920b3420862SAdrian Chadd * The reference driver doesn't do this; it simply ignores 4921b3420862SAdrian Chadd * this check in its entirety. 4922b3420862SAdrian Chadd * 4923b3420862SAdrian Chadd * I've seen this occur when using iperf to send traffic 4924b3420862SAdrian Chadd * out tid 1 - the aggregate frames are all marked as TID 1, 4925b3420862SAdrian Chadd * but the TXSTATUS has TID=0. So, let's just ignore this 4926b3420862SAdrian Chadd * check. 4927b3420862SAdrian Chadd */ 4928b3420862SAdrian Chadd #if 0 4929eb6f0de0SAdrian Chadd /* Occasionally, the MAC sends a tx status for the wrong TID. */ 4930eb6f0de0SAdrian Chadd if (tid != ts.ts_tid) { 493183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n", 4932eb6f0de0SAdrian Chadd __func__, tid, ts.ts_tid); 4933eb6f0de0SAdrian Chadd tx_ok = 0; 4934eb6f0de0SAdrian Chadd } 4935b3420862SAdrian Chadd #endif 4936eb6f0de0SAdrian Chadd 4937eb6f0de0SAdrian Chadd /* AR5416 BA bug; this requires an interface reset */ 4938eb6f0de0SAdrian Chadd if (isaggr && tx_ok && (! hasba)) { 493982525db1SAdrian Chadd device_printf(sc->sc_dev, 4940d4365d16SAdrian Chadd "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, " 4941d4365d16SAdrian Chadd "seq_st=%d\n", 4942eb6f0de0SAdrian Chadd __func__, hasba, tx_ok, isaggr, seq_st); 4943eb6f0de0SAdrian Chadd /* XXX TODO: schedule an interface reset */ 49440f078d63SJohn Baldwin #ifdef ATH_DEBUG 49456abbbae5SAdrian Chadd ath_printtxbuf(sc, bf_first, 49466abbbae5SAdrian Chadd sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0); 49470f078d63SJohn Baldwin #endif 4948eb6f0de0SAdrian Chadd } 4949eb6f0de0SAdrian Chadd 4950eb6f0de0SAdrian Chadd /* 4951eb6f0de0SAdrian Chadd * Walk the list of frames, figure out which ones were correctly 4952eb6f0de0SAdrian Chadd * sent and which weren't. 4953eb6f0de0SAdrian Chadd */ 4954eb6f0de0SAdrian Chadd bf = bf_first; 4955eb6f0de0SAdrian Chadd nf = bf_first->bf_state.bfs_nframes; 4956eb6f0de0SAdrian Chadd 4957eb6f0de0SAdrian Chadd /* bf_first is going to be invalid once this list is walked */ 4958eb6f0de0SAdrian Chadd bf_first = NULL; 4959eb6f0de0SAdrian Chadd 4960eb6f0de0SAdrian Chadd /* 4961eb6f0de0SAdrian Chadd * Walk the list of completed frames and determine 4962eb6f0de0SAdrian Chadd * which need to be completed and which need to be 4963eb6f0de0SAdrian Chadd * retransmitted. 4964eb6f0de0SAdrian Chadd * 4965eb6f0de0SAdrian Chadd * For completed frames, the completion functions need 4966eb6f0de0SAdrian Chadd * to be called at the end of this function as the last 4967eb6f0de0SAdrian Chadd * node reference may free the node. 4968eb6f0de0SAdrian Chadd * 4969eb6f0de0SAdrian Chadd * Finally, since the TXQ lock can't be held during the 4970eb6f0de0SAdrian Chadd * completion callback (to avoid lock recursion), 4971eb6f0de0SAdrian Chadd * the completion calls have to be done outside of the 4972eb6f0de0SAdrian Chadd * lock. 4973eb6f0de0SAdrian Chadd */ 4974eb6f0de0SAdrian Chadd while (bf) { 4975eb6f0de0SAdrian Chadd nframes++; 4976d4365d16SAdrian Chadd ba_index = ATH_BA_INDEX(seq_st, 4977d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 4978eb6f0de0SAdrian Chadd bf_next = bf->bf_next; 4979eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */ 4980eb6f0de0SAdrian Chadd 4981eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4982eb6f0de0SAdrian Chadd "%s: checking bf=%p seqno=%d; ack=%d\n", 4983eb6f0de0SAdrian Chadd __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 4984eb6f0de0SAdrian Chadd ATH_BA_ISSET(ba, ba_index)); 4985eb6f0de0SAdrian Chadd 4986eb6f0de0SAdrian Chadd if (tx_ok && ATH_BA_ISSET(ba, ba_index)) { 49872d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_ok++; 4988eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 4989eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 4990eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 499183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4992eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 4993eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 4994eb6f0de0SAdrian Chadd bf->bf_next = NULL; 4995eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4996eb6f0de0SAdrian Chadd } else { 49972d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++; 4998eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4999eb6f0de0SAdrian Chadd drops++; 5000eb6f0de0SAdrian Chadd bf->bf_next = NULL; 5001eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 5002eb6f0de0SAdrian Chadd } 5003eb6f0de0SAdrian Chadd nbad++; 5004eb6f0de0SAdrian Chadd } 5005eb6f0de0SAdrian Chadd bf = bf_next; 5006eb6f0de0SAdrian Chadd } 5007eb6f0de0SAdrian Chadd 5008eb6f0de0SAdrian Chadd /* 5009eb6f0de0SAdrian Chadd * Now that the BAW updates have been done, unlock 5010eb6f0de0SAdrian Chadd * 5011eb6f0de0SAdrian Chadd * txseq is grabbed before the lock is released so we 5012eb6f0de0SAdrian Chadd * have a consistent view of what -was- in the BAW. 5013eb6f0de0SAdrian Chadd * Anything after this point will not yet have been 5014eb6f0de0SAdrian Chadd * TXed. 5015eb6f0de0SAdrian Chadd */ 5016eb6f0de0SAdrian Chadd txseq = tap->txa_start; 5017375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5018eb6f0de0SAdrian Chadd 5019eb6f0de0SAdrian Chadd if (nframes != nf) 502083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5021eb6f0de0SAdrian Chadd "%s: num frames seen=%d; bf nframes=%d\n", 5022eb6f0de0SAdrian Chadd __func__, nframes, nf); 5023eb6f0de0SAdrian Chadd 5024eb6f0de0SAdrian Chadd /* 5025eb6f0de0SAdrian Chadd * Now we know how many frames were bad, call the rate 5026eb6f0de0SAdrian Chadd * control code. 5027eb6f0de0SAdrian Chadd */ 5028eb6f0de0SAdrian Chadd if (fail == 0) 5029d4365d16SAdrian Chadd ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes, 5030d4365d16SAdrian Chadd nbad); 5031eb6f0de0SAdrian Chadd 5032eb6f0de0SAdrian Chadd /* 5033eb6f0de0SAdrian Chadd * send bar if we dropped any frames 5034eb6f0de0SAdrian Chadd */ 5035eb6f0de0SAdrian Chadd if (drops) { 503688b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */ 5037375307d4SAdrian Chadd ATH_TX_LOCK(sc); 503888b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 5039375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5040eb6f0de0SAdrian Chadd } 5041eb6f0de0SAdrian Chadd 504239da9d42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 504339da9d42SAdrian Chadd "%s: txa_start now %d\n", __func__, tap->txa_start); 504439da9d42SAdrian Chadd 5045375307d4SAdrian Chadd ATH_TX_LOCK(sc); 504639da9d42SAdrian Chadd 504739da9d42SAdrian Chadd /* Prepend all frames to the beginning of the queue */ 5048eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 5049eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list); 50503e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list); 5051eb6f0de0SAdrian Chadd } 5052eb6f0de0SAdrian Chadd 505339da9d42SAdrian Chadd /* 505439da9d42SAdrian Chadd * Reschedule to grab some further frames. 505539da9d42SAdrian Chadd */ 505639da9d42SAdrian Chadd ath_tx_tid_sched(sc, atid); 5057eb6f0de0SAdrian Chadd 505888b3d483SAdrian Chadd /* 5059f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 5060f1bc738eSAdrian Chadd * 5061f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 5062f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 5063f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 5064f1bc738eSAdrian Chadd * (complete or otherwise) frame. 5065f1bc738eSAdrian Chadd * 5066f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 5067f1bc738eSAdrian Chadd */ 5068f1bc738eSAdrian Chadd if (atid->isfiltered) 5069f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5070f1bc738eSAdrian Chadd 5071f1bc738eSAdrian Chadd finish_send_bar: 5072f1bc738eSAdrian Chadd 5073f1bc738eSAdrian Chadd /* 507488b3d483SAdrian Chadd * Send BAR if required 507588b3d483SAdrian Chadd */ 507688b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 507788b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 507839da9d42SAdrian Chadd 5079375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 508088b3d483SAdrian Chadd 5081eb6f0de0SAdrian Chadd /* Do deferred completion */ 5082eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 5083eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 5084eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0); 5085eb6f0de0SAdrian Chadd } 5086eb6f0de0SAdrian Chadd } 5087eb6f0de0SAdrian Chadd 5088eb6f0de0SAdrian Chadd /* 5089eb6f0de0SAdrian Chadd * Handle completion of unaggregated frames in an ADDBA 5090eb6f0de0SAdrian Chadd * session. 5091eb6f0de0SAdrian Chadd * 5092eb6f0de0SAdrian Chadd * Fail is set to 1 if the entry is being freed via a call to 5093eb6f0de0SAdrian Chadd * ath_tx_draintxq(). 5094eb6f0de0SAdrian Chadd */ 5095eb6f0de0SAdrian Chadd static void 5096eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail) 5097eb6f0de0SAdrian Chadd { 5098eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node; 5099eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5100eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid; 5101eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 51020aa5c1bbSAdrian Chadd struct ath_tx_status ts; 5103f1bc738eSAdrian Chadd int drops = 0; 5104eb6f0de0SAdrian Chadd 5105eb6f0de0SAdrian Chadd /* 51060aa5c1bbSAdrian Chadd * Take a copy of this; filtering/cloning the frame may free the 51070aa5c1bbSAdrian Chadd * bf pointer. 51080aa5c1bbSAdrian Chadd */ 51090aa5c1bbSAdrian Chadd ts = bf->bf_status.ds_txstat; 51100aa5c1bbSAdrian Chadd 51110aa5c1bbSAdrian Chadd /* 5112eb6f0de0SAdrian Chadd * Update rate control status here, before we possibly 5113eb6f0de0SAdrian Chadd * punt to retry or cleanup. 5114eb6f0de0SAdrian Chadd * 5115eb6f0de0SAdrian Chadd * Do it outside of the TXQ lock. 5116eb6f0de0SAdrian Chadd */ 5117875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 5118eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 5119eb6f0de0SAdrian Chadd &bf->bf_status.ds_txstat, 5120eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen, 51210aa5c1bbSAdrian Chadd 1, (ts.ts_status == 0) ? 0 : 1); 5122eb6f0de0SAdrian Chadd 5123eb6f0de0SAdrian Chadd /* 5124eb6f0de0SAdrian Chadd * This is called early so atid->hwq_depth can be tracked. 5125eb6f0de0SAdrian Chadd * This unfortunately means that it's released and regrabbed 5126eb6f0de0SAdrian Chadd * during retry and cleanup. That's rather inefficient. 5127eb6f0de0SAdrian Chadd */ 5128375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5129eb6f0de0SAdrian Chadd 5130eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 513183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__); 5132eb6f0de0SAdrian Chadd 5133d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, 5134d4365d16SAdrian Chadd "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n", 5135d4365d16SAdrian Chadd __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth, 5136d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)); 5137eb6f0de0SAdrian Chadd 5138eb6f0de0SAdrian Chadd atid->hwq_depth--; 5139eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0) 514083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 5141eb6f0de0SAdrian Chadd __func__, atid->hwq_depth); 5142eb6f0de0SAdrian Chadd 5143eb6f0de0SAdrian Chadd /* 5144f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter 5145f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup 5146f1bc738eSAdrian Chadd * function. 5147f1bc738eSAdrian Chadd */ 5148f1bc738eSAdrian Chadd if (atid->isfiltered) 5149f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5150f1bc738eSAdrian Chadd 5151f1bc738eSAdrian Chadd /* 5152eb6f0de0SAdrian Chadd * If a cleanup is in progress, punt to comp_cleanup; 5153eb6f0de0SAdrian Chadd * rather than handling it here. It's thus their 5154eb6f0de0SAdrian Chadd * responsibility to clean up, call the completion 5155eb6f0de0SAdrian Chadd * function in net80211, etc. 5156eb6f0de0SAdrian Chadd */ 5157eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) { 5158f1bc738eSAdrian Chadd if (atid->isfiltered) 515983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5160f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n", 5161f1bc738eSAdrian Chadd __func__); 5162375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5163d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n", 5164d4365d16SAdrian Chadd __func__); 5165eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(sc, bf); 5166eb6f0de0SAdrian Chadd return; 5167eb6f0de0SAdrian Chadd } 5168eb6f0de0SAdrian Chadd 5169eb6f0de0SAdrian Chadd /* 5170f1bc738eSAdrian Chadd * XXX TODO: how does cleanup, BAR and filtered frame handling 5171f1bc738eSAdrian Chadd * overlap? 5172f1bc738eSAdrian Chadd * 5173f1bc738eSAdrian Chadd * If the frame is filtered OR if it's any failure but 5174f1bc738eSAdrian Chadd * the TID is filtered, the frame must be added to the 5175f1bc738eSAdrian Chadd * filtered frame list. 5176f1bc738eSAdrian Chadd * 5177f1bc738eSAdrian Chadd * However - a busy buffer can't be added to the filtered 5178f1bc738eSAdrian Chadd * list as it will end up being recycled without having 5179f1bc738eSAdrian Chadd * been made available for the hardware. 5180f1bc738eSAdrian Chadd */ 51810aa5c1bbSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) || 51820aa5c1bbSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) { 5183f1bc738eSAdrian Chadd int freeframe; 5184f1bc738eSAdrian Chadd 5185f1bc738eSAdrian Chadd if (fail != 0) 518683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5187f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", 518883bbd5ebSRui Paulo __func__, fail); 5189f1bc738eSAdrian Chadd freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf); 519042fdd8e7SAdrian Chadd /* 519142fdd8e7SAdrian Chadd * If freeframe=0 then bf is no longer ours; don't 519242fdd8e7SAdrian Chadd * touch it. 519342fdd8e7SAdrian Chadd */ 5194f1bc738eSAdrian Chadd if (freeframe) { 5195f1bc738eSAdrian Chadd /* Remove from BAW */ 5196f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw) 5197f1bc738eSAdrian Chadd drops++; 5198f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5199f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5200f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 520183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5202f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n", 5203f1bc738eSAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5204f1bc738eSAdrian Chadd } 5205f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5206f1bc738eSAdrian Chadd } 5207f1bc738eSAdrian Chadd 5208f1bc738eSAdrian Chadd /* 5209f1bc738eSAdrian Chadd * If the frame couldn't be filtered, treat it as a drop and 5210f1bc738eSAdrian Chadd * prepare to send a BAR. 5211f1bc738eSAdrian Chadd */ 5212f1bc738eSAdrian Chadd if (freeframe && drops) 5213f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid); 5214f1bc738eSAdrian Chadd 5215f1bc738eSAdrian Chadd /* 5216f1bc738eSAdrian Chadd * Send BAR if required 5217f1bc738eSAdrian Chadd */ 5218f1bc738eSAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 5219f1bc738eSAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 5220f1bc738eSAdrian Chadd 5221375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5222f1bc738eSAdrian Chadd /* 5223f1bc738eSAdrian Chadd * If freeframe is set, then the frame couldn't be 5224f1bc738eSAdrian Chadd * cloned and bf is still valid. Just complete/free it. 5225f1bc738eSAdrian Chadd */ 5226f1bc738eSAdrian Chadd if (freeframe) 5227f1bc738eSAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5228f1bc738eSAdrian Chadd 5229f1bc738eSAdrian Chadd return; 5230f1bc738eSAdrian Chadd } 5231f1bc738eSAdrian Chadd /* 5232eb6f0de0SAdrian Chadd * Don't bother with the retry check if all frames 5233eb6f0de0SAdrian Chadd * are being failed (eg during queue deletion.) 5234eb6f0de0SAdrian Chadd */ 5235e9a6408eSAdrian Chadd #if 0 5236eb6f0de0SAdrian Chadd if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) { 5237e9a6408eSAdrian Chadd #endif 52380aa5c1bbSAdrian Chadd if (fail == 0 && ts.ts_status != 0) { 5239375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5240d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n", 5241d4365d16SAdrian Chadd __func__); 5242eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(sc, bf); 5243eb6f0de0SAdrian Chadd return; 5244eb6f0de0SAdrian Chadd } 5245eb6f0de0SAdrian Chadd 5246eb6f0de0SAdrian Chadd /* Success? Complete */ 5247eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n", 5248eb6f0de0SAdrian Chadd __func__, tid, SEQNO(bf->bf_state.bfs_seqno)); 5249eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) { 5250eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf); 5251eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0; 5252eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw) 525383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 5254eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n", 5255eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno)); 5256eb6f0de0SAdrian Chadd } 5257eb6f0de0SAdrian Chadd 525888b3d483SAdrian Chadd /* 5259f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required. 5260f1bc738eSAdrian Chadd * 5261f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor 5262f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible 5263f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered 5264f1bc738eSAdrian Chadd * (complete or otherwise) frame. 5265f1bc738eSAdrian Chadd * 5266f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame? 5267f1bc738eSAdrian Chadd */ 5268f1bc738eSAdrian Chadd if (atid->isfiltered) 5269f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid); 5270f1bc738eSAdrian Chadd 5271f1bc738eSAdrian Chadd /* 527288b3d483SAdrian Chadd * Send BAR if required 527388b3d483SAdrian Chadd */ 527488b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid)) 527588b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid); 527688b3d483SAdrian Chadd 5277375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5278eb6f0de0SAdrian Chadd 5279eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail); 5280eb6f0de0SAdrian Chadd /* bf is freed at this point */ 5281eb6f0de0SAdrian Chadd } 5282eb6f0de0SAdrian Chadd 5283eb6f0de0SAdrian Chadd void 5284eb6f0de0SAdrian Chadd ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 5285eb6f0de0SAdrian Chadd { 5286eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_aggr) 5287eb6f0de0SAdrian Chadd ath_tx_aggr_comp_aggr(sc, bf, fail); 5288eb6f0de0SAdrian Chadd else 5289eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(sc, bf, fail); 5290eb6f0de0SAdrian Chadd } 5291eb6f0de0SAdrian Chadd 5292eb6f0de0SAdrian Chadd /* 5293eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 5294eb6f0de0SAdrian Chadd * 5295eb6f0de0SAdrian Chadd * This is the aggregate version. 5296eb6f0de0SAdrian Chadd */ 5297eb6f0de0SAdrian Chadd void 5298eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an, 5299eb6f0de0SAdrian Chadd struct ath_tid *tid) 5300eb6f0de0SAdrian Chadd { 5301eb6f0de0SAdrian Chadd struct ath_buf *bf; 5302eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5303eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5304eb6f0de0SAdrian Chadd ATH_AGGR_STATUS status; 5305eb6f0de0SAdrian Chadd ath_bufhead bf_q; 5306eb6f0de0SAdrian Chadd 5307eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid); 5308375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5309eb6f0de0SAdrian Chadd 531022a3aee6SAdrian Chadd /* 531122a3aee6SAdrian Chadd * XXX TODO: If we're called for a queue that we're leaking frames to, 531222a3aee6SAdrian Chadd * ensure we only leak one. 531322a3aee6SAdrian Chadd */ 531422a3aee6SAdrian Chadd 5315eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid); 5316eb6f0de0SAdrian Chadd 5317eb6f0de0SAdrian Chadd if (tid->tid == IEEE80211_NONQOS_TID) 531883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 531983bbd5ebSRui Paulo "%s: called for TID=NONQOS_TID?\n", __func__); 5320eb6f0de0SAdrian Chadd 5321eb6f0de0SAdrian Chadd for (;;) { 5322eb6f0de0SAdrian Chadd status = ATH_AGGR_DONE; 5323eb6f0de0SAdrian Chadd 5324eb6f0de0SAdrian Chadd /* 5325eb6f0de0SAdrian Chadd * If the upper layer has paused the TID, don't 5326eb6f0de0SAdrian Chadd * queue any further packets. 5327eb6f0de0SAdrian Chadd * 5328eb6f0de0SAdrian Chadd * This can also occur from the completion task because 5329eb6f0de0SAdrian Chadd * of packet loss; but as its serialised with this code, 5330eb6f0de0SAdrian Chadd * it won't "appear" half way through queuing packets. 5331eb6f0de0SAdrian Chadd */ 533222a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5333eb6f0de0SAdrian Chadd break; 5334eb6f0de0SAdrian Chadd 53353e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5336eb6f0de0SAdrian Chadd if (bf == NULL) { 5337eb6f0de0SAdrian Chadd break; 5338eb6f0de0SAdrian Chadd } 5339eb6f0de0SAdrian Chadd 5340eb6f0de0SAdrian Chadd /* 5341eb6f0de0SAdrian Chadd * If the packet doesn't fall within the BAW (eg a NULL 5342eb6f0de0SAdrian Chadd * data frame), schedule it directly; continue. 5343eb6f0de0SAdrian Chadd */ 5344eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_dobaw) { 5345d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5346d4365d16SAdrian Chadd "%s: non-baw packet\n", 5347eb6f0de0SAdrian Chadd __func__); 53483e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 53492a9f83afSAdrian Chadd 53502a9f83afSAdrian Chadd if (bf->bf_state.bfs_nframes > 1) 535183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, 53522a9f83afSAdrian Chadd "%s: aggr=%d, nframes=%d\n", 53532a9f83afSAdrian Chadd __func__, 53542a9f83afSAdrian Chadd bf->bf_state.bfs_aggr, 53552a9f83afSAdrian Chadd bf->bf_state.bfs_nframes); 53562a9f83afSAdrian Chadd 53572a9f83afSAdrian Chadd /* 53582a9f83afSAdrian Chadd * This shouldn't happen - such frames shouldn't 53592a9f83afSAdrian Chadd * ever have been queued as an aggregate in the 53602a9f83afSAdrian Chadd * first place. However, make sure the fields 53612a9f83afSAdrian Chadd * are correctly setup just to be totally sure. 53622a9f83afSAdrian Chadd */ 5363eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 53642a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1; 53652a9f83afSAdrian Chadd 53664e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 53674e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 53684e81f27cSAdrian Chadd 5369eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5370e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5371e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5372eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5373e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5374eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5375eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5376eb6f0de0SAdrian Chadd 5377eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_nonbaw_pkt++; 5378eb6f0de0SAdrian Chadd 5379eb6f0de0SAdrian Chadd /* Queue the packet; continue */ 5380eb6f0de0SAdrian Chadd goto queuepkt; 5381eb6f0de0SAdrian Chadd } 5382eb6f0de0SAdrian Chadd 5383eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q); 5384eb6f0de0SAdrian Chadd 5385eb6f0de0SAdrian Chadd /* 5386eb6f0de0SAdrian Chadd * Do a rate control lookup on the first frame in the 5387eb6f0de0SAdrian Chadd * list. The rate control code needs that to occur 5388eb6f0de0SAdrian Chadd * before it can determine whether to TX. 5389eb6f0de0SAdrian Chadd * It's inaccurate because the rate control code doesn't 5390eb6f0de0SAdrian Chadd * really "do" aggregate lookups, so it only considers 5391eb6f0de0SAdrian Chadd * the size of the first frame. 5392eb6f0de0SAdrian Chadd */ 5393eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5394eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = 0; 5395eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = 0; 5396e2e4a2c2SAdrian Chadd 5397e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5398e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5399e2e4a2c2SAdrian Chadd 5400e2e4a2c2SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5401eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5402eb6f0de0SAdrian Chadd 5403eb6f0de0SAdrian Chadd status = ath_tx_form_aggr(sc, an, tid, &bf_q); 5404eb6f0de0SAdrian Chadd 5405eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5406eb6f0de0SAdrian Chadd "%s: ath_tx_form_aggr() status=%d\n", __func__, status); 5407eb6f0de0SAdrian Chadd 5408eb6f0de0SAdrian Chadd /* 5409eb6f0de0SAdrian Chadd * No frames to be picked up - out of BAW 5410eb6f0de0SAdrian Chadd */ 5411eb6f0de0SAdrian Chadd if (TAILQ_EMPTY(&bf_q)) 5412eb6f0de0SAdrian Chadd break; 5413eb6f0de0SAdrian Chadd 5414eb6f0de0SAdrian Chadd /* 5415eb6f0de0SAdrian Chadd * This assumes that the descriptor list in the ath_bufhead 5416eb6f0de0SAdrian Chadd * are already linked together via bf_next pointers. 5417eb6f0de0SAdrian Chadd */ 5418eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&bf_q); 5419eb6f0de0SAdrian Chadd 5420e2e4a2c2SAdrian Chadd if (status == ATH_AGGR_8K_LIMITED) 5421e2e4a2c2SAdrian Chadd sc->sc_aggr_stats.aggr_rts_aggr_limited++; 5422e2e4a2c2SAdrian Chadd 5423eb6f0de0SAdrian Chadd /* 5424eb6f0de0SAdrian Chadd * If it's the only frame send as non-aggregate 5425eb6f0de0SAdrian Chadd * assume that ath_tx_form_aggr() has checked 5426eb6f0de0SAdrian Chadd * whether it's in the BAW and added it appropriately. 5427eb6f0de0SAdrian Chadd */ 5428eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_nframes == 1) { 5429eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5430eb6f0de0SAdrian Chadd "%s: single-frame aggregate\n", __func__); 54314e81f27cSAdrian Chadd 54324e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 54334e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 54344e81f27cSAdrian Chadd 5435eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0; 543621840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; 5437eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5438eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5439eb6f0de0SAdrian Chadd if (status == ATH_AGGR_BAW_CLOSED) 5440eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_baw_closed_single_pkt++; 5441eb6f0de0SAdrian Chadd else 5442eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_single_pkt++; 5443eb6f0de0SAdrian Chadd } else { 5444eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5445d4365d16SAdrian Chadd "%s: multi-frame aggregate: %d frames, " 5446d4365d16SAdrian Chadd "length %d\n", 5447eb6f0de0SAdrian Chadd __func__, bf->bf_state.bfs_nframes, 5448eb6f0de0SAdrian Chadd bf->bf_state.bfs_al); 5449eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 1; 5450eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++; 5451eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_aggr_pkt++; 5452eb6f0de0SAdrian Chadd 54534e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 54544e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 54554e81f27cSAdrian Chadd 5456eb6f0de0SAdrian Chadd /* 5457e2e4a2c2SAdrian Chadd * Calculate the duration/protection as required. 5458e2e4a2c2SAdrian Chadd */ 5459e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5460e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5461e2e4a2c2SAdrian Chadd 5462e2e4a2c2SAdrian Chadd /* 5463eb6f0de0SAdrian Chadd * Update the rate and rtscts information based on the 5464eb6f0de0SAdrian Chadd * rate decision made by the rate control code; 5465eb6f0de0SAdrian Chadd * the first frame in the aggregate needs it. 5466eb6f0de0SAdrian Chadd */ 5467eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5468eb6f0de0SAdrian Chadd 5469eb6f0de0SAdrian Chadd /* 5470eb6f0de0SAdrian Chadd * Setup the relevant descriptor fields 5471eb6f0de0SAdrian Chadd * for aggregation. The first descriptor 5472eb6f0de0SAdrian Chadd * already points to the rest in the chain. 5473eb6f0de0SAdrian Chadd */ 5474eb6f0de0SAdrian Chadd ath_tx_setds_11n(sc, bf); 5475eb6f0de0SAdrian Chadd 5476eb6f0de0SAdrian Chadd } 5477eb6f0de0SAdrian Chadd queuepkt: 5478eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */ 5479eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp; 5480eb6f0de0SAdrian Chadd 5481eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 548283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__); 5483eb6f0de0SAdrian Chadd 548422a3aee6SAdrian Chadd /* 548522a3aee6SAdrian Chadd * Update leak count and frame config if were leaking frames. 548622a3aee6SAdrian Chadd * 548722a3aee6SAdrian Chadd * XXX TODO: it should update all frames in an aggregate 548822a3aee6SAdrian Chadd * correctly! 548922a3aee6SAdrian Chadd */ 549022a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 549122a3aee6SAdrian Chadd 5492eb6f0de0SAdrian Chadd /* Punt to txq */ 5493eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5494eb6f0de0SAdrian Chadd 5495eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5496eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5497eb6f0de0SAdrian Chadd tid->hwq_depth++; 5498eb6f0de0SAdrian Chadd 5499eb6f0de0SAdrian Chadd /* 5500eb6f0de0SAdrian Chadd * Break out if ath_tx_form_aggr() indicated 5501eb6f0de0SAdrian Chadd * there can't be any further progress (eg BAW is full.) 5502eb6f0de0SAdrian Chadd * Checking for an empty txq is done above. 5503eb6f0de0SAdrian Chadd * 5504eb6f0de0SAdrian Chadd * XXX locking on txq here? 5505eb6f0de0SAdrian Chadd */ 550672910f03SAdrian Chadd /* XXX TXQ locking */ 550772910f03SAdrian Chadd if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr || 550822a3aee6SAdrian Chadd (status == ATH_AGGR_BAW_CLOSED || 550922a3aee6SAdrian Chadd status == ATH_AGGR_LEAK_CLOSED)) 5510eb6f0de0SAdrian Chadd break; 5511eb6f0de0SAdrian Chadd } 5512eb6f0de0SAdrian Chadd } 5513eb6f0de0SAdrian Chadd 5514eb6f0de0SAdrian Chadd /* 5515eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware. 551672910f03SAdrian Chadd * 551772910f03SAdrian Chadd * XXX TODO: this routine doesn't enforce the maximum TXQ depth. 551872910f03SAdrian Chadd * It just dumps frames into the TXQ. We should limit how deep 551972910f03SAdrian Chadd * the transmit queue can grow for frames dispatched to the given 552072910f03SAdrian Chadd * TXQ. 552172910f03SAdrian Chadd * 552272910f03SAdrian Chadd * To avoid locking issues, either we need to own the TXQ lock 552372910f03SAdrian Chadd * at this point, or we need to pass in the maximum frame count 552472910f03SAdrian Chadd * from the caller. 5525eb6f0de0SAdrian Chadd */ 5526eb6f0de0SAdrian Chadd void 5527eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an, 5528eb6f0de0SAdrian Chadd struct ath_tid *tid) 5529eb6f0de0SAdrian Chadd { 5530eb6f0de0SAdrian Chadd struct ath_buf *bf; 5531eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5532eb6f0de0SAdrian Chadd 5533eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n", 5534eb6f0de0SAdrian Chadd __func__, an, tid->tid); 5535eb6f0de0SAdrian Chadd 5536375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5537eb6f0de0SAdrian Chadd 5538eb6f0de0SAdrian Chadd /* Check - is AMPDU pending or running? then print out something */ 5539eb6f0de0SAdrian Chadd if (ath_tx_ampdu_pending(sc, an, tid->tid)) 554083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n", 5541eb6f0de0SAdrian Chadd __func__, tid->tid); 5542eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid)) 554383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n", 5544eb6f0de0SAdrian Chadd __func__, tid->tid); 5545eb6f0de0SAdrian Chadd 5546eb6f0de0SAdrian Chadd for (;;) { 5547eb6f0de0SAdrian Chadd 5548eb6f0de0SAdrian Chadd /* 5549eb6f0de0SAdrian Chadd * If the upper layers have paused the TID, don't 5550eb6f0de0SAdrian Chadd * queue any further packets. 555122a3aee6SAdrian Chadd * 555222a3aee6SAdrian Chadd * XXX if we are leaking frames, make sure we decrement 555322a3aee6SAdrian Chadd * that counter _and_ we continue here. 5554eb6f0de0SAdrian Chadd */ 555522a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5556eb6f0de0SAdrian Chadd break; 5557eb6f0de0SAdrian Chadd 55583e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid); 5559eb6f0de0SAdrian Chadd if (bf == NULL) { 5560eb6f0de0SAdrian Chadd break; 5561eb6f0de0SAdrian Chadd } 5562eb6f0de0SAdrian Chadd 55633e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list); 5564eb6f0de0SAdrian Chadd 5565eb6f0de0SAdrian Chadd /* Sanity check! */ 5566eb6f0de0SAdrian Chadd if (tid->tid != bf->bf_state.bfs_tid) { 556783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !=" 556883bbd5ebSRui Paulo " tid %d\n", __func__, bf->bf_state.bfs_tid, 556983bbd5ebSRui Paulo tid->tid); 5570eb6f0de0SAdrian Chadd } 5571eb6f0de0SAdrian Chadd /* Normal completion handler */ 5572eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_normal_comp; 5573eb6f0de0SAdrian Chadd 55740c54de88SAdrian Chadd /* 55750c54de88SAdrian Chadd * Override this for now, until the non-aggregate 55760c54de88SAdrian Chadd * completion handler correctly handles software retransmits. 55770c54de88SAdrian Chadd */ 55780c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 55790c54de88SAdrian Chadd 55804e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */ 55814e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf); 55824e81f27cSAdrian Chadd 5583eb6f0de0SAdrian Chadd /* Program descriptors + rate control */ 5584eb6f0de0SAdrian Chadd ath_tx_do_ratelookup(sc, bf); 5585e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf); 5586e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf); 5587eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf); 5588e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf); 5589eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf); 5590eb6f0de0SAdrian Chadd 559122a3aee6SAdrian Chadd /* 559222a3aee6SAdrian Chadd * Update the current leak count if 559322a3aee6SAdrian Chadd * we're leaking frames; and set the 559422a3aee6SAdrian Chadd * MORE flag as appropriate. 559522a3aee6SAdrian Chadd */ 559622a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf); 559722a3aee6SAdrian Chadd 5598eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */ 5599eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */ 5600eb6f0de0SAdrian Chadd tid->hwq_depth++; 5601eb6f0de0SAdrian Chadd 5602eb6f0de0SAdrian Chadd /* Punt to hardware or software txq */ 5603eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf); 5604eb6f0de0SAdrian Chadd } 5605eb6f0de0SAdrian Chadd } 5606eb6f0de0SAdrian Chadd 5607eb6f0de0SAdrian Chadd /* 5608eb6f0de0SAdrian Chadd * Schedule some packets to the given hardware queue. 5609eb6f0de0SAdrian Chadd * 5610eb6f0de0SAdrian Chadd * This function walks the list of TIDs (ie, ath_node TIDs 5611eb6f0de0SAdrian Chadd * with queued traffic) and attempts to schedule traffic 5612eb6f0de0SAdrian Chadd * from them. 5613eb6f0de0SAdrian Chadd * 5614eb6f0de0SAdrian Chadd * TID scheduling is implemented as a FIFO, with TIDs being 5615eb6f0de0SAdrian Chadd * added to the end of the queue after some frames have been 5616eb6f0de0SAdrian Chadd * scheduled. 5617eb6f0de0SAdrian Chadd */ 5618eb6f0de0SAdrian Chadd void 5619eb6f0de0SAdrian Chadd ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq) 5620eb6f0de0SAdrian Chadd { 5621eb6f0de0SAdrian Chadd struct ath_tid *tid, *next, *last; 5622eb6f0de0SAdrian Chadd 5623375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 5624eb6f0de0SAdrian Chadd 5625eb6f0de0SAdrian Chadd /* 5626eb6f0de0SAdrian Chadd * Don't schedule if the hardware queue is busy. 5627eb6f0de0SAdrian Chadd * This (hopefully) gives some more time to aggregate 5628eb6f0de0SAdrian Chadd * some packets in the aggregation queue. 562972910f03SAdrian Chadd * 563072910f03SAdrian Chadd * XXX It doesn't stop a parallel sender from sneaking 563172910f03SAdrian Chadd * in transmitting a frame! 5632eb6f0de0SAdrian Chadd */ 563372910f03SAdrian Chadd /* XXX TXQ locking */ 563472910f03SAdrian Chadd if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 563572910f03SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++; 563672910f03SAdrian Chadd return; 563772910f03SAdrian Chadd } 563872910f03SAdrian Chadd if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5639eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++; 5640eb6f0de0SAdrian Chadd return; 5641eb6f0de0SAdrian Chadd } 5642eb6f0de0SAdrian Chadd 5643eb6f0de0SAdrian Chadd last = TAILQ_LAST(&txq->axq_tidq, axq_t_s); 5644eb6f0de0SAdrian Chadd 5645eb6f0de0SAdrian Chadd TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) { 5646eb6f0de0SAdrian Chadd /* 5647eb6f0de0SAdrian Chadd * Suspend paused queues here; they'll be resumed 5648eb6f0de0SAdrian Chadd * once the addba completes or times out. 5649eb6f0de0SAdrian Chadd */ 5650eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n", 5651eb6f0de0SAdrian Chadd __func__, tid->tid, tid->paused); 5652eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid); 565322a3aee6SAdrian Chadd /* 565422a3aee6SAdrian Chadd * This node may be in power-save and we're leaking 565522a3aee6SAdrian Chadd * a frame; be careful. 565622a3aee6SAdrian Chadd */ 565722a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 56588ec9220eSAdrian Chadd goto loop_done; 5659eb6f0de0SAdrian Chadd } 5660eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, tid->an, tid->tid)) 5661eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(sc, tid->an, tid); 5662eb6f0de0SAdrian Chadd else 5663eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(sc, tid->an, tid); 5664eb6f0de0SAdrian Chadd 5665eb6f0de0SAdrian Chadd /* Not empty? Re-schedule */ 5666eb6f0de0SAdrian Chadd if (tid->axq_depth != 0) 5667eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid); 5668eb6f0de0SAdrian Chadd 5669b45a991eSAdrian Chadd /* 5670b45a991eSAdrian Chadd * Give the software queue time to aggregate more 5671b45a991eSAdrian Chadd * packets. If we aren't running aggregation then 5672b45a991eSAdrian Chadd * we should still limit the hardware queue depth. 5673b45a991eSAdrian Chadd */ 567472910f03SAdrian Chadd /* XXX TXQ locking */ 567572910f03SAdrian Chadd if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 567672910f03SAdrian Chadd break; 567772910f03SAdrian Chadd } 567872910f03SAdrian Chadd if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5679eb6f0de0SAdrian Chadd break; 5680eb6f0de0SAdrian Chadd } 56818ec9220eSAdrian Chadd loop_done: 5682eb6f0de0SAdrian Chadd /* 5683eb6f0de0SAdrian Chadd * If this was the last entry on the original list, stop. 5684eb6f0de0SAdrian Chadd * Otherwise nodes that have been rescheduled onto the end 5685eb6f0de0SAdrian Chadd * of the TID FIFO list will just keep being rescheduled. 568622a3aee6SAdrian Chadd * 568722a3aee6SAdrian Chadd * XXX What should we do about nodes that were paused 568822a3aee6SAdrian Chadd * but are pending a leaking frame in response to a ps-poll? 568922a3aee6SAdrian Chadd * They'll be put at the front of the list; so they'll 569022a3aee6SAdrian Chadd * prematurely trigger this condition! Ew. 5691eb6f0de0SAdrian Chadd */ 5692eb6f0de0SAdrian Chadd if (tid == last) 5693eb6f0de0SAdrian Chadd break; 5694eb6f0de0SAdrian Chadd } 5695eb6f0de0SAdrian Chadd } 5696eb6f0de0SAdrian Chadd 5697eb6f0de0SAdrian Chadd /* 5698eb6f0de0SAdrian Chadd * TX addba handling 5699eb6f0de0SAdrian Chadd */ 5700eb6f0de0SAdrian Chadd 5701eb6f0de0SAdrian Chadd /* 5702eb6f0de0SAdrian Chadd * Return net80211 TID struct pointer, or NULL for none 5703eb6f0de0SAdrian Chadd */ 5704eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu * 5705eb6f0de0SAdrian Chadd ath_tx_get_tx_tid(struct ath_node *an, int tid) 5706eb6f0de0SAdrian Chadd { 5707eb6f0de0SAdrian Chadd struct ieee80211_node *ni = &an->an_node; 5708eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5709eb6f0de0SAdrian Chadd 5710eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5711eb6f0de0SAdrian Chadd return NULL; 5712eb6f0de0SAdrian Chadd 57132aa563dfSAdrian Chadd tap = &ni->ni_tx_ampdu[tid]; 5714eb6f0de0SAdrian Chadd return tap; 5715eb6f0de0SAdrian Chadd } 5716eb6f0de0SAdrian Chadd 5717eb6f0de0SAdrian Chadd /* 5718eb6f0de0SAdrian Chadd * Is AMPDU-TX running? 5719eb6f0de0SAdrian Chadd */ 5720eb6f0de0SAdrian Chadd static int 5721eb6f0de0SAdrian Chadd ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid) 5722eb6f0de0SAdrian Chadd { 5723eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5724eb6f0de0SAdrian Chadd 5725eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5726eb6f0de0SAdrian Chadd return 0; 5727eb6f0de0SAdrian Chadd 5728eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5729eb6f0de0SAdrian Chadd if (tap == NULL) 5730eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not running */ 5731eb6f0de0SAdrian Chadd 5732eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING); 5733eb6f0de0SAdrian Chadd } 5734eb6f0de0SAdrian Chadd 5735eb6f0de0SAdrian Chadd /* 5736eb6f0de0SAdrian Chadd * Is AMPDU-TX negotiation pending? 5737eb6f0de0SAdrian Chadd */ 5738eb6f0de0SAdrian Chadd static int 5739eb6f0de0SAdrian Chadd ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid) 5740eb6f0de0SAdrian Chadd { 5741eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap; 5742eb6f0de0SAdrian Chadd 5743eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID) 5744eb6f0de0SAdrian Chadd return 0; 5745eb6f0de0SAdrian Chadd 5746eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid); 5747eb6f0de0SAdrian Chadd if (tap == NULL) 5748eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not pending */ 5749eb6f0de0SAdrian Chadd 5750eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND); 5751eb6f0de0SAdrian Chadd } 5752eb6f0de0SAdrian Chadd 5753eb6f0de0SAdrian Chadd /* 5754eb6f0de0SAdrian Chadd * Is AMPDU-TX pending for the given TID? 5755eb6f0de0SAdrian Chadd */ 5756eb6f0de0SAdrian Chadd 5757eb6f0de0SAdrian Chadd 5758eb6f0de0SAdrian Chadd /* 5759eb6f0de0SAdrian Chadd * Method to handle sending an ADDBA request. 5760eb6f0de0SAdrian Chadd * 5761eb6f0de0SAdrian Chadd * We tap this so the relevant flags can be set to pause the TID 5762eb6f0de0SAdrian Chadd * whilst waiting for the response. 5763eb6f0de0SAdrian Chadd * 5764eb6f0de0SAdrian Chadd * XXX there's no timeout handler we can override? 5765eb6f0de0SAdrian Chadd */ 5766eb6f0de0SAdrian Chadd int 5767eb6f0de0SAdrian Chadd ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5768eb6f0de0SAdrian Chadd int dialogtoken, int baparamset, int batimeout) 5769eb6f0de0SAdrian Chadd { 57703797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 57712aa563dfSAdrian Chadd int tid = tap->txa_tid; 5772eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5773eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5774eb6f0de0SAdrian Chadd 5775eb6f0de0SAdrian Chadd /* 5776eb6f0de0SAdrian Chadd * XXX danger Will Robinson! 5777eb6f0de0SAdrian Chadd * 5778eb6f0de0SAdrian Chadd * Although the taskqueue may be running and scheduling some more 5779eb6f0de0SAdrian Chadd * packets, these should all be _before_ the addba sequence number. 5780eb6f0de0SAdrian Chadd * However, net80211 will keep self-assigning sequence numbers 5781eb6f0de0SAdrian Chadd * until addba has been negotiated. 5782eb6f0de0SAdrian Chadd * 5783eb6f0de0SAdrian Chadd * In the past, these packets would be "paused" (which still works 5784eb6f0de0SAdrian Chadd * fine, as they're being scheduled to the driver in the same 5785eb6f0de0SAdrian Chadd * serialised method which is calling the addba request routine) 5786eb6f0de0SAdrian Chadd * and when the aggregation session begins, they'll be dequeued 5787eb6f0de0SAdrian Chadd * as aggregate packets and added to the BAW. However, now there's 5788eb6f0de0SAdrian Chadd * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these 5789eb6f0de0SAdrian Chadd * packets. Thus they never get included in the BAW tracking and 5790eb6f0de0SAdrian Chadd * this can cause the initial burst of packets after the addba 5791eb6f0de0SAdrian Chadd * negotiation to "hang", as they quickly fall outside the BAW. 5792eb6f0de0SAdrian Chadd * 5793eb6f0de0SAdrian Chadd * The "eventual" solution should be to tag these packets with 5794eb6f0de0SAdrian Chadd * dobaw. Although net80211 has given us a sequence number, 5795eb6f0de0SAdrian Chadd * it'll be "after" the left edge of the BAW and thus it'll 5796eb6f0de0SAdrian Chadd * fall within it. 5797eb6f0de0SAdrian Chadd */ 5798375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5799d3a6425bSAdrian Chadd /* 5800d3a6425bSAdrian Chadd * This is a bit annoying. Until net80211 HT code inherits some 5801d3a6425bSAdrian Chadd * (any) locking, we may have this called in parallel BUT only 5802d3a6425bSAdrian Chadd * one response/timeout will be called. Grr. 5803d3a6425bSAdrian Chadd */ 5804d3a6425bSAdrian Chadd if (atid->addba_tx_pending == 0) { 5805eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 5806d3a6425bSAdrian Chadd atid->addba_tx_pending = 1; 5807d3a6425bSAdrian Chadd } 5808375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5809eb6f0de0SAdrian Chadd 5810eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 58119b48fb4bSAdrian Chadd "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n", 58129b48fb4bSAdrian Chadd __func__, 58139b48fb4bSAdrian Chadd ni->ni_macaddr, 58149b48fb4bSAdrian Chadd ":", 58159b48fb4bSAdrian Chadd dialogtoken, baparamset, batimeout); 5816eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5817eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5818eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5819eb6f0de0SAdrian Chadd 5820eb6f0de0SAdrian Chadd return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, 5821eb6f0de0SAdrian Chadd batimeout); 5822eb6f0de0SAdrian Chadd } 5823eb6f0de0SAdrian Chadd 5824eb6f0de0SAdrian Chadd /* 5825eb6f0de0SAdrian Chadd * Handle an ADDBA response. 5826eb6f0de0SAdrian Chadd * 5827eb6f0de0SAdrian Chadd * We unpause the queue so TX'ing can resume. 5828eb6f0de0SAdrian Chadd * 5829eb6f0de0SAdrian Chadd * Any packets TX'ed from this point should be "aggregate" (whether 5830eb6f0de0SAdrian Chadd * aggregate or not) so the BAW is updated. 5831eb6f0de0SAdrian Chadd * 5832eb6f0de0SAdrian Chadd * Note! net80211 keeps self-assigning sequence numbers until 5833eb6f0de0SAdrian Chadd * ampdu is negotiated. This means the initially-negotiated BAW left 5834eb6f0de0SAdrian Chadd * edge won't match the ni->ni_txseq. 5835eb6f0de0SAdrian Chadd * 5836eb6f0de0SAdrian Chadd * So, being very dirty, the BAW left edge is "slid" here to match 5837eb6f0de0SAdrian Chadd * ni->ni_txseq. 5838eb6f0de0SAdrian Chadd * 5839eb6f0de0SAdrian Chadd * What likely SHOULD happen is that all packets subsequent to the 5840eb6f0de0SAdrian Chadd * addba request should be tagged as aggregate and queued as non-aggregate 5841eb6f0de0SAdrian Chadd * frames; thus updating the BAW. For now though, I'll just slide the 5842eb6f0de0SAdrian Chadd * window. 5843eb6f0de0SAdrian Chadd */ 5844eb6f0de0SAdrian Chadd int 5845eb6f0de0SAdrian Chadd ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5846eb6f0de0SAdrian Chadd int status, int code, int batimeout) 5847eb6f0de0SAdrian Chadd { 58483797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 58492aa563dfSAdrian Chadd int tid = tap->txa_tid; 5850eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5851eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 5852eb6f0de0SAdrian Chadd int r; 5853eb6f0de0SAdrian Chadd 5854eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 58559b48fb4bSAdrian Chadd "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__, 58569b48fb4bSAdrian Chadd ni->ni_macaddr, 58579b48fb4bSAdrian Chadd ":", 5858eb6f0de0SAdrian Chadd status, code, batimeout); 5859eb6f0de0SAdrian Chadd 5860eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5861eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n", 5862eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]); 5863eb6f0de0SAdrian Chadd 5864eb6f0de0SAdrian Chadd /* 5865eb6f0de0SAdrian Chadd * Call this first, so the interface flags get updated 5866eb6f0de0SAdrian Chadd * before the TID is unpaused. Otherwise a race condition 5867eb6f0de0SAdrian Chadd * exists where the unpaused TID still doesn't yet have 5868eb6f0de0SAdrian Chadd * IEEE80211_AGGR_RUNNING set. 5869eb6f0de0SAdrian Chadd */ 5870eb6f0de0SAdrian Chadd r = sc->sc_addba_response(ni, tap, status, code, batimeout); 5871eb6f0de0SAdrian Chadd 5872375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5873d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 5874eb6f0de0SAdrian Chadd /* 5875eb6f0de0SAdrian Chadd * XXX dirty! 5876eb6f0de0SAdrian Chadd * Slide the BAW left edge to wherever net80211 left it for us. 5877eb6f0de0SAdrian Chadd * Read above for more information. 5878eb6f0de0SAdrian Chadd */ 5879eb6f0de0SAdrian Chadd tap->txa_start = ni->ni_txseqs[tid]; 5880eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 5881375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5882eb6f0de0SAdrian Chadd return r; 5883eb6f0de0SAdrian Chadd } 5884eb6f0de0SAdrian Chadd 5885eb6f0de0SAdrian Chadd 5886eb6f0de0SAdrian Chadd /* 5887eb6f0de0SAdrian Chadd * Stop ADDBA on a queue. 58888405fe86SAdrian Chadd * 58898405fe86SAdrian Chadd * This can be called whilst BAR TX is currently active on the queue, 58908405fe86SAdrian Chadd * so make sure this is unblocked before continuing. 5891eb6f0de0SAdrian Chadd */ 5892eb6f0de0SAdrian Chadd void 5893eb6f0de0SAdrian Chadd ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 5894eb6f0de0SAdrian Chadd { 58953797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 58962aa563dfSAdrian Chadd int tid = tap->txa_tid; 5897eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 5898eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 589922780332SAdrian Chadd ath_bufhead bf_cq; 590022780332SAdrian Chadd struct ath_buf *bf; 5901eb6f0de0SAdrian Chadd 59029b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n", 59039b48fb4bSAdrian Chadd __func__, 59049b48fb4bSAdrian Chadd ni->ni_macaddr, 59059b48fb4bSAdrian Chadd ":"); 5906eb6f0de0SAdrian Chadd 59078405fe86SAdrian Chadd /* 59088405fe86SAdrian Chadd * Pause TID traffic early, so there aren't any races 59098405fe86SAdrian Chadd * Unblock the pending BAR held traffic, if it's currently paused. 59108405fe86SAdrian Chadd */ 5911375307d4SAdrian Chadd ATH_TX_LOCK(sc); 5912eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid); 59138405fe86SAdrian Chadd if (atid->bar_wait) { 59148405fe86SAdrian Chadd /* 59158405fe86SAdrian Chadd * bar_unsuspend() expects bar_tx == 1, as it should be 59168405fe86SAdrian Chadd * called from the TX completion path. This quietens 59178405fe86SAdrian Chadd * the warning. It's cleared for us anyway. 59188405fe86SAdrian Chadd */ 59198405fe86SAdrian Chadd atid->bar_tx = 1; 59208405fe86SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 59218405fe86SAdrian Chadd } 5922375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 5923eb6f0de0SAdrian Chadd 5924eb6f0de0SAdrian Chadd /* There's no need to hold the TXQ lock here */ 5925eb6f0de0SAdrian Chadd sc->sc_addba_stop(ni, tap); 5926eb6f0de0SAdrian Chadd 5927eb6f0de0SAdrian Chadd /* 59284dfd4507SAdrian Chadd * ath_tx_tid_cleanup will resume the TID if possible, otherwise 5929eb6f0de0SAdrian Chadd * it'll set the cleanup flag, and it'll be unpaused once 5930eb6f0de0SAdrian Chadd * things have been cleaned up. 5931eb6f0de0SAdrian Chadd */ 593222780332SAdrian Chadd TAILQ_INIT(&bf_cq); 593322780332SAdrian Chadd ATH_TX_LOCK(sc); 593459fbb530SAdrian Chadd 593559fbb530SAdrian Chadd /* 593659fbb530SAdrian Chadd * In case there's a followup call to this, only call it 593759fbb530SAdrian Chadd * if we don't have a cleanup in progress. 593859fbb530SAdrian Chadd * 593959fbb530SAdrian Chadd * Since we've paused the queue above, we need to make 594059fbb530SAdrian Chadd * sure we unpause if there's already a cleanup in 594159fbb530SAdrian Chadd * progress - it means something else is also doing 594259fbb530SAdrian Chadd * this stuff, so we don't need to also keep it paused. 594359fbb530SAdrian Chadd */ 594459fbb530SAdrian Chadd if (atid->cleanup_inprogress) { 594559fbb530SAdrian Chadd ath_tx_tid_resume(sc, atid); 594659fbb530SAdrian Chadd } else { 594722780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, tid, &bf_cq); 59485da3fc10SAdrian Chadd /* 59495da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required. 59505da3fc10SAdrian Chadd */ 59515da3fc10SAdrian Chadd if (! atid->cleanup_inprogress) 59525da3fc10SAdrian Chadd ath_tx_tid_resume(sc, atid); 595359fbb530SAdrian Chadd } 595422780332SAdrian Chadd ATH_TX_UNLOCK(sc); 595522780332SAdrian Chadd 595622780332SAdrian Chadd /* Handle completing frames and fail them */ 595722780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 595822780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 595922780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 596022780332SAdrian Chadd } 596122a3aee6SAdrian Chadd 596222780332SAdrian Chadd } 596322780332SAdrian Chadd 596422780332SAdrian Chadd /* 596522780332SAdrian Chadd * Handle a node reassociation. 596622780332SAdrian Chadd * 596722780332SAdrian Chadd * We may have a bunch of frames queued to the hardware; those need 596822780332SAdrian Chadd * to be marked as cleanup. 596922780332SAdrian Chadd */ 597022780332SAdrian Chadd void 597122780332SAdrian Chadd ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an) 597222780332SAdrian Chadd { 597322780332SAdrian Chadd struct ath_tid *tid; 597422780332SAdrian Chadd int i; 597522780332SAdrian Chadd ath_bufhead bf_cq; 597622780332SAdrian Chadd struct ath_buf *bf; 597722780332SAdrian Chadd 597822780332SAdrian Chadd TAILQ_INIT(&bf_cq); 597922780332SAdrian Chadd 598022780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 598122780332SAdrian Chadd 598222780332SAdrian Chadd ATH_TX_LOCK(sc); 598322780332SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) { 598422780332SAdrian Chadd tid = &an->an_tid[i]; 598522780332SAdrian Chadd if (tid->hwq_depth == 0) 598622780332SAdrian Chadd continue; 598722780332SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE, 598822780332SAdrian Chadd "%s: %6D: TID %d: cleaning up TID\n", 598922780332SAdrian Chadd __func__, 599022780332SAdrian Chadd an->an_node.ni_macaddr, 599122780332SAdrian Chadd ":", 599222780332SAdrian Chadd i); 599359fbb530SAdrian Chadd /* 599459fbb530SAdrian Chadd * In case there's a followup call to this, only call it 599559fbb530SAdrian Chadd * if we don't have a cleanup in progress. 599659fbb530SAdrian Chadd */ 599759fbb530SAdrian Chadd if (! tid->cleanup_inprogress) { 599859fbb530SAdrian Chadd ath_tx_tid_pause(sc, tid); 599922780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, i, &bf_cq); 60005da3fc10SAdrian Chadd /* 60015da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required. 60025da3fc10SAdrian Chadd */ 60035da3fc10SAdrian Chadd if (! tid->cleanup_inprogress) 60045da3fc10SAdrian Chadd ath_tx_tid_resume(sc, tid); 600522780332SAdrian Chadd } 600659fbb530SAdrian Chadd } 600722780332SAdrian Chadd ATH_TX_UNLOCK(sc); 600822780332SAdrian Chadd 600922780332SAdrian Chadd /* Handle completing frames and fail them */ 601022780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 601122780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list); 601222780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1); 601322780332SAdrian Chadd } 6014eb6f0de0SAdrian Chadd } 6015eb6f0de0SAdrian Chadd 6016eb6f0de0SAdrian Chadd /* 6017eb6f0de0SAdrian Chadd * Note: net80211 bar_timeout() doesn't call this function on BAR failure; 6018eb6f0de0SAdrian Chadd * it simply tears down the aggregation session. Ew. 6019eb6f0de0SAdrian Chadd * 6020eb6f0de0SAdrian Chadd * It however will call ieee80211_ampdu_stop() which will call 6021eb6f0de0SAdrian Chadd * ic->ic_addba_stop(). 6022eb6f0de0SAdrian Chadd * 6023eb6f0de0SAdrian Chadd * XXX This uses a hard-coded max BAR count value; the whole 6024eb6f0de0SAdrian Chadd * XXX BAR TX success or failure should be better handled! 6025eb6f0de0SAdrian Chadd */ 6026eb6f0de0SAdrian Chadd void 6027eb6f0de0SAdrian Chadd ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 6028eb6f0de0SAdrian Chadd int status) 6029eb6f0de0SAdrian Chadd { 60303797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 60312aa563dfSAdrian Chadd int tid = tap->txa_tid; 6032eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 6033eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 6034eb6f0de0SAdrian Chadd int attempts = tap->txa_attempts; 603542fdd8e7SAdrian Chadd int old_txa_start; 6036eb6f0de0SAdrian Chadd 60370e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 603842fdd8e7SAdrian Chadd "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n", 60390e22ed0eSAdrian Chadd __func__, 60409b48fb4bSAdrian Chadd ni->ni_macaddr, 60419b48fb4bSAdrian Chadd ":", 6042e60c4fc2SAdrian Chadd tap->txa_tid, 6043e60c4fc2SAdrian Chadd atid->tid, 60440e22ed0eSAdrian Chadd status, 604542fdd8e7SAdrian Chadd attempts, 604642fdd8e7SAdrian Chadd tap->txa_start, 604742fdd8e7SAdrian Chadd tap->txa_seqpending); 6048eb6f0de0SAdrian Chadd 6049eb6f0de0SAdrian Chadd /* Note: This may update the BAW details */ 605042fdd8e7SAdrian Chadd /* 605142fdd8e7SAdrian Chadd * XXX What if this does slide the BAW along? We need to somehow 605242fdd8e7SAdrian Chadd * XXX either fix things when it does happen, or prevent the 605342fdd8e7SAdrian Chadd * XXX seqpending value to be anything other than exactly what 605442fdd8e7SAdrian Chadd * XXX the hell we want! 605542fdd8e7SAdrian Chadd * 605642fdd8e7SAdrian Chadd * XXX So for now, how I do this inside the TX lock for now 605742fdd8e7SAdrian Chadd * XXX and just correct it afterwards? The below condition should 605842fdd8e7SAdrian Chadd * XXX never happen and if it does I need to fix all kinds of things. 605942fdd8e7SAdrian Chadd */ 606042fdd8e7SAdrian Chadd ATH_TX_LOCK(sc); 606142fdd8e7SAdrian Chadd old_txa_start = tap->txa_start; 6062eb6f0de0SAdrian Chadd sc->sc_bar_response(ni, tap, status); 606342fdd8e7SAdrian Chadd if (tap->txa_start != old_txa_start) { 606442fdd8e7SAdrian Chadd device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n", 606542fdd8e7SAdrian Chadd __func__, 606642fdd8e7SAdrian Chadd tid, 606742fdd8e7SAdrian Chadd tap->txa_start, 606842fdd8e7SAdrian Chadd old_txa_start); 606942fdd8e7SAdrian Chadd } 607042fdd8e7SAdrian Chadd tap->txa_start = old_txa_start; 607142fdd8e7SAdrian Chadd ATH_TX_UNLOCK(sc); 6072eb6f0de0SAdrian Chadd 6073eb6f0de0SAdrian Chadd /* Unpause the TID */ 6074eb6f0de0SAdrian Chadd /* 6075eb6f0de0SAdrian Chadd * XXX if this is attempt=50, the TID will be downgraded 6076eb6f0de0SAdrian Chadd * XXX to a non-aggregate session. So we must unpause the 6077eb6f0de0SAdrian Chadd * XXX TID here or it'll never be done. 6078088d8b81SAdrian Chadd * 6079088d8b81SAdrian Chadd * Also, don't call it if bar_tx/bar_wait are 0; something 6080088d8b81SAdrian Chadd * has beaten us to the punch? (XXX figure out what?) 6081eb6f0de0SAdrian Chadd */ 6082eb6f0de0SAdrian Chadd if (status == 0 || attempts == 50) { 6083375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6084088d8b81SAdrian Chadd if (atid->bar_tx == 0 || atid->bar_wait == 0) 608583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6086088d8b81SAdrian Chadd "%s: huh? bar_tx=%d, bar_wait=%d\n", 6087088d8b81SAdrian Chadd __func__, 6088088d8b81SAdrian Chadd atid->bar_tx, atid->bar_wait); 6089088d8b81SAdrian Chadd else 609088b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid); 6091375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6092eb6f0de0SAdrian Chadd } 6093eb6f0de0SAdrian Chadd } 6094eb6f0de0SAdrian Chadd 6095eb6f0de0SAdrian Chadd /* 6096eb6f0de0SAdrian Chadd * This is called whenever the pending ADDBA request times out. 6097eb6f0de0SAdrian Chadd * Unpause and reschedule the TID. 6098eb6f0de0SAdrian Chadd */ 6099eb6f0de0SAdrian Chadd void 6100eb6f0de0SAdrian Chadd ath_addba_response_timeout(struct ieee80211_node *ni, 6101eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap) 6102eb6f0de0SAdrian Chadd { 61033797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc; 61042aa563dfSAdrian Chadd int tid = tap->txa_tid; 6105eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni); 6106eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid]; 6107eb6f0de0SAdrian Chadd 6108eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 61096d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called; resuming\n", 61109b48fb4bSAdrian Chadd __func__, 61119b48fb4bSAdrian Chadd ni->ni_macaddr, 61126d07d3e0SAdrian Chadd ":", 61136d07d3e0SAdrian Chadd tid); 6114eb6f0de0SAdrian Chadd 6115375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6116d3a6425bSAdrian Chadd atid->addba_tx_pending = 0; 6117375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6118d3a6425bSAdrian Chadd 6119eb6f0de0SAdrian Chadd /* Note: This updates the aggregate state to (again) pending */ 6120eb6f0de0SAdrian Chadd sc->sc_addba_response_timeout(ni, tap); 6121eb6f0de0SAdrian Chadd 6122eb6f0de0SAdrian Chadd /* Unpause the TID; which reschedules it */ 6123375307d4SAdrian Chadd ATH_TX_LOCK(sc); 6124eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid); 6125375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 6126eb6f0de0SAdrian Chadd } 61273fdfc330SAdrian Chadd 61280eb81626SAdrian Chadd /* 61290eb81626SAdrian Chadd * Check if a node is asleep or not. 61300eb81626SAdrian Chadd */ 6131548a605dSAdrian Chadd int 61320eb81626SAdrian Chadd ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an) 61330eb81626SAdrian Chadd { 61340eb81626SAdrian Chadd 613522780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc); 61360eb81626SAdrian Chadd 61370eb81626SAdrian Chadd return (an->an_is_powersave); 61380eb81626SAdrian Chadd } 61390eb81626SAdrian Chadd 61400eb81626SAdrian Chadd /* 61410eb81626SAdrian Chadd * Mark a node as currently "in powersaving." 61420eb81626SAdrian Chadd * This suspends all traffic on the node. 61430eb81626SAdrian Chadd * 61440eb81626SAdrian Chadd * This must be called with the node/tx locks free. 61450eb81626SAdrian Chadd * 61460eb81626SAdrian Chadd * XXX TODO: the locking silliness below is due to how the node 61470eb81626SAdrian Chadd * locking currently works. Right now, the node lock is grabbed 61480eb81626SAdrian Chadd * to do rate control lookups and these are done with the TX 61490eb81626SAdrian Chadd * queue lock held. This means the node lock can't be grabbed 61500eb81626SAdrian Chadd * first here or a LOR will occur. 61510eb81626SAdrian Chadd * 61520eb81626SAdrian Chadd * Eventually (hopefully!) the TX path code will only grab 61530eb81626SAdrian Chadd * the TXQ lock when transmitting and the ath_node lock when 61540eb81626SAdrian Chadd * doing node/TID operations. There are other complications - 61550eb81626SAdrian Chadd * the sched/unsched operations involve walking the per-txq 61560eb81626SAdrian Chadd * 'active tid' list and this requires both locks to be held. 61570eb81626SAdrian Chadd */ 61580eb81626SAdrian Chadd void 61590eb81626SAdrian Chadd ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an) 61600eb81626SAdrian Chadd { 61610eb81626SAdrian Chadd struct ath_tid *atid; 61620eb81626SAdrian Chadd struct ath_txq *txq; 61630eb81626SAdrian Chadd int tid; 61640eb81626SAdrian Chadd 616522780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 61660eb81626SAdrian Chadd 61670eb81626SAdrian Chadd /* Suspend all traffic on the node */ 6168375307d4SAdrian Chadd ATH_TX_LOCK(sc); 616922a3aee6SAdrian Chadd 617022a3aee6SAdrian Chadd if (an->an_is_powersave) { 617183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 617222a3aee6SAdrian Chadd "%s: %6D: node was already asleep!\n", 617383bbd5ebSRui Paulo __func__, an->an_node.ni_macaddr, ":"); 617422a3aee6SAdrian Chadd ATH_TX_UNLOCK(sc); 617522a3aee6SAdrian Chadd return; 617622a3aee6SAdrian Chadd } 617722a3aee6SAdrian Chadd 61780eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 61790eb81626SAdrian Chadd atid = &an->an_tid[tid]; 61800eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 61810eb81626SAdrian Chadd 61820eb81626SAdrian Chadd ath_tx_tid_pause(sc, atid); 61830eb81626SAdrian Chadd } 61840eb81626SAdrian Chadd 61850eb81626SAdrian Chadd /* Mark node as in powersaving */ 61860eb81626SAdrian Chadd an->an_is_powersave = 1; 61870eb81626SAdrian Chadd 618822780332SAdrian Chadd ATH_TX_UNLOCK(sc); 61890eb81626SAdrian Chadd } 61900eb81626SAdrian Chadd 61910eb81626SAdrian Chadd /* 61920eb81626SAdrian Chadd * Mark a node as currently "awake." 61930eb81626SAdrian Chadd * This resumes all traffic to the node. 61940eb81626SAdrian Chadd */ 61950eb81626SAdrian Chadd void 61960eb81626SAdrian Chadd ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an) 61970eb81626SAdrian Chadd { 61980eb81626SAdrian Chadd struct ath_tid *atid; 61990eb81626SAdrian Chadd struct ath_txq *txq; 62000eb81626SAdrian Chadd int tid; 62010eb81626SAdrian Chadd 620222780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc); 620322780332SAdrian Chadd 620422780332SAdrian Chadd ATH_TX_LOCK(sc); 62050eb81626SAdrian Chadd 620622a3aee6SAdrian Chadd /* !? */ 62070eb81626SAdrian Chadd if (an->an_is_powersave == 0) { 620822780332SAdrian Chadd ATH_TX_UNLOCK(sc); 620983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, 62100eb81626SAdrian Chadd "%s: an=%p: node was already awake\n", 62110eb81626SAdrian Chadd __func__, an); 62120eb81626SAdrian Chadd return; 62130eb81626SAdrian Chadd } 62140eb81626SAdrian Chadd 62150eb81626SAdrian Chadd /* Mark node as awake */ 62160eb81626SAdrian Chadd an->an_is_powersave = 0; 621722a3aee6SAdrian Chadd /* 621822a3aee6SAdrian Chadd * Clear any pending leaked frame requests 621922a3aee6SAdrian Chadd */ 622022a3aee6SAdrian Chadd an->an_leak_count = 0; 62210eb81626SAdrian Chadd 62220eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 62230eb81626SAdrian Chadd atid = &an->an_tid[tid]; 62240eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac]; 62250eb81626SAdrian Chadd 62260eb81626SAdrian Chadd ath_tx_tid_resume(sc, atid); 62270eb81626SAdrian Chadd } 6228375307d4SAdrian Chadd ATH_TX_UNLOCK(sc); 62290eb81626SAdrian Chadd } 62300eb81626SAdrian Chadd 62313fdfc330SAdrian Chadd static int 62323fdfc330SAdrian Chadd ath_legacy_dma_txsetup(struct ath_softc *sc) 62333fdfc330SAdrian Chadd { 62343fdfc330SAdrian Chadd 62353fdfc330SAdrian Chadd /* nothing new needed */ 62363fdfc330SAdrian Chadd return (0); 62373fdfc330SAdrian Chadd } 62383fdfc330SAdrian Chadd 62393fdfc330SAdrian Chadd static int 62403fdfc330SAdrian Chadd ath_legacy_dma_txteardown(struct ath_softc *sc) 62413fdfc330SAdrian Chadd { 62423fdfc330SAdrian Chadd 62433fdfc330SAdrian Chadd /* nothing new needed */ 62443fdfc330SAdrian Chadd return (0); 62453fdfc330SAdrian Chadd } 62463fdfc330SAdrian Chadd 62473fdfc330SAdrian Chadd void 62483fdfc330SAdrian Chadd ath_xmit_setup_legacy(struct ath_softc *sc) 62493fdfc330SAdrian Chadd { 62501006fc0cSAdrian Chadd /* 62511006fc0cSAdrian Chadd * For now, just set the descriptor length to sizeof(ath_desc); 62521006fc0cSAdrian Chadd * worry about extracting the real length out of the HAL later. 62531006fc0cSAdrian Chadd */ 62541006fc0cSAdrian Chadd sc->sc_tx_desclen = sizeof(struct ath_desc); 6255bb327d28SAdrian Chadd sc->sc_tx_statuslen = sizeof(struct ath_desc); 62561006fc0cSAdrian Chadd sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */ 62573fdfc330SAdrian Chadd 62583fdfc330SAdrian Chadd sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup; 62593fdfc330SAdrian Chadd sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown; 6260f8418db5SAdrian Chadd sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func; 6261746bab5bSAdrian Chadd 6262746bab5bSAdrian Chadd sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart; 6263746bab5bSAdrian Chadd sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff; 6264788e6aa9SAdrian Chadd 6265788e6aa9SAdrian Chadd sc->sc_tx.xmit_drain = ath_legacy_tx_drain; 62663fdfc330SAdrian Chadd } 6267