1b8e788a5SAdrian Chadd /*-
24d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause
3718cf2ccSPedro F. Giffuni *
4b8e788a5SAdrian Chadd * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5c6e9cee2SAdrian Chadd * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
6b8e788a5SAdrian Chadd * All rights reserved.
7b8e788a5SAdrian Chadd *
8b8e788a5SAdrian Chadd * Redistribution and use in source and binary forms, with or without
9b8e788a5SAdrian Chadd * modification, are permitted provided that the following conditions
10b8e788a5SAdrian Chadd * are met:
11b8e788a5SAdrian Chadd * 1. Redistributions of source code must retain the above copyright
12b8e788a5SAdrian Chadd * notice, this list of conditions and the following disclaimer,
13b8e788a5SAdrian Chadd * without modification.
14b8e788a5SAdrian Chadd * 2. Redistributions in binary form must reproduce at minimum a disclaimer
15b8e788a5SAdrian Chadd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
16b8e788a5SAdrian Chadd * redistribution must be conditioned upon including a substantially
17b8e788a5SAdrian Chadd * similar Disclaimer requirement for further binary redistribution.
18b8e788a5SAdrian Chadd *
19b8e788a5SAdrian Chadd * NO WARRANTY
20b8e788a5SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21b8e788a5SAdrian Chadd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22b8e788a5SAdrian Chadd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
23b8e788a5SAdrian Chadd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
24b8e788a5SAdrian Chadd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
25b8e788a5SAdrian Chadd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26b8e788a5SAdrian Chadd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27b8e788a5SAdrian Chadd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
28b8e788a5SAdrian Chadd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29b8e788a5SAdrian Chadd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30b8e788a5SAdrian Chadd * THE POSSIBILITY OF SUCH DAMAGES.
31b8e788a5SAdrian Chadd */
32b8e788a5SAdrian Chadd
33b8e788a5SAdrian Chadd #include <sys/cdefs.h>
34b8e788a5SAdrian Chadd /*
35b8e788a5SAdrian Chadd * Driver for the Atheros Wireless LAN controller.
36b8e788a5SAdrian Chadd *
37b8e788a5SAdrian Chadd * This software is derived from work of Atsushi Onoe; his contribution
38b8e788a5SAdrian Chadd * is greatly appreciated.
39b8e788a5SAdrian Chadd */
40b8e788a5SAdrian Chadd
41b8e788a5SAdrian Chadd #include "opt_inet.h"
42b8e788a5SAdrian Chadd #include "opt_ath.h"
43b8e788a5SAdrian Chadd #include "opt_wlan.h"
44b8e788a5SAdrian Chadd
45b8e788a5SAdrian Chadd #include <sys/param.h>
46b8e788a5SAdrian Chadd #include <sys/systm.h>
47b8e788a5SAdrian Chadd #include <sys/sysctl.h>
48b8e788a5SAdrian Chadd #include <sys/mbuf.h>
49b8e788a5SAdrian Chadd #include <sys/malloc.h>
50b8e788a5SAdrian Chadd #include <sys/lock.h>
51b8e788a5SAdrian Chadd #include <sys/mutex.h>
52b8e788a5SAdrian Chadd #include <sys/kernel.h>
53b8e788a5SAdrian Chadd #include <sys/socket.h>
54b8e788a5SAdrian Chadd #include <sys/sockio.h>
55b8e788a5SAdrian Chadd #include <sys/errno.h>
56b8e788a5SAdrian Chadd #include <sys/callout.h>
57b8e788a5SAdrian Chadd #include <sys/bus.h>
58b8e788a5SAdrian Chadd #include <sys/endian.h>
59b8e788a5SAdrian Chadd #include <sys/kthread.h>
60b8e788a5SAdrian Chadd #include <sys/taskqueue.h>
61b8e788a5SAdrian Chadd #include <sys/priv.h>
62f431664cSOlivier Houchard #include <sys/ktr.h>
63b8e788a5SAdrian Chadd
64b8e788a5SAdrian Chadd #include <machine/bus.h>
65b8e788a5SAdrian Chadd
66b8e788a5SAdrian Chadd #include <net/if.h>
6776039bc8SGleb Smirnoff #include <net/if_var.h>
68b8e788a5SAdrian Chadd #include <net/if_dl.h>
69b8e788a5SAdrian Chadd #include <net/if_media.h>
70b8e788a5SAdrian Chadd #include <net/if_types.h>
71b8e788a5SAdrian Chadd #include <net/if_arp.h>
72b8e788a5SAdrian Chadd #include <net/ethernet.h>
73b8e788a5SAdrian Chadd #include <net/if_llc.h>
74b8e788a5SAdrian Chadd
75b8e788a5SAdrian Chadd #include <net80211/ieee80211_var.h>
76b8e788a5SAdrian Chadd #include <net80211/ieee80211_regdomain.h>
77b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_SUPERG
78b8e788a5SAdrian Chadd #include <net80211/ieee80211_superg.h>
79b8e788a5SAdrian Chadd #endif
80b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
81b8e788a5SAdrian Chadd #include <net80211/ieee80211_tdma.h>
82b8e788a5SAdrian Chadd #endif
83eb6f0de0SAdrian Chadd #include <net80211/ieee80211_ht.h>
84b8e788a5SAdrian Chadd
85b8e788a5SAdrian Chadd #include <net/bpf.h>
86b8e788a5SAdrian Chadd
87b8e788a5SAdrian Chadd #ifdef INET
88b8e788a5SAdrian Chadd #include <netinet/in.h>
89b8e788a5SAdrian Chadd #include <netinet/if_ether.h>
90b8e788a5SAdrian Chadd #endif
91b8e788a5SAdrian Chadd
92b8e788a5SAdrian Chadd #include <dev/ath/if_athvar.h>
93b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
94b8e788a5SAdrian Chadd #include <dev/ath/ath_hal/ah_diagcodes.h>
95b8e788a5SAdrian Chadd
96b8e788a5SAdrian Chadd #include <dev/ath/if_ath_debug.h>
97b8e788a5SAdrian Chadd
98b8e788a5SAdrian Chadd #ifdef ATH_TX99_DIAG
99b8e788a5SAdrian Chadd #include <dev/ath/ath_tx99/ath_tx99.h>
100b8e788a5SAdrian Chadd #endif
101b8e788a5SAdrian Chadd
102b8e788a5SAdrian Chadd #include <dev/ath/if_ath_misc.h>
103b8e788a5SAdrian Chadd #include <dev/ath/if_ath_tx.h>
104c1782ce0SAdrian Chadd #include <dev/ath/if_ath_tx_ht.h>
105b8e788a5SAdrian Chadd
106b69b0dccSAdrian Chadd #ifdef ATH_DEBUG_ALQ
107b69b0dccSAdrian Chadd #include <dev/ath/if_ath_alq.h>
108b69b0dccSAdrian Chadd #endif
109b69b0dccSAdrian Chadd
11081a82688SAdrian Chadd /*
111eb6f0de0SAdrian Chadd * How many retries to perform in software
112eb6f0de0SAdrian Chadd */
113eb6f0de0SAdrian Chadd #define SWMAX_RETRIES 10
114eb6f0de0SAdrian Chadd
1157403d1b9SAdrian Chadd /*
1167403d1b9SAdrian Chadd * What queue to throw the non-QoS TID traffic into
1177403d1b9SAdrian Chadd */
1187403d1b9SAdrian Chadd #define ATH_NONQOS_TID_AC WME_AC_VO
1197403d1b9SAdrian Chadd
1200eb81626SAdrian Chadd #if 0
1210eb81626SAdrian Chadd static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an);
1220eb81626SAdrian Chadd #endif
123eb6f0de0SAdrian Chadd static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
124eb6f0de0SAdrian Chadd int tid);
125eb6f0de0SAdrian Chadd static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
126eb6f0de0SAdrian Chadd int tid);
127a108d2d6SAdrian Chadd static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
128a108d2d6SAdrian Chadd struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
129eb6f0de0SAdrian Chadd static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
130eb6f0de0SAdrian Chadd struct ieee80211_node *ni, struct mbuf *m0, int *tid);
131f1bc738eSAdrian Chadd static struct ath_buf *
132f1bc738eSAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
133f1bc738eSAdrian Chadd struct ath_tid *tid, struct ath_buf *bf);
134eb6f0de0SAdrian Chadd
135bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ
136bb327d28SAdrian Chadd void
ath_tx_alq_post(struct ath_softc * sc,struct ath_buf * bf_first)137bb327d28SAdrian Chadd ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first)
138bb327d28SAdrian Chadd {
139bb327d28SAdrian Chadd struct ath_buf *bf;
140bb327d28SAdrian Chadd int i, n;
141bb327d28SAdrian Chadd const char *ds;
142bb327d28SAdrian Chadd
143bb327d28SAdrian Chadd /* XXX we should skip out early if debugging isn't enabled! */
144bb327d28SAdrian Chadd bf = bf_first;
145bb327d28SAdrian Chadd
146bb327d28SAdrian Chadd while (bf != NULL) {
147bb327d28SAdrian Chadd /* XXX should ensure bf_nseg > 0! */
148bb327d28SAdrian Chadd if (bf->bf_nseg == 0)
149bb327d28SAdrian Chadd break;
150bb327d28SAdrian Chadd n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1;
151bb327d28SAdrian Chadd for (i = 0, ds = (const char *) bf->bf_desc;
152bb327d28SAdrian Chadd i < n;
153bb327d28SAdrian Chadd i++, ds += sc->sc_tx_desclen) {
154bb327d28SAdrian Chadd if_ath_alq_post(&sc->sc_alq,
155bb327d28SAdrian Chadd ATH_ALQ_EDMA_TXDESC,
156bb327d28SAdrian Chadd sc->sc_tx_desclen,
157bb327d28SAdrian Chadd ds);
158bb327d28SAdrian Chadd }
159bb327d28SAdrian Chadd bf = bf->bf_next;
160bb327d28SAdrian Chadd }
161bb327d28SAdrian Chadd }
162bb327d28SAdrian Chadd #endif /* ATH_DEBUG_ALQ */
163bb327d28SAdrian Chadd
164eb6f0de0SAdrian Chadd /*
16581a82688SAdrian Chadd * Whether to use the 11n rate scenario functions or not
16681a82688SAdrian Chadd */
16781a82688SAdrian Chadd static inline int
ath_tx_is_11n(struct ath_softc * sc)16881a82688SAdrian Chadd ath_tx_is_11n(struct ath_softc *sc)
16981a82688SAdrian Chadd {
1704ddf2cc3SAdrian Chadd return ((sc->sc_ah->ah_magic == 0x20065416) ||
1714ddf2cc3SAdrian Chadd (sc->sc_ah->ah_magic == 0x19741014));
17281a82688SAdrian Chadd }
17381a82688SAdrian Chadd
174eb6f0de0SAdrian Chadd /*
175eb6f0de0SAdrian Chadd * Obtain the current TID from the given frame.
176eb6f0de0SAdrian Chadd *
17715e58d4dSAdrian Chadd * Non-QoS frames get mapped to a TID so frames consistently
17815e58d4dSAdrian Chadd * go on a sensible queue.
179eb6f0de0SAdrian Chadd */
180eb6f0de0SAdrian Chadd static int
ath_tx_gettid(struct ath_softc * sc,const struct mbuf * m0)181eb6f0de0SAdrian Chadd ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
182eb6f0de0SAdrian Chadd {
183eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh;
184eb6f0de0SAdrian Chadd
185eb6f0de0SAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *);
18615e58d4dSAdrian Chadd
18715e58d4dSAdrian Chadd /* Non-QoS: map frame to a TID queue for software queueing */
188eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh))
18915e58d4dSAdrian Chadd return (WME_AC_TO_TID(M_WME_GETAC(m0)));
19015e58d4dSAdrian Chadd
19115e58d4dSAdrian Chadd /* QoS - fetch the TID from the header, ignore mbuf WME */
19215e58d4dSAdrian Chadd return (ieee80211_gettid(wh));
193eb6f0de0SAdrian Chadd }
194eb6f0de0SAdrian Chadd
195f1bc738eSAdrian Chadd static void
ath_tx_set_retry(struct ath_softc * sc,struct ath_buf * bf)196f1bc738eSAdrian Chadd ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
197f1bc738eSAdrian Chadd {
198f1bc738eSAdrian Chadd struct ieee80211_frame *wh;
199f1bc738eSAdrian Chadd
200f1bc738eSAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *);
201f1bc738eSAdrian Chadd /* Only update/resync if needed */
202f1bc738eSAdrian Chadd if (bf->bf_state.bfs_isretried == 0) {
203f1bc738eSAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_RETRY;
204f1bc738eSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
205f1bc738eSAdrian Chadd BUS_DMASYNC_PREWRITE);
206f1bc738eSAdrian Chadd }
207f1bc738eSAdrian Chadd bf->bf_state.bfs_isretried = 1;
208f1bc738eSAdrian Chadd bf->bf_state.bfs_retries ++;
209f1bc738eSAdrian Chadd }
210f1bc738eSAdrian Chadd
211eb6f0de0SAdrian Chadd /*
212eb6f0de0SAdrian Chadd * Determine what the correct AC queue for the given frame
213eb6f0de0SAdrian Chadd * should be.
214eb6f0de0SAdrian Chadd *
21515e58d4dSAdrian Chadd * For QoS frames, obey the TID. That way things like
21615e58d4dSAdrian Chadd * management frames that are related to a given TID
21715e58d4dSAdrian Chadd * are thus serialised with the rest of the TID traffic,
21815e58d4dSAdrian Chadd * regardless of net80211 overriding priority.
219eb6f0de0SAdrian Chadd *
22015e58d4dSAdrian Chadd * For non-QoS frames, return the mbuf WMI priority.
22115e58d4dSAdrian Chadd *
22215e58d4dSAdrian Chadd * This has implications that higher priority non-QoS traffic
22315e58d4dSAdrian Chadd * may end up being scheduled before other non-QoS traffic,
22415e58d4dSAdrian Chadd * leading to out-of-sequence packets being emitted.
22515e58d4dSAdrian Chadd *
22615e58d4dSAdrian Chadd * (It'd be nice to log/count this so we can see if it
22715e58d4dSAdrian Chadd * really is a problem.)
22815e58d4dSAdrian Chadd *
22915e58d4dSAdrian Chadd * TODO: maybe we should throw multicast traffic, QoS or
23015e58d4dSAdrian Chadd * otherwise, into a separate TX queue?
231eb6f0de0SAdrian Chadd */
232eb6f0de0SAdrian Chadd static int
ath_tx_getac(struct ath_softc * sc,const struct mbuf * m0)233eb6f0de0SAdrian Chadd ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
234eb6f0de0SAdrian Chadd {
235eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh;
236eb6f0de0SAdrian Chadd
23715e58d4dSAdrian Chadd wh = mtod(m0, const struct ieee80211_frame *);
23815e58d4dSAdrian Chadd
23915e58d4dSAdrian Chadd /*
24015e58d4dSAdrian Chadd * QoS data frame (sequence number or otherwise) -
24115e58d4dSAdrian Chadd * return hardware queue mapping for the underlying
24215e58d4dSAdrian Chadd * TID.
24315e58d4dSAdrian Chadd */
24415e58d4dSAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh))
24515e58d4dSAdrian Chadd return TID_TO_WME_AC(ieee80211_gettid(wh));
24615e58d4dSAdrian Chadd
24715e58d4dSAdrian Chadd /*
24815e58d4dSAdrian Chadd * Otherwise - return mbuf QoS pri.
24915e58d4dSAdrian Chadd */
25015e58d4dSAdrian Chadd return (M_WME_GETAC(m0));
251eb6f0de0SAdrian Chadd }
252eb6f0de0SAdrian Chadd
253b8e788a5SAdrian Chadd void
ath_txfrag_cleanup(struct ath_softc * sc,ath_bufhead * frags,struct ieee80211_node * ni)254b8e788a5SAdrian Chadd ath_txfrag_cleanup(struct ath_softc *sc,
255b8e788a5SAdrian Chadd ath_bufhead *frags, struct ieee80211_node *ni)
256b8e788a5SAdrian Chadd {
257b8e788a5SAdrian Chadd struct ath_buf *bf, *next;
258b8e788a5SAdrian Chadd
259b8e788a5SAdrian Chadd ATH_TXBUF_LOCK_ASSERT(sc);
260b8e788a5SAdrian Chadd
2616b349e5aSAdrian Chadd TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
262b8e788a5SAdrian Chadd /* NB: bf assumed clean */
2636b349e5aSAdrian Chadd TAILQ_REMOVE(frags, bf, bf_list);
264e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf);
265b8e788a5SAdrian Chadd ieee80211_node_decref(ni);
266b8e788a5SAdrian Chadd }
267b8e788a5SAdrian Chadd }
268b8e788a5SAdrian Chadd
269b8e788a5SAdrian Chadd /*
270b8e788a5SAdrian Chadd * Setup xmit of a fragmented frame. Allocate a buffer
271b8e788a5SAdrian Chadd * for each frag and bump the node reference count to
272b8e788a5SAdrian Chadd * reflect the held reference to be setup by ath_tx_start.
273b8e788a5SAdrian Chadd */
274b8e788a5SAdrian Chadd int
ath_txfrag_setup(struct ath_softc * sc,ath_bufhead * frags,struct mbuf * m0,struct ieee80211_node * ni)275b8e788a5SAdrian Chadd ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
276b8e788a5SAdrian Chadd struct mbuf *m0, struct ieee80211_node *ni)
277b8e788a5SAdrian Chadd {
278b8e788a5SAdrian Chadd struct mbuf *m;
279b8e788a5SAdrian Chadd struct ath_buf *bf;
280b8e788a5SAdrian Chadd
281b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc);
282b8e788a5SAdrian Chadd for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
283af33d486SAdrian Chadd /* XXX non-management? */
284af33d486SAdrian Chadd bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL);
285b8e788a5SAdrian Chadd if (bf == NULL) { /* out of buffers, cleanup */
28683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n",
287b43facbfSAdrian Chadd __func__);
288b8e788a5SAdrian Chadd ath_txfrag_cleanup(sc, frags, ni);
289b8e788a5SAdrian Chadd break;
290b8e788a5SAdrian Chadd }
291f156cd89SBjoern A. Zeeb (void) ieee80211_ref_node(ni);
2926b349e5aSAdrian Chadd TAILQ_INSERT_TAIL(frags, bf, bf_list);
293b8e788a5SAdrian Chadd }
294b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc);
295b8e788a5SAdrian Chadd
2966b349e5aSAdrian Chadd return !TAILQ_EMPTY(frags);
297b8e788a5SAdrian Chadd }
298b8e788a5SAdrian Chadd
299b8e788a5SAdrian Chadd static int
ath_tx_dmasetup(struct ath_softc * sc,struct ath_buf * bf,struct mbuf * m0)300b8e788a5SAdrian Chadd ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
301b8e788a5SAdrian Chadd {
302b8e788a5SAdrian Chadd struct mbuf *m;
303b8e788a5SAdrian Chadd int error;
304b8e788a5SAdrian Chadd
305b8e788a5SAdrian Chadd /*
306b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This
307b8e788a5SAdrian Chadd * also calculates the number of descriptors we need.
308b8e788a5SAdrian Chadd */
309b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
310b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg,
311b8e788a5SAdrian Chadd BUS_DMA_NOWAIT);
312b8e788a5SAdrian Chadd if (error == EFBIG) {
313b8e788a5SAdrian Chadd /* XXX packet requires too many descriptors */
31409067b6eSAdrian Chadd bf->bf_nseg = ATH_MAX_SCATTER + 1;
315b8e788a5SAdrian Chadd } else if (error != 0) {
316b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++;
317d07be335SAdrian Chadd ieee80211_free_mbuf(m0);
318b8e788a5SAdrian Chadd return error;
319b8e788a5SAdrian Chadd }
320b8e788a5SAdrian Chadd /*
321b8e788a5SAdrian Chadd * Discard null packets and check for packets that
322b8e788a5SAdrian Chadd * require too many TX descriptors. We try to convert
323b8e788a5SAdrian Chadd * the latter to a cluster.
324b8e788a5SAdrian Chadd */
32509067b6eSAdrian Chadd if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */
326b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_linear++;
32709067b6eSAdrian Chadd m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER);
328b8e788a5SAdrian Chadd if (m == NULL) {
329d07be335SAdrian Chadd ieee80211_free_mbuf(m0);
330b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nombuf++;
331b8e788a5SAdrian Chadd return ENOMEM;
332b8e788a5SAdrian Chadd }
333b8e788a5SAdrian Chadd m0 = m;
334b8e788a5SAdrian Chadd error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
335b8e788a5SAdrian Chadd bf->bf_segs, &bf->bf_nseg,
336b8e788a5SAdrian Chadd BUS_DMA_NOWAIT);
337b8e788a5SAdrian Chadd if (error != 0) {
338b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_busdma++;
339d07be335SAdrian Chadd ieee80211_free_mbuf(m0);
340b8e788a5SAdrian Chadd return error;
341b8e788a5SAdrian Chadd }
34209067b6eSAdrian Chadd KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER,
343b8e788a5SAdrian Chadd ("too many segments after defrag; nseg %u", bf->bf_nseg));
344b8e788a5SAdrian Chadd } else if (bf->bf_nseg == 0) { /* null packet, discard */
345b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nodata++;
346d07be335SAdrian Chadd ieee80211_free_mbuf(m0);
347b8e788a5SAdrian Chadd return EIO;
348b8e788a5SAdrian Chadd }
349b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
350b8e788a5SAdrian Chadd __func__, m0, m0->m_pkthdr.len);
351b8e788a5SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
352b8e788a5SAdrian Chadd bf->bf_m = m0;
353b8e788a5SAdrian Chadd
354b8e788a5SAdrian Chadd return 0;
355b8e788a5SAdrian Chadd }
356b8e788a5SAdrian Chadd
3576edf1dc7SAdrian Chadd /*
3586e84772fSAdrian Chadd * Chain together segments+descriptors for a frame - 11n or otherwise.
3596e84772fSAdrian Chadd *
3606e84772fSAdrian Chadd * For aggregates, this is called on each frame in the aggregate.
3616edf1dc7SAdrian Chadd */
362b8e788a5SAdrian Chadd static void
ath_tx_chaindesclist(struct ath_softc * sc,struct ath_desc * ds0,struct ath_buf * bf,bool is_aggr,int is_first_subframe,int is_last_subframe)3636e84772fSAdrian Chadd ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0,
364cce63444SAdrian Chadd struct ath_buf *bf, bool is_aggr, int is_first_subframe,
3656e84772fSAdrian Chadd int is_last_subframe)
366b8e788a5SAdrian Chadd {
367b8e788a5SAdrian Chadd struct ath_hal *ah = sc->sc_ah;
3686e84772fSAdrian Chadd char *ds;
3692b200bb4SAdrian Chadd int i, bp, dsp;
37046634305SAdrian Chadd HAL_DMA_ADDR bufAddrList[4];
37146634305SAdrian Chadd uint32_t segLenList[4];
3722b200bb4SAdrian Chadd int numTxMaps = 1;
373e2137b86SAdrian Chadd int isFirstDesc = 1;
37446634305SAdrian Chadd
3753d9b1596SAdrian Chadd /*
3763d9b1596SAdrian Chadd * XXX There's txdma and txdma_mgmt; the descriptor
3773d9b1596SAdrian Chadd * sizes must match.
3783d9b1596SAdrian Chadd */
3793d9b1596SAdrian Chadd struct ath_descdma *dd = &sc->sc_txdma;
380b8e788a5SAdrian Chadd
381b8e788a5SAdrian Chadd /*
382b8e788a5SAdrian Chadd * Fillin the remainder of the descriptor info.
383b8e788a5SAdrian Chadd */
38446634305SAdrian Chadd
3852b200bb4SAdrian Chadd /*
386378a752fSAdrian Chadd * We need the number of TX data pointers in each descriptor.
387378a752fSAdrian Chadd * EDMA and later chips support 4 TX buffers per descriptor;
388378a752fSAdrian Chadd * previous chips just support one.
3892b200bb4SAdrian Chadd */
390378a752fSAdrian Chadd numTxMaps = sc->sc_tx_nmaps;
3912b200bb4SAdrian Chadd
3922b200bb4SAdrian Chadd /*
3932b200bb4SAdrian Chadd * For EDMA and later chips ensure the TX map is fully populated
3942b200bb4SAdrian Chadd * before advancing to the next descriptor.
3952b200bb4SAdrian Chadd */
3966e84772fSAdrian Chadd ds = (char *) bf->bf_desc;
3972b200bb4SAdrian Chadd bp = dsp = 0;
3982b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList));
3992b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList));
4002b200bb4SAdrian Chadd for (i = 0; i < bf->bf_nseg; i++) {
4012b200bb4SAdrian Chadd bufAddrList[bp] = bf->bf_segs[i].ds_addr;
4022b200bb4SAdrian Chadd segLenList[bp] = bf->bf_segs[i].ds_len;
4032b200bb4SAdrian Chadd bp++;
4042b200bb4SAdrian Chadd
4052b200bb4SAdrian Chadd /*
4062b200bb4SAdrian Chadd * Go to the next segment if this isn't the last segment
4072b200bb4SAdrian Chadd * and there's space in the current TX map.
4082b200bb4SAdrian Chadd */
4092b200bb4SAdrian Chadd if ((i != bf->bf_nseg - 1) && (bp < numTxMaps))
4102b200bb4SAdrian Chadd continue;
4112b200bb4SAdrian Chadd
4122b200bb4SAdrian Chadd /*
4132b200bb4SAdrian Chadd * Last segment or we're out of buffer pointers.
4142b200bb4SAdrian Chadd */
4152b200bb4SAdrian Chadd bp = 0;
41646634305SAdrian Chadd
417b8e788a5SAdrian Chadd if (i == bf->bf_nseg - 1)
41842083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0);
419b8e788a5SAdrian Chadd else
42042083b3dSAdrian Chadd ath_hal_settxdesclink(ah, (struct ath_desc *) ds,
4212b200bb4SAdrian Chadd bf->bf_daddr + dd->dd_descsize * (dsp + 1));
42246634305SAdrian Chadd
42346634305SAdrian Chadd /*
424fc56c9c5SAdrian Chadd * XXX This assumes that bfs_txq is the actual destination
425fc56c9c5SAdrian Chadd * hardware queue at this point. It may not have been
426fc56c9c5SAdrian Chadd * assigned, it may actually be pointing to the multicast
427fc56c9c5SAdrian Chadd * software TXQ id. These must be fixed!
42846634305SAdrian Chadd */
42942083b3dSAdrian Chadd ath_hal_filltxdesc(ah, (struct ath_desc *) ds
43046634305SAdrian Chadd , bufAddrList
43146634305SAdrian Chadd , segLenList
4322b200bb4SAdrian Chadd , bf->bf_descid /* XXX desc id */
433fc56c9c5SAdrian Chadd , bf->bf_state.bfs_tx_queue
434e2137b86SAdrian Chadd , isFirstDesc /* first segment */
435b8e788a5SAdrian Chadd , i == bf->bf_nseg - 1 /* last segment */
43642083b3dSAdrian Chadd , (struct ath_desc *) ds0 /* first descriptor */
437b8e788a5SAdrian Chadd );
43821840808SAdrian Chadd
4396e84772fSAdrian Chadd /*
4406e84772fSAdrian Chadd * Make sure the 11n aggregate fields are cleared.
4416e84772fSAdrian Chadd *
4426e84772fSAdrian Chadd * XXX TODO: this doesn't need to be called for
4436e84772fSAdrian Chadd * aggregate frames; as it'll be called on all
4446e84772fSAdrian Chadd * sub-frames. Since the descriptors are in
4456e84772fSAdrian Chadd * non-cacheable memory, this leads to some
4466e84772fSAdrian Chadd * rather slow writes on MIPS/ARM platforms.
4476e84772fSAdrian Chadd */
44821840808SAdrian Chadd if (ath_tx_is_11n(sc))
4495d9b19f7SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds);
45021840808SAdrian Chadd
4516e84772fSAdrian Chadd /*
4526e84772fSAdrian Chadd * If 11n is enabled, set it up as if it's an aggregate
4536e84772fSAdrian Chadd * frame.
4546e84772fSAdrian Chadd */
4556e84772fSAdrian Chadd if (is_last_subframe) {
4566e84772fSAdrian Chadd ath_hal_set11n_aggr_last(sc->sc_ah,
4576e84772fSAdrian Chadd (struct ath_desc *) ds);
4586e84772fSAdrian Chadd } else if (is_aggr) {
4596e84772fSAdrian Chadd /*
4606e84772fSAdrian Chadd * This clears the aggrlen field; so
4616e84772fSAdrian Chadd * the caller needs to call set_aggr_first()!
4626e84772fSAdrian Chadd *
4636e84772fSAdrian Chadd * XXX TODO: don't call this for the first
4646e84772fSAdrian Chadd * descriptor in the first frame in an
4656e84772fSAdrian Chadd * aggregate!
4666e84772fSAdrian Chadd */
4676e84772fSAdrian Chadd ath_hal_set11n_aggr_middle(sc->sc_ah,
4686e84772fSAdrian Chadd (struct ath_desc *) ds,
4696e84772fSAdrian Chadd bf->bf_state.bfs_ndelim);
4706e84772fSAdrian Chadd }
471e2137b86SAdrian Chadd isFirstDesc = 0;
47242083b3dSAdrian Chadd bf->bf_lastds = (struct ath_desc *) ds;
4732b200bb4SAdrian Chadd
4742b200bb4SAdrian Chadd /*
4752b200bb4SAdrian Chadd * Don't forget to skip to the next descriptor.
4762b200bb4SAdrian Chadd */
47742083b3dSAdrian Chadd ds += sc->sc_tx_desclen;
4782b200bb4SAdrian Chadd dsp++;
4792b200bb4SAdrian Chadd
4802b200bb4SAdrian Chadd /*
4812b200bb4SAdrian Chadd * .. and don't forget to blank these out!
4822b200bb4SAdrian Chadd */
4832b200bb4SAdrian Chadd bzero(bufAddrList, sizeof(bufAddrList));
4842b200bb4SAdrian Chadd bzero(segLenList, sizeof(segLenList));
485b8e788a5SAdrian Chadd }
4864d7f8837SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
48781a82688SAdrian Chadd }
48881a82688SAdrian Chadd
489eb6f0de0SAdrian Chadd /*
490d34a7347SAdrian Chadd * Set the rate control fields in the given descriptor based on
491d34a7347SAdrian Chadd * the bf_state fields and node state.
492d34a7347SAdrian Chadd *
493d34a7347SAdrian Chadd * The bfs fields should already be set with the relevant rate
494d34a7347SAdrian Chadd * control information, including whether MRR is to be enabled.
495d34a7347SAdrian Chadd *
496d34a7347SAdrian Chadd * Since the FreeBSD HAL currently sets up the first TX rate
497d34a7347SAdrian Chadd * in ath_hal_setuptxdesc(), this will setup the MRR
498d34a7347SAdrian Chadd * conditionally for the pre-11n chips, and call ath_buf_set_rate
499d34a7347SAdrian Chadd * unconditionally for 11n chips. These require the 11n rate
500d34a7347SAdrian Chadd * scenario to be set if MCS rates are enabled, so it's easier
501d34a7347SAdrian Chadd * to just always call it. The caller can then only set rates 2, 3
502d34a7347SAdrian Chadd * and 4 if multi-rate retry is needed.
503d34a7347SAdrian Chadd */
504d34a7347SAdrian Chadd static void
ath_tx_set_ratectrl(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf)505d34a7347SAdrian Chadd ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
506d34a7347SAdrian Chadd struct ath_buf *bf)
507d34a7347SAdrian Chadd {
508d34a7347SAdrian Chadd struct ath_rc_series *rc = bf->bf_state.bfs_rc;
509d34a7347SAdrian Chadd
510d34a7347SAdrian Chadd /* If mrr is disabled, blank tries 1, 2, 3 */
511d34a7347SAdrian Chadd if (! bf->bf_state.bfs_ismrr)
512d34a7347SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0;
513d34a7347SAdrian Chadd
514491e1248SAdrian Chadd #if 0
515491e1248SAdrian Chadd /*
516491e1248SAdrian Chadd * If NOACK is set, just set ntries=1.
517491e1248SAdrian Chadd */
518491e1248SAdrian Chadd else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) {
519491e1248SAdrian Chadd rc[1].tries = rc[2].tries = rc[3].tries = 0;
520491e1248SAdrian Chadd rc[0].tries = 1;
521491e1248SAdrian Chadd }
522491e1248SAdrian Chadd #endif
523491e1248SAdrian Chadd
524d34a7347SAdrian Chadd /*
525d34a7347SAdrian Chadd * Always call - that way a retried descriptor will
526d34a7347SAdrian Chadd * have the MRR fields overwritten.
527d34a7347SAdrian Chadd *
528d34a7347SAdrian Chadd * XXX TODO: see if this is really needed - setting up
529d34a7347SAdrian Chadd * the first descriptor should set the MRR fields to 0
530d34a7347SAdrian Chadd * for us anyway.
531d34a7347SAdrian Chadd */
532d34a7347SAdrian Chadd if (ath_tx_is_11n(sc)) {
533d34a7347SAdrian Chadd ath_buf_set_rate(sc, ni, bf);
534d34a7347SAdrian Chadd } else {
535d34a7347SAdrian Chadd ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
536d34a7347SAdrian Chadd , rc[1].ratecode, rc[1].tries
537d34a7347SAdrian Chadd , rc[2].ratecode, rc[2].tries
538d34a7347SAdrian Chadd , rc[3].ratecode, rc[3].tries
539d34a7347SAdrian Chadd );
540d34a7347SAdrian Chadd }
541d34a7347SAdrian Chadd }
542d34a7347SAdrian Chadd
543d34a7347SAdrian Chadd /*
544eb6f0de0SAdrian Chadd * Setup segments+descriptors for an 11n aggregate.
545eb6f0de0SAdrian Chadd * bf_first is the first buffer in the aggregate.
546eb6f0de0SAdrian Chadd * The descriptor list must already been linked together using
547eb6f0de0SAdrian Chadd * bf->bf_next.
548eb6f0de0SAdrian Chadd */
549eb6f0de0SAdrian Chadd static void
ath_tx_setds_11n(struct ath_softc * sc,struct ath_buf * bf_first)550eb6f0de0SAdrian Chadd ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
551eb6f0de0SAdrian Chadd {
552eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_prev = NULL;
5536e84772fSAdrian Chadd struct ath_desc *ds0 = bf_first->bf_desc;
554eb6f0de0SAdrian Chadd
555eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
556eb6f0de0SAdrian Chadd __func__, bf_first->bf_state.bfs_nframes,
557eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_al);
558eb6f0de0SAdrian Chadd
5597d9dd2acSAdrian Chadd bf = bf_first;
5607d9dd2acSAdrian Chadd
5617d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0)
56283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n",
5637d9dd2acSAdrian Chadd __func__, bf, 0);
5647d9dd2acSAdrian Chadd if (bf->bf_state.bfs_rc[0].ratecode == 0)
56583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n",
5667d9dd2acSAdrian Chadd __func__, bf, 0);
5677d9dd2acSAdrian Chadd
568eb6f0de0SAdrian Chadd /*
5696e84772fSAdrian Chadd * Setup all descriptors of all subframes - this will
5706e84772fSAdrian Chadd * call ath_hal_set11naggrmiddle() on every frame.
571eb6f0de0SAdrian Chadd */
572eb6f0de0SAdrian Chadd while (bf != NULL) {
573eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
574eb6f0de0SAdrian Chadd "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
575eb6f0de0SAdrian Chadd __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
576eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno));
577eb6f0de0SAdrian Chadd
5786e84772fSAdrian Chadd /*
5796e84772fSAdrian Chadd * Setup the initial fields for the first descriptor - all
5806e84772fSAdrian Chadd * the non-11n specific stuff.
5816e84772fSAdrian Chadd */
5826e84772fSAdrian Chadd ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc
5836e84772fSAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */
5846e84772fSAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */
5856e84772fSAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */
5866e84772fSAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */
5876e84772fSAdrian Chadd , bf->bf_state.bfs_txrate0
5886e84772fSAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */
5896e84772fSAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */
5906e84772fSAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */
5916e84772fSAdrian Chadd , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */
5926e84772fSAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */
5936e84772fSAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */
5946e84772fSAdrian Chadd );
5956e84772fSAdrian Chadd
5966e84772fSAdrian Chadd /*
5976e84772fSAdrian Chadd * First descriptor? Setup the rate control and initial
5986e84772fSAdrian Chadd * aggregate header information.
5996e84772fSAdrian Chadd */
6006e84772fSAdrian Chadd if (bf == bf_first) {
6016e84772fSAdrian Chadd /*
6026e84772fSAdrian Chadd * setup first desc with rate and aggr info
6036e84772fSAdrian Chadd */
6046e84772fSAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf);
6056e84772fSAdrian Chadd }
6066e84772fSAdrian Chadd
6076e84772fSAdrian Chadd /*
6086e84772fSAdrian Chadd * Setup the descriptors for a multi-descriptor frame.
6096e84772fSAdrian Chadd * This is both aggregate and non-aggregate aware.
6106e84772fSAdrian Chadd */
6116e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds0, bf,
6126e84772fSAdrian Chadd 1, /* is_aggr */
6136e84772fSAdrian Chadd !! (bf == bf_first), /* is_first_subframe */
6146e84772fSAdrian Chadd !! (bf->bf_next == NULL) /* is_last_subframe */
6156e84772fSAdrian Chadd );
6166e84772fSAdrian Chadd
6176e84772fSAdrian Chadd if (bf == bf_first) {
6186e84772fSAdrian Chadd /*
6196e84772fSAdrian Chadd * Initialise the first 11n aggregate with the
6206e84772fSAdrian Chadd * aggregate length and aggregate enable bits.
6216e84772fSAdrian Chadd */
6226e84772fSAdrian Chadd ath_hal_set11n_aggr_first(sc->sc_ah,
6236e84772fSAdrian Chadd ds0,
6246e84772fSAdrian Chadd bf->bf_state.bfs_al,
6256e84772fSAdrian Chadd bf->bf_state.bfs_ndelim);
6266e84772fSAdrian Chadd }
627eb6f0de0SAdrian Chadd
628eb6f0de0SAdrian Chadd /*
629eb6f0de0SAdrian Chadd * Link the last descriptor of the previous frame
630eb6f0de0SAdrian Chadd * to the beginning descriptor of this frame.
631eb6f0de0SAdrian Chadd */
632eb6f0de0SAdrian Chadd if (bf_prev != NULL)
633bb069955SAdrian Chadd ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds,
634bb069955SAdrian Chadd bf->bf_daddr);
635eb6f0de0SAdrian Chadd
636eb6f0de0SAdrian Chadd /* Save a copy so we can link the next descriptor in */
637eb6f0de0SAdrian Chadd bf_prev = bf;
638eb6f0de0SAdrian Chadd bf = bf->bf_next;
639eb6f0de0SAdrian Chadd }
640eb6f0de0SAdrian Chadd
641eb6f0de0SAdrian Chadd /*
642eb6f0de0SAdrian Chadd * Set the first descriptor bf_lastds field to point to
643eb6f0de0SAdrian Chadd * the last descriptor in the last subframe, that's where
644eb6f0de0SAdrian Chadd * the status update will occur.
645eb6f0de0SAdrian Chadd */
646eb6f0de0SAdrian Chadd bf_first->bf_lastds = bf_prev->bf_lastds;
647eb6f0de0SAdrian Chadd
648eb6f0de0SAdrian Chadd /*
649eb6f0de0SAdrian Chadd * And bf_last in the first descriptor points to the end of
650eb6f0de0SAdrian Chadd * the aggregate list.
651eb6f0de0SAdrian Chadd */
652eb6f0de0SAdrian Chadd bf_first->bf_last = bf_prev;
653eb6f0de0SAdrian Chadd
654bbdf3df1SAdrian Chadd /*
655bbdf3df1SAdrian Chadd * For non-AR9300 NICs, which require the rate control
656bbdf3df1SAdrian Chadd * in the final descriptor - let's set that up now.
657bbdf3df1SAdrian Chadd *
658bbdf3df1SAdrian Chadd * This is because the filltxdesc() HAL call doesn't
659bbdf3df1SAdrian Chadd * populate the last segment with rate control information
660bbdf3df1SAdrian Chadd * if firstSeg is also true. For non-aggregate frames
661bbdf3df1SAdrian Chadd * that is fine, as the first frame already has rate control
662bbdf3df1SAdrian Chadd * info. But if the last frame in an aggregate has one
663bbdf3df1SAdrian Chadd * descriptor, both firstseg and lastseg will be true and
664bbdf3df1SAdrian Chadd * the rate info isn't copied.
665bbdf3df1SAdrian Chadd *
666bbdf3df1SAdrian Chadd * This is inefficient on MIPS/ARM platforms that have
667bbdf3df1SAdrian Chadd * non-cachable memory for TX descriptors, but we'll just
668bbdf3df1SAdrian Chadd * make do for now.
669bbdf3df1SAdrian Chadd *
670bbdf3df1SAdrian Chadd * As to why the rate table is stashed in the last descriptor
671bbdf3df1SAdrian Chadd * rather than the first descriptor? Because proctxdesc()
672bbdf3df1SAdrian Chadd * is called on the final descriptor in an MPDU or A-MPDU -
673bbdf3df1SAdrian Chadd * ie, the one that gets updated by the hardware upon
674bbdf3df1SAdrian Chadd * completion. That way proctxdesc() doesn't need to know
675bbdf3df1SAdrian Chadd * about the first _and_ last TX descriptor.
676bbdf3df1SAdrian Chadd */
677bbdf3df1SAdrian Chadd ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0);
678bbdf3df1SAdrian Chadd
679eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
680eb6f0de0SAdrian Chadd }
681eb6f0de0SAdrian Chadd
68246634305SAdrian Chadd /*
68346634305SAdrian Chadd * Hand-off a frame to the multicast TX queue.
68446634305SAdrian Chadd *
68546634305SAdrian Chadd * This is a software TXQ which will be appended to the CAB queue
68646634305SAdrian Chadd * during the beacon setup code.
68746634305SAdrian Chadd *
68846634305SAdrian Chadd * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID
689fc56c9c5SAdrian Chadd * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated
69046634305SAdrian Chadd * with the actual hardware txq, or all of this will fall apart.
69146634305SAdrian Chadd *
69246634305SAdrian Chadd * XXX It may not be a bad idea to just stuff the QCU ID into bf_state
693fc56c9c5SAdrian Chadd * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated
69446634305SAdrian Chadd * correctly.
69546634305SAdrian Chadd */
696eb6f0de0SAdrian Chadd static void
ath_tx_handoff_mcast(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)697eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
698eb6f0de0SAdrian Chadd struct ath_buf *bf)
699eb6f0de0SAdrian Chadd {
700375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
701375307d4SAdrian Chadd
702eb6f0de0SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
703eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags));
70456a85978SAdrian Chadd
70597c9a8e8SAdrian Chadd /*
70697c9a8e8SAdrian Chadd * Ensure that the tx queue is the cabq, so things get
70797c9a8e8SAdrian Chadd * mapped correctly.
70897c9a8e8SAdrian Chadd */
70997c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) {
71083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
71197c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
71283bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue,
71397c9a8e8SAdrian Chadd txq->axq_qnum);
71497c9a8e8SAdrian Chadd }
71597c9a8e8SAdrian Chadd
71656a85978SAdrian Chadd ATH_TXQ_LOCK(txq);
7170891354cSAdrian Chadd if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) {
7180891354cSAdrian Chadd struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s);
719eb6f0de0SAdrian Chadd struct ieee80211_frame *wh;
720eb6f0de0SAdrian Chadd
721eb6f0de0SAdrian Chadd /* mark previous frame */
7220891354cSAdrian Chadd wh = mtod(bf_last->bf_m, struct ieee80211_frame *);
723eb6f0de0SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
7240891354cSAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap,
725eb6f0de0SAdrian Chadd BUS_DMASYNC_PREWRITE);
726eb6f0de0SAdrian Chadd
727eb6f0de0SAdrian Chadd /* link descriptor */
7280891354cSAdrian Chadd ath_hal_settxdesclink(sc->sc_ah,
7290891354cSAdrian Chadd bf_last->bf_lastds,
7300891354cSAdrian Chadd bf->bf_daddr);
731eb6f0de0SAdrian Chadd }
732eb6f0de0SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
733b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq);
734eb6f0de0SAdrian Chadd }
735eb6f0de0SAdrian Chadd
736eb6f0de0SAdrian Chadd /*
737eb6f0de0SAdrian Chadd * Hand-off packet to a hardware queue.
738eb6f0de0SAdrian Chadd */
739eb6f0de0SAdrian Chadd static void
ath_tx_handoff_hw(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)740d4365d16SAdrian Chadd ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
741d4365d16SAdrian Chadd struct ath_buf *bf)
742eb6f0de0SAdrian Chadd {
743eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah;
7449be82a42SAdrian Chadd struct ath_buf *bf_first;
74581a82688SAdrian Chadd
746b8e788a5SAdrian Chadd /*
747b8e788a5SAdrian Chadd * Insert the frame on the outbound list and pass it on
748b8e788a5SAdrian Chadd * to the hardware. Multicast frames buffered for power
749b8e788a5SAdrian Chadd * save stations and transmit from the CAB queue are stored
750b8e788a5SAdrian Chadd * on a s/w only queue and loaded on to the CAB queue in
751b8e788a5SAdrian Chadd * the SWBA handler since frames only go out on DTIM and
752b8e788a5SAdrian Chadd * to avoid possible races.
753b8e788a5SAdrian Chadd */
754375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
755b8e788a5SAdrian Chadd KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
756eb6f0de0SAdrian Chadd ("%s: busy status 0x%x", __func__, bf->bf_flags));
757eb6f0de0SAdrian Chadd KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
758eb6f0de0SAdrian Chadd ("ath_tx_handoff_hw called for mcast queue"));
759eb6f0de0SAdrian Chadd
7609be82a42SAdrian Chadd /*
761f5c30c4eSAdrian Chadd * XXX We should instead just verify that sc_txstart_cnt
762f5c30c4eSAdrian Chadd * or ath_txproc_cnt > 0. That would mean that
763f5c30c4eSAdrian Chadd * the reset is going to be waiting for us to complete.
7649be82a42SAdrian Chadd */
765f5c30c4eSAdrian Chadd if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) {
766f5c30c4eSAdrian Chadd device_printf(sc->sc_dev,
767f5c30c4eSAdrian Chadd "%s: TX dispatch without holding txcount/txstart refcnt!\n",
768ef27340cSAdrian Chadd __func__);
769ef27340cSAdrian Chadd }
770f5c30c4eSAdrian Chadd
771f5c30c4eSAdrian Chadd /*
772f5c30c4eSAdrian Chadd * XXX .. this is going to cause the hardware to get upset;
773f5c30c4eSAdrian Chadd * so we really should find some way to drop or queue
774f5c30c4eSAdrian Chadd * things.
775f5c30c4eSAdrian Chadd */
776ef27340cSAdrian Chadd
777b837332dSAdrian Chadd ATH_TXQ_LOCK(txq);
778b8e788a5SAdrian Chadd
779b8e788a5SAdrian Chadd /*
7809be82a42SAdrian Chadd * XXX TODO: if there's a holdingbf, then
7819be82a42SAdrian Chadd * ATH_TXQ_PUTRUNNING should be clear.
7829be82a42SAdrian Chadd *
7839be82a42SAdrian Chadd * If there is a holdingbf and the list is empty,
7849be82a42SAdrian Chadd * then axq_link should be pointing to the holdingbf.
7859be82a42SAdrian Chadd *
7869be82a42SAdrian Chadd * Otherwise it should point to the last descriptor
7879be82a42SAdrian Chadd * in the last ath_buf.
7889be82a42SAdrian Chadd *
7899be82a42SAdrian Chadd * In any case, we should really ensure that we
7909be82a42SAdrian Chadd * update the previous descriptor link pointer to
7919be82a42SAdrian Chadd * this descriptor, regardless of all of the above state.
7929be82a42SAdrian Chadd *
7939be82a42SAdrian Chadd * For now this is captured by having axq_link point
7949be82a42SAdrian Chadd * to either the holdingbf (if the TXQ list is empty)
7959be82a42SAdrian Chadd * or the end of the list (if the TXQ list isn't empty.)
7969be82a42SAdrian Chadd * I'd rather just kill axq_link here and do it as above.
797b8e788a5SAdrian Chadd */
79803682514SAdrian Chadd
799b8e788a5SAdrian Chadd /*
8009be82a42SAdrian Chadd * Append the frame to the TX queue.
801b8e788a5SAdrian Chadd */
802b8e788a5SAdrian Chadd ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
803b1dddc28SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3,
804b1dddc28SAdrian Chadd "ath_tx_handoff: non-tdma: txq=%u, add bf=%p "
80503682514SAdrian Chadd "depth=%d",
80603682514SAdrian Chadd txq->axq_qnum,
80703682514SAdrian Chadd bf,
80803682514SAdrian Chadd txq->axq_depth);
80903682514SAdrian Chadd
8109be82a42SAdrian Chadd /*
8119be82a42SAdrian Chadd * If there's a link pointer, update it.
8129be82a42SAdrian Chadd *
8139be82a42SAdrian Chadd * XXX we should replace this with the above logic, just
8149be82a42SAdrian Chadd * to kill axq_link with fire.
8159be82a42SAdrian Chadd */
8169be82a42SAdrian Chadd if (txq->axq_link != NULL) {
817b8e788a5SAdrian Chadd *txq->axq_link = bf->bf_daddr;
818b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT,
819b8e788a5SAdrian Chadd "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
820b8e788a5SAdrian Chadd txq->axq_qnum, txq->axq_link,
821d4365d16SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc,
822d4365d16SAdrian Chadd txq->axq_depth);
82303682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5,
82403682514SAdrian Chadd "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) "
82503682514SAdrian Chadd "lastds=%d",
82603682514SAdrian Chadd txq->axq_qnum, txq->axq_link,
82703682514SAdrian Chadd (caddr_t)bf->bf_daddr, bf->bf_desc,
82803682514SAdrian Chadd bf->bf_lastds);
829b8e788a5SAdrian Chadd }
83097c9a8e8SAdrian Chadd
8319be82a42SAdrian Chadd /*
8329be82a42SAdrian Chadd * If we've not pushed anything into the hardware yet,
8339be82a42SAdrian Chadd * push the head of the queue into the TxDP.
8349be82a42SAdrian Chadd *
8359be82a42SAdrian Chadd * Once we've started DMA, there's no guarantee that
8369be82a42SAdrian Chadd * updating the TxDP with a new value will actually work.
8379be82a42SAdrian Chadd * So we just don't do that - if we hit the end of the list,
8389be82a42SAdrian Chadd * we keep that buffer around (the "holding buffer") and
8399be82a42SAdrian Chadd * re-start DMA by updating the link pointer of _that_
8409be82a42SAdrian Chadd * descriptor and then restart DMA.
8419be82a42SAdrian Chadd */
8429be82a42SAdrian Chadd if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) {
8439be82a42SAdrian Chadd bf_first = TAILQ_FIRST(&txq->axq_q);
8449be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING;
8459be82a42SAdrian Chadd ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr);
8469be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT,
8479be82a42SAdrian Chadd "%s: TXDP[%u] = %p (%p) depth %d\n",
8489be82a42SAdrian Chadd __func__, txq->axq_qnum,
8499be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
8509be82a42SAdrian Chadd txq->axq_depth);
8519be82a42SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 5,
8529be82a42SAdrian Chadd "ath_tx_handoff: TXDP[%u] = %p (%p) "
8539be82a42SAdrian Chadd "lastds=%p depth %d",
8549be82a42SAdrian Chadd txq->axq_qnum,
8559be82a42SAdrian Chadd (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
8569be82a42SAdrian Chadd bf_first->bf_lastds,
8579be82a42SAdrian Chadd txq->axq_depth);
8589be82a42SAdrian Chadd }
8599be82a42SAdrian Chadd
8609be82a42SAdrian Chadd /*
8619be82a42SAdrian Chadd * Ensure that the bf TXQ matches this TXQ, so later
8629be82a42SAdrian Chadd * checking and holding buffer manipulation is sane.
8639be82a42SAdrian Chadd */
86497c9a8e8SAdrian Chadd if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) {
86583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
86697c9a8e8SAdrian Chadd "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
86783bbd5ebSRui Paulo __func__, bf, bf->bf_state.bfs_tx_queue,
86897c9a8e8SAdrian Chadd txq->axq_qnum);
86997c9a8e8SAdrian Chadd }
87097c9a8e8SAdrian Chadd
8719be82a42SAdrian Chadd /*
8729be82a42SAdrian Chadd * Track aggregate queue depth.
8739be82a42SAdrian Chadd */
8746edf1dc7SAdrian Chadd if (bf->bf_state.bfs_aggr)
8756edf1dc7SAdrian Chadd txq->axq_aggr_depth++;
8769be82a42SAdrian Chadd
8779be82a42SAdrian Chadd /*
8789be82a42SAdrian Chadd * Update the link pointer.
8799be82a42SAdrian Chadd */
880bb069955SAdrian Chadd ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link);
8819be82a42SAdrian Chadd
8829be82a42SAdrian Chadd /*
8839be82a42SAdrian Chadd * Start DMA.
8849be82a42SAdrian Chadd *
8859be82a42SAdrian Chadd * If we wrote a TxDP above, DMA will start from here.
8869be82a42SAdrian Chadd *
8879be82a42SAdrian Chadd * If DMA is running, it'll do nothing.
8889be82a42SAdrian Chadd *
8899be82a42SAdrian Chadd * If the DMA engine hit the end of the QCU list (ie LINK=NULL,
8909be82a42SAdrian Chadd * or VEOL) then it stops at the last transmitted write.
8919be82a42SAdrian Chadd * We then append a new frame by updating the link pointer
8929be82a42SAdrian Chadd * in that descriptor and then kick TxE here; it will re-read
8939be82a42SAdrian Chadd * that last descriptor and find the new descriptor to transmit.
8949be82a42SAdrian Chadd *
8959be82a42SAdrian Chadd * This is why we keep the holding descriptor around.
8969be82a42SAdrian Chadd */
897b8e788a5SAdrian Chadd ath_hal_txstart(ah, txq->axq_qnum);
898b837332dSAdrian Chadd ATH_TXQ_UNLOCK(txq);
89903682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 1,
90003682514SAdrian Chadd "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum);
901b8e788a5SAdrian Chadd }
902eb6f0de0SAdrian Chadd
903eb6f0de0SAdrian Chadd /*
904eb6f0de0SAdrian Chadd * Restart TX DMA for the given TXQ.
905eb6f0de0SAdrian Chadd *
906eb6f0de0SAdrian Chadd * This must be called whether the queue is empty or not.
907eb6f0de0SAdrian Chadd */
908746bab5bSAdrian Chadd static void
ath_legacy_tx_dma_restart(struct ath_softc * sc,struct ath_txq * txq)909746bab5bSAdrian Chadd ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
910eb6f0de0SAdrian Chadd {
911b1f3262cSAdrian Chadd struct ath_buf *bf, *bf_last;
912eb6f0de0SAdrian Chadd
913b837332dSAdrian Chadd ATH_TXQ_LOCK_ASSERT(txq);
914eb6f0de0SAdrian Chadd
915b1f3262cSAdrian Chadd /* XXX make this ATH_TXQ_FIRST */
916eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&txq->axq_q);
917b1f3262cSAdrian Chadd bf_last = ATH_TXQ_LAST(txq, axq_q_s);
918b1f3262cSAdrian Chadd
919eb6f0de0SAdrian Chadd if (bf == NULL)
920eb6f0de0SAdrian Chadd return;
921eb6f0de0SAdrian Chadd
9229be82a42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_RESET,
9239be82a42SAdrian Chadd "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n",
9249be82a42SAdrian Chadd __func__,
9259be82a42SAdrian Chadd txq->axq_qnum,
9269be82a42SAdrian Chadd bf,
9279be82a42SAdrian Chadd bf_last,
9289be82a42SAdrian Chadd (uint32_t) bf->bf_daddr);
9299be82a42SAdrian Chadd
9306112d22cSAdrian Chadd #ifdef ATH_DEBUG
9319be82a42SAdrian Chadd if (sc->sc_debug & ATH_DEBUG_RESET)
9329be82a42SAdrian Chadd ath_tx_dump(sc, txq);
9336112d22cSAdrian Chadd #endif
9349be82a42SAdrian Chadd
9359be82a42SAdrian Chadd /*
9369be82a42SAdrian Chadd * This is called from a restart, so DMA is known to be
9379be82a42SAdrian Chadd * completely stopped.
9389be82a42SAdrian Chadd */
9399be82a42SAdrian Chadd KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)),
9409be82a42SAdrian Chadd ("%s: Q%d: called with PUTRUNNING=1\n",
9419be82a42SAdrian Chadd __func__,
9429be82a42SAdrian Chadd txq->axq_qnum));
9439be82a42SAdrian Chadd
9449be82a42SAdrian Chadd ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr);
9459be82a42SAdrian Chadd txq->axq_flags |= ATH_TXQ_PUTRUNNING;
9469be82a42SAdrian Chadd
9476112d22cSAdrian Chadd ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds,
9486112d22cSAdrian Chadd &txq->axq_link);
9496112d22cSAdrian Chadd ath_hal_txstart(sc->sc_ah, txq->axq_qnum);
950eb6f0de0SAdrian Chadd }
951eb6f0de0SAdrian Chadd
952eb6f0de0SAdrian Chadd /*
953eb6f0de0SAdrian Chadd * Hand off a packet to the hardware (or mcast queue.)
954eb6f0de0SAdrian Chadd *
955eb6f0de0SAdrian Chadd * The relevant hardware txq should be locked.
956eb6f0de0SAdrian Chadd */
957eb6f0de0SAdrian Chadd static void
ath_legacy_xmit_handoff(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)958746bab5bSAdrian Chadd ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
959746bab5bSAdrian Chadd struct ath_buf *bf)
960eb6f0de0SAdrian Chadd {
961375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
962eb6f0de0SAdrian Chadd
963bb327d28SAdrian Chadd #ifdef ATH_DEBUG_ALQ
964bb327d28SAdrian Chadd if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC))
965bb327d28SAdrian Chadd ath_tx_alq_post(sc, bf);
966bb327d28SAdrian Chadd #endif
967bb327d28SAdrian Chadd
968eb6f0de0SAdrian Chadd if (txq->axq_qnum == ATH_TXQ_SWQ)
969eb6f0de0SAdrian Chadd ath_tx_handoff_mcast(sc, txq, bf);
970eb6f0de0SAdrian Chadd else
971eb6f0de0SAdrian Chadd ath_tx_handoff_hw(sc, txq, bf);
972b8e788a5SAdrian Chadd }
973b8e788a5SAdrian Chadd
97481a82688SAdrian Chadd static int
ath_tx_tag_crypto(struct ath_softc * sc,struct ieee80211_node * ni,struct mbuf * m0,int iswep,int isfrag,int * hdrlen,int * pktlen,int * keyix)97581a82688SAdrian Chadd ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
976d4365d16SAdrian Chadd struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
977d4365d16SAdrian Chadd int *keyix)
97881a82688SAdrian Chadd {
97912be5b9cSAdrian Chadd DPRINTF(sc, ATH_DEBUG_XMIT,
98012be5b9cSAdrian Chadd "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
98112be5b9cSAdrian Chadd __func__,
98212be5b9cSAdrian Chadd *hdrlen,
98312be5b9cSAdrian Chadd *pktlen,
98412be5b9cSAdrian Chadd isfrag,
98512be5b9cSAdrian Chadd iswep,
98612be5b9cSAdrian Chadd m0);
98712be5b9cSAdrian Chadd
98881a82688SAdrian Chadd if (iswep) {
98981a82688SAdrian Chadd const struct ieee80211_cipher *cip;
99081a82688SAdrian Chadd struct ieee80211_key *k;
99181a82688SAdrian Chadd
99281a82688SAdrian Chadd /*
99381a82688SAdrian Chadd * Construct the 802.11 header+trailer for an encrypted
99481a82688SAdrian Chadd * frame. The only reason this can fail is because of an
99581a82688SAdrian Chadd * unknown or unsupported cipher/key type.
99681a82688SAdrian Chadd */
99781a82688SAdrian Chadd k = ieee80211_crypto_encap(ni, m0);
99881a82688SAdrian Chadd if (k == NULL) {
99981a82688SAdrian Chadd /*
100081a82688SAdrian Chadd * This can happen when the key is yanked after the
100181a82688SAdrian Chadd * frame was queued. Just discard the frame; the
100281a82688SAdrian Chadd * 802.11 layer counts failures and provides
100381a82688SAdrian Chadd * debugging/diagnostics.
100481a82688SAdrian Chadd */
1005d4365d16SAdrian Chadd return (0);
100681a82688SAdrian Chadd }
100781a82688SAdrian Chadd /*
100881a82688SAdrian Chadd * Adjust the packet + header lengths for the crypto
100981a82688SAdrian Chadd * additions and calculate the h/w key index. When
101081a82688SAdrian Chadd * a s/w mic is done the frame will have had any mic
101181a82688SAdrian Chadd * added to it prior to entry so m0->m_pkthdr.len will
101281a82688SAdrian Chadd * account for it. Otherwise we need to add it to the
101381a82688SAdrian Chadd * packet length.
101481a82688SAdrian Chadd */
101581a82688SAdrian Chadd cip = k->wk_cipher;
101681a82688SAdrian Chadd (*hdrlen) += cip->ic_header;
101781a82688SAdrian Chadd (*pktlen) += cip->ic_header + cip->ic_trailer;
101881a82688SAdrian Chadd /* NB: frags always have any TKIP MIC done in s/w */
101981a82688SAdrian Chadd if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
102081a82688SAdrian Chadd (*pktlen) += cip->ic_miclen;
102181a82688SAdrian Chadd (*keyix) = k->wk_keyix;
102281a82688SAdrian Chadd } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
102381a82688SAdrian Chadd /*
102481a82688SAdrian Chadd * Use station key cache slot, if assigned.
102581a82688SAdrian Chadd */
102681a82688SAdrian Chadd (*keyix) = ni->ni_ucastkey.wk_keyix;
102781a82688SAdrian Chadd if ((*keyix) == IEEE80211_KEYIX_NONE)
102881a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID;
102981a82688SAdrian Chadd } else
103081a82688SAdrian Chadd (*keyix) = HAL_TXKEYIX_INVALID;
103181a82688SAdrian Chadd
1032d4365d16SAdrian Chadd return (1);
103381a82688SAdrian Chadd }
103481a82688SAdrian Chadd
1035e2e4a2c2SAdrian Chadd /*
1036e2e4a2c2SAdrian Chadd * Calculate whether interoperability protection is required for
1037e2e4a2c2SAdrian Chadd * this frame.
1038e2e4a2c2SAdrian Chadd *
1039e2e4a2c2SAdrian Chadd * This requires the rate control information be filled in,
1040e2e4a2c2SAdrian Chadd * as the protection requirement depends upon the current
1041e2e4a2c2SAdrian Chadd * operating mode / PHY.
1042e2e4a2c2SAdrian Chadd */
1043e2e4a2c2SAdrian Chadd static void
ath_tx_calc_protection(struct ath_softc * sc,struct ath_buf * bf)1044e2e4a2c2SAdrian Chadd ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
1045e2e4a2c2SAdrian Chadd {
1046e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh;
1047e2e4a2c2SAdrian Chadd uint8_t rix;
1048e2e4a2c2SAdrian Chadd uint16_t flags;
1049e2e4a2c2SAdrian Chadd int shortPreamble;
1050e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates;
10517a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic;
1052e2e4a2c2SAdrian Chadd
1053e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags;
1054e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix;
1055e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream;
1056e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *);
1057e2e4a2c2SAdrian Chadd
10585abc0b25SAdrian Chadd /* Disable frame protection for TOA probe frames */
10595abc0b25SAdrian Chadd if (bf->bf_flags & ATH_BUF_TOA_PROBE) {
10605abc0b25SAdrian Chadd /* XXX count */
10615abc0b25SAdrian Chadd flags &= ~(HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA);
10625abc0b25SAdrian Chadd bf->bf_state.bfs_doprot = 0;
10635abc0b25SAdrian Chadd goto finish;
10645abc0b25SAdrian Chadd }
10655abc0b25SAdrian Chadd
1066e2e4a2c2SAdrian Chadd /*
1067e2e4a2c2SAdrian Chadd * If 802.11g protection is enabled, determine whether
1068e2e4a2c2SAdrian Chadd * to use RTS/CTS or just CTS. Note that this is only
1069e2e4a2c2SAdrian Chadd * done for OFDM unicast frames.
1070e2e4a2c2SAdrian Chadd */
1071e2e4a2c2SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1072e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_OFDM &&
1073e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) {
1074e2e4a2c2SAdrian Chadd bf->bf_state.bfs_doprot = 1;
1075e2e4a2c2SAdrian Chadd /* XXX fragments must use CCK rates w/ protection */
1076e2e4a2c2SAdrian Chadd if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
1077e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA;
1078e2e4a2c2SAdrian Chadd } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
1079e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_CTSENA;
1080e2e4a2c2SAdrian Chadd }
1081e2e4a2c2SAdrian Chadd /*
1082e2e4a2c2SAdrian Chadd * For frags it would be desirable to use the
1083e2e4a2c2SAdrian Chadd * highest CCK rate for RTS/CTS. But stations
1084e2e4a2c2SAdrian Chadd * farther away may detect it at a lower CCK rate
1085e2e4a2c2SAdrian Chadd * so use the configured protection rate instead
1086e2e4a2c2SAdrian Chadd * (for now).
1087e2e4a2c2SAdrian Chadd */
1088e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_protect++;
1089e2e4a2c2SAdrian Chadd }
1090e2e4a2c2SAdrian Chadd
1091e2e4a2c2SAdrian Chadd /*
1092e2e4a2c2SAdrian Chadd * If 11n protection is enabled and it's a HT frame,
1093e2e4a2c2SAdrian Chadd * enable RTS.
1094e2e4a2c2SAdrian Chadd *
1095e2e4a2c2SAdrian Chadd * XXX ic_htprotmode or ic_curhtprotmode?
1096e2e4a2c2SAdrian Chadd * XXX should it_htprotmode only matter if ic_curhtprotmode
1097e2e4a2c2SAdrian Chadd * XXX indicates it's not a HT pure environment?
1098e2e4a2c2SAdrian Chadd */
1099e2e4a2c2SAdrian Chadd if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
1100e2e4a2c2SAdrian Chadd rt->info[rix].phy == IEEE80211_T_HT &&
1101e2e4a2c2SAdrian Chadd (flags & HAL_TXDESC_NOACK) == 0) {
1102e2e4a2c2SAdrian Chadd flags |= HAL_TXDESC_RTSENA;
1103e2e4a2c2SAdrian Chadd sc->sc_stats.ast_tx_htprotect++;
1104e2e4a2c2SAdrian Chadd }
11055abc0b25SAdrian Chadd
11065abc0b25SAdrian Chadd finish:
1107e2e4a2c2SAdrian Chadd bf->bf_state.bfs_txflags = flags;
1108e2e4a2c2SAdrian Chadd }
1109e2e4a2c2SAdrian Chadd
1110e2e4a2c2SAdrian Chadd /*
1111e2e4a2c2SAdrian Chadd * Update the frame duration given the currently selected rate.
1112e2e4a2c2SAdrian Chadd *
1113e2e4a2c2SAdrian Chadd * This also updates the frame duration value, so it will require
1114e2e4a2c2SAdrian Chadd * a DMA flush.
1115e2e4a2c2SAdrian Chadd */
1116e2e4a2c2SAdrian Chadd static void
ath_tx_calc_duration(struct ath_softc * sc,struct ath_buf * bf)1117e2e4a2c2SAdrian Chadd ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
1118e2e4a2c2SAdrian Chadd {
1119e2e4a2c2SAdrian Chadd struct ieee80211_frame *wh;
1120e2e4a2c2SAdrian Chadd uint8_t rix;
1121e2e4a2c2SAdrian Chadd uint16_t flags;
1122e2e4a2c2SAdrian Chadd int shortPreamble;
1123e2e4a2c2SAdrian Chadd struct ath_hal *ah = sc->sc_ah;
1124e2e4a2c2SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates;
1125e2e4a2c2SAdrian Chadd int isfrag = bf->bf_m->m_flags & M_FRAG;
1126e2e4a2c2SAdrian Chadd
1127e2e4a2c2SAdrian Chadd flags = bf->bf_state.bfs_txflags;
1128e2e4a2c2SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix;
1129e2e4a2c2SAdrian Chadd shortPreamble = bf->bf_state.bfs_shpream;
1130e2e4a2c2SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *);
1131e2e4a2c2SAdrian Chadd
1132e2e4a2c2SAdrian Chadd /*
1133e2e4a2c2SAdrian Chadd * Calculate duration. This logically belongs in the 802.11
1134e2e4a2c2SAdrian Chadd * layer but it lacks sufficient information to calculate it.
1135e2e4a2c2SAdrian Chadd */
1136c249cc38SAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0 && !IEEE80211_IS_CTL(wh)) {
1137e2e4a2c2SAdrian Chadd u_int16_t dur;
1138e2e4a2c2SAdrian Chadd if (shortPreamble)
1139e2e4a2c2SAdrian Chadd dur = rt->info[rix].spAckDuration;
1140e2e4a2c2SAdrian Chadd else
1141e2e4a2c2SAdrian Chadd dur = rt->info[rix].lpAckDuration;
1142e2e4a2c2SAdrian Chadd if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1143e2e4a2c2SAdrian Chadd dur += dur; /* additional SIFS+ACK */
1144e2e4a2c2SAdrian Chadd /*
1145e2e4a2c2SAdrian Chadd * Include the size of next fragment so NAV is
1146e2e4a2c2SAdrian Chadd * updated properly. The last fragment uses only
1147e2e4a2c2SAdrian Chadd * the ACK duration
11489572684aSAdrian Chadd *
11499572684aSAdrian Chadd * XXX TODO: ensure that the rate lookup for each
11509572684aSAdrian Chadd * fragment is the same as the rate used by the
11519572684aSAdrian Chadd * first fragment!
1152e2e4a2c2SAdrian Chadd */
1153cd7dffd0SAdrian Chadd dur += ath_hal_computetxtime(ah,
1154cd7dffd0SAdrian Chadd rt,
1155cd7dffd0SAdrian Chadd bf->bf_nextfraglen,
11567ff1939dSAdrian Chadd rix, shortPreamble,
11577ff1939dSAdrian Chadd AH_TRUE);
1158e2e4a2c2SAdrian Chadd }
1159e2e4a2c2SAdrian Chadd if (isfrag) {
1160e2e4a2c2SAdrian Chadd /*
1161e2e4a2c2SAdrian Chadd * Force hardware to use computed duration for next
1162e2e4a2c2SAdrian Chadd * fragment by disabling multi-rate retry which updates
1163e2e4a2c2SAdrian Chadd * duration based on the multi-rate duration table.
1164e2e4a2c2SAdrian Chadd */
1165e2e4a2c2SAdrian Chadd bf->bf_state.bfs_ismrr = 0;
1166e2e4a2c2SAdrian Chadd bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
1167e2e4a2c2SAdrian Chadd /* XXX update bfs_rc[0].try? */
1168e2e4a2c2SAdrian Chadd }
1169e2e4a2c2SAdrian Chadd
1170e2e4a2c2SAdrian Chadd /* Update the duration field itself */
1171e2e4a2c2SAdrian Chadd *(u_int16_t *)wh->i_dur = htole16(dur);
1172e2e4a2c2SAdrian Chadd }
1173e2e4a2c2SAdrian Chadd }
1174e2e4a2c2SAdrian Chadd
1175e42b5dbaSAdrian Chadd static uint8_t
ath_tx_get_rtscts_rate(struct ath_hal * ah,const HAL_RATE_TABLE * rt,int cix,int shortPreamble)1176e42b5dbaSAdrian Chadd ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
1177eb6f0de0SAdrian Chadd int cix, int shortPreamble)
117879f02dbfSAdrian Chadd {
1179e42b5dbaSAdrian Chadd uint8_t ctsrate;
1180e42b5dbaSAdrian Chadd
118179f02dbfSAdrian Chadd /*
118279f02dbfSAdrian Chadd * CTS transmit rate is derived from the transmit rate
118379f02dbfSAdrian Chadd * by looking in the h/w rate table. We must also factor
118479f02dbfSAdrian Chadd * in whether or not a short preamble is to be used.
118579f02dbfSAdrian Chadd */
118679f02dbfSAdrian Chadd /* NB: cix is set above where RTS/CTS is enabled */
118779f02dbfSAdrian Chadd KASSERT(cix != 0xff, ("cix not setup"));
1188e42b5dbaSAdrian Chadd ctsrate = rt->info[cix].rateCode;
1189e42b5dbaSAdrian Chadd
1190e42b5dbaSAdrian Chadd /* XXX this should only matter for legacy rates */
1191e42b5dbaSAdrian Chadd if (shortPreamble)
1192e42b5dbaSAdrian Chadd ctsrate |= rt->info[cix].shortPreamble;
1193e42b5dbaSAdrian Chadd
1194d4365d16SAdrian Chadd return (ctsrate);
1195e42b5dbaSAdrian Chadd }
1196e42b5dbaSAdrian Chadd
1197e42b5dbaSAdrian Chadd /*
1198e42b5dbaSAdrian Chadd * Calculate the RTS/CTS duration for legacy frames.
1199e42b5dbaSAdrian Chadd */
1200e42b5dbaSAdrian Chadd static int
ath_tx_calc_ctsduration(struct ath_hal * ah,int rix,int cix,int shortPreamble,int pktlen,const HAL_RATE_TABLE * rt,int flags)1201e42b5dbaSAdrian Chadd ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
1202e42b5dbaSAdrian Chadd int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
1203e42b5dbaSAdrian Chadd int flags)
1204e42b5dbaSAdrian Chadd {
1205e42b5dbaSAdrian Chadd int ctsduration = 0;
1206e42b5dbaSAdrian Chadd
1207e42b5dbaSAdrian Chadd /* This mustn't be called for HT modes */
1208e42b5dbaSAdrian Chadd if (rt->info[cix].phy == IEEE80211_T_HT) {
1209e42b5dbaSAdrian Chadd printf("%s: HT rate where it shouldn't be (0x%x)\n",
1210e42b5dbaSAdrian Chadd __func__, rt->info[cix].rateCode);
1211d4365d16SAdrian Chadd return (-1);
1212e42b5dbaSAdrian Chadd }
1213e42b5dbaSAdrian Chadd
121479f02dbfSAdrian Chadd /*
121579f02dbfSAdrian Chadd * Compute the transmit duration based on the frame
121679f02dbfSAdrian Chadd * size and the size of an ACK frame. We call into the
121779f02dbfSAdrian Chadd * HAL to do the computation since it depends on the
121879f02dbfSAdrian Chadd * characteristics of the actual PHY being used.
121979f02dbfSAdrian Chadd *
122079f02dbfSAdrian Chadd * NB: CTS is assumed the same size as an ACK so we can
122179f02dbfSAdrian Chadd * use the precalculated ACK durations.
122279f02dbfSAdrian Chadd */
122379f02dbfSAdrian Chadd if (shortPreamble) {
122479f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
1225e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].spAckDuration;
1226e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah,
12277ff1939dSAdrian Chadd rt, pktlen, rix, AH_TRUE, AH_TRUE);
122879f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
1229e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].spAckDuration;
123079f02dbfSAdrian Chadd } else {
123179f02dbfSAdrian Chadd if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
1232e42b5dbaSAdrian Chadd ctsduration += rt->info[cix].lpAckDuration;
1233e42b5dbaSAdrian Chadd ctsduration += ath_hal_computetxtime(ah,
12347ff1939dSAdrian Chadd rt, pktlen, rix, AH_FALSE, AH_TRUE);
123579f02dbfSAdrian Chadd if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
1236e42b5dbaSAdrian Chadd ctsduration += rt->info[rix].lpAckDuration;
123779f02dbfSAdrian Chadd }
1238e42b5dbaSAdrian Chadd
1239d4365d16SAdrian Chadd return (ctsduration);
124079f02dbfSAdrian Chadd }
124179f02dbfSAdrian Chadd
1242eb6f0de0SAdrian Chadd /*
1243eb6f0de0SAdrian Chadd * Update the given ath_buf with updated rts/cts setup and duration
1244eb6f0de0SAdrian Chadd * values.
1245eb6f0de0SAdrian Chadd *
1246eb6f0de0SAdrian Chadd * To support rate lookups for each software retry, the rts/cts rate
1247eb6f0de0SAdrian Chadd * and cts duration must be re-calculated.
1248eb6f0de0SAdrian Chadd *
1249eb6f0de0SAdrian Chadd * This function assumes the RTS/CTS flags have been set as needed;
1250eb6f0de0SAdrian Chadd * mrr has been disabled; and the rate control lookup has been done.
1251eb6f0de0SAdrian Chadd *
1252eb6f0de0SAdrian Chadd * XXX TODO: MRR need only be disabled for the pre-11n NICs.
1253eb6f0de0SAdrian Chadd * XXX The 11n NICs support per-rate RTS/CTS configuration.
1254eb6f0de0SAdrian Chadd */
1255eb6f0de0SAdrian Chadd static void
ath_tx_set_rtscts(struct ath_softc * sc,struct ath_buf * bf)1256eb6f0de0SAdrian Chadd ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
1257eb6f0de0SAdrian Chadd {
1258eb6f0de0SAdrian Chadd uint16_t ctsduration = 0;
1259eb6f0de0SAdrian Chadd uint8_t ctsrate = 0;
1260eb6f0de0SAdrian Chadd uint8_t rix = bf->bf_state.bfs_rc[0].rix;
1261eb6f0de0SAdrian Chadd uint8_t cix = 0;
1262eb6f0de0SAdrian Chadd const HAL_RATE_TABLE *rt = sc->sc_currates;
1263eb6f0de0SAdrian Chadd
1264eb6f0de0SAdrian Chadd /*
1265eb6f0de0SAdrian Chadd * No RTS/CTS enabled? Don't bother.
1266eb6f0de0SAdrian Chadd */
1267875a9451SAdrian Chadd if ((bf->bf_state.bfs_txflags &
1268eb6f0de0SAdrian Chadd (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
1269eb6f0de0SAdrian Chadd /* XXX is this really needed? */
1270eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0;
1271eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0;
1272eb6f0de0SAdrian Chadd return;
1273eb6f0de0SAdrian Chadd }
1274eb6f0de0SAdrian Chadd
1275eb6f0de0SAdrian Chadd /*
1276eb6f0de0SAdrian Chadd * If protection is enabled, use the protection rix control
1277eb6f0de0SAdrian Chadd * rate. Otherwise use the rate0 control rate.
1278eb6f0de0SAdrian Chadd */
1279eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_doprot)
1280eb6f0de0SAdrian Chadd rix = sc->sc_protrix;
1281eb6f0de0SAdrian Chadd else
1282eb6f0de0SAdrian Chadd rix = bf->bf_state.bfs_rc[0].rix;
1283eb6f0de0SAdrian Chadd
1284eb6f0de0SAdrian Chadd /*
1285eb6f0de0SAdrian Chadd * If the raw path has hard-coded ctsrate0 to something,
1286eb6f0de0SAdrian Chadd * use it.
1287eb6f0de0SAdrian Chadd */
1288eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ctsrate0 != 0)
1289eb6f0de0SAdrian Chadd cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
1290eb6f0de0SAdrian Chadd else
1291eb6f0de0SAdrian Chadd /* Control rate from above */
1292eb6f0de0SAdrian Chadd cix = rt->info[rix].controlRate;
1293eb6f0de0SAdrian Chadd
1294eb6f0de0SAdrian Chadd /* Calculate the rtscts rate for the given cix */
1295eb6f0de0SAdrian Chadd ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
1296eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream);
1297eb6f0de0SAdrian Chadd
1298eb6f0de0SAdrian Chadd /* The 11n chipsets do ctsduration calculations for you */
1299eb6f0de0SAdrian Chadd if (! ath_tx_is_11n(sc))
1300eb6f0de0SAdrian Chadd ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
1301eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
1302875a9451SAdrian Chadd rt, bf->bf_state.bfs_txflags);
1303eb6f0de0SAdrian Chadd
1304eb6f0de0SAdrian Chadd /* Squirrel away in ath_buf */
1305eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = ctsrate;
1306eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = ctsduration;
1307eb6f0de0SAdrian Chadd
1308eb6f0de0SAdrian Chadd /*
1309eb6f0de0SAdrian Chadd * Must disable multi-rate retry when using RTS/CTS.
1310eb6f0de0SAdrian Chadd */
1311af017101SAdrian Chadd if (!sc->sc_mrrprot) {
1312eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = 0;
1313eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 =
1314eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
1315eb6f0de0SAdrian Chadd }
1316af017101SAdrian Chadd }
1317eb6f0de0SAdrian Chadd
1318eb6f0de0SAdrian Chadd /*
1319eb6f0de0SAdrian Chadd * Setup the descriptor chain for a normal or fast-frame
1320eb6f0de0SAdrian Chadd * frame.
132146634305SAdrian Chadd *
132246634305SAdrian Chadd * XXX TODO: extend to include the destination hardware QCU ID.
132346634305SAdrian Chadd * Make sure that is correct. Make sure that when being added
132446634305SAdrian Chadd * to the mcastq, the CABQ QCUID is set or things will get a bit
132546634305SAdrian Chadd * odd.
1326eb6f0de0SAdrian Chadd */
1327eb6f0de0SAdrian Chadd static void
ath_tx_setds(struct ath_softc * sc,struct ath_buf * bf)1328eb6f0de0SAdrian Chadd ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1329eb6f0de0SAdrian Chadd {
1330eb6f0de0SAdrian Chadd struct ath_desc *ds = bf->bf_desc;
1331eb6f0de0SAdrian Chadd struct ath_hal *ah = sc->sc_ah;
1332eb6f0de0SAdrian Chadd
13337d9dd2acSAdrian Chadd if (bf->bf_state.bfs_txrate0 == 0)
133483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
133583bbd5ebSRui Paulo "%s: bf=%p, txrate0=%d\n", __func__, bf, 0);
13367d9dd2acSAdrian Chadd
1337eb6f0de0SAdrian Chadd ath_hal_setuptxdesc(ah, ds
1338eb6f0de0SAdrian Chadd , bf->bf_state.bfs_pktlen /* packet length */
1339eb6f0de0SAdrian Chadd , bf->bf_state.bfs_hdrlen /* header length */
1340eb6f0de0SAdrian Chadd , bf->bf_state.bfs_atype /* Atheros packet type */
1341eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txpower /* txpower */
1342eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txrate0
1343eb6f0de0SAdrian Chadd , bf->bf_state.bfs_try0 /* series 0 rate/tries */
1344eb6f0de0SAdrian Chadd , bf->bf_state.bfs_keyix /* key cache index */
1345eb6f0de0SAdrian Chadd , bf->bf_state.bfs_txantenna /* antenna mode */
1346875a9451SAdrian Chadd , bf->bf_state.bfs_txflags /* flags */
1347eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsrate /* rts/cts rate */
1348eb6f0de0SAdrian Chadd , bf->bf_state.bfs_ctsduration /* rts/cts duration */
1349eb6f0de0SAdrian Chadd );
1350eb6f0de0SAdrian Chadd
1351eb6f0de0SAdrian Chadd /*
1352f9a9fe46SGordon Bergling * This will be overridden when the descriptor chain is written.
1353eb6f0de0SAdrian Chadd */
1354eb6f0de0SAdrian Chadd bf->bf_lastds = ds;
1355eb6f0de0SAdrian Chadd bf->bf_last = bf;
1356eb6f0de0SAdrian Chadd
1357d34a7347SAdrian Chadd /* Set rate control and descriptor chain for this frame */
1358d34a7347SAdrian Chadd ath_tx_set_ratectrl(sc, bf->bf_node, bf);
13596e84772fSAdrian Chadd ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0);
1360eb6f0de0SAdrian Chadd }
1361eb6f0de0SAdrian Chadd
1362eb6f0de0SAdrian Chadd /*
1363eb6f0de0SAdrian Chadd * Do a rate lookup.
1364eb6f0de0SAdrian Chadd *
1365eb6f0de0SAdrian Chadd * This performs a rate lookup for the given ath_buf only if it's required.
1366eb6f0de0SAdrian Chadd * Non-data frames and raw frames don't require it.
1367eb6f0de0SAdrian Chadd *
1368eb6f0de0SAdrian Chadd * This populates the primary and MRR entries; MRR values are
1369eb6f0de0SAdrian Chadd * then disabled later on if something requires it (eg RTS/CTS on
1370eb6f0de0SAdrian Chadd * pre-11n chipsets.
1371eb6f0de0SAdrian Chadd *
1372eb6f0de0SAdrian Chadd * This needs to be done before the RTS/CTS fields are calculated
1373eb6f0de0SAdrian Chadd * as they may depend upon the rate chosen.
1374eb6f0de0SAdrian Chadd */
1375eb6f0de0SAdrian Chadd static void
ath_tx_do_ratelookup(struct ath_softc * sc,struct ath_buf * bf,int tid,int pktlen,int is_aggr)137684f950a5SAdrian Chadd ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf, int tid,
1377cce63444SAdrian Chadd int pktlen, int is_aggr)
1378eb6f0de0SAdrian Chadd {
1379eb6f0de0SAdrian Chadd uint8_t rate, rix;
1380eb6f0de0SAdrian Chadd int try0;
138184f950a5SAdrian Chadd int maxdur; // Note: Unused for now
1382cce63444SAdrian Chadd int maxpktlen;
1383eb6f0de0SAdrian Chadd
1384eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_doratelookup)
1385eb6f0de0SAdrian Chadd return;
1386eb6f0de0SAdrian Chadd
1387eb6f0de0SAdrian Chadd /* Get rid of any previous state */
1388eb6f0de0SAdrian Chadd bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1389eb6f0de0SAdrian Chadd
1390eb6f0de0SAdrian Chadd ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1391eb6f0de0SAdrian Chadd ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1392cce63444SAdrian Chadd pktlen, tid, is_aggr, &rix, &try0, &rate, &maxdur, &maxpktlen);
1393eb6f0de0SAdrian Chadd
1394eb6f0de0SAdrian Chadd /* In case MRR is disabled, make sure rc[0] is setup correctly */
1395eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix;
1396eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = rate;
1397eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0;
1398eb6f0de0SAdrian Chadd
1399eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1400eb6f0de0SAdrian Chadd ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1401051ea90cSAdrian Chadd is_aggr, bf->bf_state.bfs_rc);
1402eb6f0de0SAdrian Chadd ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1403eb6f0de0SAdrian Chadd
1404eb6f0de0SAdrian Chadd sc->sc_txrix = rix; /* for LED blinking */
1405eb6f0de0SAdrian Chadd sc->sc_lastdatarix = rix; /* for fast frames */
1406eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0;
1407eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = rate;
1408cce63444SAdrian Chadd bf->bf_state.bfs_rc_maxpktlen = maxpktlen;
1409eb6f0de0SAdrian Chadd }
1410eb6f0de0SAdrian Chadd
1411eb6f0de0SAdrian Chadd /*
14120c54de88SAdrian Chadd * Update the CLRDMASK bit in the ath_buf if it needs to be set.
14130c54de88SAdrian Chadd */
14140c54de88SAdrian Chadd static void
ath_tx_update_clrdmask(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)14150c54de88SAdrian Chadd ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid,
14160c54de88SAdrian Chadd struct ath_buf *bf)
14170c54de88SAdrian Chadd {
14184f25ddbbSAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node);
14190c54de88SAdrian Chadd
1420375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
14210c54de88SAdrian Chadd
14224f25ddbbSAdrian Chadd if (an->clrdmask == 1) {
14230c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
14244f25ddbbSAdrian Chadd an->clrdmask = 0;
14250c54de88SAdrian Chadd }
14260c54de88SAdrian Chadd }
14270c54de88SAdrian Chadd
14280c54de88SAdrian Chadd /*
142922a3aee6SAdrian Chadd * Return whether this frame should be software queued or
143022a3aee6SAdrian Chadd * direct dispatched.
143122a3aee6SAdrian Chadd *
143222a3aee6SAdrian Chadd * When doing powersave, BAR frames should be queued but other management
143322a3aee6SAdrian Chadd * frames should be directly sent.
143422a3aee6SAdrian Chadd *
143522a3aee6SAdrian Chadd * When not doing powersave, stick BAR frames into the hardware queue
143622a3aee6SAdrian Chadd * so it goes out even though the queue is paused.
143722a3aee6SAdrian Chadd *
143822a3aee6SAdrian Chadd * For now, management frames are also software queued by default.
143922a3aee6SAdrian Chadd */
144022a3aee6SAdrian Chadd static int
ath_tx_should_swq_frame(struct ath_softc * sc,struct ath_node * an,struct mbuf * m0,int * queue_to_head)144122a3aee6SAdrian Chadd ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an,
144222a3aee6SAdrian Chadd struct mbuf *m0, int *queue_to_head)
144322a3aee6SAdrian Chadd {
144422a3aee6SAdrian Chadd struct ieee80211_node *ni = &an->an_node;
144522a3aee6SAdrian Chadd struct ieee80211_frame *wh;
144622a3aee6SAdrian Chadd uint8_t type, subtype;
144722a3aee6SAdrian Chadd
144822a3aee6SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
144922a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
145022a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
145122a3aee6SAdrian Chadd
145222a3aee6SAdrian Chadd (*queue_to_head) = 0;
145322a3aee6SAdrian Chadd
145422a3aee6SAdrian Chadd /* If it's not in powersave - direct-dispatch BAR */
145522a3aee6SAdrian Chadd if ((ATH_NODE(ni)->an_is_powersave == 0)
145622a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL &&
145722a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) {
145822a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
145922a3aee6SAdrian Chadd "%s: BAR: TX'ing direct\n", __func__);
146022a3aee6SAdrian Chadd return (0);
146122a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1)
146222a3aee6SAdrian Chadd && type == IEEE80211_FC0_TYPE_CTL &&
146322a3aee6SAdrian Chadd subtype == IEEE80211_FC0_SUBTYPE_BAR) {
146422a3aee6SAdrian Chadd /* BAR TX whilst asleep; queue */
146522a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
146622a3aee6SAdrian Chadd "%s: swq: TX'ing\n", __func__);
146722a3aee6SAdrian Chadd (*queue_to_head) = 1;
146822a3aee6SAdrian Chadd return (1);
146922a3aee6SAdrian Chadd } else if ((ATH_NODE(ni)->an_is_powersave == 1)
147022a3aee6SAdrian Chadd && (type == IEEE80211_FC0_TYPE_MGT ||
147122a3aee6SAdrian Chadd type == IEEE80211_FC0_TYPE_CTL)) {
147222a3aee6SAdrian Chadd /*
147322a3aee6SAdrian Chadd * Other control/mgmt frame; bypass software queuing
147422a3aee6SAdrian Chadd * for now!
147522a3aee6SAdrian Chadd */
147683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
147722a3aee6SAdrian Chadd "%s: %6D: Node is asleep; sending mgmt "
147822a3aee6SAdrian Chadd "(type=%d, subtype=%d)\n",
147983bbd5ebSRui Paulo __func__, ni->ni_macaddr, ":", type, subtype);
148022a3aee6SAdrian Chadd return (0);
148122a3aee6SAdrian Chadd } else {
148222a3aee6SAdrian Chadd return (1);
148322a3aee6SAdrian Chadd }
148422a3aee6SAdrian Chadd }
148522a3aee6SAdrian Chadd
148622a3aee6SAdrian Chadd /*
1487eb6f0de0SAdrian Chadd * Transmit the given frame to the hardware.
1488eb6f0de0SAdrian Chadd *
1489eb6f0de0SAdrian Chadd * The frame must already be setup; rate control must already have
1490eb6f0de0SAdrian Chadd * been done.
1491eb6f0de0SAdrian Chadd *
1492eb6f0de0SAdrian Chadd * XXX since the TXQ lock is being held here (and I dislike holding
1493eb6f0de0SAdrian Chadd * it for this long when not doing software aggregation), later on
1494eb6f0de0SAdrian Chadd * break this function into "setup_normal" and "xmit_normal". The
1495eb6f0de0SAdrian Chadd * lock only needs to be held for the ath_tx_handoff call.
149622a3aee6SAdrian Chadd *
149722a3aee6SAdrian Chadd * XXX we don't update the leak count here - if we're doing
149822a3aee6SAdrian Chadd * direct frame dispatch, we need to be able to do it without
149922a3aee6SAdrian Chadd * decrementing the leak count (eg multicast queue frames.)
1500eb6f0de0SAdrian Chadd */
1501eb6f0de0SAdrian Chadd static void
ath_tx_xmit_normal(struct ath_softc * sc,struct ath_txq * txq,struct ath_buf * bf)1502eb6f0de0SAdrian Chadd ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1503eb6f0de0SAdrian Chadd struct ath_buf *bf)
1504eb6f0de0SAdrian Chadd {
15050c54de88SAdrian Chadd struct ath_node *an = ATH_NODE(bf->bf_node);
15060c54de88SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
1507eb6f0de0SAdrian Chadd
1508375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
1509eb6f0de0SAdrian Chadd
15100c54de88SAdrian Chadd /*
15110c54de88SAdrian Chadd * For now, just enable CLRDMASK. ath_tx_xmit_normal() does
15120c54de88SAdrian Chadd * set a completion handler however it doesn't (yet) properly
15130c54de88SAdrian Chadd * handle the strict ordering requirements needed for normal,
15140c54de88SAdrian Chadd * non-aggregate session frames.
15150c54de88SAdrian Chadd *
15160c54de88SAdrian Chadd * Once this is implemented, only set CLRDMASK like this for
15170c54de88SAdrian Chadd * frames that must go out - eg management/raw frames.
15180c54de88SAdrian Chadd */
15190c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
15200c54de88SAdrian Chadd
1521eb6f0de0SAdrian Chadd /* Setup the descriptor before handoff */
1522cce63444SAdrian Chadd ath_tx_do_ratelookup(sc, bf, tid->tid, bf->bf_state.bfs_pktlen, false);
1523e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf);
1524e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf);
1525eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf);
1526e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf);
1527eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf);
1528eb6f0de0SAdrian Chadd
15290c54de88SAdrian Chadd /* Track per-TID hardware queue depth correctly */
15300c54de88SAdrian Chadd tid->hwq_depth++;
15310c54de88SAdrian Chadd
15320c54de88SAdrian Chadd /* Assign the completion handler */
15330c54de88SAdrian Chadd bf->bf_comp = ath_tx_normal_comp;
15344e81f27cSAdrian Chadd
1535eb6f0de0SAdrian Chadd /* Hand off to hardware */
1536eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf);
1537eb6f0de0SAdrian Chadd }
1538eb6f0de0SAdrian Chadd
1539d05b576dSAdrian Chadd /*
1540d05b576dSAdrian Chadd * Do the basic frame setup stuff that's required before the frame
1541d05b576dSAdrian Chadd * is added to a software queue.
1542d05b576dSAdrian Chadd *
1543d05b576dSAdrian Chadd * All frames get mostly the same treatment and it's done once.
1544d05b576dSAdrian Chadd * Retransmits fiddle with things like the rate control setup,
1545d05b576dSAdrian Chadd * setting the retransmit bit in the packet; doing relevant DMA/bus
1546d05b576dSAdrian Chadd * syncing and relinking it (back) into the hardware TX queue.
1547d05b576dSAdrian Chadd *
1548d05b576dSAdrian Chadd * Note that this may cause the mbuf to be reallocated, so
1549d05b576dSAdrian Chadd * m0 may not be valid.
1550d05b576dSAdrian Chadd */
1551eb6f0de0SAdrian Chadd static int
ath_tx_normal_setup(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0,struct ath_txq * txq)1552eb6f0de0SAdrian Chadd ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1553b43facbfSAdrian Chadd struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1554b8e788a5SAdrian Chadd {
1555b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap;
15567a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic;
1557b8e788a5SAdrian Chadd int error, iswep, ismcast, isfrag, ismrr;
1558eb6f0de0SAdrian Chadd int keyix, hdrlen, pktlen, try0 = 0;
1559eb6f0de0SAdrian Chadd u_int8_t rix = 0, txrate = 0;
1560b8e788a5SAdrian Chadd struct ath_desc *ds;
1561b8e788a5SAdrian Chadd struct ieee80211_frame *wh;
1562eb6f0de0SAdrian Chadd u_int subtype, flags;
1563b8e788a5SAdrian Chadd HAL_PKT_TYPE atype;
1564b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt;
1565b8e788a5SAdrian Chadd HAL_BOOL shortPreamble;
1566b8e788a5SAdrian Chadd struct ath_node *an;
156715e58d4dSAdrian Chadd
156815e58d4dSAdrian Chadd /* XXX TODO: this pri is only used for non-QoS check, right? */
1569b8e788a5SAdrian Chadd u_int pri;
1570b8e788a5SAdrian Chadd
15717561cb5cSAdrian Chadd /*
15727561cb5cSAdrian Chadd * To ensure that both sequence numbers and the CCMP PN handling
15737561cb5cSAdrian Chadd * is "correct", make sure that the relevant TID queue is locked.
15747561cb5cSAdrian Chadd * Otherwise the CCMP PN and seqno may appear out of order, causing
15757561cb5cSAdrian Chadd * re-ordered frames to have out of order CCMP PN's, resulting
15767561cb5cSAdrian Chadd * in many, many frame drops.
15777561cb5cSAdrian Chadd */
1578375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
15797561cb5cSAdrian Chadd
1580b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
15815945b5f5SKevin Lo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1582b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1583b8e788a5SAdrian Chadd isfrag = m0->m_flags & M_FRAG;
1584b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh);
1585b8e788a5SAdrian Chadd /*
1586b8e788a5SAdrian Chadd * Packet length must not include any
1587b8e788a5SAdrian Chadd * pad bytes; deduct them here.
1588b8e788a5SAdrian Chadd */
1589b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1590b8e788a5SAdrian Chadd
159181a82688SAdrian Chadd /* Handle encryption twiddling if needed */
1592eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1593eb6f0de0SAdrian Chadd &pktlen, &keyix)) {
1594d07be335SAdrian Chadd ieee80211_free_mbuf(m0);
1595b8e788a5SAdrian Chadd return EIO;
1596b8e788a5SAdrian Chadd }
1597b8e788a5SAdrian Chadd
1598b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */
1599b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
1600b8e788a5SAdrian Chadd
1601b8e788a5SAdrian Chadd pktlen += IEEE80211_CRC_LEN;
1602b8e788a5SAdrian Chadd
1603b8e788a5SAdrian Chadd /*
1604b8e788a5SAdrian Chadd * Load the DMA map so any coalescing is done. This
1605b8e788a5SAdrian Chadd * also calculates the number of descriptors we need.
1606b8e788a5SAdrian Chadd */
1607b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0);
1608b8e788a5SAdrian Chadd if (error != 0)
1609b8e788a5SAdrian Chadd return error;
1610f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
1611b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */
1612b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */
1613b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
1614b8e788a5SAdrian Chadd
1615b8e788a5SAdrian Chadd /* setup descriptors */
1616b8e788a5SAdrian Chadd ds = bf->bf_desc;
1617b8e788a5SAdrian Chadd rt = sc->sc_currates;
1618b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1619b8e788a5SAdrian Chadd
1620b8e788a5SAdrian Chadd /*
1621b8e788a5SAdrian Chadd * NB: the 802.11 layer marks whether or not we should
1622b8e788a5SAdrian Chadd * use short preamble based on the current mode and
1623b8e788a5SAdrian Chadd * negotiated parameters.
1624b8e788a5SAdrian Chadd */
1625b8e788a5SAdrian Chadd if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1626b8e788a5SAdrian Chadd (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1627b8e788a5SAdrian Chadd shortPreamble = AH_TRUE;
1628b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_shortpre++;
1629b8e788a5SAdrian Chadd } else {
1630b8e788a5SAdrian Chadd shortPreamble = AH_FALSE;
1631b8e788a5SAdrian Chadd }
1632b8e788a5SAdrian Chadd
1633b8e788a5SAdrian Chadd an = ATH_NODE(ni);
16344e81f27cSAdrian Chadd //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
16354e81f27cSAdrian Chadd flags = 0;
1636b8e788a5SAdrian Chadd ismrr = 0; /* default no multi-rate retry*/
163715e58d4dSAdrian Chadd
163815e58d4dSAdrian Chadd pri = ath_tx_getac(sc, m0); /* honor classification */
1639b8e788a5SAdrian Chadd /* XXX use txparams instead of fixed values */
1640b8e788a5SAdrian Chadd /*
1641b8e788a5SAdrian Chadd * Calculate Atheros packet type from IEEE80211 packet header,
1642b8e788a5SAdrian Chadd * setup for rate calculations, and select h/w transmit queue.
1643b8e788a5SAdrian Chadd */
1644b8e788a5SAdrian Chadd switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1645b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_MGT:
1646b8e788a5SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1647b8e788a5SAdrian Chadd if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1648b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_BEACON;
1649b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1650b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PROBE_RESP;
1651b8e788a5SAdrian Chadd else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1652b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_ATIM;
1653b8e788a5SAdrian Chadd else
1654b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* XXX */
1655b8e788a5SAdrian Chadd rix = an->an_mgmtrix;
1656b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode;
1657b8e788a5SAdrian Chadd if (shortPreamble)
1658b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble;
1659b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY;
1660b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1661b8e788a5SAdrian Chadd break;
1662b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_CTL:
1663b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */
1664b8e788a5SAdrian Chadd rix = an->an_mgmtrix;
1665b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode;
1666b8e788a5SAdrian Chadd if (shortPreamble)
1667b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble;
1668b8e788a5SAdrian Chadd try0 = ATH_TXMGTTRY;
1669b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */
1670b8e788a5SAdrian Chadd break;
1671b8e788a5SAdrian Chadd case IEEE80211_FC0_TYPE_DATA:
1672b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_NORMAL; /* default */
1673b8e788a5SAdrian Chadd /*
1674b8e788a5SAdrian Chadd * Data frames: multicast frames go out at a fixed rate,
1675b8e788a5SAdrian Chadd * EAPOL frames use the mgmt frame rate; otherwise consult
1676b8e788a5SAdrian Chadd * the rate control module for the rate to use.
1677b8e788a5SAdrian Chadd */
1678b8e788a5SAdrian Chadd if (ismcast) {
1679b8e788a5SAdrian Chadd rix = an->an_mcastrix;
1680b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode;
1681b8e788a5SAdrian Chadd if (shortPreamble)
1682b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble;
1683b8e788a5SAdrian Chadd try0 = 1;
1684b8e788a5SAdrian Chadd } else if (m0->m_flags & M_EAPOL) {
1685b8e788a5SAdrian Chadd /* XXX? maybe always use long preamble? */
1686b8e788a5SAdrian Chadd rix = an->an_mgmtrix;
1687b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode;
1688b8e788a5SAdrian Chadd if (shortPreamble)
1689b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble;
1690b8e788a5SAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */
1691b8e788a5SAdrian Chadd } else {
1692eb6f0de0SAdrian Chadd /*
1693eb6f0de0SAdrian Chadd * Do rate lookup on each TX, rather than using
1694eb6f0de0SAdrian Chadd * the hard-coded TX information decided here.
1695eb6f0de0SAdrian Chadd */
1696b8e788a5SAdrian Chadd ismrr = 1;
1697eb6f0de0SAdrian Chadd bf->bf_state.bfs_doratelookup = 1;
1698b8e788a5SAdrian Chadd }
16999fbe631aSAdrian Chadd
17009fbe631aSAdrian Chadd /*
17019fbe631aSAdrian Chadd * Check whether to set NOACK for this WME category or not.
17029fbe631aSAdrian Chadd */
17039fbe631aSAdrian Chadd if (ieee80211_wme_vap_ac_is_noack(vap, pri))
1704b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK;
1705b8e788a5SAdrian Chadd break;
1706b8e788a5SAdrian Chadd default:
170776e6fd5dSGleb Smirnoff device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n",
1708b8e788a5SAdrian Chadd wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1709b8e788a5SAdrian Chadd /* XXX statistic */
1710c23a9d98SAdrian Chadd /* XXX free tx dmamap */
1711d07be335SAdrian Chadd ieee80211_free_mbuf(m0);
1712b8e788a5SAdrian Chadd return EIO;
1713b8e788a5SAdrian Chadd }
1714b8e788a5SAdrian Chadd
1715447fd44aSAdrian Chadd /*
1716447fd44aSAdrian Chadd * There are two known scenarios where the frame AC doesn't match
1717447fd44aSAdrian Chadd * what the destination TXQ is.
1718447fd44aSAdrian Chadd *
1719447fd44aSAdrian Chadd * + non-QoS frames (eg management?) that the net80211 stack has
1720447fd44aSAdrian Chadd * assigned a higher AC to, but since it's a non-QoS TID, it's
1721447fd44aSAdrian Chadd * being thrown into TID 16. TID 16 gets the AC_BE queue.
1722447fd44aSAdrian Chadd * It's quite possible that management frames should just be
1723447fd44aSAdrian Chadd * direct dispatched to hardware rather than go via the software
1724447fd44aSAdrian Chadd * queue; that should be investigated in the future. There are
1725447fd44aSAdrian Chadd * some specific scenarios where this doesn't make sense, mostly
1726447fd44aSAdrian Chadd * surrounding ADDBA request/response - hence why that is special
1727447fd44aSAdrian Chadd * cased.
1728447fd44aSAdrian Chadd *
1729447fd44aSAdrian Chadd * + Multicast frames going into the VAP mcast queue. That shows up
1730447fd44aSAdrian Chadd * as "TXQ 11".
1731447fd44aSAdrian Chadd *
1732447fd44aSAdrian Chadd * This driver should eventually support separate TID and TXQ locking,
1733447fd44aSAdrian Chadd * allowing for arbitrary AC frames to appear on arbitrary software
1734447fd44aSAdrian Chadd * queues, being queued to the "correct" hardware queue when needed.
1735447fd44aSAdrian Chadd */
1736447fd44aSAdrian Chadd #if 0
17376deb7f32SAdrian Chadd if (txq != sc->sc_ac2q[pri]) {
173883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
17396deb7f32SAdrian Chadd "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
17406deb7f32SAdrian Chadd __func__,
17416deb7f32SAdrian Chadd txq,
17426deb7f32SAdrian Chadd txq->axq_qnum,
17436deb7f32SAdrian Chadd pri,
17446deb7f32SAdrian Chadd sc->sc_ac2q[pri],
17456deb7f32SAdrian Chadd sc->sc_ac2q[pri]->axq_qnum);
17466deb7f32SAdrian Chadd }
1747447fd44aSAdrian Chadd #endif
17486deb7f32SAdrian Chadd
1749b8e788a5SAdrian Chadd /*
1750b8e788a5SAdrian Chadd * Calculate miscellaneous flags.
1751b8e788a5SAdrian Chadd */
1752b8e788a5SAdrian Chadd if (ismcast) {
1753b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
1754b8e788a5SAdrian Chadd } else if (pktlen > vap->iv_rtsthreshold &&
1755b8e788a5SAdrian Chadd (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1756b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
1757b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_rts++;
1758b8e788a5SAdrian Chadd }
1759b8e788a5SAdrian Chadd if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */
1760b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_noack++;
1761b8e788a5SAdrian Chadd #ifdef IEEE80211_SUPPORT_TDMA
1762b8e788a5SAdrian Chadd if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1763b8e788a5SAdrian Chadd DPRINTF(sc, ATH_DEBUG_TDMA,
1764b8e788a5SAdrian Chadd "%s: discard frame, ACK required w/ TDMA\n", __func__);
1765b8e788a5SAdrian Chadd sc->sc_stats.ast_tdma_ack++;
1766c23a9d98SAdrian Chadd /* XXX free tx dmamap */
1767d07be335SAdrian Chadd ieee80211_free_mbuf(m0);
1768b8e788a5SAdrian Chadd return EIO;
1769b8e788a5SAdrian Chadd }
1770b8e788a5SAdrian Chadd #endif
1771b8e788a5SAdrian Chadd
17725abc0b25SAdrian Chadd /*
17735abc0b25SAdrian Chadd * If it's a frame to do location reporting on,
17745abc0b25SAdrian Chadd * communicate it to the HAL.
17755abc0b25SAdrian Chadd */
17765abc0b25SAdrian Chadd if (ieee80211_get_toa_params(m0, NULL)) {
17775abc0b25SAdrian Chadd device_printf(sc->sc_dev,
17785abc0b25SAdrian Chadd "%s: setting TX positioning bit\n", __func__);
17795abc0b25SAdrian Chadd flags |= HAL_TXDESC_POS;
17805abc0b25SAdrian Chadd
17815abc0b25SAdrian Chadd /*
17825abc0b25SAdrian Chadd * Note: The hardware reports timestamps for
17835abc0b25SAdrian Chadd * each of the RX'ed packets as part of the packet
17845abc0b25SAdrian Chadd * exchange. So this means things like RTS/CTS
17855abc0b25SAdrian Chadd * exchanges, as well as the final ACK.
17865abc0b25SAdrian Chadd *
17875abc0b25SAdrian Chadd * So, if you send a RTS-protected NULL data frame,
17885abc0b25SAdrian Chadd * you'll get an RX report for the RTS response, then
17895abc0b25SAdrian Chadd * an RX report for the NULL frame, and then the TX
17905abc0b25SAdrian Chadd * completion at the end.
17915abc0b25SAdrian Chadd *
17925abc0b25SAdrian Chadd * NOTE: it doesn't work right for CCK frames;
17935abc0b25SAdrian Chadd * there's no channel info data provided unless
17945abc0b25SAdrian Chadd * it's OFDM or HT. Will have to dig into it.
17955abc0b25SAdrian Chadd */
17965abc0b25SAdrian Chadd flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
17975abc0b25SAdrian Chadd bf->bf_flags |= ATH_BUF_TOA_PROBE;
17985abc0b25SAdrian Chadd }
17995abc0b25SAdrian Chadd
1800bcf5fc49SAdrian Chadd #if 0
1801bcf5fc49SAdrian Chadd /*
1802bcf5fc49SAdrian Chadd * Placeholder: if you want to transmit with the azimuth
1803bcf5fc49SAdrian Chadd * timestamp in the end of the payload, here's where you
1804bcf5fc49SAdrian Chadd * should set the TXDESC field.
1805bcf5fc49SAdrian Chadd */
1806bcf5fc49SAdrian Chadd flags |= HAL_TXDESC_HWTS;
1807bcf5fc49SAdrian Chadd #endif
1808bcf5fc49SAdrian Chadd
1809b8e788a5SAdrian Chadd /*
1810eb6f0de0SAdrian Chadd * Determine if a tx interrupt should be generated for
1811eb6f0de0SAdrian Chadd * this descriptor. We take a tx interrupt to reap
1812eb6f0de0SAdrian Chadd * descriptors when the h/w hits an EOL condition or
1813eb6f0de0SAdrian Chadd * when the descriptor is specifically marked to generate
1814eb6f0de0SAdrian Chadd * an interrupt. We periodically mark descriptors in this
1815eb6f0de0SAdrian Chadd * way to insure timely replenishing of the supply needed
1816eb6f0de0SAdrian Chadd * for sending frames. Defering interrupts reduces system
1817eb6f0de0SAdrian Chadd * load and potentially allows more concurrent work to be
1818eb6f0de0SAdrian Chadd * done but if done to aggressively can cause senders to
1819eb6f0de0SAdrian Chadd * backup.
1820eb6f0de0SAdrian Chadd *
1821eb6f0de0SAdrian Chadd * NB: use >= to deal with sc_txintrperiod changing
1822eb6f0de0SAdrian Chadd * dynamically through sysctl.
1823b8e788a5SAdrian Chadd */
1824eb6f0de0SAdrian Chadd if (flags & HAL_TXDESC_INTREQ) {
1825eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0;
1826eb6f0de0SAdrian Chadd } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1827eb6f0de0SAdrian Chadd flags |= HAL_TXDESC_INTREQ;
1828eb6f0de0SAdrian Chadd txq->axq_intrcnt = 0;
1829eb6f0de0SAdrian Chadd }
1830e42b5dbaSAdrian Chadd
1831eb6f0de0SAdrian Chadd /* This point forward is actual TX bits */
1832b8e788a5SAdrian Chadd
1833b8e788a5SAdrian Chadd /*
1834b8e788a5SAdrian Chadd * At this point we are committed to sending the frame
1835b8e788a5SAdrian Chadd * and we don't need to look at m_nextpkt; clear it in
1836b8e788a5SAdrian Chadd * case this frame is part of frag chain.
1837b8e788a5SAdrian Chadd */
1838b8e788a5SAdrian Chadd m0->m_nextpkt = NULL;
1839b8e788a5SAdrian Chadd
1840b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1841b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1842b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1);
1843b8e788a5SAdrian Chadd
1844b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) {
1845b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1846b8e788a5SAdrian Chadd if (iswep)
1847b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1848b8e788a5SAdrian Chadd if (isfrag)
1849b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1850b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
185112087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni);
1852b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1853b8e788a5SAdrian Chadd
1854b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0);
1855b8e788a5SAdrian Chadd }
1856b8e788a5SAdrian Chadd
1857eb6f0de0SAdrian Chadd /* Blank the legacy rate array */
1858eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1859c1782ce0SAdrian Chadd
1860b8e788a5SAdrian Chadd /*
1861eb6f0de0SAdrian Chadd * ath_buf_set_rate needs at least one rate/try to setup
1862eb6f0de0SAdrian Chadd * the rate scenario.
1863b8e788a5SAdrian Chadd */
1864eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix;
1865eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0;
1866eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate;
1867eb6f0de0SAdrian Chadd
1868eb6f0de0SAdrian Chadd /* Store the decided rate index values away */
1869eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen;
1870eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen;
1871eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype;
187212087a07SAdrian Chadd bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni);
1873eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate;
1874eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0;
1875eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix;
1876eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1877875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags;
1878eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream = shortPreamble;
1879eb6f0de0SAdrian Chadd
1880eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */
1881eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */
1882eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0; /* calculated later */
1883eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0;
1884eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr;
1885eb6f0de0SAdrian Chadd
1886eb6f0de0SAdrian Chadd return 0;
1887eb6f0de0SAdrian Chadd }
1888eb6f0de0SAdrian Chadd
1889b8e788a5SAdrian Chadd /*
18904e81f27cSAdrian Chadd * Queue a frame to the hardware or software queue.
1891eb6f0de0SAdrian Chadd *
1892eb6f0de0SAdrian Chadd * This can be called by the net80211 code.
1893eb6f0de0SAdrian Chadd *
1894eb6f0de0SAdrian Chadd * XXX what about locking? Or, push the seqno assign into the
1895eb6f0de0SAdrian Chadd * XXX aggregate scheduler so its serialised?
18964e81f27cSAdrian Chadd *
18974e81f27cSAdrian Chadd * XXX When sending management frames via ath_raw_xmit(),
18984e81f27cSAdrian Chadd * should CLRDMASK be set unconditionally?
1899b8e788a5SAdrian Chadd */
1900eb6f0de0SAdrian Chadd int
ath_tx_start(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0)1901eb6f0de0SAdrian Chadd ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1902eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0)
1903eb6f0de0SAdrian Chadd {
1904eb6f0de0SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap;
1905eb6f0de0SAdrian Chadd struct ath_vap *avp = ATH_VAP(vap);
19069c85ff91SAdrian Chadd int r = 0;
1907eb6f0de0SAdrian Chadd u_int pri;
1908eb6f0de0SAdrian Chadd int tid;
1909eb6f0de0SAdrian Chadd struct ath_txq *txq;
1910eb6f0de0SAdrian Chadd int ismcast;
1911eb6f0de0SAdrian Chadd const struct ieee80211_frame *wh;
1912eb6f0de0SAdrian Chadd int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1913a108d2d6SAdrian Chadd ieee80211_seq seqno;
1914eb6f0de0SAdrian Chadd uint8_t type, subtype;
191522a3aee6SAdrian Chadd int queue_to_head;
1916eb6f0de0SAdrian Chadd
1917375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
1918375307d4SAdrian Chadd
1919eb6f0de0SAdrian Chadd /*
1920eb6f0de0SAdrian Chadd * Determine the target hardware queue.
1921eb6f0de0SAdrian Chadd *
1922b43facbfSAdrian Chadd * For multicast frames, the txq gets overridden appropriately
192315e58d4dSAdrian Chadd * depending upon the state of PS. If powersave is enabled
192415e58d4dSAdrian Chadd * then they get added to the cabq for later transmit.
192515e58d4dSAdrian Chadd *
192615e58d4dSAdrian Chadd * The "fun" issue here is that group addressed frames should
192715e58d4dSAdrian Chadd * have the sequence number from a different pool, rather than
192815e58d4dSAdrian Chadd * the per-TID pool. That means that even QoS group addressed
192915e58d4dSAdrian Chadd * frames will have a sequence number from that global value,
193015e58d4dSAdrian Chadd * which means if we transmit different group addressed frames
193115e58d4dSAdrian Chadd * at different traffic priorities, the sequence numbers will
193215e58d4dSAdrian Chadd * all be out of whack. So - chances are, the right thing
193315e58d4dSAdrian Chadd * to do here is to always put group addressed frames into the BE
193415e58d4dSAdrian Chadd * queue, and ignore the TID for queue selection.
1935eb6f0de0SAdrian Chadd *
1936eb6f0de0SAdrian Chadd * For any other frame, we do a TID/QoS lookup inside the frame
1937eb6f0de0SAdrian Chadd * to see what the TID should be. If it's a non-QoS frame, the
1938eb6f0de0SAdrian Chadd * AC and TID are overridden. The TID/TXQ code assumes the
1939eb6f0de0SAdrian Chadd * TID is on a predictable hardware TXQ, so we don't support
1940eb6f0de0SAdrian Chadd * having a node TID queued to multiple hardware TXQs.
1941eb6f0de0SAdrian Chadd * This may change in the future but would require some locking
1942eb6f0de0SAdrian Chadd * fudgery.
1943eb6f0de0SAdrian Chadd */
1944eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0);
1945eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0);
1946eb6f0de0SAdrian Chadd
1947eb6f0de0SAdrian Chadd txq = sc->sc_ac2q[pri];
1948eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
1949eb6f0de0SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1950eb6f0de0SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1951eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1952eb6f0de0SAdrian Chadd
19539c85ff91SAdrian Chadd /*
19549c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow.
19559c85ff91SAdrian Chadd *
19569c85ff91SAdrian Chadd * XXX duplicated in ath_raw_xmit().
19579c85ff91SAdrian Chadd */
19589c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
195992e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
196092e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) {
19619c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++;
19629c85ff91SAdrian Chadd m_freem(m0);
196355cf0326SAdrian Chadd return (ENOBUFS);
19649c85ff91SAdrian Chadd }
19659c85ff91SAdrian Chadd }
19669c85ff91SAdrian Chadd
196722a3aee6SAdrian Chadd /*
196822a3aee6SAdrian Chadd * Enforce how deep the unicast queue can grow.
196922a3aee6SAdrian Chadd *
197022a3aee6SAdrian Chadd * If the node is in power save then we don't want
197122a3aee6SAdrian Chadd * the software queue to grow too deep, or a node may
197222a3aee6SAdrian Chadd * end up consuming all of the ath_buf entries.
197322a3aee6SAdrian Chadd *
197422a3aee6SAdrian Chadd * For now, only do this for DATA frames.
197522a3aee6SAdrian Chadd *
197622a3aee6SAdrian Chadd * We will want to cap how many management/control
197722a3aee6SAdrian Chadd * frames get punted to the software queue so it doesn't
197822a3aee6SAdrian Chadd * fill up. But the correct solution isn't yet obvious.
197922a3aee6SAdrian Chadd * In any case, this check should at least let frames pass
198022a3aee6SAdrian Chadd * that we are direct-dispatching.
198122a3aee6SAdrian Chadd *
198222a3aee6SAdrian Chadd * XXX TODO: duplicate this to the raw xmit path!
198322a3aee6SAdrian Chadd */
198422a3aee6SAdrian Chadd if (type == IEEE80211_FC0_TYPE_DATA &&
198522a3aee6SAdrian Chadd ATH_NODE(ni)->an_is_powersave &&
198622a3aee6SAdrian Chadd ATH_NODE(ni)->an_swq_depth >
198722a3aee6SAdrian Chadd sc->sc_txq_node_psq_maxdepth) {
198822a3aee6SAdrian Chadd sc->sc_stats.ast_tx_node_psq_overflow++;
198922a3aee6SAdrian Chadd m_freem(m0);
199022a3aee6SAdrian Chadd return (ENOBUFS);
199122a3aee6SAdrian Chadd }
199222a3aee6SAdrian Chadd
1993eb6f0de0SAdrian Chadd /* A-MPDU TX */
1994eb6f0de0SAdrian Chadd is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1995eb6f0de0SAdrian Chadd is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1996eb6f0de0SAdrian Chadd is_ampdu = is_ampdu_tx | is_ampdu_pending;
1997eb6f0de0SAdrian Chadd
1998a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
1999a108d2d6SAdrian Chadd __func__, tid, pri, is_ampdu);
2000eb6f0de0SAdrian Chadd
200146634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */
200246634305SAdrian Chadd bf->bf_state.bfs_tid = tid;
2003fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum;
200446634305SAdrian Chadd bf->bf_state.bfs_pri = pri;
200546634305SAdrian Chadd
2006b837332dSAdrian Chadd #if 1
2007c5940c30SAdrian Chadd /*
2008b43facbfSAdrian Chadd * When servicing one or more stations in power-save mode
2009b43facbfSAdrian Chadd * (or) if there is some mcast data waiting on the mcast
2010b43facbfSAdrian Chadd * queue (to prevent out of order delivery) multicast frames
2011b43facbfSAdrian Chadd * must be bufferd until after the beacon.
2012b43facbfSAdrian Chadd *
2013b43facbfSAdrian Chadd * TODO: we should lock the mcastq before we check the length.
2014c5940c30SAdrian Chadd */
2015b837332dSAdrian Chadd if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) {
2016eb6f0de0SAdrian Chadd txq = &avp->av_mcastq;
201746634305SAdrian Chadd /*
201846634305SAdrian Chadd * Mark the frame as eventually belonging on the CAB
201946634305SAdrian Chadd * queue, so the descriptor setup functions will
202046634305SAdrian Chadd * correctly initialise the descriptor 'qcuId' field.
202146634305SAdrian Chadd */
2022fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum;
202346634305SAdrian Chadd }
2024b837332dSAdrian Chadd #endif
2025eb6f0de0SAdrian Chadd
2026eb6f0de0SAdrian Chadd /* Do the generic frame setup */
2027eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */
2028eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0;
2029eb6f0de0SAdrian Chadd
20307561cb5cSAdrian Chadd /* A-MPDU TX? Manually set sequence number */
20317561cb5cSAdrian Chadd /*
20327561cb5cSAdrian Chadd * Don't do it whilst pending; the net80211 layer still
20337561cb5cSAdrian Chadd * assigns them.
203415e58d4dSAdrian Chadd *
203515e58d4dSAdrian Chadd * Don't assign A-MPDU sequence numbers to group address
203615e58d4dSAdrian Chadd * frames; they come from a different sequence number space.
20377561cb5cSAdrian Chadd */
203815e58d4dSAdrian Chadd if (is_ampdu_tx && (! IEEE80211_IS_MULTICAST(wh->i_addr1))) {
2039eb6f0de0SAdrian Chadd /*
2040eb6f0de0SAdrian Chadd * Always call; this function will
2041eb6f0de0SAdrian Chadd * handle making sure that null data frames
204215e58d4dSAdrian Chadd * and group-addressed frames don't get a sequence number
204315e58d4dSAdrian Chadd * from the current TID and thus mess with the BAW.
2044eb6f0de0SAdrian Chadd */
2045a108d2d6SAdrian Chadd seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
204642f4d061SAdrian Chadd
204742f4d061SAdrian Chadd /*
204815e58d4dSAdrian Chadd * Don't add QoS NULL frames and group-addressed frames
204915e58d4dSAdrian Chadd * to the BAW.
205042f4d061SAdrian Chadd */
2051a108d2d6SAdrian Chadd if (IEEE80211_QOS_HAS_SEQ(wh) &&
205215e58d4dSAdrian Chadd (! IEEE80211_IS_MULTICAST(wh->i_addr1)) &&
2053*1375790aSAdrian Chadd (! IEEE80211_IS_QOS_NULL(wh))) {
2054eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 1;
2055eb6f0de0SAdrian Chadd }
2056c1782ce0SAdrian Chadd }
2057c1782ce0SAdrian Chadd
2058eb6f0de0SAdrian Chadd /*
2059eb6f0de0SAdrian Chadd * If needed, the sequence number has been assigned.
2060eb6f0de0SAdrian Chadd * Squirrel it away somewhere easy to get to.
2061eb6f0de0SAdrian Chadd */
2062a108d2d6SAdrian Chadd bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
2063b8e788a5SAdrian Chadd
2064eb6f0de0SAdrian Chadd /* Is ampdu pending? fetch the seqno and print it out */
2065eb6f0de0SAdrian Chadd if (is_ampdu_pending)
2066eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
2067eb6f0de0SAdrian Chadd "%s: tid %d: ampdu pending, seqno %d\n",
2068eb6f0de0SAdrian Chadd __func__, tid, M_SEQNO_GET(m0));
2069eb6f0de0SAdrian Chadd
207015e58d4dSAdrian Chadd /* This also sets up the DMA map; crypto; frame parameters, etc */
2071b43facbfSAdrian Chadd r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
2072eb6f0de0SAdrian Chadd
2073eb6f0de0SAdrian Chadd if (r != 0)
20747561cb5cSAdrian Chadd goto done;
2075eb6f0de0SAdrian Chadd
2076eb6f0de0SAdrian Chadd /* At this point m0 could have changed! */
2077eb6f0de0SAdrian Chadd m0 = bf->bf_m;
2078eb6f0de0SAdrian Chadd
2079eb6f0de0SAdrian Chadd #if 1
2080eb6f0de0SAdrian Chadd /*
2081eb6f0de0SAdrian Chadd * If it's a multicast frame, do a direct-dispatch to the
2082eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software
2083eb6f0de0SAdrian Chadd * queuing it.
2084eb6f0de0SAdrian Chadd */
2085eb6f0de0SAdrian Chadd /*
2086eb6f0de0SAdrian Chadd * If it's a BAR frame, do a direct dispatch to the
2087eb6f0de0SAdrian Chadd * destination hardware queue. Don't bother software
2088eb6f0de0SAdrian Chadd * queuing it, as the TID will now be paused.
2089eb6f0de0SAdrian Chadd * Sending a BAR frame can occur from the net80211 txa timer
2090eb6f0de0SAdrian Chadd * (ie, retries) or from the ath txtask (completion call.)
2091eb6f0de0SAdrian Chadd * It queues directly to hardware because the TID is paused
2092eb6f0de0SAdrian Chadd * at this point (and won't be unpaused until the BAR has
2093eb6f0de0SAdrian Chadd * either been TXed successfully or max retries has been
2094eb6f0de0SAdrian Chadd * reached.)
2095eb6f0de0SAdrian Chadd */
209622a3aee6SAdrian Chadd /*
209722a3aee6SAdrian Chadd * Until things are better debugged - if this node is asleep
209822a3aee6SAdrian Chadd * and we're sending it a non-BAR frame, direct dispatch it.
209922a3aee6SAdrian Chadd * Why? Because we need to figure out what's actually being
210022a3aee6SAdrian Chadd * sent - eg, during reassociation/reauthentication after
210122a3aee6SAdrian Chadd * the node (last) disappeared whilst asleep, the driver should
210222a3aee6SAdrian Chadd * have unpaused/unsleep'ed the node. So until that is
210322a3aee6SAdrian Chadd * sorted out, use this workaround.
210422a3aee6SAdrian Chadd */
2105eb6f0de0SAdrian Chadd if (txq == &avp->av_mcastq) {
2106d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
21070b96ef63SAdrian Chadd "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
21084e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2109eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf);
211022a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
211122a3aee6SAdrian Chadd &queue_to_head)) {
211222a3aee6SAdrian Chadd ath_tx_swq(sc, ni, txq, queue_to_head, bf);
211322a3aee6SAdrian Chadd } else {
21144e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2115eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf);
2116eb6f0de0SAdrian Chadd }
2117eb6f0de0SAdrian Chadd #else
2118eb6f0de0SAdrian Chadd /*
2119eb6f0de0SAdrian Chadd * For now, since there's no software queue,
2120eb6f0de0SAdrian Chadd * direct-dispatch to the hardware.
2121eb6f0de0SAdrian Chadd */
21224e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
212322a3aee6SAdrian Chadd /*
212422a3aee6SAdrian Chadd * Update the current leak count if
212522a3aee6SAdrian Chadd * we're leaking frames; and set the
212622a3aee6SAdrian Chadd * MORE flag as appropriate.
212722a3aee6SAdrian Chadd */
212822a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf);
2129eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf);
2130eb6f0de0SAdrian Chadd #endif
21317561cb5cSAdrian Chadd done:
2132b8e788a5SAdrian Chadd return 0;
2133b8e788a5SAdrian Chadd }
2134b8e788a5SAdrian Chadd
2135b8e788a5SAdrian Chadd static int
ath_tx_raw_start(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0,const struct ieee80211_bpf_params * params)2136b8e788a5SAdrian Chadd ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
2137b8e788a5SAdrian Chadd struct ath_buf *bf, struct mbuf *m0,
2138b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params)
2139b8e788a5SAdrian Chadd {
21407a79cebfSGleb Smirnoff struct ieee80211com *ic = &sc->sc_ic;
2141b8e788a5SAdrian Chadd struct ieee80211vap *vap = ni->ni_vap;
2142b8e788a5SAdrian Chadd int error, ismcast, ismrr;
2143b8e788a5SAdrian Chadd int keyix, hdrlen, pktlen, try0, txantenna;
2144eb6f0de0SAdrian Chadd u_int8_t rix, txrate;
2145b8e788a5SAdrian Chadd struct ieee80211_frame *wh;
2146eb6f0de0SAdrian Chadd u_int flags;
2147b8e788a5SAdrian Chadd HAL_PKT_TYPE atype;
2148b8e788a5SAdrian Chadd const HAL_RATE_TABLE *rt;
2149b8e788a5SAdrian Chadd struct ath_desc *ds;
2150b8e788a5SAdrian Chadd u_int pri;
2151eb6f0de0SAdrian Chadd int o_tid = -1;
2152eb6f0de0SAdrian Chadd int do_override;
215322a3aee6SAdrian Chadd uint8_t type, subtype;
215422a3aee6SAdrian Chadd int queue_to_head;
2155f5c30c4eSAdrian Chadd struct ath_node *an = ATH_NODE(ni);
2156b8e788a5SAdrian Chadd
2157375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
2158375307d4SAdrian Chadd
2159b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
2160b8e788a5SAdrian Chadd ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
2161b8e788a5SAdrian Chadd hdrlen = ieee80211_anyhdrsize(wh);
2162b8e788a5SAdrian Chadd /*
2163b8e788a5SAdrian Chadd * Packet length must not include any
2164b8e788a5SAdrian Chadd * pad bytes; deduct them here.
2165b8e788a5SAdrian Chadd */
2166b8e788a5SAdrian Chadd /* XXX honor IEEE80211_BPF_DATAPAD */
2167b8e788a5SAdrian Chadd pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
2168b8e788a5SAdrian Chadd
216922a3aee6SAdrian Chadd type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
217022a3aee6SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
217122a3aee6SAdrian Chadd
217203682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2,
217303682514SAdrian Chadd "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf);
217403682514SAdrian Chadd
2175eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
2176eb6f0de0SAdrian Chadd __func__, ismcast);
2177eb6f0de0SAdrian Chadd
21787561cb5cSAdrian Chadd pri = params->ibp_pri & 3;
21797561cb5cSAdrian Chadd /* Override pri if the frame isn't a QoS one */
21807561cb5cSAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh))
21817561cb5cSAdrian Chadd pri = ath_tx_getac(sc, m0);
21827561cb5cSAdrian Chadd
21837561cb5cSAdrian Chadd /* XXX If it's an ADDBA, override the correct queue */
21847561cb5cSAdrian Chadd do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
21857561cb5cSAdrian Chadd
21867561cb5cSAdrian Chadd /* Map ADDBA to the correct priority */
21877561cb5cSAdrian Chadd if (do_override) {
218815e58d4dSAdrian Chadd #if 1
218983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
21907561cb5cSAdrian Chadd "%s: overriding tid %d pri %d -> %d\n",
21917561cb5cSAdrian Chadd __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
21927561cb5cSAdrian Chadd #endif
21937561cb5cSAdrian Chadd pri = TID_TO_WME_AC(o_tid);
21947561cb5cSAdrian Chadd }
21957561cb5cSAdrian Chadd
219615e58d4dSAdrian Chadd /*
219715e58d4dSAdrian Chadd * "pri" is the hardware queue to transmit on.
219815e58d4dSAdrian Chadd *
219915e58d4dSAdrian Chadd * Look at the description in ath_tx_start() to understand
220015e58d4dSAdrian Chadd * what needs to be "fixed" here so we just use the TID
220115e58d4dSAdrian Chadd * for QoS frames.
220215e58d4dSAdrian Chadd */
220315e58d4dSAdrian Chadd
220481a82688SAdrian Chadd /* Handle encryption twiddling if needed */
2205eb6f0de0SAdrian Chadd if (! ath_tx_tag_crypto(sc, ni,
2206eb6f0de0SAdrian Chadd m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
2207eb6f0de0SAdrian Chadd &hdrlen, &pktlen, &keyix)) {
2208d07be335SAdrian Chadd ieee80211_free_mbuf(m0);
2209b8e788a5SAdrian Chadd return EIO;
2210b8e788a5SAdrian Chadd }
2211b8e788a5SAdrian Chadd /* packet header may have moved, reset our local pointer */
2212b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
2213b8e788a5SAdrian Chadd
2214eb6f0de0SAdrian Chadd /* Do the generic frame setup */
2215eb6f0de0SAdrian Chadd /* XXX should just bzero the bf_state? */
2216eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0;
2217eb6f0de0SAdrian Chadd
2218b8e788a5SAdrian Chadd error = ath_tx_dmasetup(sc, bf, m0);
2219b8e788a5SAdrian Chadd if (error != 0)
2220b8e788a5SAdrian Chadd return error;
2221b8e788a5SAdrian Chadd m0 = bf->bf_m; /* NB: may have changed */
2222b8e788a5SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
2223f5c30c4eSAdrian Chadd KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
2224b8e788a5SAdrian Chadd bf->bf_node = ni; /* NB: held reference */
2225b8e788a5SAdrian Chadd
22264e81f27cSAdrian Chadd /* Always enable CLRDMASK for raw frames for now.. */
2227b8e788a5SAdrian Chadd flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
2228b8e788a5SAdrian Chadd flags |= HAL_TXDESC_INTREQ; /* force interrupt */
2229b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_RTS)
2230b8e788a5SAdrian Chadd flags |= HAL_TXDESC_RTSENA;
2231eb6f0de0SAdrian Chadd else if (params->ibp_flags & IEEE80211_BPF_CTS) {
2232eb6f0de0SAdrian Chadd /* XXX assume 11g/11n protection? */
2233eb6f0de0SAdrian Chadd bf->bf_state.bfs_doprot = 1;
2234b8e788a5SAdrian Chadd flags |= HAL_TXDESC_CTSENA;
2235eb6f0de0SAdrian Chadd }
2236b8e788a5SAdrian Chadd /* XXX leave ismcast to injector? */
2237b8e788a5SAdrian Chadd if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
2238b8e788a5SAdrian Chadd flags |= HAL_TXDESC_NOACK;
2239b8e788a5SAdrian Chadd
2240b8e788a5SAdrian Chadd rt = sc->sc_currates;
2241b8e788a5SAdrian Chadd KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2242f5c30c4eSAdrian Chadd
2243f5c30c4eSAdrian Chadd /* Fetch first rate information */
2244b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate0);
2245f5c30c4eSAdrian Chadd try0 = params->ibp_try0;
2246f5c30c4eSAdrian Chadd
2247f5c30c4eSAdrian Chadd /*
2248f5c30c4eSAdrian Chadd * Override EAPOL rate as appropriate.
2249f5c30c4eSAdrian Chadd */
2250f5c30c4eSAdrian Chadd if (m0->m_flags & M_EAPOL) {
2251f5c30c4eSAdrian Chadd /* XXX? maybe always use long preamble? */
2252f5c30c4eSAdrian Chadd rix = an->an_mgmtrix;
2253f5c30c4eSAdrian Chadd try0 = ATH_TXMAXTRY; /* XXX?too many? */
2254f5c30c4eSAdrian Chadd }
2255f5c30c4eSAdrian Chadd
22565abc0b25SAdrian Chadd /*
22575abc0b25SAdrian Chadd * If it's a frame to do location reporting on,
22585abc0b25SAdrian Chadd * communicate it to the HAL.
22595abc0b25SAdrian Chadd */
22605abc0b25SAdrian Chadd if (ieee80211_get_toa_params(m0, NULL)) {
22615abc0b25SAdrian Chadd device_printf(sc->sc_dev,
22625abc0b25SAdrian Chadd "%s: setting TX positioning bit\n", __func__);
22635abc0b25SAdrian Chadd flags |= HAL_TXDESC_POS;
22645abc0b25SAdrian Chadd flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
22655abc0b25SAdrian Chadd bf->bf_flags |= ATH_BUF_TOA_PROBE;
22665abc0b25SAdrian Chadd }
22675abc0b25SAdrian Chadd
2268b8e788a5SAdrian Chadd txrate = rt->info[rix].rateCode;
2269b8e788a5SAdrian Chadd if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
2270b8e788a5SAdrian Chadd txrate |= rt->info[rix].shortPreamble;
2271b8e788a5SAdrian Chadd sc->sc_txrix = rix;
2272b8e788a5SAdrian Chadd ismrr = (params->ibp_try1 != 0);
2273b8e788a5SAdrian Chadd txantenna = params->ibp_pri >> 2;
2274b8e788a5SAdrian Chadd if (txantenna == 0) /* XXX? */
2275b8e788a5SAdrian Chadd txantenna = sc->sc_txantenna;
227679f02dbfSAdrian Chadd
227779f02dbfSAdrian Chadd /*
2278eb6f0de0SAdrian Chadd * Since ctsrate is fixed, store it away for later
2279eb6f0de0SAdrian Chadd * use when the descriptor fields are being set.
228079f02dbfSAdrian Chadd */
2281eb6f0de0SAdrian Chadd if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
2282eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
228379f02dbfSAdrian Chadd
2284b8e788a5SAdrian Chadd /*
2285b8e788a5SAdrian Chadd * NB: we mark all packets as type PSPOLL so the h/w won't
2286b8e788a5SAdrian Chadd * set the sequence number, duration, etc.
2287b8e788a5SAdrian Chadd */
2288b8e788a5SAdrian Chadd atype = HAL_PKT_TYPE_PSPOLL;
2289b8e788a5SAdrian Chadd
2290b8e788a5SAdrian Chadd if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
2291b8e788a5SAdrian Chadd ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
2292b8e788a5SAdrian Chadd sc->sc_hwmap[rix].ieeerate, -1);
2293b8e788a5SAdrian Chadd
2294b8e788a5SAdrian Chadd if (ieee80211_radiotap_active_vap(vap)) {
2295b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
22965945b5f5SKevin Lo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
2297b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2298b8e788a5SAdrian Chadd if (m0->m_flags & M_FRAG)
2299b8e788a5SAdrian Chadd sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
2300b8e788a5SAdrian Chadd sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
230112087a07SAdrian Chadd sc->sc_tx_th.wt_txpower = MIN(params->ibp_power,
230212087a07SAdrian Chadd ieee80211_get_node_txpower(ni));
2303b8e788a5SAdrian Chadd sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
2304b8e788a5SAdrian Chadd
2305b8e788a5SAdrian Chadd ieee80211_radiotap_tx(vap, m0);
2306b8e788a5SAdrian Chadd }
2307b8e788a5SAdrian Chadd
2308b8e788a5SAdrian Chadd /*
2309b8e788a5SAdrian Chadd * Formulate first tx descriptor with tx controls.
2310b8e788a5SAdrian Chadd */
2311b8e788a5SAdrian Chadd ds = bf->bf_desc;
2312b8e788a5SAdrian Chadd /* XXX check return value? */
2313eb6f0de0SAdrian Chadd
2314eb6f0de0SAdrian Chadd /* Store the decided rate index values away */
2315eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen = pktlen;
2316eb6f0de0SAdrian Chadd bf->bf_state.bfs_hdrlen = hdrlen;
2317eb6f0de0SAdrian Chadd bf->bf_state.bfs_atype = atype;
231812087a07SAdrian Chadd bf->bf_state.bfs_txpower = MIN(params->ibp_power,
231912087a07SAdrian Chadd ieee80211_get_node_txpower(ni));
2320eb6f0de0SAdrian Chadd bf->bf_state.bfs_txrate0 = txrate;
2321eb6f0de0SAdrian Chadd bf->bf_state.bfs_try0 = try0;
2322eb6f0de0SAdrian Chadd bf->bf_state.bfs_keyix = keyix;
2323eb6f0de0SAdrian Chadd bf->bf_state.bfs_txantenna = txantenna;
2324875a9451SAdrian Chadd bf->bf_state.bfs_txflags = flags;
2325eb6f0de0SAdrian Chadd bf->bf_state.bfs_shpream =
2326eb6f0de0SAdrian Chadd !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
2327b8e788a5SAdrian Chadd
232846634305SAdrian Chadd /* Set local packet state, used to queue packets to hardware */
232946634305SAdrian Chadd bf->bf_state.bfs_tid = WME_AC_TO_TID(pri);
2330fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum;
233146634305SAdrian Chadd bf->bf_state.bfs_pri = pri;
233246634305SAdrian Chadd
2333eb6f0de0SAdrian Chadd /* XXX this should be done in ath_tx_setrate() */
2334eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsrate = 0;
2335eb6f0de0SAdrian Chadd bf->bf_state.bfs_ctsduration = 0;
2336eb6f0de0SAdrian Chadd bf->bf_state.bfs_ismrr = ismrr;
2337eb6f0de0SAdrian Chadd
2338eb6f0de0SAdrian Chadd /* Blank the legacy rate array */
2339eb6f0de0SAdrian Chadd bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
2340eb6f0de0SAdrian Chadd
2341f5c30c4eSAdrian Chadd bf->bf_state.bfs_rc[0].rix = rix;
2342eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].tries = try0;
2343eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[0].ratecode = txrate;
2344c1782ce0SAdrian Chadd
2345c1782ce0SAdrian Chadd if (ismrr) {
2346eb6f0de0SAdrian Chadd int rix;
2347c1782ce0SAdrian Chadd
2348b8e788a5SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate1);
2349eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].rix = rix;
2350eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
2351c1782ce0SAdrian Chadd
2352eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate2);
2353eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].rix = rix;
2354eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
2355eb6f0de0SAdrian Chadd
2356eb6f0de0SAdrian Chadd rix = ath_tx_findrix(sc, params->ibp_rate3);
2357eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].rix = rix;
2358eb6f0de0SAdrian Chadd bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
2359c1782ce0SAdrian Chadd }
2360eb6f0de0SAdrian Chadd /*
2361eb6f0de0SAdrian Chadd * All the required rate control decisions have been made;
2362eb6f0de0SAdrian Chadd * fill in the rc flags.
2363eb6f0de0SAdrian Chadd */
2364eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf);
2365b8e788a5SAdrian Chadd
2366b8e788a5SAdrian Chadd /* NB: no buffered multicast in power save support */
2367eb6f0de0SAdrian Chadd
2368eb6f0de0SAdrian Chadd /*
2369eb6f0de0SAdrian Chadd * If we're overiding the ADDBA destination, dump directly
2370eb6f0de0SAdrian Chadd * into the hardware queue, right after any pending
2371eb6f0de0SAdrian Chadd * frames to that node are.
2372eb6f0de0SAdrian Chadd */
2373eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
2374eb6f0de0SAdrian Chadd __func__, do_override);
2375eb6f0de0SAdrian Chadd
237694eefcf1SAdrian Chadd #if 1
237722a3aee6SAdrian Chadd /*
237822a3aee6SAdrian Chadd * Put addba frames in the right place in the right TID/HWQ.
237922a3aee6SAdrian Chadd */
2380eb6f0de0SAdrian Chadd if (do_override) {
23814e81f27cSAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
238222a3aee6SAdrian Chadd /*
238322a3aee6SAdrian Chadd * XXX if it's addba frames, should we be leaking
238422a3aee6SAdrian Chadd * them out via the frame leak method?
238522a3aee6SAdrian Chadd * XXX for now let's not risk it; but we may wish
238622a3aee6SAdrian Chadd * to investigate this later.
238722a3aee6SAdrian Chadd */
2388eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
238922a3aee6SAdrian Chadd } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
239022a3aee6SAdrian Chadd &queue_to_head)) {
2391eb6f0de0SAdrian Chadd /* Queue to software queue */
239222a3aee6SAdrian Chadd ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf);
239322a3aee6SAdrian Chadd } else {
239422a3aee6SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
239522a3aee6SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2396eb6f0de0SAdrian Chadd }
239794eefcf1SAdrian Chadd #else
239894eefcf1SAdrian Chadd /* Direct-dispatch to the hardware */
239994eefcf1SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
240022a3aee6SAdrian Chadd /*
240122a3aee6SAdrian Chadd * Update the current leak count if
240222a3aee6SAdrian Chadd * we're leaking frames; and set the
240322a3aee6SAdrian Chadd * MORE flag as appropriate.
240422a3aee6SAdrian Chadd */
240522a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf);
240694eefcf1SAdrian Chadd ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
240794eefcf1SAdrian Chadd #endif
2408b8e788a5SAdrian Chadd return 0;
2409b8e788a5SAdrian Chadd }
2410b8e788a5SAdrian Chadd
2411eb6f0de0SAdrian Chadd /*
2412eb6f0de0SAdrian Chadd * Send a raw frame.
2413eb6f0de0SAdrian Chadd *
2414eb6f0de0SAdrian Chadd * This can be called by net80211.
2415eb6f0de0SAdrian Chadd */
2416b8e788a5SAdrian Chadd int
ath_raw_xmit(struct ieee80211_node * ni,struct mbuf * m,const struct ieee80211_bpf_params * params)2417b8e788a5SAdrian Chadd ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2418b8e788a5SAdrian Chadd const struct ieee80211_bpf_params *params)
2419b8e788a5SAdrian Chadd {
2420b8e788a5SAdrian Chadd struct ieee80211com *ic = ni->ni_ic;
24213797bf08SAdrian Chadd struct ath_softc *sc = ic->ic_softc;
2422b8e788a5SAdrian Chadd struct ath_buf *bf;
24239c85ff91SAdrian Chadd struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
24249c85ff91SAdrian Chadd int error = 0;
2425b8e788a5SAdrian Chadd
2426ef27340cSAdrian Chadd ATH_PCU_LOCK(sc);
2427ef27340cSAdrian Chadd if (sc->sc_inreset_cnt > 0) {
242883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
242983bbd5ebSRui Paulo "%s: sc_inreset_cnt > 0; bailing\n", __func__);
2430ef27340cSAdrian Chadd error = EIO;
2431ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc);
2432f5c30c4eSAdrian Chadd goto badbad;
2433ef27340cSAdrian Chadd }
2434ef27340cSAdrian Chadd sc->sc_txstart_cnt++;
2435ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc);
2436ef27340cSAdrian Chadd
2437f5c30c4eSAdrian Chadd /* Wake the hardware up already */
2438f5c30c4eSAdrian Chadd ATH_LOCK(sc);
2439f5c30c4eSAdrian Chadd ath_power_set_power_state(sc, HAL_PM_AWAKE);
2440f5c30c4eSAdrian Chadd ATH_UNLOCK(sc);
2441f5c30c4eSAdrian Chadd
24421b5c5f5aSAdrian Chadd ATH_TX_LOCK(sc);
24431b5c5f5aSAdrian Chadd
24447a79cebfSGleb Smirnoff if (!sc->sc_running || sc->sc_invalid) {
24457a79cebfSGleb Smirnoff DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d",
24467a79cebfSGleb Smirnoff __func__, sc->sc_running, sc->sc_invalid);
2447b8e788a5SAdrian Chadd m_freem(m);
2448b8e788a5SAdrian Chadd error = ENETDOWN;
2449b8e788a5SAdrian Chadd goto bad;
2450b8e788a5SAdrian Chadd }
24519c85ff91SAdrian Chadd
24529c85ff91SAdrian Chadd /*
24539c85ff91SAdrian Chadd * Enforce how deep the multicast queue can grow.
24549c85ff91SAdrian Chadd *
24559c85ff91SAdrian Chadd * XXX duplicated in ath_tx_start().
24569c85ff91SAdrian Chadd */
24579c85ff91SAdrian Chadd if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
245892e84e43SAdrian Chadd if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
245992e84e43SAdrian Chadd > sc->sc_txq_mcastq_maxdepth) {
24609c85ff91SAdrian Chadd sc->sc_stats.ast_tx_mcastq_overflow++;
24619c85ff91SAdrian Chadd error = ENOBUFS;
24629c85ff91SAdrian Chadd }
24639c85ff91SAdrian Chadd
24649c85ff91SAdrian Chadd if (error != 0) {
24659c85ff91SAdrian Chadd m_freem(m);
24669c85ff91SAdrian Chadd goto bad;
24679c85ff91SAdrian Chadd }
24689c85ff91SAdrian Chadd }
24699c85ff91SAdrian Chadd
2470b8e788a5SAdrian Chadd /*
2471b8e788a5SAdrian Chadd * Grab a TX buffer and associated resources.
2472b8e788a5SAdrian Chadd */
2473af33d486SAdrian Chadd bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT);
2474b8e788a5SAdrian Chadd if (bf == NULL) {
2475b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_nobuf++;
2476b8e788a5SAdrian Chadd m_freem(m);
2477b8e788a5SAdrian Chadd error = ENOBUFS;
2478b8e788a5SAdrian Chadd goto bad;
2479b8e788a5SAdrian Chadd }
248003682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n",
248103682514SAdrian Chadd m, params, bf);
2482b8e788a5SAdrian Chadd
2483b8e788a5SAdrian Chadd if (params == NULL) {
2484b8e788a5SAdrian Chadd /*
2485b8e788a5SAdrian Chadd * Legacy path; interpret frame contents to decide
2486b8e788a5SAdrian Chadd * precisely how to send the frame.
2487b8e788a5SAdrian Chadd */
2488b8e788a5SAdrian Chadd if (ath_tx_start(sc, ni, bf, m)) {
2489b8e788a5SAdrian Chadd error = EIO; /* XXX */
2490b8e788a5SAdrian Chadd goto bad2;
2491b8e788a5SAdrian Chadd }
2492b8e788a5SAdrian Chadd } else {
2493b8e788a5SAdrian Chadd /*
2494b8e788a5SAdrian Chadd * Caller supplied explicit parameters to use in
2495b8e788a5SAdrian Chadd * sending the frame.
2496b8e788a5SAdrian Chadd */
2497b8e788a5SAdrian Chadd if (ath_tx_raw_start(sc, ni, bf, m, params)) {
2498b8e788a5SAdrian Chadd error = EIO; /* XXX */
2499b8e788a5SAdrian Chadd goto bad2;
2500b8e788a5SAdrian Chadd }
2501b8e788a5SAdrian Chadd }
2502b8e788a5SAdrian Chadd sc->sc_wd_timer = 5;
2503b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw++;
2504b8e788a5SAdrian Chadd
2505548a605dSAdrian Chadd /*
2506548a605dSAdrian Chadd * Update the TIM - if there's anything queued to the
2507548a605dSAdrian Chadd * software queue and power save is enabled, we should
2508548a605dSAdrian Chadd * set the TIM.
2509548a605dSAdrian Chadd */
2510548a605dSAdrian Chadd ath_tx_update_tim(sc, ni, 1);
2511548a605dSAdrian Chadd
2512974185bbSAdrian Chadd ATH_TX_UNLOCK(sc);
2513974185bbSAdrian Chadd
2514ef27340cSAdrian Chadd ATH_PCU_LOCK(sc);
2515ef27340cSAdrian Chadd sc->sc_txstart_cnt--;
2516ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc);
2517ef27340cSAdrian Chadd
2518f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */
2519f5c30c4eSAdrian Chadd ATH_LOCK(sc);
2520f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc);
2521f5c30c4eSAdrian Chadd ATH_UNLOCK(sc);
2522f5c30c4eSAdrian Chadd
2523b8e788a5SAdrian Chadd return 0;
2524f5c30c4eSAdrian Chadd
2525b8e788a5SAdrian Chadd bad2:
252603682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, "
252703682514SAdrian Chadd "bf=%p",
252803682514SAdrian Chadd m,
252903682514SAdrian Chadd params,
253003682514SAdrian Chadd bf);
2531b8e788a5SAdrian Chadd ATH_TXBUF_LOCK(sc);
2532e1a50456SAdrian Chadd ath_returnbuf_head(sc, bf);
2533b8e788a5SAdrian Chadd ATH_TXBUF_UNLOCK(sc);
25341b5c5f5aSAdrian Chadd
2535f5c30c4eSAdrian Chadd bad:
25361b5c5f5aSAdrian Chadd ATH_TX_UNLOCK(sc);
25371b5c5f5aSAdrian Chadd
2538ef27340cSAdrian Chadd ATH_PCU_LOCK(sc);
2539ef27340cSAdrian Chadd sc->sc_txstart_cnt--;
2540ef27340cSAdrian Chadd ATH_PCU_UNLOCK(sc);
2541f5c30c4eSAdrian Chadd
2542f5c30c4eSAdrian Chadd /* Put the hardware back to sleep if required */
2543f5c30c4eSAdrian Chadd ATH_LOCK(sc);
2544f5c30c4eSAdrian Chadd ath_power_restore_power_state(sc);
2545f5c30c4eSAdrian Chadd ATH_UNLOCK(sc);
2546f5c30c4eSAdrian Chadd
2547f5c30c4eSAdrian Chadd badbad:
254803682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p",
254903682514SAdrian Chadd m, params);
2550b8e788a5SAdrian Chadd sc->sc_stats.ast_tx_raw_fail++;
2551ef27340cSAdrian Chadd
2552b8e788a5SAdrian Chadd return error;
2553b8e788a5SAdrian Chadd }
2554eb6f0de0SAdrian Chadd
2555eb6f0de0SAdrian Chadd /* Some helper functions */
2556eb6f0de0SAdrian Chadd
2557eb6f0de0SAdrian Chadd /*
2558eb6f0de0SAdrian Chadd * ADDBA (and potentially others) need to be placed in the same
2559eb6f0de0SAdrian Chadd * hardware queue as the TID/node it's relating to. This is so
2560eb6f0de0SAdrian Chadd * it goes out after any pending non-aggregate frames to the
2561eb6f0de0SAdrian Chadd * same node/TID.
2562eb6f0de0SAdrian Chadd *
2563eb6f0de0SAdrian Chadd * If this isn't done, the ADDBA can go out before the frames
2564eb6f0de0SAdrian Chadd * queued in hardware. Even though these frames have a sequence
2565eb6f0de0SAdrian Chadd * number -earlier- than the ADDBA can be transmitted (but
2566eb6f0de0SAdrian Chadd * no frames whose sequence numbers are after the ADDBA should
2567eb6f0de0SAdrian Chadd * be!) they'll arrive after the ADDBA - and the receiving end
2568eb6f0de0SAdrian Chadd * will simply drop them as being out of the BAW.
2569eb6f0de0SAdrian Chadd *
2570eb6f0de0SAdrian Chadd * The frames can't be appended to the TID software queue - it'll
2571eb6f0de0SAdrian Chadd * never be sent out. So these frames have to be directly
2572eb6f0de0SAdrian Chadd * dispatched to the hardware, rather than queued in software.
2573eb6f0de0SAdrian Chadd * So if this function returns true, the TXQ has to be
2574eb6f0de0SAdrian Chadd * overridden and it has to be directly dispatched.
2575eb6f0de0SAdrian Chadd *
2576eb6f0de0SAdrian Chadd * It's a dirty hack, but someone's gotta do it.
2577eb6f0de0SAdrian Chadd */
2578eb6f0de0SAdrian Chadd
2579eb6f0de0SAdrian Chadd /*
2580eb6f0de0SAdrian Chadd * Return an alternate TID for ADDBA request frames.
2581eb6f0de0SAdrian Chadd *
2582eb6f0de0SAdrian Chadd * Yes, this likely should be done in the net80211 layer.
2583eb6f0de0SAdrian Chadd */
2584eb6f0de0SAdrian Chadd static int
ath_tx_action_frame_override_queue(struct ath_softc * sc,struct ieee80211_node * ni,struct mbuf * m0,int * tid)2585eb6f0de0SAdrian Chadd ath_tx_action_frame_override_queue(struct ath_softc *sc,
2586eb6f0de0SAdrian Chadd struct ieee80211_node *ni,
2587eb6f0de0SAdrian Chadd struct mbuf *m0, int *tid)
2588eb6f0de0SAdrian Chadd {
2589eb6f0de0SAdrian Chadd struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
2590eb6f0de0SAdrian Chadd struct ieee80211_action_ba_addbarequest *ia;
2591eb6f0de0SAdrian Chadd uint8_t *frm;
2592eb6f0de0SAdrian Chadd uint16_t baparamset;
2593eb6f0de0SAdrian Chadd
2594eb6f0de0SAdrian Chadd /* Not action frame? Bail */
2595c249cc38SAdrian Chadd if (! IEEE80211_IS_MGMT_ACTION(wh))
2596eb6f0de0SAdrian Chadd return 0;
2597eb6f0de0SAdrian Chadd
2598eb6f0de0SAdrian Chadd /* XXX Not needed for frames we send? */
2599eb6f0de0SAdrian Chadd #if 0
2600eb6f0de0SAdrian Chadd /* Correct length? */
2601eb6f0de0SAdrian Chadd if (! ieee80211_parse_action(ni, m))
2602eb6f0de0SAdrian Chadd return 0;
2603eb6f0de0SAdrian Chadd #endif
2604eb6f0de0SAdrian Chadd
2605eb6f0de0SAdrian Chadd /* Extract out action frame */
2606eb6f0de0SAdrian Chadd frm = (u_int8_t *)&wh[1];
2607eb6f0de0SAdrian Chadd ia = (struct ieee80211_action_ba_addbarequest *) frm;
2608eb6f0de0SAdrian Chadd
2609eb6f0de0SAdrian Chadd /* Not ADDBA? Bail */
2610eb6f0de0SAdrian Chadd if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
2611eb6f0de0SAdrian Chadd return 0;
2612eb6f0de0SAdrian Chadd if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2613eb6f0de0SAdrian Chadd return 0;
2614eb6f0de0SAdrian Chadd
2615eb6f0de0SAdrian Chadd /* Extract TID, return it */
2616eb6f0de0SAdrian Chadd baparamset = le16toh(ia->rq_baparamset);
2617fe5ebb23SBjoern A. Zeeb *tid = (int) _IEEE80211_MASKSHIFT(baparamset, IEEE80211_BAPS_TID);
2618eb6f0de0SAdrian Chadd
2619eb6f0de0SAdrian Chadd return 1;
2620eb6f0de0SAdrian Chadd }
2621eb6f0de0SAdrian Chadd
2622eb6f0de0SAdrian Chadd /* Per-node software queue operations */
2623eb6f0de0SAdrian Chadd
2624eb6f0de0SAdrian Chadd /*
2625eb6f0de0SAdrian Chadd * Add the current packet to the given BAW.
2626eb6f0de0SAdrian Chadd * It is assumed that the current packet
2627eb6f0de0SAdrian Chadd *
2628eb6f0de0SAdrian Chadd * + fits inside the BAW;
2629eb6f0de0SAdrian Chadd * + already has had a sequence number allocated.
2630eb6f0de0SAdrian Chadd *
2631eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and
2632eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked.
2633eb6f0de0SAdrian Chadd */
2634eb6f0de0SAdrian Chadd void
ath_tx_addto_baw(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,struct ath_buf * bf)2635eb6f0de0SAdrian Chadd ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2636eb6f0de0SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf)
2637eb6f0de0SAdrian Chadd {
2638eb6f0de0SAdrian Chadd int index, cindex;
2639eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
2640eb6f0de0SAdrian Chadd
2641375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
2642eb6f0de0SAdrian Chadd
2643eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_isretried)
2644eb6f0de0SAdrian Chadd return;
2645eb6f0de0SAdrian Chadd
2646c7c07341SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid);
2647c7c07341SAdrian Chadd
26487561cb5cSAdrian Chadd if (! bf->bf_state.bfs_dobaw) {
264983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
26507561cb5cSAdrian Chadd "%s: dobaw=0, seqno=%d, window %d:%d\n",
265183bbd5ebSRui Paulo __func__, SEQNO(bf->bf_state.bfs_seqno),
265283bbd5ebSRui Paulo tap->txa_start, tap->txa_wnd);
26537561cb5cSAdrian Chadd }
26547561cb5cSAdrian Chadd
2655eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_addedbaw)
265683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2657a108d2d6SAdrian Chadd "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2658d4365d16SAdrian Chadd "baw head=%d tail=%d\n",
2659a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2660d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head,
2661d4365d16SAdrian Chadd tid->baw_tail);
2662eb6f0de0SAdrian Chadd
2663eb6f0de0SAdrian Chadd /*
26647561cb5cSAdrian Chadd * Verify that the given sequence number is not outside of the
26657561cb5cSAdrian Chadd * BAW. Complain loudly if that's the case.
26667561cb5cSAdrian Chadd */
26677561cb5cSAdrian Chadd if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
26687561cb5cSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno))) {
266983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
26707561cb5cSAdrian Chadd "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; "
26717561cb5cSAdrian Chadd "baw head=%d tail=%d\n",
26727561cb5cSAdrian Chadd __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
26737561cb5cSAdrian Chadd tap->txa_start, tap->txa_wnd, tid->baw_head,
26747561cb5cSAdrian Chadd tid->baw_tail);
26757561cb5cSAdrian Chadd }
26767561cb5cSAdrian Chadd
26777561cb5cSAdrian Chadd /*
2678eb6f0de0SAdrian Chadd * ni->ni_txseqs[] is the currently allocated seqno.
2679eb6f0de0SAdrian Chadd * the txa state contains the current baw start.
2680eb6f0de0SAdrian Chadd */
2681eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2682eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2683eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2684a108d2d6SAdrian Chadd "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2685d4365d16SAdrian Chadd "baw head=%d tail=%d\n",
2686a108d2d6SAdrian Chadd __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2687d4365d16SAdrian Chadd tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2688d4365d16SAdrian Chadd tid->baw_tail);
2689eb6f0de0SAdrian Chadd
2690eb6f0de0SAdrian Chadd #if 0
2691eb6f0de0SAdrian Chadd assert(tid->tx_buf[cindex] == NULL);
2692eb6f0de0SAdrian Chadd #endif
2693eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != NULL) {
269483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2695eb6f0de0SAdrian Chadd "%s: ba packet dup (index=%d, cindex=%d, "
2696eb6f0de0SAdrian Chadd "head=%d, tail=%d)\n",
2697eb6f0de0SAdrian Chadd __func__, index, cindex, tid->baw_head, tid->baw_tail);
269883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2699eb6f0de0SAdrian Chadd "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2700eb6f0de0SAdrian Chadd __func__,
2701eb6f0de0SAdrian Chadd tid->tx_buf[cindex],
2702eb6f0de0SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2703eb6f0de0SAdrian Chadd bf,
2704eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)
2705eb6f0de0SAdrian Chadd );
2706eb6f0de0SAdrian Chadd }
2707eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = bf;
2708eb6f0de0SAdrian Chadd
2709d4365d16SAdrian Chadd if (index >= ((tid->baw_tail - tid->baw_head) &
2710d4365d16SAdrian Chadd (ATH_TID_MAX_BUFS - 1))) {
2711eb6f0de0SAdrian Chadd tid->baw_tail = cindex;
2712eb6f0de0SAdrian Chadd INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2713eb6f0de0SAdrian Chadd }
2714eb6f0de0SAdrian Chadd }
2715eb6f0de0SAdrian Chadd
2716eb6f0de0SAdrian Chadd /*
271738962489SAdrian Chadd * Flip the BAW buffer entry over from the existing one to the new one.
271838962489SAdrian Chadd *
271938962489SAdrian Chadd * When software retransmitting a (sub-)frame, it is entirely possible that
272038962489SAdrian Chadd * the frame ath_buf is marked as BUSY and can't be immediately reused.
272138962489SAdrian Chadd * In that instance the buffer is cloned and the new buffer is used for
272238962489SAdrian Chadd * retransmit. We thus need to update the ath_buf slot in the BAW buf
272338962489SAdrian Chadd * tracking array to maintain consistency.
272438962489SAdrian Chadd */
272538962489SAdrian Chadd static void
ath_tx_switch_baw_buf(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,struct ath_buf * old_bf,struct ath_buf * new_bf)272638962489SAdrian Chadd ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
272738962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
272838962489SAdrian Chadd {
272938962489SAdrian Chadd int index, cindex;
273038962489SAdrian Chadd struct ieee80211_tx_ampdu *tap;
273138962489SAdrian Chadd int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
273238962489SAdrian Chadd
2733375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
273438962489SAdrian Chadd
273538962489SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid);
273638962489SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno);
273738962489SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
273838962489SAdrian Chadd
273938962489SAdrian Chadd /*
274038962489SAdrian Chadd * Just warn for now; if it happens then we should find out
274138962489SAdrian Chadd * about it. It's highly likely the aggregation session will
274238962489SAdrian Chadd * soon hang.
274338962489SAdrian Chadd */
274438962489SAdrian Chadd if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
274583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
274683bbd5ebSRui Paulo "%s: retransmitted buffer"
274738962489SAdrian Chadd " has mismatching seqno's, BA session may hang.\n",
274838962489SAdrian Chadd __func__);
274983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
275083bbd5ebSRui Paulo "%s: old seqno=%d, new_seqno=%d\n", __func__,
275183bbd5ebSRui Paulo old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno);
275238962489SAdrian Chadd }
275338962489SAdrian Chadd
275438962489SAdrian Chadd if (tid->tx_buf[cindex] != old_bf) {
275583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
275683bbd5ebSRui Paulo "%s: ath_buf pointer incorrect; "
275783bbd5ebSRui Paulo " has m BA session may hang.\n", __func__);
275883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
275983bbd5ebSRui Paulo "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf);
276038962489SAdrian Chadd }
276138962489SAdrian Chadd
276238962489SAdrian Chadd tid->tx_buf[cindex] = new_bf;
276338962489SAdrian Chadd }
276438962489SAdrian Chadd
276538962489SAdrian Chadd /*
2766eb6f0de0SAdrian Chadd * seq_start - left edge of BAW
2767eb6f0de0SAdrian Chadd * seq_next - current/next sequence number to allocate
2768eb6f0de0SAdrian Chadd *
2769eb6f0de0SAdrian Chadd * Since the BAW status may be modified by both the ath task and
2770eb6f0de0SAdrian Chadd * the net80211/ifnet contexts, the TID must be locked.
2771eb6f0de0SAdrian Chadd */
2772eb6f0de0SAdrian Chadd static void
ath_tx_update_baw(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,const struct ath_buf * bf)2773eb6f0de0SAdrian Chadd ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2774eb6f0de0SAdrian Chadd struct ath_tid *tid, const struct ath_buf *bf)
2775eb6f0de0SAdrian Chadd {
2776eb6f0de0SAdrian Chadd int index, cindex;
2777eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
2778eb6f0de0SAdrian Chadd int seqno = SEQNO(bf->bf_state.bfs_seqno);
2779eb6f0de0SAdrian Chadd
2780375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
2781eb6f0de0SAdrian Chadd
2782eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid);
2783eb6f0de0SAdrian Chadd index = ATH_BA_INDEX(tap->txa_start, seqno);
2784eb6f0de0SAdrian Chadd cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2785eb6f0de0SAdrian Chadd
2786eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2787a108d2d6SAdrian Chadd "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2788d4365d16SAdrian Chadd "baw head=%d, tail=%d\n",
2789a108d2d6SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2790eb6f0de0SAdrian Chadd cindex, tid->baw_head, tid->baw_tail);
2791eb6f0de0SAdrian Chadd
2792eb6f0de0SAdrian Chadd /*
2793eb6f0de0SAdrian Chadd * If this occurs then we have a big problem - something else
2794eb6f0de0SAdrian Chadd * has slid tap->txa_start along without updating the BAW
2795eb6f0de0SAdrian Chadd * tracking start/end pointers. Thus the TX BAW state is now
2796eb6f0de0SAdrian Chadd * completely busted.
2797eb6f0de0SAdrian Chadd *
2798eb6f0de0SAdrian Chadd * But for now, since I haven't yet fixed TDMA and buffer cloning,
2799eb6f0de0SAdrian Chadd * it's quite possible that a cloned buffer is making its way
2800eb6f0de0SAdrian Chadd * here and causing it to fire off. Disable TDMA for now.
2801eb6f0de0SAdrian Chadd */
2802eb6f0de0SAdrian Chadd if (tid->tx_buf[cindex] != bf) {
280383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2804eb6f0de0SAdrian Chadd "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
280583bbd5ebSRui Paulo __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
2806eb6f0de0SAdrian Chadd tid->tx_buf[cindex],
28073527f6a9SAdrian Chadd (tid->tx_buf[cindex] != NULL) ?
28083527f6a9SAdrian Chadd SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1);
2809eb6f0de0SAdrian Chadd }
2810eb6f0de0SAdrian Chadd
2811eb6f0de0SAdrian Chadd tid->tx_buf[cindex] = NULL;
2812eb6f0de0SAdrian Chadd
2813d4365d16SAdrian Chadd while (tid->baw_head != tid->baw_tail &&
2814d4365d16SAdrian Chadd !tid->tx_buf[tid->baw_head]) {
2815eb6f0de0SAdrian Chadd INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2816eb6f0de0SAdrian Chadd INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2817eb6f0de0SAdrian Chadd }
2818d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
281942fdd8e7SAdrian Chadd "%s: tid=%d: baw is now %d:%d, baw head=%d\n",
282042fdd8e7SAdrian Chadd __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head);
2821eb6f0de0SAdrian Chadd }
2822eb6f0de0SAdrian Chadd
282322a3aee6SAdrian Chadd static void
ath_tx_leak_count_update(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)282422a3aee6SAdrian Chadd ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid,
282522a3aee6SAdrian Chadd struct ath_buf *bf)
282622a3aee6SAdrian Chadd {
282722a3aee6SAdrian Chadd struct ieee80211_frame *wh;
282822a3aee6SAdrian Chadd
282922a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
283022a3aee6SAdrian Chadd
283122a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) {
283222a3aee6SAdrian Chadd wh = mtod(bf->bf_m, struct ieee80211_frame *);
283322a3aee6SAdrian Chadd
283422a3aee6SAdrian Chadd /*
283522a3aee6SAdrian Chadd * Update MORE based on the software/net80211 queue states.
283622a3aee6SAdrian Chadd */
283722a3aee6SAdrian Chadd if ((tid->an->an_stack_psq > 0)
283822a3aee6SAdrian Chadd || (tid->an->an_swq_depth > 0))
283922a3aee6SAdrian Chadd wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
284022a3aee6SAdrian Chadd else
284122a3aee6SAdrian Chadd wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA;
284222a3aee6SAdrian Chadd
284322a3aee6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE,
284422a3aee6SAdrian Chadd "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n",
284522a3aee6SAdrian Chadd __func__,
284622a3aee6SAdrian Chadd tid->an->an_node.ni_macaddr,
284722a3aee6SAdrian Chadd ":",
284822a3aee6SAdrian Chadd tid->an->an_leak_count,
284922a3aee6SAdrian Chadd tid->an->an_stack_psq,
285022a3aee6SAdrian Chadd tid->an->an_swq_depth,
285122a3aee6SAdrian Chadd !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA));
285222a3aee6SAdrian Chadd
285322a3aee6SAdrian Chadd /*
285422a3aee6SAdrian Chadd * Re-sync the underlying buffer.
285522a3aee6SAdrian Chadd */
285622a3aee6SAdrian Chadd bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
285722a3aee6SAdrian Chadd BUS_DMASYNC_PREWRITE);
285822a3aee6SAdrian Chadd
285922a3aee6SAdrian Chadd tid->an->an_leak_count --;
286022a3aee6SAdrian Chadd }
286122a3aee6SAdrian Chadd }
286222a3aee6SAdrian Chadd
286322a3aee6SAdrian Chadd static int
ath_tx_tid_can_tx_or_sched(struct ath_softc * sc,struct ath_tid * tid)286422a3aee6SAdrian Chadd ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid)
286522a3aee6SAdrian Chadd {
286622a3aee6SAdrian Chadd
286722a3aee6SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
286822a3aee6SAdrian Chadd
286922a3aee6SAdrian Chadd if (tid->an->an_leak_count > 0) {
287022a3aee6SAdrian Chadd return (1);
287122a3aee6SAdrian Chadd }
287222a3aee6SAdrian Chadd if (tid->paused)
287322a3aee6SAdrian Chadd return (0);
287422a3aee6SAdrian Chadd return (1);
287522a3aee6SAdrian Chadd }
287622a3aee6SAdrian Chadd
2877eb6f0de0SAdrian Chadd /*
2878eb6f0de0SAdrian Chadd * Mark the current node/TID as ready to TX.
2879eb6f0de0SAdrian Chadd *
2880eb6f0de0SAdrian Chadd * This is done to make it easy for the software scheduler to
2881eb6f0de0SAdrian Chadd * find which nodes have data to send.
2882eb6f0de0SAdrian Chadd *
2883eb6f0de0SAdrian Chadd * The TXQ lock must be held.
2884eb6f0de0SAdrian Chadd */
288522a3aee6SAdrian Chadd void
ath_tx_tid_sched(struct ath_softc * sc,struct ath_tid * tid)2886eb6f0de0SAdrian Chadd ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2887eb6f0de0SAdrian Chadd {
2888eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2889eb6f0de0SAdrian Chadd
2890375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
2891eb6f0de0SAdrian Chadd
289222a3aee6SAdrian Chadd /*
289322a3aee6SAdrian Chadd * If we are leaking out a frame to this destination
289422a3aee6SAdrian Chadd * for PS-POLL, ensure that we allow scheduling to
289522a3aee6SAdrian Chadd * occur.
289622a3aee6SAdrian Chadd */
289722a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid))
2898eb6f0de0SAdrian Chadd return; /* paused, can't schedule yet */
2899eb6f0de0SAdrian Chadd
2900eb6f0de0SAdrian Chadd if (tid->sched)
2901eb6f0de0SAdrian Chadd return; /* already scheduled */
2902eb6f0de0SAdrian Chadd
2903eb6f0de0SAdrian Chadd tid->sched = 1;
2904eb6f0de0SAdrian Chadd
290522a3aee6SAdrian Chadd #if 0
290622a3aee6SAdrian Chadd /*
290722a3aee6SAdrian Chadd * If this is a sleeping node we're leaking to, given
290822a3aee6SAdrian Chadd * it a higher priority. This is so bad for QoS it hurts.
290922a3aee6SAdrian Chadd */
291022a3aee6SAdrian Chadd if (tid->an->an_leak_count) {
291122a3aee6SAdrian Chadd TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem);
291222a3aee6SAdrian Chadd } else {
291322a3aee6SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
291422a3aee6SAdrian Chadd }
291522a3aee6SAdrian Chadd #endif
291622a3aee6SAdrian Chadd
291722a3aee6SAdrian Chadd /*
291822a3aee6SAdrian Chadd * We can't do the above - it'll confuse the TXQ software
291922a3aee6SAdrian Chadd * scheduler which will keep checking the _head_ TID
292022a3aee6SAdrian Chadd * in the list to see if it has traffic. If we queue
292122a3aee6SAdrian Chadd * a TID to the head of the list and it doesn't transmit,
292222a3aee6SAdrian Chadd * we'll check it again.
292322a3aee6SAdrian Chadd *
292422a3aee6SAdrian Chadd * So, get the rest of this leaking frames support working
292522a3aee6SAdrian Chadd * and reliable first and _then_ optimise it so they're
292622a3aee6SAdrian Chadd * pushed out in front of any other pending software
292722a3aee6SAdrian Chadd * queued nodes.
292822a3aee6SAdrian Chadd */
2929eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2930eb6f0de0SAdrian Chadd }
2931eb6f0de0SAdrian Chadd
2932eb6f0de0SAdrian Chadd /*
2933eb6f0de0SAdrian Chadd * Mark the current node as no longer needing to be polled for
2934eb6f0de0SAdrian Chadd * TX packets.
2935eb6f0de0SAdrian Chadd *
2936eb6f0de0SAdrian Chadd * The TXQ lock must be held.
2937eb6f0de0SAdrian Chadd */
2938eb6f0de0SAdrian Chadd static void
ath_tx_tid_unsched(struct ath_softc * sc,struct ath_tid * tid)2939eb6f0de0SAdrian Chadd ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2940eb6f0de0SAdrian Chadd {
2941eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2942eb6f0de0SAdrian Chadd
2943375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
2944eb6f0de0SAdrian Chadd
2945eb6f0de0SAdrian Chadd if (tid->sched == 0)
2946eb6f0de0SAdrian Chadd return;
2947eb6f0de0SAdrian Chadd
2948eb6f0de0SAdrian Chadd tid->sched = 0;
2949eb6f0de0SAdrian Chadd TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2950eb6f0de0SAdrian Chadd }
2951eb6f0de0SAdrian Chadd
2952eb6f0de0SAdrian Chadd /*
2953eb6f0de0SAdrian Chadd * Assign a sequence number manually to the given frame.
2954eb6f0de0SAdrian Chadd *
2955eb6f0de0SAdrian Chadd * This should only be called for A-MPDU TX frames.
295615e58d4dSAdrian Chadd *
295715e58d4dSAdrian Chadd * Note: for group addressed frames, the sequence number
295815e58d4dSAdrian Chadd * should be from NONQOS_TID, and net80211 should have
295915e58d4dSAdrian Chadd * already assigned it for us.
2960eb6f0de0SAdrian Chadd */
2961a108d2d6SAdrian Chadd static ieee80211_seq
ath_tx_tid_seqno_assign(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_buf * bf,struct mbuf * m0)2962eb6f0de0SAdrian Chadd ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2963eb6f0de0SAdrian Chadd struct ath_buf *bf, struct mbuf *m0)
2964eb6f0de0SAdrian Chadd {
2965eb6f0de0SAdrian Chadd struct ieee80211_frame *wh;
296615e58d4dSAdrian Chadd int tid;
2967eb6f0de0SAdrian Chadd ieee80211_seq seqno;
2968eb6f0de0SAdrian Chadd uint8_t subtype;
2969eb6f0de0SAdrian Chadd
2970eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
297115e58d4dSAdrian Chadd tid = ieee80211_gettid(wh);
297215e58d4dSAdrian Chadd
297315e58d4dSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, qos has seq=%d\n",
297415e58d4dSAdrian Chadd __func__, tid, IEEE80211_QOS_HAS_SEQ(wh));
2975eb6f0de0SAdrian Chadd
2976eb6f0de0SAdrian Chadd /* XXX Is it a control frame? Ignore */
2977eb6f0de0SAdrian Chadd
2978eb6f0de0SAdrian Chadd /* Does the packet require a sequence number? */
2979eb6f0de0SAdrian Chadd if (! IEEE80211_QOS_HAS_SEQ(wh))
2980eb6f0de0SAdrian Chadd return -1;
2981eb6f0de0SAdrian Chadd
2982375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
29837561cb5cSAdrian Chadd
2984eb6f0de0SAdrian Chadd /*
2985eb6f0de0SAdrian Chadd * Is it a QOS NULL Data frame? Give it a sequence number from
2986eb6f0de0SAdrian Chadd * the default TID (IEEE80211_NONQOS_TID.)
2987eb6f0de0SAdrian Chadd *
2988eb6f0de0SAdrian Chadd * The RX path of everything I've looked at doesn't include the NULL
2989eb6f0de0SAdrian Chadd * data frame sequence number in the aggregation state updates, so
2990eb6f0de0SAdrian Chadd * assigning it a sequence number there will cause a BAW hole on the
2991eb6f0de0SAdrian Chadd * RX side.
2992eb6f0de0SAdrian Chadd */
2993eb6f0de0SAdrian Chadd subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2994*1375790aSAdrian Chadd if (IEEE80211_IS_QOS_NULL(wh)) {
29957561cb5cSAdrian Chadd /* XXX no locking for this TID? This is a bit of a problem. */
2996eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
2997eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
299815e58d4dSAdrian Chadd } else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
299915e58d4dSAdrian Chadd /*
300015e58d4dSAdrian Chadd * group addressed frames get a sequence number from
300115e58d4dSAdrian Chadd * a different sequence number space.
300215e58d4dSAdrian Chadd */
300315e58d4dSAdrian Chadd seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
300415e58d4dSAdrian Chadd INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
3005eb6f0de0SAdrian Chadd } else {
3006eb6f0de0SAdrian Chadd /* Manually assign sequence number */
3007eb6f0de0SAdrian Chadd seqno = ni->ni_txseqs[tid];
3008eb6f0de0SAdrian Chadd INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
3009eb6f0de0SAdrian Chadd }
3010eb6f0de0SAdrian Chadd *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
3011eb6f0de0SAdrian Chadd M_SEQNO_SET(m0, seqno);
3012eb6f0de0SAdrian Chadd
3013eb6f0de0SAdrian Chadd /* Return so caller can do something with it if needed */
301439d54676SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
301539d54676SAdrian Chadd "%s: -> subtype=0x%x, tid=%d, seqno=%d\n",
301639d54676SAdrian Chadd __func__, subtype, tid, seqno);
3017eb6f0de0SAdrian Chadd return seqno;
3018eb6f0de0SAdrian Chadd }
3019eb6f0de0SAdrian Chadd
3020eb6f0de0SAdrian Chadd /*
3021eb6f0de0SAdrian Chadd * Attempt to direct dispatch an aggregate frame to hardware.
3022eb6f0de0SAdrian Chadd * If the frame is out of BAW, queue.
3023eb6f0de0SAdrian Chadd * Otherwise, schedule it as a single frame.
3024eb6f0de0SAdrian Chadd */
3025eb6f0de0SAdrian Chadd static void
ath_tx_xmit_aggr(struct ath_softc * sc,struct ath_node * an,struct ath_txq * txq,struct ath_buf * bf)302646634305SAdrian Chadd ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an,
302746634305SAdrian Chadd struct ath_txq *txq, struct ath_buf *bf)
3028eb6f0de0SAdrian Chadd {
3029eb6f0de0SAdrian Chadd struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
3030eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
3031eb6f0de0SAdrian Chadd
3032375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3033eb6f0de0SAdrian Chadd
3034eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid);
3035eb6f0de0SAdrian Chadd
3036eb6f0de0SAdrian Chadd /* paused? queue */
303722a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
30383e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list);
30390f04c5a2SAdrian Chadd /* XXX don't sched - we're paused! */
3040eb6f0de0SAdrian Chadd return;
3041eb6f0de0SAdrian Chadd }
3042eb6f0de0SAdrian Chadd
3043eb6f0de0SAdrian Chadd /* outside baw? queue */
3044eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw &&
3045eb6f0de0SAdrian Chadd (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
3046eb6f0de0SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)))) {
30473e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3048eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid);
3049eb6f0de0SAdrian Chadd return;
3050eb6f0de0SAdrian Chadd }
3051eb6f0de0SAdrian Chadd
30522a9f83afSAdrian Chadd /*
30532a9f83afSAdrian Chadd * This is a temporary check and should be removed once
30542a9f83afSAdrian Chadd * all the relevant code paths have been fixed.
30552a9f83afSAdrian Chadd *
30562a9f83afSAdrian Chadd * During aggregate retries, it's possible that the head
30572a9f83afSAdrian Chadd * frame will fail (which has the bfs_aggr and bfs_nframes
30582a9f83afSAdrian Chadd * fields set for said aggregate) and will be retried as
30592a9f83afSAdrian Chadd * a single frame. In this instance, the values should
30602a9f83afSAdrian Chadd * be reset or the completion code will get upset with you.
30612a9f83afSAdrian Chadd */
30622a9f83afSAdrian Chadd if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) {
3063b372f122SRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
306483bbd5ebSRui Paulo "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__,
306583bbd5ebSRui Paulo bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes);
30662a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0;
30672a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1;
30682a9f83afSAdrian Chadd }
30692a9f83afSAdrian Chadd
30704e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */
30714e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf);
30724e81f27cSAdrian Chadd
3073eb6f0de0SAdrian Chadd /* Direct dispatch to hardware */
3074cce63444SAdrian Chadd ath_tx_do_ratelookup(sc, bf, tid->tid, bf->bf_state.bfs_pktlen,
3075cce63444SAdrian Chadd false);
3076e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf);
3077e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf);
3078eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf);
3079e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf);
3080eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf);
3081eb6f0de0SAdrian Chadd
3082eb6f0de0SAdrian Chadd /* Statistics */
3083eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
3084eb6f0de0SAdrian Chadd
3085eb6f0de0SAdrian Chadd /* Track per-TID hardware queue depth correctly */
3086eb6f0de0SAdrian Chadd tid->hwq_depth++;
3087eb6f0de0SAdrian Chadd
3088eb6f0de0SAdrian Chadd /* Add to BAW */
3089eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) {
3090eb6f0de0SAdrian Chadd ath_tx_addto_baw(sc, an, tid, bf);
3091eb6f0de0SAdrian Chadd bf->bf_state.bfs_addedbaw = 1;
3092eb6f0de0SAdrian Chadd }
3093eb6f0de0SAdrian Chadd
3094eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */
3095eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp;
3096eb6f0de0SAdrian Chadd
309722a3aee6SAdrian Chadd /*
309822a3aee6SAdrian Chadd * Update the current leak count if
309922a3aee6SAdrian Chadd * we're leaking frames; and set the
310022a3aee6SAdrian Chadd * MORE flag as appropriate.
310122a3aee6SAdrian Chadd */
310222a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf);
310322a3aee6SAdrian Chadd
3104eb6f0de0SAdrian Chadd /* Hand off to hardware */
3105eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf);
3106eb6f0de0SAdrian Chadd }
3107eb6f0de0SAdrian Chadd
3108eb6f0de0SAdrian Chadd /*
3109eb6f0de0SAdrian Chadd * Attempt to send the packet.
3110eb6f0de0SAdrian Chadd * If the queue isn't busy, direct-dispatch.
3111eb6f0de0SAdrian Chadd * If the queue is busy enough, queue the given packet on the
3112eb6f0de0SAdrian Chadd * relevant software queue.
3113eb6f0de0SAdrian Chadd */
3114eb6f0de0SAdrian Chadd void
ath_tx_swq(struct ath_softc * sc,struct ieee80211_node * ni,struct ath_txq * txq,int queue_to_head,struct ath_buf * bf)311522a3aee6SAdrian Chadd ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
311622a3aee6SAdrian Chadd struct ath_txq *txq, int queue_to_head, struct ath_buf *bf)
3117eb6f0de0SAdrian Chadd {
3118eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
3119eb6f0de0SAdrian Chadd struct ieee80211_frame *wh;
3120eb6f0de0SAdrian Chadd struct ath_tid *atid;
3121eb6f0de0SAdrian Chadd int pri, tid;
3122eb6f0de0SAdrian Chadd struct mbuf *m0 = bf->bf_m;
3123eb6f0de0SAdrian Chadd
3124375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
31257561cb5cSAdrian Chadd
3126eb6f0de0SAdrian Chadd /* Fetch the TID - non-QoS frames get assigned to TID 16 */
3127eb6f0de0SAdrian Chadd wh = mtod(m0, struct ieee80211_frame *);
3128eb6f0de0SAdrian Chadd pri = ath_tx_getac(sc, m0);
3129eb6f0de0SAdrian Chadd tid = ath_tx_gettid(sc, m0);
3130eb6f0de0SAdrian Chadd atid = &an->an_tid[tid];
3131eb6f0de0SAdrian Chadd
3132a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
3133a108d2d6SAdrian Chadd __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
3134eb6f0de0SAdrian Chadd
3135eb6f0de0SAdrian Chadd /* Set local packet state, used to queue packets to hardware */
313646634305SAdrian Chadd /* XXX potentially duplicate info, re-check */
3137eb6f0de0SAdrian Chadd bf->bf_state.bfs_tid = tid;
3138fc56c9c5SAdrian Chadd bf->bf_state.bfs_tx_queue = txq->axq_qnum;
3139eb6f0de0SAdrian Chadd bf->bf_state.bfs_pri = pri;
3140eb6f0de0SAdrian Chadd
3141eb6f0de0SAdrian Chadd /*
3142eb6f0de0SAdrian Chadd * If the hardware queue isn't busy, queue it directly.
3143eb6f0de0SAdrian Chadd * If the hardware queue is busy, queue it.
3144eb6f0de0SAdrian Chadd * If the TID is paused or the traffic it outside BAW, software
3145eb6f0de0SAdrian Chadd * queue it.
314622a3aee6SAdrian Chadd *
314722a3aee6SAdrian Chadd * If the node is in power-save and we're leaking a frame,
314822a3aee6SAdrian Chadd * leak a single frame.
3149eb6f0de0SAdrian Chadd */
315022a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, atid)) {
3151eb6f0de0SAdrian Chadd /* TID is paused, queue */
3152a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
315322a3aee6SAdrian Chadd /*
315422a3aee6SAdrian Chadd * If the caller requested that it be sent at a high
315522a3aee6SAdrian Chadd * priority, queue it at the head of the list.
315622a3aee6SAdrian Chadd */
315722a3aee6SAdrian Chadd if (queue_to_head)
315822a3aee6SAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list);
315922a3aee6SAdrian Chadd else
31603e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3161eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_pending(sc, an, tid)) {
3162eb6f0de0SAdrian Chadd /* AMPDU pending; queue */
3163a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
31643e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3165eb6f0de0SAdrian Chadd /* XXX sched? */
3166eb6f0de0SAdrian Chadd } else if (ath_tx_ampdu_running(sc, an, tid)) {
316757af292dSAdrian Chadd /*
316857af292dSAdrian Chadd * AMPDU running, queue single-frame if the hardware queue
316957af292dSAdrian Chadd * isn't busy.
317057af292dSAdrian Chadd *
317157af292dSAdrian Chadd * If the hardware queue is busy, sending an aggregate frame
317257af292dSAdrian Chadd * then just hold off so we can queue more aggregate frames.
317357af292dSAdrian Chadd *
317457af292dSAdrian Chadd * Otherwise we may end up with single frames leaking through
317557af292dSAdrian Chadd * because we are dispatching them too quickly.
317657af292dSAdrian Chadd *
317757af292dSAdrian Chadd * TODO: maybe we should treat this as two policies - minimise
317857af292dSAdrian Chadd * latency, or maximise throughput. Then for BE/BK we can
317957af292dSAdrian Chadd * maximise throughput, and VO/VI (if AMPDU is enabled!)
318057af292dSAdrian Chadd * minimise latency.
318157af292dSAdrian Chadd */
318239f24578SAdrian Chadd
318339f24578SAdrian Chadd /*
318439f24578SAdrian Chadd * Always queue the frame to the tail of the list.
318539f24578SAdrian Chadd */
31863e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list);
318739f24578SAdrian Chadd
318839f24578SAdrian Chadd /*
318939f24578SAdrian Chadd * If the hardware queue isn't busy, direct dispatch
319057af292dSAdrian Chadd * the head frame in the list.
319139f24578SAdrian Chadd *
319257af292dSAdrian Chadd * Note: if we're say, configured to do ADDBA but not A-MPDU
319357af292dSAdrian Chadd * then maybe we want to still queue two non-aggregate frames
319457af292dSAdrian Chadd * to the hardware. Again with the per-TID policy
319557af292dSAdrian Chadd * configuration..)
319672910f03SAdrian Chadd *
319739f24578SAdrian Chadd * Otherwise, schedule the TID.
319839f24578SAdrian Chadd */
319972910f03SAdrian Chadd /* XXX TXQ locking */
320057af292dSAdrian Chadd if (txq->axq_depth + txq->fifo.axq_depth == 0) {
32013e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid);
32023e6cc97fSAdrian Chadd ATH_TID_REMOVE(atid, bf, bf_list);
32032a9f83afSAdrian Chadd
32042a9f83afSAdrian Chadd /*
32052a9f83afSAdrian Chadd * Ensure it's definitely treated as a non-AMPDU
32062a9f83afSAdrian Chadd * frame - this information may have been left
32072a9f83afSAdrian Chadd * over from a previous attempt.
32082a9f83afSAdrian Chadd */
32092a9f83afSAdrian Chadd bf->bf_state.bfs_aggr = 0;
32102a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1;
32112a9f83afSAdrian Chadd
32122a9f83afSAdrian Chadd /* Queue to the hardware */
321346634305SAdrian Chadd ath_tx_xmit_aggr(sc, an, txq, bf);
3214a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
3215a108d2d6SAdrian Chadd "%s: xmit_aggr\n",
3216a108d2d6SAdrian Chadd __func__);
3217d4365d16SAdrian Chadd } else {
3218d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
3219a108d2d6SAdrian Chadd "%s: ampdu; swq'ing\n",
3220a108d2d6SAdrian Chadd __func__);
322103682514SAdrian Chadd
3222eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid);
3223eb6f0de0SAdrian Chadd }
322472910f03SAdrian Chadd /*
322572910f03SAdrian Chadd * If we're not doing A-MPDU, be prepared to direct dispatch
322672910f03SAdrian Chadd * up to both limits if possible. This particular corner
322772910f03SAdrian Chadd * case may end up with packet starvation between aggregate
3228f6b6084bSPedro F. Giffuni * traffic and non-aggregate traffic: we want to ensure
322972910f03SAdrian Chadd * that non-aggregate stations get a few frames queued to the
323072910f03SAdrian Chadd * hardware before the aggregate station(s) get their chance.
323172910f03SAdrian Chadd *
323272910f03SAdrian Chadd * So if you only ever see a couple of frames direct dispatched
323372910f03SAdrian Chadd * to the hardware from a non-AMPDU client, check both here
323472910f03SAdrian Chadd * and in the software queue dispatcher to ensure that those
323572910f03SAdrian Chadd * non-AMPDU stations get a fair chance to transmit.
323672910f03SAdrian Chadd */
323772910f03SAdrian Chadd /* XXX TXQ locking */
323872910f03SAdrian Chadd } else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) &&
323972910f03SAdrian Chadd (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) {
3240eb6f0de0SAdrian Chadd /* AMPDU not running, attempt direct dispatch */
3241a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
32420a544719SAdrian Chadd /* See if clrdmask needs to be set */
32430a544719SAdrian Chadd ath_tx_update_clrdmask(sc, atid, bf);
324422a3aee6SAdrian Chadd
324522a3aee6SAdrian Chadd /*
324622a3aee6SAdrian Chadd * Update the current leak count if
324722a3aee6SAdrian Chadd * we're leaking frames; and set the
324822a3aee6SAdrian Chadd * MORE flag as appropriate.
324922a3aee6SAdrian Chadd */
325022a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, atid, bf);
325122a3aee6SAdrian Chadd
325222a3aee6SAdrian Chadd /*
325322a3aee6SAdrian Chadd * Dispatch the frame.
325422a3aee6SAdrian Chadd */
3255eb6f0de0SAdrian Chadd ath_tx_xmit_normal(sc, txq, bf);
3256eb6f0de0SAdrian Chadd } else {
3257eb6f0de0SAdrian Chadd /* Busy; queue */
3258a108d2d6SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
32593e6cc97fSAdrian Chadd ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3260eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid);
3261eb6f0de0SAdrian Chadd }
3262eb6f0de0SAdrian Chadd }
3263eb6f0de0SAdrian Chadd
3264eb6f0de0SAdrian Chadd /*
32654f25ddbbSAdrian Chadd * Only set the clrdmask bit if none of the nodes are currently
32664f25ddbbSAdrian Chadd * filtered.
32674f25ddbbSAdrian Chadd *
32684f25ddbbSAdrian Chadd * XXX TODO: go through all the callers and check to see
32694f25ddbbSAdrian Chadd * which are being called in the context of looping over all
32704f25ddbbSAdrian Chadd * TIDs (eg, if all tids are being paused, resumed, etc.)
32714f25ddbbSAdrian Chadd * That'll avoid O(n^2) complexity here.
32724f25ddbbSAdrian Chadd */
32734f25ddbbSAdrian Chadd static void
ath_tx_set_clrdmask(struct ath_softc * sc,struct ath_node * an)32744f25ddbbSAdrian Chadd ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an)
32754f25ddbbSAdrian Chadd {
32764f25ddbbSAdrian Chadd int i;
32774f25ddbbSAdrian Chadd
32784f25ddbbSAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
32794f25ddbbSAdrian Chadd
32804f25ddbbSAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) {
32814f25ddbbSAdrian Chadd if (an->an_tid[i].isfiltered == 1)
3282f74d878fSAdrian Chadd return;
32834f25ddbbSAdrian Chadd }
32844f25ddbbSAdrian Chadd an->clrdmask = 1;
32854f25ddbbSAdrian Chadd }
32864f25ddbbSAdrian Chadd
32874f25ddbbSAdrian Chadd /*
3288eb6f0de0SAdrian Chadd * Configure the per-TID node state.
3289eb6f0de0SAdrian Chadd *
3290eb6f0de0SAdrian Chadd * This likely belongs in if_ath_node.c but I can't think of anywhere
3291eb6f0de0SAdrian Chadd * else to put it just yet.
3292eb6f0de0SAdrian Chadd *
3293eb6f0de0SAdrian Chadd * This sets up the SLISTs and the mutex as appropriate.
3294eb6f0de0SAdrian Chadd */
3295eb6f0de0SAdrian Chadd void
ath_tx_tid_init(struct ath_softc * sc,struct ath_node * an)3296eb6f0de0SAdrian Chadd ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
3297eb6f0de0SAdrian Chadd {
3298eb6f0de0SAdrian Chadd int i, j;
3299eb6f0de0SAdrian Chadd struct ath_tid *atid;
3300eb6f0de0SAdrian Chadd
3301eb6f0de0SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3302eb6f0de0SAdrian Chadd atid = &an->an_tid[i];
3303f1bc738eSAdrian Chadd
3304f1bc738eSAdrian Chadd /* XXX now with this bzer(), is the field 0'ing needed? */
3305f1bc738eSAdrian Chadd bzero(atid, sizeof(*atid));
3306f1bc738eSAdrian Chadd
33073e6cc97fSAdrian Chadd TAILQ_INIT(&atid->tid_q);
33083e6cc97fSAdrian Chadd TAILQ_INIT(&atid->filtq.tid_q);
3309eb6f0de0SAdrian Chadd atid->tid = i;
3310eb6f0de0SAdrian Chadd atid->an = an;
3311eb6f0de0SAdrian Chadd for (j = 0; j < ATH_TID_MAX_BUFS; j++)
3312eb6f0de0SAdrian Chadd atid->tx_buf[j] = NULL;
3313eb6f0de0SAdrian Chadd atid->baw_head = atid->baw_tail = 0;
3314eb6f0de0SAdrian Chadd atid->paused = 0;
3315eb6f0de0SAdrian Chadd atid->sched = 0;
3316eb6f0de0SAdrian Chadd atid->hwq_depth = 0;
3317eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0;
3318eb6f0de0SAdrian Chadd if (i == IEEE80211_NONQOS_TID)
33197403d1b9SAdrian Chadd atid->ac = ATH_NONQOS_TID_AC;
3320eb6f0de0SAdrian Chadd else
3321eb6f0de0SAdrian Chadd atid->ac = TID_TO_WME_AC(i);
3322eb6f0de0SAdrian Chadd }
33234f25ddbbSAdrian Chadd an->clrdmask = 1; /* Always start by setting this bit */
3324eb6f0de0SAdrian Chadd }
3325eb6f0de0SAdrian Chadd
3326eb6f0de0SAdrian Chadd /*
3327eb6f0de0SAdrian Chadd * Pause the current TID. This stops packets from being transmitted
3328eb6f0de0SAdrian Chadd * on it.
3329eb6f0de0SAdrian Chadd *
3330eb6f0de0SAdrian Chadd * Since this is also called from upper layers as well as the driver,
3331eb6f0de0SAdrian Chadd * it will get the TID lock.
3332eb6f0de0SAdrian Chadd */
3333eb6f0de0SAdrian Chadd static void
ath_tx_tid_pause(struct ath_softc * sc,struct ath_tid * tid)3334eb6f0de0SAdrian Chadd ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
3335eb6f0de0SAdrian Chadd {
333688b3d483SAdrian Chadd
3337375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3338eb6f0de0SAdrian Chadd tid->paused++;
33391771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n",
33401771c649SAdrian Chadd __func__,
33411771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":",
33421771c649SAdrian Chadd tid->tid,
33431771c649SAdrian Chadd tid->paused);
3344eb6f0de0SAdrian Chadd }
3345eb6f0de0SAdrian Chadd
3346eb6f0de0SAdrian Chadd /*
3347eb6f0de0SAdrian Chadd * Unpause the current TID, and schedule it if needed.
3348eb6f0de0SAdrian Chadd */
3349eb6f0de0SAdrian Chadd static void
ath_tx_tid_resume(struct ath_softc * sc,struct ath_tid * tid)3350eb6f0de0SAdrian Chadd ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
3351eb6f0de0SAdrian Chadd {
3352375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3353eb6f0de0SAdrian Chadd
3354dff5bdf4SAdrian Chadd /*
3355dff5bdf4SAdrian Chadd * There's some odd places where ath_tx_tid_resume() is called
3356dff5bdf4SAdrian Chadd * when it shouldn't be; this works around that particular issue
3357dff5bdf4SAdrian Chadd * until it's actually resolved.
3358dff5bdf4SAdrian Chadd */
3359dff5bdf4SAdrian Chadd if (tid->paused == 0) {
33601771c649SAdrian Chadd device_printf(sc->sc_dev,
33611771c649SAdrian Chadd "%s: [%6D]: tid=%d, paused=0?\n",
33621771c649SAdrian Chadd __func__,
33631771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":",
33641771c649SAdrian Chadd tid->tid);
3365dff5bdf4SAdrian Chadd } else {
3366eb6f0de0SAdrian Chadd tid->paused--;
3367dff5bdf4SAdrian Chadd }
3368eb6f0de0SAdrian Chadd
33691771c649SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
33701771c649SAdrian Chadd "%s: [%6D]: tid=%d, unpaused = %d\n",
33711771c649SAdrian Chadd __func__,
33721771c649SAdrian Chadd tid->an->an_node.ni_macaddr, ":",
33731771c649SAdrian Chadd tid->tid,
33741771c649SAdrian Chadd tid->paused);
3375eb6f0de0SAdrian Chadd
33760eb81626SAdrian Chadd if (tid->paused)
3377eb6f0de0SAdrian Chadd return;
33780eb81626SAdrian Chadd
33790eb81626SAdrian Chadd /*
33800eb81626SAdrian Chadd * Override the clrdmask configuration for the next frame
33810eb81626SAdrian Chadd * from this TID, just to get the ball rolling.
33820eb81626SAdrian Chadd */
33834f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an);
33840eb81626SAdrian Chadd
33850eb81626SAdrian Chadd if (tid->axq_depth == 0)
33860eb81626SAdrian Chadd return;
3387eb6f0de0SAdrian Chadd
3388f1bc738eSAdrian Chadd /* XXX isfiltered shouldn't ever be 0 at this point */
3389f1bc738eSAdrian Chadd if (tid->isfiltered == 1) {
339083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n",
339183bbd5ebSRui Paulo __func__);
3392f1bc738eSAdrian Chadd return;
3393f1bc738eSAdrian Chadd }
3394f1bc738eSAdrian Chadd
3395eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid);
339621bca442SAdrian Chadd
339721bca442SAdrian Chadd /*
339821bca442SAdrian Chadd * Queue the software TX scheduler.
339921bca442SAdrian Chadd */
340021bca442SAdrian Chadd ath_tx_swq_kick(sc);
3401eb6f0de0SAdrian Chadd }
3402eb6f0de0SAdrian Chadd
3403eb6f0de0SAdrian Chadd /*
3404f1bc738eSAdrian Chadd * Add the given ath_buf to the TID filtered frame list.
3405f1bc738eSAdrian Chadd * This requires the TID be filtered.
3406f1bc738eSAdrian Chadd */
3407f1bc738eSAdrian Chadd static void
ath_tx_tid_filt_addbuf(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)3408f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid,
3409f1bc738eSAdrian Chadd struct ath_buf *bf)
3410f1bc738eSAdrian Chadd {
3411f1bc738eSAdrian Chadd
3412375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3413375307d4SAdrian Chadd
3414f1bc738eSAdrian Chadd if (!tid->isfiltered)
341583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n",
341683bbd5ebSRui Paulo __func__);
3417f1bc738eSAdrian Chadd
3418f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf);
3419f1bc738eSAdrian Chadd
3420f1bc738eSAdrian Chadd /* Set the retry bit and bump the retry counter */
3421f1bc738eSAdrian Chadd ath_tx_set_retry(sc, bf);
3422f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swfiltered++;
3423f1bc738eSAdrian Chadd
342413aa9ee5SAdrian Chadd ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list);
3425f1bc738eSAdrian Chadd }
3426f1bc738eSAdrian Chadd
3427f1bc738eSAdrian Chadd /*
3428f1bc738eSAdrian Chadd * Handle a completed filtered frame from the given TID.
3429f1bc738eSAdrian Chadd * This just enables/pauses the filtered frame state if required
3430f1bc738eSAdrian Chadd * and appends the filtered frame to the filtered queue.
3431f1bc738eSAdrian Chadd */
3432f1bc738eSAdrian Chadd static void
ath_tx_tid_filt_comp_buf(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)3433f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid,
3434f1bc738eSAdrian Chadd struct ath_buf *bf)
3435f1bc738eSAdrian Chadd {
3436f1bc738eSAdrian Chadd
3437375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3438f1bc738eSAdrian Chadd
3439f1bc738eSAdrian Chadd if (! tid->isfiltered) {
344042fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n",
344142fdd8e7SAdrian Chadd __func__, tid->tid);
3442f1bc738eSAdrian Chadd tid->isfiltered = 1;
3443f1bc738eSAdrian Chadd ath_tx_tid_pause(sc, tid);
3444f1bc738eSAdrian Chadd }
3445f1bc738eSAdrian Chadd
3446f1bc738eSAdrian Chadd /* Add the frame to the filter queue */
3447f1bc738eSAdrian Chadd ath_tx_tid_filt_addbuf(sc, tid, bf);
3448f1bc738eSAdrian Chadd }
3449f1bc738eSAdrian Chadd
3450f1bc738eSAdrian Chadd /*
3451f1bc738eSAdrian Chadd * Complete the filtered frame TX completion.
3452f1bc738eSAdrian Chadd *
3453f1bc738eSAdrian Chadd * If there are no more frames in the hardware queue, unpause/unfilter
3454f1bc738eSAdrian Chadd * the TID if applicable. Otherwise we will wait for a node PS transition
3455f1bc738eSAdrian Chadd * to unfilter.
3456f1bc738eSAdrian Chadd */
3457f1bc738eSAdrian Chadd static void
ath_tx_tid_filt_comp_complete(struct ath_softc * sc,struct ath_tid * tid)3458f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid)
3459f1bc738eSAdrian Chadd {
3460f1bc738eSAdrian Chadd struct ath_buf *bf;
3461a3fd3b14SAdrian Chadd int do_resume = 0;
3462f1bc738eSAdrian Chadd
3463375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3464f1bc738eSAdrian Chadd
3465f1bc738eSAdrian Chadd if (tid->hwq_depth != 0)
3466f1bc738eSAdrian Chadd return;
3467f1bc738eSAdrian Chadd
346842fdd8e7SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n",
346942fdd8e7SAdrian Chadd __func__, tid->tid);
3470a3fd3b14SAdrian Chadd if (tid->isfiltered == 1) {
3471f1bc738eSAdrian Chadd tid->isfiltered = 0;
3472a3fd3b14SAdrian Chadd do_resume = 1;
3473a3fd3b14SAdrian Chadd }
3474a3fd3b14SAdrian Chadd
34754f25ddbbSAdrian Chadd /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */
34764f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an);
3477f1bc738eSAdrian Chadd
3478f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */
347913aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) {
348013aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list);
34813e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3482f1bc738eSAdrian Chadd }
3483f1bc738eSAdrian Chadd
3484c5d230abSAdrian Chadd /* And only resume if we had paused before */
3485a3fd3b14SAdrian Chadd if (do_resume)
3486f1bc738eSAdrian Chadd ath_tx_tid_resume(sc, tid);
3487f1bc738eSAdrian Chadd }
3488f1bc738eSAdrian Chadd
3489f1bc738eSAdrian Chadd /*
3490f1bc738eSAdrian Chadd * Called when a single (aggregate or otherwise) frame is completed.
3491f1bc738eSAdrian Chadd *
34921f737306SAdrian Chadd * Returns 0 if the buffer could be added to the filtered list
34931f737306SAdrian Chadd * (cloned or otherwise), 1 if the buffer couldn't be added to the
3494f1bc738eSAdrian Chadd * filtered list (failed clone; expired retry) and the caller should
3495f1bc738eSAdrian Chadd * free it and handle it like a failure (eg by sending a BAR.)
34961f737306SAdrian Chadd *
34971f737306SAdrian Chadd * since the buffer may be cloned, bf must be not touched after this
34981f737306SAdrian Chadd * if the return value is 0.
3499f1bc738eSAdrian Chadd */
3500f1bc738eSAdrian Chadd static int
ath_tx_tid_filt_comp_single(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf)3501f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid,
3502f1bc738eSAdrian Chadd struct ath_buf *bf)
3503f1bc738eSAdrian Chadd {
3504f1bc738eSAdrian Chadd struct ath_buf *nbf;
3505f1bc738eSAdrian Chadd int retval;
3506f1bc738eSAdrian Chadd
3507375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3508f1bc738eSAdrian Chadd
3509f1bc738eSAdrian Chadd /*
3510f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever.
3511f1bc738eSAdrian Chadd */
3512f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
35130eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++;
3514f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3515f1bc738eSAdrian Chadd "%s: bf=%p, seqno=%d, exceeded retries\n",
3516f1bc738eSAdrian Chadd __func__,
3517f1bc738eSAdrian Chadd bf,
351842fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno));
35191f737306SAdrian Chadd retval = 1; /* error */
35201f737306SAdrian Chadd goto finish;
3521f1bc738eSAdrian Chadd }
3522f1bc738eSAdrian Chadd
3523f1bc738eSAdrian Chadd /*
3524f1bc738eSAdrian Chadd * A busy buffer can't be added to the retry list.
3525f1bc738eSAdrian Chadd * It needs to be cloned.
3526f1bc738eSAdrian Chadd */
3527f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) {
3528f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3529f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3530f1bc738eSAdrian Chadd "%s: busy buffer clone: %p -> %p\n",
3531f1bc738eSAdrian Chadd __func__, bf, nbf);
3532f1bc738eSAdrian Chadd } else {
3533f1bc738eSAdrian Chadd nbf = bf;
3534f1bc738eSAdrian Chadd }
3535f1bc738eSAdrian Chadd
3536f1bc738eSAdrian Chadd if (nbf == NULL) {
3537f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3538f1bc738eSAdrian Chadd "%s: busy buffer couldn't be cloned (%p)!\n",
3539f1bc738eSAdrian Chadd __func__, bf);
35401f737306SAdrian Chadd retval = 1; /* error */
3541f1bc738eSAdrian Chadd } else {
3542f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf);
35431f737306SAdrian Chadd retval = 0; /* ok */
3544f1bc738eSAdrian Chadd }
35451f737306SAdrian Chadd finish:
3546f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid);
3547f1bc738eSAdrian Chadd
3548f1bc738eSAdrian Chadd return (retval);
3549f1bc738eSAdrian Chadd }
3550f1bc738eSAdrian Chadd
3551f1bc738eSAdrian Chadd static void
ath_tx_tid_filt_comp_aggr(struct ath_softc * sc,struct ath_tid * tid,struct ath_buf * bf_first,ath_bufhead * bf_q)3552f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid,
3553f1bc738eSAdrian Chadd struct ath_buf *bf_first, ath_bufhead *bf_q)
3554f1bc738eSAdrian Chadd {
3555f1bc738eSAdrian Chadd struct ath_buf *bf, *bf_next, *nbf;
3556f1bc738eSAdrian Chadd
3557375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3558f1bc738eSAdrian Chadd
3559f1bc738eSAdrian Chadd bf = bf_first;
3560f1bc738eSAdrian Chadd while (bf) {
3561f1bc738eSAdrian Chadd bf_next = bf->bf_next;
3562f1bc738eSAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */
3563f1bc738eSAdrian Chadd
3564f1bc738eSAdrian Chadd /*
3565f1bc738eSAdrian Chadd * Don't allow a filtered frame to live forever.
3566f1bc738eSAdrian Chadd */
3567f1bc738eSAdrian Chadd if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
35680eb81626SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++;
3569f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
357042fdd8e7SAdrian Chadd "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n",
3571f1bc738eSAdrian Chadd __func__,
357242fdd8e7SAdrian Chadd tid->tid,
3573f1bc738eSAdrian Chadd bf,
357442fdd8e7SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno));
3575f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3576f1bc738eSAdrian Chadd goto next;
3577f1bc738eSAdrian Chadd }
3578f1bc738eSAdrian Chadd
3579f1bc738eSAdrian Chadd if (bf->bf_flags & ATH_BUF_BUSY) {
3580f1bc738eSAdrian Chadd nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3581f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
358242fdd8e7SAdrian Chadd "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n",
358342fdd8e7SAdrian Chadd __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno));
3584f1bc738eSAdrian Chadd } else {
3585f1bc738eSAdrian Chadd nbf = bf;
3586f1bc738eSAdrian Chadd }
3587f1bc738eSAdrian Chadd
3588f1bc738eSAdrian Chadd /*
3589f1bc738eSAdrian Chadd * If the buffer couldn't be cloned, add it to bf_q;
3590f1bc738eSAdrian Chadd * the caller will free the buffer(s) as required.
3591f1bc738eSAdrian Chadd */
3592f1bc738eSAdrian Chadd if (nbf == NULL) {
3593f1bc738eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
359442fdd8e7SAdrian Chadd "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n",
359542fdd8e7SAdrian Chadd __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno));
3596f1bc738eSAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3597f1bc738eSAdrian Chadd } else {
3598f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3599f1bc738eSAdrian Chadd }
3600f1bc738eSAdrian Chadd next:
3601f1bc738eSAdrian Chadd bf = bf_next;
3602f1bc738eSAdrian Chadd }
3603f1bc738eSAdrian Chadd
3604f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, tid);
3605f1bc738eSAdrian Chadd }
3606f1bc738eSAdrian Chadd
3607f1bc738eSAdrian Chadd /*
360888b3d483SAdrian Chadd * Suspend the queue because we need to TX a BAR.
360988b3d483SAdrian Chadd */
361088b3d483SAdrian Chadd static void
ath_tx_tid_bar_suspend(struct ath_softc * sc,struct ath_tid * tid)361188b3d483SAdrian Chadd ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
361288b3d483SAdrian Chadd {
3613375307d4SAdrian Chadd
3614375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
361588b3d483SAdrian Chadd
36160e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
36176d07d3e0SAdrian Chadd "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n",
361888b3d483SAdrian Chadd __func__,
36196d07d3e0SAdrian Chadd tid->tid,
3620e60c4fc2SAdrian Chadd tid->bar_wait,
3621e60c4fc2SAdrian Chadd tid->bar_tx);
362288b3d483SAdrian Chadd
362388b3d483SAdrian Chadd /* We shouldn't be called when bar_tx is 1 */
362488b3d483SAdrian Chadd if (tid->bar_tx) {
362583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
362683bbd5ebSRui Paulo "%s: bar_tx is 1?!\n", __func__);
362788b3d483SAdrian Chadd }
362888b3d483SAdrian Chadd
362988b3d483SAdrian Chadd /* If we've already been called, just be patient. */
363088b3d483SAdrian Chadd if (tid->bar_wait)
363188b3d483SAdrian Chadd return;
363288b3d483SAdrian Chadd
363388b3d483SAdrian Chadd /* Wait! */
363488b3d483SAdrian Chadd tid->bar_wait = 1;
363588b3d483SAdrian Chadd
363688b3d483SAdrian Chadd /* Only one pause, no matter how many frames fail */
363788b3d483SAdrian Chadd ath_tx_tid_pause(sc, tid);
363888b3d483SAdrian Chadd }
363988b3d483SAdrian Chadd
364088b3d483SAdrian Chadd /*
364188b3d483SAdrian Chadd * We've finished with BAR handling - either we succeeded or
364288b3d483SAdrian Chadd * failed. Either way, unsuspend TX.
364388b3d483SAdrian Chadd */
364488b3d483SAdrian Chadd static void
ath_tx_tid_bar_unsuspend(struct ath_softc * sc,struct ath_tid * tid)364588b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
364688b3d483SAdrian Chadd {
3647375307d4SAdrian Chadd
3648375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
364988b3d483SAdrian Chadd
36500e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
36516d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n",
365288b3d483SAdrian Chadd __func__,
36539b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr,
36549b48fb4bSAdrian Chadd ":",
36556d07d3e0SAdrian Chadd tid->tid);
365688b3d483SAdrian Chadd
365788b3d483SAdrian Chadd if (tid->bar_tx == 0 || tid->bar_wait == 0) {
365883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
36596d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
366083bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":",
366183bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait);
366288b3d483SAdrian Chadd }
366388b3d483SAdrian Chadd
366488b3d483SAdrian Chadd tid->bar_tx = tid->bar_wait = 0;
366588b3d483SAdrian Chadd ath_tx_tid_resume(sc, tid);
366688b3d483SAdrian Chadd }
366788b3d483SAdrian Chadd
366888b3d483SAdrian Chadd /*
366988b3d483SAdrian Chadd * Return whether we're ready to TX a BAR frame.
367088b3d483SAdrian Chadd *
367188b3d483SAdrian Chadd * Requires the TID lock be held.
367288b3d483SAdrian Chadd */
367388b3d483SAdrian Chadd static int
ath_tx_tid_bar_tx_ready(struct ath_softc * sc,struct ath_tid * tid)367488b3d483SAdrian Chadd ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
367588b3d483SAdrian Chadd {
367688b3d483SAdrian Chadd
3677375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
367888b3d483SAdrian Chadd
367988b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->hwq_depth > 0)
368088b3d483SAdrian Chadd return (0);
368188b3d483SAdrian Chadd
36829b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
36836d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar ready\n",
36849b48fb4bSAdrian Chadd __func__,
36859b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr,
36869b48fb4bSAdrian Chadd ":",
36876d07d3e0SAdrian Chadd tid->tid);
36880e22ed0eSAdrian Chadd
368988b3d483SAdrian Chadd return (1);
369088b3d483SAdrian Chadd }
369188b3d483SAdrian Chadd
369288b3d483SAdrian Chadd /*
369388b3d483SAdrian Chadd * Check whether the current TID is ready to have a BAR
369488b3d483SAdrian Chadd * TXed and if so, do the TX.
369588b3d483SAdrian Chadd *
369688b3d483SAdrian Chadd * Since the TID/TXQ lock can't be held during a call to
369788b3d483SAdrian Chadd * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
369888b3d483SAdrian Chadd * sending the BAR and locking it again.
369988b3d483SAdrian Chadd *
370088b3d483SAdrian Chadd * Eventually, the code to send the BAR should be broken out
370188b3d483SAdrian Chadd * from this routine so the lock doesn't have to be reacquired
370288b3d483SAdrian Chadd * just to be immediately dropped by the caller.
370388b3d483SAdrian Chadd */
370488b3d483SAdrian Chadd static void
ath_tx_tid_bar_tx(struct ath_softc * sc,struct ath_tid * tid)370588b3d483SAdrian Chadd ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
370688b3d483SAdrian Chadd {
370788b3d483SAdrian Chadd struct ieee80211_tx_ampdu *tap;
370888b3d483SAdrian Chadd
3709375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
371088b3d483SAdrian Chadd
37110e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
37126d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called\n",
371388b3d483SAdrian Chadd __func__,
37149b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr,
37159b48fb4bSAdrian Chadd ":",
37166d07d3e0SAdrian Chadd tid->tid);
371788b3d483SAdrian Chadd
371888b3d483SAdrian Chadd tap = ath_tx_get_tx_tid(tid->an, tid->tid);
371988b3d483SAdrian Chadd
372088b3d483SAdrian Chadd /*
372188b3d483SAdrian Chadd * This is an error condition!
372288b3d483SAdrian Chadd */
372388b3d483SAdrian Chadd if (tid->bar_wait == 0 || tid->bar_tx == 1) {
372483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
37256d07d3e0SAdrian Chadd "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
372683bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":",
372783bbd5ebSRui Paulo tid->tid, tid->bar_tx, tid->bar_wait);
372888b3d483SAdrian Chadd return;
372988b3d483SAdrian Chadd }
373088b3d483SAdrian Chadd
373188b3d483SAdrian Chadd /* Don't do anything if we still have pending frames */
373288b3d483SAdrian Chadd if (tid->hwq_depth > 0) {
37330e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
37346d07d3e0SAdrian Chadd "%s: %6D: TID=%d, hwq_depth=%d, waiting\n",
373588b3d483SAdrian Chadd __func__,
37369b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr,
37379b48fb4bSAdrian Chadd ":",
37386d07d3e0SAdrian Chadd tid->tid,
373988b3d483SAdrian Chadd tid->hwq_depth);
374088b3d483SAdrian Chadd return;
374188b3d483SAdrian Chadd }
374288b3d483SAdrian Chadd
374388b3d483SAdrian Chadd /* We're now about to TX */
374488b3d483SAdrian Chadd tid->bar_tx = 1;
374588b3d483SAdrian Chadd
374688b3d483SAdrian Chadd /*
37474e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame,
37484e81f27cSAdrian Chadd * just to get the ball rolling.
37494e81f27cSAdrian Chadd */
37504f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an);
37514e81f27cSAdrian Chadd
37524e81f27cSAdrian Chadd /*
375388b3d483SAdrian Chadd * Calculate new BAW left edge, now that all frames have either
375488b3d483SAdrian Chadd * succeeded or failed.
375588b3d483SAdrian Chadd *
375688b3d483SAdrian Chadd * XXX verify this is _actually_ the valid value to begin at!
375788b3d483SAdrian Chadd */
37580e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
37596d07d3e0SAdrian Chadd "%s: %6D: TID=%d, new BAW left edge=%d\n",
376088b3d483SAdrian Chadd __func__,
37619b48fb4bSAdrian Chadd tid->an->an_node.ni_macaddr,
37629b48fb4bSAdrian Chadd ":",
37636d07d3e0SAdrian Chadd tid->tid,
376488b3d483SAdrian Chadd tap->txa_start);
376588b3d483SAdrian Chadd
376688b3d483SAdrian Chadd /* Try sending the BAR frame */
376788b3d483SAdrian Chadd /* We can't hold the lock here! */
376888b3d483SAdrian Chadd
3769375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
377088b3d483SAdrian Chadd if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
377188b3d483SAdrian Chadd /* Success? Now we wait for notification that it's done */
3772375307d4SAdrian Chadd ATH_TX_LOCK(sc);
377388b3d483SAdrian Chadd return;
377488b3d483SAdrian Chadd }
377588b3d483SAdrian Chadd
377688b3d483SAdrian Chadd /* Failure? For now, warn loudly and continue */
3777375307d4SAdrian Chadd ATH_TX_LOCK(sc);
377883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
37796d07d3e0SAdrian Chadd "%s: %6D: TID=%d, failed to TX BAR, continue!\n",
378083bbd5ebSRui Paulo __func__, tid->an->an_node.ni_macaddr, ":",
37816d07d3e0SAdrian Chadd tid->tid);
378288b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, tid);
378388b3d483SAdrian Chadd }
378488b3d483SAdrian Chadd
3785eb6f0de0SAdrian Chadd static void
ath_tx_tid_drain_pkt(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,ath_bufhead * bf_cq,struct ath_buf * bf)3786f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an,
3787f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf)
3788eb6f0de0SAdrian Chadd {
3789eb6f0de0SAdrian Chadd
3790375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3791eb6f0de0SAdrian Chadd
3792eb6f0de0SAdrian Chadd /*
3793eb6f0de0SAdrian Chadd * If the current TID is running AMPDU, update
3794eb6f0de0SAdrian Chadd * the BAW.
3795eb6f0de0SAdrian Chadd */
3796eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3797eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw) {
3798eb6f0de0SAdrian Chadd /*
3799eb6f0de0SAdrian Chadd * Only remove the frame from the BAW if it's
3800eb6f0de0SAdrian Chadd * been transmitted at least once; this means
3801eb6f0de0SAdrian Chadd * the frame was in the BAW to begin with.
3802eb6f0de0SAdrian Chadd */
3803eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries > 0) {
3804eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, tid, bf);
3805eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0;
3806eb6f0de0SAdrian Chadd }
3807ce597531SAdrian Chadd #if 0
3808eb6f0de0SAdrian Chadd /*
3809eb6f0de0SAdrian Chadd * This has become a non-fatal error now
3810eb6f0de0SAdrian Chadd */
3811eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw)
381283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW
3813eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n",
3814eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
3815ce597531SAdrian Chadd #endif
3816eb6f0de0SAdrian Chadd }
3817b837332dSAdrian Chadd
3818b837332dSAdrian Chadd /* Strip it out of an aggregate list if it was in one */
3819b837332dSAdrian Chadd bf->bf_next = NULL;
3820b837332dSAdrian Chadd
3821b837332dSAdrian Chadd /* Insert on the free queue to be freed by the caller */
3822eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
3823eb6f0de0SAdrian Chadd }
3824eb6f0de0SAdrian Chadd
3825f1bc738eSAdrian Chadd static void
ath_tx_tid_drain_print(struct ath_softc * sc,struct ath_node * an,const char * pfx,struct ath_tid * tid,struct ath_buf * bf)3826f1bc738eSAdrian Chadd ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an,
382703682514SAdrian Chadd const char *pfx, struct ath_tid *tid, struct ath_buf *bf)
3828f1bc738eSAdrian Chadd {
3829f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node;
383083bbd5ebSRui Paulo struct ath_txq *txq;
3831f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap;
3832f1bc738eSAdrian Chadd
383383bbd5ebSRui Paulo txq = sc->sc_ac2q[tid->ac];
3834f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid);
3835f1bc738eSAdrian Chadd
38366fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3837272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, "
3838f1bc738eSAdrian Chadd "seqno=%d, retry=%d\n",
3839272a8ab6SAdrian Chadd __func__,
3840272a8ab6SAdrian Chadd pfx,
3841272a8ab6SAdrian Chadd ni->ni_macaddr,
3842272a8ab6SAdrian Chadd ":",
3843272a8ab6SAdrian Chadd bf,
3844f1bc738eSAdrian Chadd bf->bf_state.bfs_addedbaw,
3845f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw,
3846f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno),
3847f1bc738eSAdrian Chadd bf->bf_state.bfs_retries);
38486fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3849272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n",
3850272a8ab6SAdrian Chadd __func__,
3851272a8ab6SAdrian Chadd pfx,
3852272a8ab6SAdrian Chadd ni->ni_macaddr,
3853272a8ab6SAdrian Chadd ":",
3854272a8ab6SAdrian Chadd bf,
385503682514SAdrian Chadd txq->axq_qnum,
38564e81f27cSAdrian Chadd txq->axq_depth,
38574e81f27cSAdrian Chadd txq->axq_aggr_depth);
38586fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3859272a8ab6SAdrian Chadd "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, "
3860272a8ab6SAdrian Chadd "isfiltered=%d\n",
3861272a8ab6SAdrian Chadd __func__,
3862272a8ab6SAdrian Chadd pfx,
3863272a8ab6SAdrian Chadd ni->ni_macaddr,
3864272a8ab6SAdrian Chadd ":",
3865272a8ab6SAdrian Chadd bf,
3866f1bc738eSAdrian Chadd tid->axq_depth,
3867f1bc738eSAdrian Chadd tid->hwq_depth,
3868f1bc738eSAdrian Chadd tid->bar_wait,
3869f1bc738eSAdrian Chadd tid->isfiltered);
38706fc621c2SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3871272a8ab6SAdrian Chadd "%s: %s: %6D: tid %d: "
38724e81f27cSAdrian Chadd "sched=%d, paused=%d, "
38734e81f27cSAdrian Chadd "incomp=%d, baw_head=%d, "
3874f1bc738eSAdrian Chadd "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
3875272a8ab6SAdrian Chadd __func__,
3876272a8ab6SAdrian Chadd pfx,
3877272a8ab6SAdrian Chadd ni->ni_macaddr,
3878272a8ab6SAdrian Chadd ":",
3879272a8ab6SAdrian Chadd tid->tid,
38804e81f27cSAdrian Chadd tid->sched, tid->paused,
38814e81f27cSAdrian Chadd tid->incomp, tid->baw_head,
3882f1bc738eSAdrian Chadd tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
3883f1bc738eSAdrian Chadd ni->ni_txseqs[tid->tid]);
3884f1bc738eSAdrian Chadd
3885f1bc738eSAdrian Chadd /* XXX Dump the frame, see what it is? */
3886a2be2710SRui Paulo if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
3887f1bc738eSAdrian Chadd ieee80211_dump_pkt(ni->ni_ic,
3888f1bc738eSAdrian Chadd mtod(bf->bf_m, const uint8_t *),
3889f1bc738eSAdrian Chadd bf->bf_m->m_len, 0, -1);
3890f1bc738eSAdrian Chadd }
3891f1bc738eSAdrian Chadd
3892f1bc738eSAdrian Chadd /*
3893f1bc738eSAdrian Chadd * Free any packets currently pending in the software TX queue.
3894f1bc738eSAdrian Chadd *
3895f1bc738eSAdrian Chadd * This will be called when a node is being deleted.
3896f1bc738eSAdrian Chadd *
3897f1bc738eSAdrian Chadd * It can also be called on an active node during an interface
3898f1bc738eSAdrian Chadd * reset or state transition.
3899f1bc738eSAdrian Chadd *
3900f1bc738eSAdrian Chadd * (From Linux/reference):
3901f1bc738eSAdrian Chadd *
3902f1bc738eSAdrian Chadd * TODO: For frame(s) that are in the retry state, we will reuse the
3903f1bc738eSAdrian Chadd * sequence number(s) without setting the retry bit. The
3904f1bc738eSAdrian Chadd * alternative is to give up on these and BAR the receiver's window
3905f1bc738eSAdrian Chadd * forward.
3906f1bc738eSAdrian Chadd */
3907f1bc738eSAdrian Chadd static void
ath_tx_tid_drain(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,ath_bufhead * bf_cq)3908f1bc738eSAdrian Chadd ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
3909f1bc738eSAdrian Chadd struct ath_tid *tid, ath_bufhead *bf_cq)
3910f1bc738eSAdrian Chadd {
3911f1bc738eSAdrian Chadd struct ath_buf *bf;
3912f1bc738eSAdrian Chadd struct ieee80211_tx_ampdu *tap;
3913f1bc738eSAdrian Chadd struct ieee80211_node *ni = &an->an_node;
3914f1bc738eSAdrian Chadd int t;
3915f1bc738eSAdrian Chadd
3916f1bc738eSAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid);
3917f1bc738eSAdrian Chadd
3918375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
3919f1bc738eSAdrian Chadd
3920f1bc738eSAdrian Chadd /* Walk the queue, free frames */
3921f1bc738eSAdrian Chadd t = 0;
3922f1bc738eSAdrian Chadd for (;;) {
39233e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid);
3924f1bc738eSAdrian Chadd if (bf == NULL) {
3925f1bc738eSAdrian Chadd break;
3926f1bc738eSAdrian Chadd }
3927f1bc738eSAdrian Chadd
3928f1bc738eSAdrian Chadd if (t == 0) {
392903682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "norm", tid, bf);
39306fc621c2SAdrian Chadd // t = 1;
3931f1bc738eSAdrian Chadd }
3932f1bc738eSAdrian Chadd
39333e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list);
3934f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3935f1bc738eSAdrian Chadd }
3936f1bc738eSAdrian Chadd
3937f1bc738eSAdrian Chadd /* And now, drain the filtered frame queue */
3938f1bc738eSAdrian Chadd t = 0;
3939f1bc738eSAdrian Chadd for (;;) {
394013aa9ee5SAdrian Chadd bf = ATH_TID_FILT_FIRST(tid);
3941f1bc738eSAdrian Chadd if (bf == NULL)
3942f1bc738eSAdrian Chadd break;
3943f1bc738eSAdrian Chadd
3944f1bc738eSAdrian Chadd if (t == 0) {
394503682514SAdrian Chadd ath_tx_tid_drain_print(sc, an, "filt", tid, bf);
39466fc621c2SAdrian Chadd // t = 1;
3947f1bc738eSAdrian Chadd }
3948f1bc738eSAdrian Chadd
394913aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3950f1bc738eSAdrian Chadd ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3951f1bc738eSAdrian Chadd }
3952f1bc738eSAdrian Chadd
3953eb6f0de0SAdrian Chadd /*
39544e81f27cSAdrian Chadd * Override the clrdmask configuration for the next frame
39554e81f27cSAdrian Chadd * in case there is some future transmission, just to get
39564e81f27cSAdrian Chadd * the ball rolling.
39574e81f27cSAdrian Chadd *
39584e81f27cSAdrian Chadd * This won't hurt things if the TID is about to be freed.
39594e81f27cSAdrian Chadd */
39604f25ddbbSAdrian Chadd ath_tx_set_clrdmask(sc, tid->an);
39614e81f27cSAdrian Chadd
39624e81f27cSAdrian Chadd /*
3963eb6f0de0SAdrian Chadd * Now that it's completed, grab the TID lock and update
3964eb6f0de0SAdrian Chadd * the sequence number and BAW window.
3965eb6f0de0SAdrian Chadd * Because sequence numbers have been assigned to frames
3966eb6f0de0SAdrian Chadd * that haven't been sent yet, it's entirely possible
3967eb6f0de0SAdrian Chadd * we'll be called with some pending frames that have not
3968eb6f0de0SAdrian Chadd * been transmitted.
3969eb6f0de0SAdrian Chadd *
3970eb6f0de0SAdrian Chadd * The cleaner solution is to do the sequence number allocation
3971eb6f0de0SAdrian Chadd * when the packet is first transmitted - and thus the "retries"
3972eb6f0de0SAdrian Chadd * check above would be enough to update the BAW/seqno.
3973eb6f0de0SAdrian Chadd */
3974eb6f0de0SAdrian Chadd
3975eb6f0de0SAdrian Chadd /* But don't do it for non-QoS TIDs */
3976eb6f0de0SAdrian Chadd if (tap) {
39779b48fb4bSAdrian Chadd #if 1
3978eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
39799b48fb4bSAdrian Chadd "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n",
39809b48fb4bSAdrian Chadd __func__,
39819b48fb4bSAdrian Chadd ni->ni_macaddr,
39829b48fb4bSAdrian Chadd ":",
39839b48fb4bSAdrian Chadd an,
39849b48fb4bSAdrian Chadd tid->tid,
39859b48fb4bSAdrian Chadd tap->txa_start);
3986eb6f0de0SAdrian Chadd #endif
3987eb6f0de0SAdrian Chadd ni->ni_txseqs[tid->tid] = tap->txa_start;
3988eb6f0de0SAdrian Chadd tid->baw_tail = tid->baw_head;
3989eb6f0de0SAdrian Chadd }
3990eb6f0de0SAdrian Chadd }
3991eb6f0de0SAdrian Chadd
3992eb6f0de0SAdrian Chadd /*
399322780332SAdrian Chadd * Reset the TID state. This must be only called once the node has
399422780332SAdrian Chadd * had its frames flushed from this TID, to ensure that no other
399522780332SAdrian Chadd * pause / unpause logic can kick in.
399622780332SAdrian Chadd */
399722780332SAdrian Chadd static void
ath_tx_tid_reset(struct ath_softc * sc,struct ath_tid * tid)399822780332SAdrian Chadd ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid)
399922780332SAdrian Chadd {
400022780332SAdrian Chadd
400122780332SAdrian Chadd #if 0
400222780332SAdrian Chadd tid->bar_wait = tid->bar_tx = tid->isfiltered = 0;
400322780332SAdrian Chadd tid->paused = tid->sched = tid->addba_tx_pending = 0;
400422780332SAdrian Chadd tid->incomp = tid->cleanup_inprogress = 0;
400522780332SAdrian Chadd #endif
400622780332SAdrian Chadd
400722780332SAdrian Chadd /*
400822780332SAdrian Chadd * If we have a bar_wait set, we need to unpause the TID
400922780332SAdrian Chadd * here. Otherwise once cleanup has finished, the TID won't
401022780332SAdrian Chadd * have the right paused counter.
401122780332SAdrian Chadd *
401222780332SAdrian Chadd * XXX I'm not going through resume here - I don't want the
401322780332SAdrian Chadd * node to be rescheuled just yet. This however should be
401422780332SAdrian Chadd * methodized!
401522780332SAdrian Chadd */
401622780332SAdrian Chadd if (tid->bar_wait) {
401722780332SAdrian Chadd if (tid->paused > 0) {
401822780332SAdrian Chadd tid->paused --;
401922780332SAdrian Chadd }
402022780332SAdrian Chadd }
402122780332SAdrian Chadd
402222780332SAdrian Chadd /*
402322780332SAdrian Chadd * XXX same with a currently filtered TID.
402422780332SAdrian Chadd *
402522780332SAdrian Chadd * Since this is being called during a flush, we assume that
402622780332SAdrian Chadd * the filtered frame list is actually empty.
402722780332SAdrian Chadd *
402822780332SAdrian Chadd * XXX TODO: add in a check to ensure that the filtered queue
402922780332SAdrian Chadd * depth is actually 0!
403022780332SAdrian Chadd */
403122780332SAdrian Chadd if (tid->isfiltered) {
403222780332SAdrian Chadd if (tid->paused > 0) {
403322780332SAdrian Chadd tid->paused --;
403422780332SAdrian Chadd }
403522780332SAdrian Chadd }
403622780332SAdrian Chadd
403722780332SAdrian Chadd /*
403822780332SAdrian Chadd * Clear BAR, filtered frames, scheduled and ADDBA pending.
403922780332SAdrian Chadd * The TID may be going through cleanup from the last association
404022780332SAdrian Chadd * where things in the BAW are still in the hardware queue.
404122780332SAdrian Chadd */
404222780332SAdrian Chadd tid->bar_wait = 0;
404322780332SAdrian Chadd tid->bar_tx = 0;
404422780332SAdrian Chadd tid->isfiltered = 0;
404522780332SAdrian Chadd tid->sched = 0;
404622780332SAdrian Chadd tid->addba_tx_pending = 0;
404722780332SAdrian Chadd
404822780332SAdrian Chadd /*
404922780332SAdrian Chadd * XXX TODO: it may just be enough to walk the HWQs and mark
405022780332SAdrian Chadd * frames for that node as non-aggregate; or mark the ath_node
405122780332SAdrian Chadd * with something that indicates that aggregation is no longer
4052f6b6084bSPedro F. Giffuni * occurring. Then we can just toss the BAW complaints and
405322780332SAdrian Chadd * do a complete hard reset of state here - no pause, no
405422780332SAdrian Chadd * complete counter, etc.
405522780332SAdrian Chadd */
405622a3aee6SAdrian Chadd
405722780332SAdrian Chadd }
405822780332SAdrian Chadd
405922780332SAdrian Chadd /*
4060eb6f0de0SAdrian Chadd * Flush all software queued packets for the given node.
4061eb6f0de0SAdrian Chadd *
4062eb6f0de0SAdrian Chadd * This occurs when a completion handler frees the last buffer
4063eb6f0de0SAdrian Chadd * for a node, and the node is thus freed. This causes the node
4064eb6f0de0SAdrian Chadd * to be cleaned up, which ends up calling ath_tx_node_flush.
4065eb6f0de0SAdrian Chadd */
4066eb6f0de0SAdrian Chadd void
ath_tx_node_flush(struct ath_softc * sc,struct ath_node * an)4067eb6f0de0SAdrian Chadd ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
4068eb6f0de0SAdrian Chadd {
4069eb6f0de0SAdrian Chadd int tid;
4070eb6f0de0SAdrian Chadd ath_bufhead bf_cq;
4071eb6f0de0SAdrian Chadd struct ath_buf *bf;
4072eb6f0de0SAdrian Chadd
4073eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq);
4074eb6f0de0SAdrian Chadd
407503682514SAdrian Chadd ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p",
407603682514SAdrian Chadd &an->an_node);
407703682514SAdrian Chadd
4078375307d4SAdrian Chadd ATH_TX_LOCK(sc);
40799b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE,
40809b48fb4bSAdrian Chadd "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, "
408122a3aee6SAdrian Chadd "swq_depth=%d, clrdmask=%d, leak_count=%d\n",
40829b48fb4bSAdrian Chadd __func__,
40839b48fb4bSAdrian Chadd an->an_node.ni_macaddr,
40849b48fb4bSAdrian Chadd ":",
40859b48fb4bSAdrian Chadd an->an_is_powersave,
40869b48fb4bSAdrian Chadd an->an_stack_psq,
40879b48fb4bSAdrian Chadd an->an_tim_set,
40889b48fb4bSAdrian Chadd an->an_swq_depth,
408922a3aee6SAdrian Chadd an->clrdmask,
409022a3aee6SAdrian Chadd an->an_leak_count);
40919b48fb4bSAdrian Chadd
4092eb6f0de0SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
4093eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
4094eb6f0de0SAdrian Chadd
4095eb6f0de0SAdrian Chadd /* Free packets */
4096eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, an, atid, &bf_cq);
409722a3aee6SAdrian Chadd
409823f44d2bSAdrian Chadd /* Remove this tid from the list of active tids */
409923f44d2bSAdrian Chadd ath_tx_tid_unsched(sc, atid);
410022a3aee6SAdrian Chadd
410122780332SAdrian Chadd /* Reset the per-TID pause, BAR, etc state */
410222780332SAdrian Chadd ath_tx_tid_reset(sc, atid);
4103eb6f0de0SAdrian Chadd }
410422a3aee6SAdrian Chadd
410522a3aee6SAdrian Chadd /*
410622a3aee6SAdrian Chadd * Clear global leak count
410722a3aee6SAdrian Chadd */
410822a3aee6SAdrian Chadd an->an_leak_count = 0;
4109375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
4110eb6f0de0SAdrian Chadd
4111eb6f0de0SAdrian Chadd /* Handle completed frames */
4112eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4113eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list);
4114eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0);
4115eb6f0de0SAdrian Chadd }
4116eb6f0de0SAdrian Chadd }
4117eb6f0de0SAdrian Chadd
4118eb6f0de0SAdrian Chadd /*
4119eb6f0de0SAdrian Chadd * Drain all the software TXQs currently with traffic queued.
4120eb6f0de0SAdrian Chadd */
4121eb6f0de0SAdrian Chadd void
ath_tx_txq_drain(struct ath_softc * sc,struct ath_txq * txq)4122eb6f0de0SAdrian Chadd ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
4123eb6f0de0SAdrian Chadd {
4124eb6f0de0SAdrian Chadd struct ath_tid *tid;
4125eb6f0de0SAdrian Chadd ath_bufhead bf_cq;
4126eb6f0de0SAdrian Chadd struct ath_buf *bf;
4127eb6f0de0SAdrian Chadd
4128eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq);
4129375307d4SAdrian Chadd ATH_TX_LOCK(sc);
4130eb6f0de0SAdrian Chadd
4131eb6f0de0SAdrian Chadd /*
4132eb6f0de0SAdrian Chadd * Iterate over all active tids for the given txq,
4133eb6f0de0SAdrian Chadd * flushing and unsched'ing them
4134eb6f0de0SAdrian Chadd */
4135eb6f0de0SAdrian Chadd while (! TAILQ_EMPTY(&txq->axq_tidq)) {
4136eb6f0de0SAdrian Chadd tid = TAILQ_FIRST(&txq->axq_tidq);
4137eb6f0de0SAdrian Chadd ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
4138eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid);
4139eb6f0de0SAdrian Chadd }
4140eb6f0de0SAdrian Chadd
4141375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
4142eb6f0de0SAdrian Chadd
4143eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4144eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list);
4145eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0);
4146eb6f0de0SAdrian Chadd }
4147eb6f0de0SAdrian Chadd }
4148eb6f0de0SAdrian Chadd
4149eb6f0de0SAdrian Chadd /*
4150eb6f0de0SAdrian Chadd * Handle completion of non-aggregate session frames.
41510c54de88SAdrian Chadd *
41520c54de88SAdrian Chadd * This (currently) doesn't implement software retransmission of
41530c54de88SAdrian Chadd * non-aggregate frames!
41540c54de88SAdrian Chadd *
41550c54de88SAdrian Chadd * Software retransmission of non-aggregate frames needs to obey
41560c54de88SAdrian Chadd * the strict sequence number ordering, and drop any frames that
41570c54de88SAdrian Chadd * will fail this.
41580c54de88SAdrian Chadd *
41590c54de88SAdrian Chadd * For now, filtered frames and frame transmission will cause
41600c54de88SAdrian Chadd * all kinds of issues. So we don't support them.
41610c54de88SAdrian Chadd *
41620c54de88SAdrian Chadd * So anyone queuing frames via ath_tx_normal_xmit() or
41630c54de88SAdrian Chadd * ath_tx_hw_queue_norm() must override and set CLRDMASK.
4164eb6f0de0SAdrian Chadd */
4165eb6f0de0SAdrian Chadd void
ath_tx_normal_comp(struct ath_softc * sc,struct ath_buf * bf,int fail)4166eb6f0de0SAdrian Chadd ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
4167eb6f0de0SAdrian Chadd {
4168eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node;
4169eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
4170eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid;
4171eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
4172eb6f0de0SAdrian Chadd struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
4173eb6f0de0SAdrian Chadd
4174eb6f0de0SAdrian Chadd /* The TID state is protected behind the TXQ lock */
4175375307d4SAdrian Chadd ATH_TX_LOCK(sc);
4176eb6f0de0SAdrian Chadd
4177eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
4178eb6f0de0SAdrian Chadd __func__, bf, fail, atid->hwq_depth - 1);
4179eb6f0de0SAdrian Chadd
4180eb6f0de0SAdrian Chadd atid->hwq_depth--;
4181f1bc738eSAdrian Chadd
41820c54de88SAdrian Chadd #if 0
41830c54de88SAdrian Chadd /*
41840c54de88SAdrian Chadd * If the frame was filtered, stick it on the filter frame
41850c54de88SAdrian Chadd * queue and complain about it. It shouldn't happen!
41860c54de88SAdrian Chadd */
41870c54de88SAdrian Chadd if ((ts->ts_status & HAL_TXERR_FILT) ||
41880c54de88SAdrian Chadd (ts->ts_status != 0 && atid->isfiltered)) {
418983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX,
41900c54de88SAdrian Chadd "%s: isfiltered=%d, ts_status=%d: huh?\n",
41910c54de88SAdrian Chadd __func__,
41920c54de88SAdrian Chadd atid->isfiltered,
41930c54de88SAdrian Chadd ts->ts_status);
41940c54de88SAdrian Chadd ath_tx_tid_filt_comp_buf(sc, atid, bf);
41950c54de88SAdrian Chadd }
41960c54de88SAdrian Chadd #endif
4197f1bc738eSAdrian Chadd if (atid->isfiltered)
419883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__);
4199eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0)
420083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
4201eb6f0de0SAdrian Chadd __func__, atid->hwq_depth);
4202f1bc738eSAdrian Chadd
4203f172ef75SAdrian Chadd /* If the TID is being cleaned up, track things */
4204f172ef75SAdrian Chadd /* XXX refactor! */
4205f172ef75SAdrian Chadd if (atid->cleanup_inprogress) {
4206f172ef75SAdrian Chadd atid->incomp--;
4207f172ef75SAdrian Chadd if (atid->incomp == 0) {
4208f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4209f172ef75SAdrian Chadd "%s: TID %d: cleaned up! resume!\n",
4210f172ef75SAdrian Chadd __func__, tid);
4211f172ef75SAdrian Chadd atid->cleanup_inprogress = 0;
4212f172ef75SAdrian Chadd ath_tx_tid_resume(sc, atid);
4213f172ef75SAdrian Chadd }
4214f172ef75SAdrian Chadd }
4215f172ef75SAdrian Chadd
4216f1bc738eSAdrian Chadd /*
4217f1bc738eSAdrian Chadd * If the queue is filtered, potentially mark it as complete
4218f1bc738eSAdrian Chadd * and reschedule it as needed.
4219f1bc738eSAdrian Chadd *
4220f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor
4221f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible
4222f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered
4223f1bc738eSAdrian Chadd * (complete or otherwise) frame.
4224f1bc738eSAdrian Chadd *
4225f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame?
4226f1bc738eSAdrian Chadd */
4227f1bc738eSAdrian Chadd if (atid->isfiltered)
4228f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid);
4229375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
4230eb6f0de0SAdrian Chadd
4231eb6f0de0SAdrian Chadd /*
4232eb6f0de0SAdrian Chadd * punt to rate control if we're not being cleaned up
4233eb6f0de0SAdrian Chadd * during a hw queue drain and the frame wanted an ACK.
4234eb6f0de0SAdrian Chadd */
4235875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4236eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4237cce63444SAdrian Chadd ts,
4238cce63444SAdrian Chadd bf->bf_state.bfs_pktlen,
4239cce63444SAdrian Chadd bf->bf_state.bfs_pktlen,
4240eb6f0de0SAdrian Chadd 1, (ts->ts_status == 0) ? 0 : 1);
4241eb6f0de0SAdrian Chadd
4242eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail);
4243eb6f0de0SAdrian Chadd }
4244eb6f0de0SAdrian Chadd
4245eb6f0de0SAdrian Chadd /*
4246eb6f0de0SAdrian Chadd * Handle cleanup of aggregate session packets that aren't
4247eb6f0de0SAdrian Chadd * an A-MPDU.
4248eb6f0de0SAdrian Chadd *
4249eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being
4250eb6f0de0SAdrian Chadd * torn down.
4251eb6f0de0SAdrian Chadd */
4252eb6f0de0SAdrian Chadd static void
ath_tx_comp_cleanup_unaggr(struct ath_softc * sc,struct ath_buf * bf)4253eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4254eb6f0de0SAdrian Chadd {
4255eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node;
4256eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
4257eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid;
4258eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
4259eb6f0de0SAdrian Chadd
4260eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
4261eb6f0de0SAdrian Chadd __func__, tid, atid->incomp);
4262eb6f0de0SAdrian Chadd
4263375307d4SAdrian Chadd ATH_TX_LOCK(sc);
4264eb6f0de0SAdrian Chadd atid->incomp--;
4265f172ef75SAdrian Chadd
4266f172ef75SAdrian Chadd /* XXX refactor! */
4267f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) {
4268f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf);
4269f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw)
4270f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
4271f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n",
4272f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
4273f172ef75SAdrian Chadd }
4274f172ef75SAdrian Chadd
4275eb6f0de0SAdrian Chadd if (atid->incomp == 0) {
4276eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4277eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n",
4278eb6f0de0SAdrian Chadd __func__, tid);
4279eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0;
4280eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid);
4281eb6f0de0SAdrian Chadd }
4282375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
4283eb6f0de0SAdrian Chadd
4284eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0);
4285eb6f0de0SAdrian Chadd }
4286eb6f0de0SAdrian Chadd
4287f172ef75SAdrian Chadd /*
4288f172ef75SAdrian Chadd * This as it currently stands is a bit dumb. Ideally we'd just
4289f172ef75SAdrian Chadd * fail the frame the normal way and have it permanently fail
4290f172ef75SAdrian Chadd * via the normal aggregate completion path.
4291f172ef75SAdrian Chadd */
4292f172ef75SAdrian Chadd static void
ath_tx_tid_cleanup_frame(struct ath_softc * sc,struct ath_node * an,int tid,struct ath_buf * bf_head,ath_bufhead * bf_cq)4293f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an,
4294f172ef75SAdrian Chadd int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq)
4295f172ef75SAdrian Chadd {
4296f172ef75SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
4297f172ef75SAdrian Chadd struct ath_buf *bf, *bf_next;
4298f172ef75SAdrian Chadd
4299f172ef75SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
4300f172ef75SAdrian Chadd
4301f172ef75SAdrian Chadd /*
4302f172ef75SAdrian Chadd * Remove this frame from the queue.
4303f172ef75SAdrian Chadd */
4304f172ef75SAdrian Chadd ATH_TID_REMOVE(atid, bf_head, bf_list);
4305f172ef75SAdrian Chadd
4306f172ef75SAdrian Chadd /*
4307f172ef75SAdrian Chadd * Loop over all the frames in the aggregate.
4308f172ef75SAdrian Chadd */
4309f172ef75SAdrian Chadd bf = bf_head;
4310f172ef75SAdrian Chadd while (bf != NULL) {
4311f172ef75SAdrian Chadd bf_next = bf->bf_next; /* next aggregate frame, or NULL */
4312f172ef75SAdrian Chadd
4313f172ef75SAdrian Chadd /*
4314f172ef75SAdrian Chadd * If it's been added to the BAW we need to kick
4315f172ef75SAdrian Chadd * it out of the BAW before we continue.
4316f172ef75SAdrian Chadd *
4317f172ef75SAdrian Chadd * XXX if it's an aggregate, assert that it's in the
4318f172ef75SAdrian Chadd * BAW - we shouldn't have it be in an aggregate
4319f172ef75SAdrian Chadd * otherwise!
4320f172ef75SAdrian Chadd */
4321f172ef75SAdrian Chadd if (bf->bf_state.bfs_addedbaw) {
4322f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf);
4323f172ef75SAdrian Chadd bf->bf_state.bfs_dobaw = 0;
4324f172ef75SAdrian Chadd }
4325f172ef75SAdrian Chadd
4326f172ef75SAdrian Chadd /*
4327f172ef75SAdrian Chadd * Give it the default completion handler.
4328f172ef75SAdrian Chadd */
4329f172ef75SAdrian Chadd bf->bf_comp = ath_tx_normal_comp;
4330f172ef75SAdrian Chadd bf->bf_next = NULL;
4331f172ef75SAdrian Chadd
4332f172ef75SAdrian Chadd /*
4333f172ef75SAdrian Chadd * Add it to the list to free.
4334f172ef75SAdrian Chadd */
4335f172ef75SAdrian Chadd TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
4336f172ef75SAdrian Chadd
4337f172ef75SAdrian Chadd /*
4338f172ef75SAdrian Chadd * Now advance to the next frame in the aggregate.
4339f172ef75SAdrian Chadd */
4340f172ef75SAdrian Chadd bf = bf_next;
4341f172ef75SAdrian Chadd }
4342f172ef75SAdrian Chadd }
4343f172ef75SAdrian Chadd
4344eb6f0de0SAdrian Chadd /*
4345eb6f0de0SAdrian Chadd * Performs transmit side cleanup when TID changes from aggregated to
4346f172ef75SAdrian Chadd * unaggregated and during reassociation.
4347eb6f0de0SAdrian Chadd *
4348f172ef75SAdrian Chadd * For now, this just tosses everything from the TID software queue
4349f172ef75SAdrian Chadd * whether or not it has been retried and marks the TID as
4350f172ef75SAdrian Chadd * pending completion if there's anything for this TID queued to
4351f172ef75SAdrian Chadd * the hardware.
4352eb6f0de0SAdrian Chadd *
43535da3fc10SAdrian Chadd * The caller is responsible for pausing the TID and unpausing the
43545da3fc10SAdrian Chadd * TID if no cleanup was required. Otherwise the cleanup path will
43555da3fc10SAdrian Chadd * unpause the TID once the last hardware queued frame is completed.
4356eb6f0de0SAdrian Chadd */
4357eb6f0de0SAdrian Chadd static void
ath_tx_tid_cleanup(struct ath_softc * sc,struct ath_node * an,int tid,ath_bufhead * bf_cq)435822780332SAdrian Chadd ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid,
435922780332SAdrian Chadd ath_bufhead *bf_cq)
4360eb6f0de0SAdrian Chadd {
4361eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
4362eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next;
436322780332SAdrian Chadd
436422780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
4365eb6f0de0SAdrian Chadd
4366d3a6425bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4367f172ef75SAdrian Chadd "%s: TID %d: called; inprogress=%d\n", __func__, tid,
4368f172ef75SAdrian Chadd atid->cleanup_inprogress);
4369eb6f0de0SAdrian Chadd
4370eb6f0de0SAdrian Chadd /*
4371f1bc738eSAdrian Chadd * Move the filtered frames to the TX queue, before
4372f1bc738eSAdrian Chadd * we run off and discard/process things.
4373f1bc738eSAdrian Chadd */
4374f172ef75SAdrian Chadd
4375f1bc738eSAdrian Chadd /* XXX this is really quite inefficient */
437613aa9ee5SAdrian Chadd while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) {
437713aa9ee5SAdrian Chadd ATH_TID_FILT_REMOVE(atid, bf, bf_list);
43783e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4379f1bc738eSAdrian Chadd }
4380f1bc738eSAdrian Chadd
4381f1bc738eSAdrian Chadd /*
4382eb6f0de0SAdrian Chadd * Update the frames in the software TX queue:
4383eb6f0de0SAdrian Chadd *
4384eb6f0de0SAdrian Chadd * + Discard retry frames in the queue
4385eb6f0de0SAdrian Chadd * + Fix the completion function to be non-aggregate
4386eb6f0de0SAdrian Chadd */
43873e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(atid);
4388eb6f0de0SAdrian Chadd while (bf) {
4389eb6f0de0SAdrian Chadd /*
4390f172ef75SAdrian Chadd * Grab the next frame in the list, we may
4391f172ef75SAdrian Chadd * be fiddling with the list.
4392eb6f0de0SAdrian Chadd */
4393f172ef75SAdrian Chadd bf_next = TAILQ_NEXT(bf, bf_list);
4394f172ef75SAdrian Chadd
4395f172ef75SAdrian Chadd /*
4396f172ef75SAdrian Chadd * Free the frame and all subframes.
4397f172ef75SAdrian Chadd */
4398f172ef75SAdrian Chadd ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq);
4399f172ef75SAdrian Chadd
4400f172ef75SAdrian Chadd /*
4401f172ef75SAdrian Chadd * Next frame!
4402f172ef75SAdrian Chadd */
4403eb6f0de0SAdrian Chadd bf = bf_next;
4404eb6f0de0SAdrian Chadd }
4405eb6f0de0SAdrian Chadd
4406eb6f0de0SAdrian Chadd /*
4407f172ef75SAdrian Chadd * If there's anything in the hardware queue we wait
4408f172ef75SAdrian Chadd * for the TID HWQ to empty.
4409eb6f0de0SAdrian Chadd */
4410f172ef75SAdrian Chadd if (atid->hwq_depth > 0) {
4411f172ef75SAdrian Chadd /*
4412f172ef75SAdrian Chadd * XXX how about we kill atid->incomp, and instead
4413f172ef75SAdrian Chadd * replace it with a macro that checks that atid->hwq_depth
4414f172ef75SAdrian Chadd * is 0?
4415f172ef75SAdrian Chadd */
4416f172ef75SAdrian Chadd atid->incomp = atid->hwq_depth;
4417eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 1;
4418eb6f0de0SAdrian Chadd }
4419eb6f0de0SAdrian Chadd
4420eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress)
4421eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4422eb6f0de0SAdrian Chadd "%s: TID %d: cleanup needed: %d packets\n",
4423eb6f0de0SAdrian Chadd __func__, tid, atid->incomp);
4424eb6f0de0SAdrian Chadd
442522780332SAdrian Chadd /* Owner now must free completed frames */
4426eb6f0de0SAdrian Chadd }
4427eb6f0de0SAdrian Chadd
4428eb6f0de0SAdrian Chadd static struct ath_buf *
ath_tx_retry_clone(struct ath_softc * sc,struct ath_node * an,struct ath_tid * tid,struct ath_buf * bf)442938962489SAdrian Chadd ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
443038962489SAdrian Chadd struct ath_tid *tid, struct ath_buf *bf)
4431eb6f0de0SAdrian Chadd {
4432eb6f0de0SAdrian Chadd struct ath_buf *nbf;
4433eb6f0de0SAdrian Chadd int error;
4434eb6f0de0SAdrian Chadd
44353f3a5dbdSAdrian Chadd /*
44363f3a5dbdSAdrian Chadd * Clone the buffer. This will handle the dma unmap and
44373f3a5dbdSAdrian Chadd * copy the node reference to the new buffer. If this
44383f3a5dbdSAdrian Chadd * works out, 'bf' will have no DMA mapping, no mbuf
44393f3a5dbdSAdrian Chadd * pointer and no node reference.
44403f3a5dbdSAdrian Chadd */
4441eb6f0de0SAdrian Chadd nbf = ath_buf_clone(sc, bf);
4442eb6f0de0SAdrian Chadd
4443eb6f0de0SAdrian Chadd #if 0
444483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n",
4445eb6f0de0SAdrian Chadd __func__);
4446eb6f0de0SAdrian Chadd #endif
4447eb6f0de0SAdrian Chadd
4448eb6f0de0SAdrian Chadd if (nbf == NULL) {
4449eb6f0de0SAdrian Chadd /* Failed to clone */
445083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
4451eb6f0de0SAdrian Chadd "%s: failed to clone a busy buffer\n",
4452eb6f0de0SAdrian Chadd __func__);
4453eb6f0de0SAdrian Chadd return NULL;
4454eb6f0de0SAdrian Chadd }
4455eb6f0de0SAdrian Chadd
4456eb6f0de0SAdrian Chadd /* Setup the dma for the new buffer */
4457eb6f0de0SAdrian Chadd error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
4458eb6f0de0SAdrian Chadd if (error != 0) {
445983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
4460eb6f0de0SAdrian Chadd "%s: failed to setup dma for clone\n",
4461eb6f0de0SAdrian Chadd __func__);
4462eb6f0de0SAdrian Chadd /*
4463eb6f0de0SAdrian Chadd * Put this at the head of the list, not tail;
4464eb6f0de0SAdrian Chadd * that way it doesn't interfere with the
4465eb6f0de0SAdrian Chadd * busy buffer logic (which uses the tail of
4466eb6f0de0SAdrian Chadd * the list.)
4467eb6f0de0SAdrian Chadd */
4468eb6f0de0SAdrian Chadd ATH_TXBUF_LOCK(sc);
446932c387f7SAdrian Chadd ath_returnbuf_head(sc, nbf);
4470eb6f0de0SAdrian Chadd ATH_TXBUF_UNLOCK(sc);
4471eb6f0de0SAdrian Chadd return NULL;
4472eb6f0de0SAdrian Chadd }
4473eb6f0de0SAdrian Chadd
447438962489SAdrian Chadd /* Update BAW if required, before we free the original buf */
447538962489SAdrian Chadd if (bf->bf_state.bfs_dobaw)
447638962489SAdrian Chadd ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
447738962489SAdrian Chadd
44783f3a5dbdSAdrian Chadd /* Free original buffer; return new buffer */
4479eb6f0de0SAdrian Chadd ath_freebuf(sc, bf);
4480f1bc738eSAdrian Chadd
4481eb6f0de0SAdrian Chadd return nbf;
4482eb6f0de0SAdrian Chadd }
4483eb6f0de0SAdrian Chadd
4484eb6f0de0SAdrian Chadd /*
4485eb6f0de0SAdrian Chadd * Handle retrying an unaggregate frame in an aggregate
4486eb6f0de0SAdrian Chadd * session.
4487eb6f0de0SAdrian Chadd *
4488eb6f0de0SAdrian Chadd * If too many retries occur, pause the TID, wait for
4489eb6f0de0SAdrian Chadd * any further retransmits (as there's no reason why
4490eb6f0de0SAdrian Chadd * non-aggregate frames in an aggregate session are
4491eb6f0de0SAdrian Chadd * transmitted in-order; they just have to be in-BAW)
4492eb6f0de0SAdrian Chadd * and then queue a BAR.
4493eb6f0de0SAdrian Chadd */
4494eb6f0de0SAdrian Chadd static void
ath_tx_aggr_retry_unaggr(struct ath_softc * sc,struct ath_buf * bf)4495eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4496eb6f0de0SAdrian Chadd {
4497eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node;
4498eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
4499eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid;
4500eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
4501eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
4502eb6f0de0SAdrian Chadd
4503375307d4SAdrian Chadd ATH_TX_LOCK(sc);
4504eb6f0de0SAdrian Chadd
4505eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid);
4506eb6f0de0SAdrian Chadd
4507eb6f0de0SAdrian Chadd /*
4508eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly
4509eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer.
4510eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer.
4511eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max
4512eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer
4513eb6f0de0SAdrian Chadd * for us.
4514eb6f0de0SAdrian Chadd */
4515eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4516eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) {
4517eb6f0de0SAdrian Chadd struct ath_buf *nbf;
451838962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf);
4519eb6f0de0SAdrian Chadd if (nbf)
4520eb6f0de0SAdrian Chadd /* bf has been freed at this point */
4521eb6f0de0SAdrian Chadd bf = nbf;
4522eb6f0de0SAdrian Chadd else
4523eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4524eb6f0de0SAdrian Chadd }
4525eb6f0de0SAdrian Chadd
4526eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4527eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4528eb6f0de0SAdrian Chadd "%s: exceeded retries; seqno %d\n",
4529eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
4530eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++;
4531eb6f0de0SAdrian Chadd
4532eb6f0de0SAdrian Chadd /* Update BAW anyway */
4533eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) {
4534eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf);
4535eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_addedbaw)
453683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4537eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n",
4538eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
4539eb6f0de0SAdrian Chadd }
4540eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0;
4541eb6f0de0SAdrian Chadd
454288b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */
454388b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid);
454488b3d483SAdrian Chadd
454588b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */
454688b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid))
454788b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid);
454888b3d483SAdrian Chadd
4549375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
4550eb6f0de0SAdrian Chadd
4551eb6f0de0SAdrian Chadd /* Free buffer, bf is free after this call */
4552eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0);
4553eb6f0de0SAdrian Chadd return;
4554eb6f0de0SAdrian Chadd }
4555eb6f0de0SAdrian Chadd
4556eb6f0de0SAdrian Chadd /*
4557eb6f0de0SAdrian Chadd * This increments the retry counter as well as
4558eb6f0de0SAdrian Chadd * sets the retry flag in the ath_buf and packet
4559eb6f0de0SAdrian Chadd * body.
4560eb6f0de0SAdrian Chadd */
4561eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf);
4562f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++;
4563eb6f0de0SAdrian Chadd
4564eb6f0de0SAdrian Chadd /*
4565eb6f0de0SAdrian Chadd * Insert this at the head of the queue, so it's
4566eb6f0de0SAdrian Chadd * retried before any current/subsequent frames.
4567eb6f0de0SAdrian Chadd */
45683e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4569eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, atid);
457088b3d483SAdrian Chadd /* Send the BAR if there are no other frames waiting */
457188b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid))
457288b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid);
4573eb6f0de0SAdrian Chadd
4574375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
4575eb6f0de0SAdrian Chadd }
4576eb6f0de0SAdrian Chadd
4577eb6f0de0SAdrian Chadd /*
4578eb6f0de0SAdrian Chadd * Common code for aggregate excessive retry/subframe retry.
4579eb6f0de0SAdrian Chadd * If retrying, queues buffers to bf_q. If not, frees the
4580eb6f0de0SAdrian Chadd * buffers.
4581eb6f0de0SAdrian Chadd *
4582eb6f0de0SAdrian Chadd * XXX should unify this with ath_tx_aggr_retry_unaggr()
4583eb6f0de0SAdrian Chadd */
4584eb6f0de0SAdrian Chadd static int
ath_tx_retry_subframe(struct ath_softc * sc,struct ath_buf * bf,ath_bufhead * bf_q)4585eb6f0de0SAdrian Chadd ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
4586eb6f0de0SAdrian Chadd ath_bufhead *bf_q)
4587eb6f0de0SAdrian Chadd {
4588eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node;
4589eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
4590eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid;
4591eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
4592eb6f0de0SAdrian Chadd
4593375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
4594eb6f0de0SAdrian Chadd
459521840808SAdrian Chadd /* XXX clr11naggr should be done for all subframes */
4596eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4597eb6f0de0SAdrian Chadd ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
4598f1bc738eSAdrian Chadd
4599eb6f0de0SAdrian Chadd /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
4600eb6f0de0SAdrian Chadd
4601eb6f0de0SAdrian Chadd /*
4602eb6f0de0SAdrian Chadd * If the buffer is marked as busy, we can't directly
4603eb6f0de0SAdrian Chadd * reuse it. Instead, try to clone the buffer.
4604eb6f0de0SAdrian Chadd * If the clone is successful, recycle the old buffer.
4605eb6f0de0SAdrian Chadd * If the clone is unsuccessful, set bfs_retries to max
4606eb6f0de0SAdrian Chadd * to force the next bit of code to free the buffer
4607eb6f0de0SAdrian Chadd * for us.
4608eb6f0de0SAdrian Chadd */
4609eb6f0de0SAdrian Chadd if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4610eb6f0de0SAdrian Chadd (bf->bf_flags & ATH_BUF_BUSY)) {
4611eb6f0de0SAdrian Chadd struct ath_buf *nbf;
461238962489SAdrian Chadd nbf = ath_tx_retry_clone(sc, an, atid, bf);
4613eb6f0de0SAdrian Chadd if (nbf)
4614eb6f0de0SAdrian Chadd /* bf has been freed at this point */
4615eb6f0de0SAdrian Chadd bf = nbf;
4616eb6f0de0SAdrian Chadd else
4617eb6f0de0SAdrian Chadd bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4618eb6f0de0SAdrian Chadd }
4619eb6f0de0SAdrian Chadd
4620eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4621eb6f0de0SAdrian Chadd sc->sc_stats.ast_tx_swretrymax++;
4622eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4623eb6f0de0SAdrian Chadd "%s: max retries: seqno %d\n",
4624eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
4625eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf);
4626eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw)
462783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4628eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n",
4629eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
4630eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0;
4631eb6f0de0SAdrian Chadd return 1;
4632eb6f0de0SAdrian Chadd }
4633eb6f0de0SAdrian Chadd
4634eb6f0de0SAdrian Chadd ath_tx_set_retry(sc, bf);
4635f1bc738eSAdrian Chadd sc->sc_stats.ast_tx_swretries++;
4636eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Just to make sure */
4637eb6f0de0SAdrian Chadd
463821840808SAdrian Chadd /* Clear the aggregate state */
463921840808SAdrian Chadd bf->bf_state.bfs_aggr = 0;
464021840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0; /* ??? needed? */
464121840808SAdrian Chadd bf->bf_state.bfs_nframes = 1;
464221840808SAdrian Chadd
4643eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
4644eb6f0de0SAdrian Chadd return 0;
4645eb6f0de0SAdrian Chadd }
4646eb6f0de0SAdrian Chadd
4647eb6f0de0SAdrian Chadd /*
4648eb6f0de0SAdrian Chadd * error pkt completion for an aggregate destination
4649eb6f0de0SAdrian Chadd */
4650eb6f0de0SAdrian Chadd static void
ath_tx_comp_aggr_error(struct ath_softc * sc,struct ath_buf * bf_first,struct ath_tid * tid)4651eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
4652eb6f0de0SAdrian Chadd struct ath_tid *tid)
4653eb6f0de0SAdrian Chadd {
4654eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node;
4655eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
4656eb6f0de0SAdrian Chadd struct ath_buf *bf_next, *bf;
4657eb6f0de0SAdrian Chadd ath_bufhead bf_q;
4658eb6f0de0SAdrian Chadd int drops = 0;
4659eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
4660eb6f0de0SAdrian Chadd ath_bufhead bf_cq;
4661eb6f0de0SAdrian Chadd
4662eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q);
4663eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_cq);
4664eb6f0de0SAdrian Chadd
4665eb6f0de0SAdrian Chadd /*
4666eb6f0de0SAdrian Chadd * Update rate control - all frames have failed.
4667eb6f0de0SAdrian Chadd */
4668eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
4669eb6f0de0SAdrian Chadd &bf_first->bf_status.ds_txstat,
4670cce63444SAdrian Chadd bf_first->bf_state.bfs_al,
4671cce63444SAdrian Chadd bf_first->bf_state.bfs_rc_maxpktlen,
4672eb6f0de0SAdrian Chadd bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
4673eb6f0de0SAdrian Chadd
4674375307d4SAdrian Chadd ATH_TX_LOCK(sc);
4675eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid);
46762d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_failall++;
4677eb6f0de0SAdrian Chadd
4678eb6f0de0SAdrian Chadd /* Retry all subframes */
4679eb6f0de0SAdrian Chadd bf = bf_first;
4680eb6f0de0SAdrian Chadd while (bf) {
4681eb6f0de0SAdrian Chadd bf_next = bf->bf_next;
4682eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */
46832d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++;
4684eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4685eb6f0de0SAdrian Chadd drops++;
4686eb6f0de0SAdrian Chadd bf->bf_next = NULL;
4687eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4688eb6f0de0SAdrian Chadd }
4689eb6f0de0SAdrian Chadd bf = bf_next;
4690eb6f0de0SAdrian Chadd }
4691eb6f0de0SAdrian Chadd
4692eb6f0de0SAdrian Chadd /* Prepend all frames to the beginning of the queue */
4693eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4694eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list);
46953e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(tid, bf, bf_list);
4696eb6f0de0SAdrian Chadd }
4697eb6f0de0SAdrian Chadd
469839da9d42SAdrian Chadd /*
469939da9d42SAdrian Chadd * Schedule the TID to be re-tried.
470039da9d42SAdrian Chadd */
4701eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid);
4702eb6f0de0SAdrian Chadd
4703eb6f0de0SAdrian Chadd /*
4704eb6f0de0SAdrian Chadd * send bar if we dropped any frames
4705eb6f0de0SAdrian Chadd *
4706eb6f0de0SAdrian Chadd * Keep the txq lock held for now, as we need to ensure
4707eb6f0de0SAdrian Chadd * that ni_txseqs[] is consistent (as it's being updated
4708eb6f0de0SAdrian Chadd * in the ifnet TX context or raw TX context.)
4709eb6f0de0SAdrian Chadd */
4710eb6f0de0SAdrian Chadd if (drops) {
471188b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */
471288b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, tid);
4713eb6f0de0SAdrian Chadd }
4714eb6f0de0SAdrian Chadd
471588b3d483SAdrian Chadd /*
471688b3d483SAdrian Chadd * Send BAR if required
471788b3d483SAdrian Chadd */
471888b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, tid))
471988b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, tid);
4720f1bc738eSAdrian Chadd
4721375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
472288b3d483SAdrian Chadd
4723eb6f0de0SAdrian Chadd /* Complete frames which errored out */
4724eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4725eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list);
4726eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0);
4727eb6f0de0SAdrian Chadd }
4728eb6f0de0SAdrian Chadd }
4729eb6f0de0SAdrian Chadd
4730eb6f0de0SAdrian Chadd /*
4731eb6f0de0SAdrian Chadd * Handle clean-up of packets from an aggregate list.
4732eb6f0de0SAdrian Chadd *
4733eb6f0de0SAdrian Chadd * There's no need to update the BAW here - the session is being
4734eb6f0de0SAdrian Chadd * torn down.
4735eb6f0de0SAdrian Chadd */
4736eb6f0de0SAdrian Chadd static void
ath_tx_comp_cleanup_aggr(struct ath_softc * sc,struct ath_buf * bf_first)4737eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
4738eb6f0de0SAdrian Chadd {
4739eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next;
4740eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node;
4741eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
4742eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid;
4743eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
4744eb6f0de0SAdrian Chadd
4745375307d4SAdrian Chadd ATH_TX_LOCK(sc);
4746eb6f0de0SAdrian Chadd
4747eb6f0de0SAdrian Chadd /* update incomp */
4748f172ef75SAdrian Chadd atid->incomp--;
4749f172ef75SAdrian Chadd
4750f172ef75SAdrian Chadd /* Update the BAW */
4751302868d9SAdrian Chadd bf = bf_first;
4752eb6f0de0SAdrian Chadd while (bf) {
4753f172ef75SAdrian Chadd /* XXX refactor! */
4754f172ef75SAdrian Chadd if (bf->bf_state.bfs_dobaw) {
4755f172ef75SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf);
4756f172ef75SAdrian Chadd if (!bf->bf_state.bfs_addedbaw)
4757f172ef75SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
4758f172ef75SAdrian Chadd "%s: wasn't added: seqno %d\n",
4759f172ef75SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
4760f172ef75SAdrian Chadd }
4761eb6f0de0SAdrian Chadd bf = bf->bf_next;
4762eb6f0de0SAdrian Chadd }
4763eb6f0de0SAdrian Chadd
4764eb6f0de0SAdrian Chadd if (atid->incomp == 0) {
4765eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4766eb6f0de0SAdrian Chadd "%s: TID %d: cleaned up! resume!\n",
4767eb6f0de0SAdrian Chadd __func__, tid);
4768eb6f0de0SAdrian Chadd atid->cleanup_inprogress = 0;
4769eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid);
4770eb6f0de0SAdrian Chadd }
477188b3d483SAdrian Chadd
477288b3d483SAdrian Chadd /* Send BAR if required */
4773f1bc738eSAdrian Chadd /* XXX why would we send a BAR when transitioning to non-aggregation? */
4774302868d9SAdrian Chadd /*
4775302868d9SAdrian Chadd * XXX TODO: we should likely just tear down the BAR state here,
4776302868d9SAdrian Chadd * rather than sending a BAR.
4777302868d9SAdrian Chadd */
477888b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid))
477988b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid);
4780f1bc738eSAdrian Chadd
4781375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
4782eb6f0de0SAdrian Chadd
4783706bb444SAdrian Chadd /* Handle frame completion as individual frames */
4784302868d9SAdrian Chadd bf = bf_first;
4785eb6f0de0SAdrian Chadd while (bf) {
4786eb6f0de0SAdrian Chadd bf_next = bf->bf_next;
4787706bb444SAdrian Chadd bf->bf_next = NULL;
4788eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 1);
4789eb6f0de0SAdrian Chadd bf = bf_next;
4790eb6f0de0SAdrian Chadd }
4791eb6f0de0SAdrian Chadd }
4792eb6f0de0SAdrian Chadd
4793eb6f0de0SAdrian Chadd /*
4794eb6f0de0SAdrian Chadd * Handle completion of an set of aggregate frames.
4795eb6f0de0SAdrian Chadd *
4796eb6f0de0SAdrian Chadd * Note: the completion handler is the last descriptor in the aggregate,
4797eb6f0de0SAdrian Chadd * not the last descriptor in the first frame.
4798eb6f0de0SAdrian Chadd */
4799eb6f0de0SAdrian Chadd static void
ath_tx_aggr_comp_aggr(struct ath_softc * sc,struct ath_buf * bf_first,int fail)4800d4365d16SAdrian Chadd ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
4801d4365d16SAdrian Chadd int fail)
4802eb6f0de0SAdrian Chadd {
4803eb6f0de0SAdrian Chadd //struct ath_desc *ds = bf->bf_lastds;
4804eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf_first->bf_node;
4805eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
4806eb6f0de0SAdrian Chadd int tid = bf_first->bf_state.bfs_tid;
4807eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
4808eb6f0de0SAdrian Chadd struct ath_tx_status ts;
4809eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
4810eb6f0de0SAdrian Chadd ath_bufhead bf_q;
4811eb6f0de0SAdrian Chadd ath_bufhead bf_cq;
4812eb6f0de0SAdrian Chadd int seq_st, tx_ok;
4813eb6f0de0SAdrian Chadd int hasba, isaggr;
4814eb6f0de0SAdrian Chadd uint32_t ba[2];
4815eb6f0de0SAdrian Chadd struct ath_buf *bf, *bf_next;
4816eb6f0de0SAdrian Chadd int ba_index;
4817eb6f0de0SAdrian Chadd int drops = 0;
4818eb6f0de0SAdrian Chadd int nframes = 0, nbad = 0, nf;
4819eb6f0de0SAdrian Chadd int pktlen;
4820cce63444SAdrian Chadd int agglen, rc_agglen;
4821eb6f0de0SAdrian Chadd /* XXX there's too much on the stack? */
4822b815538dSAdrian Chadd struct ath_rc_series rc[ATH_RC_NUM];
4823eb6f0de0SAdrian Chadd int txseq;
4824eb6f0de0SAdrian Chadd
4825eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
4826eb6f0de0SAdrian Chadd __func__, atid->hwq_depth);
4827eb6f0de0SAdrian Chadd
48280aa5c1bbSAdrian Chadd /*
48290aa5c1bbSAdrian Chadd * Take a copy; this may be needed -after- bf_first
48300aa5c1bbSAdrian Chadd * has been completed and freed.
48310aa5c1bbSAdrian Chadd */
48320aa5c1bbSAdrian Chadd ts = bf_first->bf_status.ds_txstat;
4833cce63444SAdrian Chadd agglen = bf_first->bf_state.bfs_al;
4834cce63444SAdrian Chadd rc_agglen = bf_first->bf_state.bfs_rc_maxpktlen;
48350aa5c1bbSAdrian Chadd
4836f1bc738eSAdrian Chadd TAILQ_INIT(&bf_q);
4837f1bc738eSAdrian Chadd TAILQ_INIT(&bf_cq);
4838f1bc738eSAdrian Chadd
4839eb6f0de0SAdrian Chadd /* The TID state is kept behind the TXQ lock */
4840375307d4SAdrian Chadd ATH_TX_LOCK(sc);
4841eb6f0de0SAdrian Chadd
4842eb6f0de0SAdrian Chadd atid->hwq_depth--;
4843eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0)
484483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n",
4845eb6f0de0SAdrian Chadd __func__, atid->hwq_depth);
4846eb6f0de0SAdrian Chadd
4847eb6f0de0SAdrian Chadd /*
4848f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter
4849f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup
4850f1bc738eSAdrian Chadd * function.
48510aa5c1bbSAdrian Chadd *
48520aa5c1bbSAdrian Chadd * XXX this is duplicate work, ew.
4853f1bc738eSAdrian Chadd */
4854f1bc738eSAdrian Chadd if (atid->isfiltered)
4855f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid);
4856f1bc738eSAdrian Chadd
4857f1bc738eSAdrian Chadd /*
4858eb6f0de0SAdrian Chadd * Punt cleanup to the relevant function, not our problem now
4859eb6f0de0SAdrian Chadd */
4860eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) {
4861f1bc738eSAdrian Chadd if (atid->isfiltered)
486283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4863f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n",
4864f1bc738eSAdrian Chadd __func__);
4865375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
4866eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_aggr(sc, bf_first);
4867eb6f0de0SAdrian Chadd return;
4868eb6f0de0SAdrian Chadd }
4869eb6f0de0SAdrian Chadd
4870eb6f0de0SAdrian Chadd /*
4871f1bc738eSAdrian Chadd * If the frame is filtered, transition to filtered frame
4872f1bc738eSAdrian Chadd * mode and add this to the filtered frame list.
4873f1bc738eSAdrian Chadd *
4874f1bc738eSAdrian Chadd * XXX TODO: figure out how this interoperates with
4875f1bc738eSAdrian Chadd * BAR, pause and cleanup states.
4876f1bc738eSAdrian Chadd */
4877f1bc738eSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) ||
4878f1bc738eSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) {
4879f1bc738eSAdrian Chadd if (fail != 0)
488083bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4881f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n", __func__, fail);
4882f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq);
4883f1bc738eSAdrian Chadd
4884f1bc738eSAdrian Chadd /* Remove from BAW */
4885f1bc738eSAdrian Chadd TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) {
4886f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw)
4887f1bc738eSAdrian Chadd drops++;
4888f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) {
4889f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf);
4890f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw)
489183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4892f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n",
4893f1bc738eSAdrian Chadd __func__,
4894f1bc738eSAdrian Chadd SEQNO(bf->bf_state.bfs_seqno));
4895f1bc738eSAdrian Chadd }
4896f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0;
4897f1bc738eSAdrian Chadd }
4898f1bc738eSAdrian Chadd /*
4899f1bc738eSAdrian Chadd * If any intermediate frames in the BAW were dropped when
4900f1bc738eSAdrian Chadd * handling filtering things, send a BAR.
4901f1bc738eSAdrian Chadd */
4902f1bc738eSAdrian Chadd if (drops)
4903f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid);
4904f1bc738eSAdrian Chadd
4905f1bc738eSAdrian Chadd /*
4906f1bc738eSAdrian Chadd * Finish up by sending a BAR if required and freeing
4907f1bc738eSAdrian Chadd * the frames outside of the TX lock.
4908f1bc738eSAdrian Chadd */
4909f1bc738eSAdrian Chadd goto finish_send_bar;
4910f1bc738eSAdrian Chadd }
4911f1bc738eSAdrian Chadd
4912f1bc738eSAdrian Chadd /*
4913eb6f0de0SAdrian Chadd * XXX for now, use the first frame in the aggregate for
4914eb6f0de0SAdrian Chadd * XXX rate control completion; it's at least consistent.
4915eb6f0de0SAdrian Chadd */
4916eb6f0de0SAdrian Chadd pktlen = bf_first->bf_state.bfs_pktlen;
4917eb6f0de0SAdrian Chadd
4918eb6f0de0SAdrian Chadd /*
4919e9a6408eSAdrian Chadd * Handle errors first!
4920e9a6408eSAdrian Chadd *
4921e9a6408eSAdrian Chadd * Here, handle _any_ error as a "exceeded retries" error.
4922e9a6408eSAdrian Chadd * Later on (when filtered frames are to be specially handled)
4923e9a6408eSAdrian Chadd * it'll have to be expanded.
4924eb6f0de0SAdrian Chadd */
4925e9a6408eSAdrian Chadd #if 0
4926eb6f0de0SAdrian Chadd if (ts.ts_status & HAL_TXERR_XRETRY) {
4927e9a6408eSAdrian Chadd #endif
4928e9a6408eSAdrian Chadd if (ts.ts_status != 0) {
4929375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
4930eb6f0de0SAdrian Chadd ath_tx_comp_aggr_error(sc, bf_first, atid);
4931eb6f0de0SAdrian Chadd return;
4932eb6f0de0SAdrian Chadd }
4933eb6f0de0SAdrian Chadd
4934eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid);
4935eb6f0de0SAdrian Chadd
4936eb6f0de0SAdrian Chadd /*
4937eb6f0de0SAdrian Chadd * extract starting sequence and block-ack bitmap
4938eb6f0de0SAdrian Chadd */
4939eb6f0de0SAdrian Chadd /* XXX endian-ness of seq_st, ba? */
4940eb6f0de0SAdrian Chadd seq_st = ts.ts_seqnum;
4941eb6f0de0SAdrian Chadd hasba = !! (ts.ts_flags & HAL_TX_BA);
4942eb6f0de0SAdrian Chadd tx_ok = (ts.ts_status == 0);
4943eb6f0de0SAdrian Chadd isaggr = bf_first->bf_state.bfs_aggr;
4944eb6f0de0SAdrian Chadd ba[0] = ts.ts_ba_low;
4945eb6f0de0SAdrian Chadd ba[1] = ts.ts_ba_high;
4946eb6f0de0SAdrian Chadd
4947eb6f0de0SAdrian Chadd /*
4948eb6f0de0SAdrian Chadd * Copy the TX completion status and the rate control
4949eb6f0de0SAdrian Chadd * series from the first descriptor, as it may be freed
4950eb6f0de0SAdrian Chadd * before the rate control code can get its grubby fingers
4951eb6f0de0SAdrian Chadd * into things.
4952eb6f0de0SAdrian Chadd */
4953eb6f0de0SAdrian Chadd memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
4954eb6f0de0SAdrian Chadd
4955eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4956d4365d16SAdrian Chadd "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
4957d4365d16SAdrian Chadd "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
4958eb6f0de0SAdrian Chadd __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
4959eb6f0de0SAdrian Chadd isaggr, seq_st, hasba, ba[0], ba[1]);
4960eb6f0de0SAdrian Chadd
4961b3420862SAdrian Chadd /*
4962b3420862SAdrian Chadd * The reference driver doesn't do this; it simply ignores
4963b3420862SAdrian Chadd * this check in its entirety.
4964b3420862SAdrian Chadd *
4965b3420862SAdrian Chadd * I've seen this occur when using iperf to send traffic
4966b3420862SAdrian Chadd * out tid 1 - the aggregate frames are all marked as TID 1,
4967b3420862SAdrian Chadd * but the TXSTATUS has TID=0. So, let's just ignore this
4968b3420862SAdrian Chadd * check.
4969b3420862SAdrian Chadd */
4970b3420862SAdrian Chadd #if 0
4971eb6f0de0SAdrian Chadd /* Occasionally, the MAC sends a tx status for the wrong TID. */
4972eb6f0de0SAdrian Chadd if (tid != ts.ts_tid) {
497383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n",
4974eb6f0de0SAdrian Chadd __func__, tid, ts.ts_tid);
4975eb6f0de0SAdrian Chadd tx_ok = 0;
4976eb6f0de0SAdrian Chadd }
4977b3420862SAdrian Chadd #endif
4978eb6f0de0SAdrian Chadd
4979eb6f0de0SAdrian Chadd /* AR5416 BA bug; this requires an interface reset */
4980eb6f0de0SAdrian Chadd if (isaggr && tx_ok && (! hasba)) {
498182525db1SAdrian Chadd device_printf(sc->sc_dev,
4982d4365d16SAdrian Chadd "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
4983d4365d16SAdrian Chadd "seq_st=%d\n",
4984eb6f0de0SAdrian Chadd __func__, hasba, tx_ok, isaggr, seq_st);
49859a2de0c3SAdrian Chadd taskqueue_enqueue(sc->sc_tq, &sc->sc_fataltask);
49869a2de0c3SAdrian Chadd /* And as we can't really trust the BA here .. */
49879a2de0c3SAdrian Chadd ba[0] = 0;
49889a2de0c3SAdrian Chadd ba[1] = 0;
49899a2de0c3SAdrian Chadd seq_st = 0;
49900f078d63SJohn Baldwin #ifdef ATH_DEBUG
49916abbbae5SAdrian Chadd ath_printtxbuf(sc, bf_first,
49926abbbae5SAdrian Chadd sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0);
49930f078d63SJohn Baldwin #endif
4994eb6f0de0SAdrian Chadd }
4995eb6f0de0SAdrian Chadd
4996eb6f0de0SAdrian Chadd /*
4997eb6f0de0SAdrian Chadd * Walk the list of frames, figure out which ones were correctly
4998eb6f0de0SAdrian Chadd * sent and which weren't.
4999eb6f0de0SAdrian Chadd */
5000eb6f0de0SAdrian Chadd bf = bf_first;
5001eb6f0de0SAdrian Chadd nf = bf_first->bf_state.bfs_nframes;
5002eb6f0de0SAdrian Chadd
5003eb6f0de0SAdrian Chadd /* bf_first is going to be invalid once this list is walked */
5004eb6f0de0SAdrian Chadd bf_first = NULL;
5005eb6f0de0SAdrian Chadd
5006eb6f0de0SAdrian Chadd /*
5007eb6f0de0SAdrian Chadd * Walk the list of completed frames and determine
5008eb6f0de0SAdrian Chadd * which need to be completed and which need to be
5009eb6f0de0SAdrian Chadd * retransmitted.
5010eb6f0de0SAdrian Chadd *
5011eb6f0de0SAdrian Chadd * For completed frames, the completion functions need
5012eb6f0de0SAdrian Chadd * to be called at the end of this function as the last
5013eb6f0de0SAdrian Chadd * node reference may free the node.
5014eb6f0de0SAdrian Chadd *
5015eb6f0de0SAdrian Chadd * Finally, since the TXQ lock can't be held during the
5016eb6f0de0SAdrian Chadd * completion callback (to avoid lock recursion),
5017eb6f0de0SAdrian Chadd * the completion calls have to be done outside of the
5018eb6f0de0SAdrian Chadd * lock.
5019eb6f0de0SAdrian Chadd */
5020eb6f0de0SAdrian Chadd while (bf) {
5021eb6f0de0SAdrian Chadd nframes++;
5022d4365d16SAdrian Chadd ba_index = ATH_BA_INDEX(seq_st,
5023d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno));
5024eb6f0de0SAdrian Chadd bf_next = bf->bf_next;
5025eb6f0de0SAdrian Chadd bf->bf_next = NULL; /* Remove it from the aggr list */
5026eb6f0de0SAdrian Chadd
5027eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5028eb6f0de0SAdrian Chadd "%s: checking bf=%p seqno=%d; ack=%d\n",
5029eb6f0de0SAdrian Chadd __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
5030eb6f0de0SAdrian Chadd ATH_BA_ISSET(ba, ba_index));
5031eb6f0de0SAdrian Chadd
5032eb6f0de0SAdrian Chadd if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
50332d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_ok++;
5034eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf);
5035eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0;
5036eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw)
503783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5038eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n",
5039eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
5040eb6f0de0SAdrian Chadd bf->bf_next = NULL;
5041eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
5042eb6f0de0SAdrian Chadd } else {
50432d3d4776SAdrian Chadd sc->sc_stats.ast_tx_aggr_fail++;
5044eb6f0de0SAdrian Chadd if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
5045eb6f0de0SAdrian Chadd drops++;
5046eb6f0de0SAdrian Chadd bf->bf_next = NULL;
5047eb6f0de0SAdrian Chadd TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
5048eb6f0de0SAdrian Chadd }
5049eb6f0de0SAdrian Chadd nbad++;
5050eb6f0de0SAdrian Chadd }
5051eb6f0de0SAdrian Chadd bf = bf_next;
5052eb6f0de0SAdrian Chadd }
5053eb6f0de0SAdrian Chadd
5054eb6f0de0SAdrian Chadd /*
5055eb6f0de0SAdrian Chadd * Now that the BAW updates have been done, unlock
5056eb6f0de0SAdrian Chadd *
5057eb6f0de0SAdrian Chadd * txseq is grabbed before the lock is released so we
5058eb6f0de0SAdrian Chadd * have a consistent view of what -was- in the BAW.
5059eb6f0de0SAdrian Chadd * Anything after this point will not yet have been
5060eb6f0de0SAdrian Chadd * TXed.
5061eb6f0de0SAdrian Chadd */
5062eb6f0de0SAdrian Chadd txseq = tap->txa_start;
5063375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
5064eb6f0de0SAdrian Chadd
5065eb6f0de0SAdrian Chadd if (nframes != nf)
506683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5067eb6f0de0SAdrian Chadd "%s: num frames seen=%d; bf nframes=%d\n",
5068eb6f0de0SAdrian Chadd __func__, nframes, nf);
5069eb6f0de0SAdrian Chadd
5070eb6f0de0SAdrian Chadd /*
5071eb6f0de0SAdrian Chadd * Now we know how many frames were bad, call the rate
5072eb6f0de0SAdrian Chadd * control code.
5073eb6f0de0SAdrian Chadd */
507484f950a5SAdrian Chadd if (fail == 0) {
5075cce63444SAdrian Chadd ath_tx_update_ratectrl(sc, ni, rc, &ts, agglen, rc_agglen,
5076cce63444SAdrian Chadd nframes, nbad);
507784f950a5SAdrian Chadd }
5078eb6f0de0SAdrian Chadd
5079eb6f0de0SAdrian Chadd /*
5080eb6f0de0SAdrian Chadd * send bar if we dropped any frames
5081eb6f0de0SAdrian Chadd */
5082eb6f0de0SAdrian Chadd if (drops) {
508388b3d483SAdrian Chadd /* Suspend the TX queue and get ready to send the BAR */
5084375307d4SAdrian Chadd ATH_TX_LOCK(sc);
508588b3d483SAdrian Chadd ath_tx_tid_bar_suspend(sc, atid);
5086375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
5087eb6f0de0SAdrian Chadd }
5088eb6f0de0SAdrian Chadd
508939da9d42SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
509039da9d42SAdrian Chadd "%s: txa_start now %d\n", __func__, tap->txa_start);
509139da9d42SAdrian Chadd
5092375307d4SAdrian Chadd ATH_TX_LOCK(sc);
509339da9d42SAdrian Chadd
509439da9d42SAdrian Chadd /* Prepend all frames to the beginning of the queue */
5095eb6f0de0SAdrian Chadd while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
5096eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_q, bf, bf_list);
50973e6cc97fSAdrian Chadd ATH_TID_INSERT_HEAD(atid, bf, bf_list);
5098eb6f0de0SAdrian Chadd }
5099eb6f0de0SAdrian Chadd
510039da9d42SAdrian Chadd /*
510139da9d42SAdrian Chadd * Reschedule to grab some further frames.
510239da9d42SAdrian Chadd */
510339da9d42SAdrian Chadd ath_tx_tid_sched(sc, atid);
5104eb6f0de0SAdrian Chadd
510588b3d483SAdrian Chadd /*
5106f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required.
5107f1bc738eSAdrian Chadd *
5108f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor
5109f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible
5110f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered
5111f1bc738eSAdrian Chadd * (complete or otherwise) frame.
5112f1bc738eSAdrian Chadd *
5113f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame?
5114f1bc738eSAdrian Chadd */
5115f1bc738eSAdrian Chadd if (atid->isfiltered)
5116f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid);
5117f1bc738eSAdrian Chadd
5118f1bc738eSAdrian Chadd finish_send_bar:
5119f1bc738eSAdrian Chadd
5120f1bc738eSAdrian Chadd /*
512188b3d483SAdrian Chadd * Send BAR if required
512288b3d483SAdrian Chadd */
512388b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid))
512488b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid);
512539da9d42SAdrian Chadd
5126375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
512788b3d483SAdrian Chadd
5128eb6f0de0SAdrian Chadd /* Do deferred completion */
5129eb6f0de0SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
5130eb6f0de0SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list);
5131eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, 0);
5132eb6f0de0SAdrian Chadd }
5133eb6f0de0SAdrian Chadd }
5134eb6f0de0SAdrian Chadd
5135eb6f0de0SAdrian Chadd /*
5136eb6f0de0SAdrian Chadd * Handle completion of unaggregated frames in an ADDBA
5137eb6f0de0SAdrian Chadd * session.
5138eb6f0de0SAdrian Chadd *
5139eb6f0de0SAdrian Chadd * Fail is set to 1 if the entry is being freed via a call to
5140eb6f0de0SAdrian Chadd * ath_tx_draintxq().
5141eb6f0de0SAdrian Chadd */
5142eb6f0de0SAdrian Chadd static void
5143eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
5144eb6f0de0SAdrian Chadd {
5145eb6f0de0SAdrian Chadd struct ieee80211_node *ni = bf->bf_node;
5146eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
5147eb6f0de0SAdrian Chadd int tid = bf->bf_state.bfs_tid;
5148eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
51490aa5c1bbSAdrian Chadd struct ath_tx_status ts;
5150f1bc738eSAdrian Chadd int drops = 0;
5151eb6f0de0SAdrian Chadd
5152eb6f0de0SAdrian Chadd /*
51530aa5c1bbSAdrian Chadd * Take a copy of this; filtering/cloning the frame may free the
51540aa5c1bbSAdrian Chadd * bf pointer.
51550aa5c1bbSAdrian Chadd */
51560aa5c1bbSAdrian Chadd ts = bf->bf_status.ds_txstat;
51570aa5c1bbSAdrian Chadd
51580aa5c1bbSAdrian Chadd /*
5159eb6f0de0SAdrian Chadd * Update rate control status here, before we possibly
5160eb6f0de0SAdrian Chadd * punt to retry or cleanup.
5161eb6f0de0SAdrian Chadd *
5162eb6f0de0SAdrian Chadd * Do it outside of the TXQ lock.
5163eb6f0de0SAdrian Chadd */
5164875a9451SAdrian Chadd if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
5165eb6f0de0SAdrian Chadd ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
5166eb6f0de0SAdrian Chadd &bf->bf_status.ds_txstat,
5167eb6f0de0SAdrian Chadd bf->bf_state.bfs_pktlen,
5168cce63444SAdrian Chadd bf->bf_state.bfs_pktlen,
51690aa5c1bbSAdrian Chadd 1, (ts.ts_status == 0) ? 0 : 1);
5170eb6f0de0SAdrian Chadd
5171eb6f0de0SAdrian Chadd /*
5172eb6f0de0SAdrian Chadd * This is called early so atid->hwq_depth can be tracked.
5173eb6f0de0SAdrian Chadd * This unfortunately means that it's released and regrabbed
5174eb6f0de0SAdrian Chadd * during retry and cleanup. That's rather inefficient.
5175eb6f0de0SAdrian Chadd */
5176375307d4SAdrian Chadd ATH_TX_LOCK(sc);
5177eb6f0de0SAdrian Chadd
5178eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID)
517983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__);
5180eb6f0de0SAdrian Chadd
5181d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX,
5182d4365d16SAdrian Chadd "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
5183d4365d16SAdrian Chadd __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
5184d4365d16SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno));
5185eb6f0de0SAdrian Chadd
5186eb6f0de0SAdrian Chadd atid->hwq_depth--;
5187eb6f0de0SAdrian Chadd if (atid->hwq_depth < 0)
518883bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
5189eb6f0de0SAdrian Chadd __func__, atid->hwq_depth);
5190eb6f0de0SAdrian Chadd
5191eb6f0de0SAdrian Chadd /*
5192f1bc738eSAdrian Chadd * If the TID is filtered, handle completing the filter
5193f1bc738eSAdrian Chadd * transition before potentially kicking it to the cleanup
5194f1bc738eSAdrian Chadd * function.
5195f1bc738eSAdrian Chadd */
5196f1bc738eSAdrian Chadd if (atid->isfiltered)
5197f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid);
5198f1bc738eSAdrian Chadd
5199f1bc738eSAdrian Chadd /*
5200eb6f0de0SAdrian Chadd * If a cleanup is in progress, punt to comp_cleanup;
5201eb6f0de0SAdrian Chadd * rather than handling it here. It's thus their
5202eb6f0de0SAdrian Chadd * responsibility to clean up, call the completion
5203eb6f0de0SAdrian Chadd * function in net80211, etc.
5204eb6f0de0SAdrian Chadd */
5205eb6f0de0SAdrian Chadd if (atid->cleanup_inprogress) {
5206f1bc738eSAdrian Chadd if (atid->isfiltered)
520783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX,
5208f1bc738eSAdrian Chadd "%s: isfiltered=1, normal_comp?\n",
5209f1bc738eSAdrian Chadd __func__);
5210375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
5211d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
5212d4365d16SAdrian Chadd __func__);
5213eb6f0de0SAdrian Chadd ath_tx_comp_cleanup_unaggr(sc, bf);
5214eb6f0de0SAdrian Chadd return;
5215eb6f0de0SAdrian Chadd }
5216eb6f0de0SAdrian Chadd
5217eb6f0de0SAdrian Chadd /*
5218f1bc738eSAdrian Chadd * XXX TODO: how does cleanup, BAR and filtered frame handling
5219f1bc738eSAdrian Chadd * overlap?
5220f1bc738eSAdrian Chadd *
5221f1bc738eSAdrian Chadd * If the frame is filtered OR if it's any failure but
5222f1bc738eSAdrian Chadd * the TID is filtered, the frame must be added to the
5223f1bc738eSAdrian Chadd * filtered frame list.
5224f1bc738eSAdrian Chadd *
5225f1bc738eSAdrian Chadd * However - a busy buffer can't be added to the filtered
5226f1bc738eSAdrian Chadd * list as it will end up being recycled without having
5227f1bc738eSAdrian Chadd * been made available for the hardware.
5228f1bc738eSAdrian Chadd */
52290aa5c1bbSAdrian Chadd if ((ts.ts_status & HAL_TXERR_FILT) ||
52300aa5c1bbSAdrian Chadd (ts.ts_status != 0 && atid->isfiltered)) {
5231f1bc738eSAdrian Chadd int freeframe;
5232f1bc738eSAdrian Chadd
5233f1bc738eSAdrian Chadd if (fail != 0)
523483bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX,
5235f1bc738eSAdrian Chadd "%s: isfiltered=1, fail=%d\n",
523683bbd5ebSRui Paulo __func__, fail);
5237f1bc738eSAdrian Chadd freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf);
523842fdd8e7SAdrian Chadd /*
523942fdd8e7SAdrian Chadd * If freeframe=0 then bf is no longer ours; don't
524042fdd8e7SAdrian Chadd * touch it.
524142fdd8e7SAdrian Chadd */
5242f1bc738eSAdrian Chadd if (freeframe) {
5243f1bc738eSAdrian Chadd /* Remove from BAW */
5244f1bc738eSAdrian Chadd if (bf->bf_state.bfs_addedbaw)
5245f1bc738eSAdrian Chadd drops++;
5246f1bc738eSAdrian Chadd if (bf->bf_state.bfs_dobaw) {
5247f1bc738eSAdrian Chadd ath_tx_update_baw(sc, an, atid, bf);
5248f1bc738eSAdrian Chadd if (!bf->bf_state.bfs_addedbaw)
524983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX,
5250f1bc738eSAdrian Chadd "%s: wasn't added: seqno %d\n",
5251f1bc738eSAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
5252f1bc738eSAdrian Chadd }
5253f1bc738eSAdrian Chadd bf->bf_state.bfs_dobaw = 0;
5254f1bc738eSAdrian Chadd }
5255f1bc738eSAdrian Chadd
5256f1bc738eSAdrian Chadd /*
5257f1bc738eSAdrian Chadd * If the frame couldn't be filtered, treat it as a drop and
5258f1bc738eSAdrian Chadd * prepare to send a BAR.
5259f1bc738eSAdrian Chadd */
5260f1bc738eSAdrian Chadd if (freeframe && drops)
5261f1bc738eSAdrian Chadd ath_tx_tid_bar_suspend(sc, atid);
5262f1bc738eSAdrian Chadd
5263f1bc738eSAdrian Chadd /*
5264f1bc738eSAdrian Chadd * Send BAR if required
5265f1bc738eSAdrian Chadd */
5266f1bc738eSAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid))
5267f1bc738eSAdrian Chadd ath_tx_tid_bar_tx(sc, atid);
5268f1bc738eSAdrian Chadd
5269375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
5270f1bc738eSAdrian Chadd /*
5271f1bc738eSAdrian Chadd * If freeframe is set, then the frame couldn't be
5272f1bc738eSAdrian Chadd * cloned and bf is still valid. Just complete/free it.
5273f1bc738eSAdrian Chadd */
5274f1bc738eSAdrian Chadd if (freeframe)
5275f1bc738eSAdrian Chadd ath_tx_default_comp(sc, bf, fail);
5276f1bc738eSAdrian Chadd
5277f1bc738eSAdrian Chadd return;
5278f1bc738eSAdrian Chadd }
5279f1bc738eSAdrian Chadd /*
5280eb6f0de0SAdrian Chadd * Don't bother with the retry check if all frames
5281eb6f0de0SAdrian Chadd * are being failed (eg during queue deletion.)
5282eb6f0de0SAdrian Chadd */
5283e9a6408eSAdrian Chadd #if 0
5284eb6f0de0SAdrian Chadd if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
5285e9a6408eSAdrian Chadd #endif
52860aa5c1bbSAdrian Chadd if (fail == 0 && ts.ts_status != 0) {
5287375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
5288d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
5289d4365d16SAdrian Chadd __func__);
5290eb6f0de0SAdrian Chadd ath_tx_aggr_retry_unaggr(sc, bf);
5291eb6f0de0SAdrian Chadd return;
5292eb6f0de0SAdrian Chadd }
5293eb6f0de0SAdrian Chadd
5294eb6f0de0SAdrian Chadd /* Success? Complete */
5295eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
5296eb6f0de0SAdrian Chadd __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
5297eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_dobaw) {
5298eb6f0de0SAdrian Chadd ath_tx_update_baw(sc, an, atid, bf);
5299eb6f0de0SAdrian Chadd bf->bf_state.bfs_dobaw = 0;
5300eb6f0de0SAdrian Chadd if (!bf->bf_state.bfs_addedbaw)
530183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX,
5302eb6f0de0SAdrian Chadd "%s: wasn't added: seqno %d\n",
5303eb6f0de0SAdrian Chadd __func__, SEQNO(bf->bf_state.bfs_seqno));
5304eb6f0de0SAdrian Chadd }
5305eb6f0de0SAdrian Chadd
530688b3d483SAdrian Chadd /*
5307f1bc738eSAdrian Chadd * If the queue is filtered, re-schedule as required.
5308f1bc738eSAdrian Chadd *
5309f1bc738eSAdrian Chadd * This is required as there may be a subsequent TX descriptor
5310f1bc738eSAdrian Chadd * for this end-node that has CLRDMASK set, so it's quite possible
5311f1bc738eSAdrian Chadd * that a filtered frame will be followed by a non-filtered
5312f1bc738eSAdrian Chadd * (complete or otherwise) frame.
5313f1bc738eSAdrian Chadd *
5314f1bc738eSAdrian Chadd * XXX should we do this before we complete the frame?
5315f1bc738eSAdrian Chadd */
5316f1bc738eSAdrian Chadd if (atid->isfiltered)
5317f1bc738eSAdrian Chadd ath_tx_tid_filt_comp_complete(sc, atid);
5318f1bc738eSAdrian Chadd
5319f1bc738eSAdrian Chadd /*
532088b3d483SAdrian Chadd * Send BAR if required
532188b3d483SAdrian Chadd */
532288b3d483SAdrian Chadd if (ath_tx_tid_bar_tx_ready(sc, atid))
532388b3d483SAdrian Chadd ath_tx_tid_bar_tx(sc, atid);
532488b3d483SAdrian Chadd
5325375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
5326eb6f0de0SAdrian Chadd
5327eb6f0de0SAdrian Chadd ath_tx_default_comp(sc, bf, fail);
5328eb6f0de0SAdrian Chadd /* bf is freed at this point */
5329eb6f0de0SAdrian Chadd }
5330eb6f0de0SAdrian Chadd
5331eb6f0de0SAdrian Chadd void
5332eb6f0de0SAdrian Chadd ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
5333eb6f0de0SAdrian Chadd {
5334eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_aggr)
5335eb6f0de0SAdrian Chadd ath_tx_aggr_comp_aggr(sc, bf, fail);
5336eb6f0de0SAdrian Chadd else
5337eb6f0de0SAdrian Chadd ath_tx_aggr_comp_unaggr(sc, bf, fail);
5338eb6f0de0SAdrian Chadd }
5339eb6f0de0SAdrian Chadd
5340eb6f0de0SAdrian Chadd /*
5341cce63444SAdrian Chadd * Grab the software queue depth that we COULD transmit.
5342cce63444SAdrian Chadd *
5343cce63444SAdrian Chadd * This includes checks if it's in the BAW, whether it's a frame
5344cce63444SAdrian Chadd * that is supposed to be in the BAW. Other checks could be done;
5345cce63444SAdrian Chadd * but for now let's try and avoid doing the whole of ath_tx_form_aggr()
5346cce63444SAdrian Chadd * here.
5347cce63444SAdrian Chadd */
5348cce63444SAdrian Chadd static int
5349cce63444SAdrian Chadd ath_tx_tid_swq_depth_bytes(struct ath_softc *sc, struct ath_node *an,
5350cce63444SAdrian Chadd struct ath_tid *tid)
5351cce63444SAdrian Chadd {
5352cce63444SAdrian Chadd struct ath_buf *bf;
5353cce63444SAdrian Chadd struct ieee80211_tx_ampdu *tap;
5354cce63444SAdrian Chadd int nbytes = 0;
5355cce63444SAdrian Chadd
5356cce63444SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
5357cce63444SAdrian Chadd
5358cce63444SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid);
5359cce63444SAdrian Chadd
5360cce63444SAdrian Chadd /*
5361cce63444SAdrian Chadd * Iterate over each buffer and sum the pkt_len.
5362cce63444SAdrian Chadd * Bail if we exceed ATH_AGGR_MAXSIZE bytes; we won't
5363cce63444SAdrian Chadd * ever queue more than that in a single frame.
5364cce63444SAdrian Chadd */
5365cce63444SAdrian Chadd TAILQ_FOREACH(bf, &tid->tid_q, bf_list) {
5366cce63444SAdrian Chadd /*
5367cce63444SAdrian Chadd * TODO: I'm not sure if we're going to hit cases where
5368cce63444SAdrian Chadd * no frames get sent because the list is empty.
5369cce63444SAdrian Chadd */
5370cce63444SAdrian Chadd
5371cce63444SAdrian Chadd /* Check if it's in the BAW */
5372cce63444SAdrian Chadd if (tap != NULL && (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
5373cce63444SAdrian Chadd SEQNO(bf->bf_state.bfs_seqno)))) {
5374cce63444SAdrian Chadd break;
5375cce63444SAdrian Chadd }
5376cce63444SAdrian Chadd
5377cce63444SAdrian Chadd /* Check if it's even supposed to be in the BAW */
5378cce63444SAdrian Chadd if (! bf->bf_state.bfs_dobaw) {
5379cce63444SAdrian Chadd break;
5380cce63444SAdrian Chadd }
5381cce63444SAdrian Chadd
5382cce63444SAdrian Chadd nbytes += bf->bf_state.bfs_pktlen;
5383cce63444SAdrian Chadd if (nbytes >= ATH_AGGR_MAXSIZE)
5384cce63444SAdrian Chadd break;
5385cce63444SAdrian Chadd
5386cce63444SAdrian Chadd /*
5387cce63444SAdrian Chadd * Check if we're likely going to leak a frame
5388cce63444SAdrian Chadd * as part of a PSPOLL. Break out at this point;
5389cce63444SAdrian Chadd * we're only going to send a single frame anyway.
5390cce63444SAdrian Chadd */
5391cce63444SAdrian Chadd if (an->an_leak_count) {
5392cce63444SAdrian Chadd break;
5393cce63444SAdrian Chadd }
5394cce63444SAdrian Chadd }
5395cce63444SAdrian Chadd
5396cce63444SAdrian Chadd return MIN(nbytes, ATH_AGGR_MAXSIZE);
5397cce63444SAdrian Chadd }
5398cce63444SAdrian Chadd
5399cce63444SAdrian Chadd /*
5400eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware.
5401eb6f0de0SAdrian Chadd *
5402eb6f0de0SAdrian Chadd * This is the aggregate version.
5403eb6f0de0SAdrian Chadd */
5404eb6f0de0SAdrian Chadd void
5405eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
5406eb6f0de0SAdrian Chadd struct ath_tid *tid)
5407eb6f0de0SAdrian Chadd {
5408eb6f0de0SAdrian Chadd struct ath_buf *bf;
5409eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5410eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
5411eb6f0de0SAdrian Chadd ATH_AGGR_STATUS status;
5412eb6f0de0SAdrian Chadd ath_bufhead bf_q;
5413cce63444SAdrian Chadd int swq_pktbytes;
5414eb6f0de0SAdrian Chadd
5415eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
5416375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
5417eb6f0de0SAdrian Chadd
541822a3aee6SAdrian Chadd /*
541922a3aee6SAdrian Chadd * XXX TODO: If we're called for a queue that we're leaking frames to,
542022a3aee6SAdrian Chadd * ensure we only leak one.
542122a3aee6SAdrian Chadd */
542222a3aee6SAdrian Chadd
5423eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid->tid);
5424eb6f0de0SAdrian Chadd
5425eb6f0de0SAdrian Chadd if (tid->tid == IEEE80211_NONQOS_TID)
542683bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX,
542783bbd5ebSRui Paulo "%s: called for TID=NONQOS_TID?\n", __func__);
5428eb6f0de0SAdrian Chadd
5429eb6f0de0SAdrian Chadd for (;;) {
5430eb6f0de0SAdrian Chadd status = ATH_AGGR_DONE;
5431eb6f0de0SAdrian Chadd
5432eb6f0de0SAdrian Chadd /*
5433eb6f0de0SAdrian Chadd * If the upper layer has paused the TID, don't
5434eb6f0de0SAdrian Chadd * queue any further packets.
5435eb6f0de0SAdrian Chadd *
5436eb6f0de0SAdrian Chadd * This can also occur from the completion task because
5437eb6f0de0SAdrian Chadd * of packet loss; but as its serialised with this code,
5438eb6f0de0SAdrian Chadd * it won't "appear" half way through queuing packets.
5439eb6f0de0SAdrian Chadd */
544022a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5441eb6f0de0SAdrian Chadd break;
5442eb6f0de0SAdrian Chadd
54433e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid);
5444eb6f0de0SAdrian Chadd if (bf == NULL) {
5445eb6f0de0SAdrian Chadd break;
5446eb6f0de0SAdrian Chadd }
5447eb6f0de0SAdrian Chadd
5448eb6f0de0SAdrian Chadd /*
5449eb6f0de0SAdrian Chadd * If the packet doesn't fall within the BAW (eg a NULL
5450eb6f0de0SAdrian Chadd * data frame), schedule it directly; continue.
5451eb6f0de0SAdrian Chadd */
5452eb6f0de0SAdrian Chadd if (! bf->bf_state.bfs_dobaw) {
5453d4365d16SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5454d4365d16SAdrian Chadd "%s: non-baw packet\n",
5455eb6f0de0SAdrian Chadd __func__);
54563e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list);
54572a9f83afSAdrian Chadd
54582a9f83afSAdrian Chadd if (bf->bf_state.bfs_nframes > 1)
545983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX,
54602a9f83afSAdrian Chadd "%s: aggr=%d, nframes=%d\n",
54612a9f83afSAdrian Chadd __func__,
54622a9f83afSAdrian Chadd bf->bf_state.bfs_aggr,
54632a9f83afSAdrian Chadd bf->bf_state.bfs_nframes);
54642a9f83afSAdrian Chadd
54652a9f83afSAdrian Chadd /*
54662a9f83afSAdrian Chadd * This shouldn't happen - such frames shouldn't
54672a9f83afSAdrian Chadd * ever have been queued as an aggregate in the
54682a9f83afSAdrian Chadd * first place. However, make sure the fields
54692a9f83afSAdrian Chadd * are correctly setup just to be totally sure.
54702a9f83afSAdrian Chadd */
5471eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0;
54722a9f83afSAdrian Chadd bf->bf_state.bfs_nframes = 1;
54732a9f83afSAdrian Chadd
54744e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */
54754e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf);
54764e81f27cSAdrian Chadd
5477cce63444SAdrian Chadd ath_tx_do_ratelookup(sc, bf, tid->tid,
5478cce63444SAdrian Chadd bf->bf_state.bfs_pktlen, false);
5479e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf);
5480e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf);
5481eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf);
5482e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf);
5483eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf);
5484eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5485eb6f0de0SAdrian Chadd
5486eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_nonbaw_pkt++;
5487eb6f0de0SAdrian Chadd
5488eb6f0de0SAdrian Chadd /* Queue the packet; continue */
5489eb6f0de0SAdrian Chadd goto queuepkt;
5490eb6f0de0SAdrian Chadd }
5491eb6f0de0SAdrian Chadd
5492eb6f0de0SAdrian Chadd TAILQ_INIT(&bf_q);
5493eb6f0de0SAdrian Chadd
5494eb6f0de0SAdrian Chadd /*
5495cce63444SAdrian Chadd * Loop over the swq to find out how long
5496cce63444SAdrian Chadd * each packet is (up until 64k) and provide that
5497cce63444SAdrian Chadd * to the rate control lookup.
5498eb6f0de0SAdrian Chadd */
5499cce63444SAdrian Chadd swq_pktbytes = ath_tx_tid_swq_depth_bytes(sc, an, tid);
5500cce63444SAdrian Chadd ath_tx_do_ratelookup(sc, bf, tid->tid, swq_pktbytes, true);
5501e2e4a2c2SAdrian Chadd
5502cce63444SAdrian Chadd /*
5503cce63444SAdrian Chadd * Note this only is used for the fragment paths and
5504cce63444SAdrian Chadd * should really be rethought out if we want to do
5505cce63444SAdrian Chadd * things like an RTS burst across >1 aggregate.
5506cce63444SAdrian Chadd */
5507e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf);
5508e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf);
5509e2e4a2c2SAdrian Chadd
5510e2e4a2c2SAdrian Chadd ath_tx_set_rtscts(sc, bf);
5511eb6f0de0SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf);
5512eb6f0de0SAdrian Chadd
5513eb6f0de0SAdrian Chadd status = ath_tx_form_aggr(sc, an, tid, &bf_q);
5514eb6f0de0SAdrian Chadd
5515eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5516eb6f0de0SAdrian Chadd "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
5517eb6f0de0SAdrian Chadd
5518eb6f0de0SAdrian Chadd /*
5519eb6f0de0SAdrian Chadd * No frames to be picked up - out of BAW
5520eb6f0de0SAdrian Chadd */
5521eb6f0de0SAdrian Chadd if (TAILQ_EMPTY(&bf_q))
5522eb6f0de0SAdrian Chadd break;
5523eb6f0de0SAdrian Chadd
5524eb6f0de0SAdrian Chadd /*
5525eb6f0de0SAdrian Chadd * This assumes that the descriptor list in the ath_bufhead
5526eb6f0de0SAdrian Chadd * are already linked together via bf_next pointers.
5527eb6f0de0SAdrian Chadd */
5528eb6f0de0SAdrian Chadd bf = TAILQ_FIRST(&bf_q);
5529eb6f0de0SAdrian Chadd
5530e2e4a2c2SAdrian Chadd if (status == ATH_AGGR_8K_LIMITED)
5531e2e4a2c2SAdrian Chadd sc->sc_aggr_stats.aggr_rts_aggr_limited++;
5532e2e4a2c2SAdrian Chadd
5533eb6f0de0SAdrian Chadd /*
5534eb6f0de0SAdrian Chadd * If it's the only frame send as non-aggregate
5535eb6f0de0SAdrian Chadd * assume that ath_tx_form_aggr() has checked
5536eb6f0de0SAdrian Chadd * whether it's in the BAW and added it appropriately.
5537eb6f0de0SAdrian Chadd */
5538eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_nframes == 1) {
5539eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5540eb6f0de0SAdrian Chadd "%s: single-frame aggregate\n", __func__);
55414e81f27cSAdrian Chadd
55424e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */
55434e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf);
55444e81f27cSAdrian Chadd
5545eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 0;
554621840808SAdrian Chadd bf->bf_state.bfs_ndelim = 0;
5547eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf);
5548eb6f0de0SAdrian Chadd ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5549eb6f0de0SAdrian Chadd if (status == ATH_AGGR_BAW_CLOSED)
5550eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
5551eb6f0de0SAdrian Chadd else
5552eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_single_pkt++;
5553eb6f0de0SAdrian Chadd } else {
5554eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5555d4365d16SAdrian Chadd "%s: multi-frame aggregate: %d frames, "
5556d4365d16SAdrian Chadd "length %d\n",
5557eb6f0de0SAdrian Chadd __func__, bf->bf_state.bfs_nframes,
5558eb6f0de0SAdrian Chadd bf->bf_state.bfs_al);
5559eb6f0de0SAdrian Chadd bf->bf_state.bfs_aggr = 1;
5560eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
5561eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_aggr_pkt++;
5562eb6f0de0SAdrian Chadd
55634e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */
55644e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf);
55654e81f27cSAdrian Chadd
5566eb6f0de0SAdrian Chadd /*
5567e2e4a2c2SAdrian Chadd * Calculate the duration/protection as required.
5568e2e4a2c2SAdrian Chadd */
5569e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf);
5570e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf);
5571e2e4a2c2SAdrian Chadd
5572e2e4a2c2SAdrian Chadd /*
5573eb6f0de0SAdrian Chadd * Update the rate and rtscts information based on the
5574eb6f0de0SAdrian Chadd * rate decision made by the rate control code;
5575eb6f0de0SAdrian Chadd * the first frame in the aggregate needs it.
5576eb6f0de0SAdrian Chadd */
5577eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf);
5578eb6f0de0SAdrian Chadd
5579eb6f0de0SAdrian Chadd /*
5580eb6f0de0SAdrian Chadd * Setup the relevant descriptor fields
5581eb6f0de0SAdrian Chadd * for aggregation. The first descriptor
5582eb6f0de0SAdrian Chadd * already points to the rest in the chain.
5583eb6f0de0SAdrian Chadd */
5584eb6f0de0SAdrian Chadd ath_tx_setds_11n(sc, bf);
5585eb6f0de0SAdrian Chadd }
5586eb6f0de0SAdrian Chadd queuepkt:
5587eb6f0de0SAdrian Chadd /* Set completion handler, multi-frame aggregate or not */
5588eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_aggr_comp;
5589eb6f0de0SAdrian Chadd
5590eb6f0de0SAdrian Chadd if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
559183bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__);
5592eb6f0de0SAdrian Chadd
559322a3aee6SAdrian Chadd /*
559422a3aee6SAdrian Chadd * Update leak count and frame config if were leaking frames.
559522a3aee6SAdrian Chadd *
559622a3aee6SAdrian Chadd * XXX TODO: it should update all frames in an aggregate
559722a3aee6SAdrian Chadd * correctly!
559822a3aee6SAdrian Chadd */
559922a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf);
560022a3aee6SAdrian Chadd
5601eb6f0de0SAdrian Chadd /* Punt to txq */
5602eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf);
5603eb6f0de0SAdrian Chadd
5604eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */
5605eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */
5606eb6f0de0SAdrian Chadd tid->hwq_depth++;
5607eb6f0de0SAdrian Chadd
5608eb6f0de0SAdrian Chadd /*
5609eb6f0de0SAdrian Chadd * Break out if ath_tx_form_aggr() indicated
5610eb6f0de0SAdrian Chadd * there can't be any further progress (eg BAW is full.)
5611eb6f0de0SAdrian Chadd * Checking for an empty txq is done above.
5612eb6f0de0SAdrian Chadd *
5613eb6f0de0SAdrian Chadd * XXX locking on txq here?
5614eb6f0de0SAdrian Chadd */
561572910f03SAdrian Chadd /* XXX TXQ locking */
561672910f03SAdrian Chadd if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr ||
561722a3aee6SAdrian Chadd (status == ATH_AGGR_BAW_CLOSED ||
561822a3aee6SAdrian Chadd status == ATH_AGGR_LEAK_CLOSED))
5619eb6f0de0SAdrian Chadd break;
5620eb6f0de0SAdrian Chadd }
5621eb6f0de0SAdrian Chadd }
5622eb6f0de0SAdrian Chadd
5623eb6f0de0SAdrian Chadd /*
5624eb6f0de0SAdrian Chadd * Schedule some packets from the given node/TID to the hardware.
562572910f03SAdrian Chadd *
562672910f03SAdrian Chadd * XXX TODO: this routine doesn't enforce the maximum TXQ depth.
562772910f03SAdrian Chadd * It just dumps frames into the TXQ. We should limit how deep
562872910f03SAdrian Chadd * the transmit queue can grow for frames dispatched to the given
562972910f03SAdrian Chadd * TXQ.
563072910f03SAdrian Chadd *
563172910f03SAdrian Chadd * To avoid locking issues, either we need to own the TXQ lock
563272910f03SAdrian Chadd * at this point, or we need to pass in the maximum frame count
563372910f03SAdrian Chadd * from the caller.
5634eb6f0de0SAdrian Chadd */
5635eb6f0de0SAdrian Chadd void
5636eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
5637eb6f0de0SAdrian Chadd struct ath_tid *tid)
5638eb6f0de0SAdrian Chadd {
5639eb6f0de0SAdrian Chadd struct ath_buf *bf;
5640eb6f0de0SAdrian Chadd struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5641eb6f0de0SAdrian Chadd
5642eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
5643eb6f0de0SAdrian Chadd __func__, an, tid->tid);
5644eb6f0de0SAdrian Chadd
5645375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
5646eb6f0de0SAdrian Chadd
5647eb6f0de0SAdrian Chadd /* Check - is AMPDU pending or running? then print out something */
5648eb6f0de0SAdrian Chadd if (ath_tx_ampdu_pending(sc, an, tid->tid))
564983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n",
5650eb6f0de0SAdrian Chadd __func__, tid->tid);
5651eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, an, tid->tid))
565283bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n",
5653eb6f0de0SAdrian Chadd __func__, tid->tid);
5654eb6f0de0SAdrian Chadd
5655eb6f0de0SAdrian Chadd for (;;) {
5656eb6f0de0SAdrian Chadd /*
5657eb6f0de0SAdrian Chadd * If the upper layers have paused the TID, don't
5658eb6f0de0SAdrian Chadd * queue any further packets.
565922a3aee6SAdrian Chadd *
566022a3aee6SAdrian Chadd * XXX if we are leaking frames, make sure we decrement
566122a3aee6SAdrian Chadd * that counter _and_ we continue here.
5662eb6f0de0SAdrian Chadd */
566322a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5664eb6f0de0SAdrian Chadd break;
5665eb6f0de0SAdrian Chadd
56663e6cc97fSAdrian Chadd bf = ATH_TID_FIRST(tid);
5667eb6f0de0SAdrian Chadd if (bf == NULL) {
5668eb6f0de0SAdrian Chadd break;
5669eb6f0de0SAdrian Chadd }
5670eb6f0de0SAdrian Chadd
56713e6cc97fSAdrian Chadd ATH_TID_REMOVE(tid, bf, bf_list);
5672eb6f0de0SAdrian Chadd
5673eb6f0de0SAdrian Chadd /* Sanity check! */
5674eb6f0de0SAdrian Chadd if (tid->tid != bf->bf_state.bfs_tid) {
567583bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !="
567683bbd5ebSRui Paulo " tid %d\n", __func__, bf->bf_state.bfs_tid,
567783bbd5ebSRui Paulo tid->tid);
5678eb6f0de0SAdrian Chadd }
5679eb6f0de0SAdrian Chadd /* Normal completion handler */
5680eb6f0de0SAdrian Chadd bf->bf_comp = ath_tx_normal_comp;
5681eb6f0de0SAdrian Chadd
56820c54de88SAdrian Chadd /*
56830c54de88SAdrian Chadd * Override this for now, until the non-aggregate
56840c54de88SAdrian Chadd * completion handler correctly handles software retransmits.
56850c54de88SAdrian Chadd */
56860c54de88SAdrian Chadd bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
56870c54de88SAdrian Chadd
56884e81f27cSAdrian Chadd /* Update CLRDMASK just before this frame is queued */
56894e81f27cSAdrian Chadd ath_tx_update_clrdmask(sc, tid, bf);
56904e81f27cSAdrian Chadd
5691eb6f0de0SAdrian Chadd /* Program descriptors + rate control */
5692cce63444SAdrian Chadd ath_tx_do_ratelookup(sc, bf, tid->tid,
5693cce63444SAdrian Chadd bf->bf_state.bfs_pktlen, false);
5694e2e4a2c2SAdrian Chadd ath_tx_calc_duration(sc, bf);
5695e2e4a2c2SAdrian Chadd ath_tx_calc_protection(sc, bf);
5696eb6f0de0SAdrian Chadd ath_tx_set_rtscts(sc, bf);
5697e2e4a2c2SAdrian Chadd ath_tx_rate_fill_rcflags(sc, bf);
5698eb6f0de0SAdrian Chadd ath_tx_setds(sc, bf);
5699eb6f0de0SAdrian Chadd
570022a3aee6SAdrian Chadd /*
570122a3aee6SAdrian Chadd * Update the current leak count if
570222a3aee6SAdrian Chadd * we're leaking frames; and set the
570322a3aee6SAdrian Chadd * MORE flag as appropriate.
570422a3aee6SAdrian Chadd */
570522a3aee6SAdrian Chadd ath_tx_leak_count_update(sc, tid, bf);
570622a3aee6SAdrian Chadd
5707eb6f0de0SAdrian Chadd /* Track outstanding buffer count to hardware */
5708eb6f0de0SAdrian Chadd /* aggregates are "one" buffer */
5709eb6f0de0SAdrian Chadd tid->hwq_depth++;
5710eb6f0de0SAdrian Chadd
5711eb6f0de0SAdrian Chadd /* Punt to hardware or software txq */
5712eb6f0de0SAdrian Chadd ath_tx_handoff(sc, txq, bf);
5713eb6f0de0SAdrian Chadd }
5714eb6f0de0SAdrian Chadd }
5715eb6f0de0SAdrian Chadd
5716eb6f0de0SAdrian Chadd /*
5717eb6f0de0SAdrian Chadd * Schedule some packets to the given hardware queue.
5718eb6f0de0SAdrian Chadd *
5719eb6f0de0SAdrian Chadd * This function walks the list of TIDs (ie, ath_node TIDs
5720eb6f0de0SAdrian Chadd * with queued traffic) and attempts to schedule traffic
5721eb6f0de0SAdrian Chadd * from them.
5722eb6f0de0SAdrian Chadd *
5723eb6f0de0SAdrian Chadd * TID scheduling is implemented as a FIFO, with TIDs being
5724eb6f0de0SAdrian Chadd * added to the end of the queue after some frames have been
5725eb6f0de0SAdrian Chadd * scheduled.
5726eb6f0de0SAdrian Chadd */
5727eb6f0de0SAdrian Chadd void
5728eb6f0de0SAdrian Chadd ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
5729eb6f0de0SAdrian Chadd {
5730eb6f0de0SAdrian Chadd struct ath_tid *tid, *next, *last;
5731eb6f0de0SAdrian Chadd
5732375307d4SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
5733eb6f0de0SAdrian Chadd
5734eb6f0de0SAdrian Chadd /*
573557af292dSAdrian Chadd * For non-EDMA chips, aggr frames that have been built are
573657af292dSAdrian Chadd * in axq_aggr_depth, whether they've been scheduled or not.
573757af292dSAdrian Chadd * There's no FIFO, so txq->axq_depth is what's been scheduled
573857af292dSAdrian Chadd * to the hardware.
573972910f03SAdrian Chadd *
574057af292dSAdrian Chadd * For EDMA chips, we do it in two stages. The existing code
574157af292dSAdrian Chadd * builds a list of frames to go to the hardware and the EDMA
574257af292dSAdrian Chadd * code turns it into a single entry to push into the FIFO.
574357af292dSAdrian Chadd * That way we don't take up one packet per FIFO slot.
574457af292dSAdrian Chadd * We do push one aggregate per FIFO slot though, just to keep
574557af292dSAdrian Chadd * things simple.
574657af292dSAdrian Chadd *
574757af292dSAdrian Chadd * The FIFO depth is what's in the hardware; the txq->axq_depth
574857af292dSAdrian Chadd * is what's been scheduled to the FIFO.
574957af292dSAdrian Chadd *
575057af292dSAdrian Chadd * fifo.axq_depth is the number of frames (or aggregates) pushed
575157af292dSAdrian Chadd * into the EDMA FIFO. For multi-frame lists, this is the number
575257af292dSAdrian Chadd * of frames pushed in.
575357af292dSAdrian Chadd * axq_fifo_depth is the number of FIFO slots currently busy.
5754eb6f0de0SAdrian Chadd */
575557af292dSAdrian Chadd
575657af292dSAdrian Chadd /* For EDMA and non-EDMA, check built/scheduled against aggr limit */
575757af292dSAdrian Chadd if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr) {
575872910f03SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++;
575972910f03SAdrian Chadd return;
576072910f03SAdrian Chadd }
576157af292dSAdrian Chadd
576257af292dSAdrian Chadd /*
576357af292dSAdrian Chadd * For non-EDMA chips, axq_depth is the "what's scheduled to
576457af292dSAdrian Chadd * the hardware list". For EDMA it's "What's built for the hardware"
576557af292dSAdrian Chadd * and fifo.axq_depth is how many frames have been dispatched
576657af292dSAdrian Chadd * already to the hardware.
576757af292dSAdrian Chadd */
576857af292dSAdrian Chadd if (txq->axq_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_nonaggr) {
5769eb6f0de0SAdrian Chadd sc->sc_aggr_stats.aggr_sched_nopkt++;
5770eb6f0de0SAdrian Chadd return;
5771eb6f0de0SAdrian Chadd }
5772eb6f0de0SAdrian Chadd
5773eb6f0de0SAdrian Chadd last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
5774eb6f0de0SAdrian Chadd
5775eb6f0de0SAdrian Chadd TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
5776eb6f0de0SAdrian Chadd /*
5777eb6f0de0SAdrian Chadd * Suspend paused queues here; they'll be resumed
5778eb6f0de0SAdrian Chadd * once the addba completes or times out.
5779eb6f0de0SAdrian Chadd */
5780eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
5781eb6f0de0SAdrian Chadd __func__, tid->tid, tid->paused);
5782eb6f0de0SAdrian Chadd ath_tx_tid_unsched(sc, tid);
578322a3aee6SAdrian Chadd /*
578422a3aee6SAdrian Chadd * This node may be in power-save and we're leaking
578522a3aee6SAdrian Chadd * a frame; be careful.
578622a3aee6SAdrian Chadd */
578722a3aee6SAdrian Chadd if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
57888ec9220eSAdrian Chadd goto loop_done;
5789eb6f0de0SAdrian Chadd }
5790eb6f0de0SAdrian Chadd if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
5791eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
5792eb6f0de0SAdrian Chadd else
5793eb6f0de0SAdrian Chadd ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
5794eb6f0de0SAdrian Chadd
5795eb6f0de0SAdrian Chadd /* Not empty? Re-schedule */
5796eb6f0de0SAdrian Chadd if (tid->axq_depth != 0)
5797eb6f0de0SAdrian Chadd ath_tx_tid_sched(sc, tid);
5798eb6f0de0SAdrian Chadd
5799b45a991eSAdrian Chadd /*
5800b45a991eSAdrian Chadd * Give the software queue time to aggregate more
5801b45a991eSAdrian Chadd * packets. If we aren't running aggregation then
5802b45a991eSAdrian Chadd * we should still limit the hardware queue depth.
5803b45a991eSAdrian Chadd */
580472910f03SAdrian Chadd /* XXX TXQ locking */
580572910f03SAdrian Chadd if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) {
580672910f03SAdrian Chadd break;
580772910f03SAdrian Chadd }
580872910f03SAdrian Chadd if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) {
5809eb6f0de0SAdrian Chadd break;
5810eb6f0de0SAdrian Chadd }
58118ec9220eSAdrian Chadd loop_done:
5812eb6f0de0SAdrian Chadd /*
5813eb6f0de0SAdrian Chadd * If this was the last entry on the original list, stop.
5814eb6f0de0SAdrian Chadd * Otherwise nodes that have been rescheduled onto the end
5815eb6f0de0SAdrian Chadd * of the TID FIFO list will just keep being rescheduled.
581622a3aee6SAdrian Chadd *
581722a3aee6SAdrian Chadd * XXX What should we do about nodes that were paused
581822a3aee6SAdrian Chadd * but are pending a leaking frame in response to a ps-poll?
581922a3aee6SAdrian Chadd * They'll be put at the front of the list; so they'll
582022a3aee6SAdrian Chadd * prematurely trigger this condition! Ew.
5821eb6f0de0SAdrian Chadd */
5822eb6f0de0SAdrian Chadd if (tid == last)
5823eb6f0de0SAdrian Chadd break;
5824eb6f0de0SAdrian Chadd }
5825eb6f0de0SAdrian Chadd }
5826eb6f0de0SAdrian Chadd
5827eb6f0de0SAdrian Chadd /*
5828eb6f0de0SAdrian Chadd * TX addba handling
5829eb6f0de0SAdrian Chadd */
5830eb6f0de0SAdrian Chadd
5831eb6f0de0SAdrian Chadd /*
5832eb6f0de0SAdrian Chadd * Return net80211 TID struct pointer, or NULL for none
5833eb6f0de0SAdrian Chadd */
5834eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *
5835eb6f0de0SAdrian Chadd ath_tx_get_tx_tid(struct ath_node *an, int tid)
5836eb6f0de0SAdrian Chadd {
5837eb6f0de0SAdrian Chadd struct ieee80211_node *ni = &an->an_node;
5838eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
5839eb6f0de0SAdrian Chadd
5840eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID)
5841eb6f0de0SAdrian Chadd return NULL;
5842eb6f0de0SAdrian Chadd
58432aa563dfSAdrian Chadd tap = &ni->ni_tx_ampdu[tid];
5844eb6f0de0SAdrian Chadd return tap;
5845eb6f0de0SAdrian Chadd }
5846eb6f0de0SAdrian Chadd
5847eb6f0de0SAdrian Chadd /*
5848eb6f0de0SAdrian Chadd * Is AMPDU-TX running?
5849eb6f0de0SAdrian Chadd */
5850eb6f0de0SAdrian Chadd static int
5851eb6f0de0SAdrian Chadd ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
5852eb6f0de0SAdrian Chadd {
5853eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
5854eb6f0de0SAdrian Chadd
5855eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID)
5856eb6f0de0SAdrian Chadd return 0;
5857eb6f0de0SAdrian Chadd
5858eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid);
5859eb6f0de0SAdrian Chadd if (tap == NULL)
5860eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not running */
5861eb6f0de0SAdrian Chadd
5862eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
5863eb6f0de0SAdrian Chadd }
5864eb6f0de0SAdrian Chadd
5865eb6f0de0SAdrian Chadd /*
5866eb6f0de0SAdrian Chadd * Is AMPDU-TX negotiation pending?
5867eb6f0de0SAdrian Chadd */
5868eb6f0de0SAdrian Chadd static int
5869eb6f0de0SAdrian Chadd ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
5870eb6f0de0SAdrian Chadd {
5871eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap;
5872eb6f0de0SAdrian Chadd
5873eb6f0de0SAdrian Chadd if (tid == IEEE80211_NONQOS_TID)
5874eb6f0de0SAdrian Chadd return 0;
5875eb6f0de0SAdrian Chadd
5876eb6f0de0SAdrian Chadd tap = ath_tx_get_tx_tid(an, tid);
5877eb6f0de0SAdrian Chadd if (tap == NULL)
5878eb6f0de0SAdrian Chadd return 0; /* Not valid; default to not pending */
5879eb6f0de0SAdrian Chadd
5880eb6f0de0SAdrian Chadd return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
5881eb6f0de0SAdrian Chadd }
5882eb6f0de0SAdrian Chadd
5883eb6f0de0SAdrian Chadd /*
5884eb6f0de0SAdrian Chadd * Is AMPDU-TX pending for the given TID?
5885eb6f0de0SAdrian Chadd */
5886eb6f0de0SAdrian Chadd
5887eb6f0de0SAdrian Chadd /*
5888eb6f0de0SAdrian Chadd * Method to handle sending an ADDBA request.
5889eb6f0de0SAdrian Chadd *
5890eb6f0de0SAdrian Chadd * We tap this so the relevant flags can be set to pause the TID
5891eb6f0de0SAdrian Chadd * whilst waiting for the response.
5892eb6f0de0SAdrian Chadd *
5893eb6f0de0SAdrian Chadd * XXX there's no timeout handler we can override?
5894eb6f0de0SAdrian Chadd */
5895eb6f0de0SAdrian Chadd int
5896eb6f0de0SAdrian Chadd ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5897eb6f0de0SAdrian Chadd int dialogtoken, int baparamset, int batimeout)
5898eb6f0de0SAdrian Chadd {
58993797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc;
59002aa563dfSAdrian Chadd int tid = tap->txa_tid;
5901eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
5902eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
5903eb6f0de0SAdrian Chadd
5904eb6f0de0SAdrian Chadd /*
5905eb6f0de0SAdrian Chadd * XXX danger Will Robinson!
5906eb6f0de0SAdrian Chadd *
5907eb6f0de0SAdrian Chadd * Although the taskqueue may be running and scheduling some more
5908eb6f0de0SAdrian Chadd * packets, these should all be _before_ the addba sequence number.
5909eb6f0de0SAdrian Chadd * However, net80211 will keep self-assigning sequence numbers
5910eb6f0de0SAdrian Chadd * until addba has been negotiated.
5911eb6f0de0SAdrian Chadd *
5912eb6f0de0SAdrian Chadd * In the past, these packets would be "paused" (which still works
5913eb6f0de0SAdrian Chadd * fine, as they're being scheduled to the driver in the same
5914eb6f0de0SAdrian Chadd * serialised method which is calling the addba request routine)
5915eb6f0de0SAdrian Chadd * and when the aggregation session begins, they'll be dequeued
5916eb6f0de0SAdrian Chadd * as aggregate packets and added to the BAW. However, now there's
5917eb6f0de0SAdrian Chadd * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
5918eb6f0de0SAdrian Chadd * packets. Thus they never get included in the BAW tracking and
5919eb6f0de0SAdrian Chadd * this can cause the initial burst of packets after the addba
5920eb6f0de0SAdrian Chadd * negotiation to "hang", as they quickly fall outside the BAW.
5921eb6f0de0SAdrian Chadd *
5922eb6f0de0SAdrian Chadd * The "eventual" solution should be to tag these packets with
5923eb6f0de0SAdrian Chadd * dobaw. Although net80211 has given us a sequence number,
5924eb6f0de0SAdrian Chadd * it'll be "after" the left edge of the BAW and thus it'll
5925eb6f0de0SAdrian Chadd * fall within it.
5926eb6f0de0SAdrian Chadd */
5927375307d4SAdrian Chadd ATH_TX_LOCK(sc);
5928d3a6425bSAdrian Chadd /*
5929d3a6425bSAdrian Chadd * This is a bit annoying. Until net80211 HT code inherits some
5930d3a6425bSAdrian Chadd * (any) locking, we may have this called in parallel BUT only
5931d3a6425bSAdrian Chadd * one response/timeout will be called. Grr.
5932d3a6425bSAdrian Chadd */
5933d3a6425bSAdrian Chadd if (atid->addba_tx_pending == 0) {
5934eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid);
5935d3a6425bSAdrian Chadd atid->addba_tx_pending = 1;
5936d3a6425bSAdrian Chadd }
5937375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
5938eb6f0de0SAdrian Chadd
5939eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
59409b48fb4bSAdrian Chadd "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
59419b48fb4bSAdrian Chadd __func__,
59429b48fb4bSAdrian Chadd ni->ni_macaddr,
59439b48fb4bSAdrian Chadd ":",
59449b48fb4bSAdrian Chadd dialogtoken, baparamset, batimeout);
5945eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5946eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n",
5947eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]);
5948eb6f0de0SAdrian Chadd
5949eb6f0de0SAdrian Chadd return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
5950eb6f0de0SAdrian Chadd batimeout);
5951eb6f0de0SAdrian Chadd }
5952eb6f0de0SAdrian Chadd
5953eb6f0de0SAdrian Chadd /*
5954eb6f0de0SAdrian Chadd * Handle an ADDBA response.
5955eb6f0de0SAdrian Chadd *
5956eb6f0de0SAdrian Chadd * We unpause the queue so TX'ing can resume.
5957eb6f0de0SAdrian Chadd *
5958eb6f0de0SAdrian Chadd * Any packets TX'ed from this point should be "aggregate" (whether
5959eb6f0de0SAdrian Chadd * aggregate or not) so the BAW is updated.
5960eb6f0de0SAdrian Chadd *
5961eb6f0de0SAdrian Chadd * Note! net80211 keeps self-assigning sequence numbers until
5962eb6f0de0SAdrian Chadd * ampdu is negotiated. This means the initially-negotiated BAW left
5963eb6f0de0SAdrian Chadd * edge won't match the ni->ni_txseq.
5964eb6f0de0SAdrian Chadd *
5965eb6f0de0SAdrian Chadd * So, being very dirty, the BAW left edge is "slid" here to match
5966eb6f0de0SAdrian Chadd * ni->ni_txseq.
5967eb6f0de0SAdrian Chadd *
5968eb6f0de0SAdrian Chadd * What likely SHOULD happen is that all packets subsequent to the
5969eb6f0de0SAdrian Chadd * addba request should be tagged as aggregate and queued as non-aggregate
5970eb6f0de0SAdrian Chadd * frames; thus updating the BAW. For now though, I'll just slide the
5971eb6f0de0SAdrian Chadd * window.
5972eb6f0de0SAdrian Chadd */
5973eb6f0de0SAdrian Chadd int
5974eb6f0de0SAdrian Chadd ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5975eb6f0de0SAdrian Chadd int status, int code, int batimeout)
5976eb6f0de0SAdrian Chadd {
59773797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc;
59782aa563dfSAdrian Chadd int tid = tap->txa_tid;
5979eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
5980eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
5981eb6f0de0SAdrian Chadd int r;
5982eb6f0de0SAdrian Chadd
5983eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
59849b48fb4bSAdrian Chadd "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__,
59859b48fb4bSAdrian Chadd ni->ni_macaddr,
59869b48fb4bSAdrian Chadd ":",
5987eb6f0de0SAdrian Chadd status, code, batimeout);
5988eb6f0de0SAdrian Chadd
5989eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5990eb6f0de0SAdrian Chadd "%s: txa_start=%d, ni_txseqs=%d\n",
5991eb6f0de0SAdrian Chadd __func__, tap->txa_start, ni->ni_txseqs[tid]);
5992eb6f0de0SAdrian Chadd
5993eb6f0de0SAdrian Chadd /*
5994eb6f0de0SAdrian Chadd * Call this first, so the interface flags get updated
5995eb6f0de0SAdrian Chadd * before the TID is unpaused. Otherwise a race condition
5996eb6f0de0SAdrian Chadd * exists where the unpaused TID still doesn't yet have
5997eb6f0de0SAdrian Chadd * IEEE80211_AGGR_RUNNING set.
5998eb6f0de0SAdrian Chadd */
5999eb6f0de0SAdrian Chadd r = sc->sc_addba_response(ni, tap, status, code, batimeout);
6000eb6f0de0SAdrian Chadd
6001375307d4SAdrian Chadd ATH_TX_LOCK(sc);
6002d3a6425bSAdrian Chadd atid->addba_tx_pending = 0;
6003eb6f0de0SAdrian Chadd /*
6004eb6f0de0SAdrian Chadd * XXX dirty!
6005eb6f0de0SAdrian Chadd * Slide the BAW left edge to wherever net80211 left it for us.
6006eb6f0de0SAdrian Chadd * Read above for more information.
6007eb6f0de0SAdrian Chadd */
6008eb6f0de0SAdrian Chadd tap->txa_start = ni->ni_txseqs[tid];
6009eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid);
6010375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
6011eb6f0de0SAdrian Chadd return r;
6012eb6f0de0SAdrian Chadd }
6013eb6f0de0SAdrian Chadd
6014eb6f0de0SAdrian Chadd /*
6015eb6f0de0SAdrian Chadd * Stop ADDBA on a queue.
60168405fe86SAdrian Chadd *
60178405fe86SAdrian Chadd * This can be called whilst BAR TX is currently active on the queue,
60188405fe86SAdrian Chadd * so make sure this is unblocked before continuing.
6019eb6f0de0SAdrian Chadd */
6020eb6f0de0SAdrian Chadd void
6021eb6f0de0SAdrian Chadd ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
6022eb6f0de0SAdrian Chadd {
60233797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc;
60242aa563dfSAdrian Chadd int tid = tap->txa_tid;
6025eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
6026eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
602722780332SAdrian Chadd ath_bufhead bf_cq;
602822780332SAdrian Chadd struct ath_buf *bf;
6029eb6f0de0SAdrian Chadd
60309b48fb4bSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n",
60319b48fb4bSAdrian Chadd __func__,
60329b48fb4bSAdrian Chadd ni->ni_macaddr,
60339b48fb4bSAdrian Chadd ":");
6034eb6f0de0SAdrian Chadd
60358405fe86SAdrian Chadd /*
60368405fe86SAdrian Chadd * Pause TID traffic early, so there aren't any races
60378405fe86SAdrian Chadd * Unblock the pending BAR held traffic, if it's currently paused.
60388405fe86SAdrian Chadd */
6039375307d4SAdrian Chadd ATH_TX_LOCK(sc);
6040eb6f0de0SAdrian Chadd ath_tx_tid_pause(sc, atid);
60418405fe86SAdrian Chadd if (atid->bar_wait) {
60428405fe86SAdrian Chadd /*
60438405fe86SAdrian Chadd * bar_unsuspend() expects bar_tx == 1, as it should be
60448405fe86SAdrian Chadd * called from the TX completion path. This quietens
60458405fe86SAdrian Chadd * the warning. It's cleared for us anyway.
60468405fe86SAdrian Chadd */
60478405fe86SAdrian Chadd atid->bar_tx = 1;
60488405fe86SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid);
60498405fe86SAdrian Chadd }
6050375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
6051eb6f0de0SAdrian Chadd
6052eb6f0de0SAdrian Chadd /* There's no need to hold the TXQ lock here */
6053eb6f0de0SAdrian Chadd sc->sc_addba_stop(ni, tap);
6054eb6f0de0SAdrian Chadd
6055eb6f0de0SAdrian Chadd /*
60564dfd4507SAdrian Chadd * ath_tx_tid_cleanup will resume the TID if possible, otherwise
6057eb6f0de0SAdrian Chadd * it'll set the cleanup flag, and it'll be unpaused once
6058eb6f0de0SAdrian Chadd * things have been cleaned up.
6059eb6f0de0SAdrian Chadd */
606022780332SAdrian Chadd TAILQ_INIT(&bf_cq);
606122780332SAdrian Chadd ATH_TX_LOCK(sc);
606259fbb530SAdrian Chadd
606359fbb530SAdrian Chadd /*
606459fbb530SAdrian Chadd * In case there's a followup call to this, only call it
606559fbb530SAdrian Chadd * if we don't have a cleanup in progress.
606659fbb530SAdrian Chadd *
606759fbb530SAdrian Chadd * Since we've paused the queue above, we need to make
606859fbb530SAdrian Chadd * sure we unpause if there's already a cleanup in
606959fbb530SAdrian Chadd * progress - it means something else is also doing
607059fbb530SAdrian Chadd * this stuff, so we don't need to also keep it paused.
607159fbb530SAdrian Chadd */
607259fbb530SAdrian Chadd if (atid->cleanup_inprogress) {
607359fbb530SAdrian Chadd ath_tx_tid_resume(sc, atid);
607459fbb530SAdrian Chadd } else {
607522780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, tid, &bf_cq);
60765da3fc10SAdrian Chadd /*
60775da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required.
60785da3fc10SAdrian Chadd */
60795da3fc10SAdrian Chadd if (! atid->cleanup_inprogress)
60805da3fc10SAdrian Chadd ath_tx_tid_resume(sc, atid);
608159fbb530SAdrian Chadd }
608222780332SAdrian Chadd ATH_TX_UNLOCK(sc);
608322780332SAdrian Chadd
608422780332SAdrian Chadd /* Handle completing frames and fail them */
608522780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
608622780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list);
608722780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1);
608822780332SAdrian Chadd }
608922a3aee6SAdrian Chadd
609022780332SAdrian Chadd }
609122780332SAdrian Chadd
609222780332SAdrian Chadd /*
609322780332SAdrian Chadd * Handle a node reassociation.
609422780332SAdrian Chadd *
609522780332SAdrian Chadd * We may have a bunch of frames queued to the hardware; those need
609622780332SAdrian Chadd * to be marked as cleanup.
609722780332SAdrian Chadd */
609822780332SAdrian Chadd void
609922780332SAdrian Chadd ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an)
610022780332SAdrian Chadd {
610122780332SAdrian Chadd struct ath_tid *tid;
610222780332SAdrian Chadd int i;
610322780332SAdrian Chadd ath_bufhead bf_cq;
610422780332SAdrian Chadd struct ath_buf *bf;
610522780332SAdrian Chadd
610622780332SAdrian Chadd TAILQ_INIT(&bf_cq);
610722780332SAdrian Chadd
610822780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc);
610922780332SAdrian Chadd
611022780332SAdrian Chadd ATH_TX_LOCK(sc);
611122780332SAdrian Chadd for (i = 0; i < IEEE80211_TID_SIZE; i++) {
611222780332SAdrian Chadd tid = &an->an_tid[i];
611322780332SAdrian Chadd if (tid->hwq_depth == 0)
611422780332SAdrian Chadd continue;
611522780332SAdrian Chadd DPRINTF(sc, ATH_DEBUG_NODE,
611622780332SAdrian Chadd "%s: %6D: TID %d: cleaning up TID\n",
611722780332SAdrian Chadd __func__,
611822780332SAdrian Chadd an->an_node.ni_macaddr,
611922780332SAdrian Chadd ":",
612022780332SAdrian Chadd i);
612159fbb530SAdrian Chadd /*
612259fbb530SAdrian Chadd * In case there's a followup call to this, only call it
612359fbb530SAdrian Chadd * if we don't have a cleanup in progress.
612459fbb530SAdrian Chadd */
612559fbb530SAdrian Chadd if (! tid->cleanup_inprogress) {
612659fbb530SAdrian Chadd ath_tx_tid_pause(sc, tid);
612722780332SAdrian Chadd ath_tx_tid_cleanup(sc, an, i, &bf_cq);
61285da3fc10SAdrian Chadd /*
61295da3fc10SAdrian Chadd * Unpause the TID if no cleanup is required.
61305da3fc10SAdrian Chadd */
61315da3fc10SAdrian Chadd if (! tid->cleanup_inprogress)
61325da3fc10SAdrian Chadd ath_tx_tid_resume(sc, tid);
613322780332SAdrian Chadd }
613459fbb530SAdrian Chadd }
613522780332SAdrian Chadd ATH_TX_UNLOCK(sc);
613622780332SAdrian Chadd
613722780332SAdrian Chadd /* Handle completing frames and fail them */
613822780332SAdrian Chadd while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
613922780332SAdrian Chadd TAILQ_REMOVE(&bf_cq, bf, bf_list);
614022780332SAdrian Chadd ath_tx_default_comp(sc, bf, 1);
614122780332SAdrian Chadd }
6142eb6f0de0SAdrian Chadd }
6143eb6f0de0SAdrian Chadd
6144eb6f0de0SAdrian Chadd /*
6145eb6f0de0SAdrian Chadd * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
6146eb6f0de0SAdrian Chadd * it simply tears down the aggregation session. Ew.
6147eb6f0de0SAdrian Chadd *
6148eb6f0de0SAdrian Chadd * It however will call ieee80211_ampdu_stop() which will call
6149eb6f0de0SAdrian Chadd * ic->ic_addba_stop().
6150eb6f0de0SAdrian Chadd *
6151eb6f0de0SAdrian Chadd * XXX This uses a hard-coded max BAR count value; the whole
6152eb6f0de0SAdrian Chadd * XXX BAR TX success or failure should be better handled!
6153eb6f0de0SAdrian Chadd */
6154eb6f0de0SAdrian Chadd void
6155eb6f0de0SAdrian Chadd ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
6156eb6f0de0SAdrian Chadd int status)
6157eb6f0de0SAdrian Chadd {
61583797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc;
61592aa563dfSAdrian Chadd int tid = tap->txa_tid;
6160eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
6161eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
6162eb6f0de0SAdrian Chadd int attempts = tap->txa_attempts;
616342fdd8e7SAdrian Chadd int old_txa_start;
6164eb6f0de0SAdrian Chadd
61650e22ed0eSAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
616642fdd8e7SAdrian Chadd "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n",
61670e22ed0eSAdrian Chadd __func__,
61689b48fb4bSAdrian Chadd ni->ni_macaddr,
61699b48fb4bSAdrian Chadd ":",
6170e60c4fc2SAdrian Chadd tap->txa_tid,
6171e60c4fc2SAdrian Chadd atid->tid,
61720e22ed0eSAdrian Chadd status,
617342fdd8e7SAdrian Chadd attempts,
617442fdd8e7SAdrian Chadd tap->txa_start,
617542fdd8e7SAdrian Chadd tap->txa_seqpending);
6176eb6f0de0SAdrian Chadd
6177eb6f0de0SAdrian Chadd /* Note: This may update the BAW details */
617842fdd8e7SAdrian Chadd /*
617942fdd8e7SAdrian Chadd * XXX What if this does slide the BAW along? We need to somehow
618042fdd8e7SAdrian Chadd * XXX either fix things when it does happen, or prevent the
618142fdd8e7SAdrian Chadd * XXX seqpending value to be anything other than exactly what
618242fdd8e7SAdrian Chadd * XXX the hell we want!
618342fdd8e7SAdrian Chadd *
618442fdd8e7SAdrian Chadd * XXX So for now, how I do this inside the TX lock for now
618542fdd8e7SAdrian Chadd * XXX and just correct it afterwards? The below condition should
618642fdd8e7SAdrian Chadd * XXX never happen and if it does I need to fix all kinds of things.
618742fdd8e7SAdrian Chadd */
618842fdd8e7SAdrian Chadd ATH_TX_LOCK(sc);
618942fdd8e7SAdrian Chadd old_txa_start = tap->txa_start;
6190eb6f0de0SAdrian Chadd sc->sc_bar_response(ni, tap, status);
619142fdd8e7SAdrian Chadd if (tap->txa_start != old_txa_start) {
619242fdd8e7SAdrian Chadd device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n",
619342fdd8e7SAdrian Chadd __func__,
619442fdd8e7SAdrian Chadd tid,
619542fdd8e7SAdrian Chadd tap->txa_start,
619642fdd8e7SAdrian Chadd old_txa_start);
619742fdd8e7SAdrian Chadd }
619842fdd8e7SAdrian Chadd tap->txa_start = old_txa_start;
619942fdd8e7SAdrian Chadd ATH_TX_UNLOCK(sc);
6200eb6f0de0SAdrian Chadd
6201eb6f0de0SAdrian Chadd /* Unpause the TID */
6202eb6f0de0SAdrian Chadd /*
6203eb6f0de0SAdrian Chadd * XXX if this is attempt=50, the TID will be downgraded
6204eb6f0de0SAdrian Chadd * XXX to a non-aggregate session. So we must unpause the
6205eb6f0de0SAdrian Chadd * XXX TID here or it'll never be done.
6206088d8b81SAdrian Chadd *
6207088d8b81SAdrian Chadd * Also, don't call it if bar_tx/bar_wait are 0; something
6208088d8b81SAdrian Chadd * has beaten us to the punch? (XXX figure out what?)
6209eb6f0de0SAdrian Chadd */
6210eb6f0de0SAdrian Chadd if (status == 0 || attempts == 50) {
6211375307d4SAdrian Chadd ATH_TX_LOCK(sc);
6212088d8b81SAdrian Chadd if (atid->bar_tx == 0 || atid->bar_wait == 0)
621383bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
6214088d8b81SAdrian Chadd "%s: huh? bar_tx=%d, bar_wait=%d\n",
6215088d8b81SAdrian Chadd __func__,
6216088d8b81SAdrian Chadd atid->bar_tx, atid->bar_wait);
6217088d8b81SAdrian Chadd else
621888b3d483SAdrian Chadd ath_tx_tid_bar_unsuspend(sc, atid);
6219375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
6220eb6f0de0SAdrian Chadd }
6221eb6f0de0SAdrian Chadd }
6222eb6f0de0SAdrian Chadd
6223eb6f0de0SAdrian Chadd /*
6224eb6f0de0SAdrian Chadd * This is called whenever the pending ADDBA request times out.
6225eb6f0de0SAdrian Chadd * Unpause and reschedule the TID.
6226eb6f0de0SAdrian Chadd */
6227eb6f0de0SAdrian Chadd void
6228eb6f0de0SAdrian Chadd ath_addba_response_timeout(struct ieee80211_node *ni,
6229eb6f0de0SAdrian Chadd struct ieee80211_tx_ampdu *tap)
6230eb6f0de0SAdrian Chadd {
62313797bf08SAdrian Chadd struct ath_softc *sc = ni->ni_ic->ic_softc;
62322aa563dfSAdrian Chadd int tid = tap->txa_tid;
6233eb6f0de0SAdrian Chadd struct ath_node *an = ATH_NODE(ni);
6234eb6f0de0SAdrian Chadd struct ath_tid *atid = &an->an_tid[tid];
6235eb6f0de0SAdrian Chadd
6236eb6f0de0SAdrian Chadd DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
62376d07d3e0SAdrian Chadd "%s: %6D: TID=%d, called; resuming\n",
62389b48fb4bSAdrian Chadd __func__,
62399b48fb4bSAdrian Chadd ni->ni_macaddr,
62406d07d3e0SAdrian Chadd ":",
62416d07d3e0SAdrian Chadd tid);
6242eb6f0de0SAdrian Chadd
6243375307d4SAdrian Chadd ATH_TX_LOCK(sc);
6244d3a6425bSAdrian Chadd atid->addba_tx_pending = 0;
6245375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
6246d3a6425bSAdrian Chadd
6247eb6f0de0SAdrian Chadd /* Note: This updates the aggregate state to (again) pending */
6248eb6f0de0SAdrian Chadd sc->sc_addba_response_timeout(ni, tap);
6249eb6f0de0SAdrian Chadd
6250eb6f0de0SAdrian Chadd /* Unpause the TID; which reschedules it */
6251375307d4SAdrian Chadd ATH_TX_LOCK(sc);
6252eb6f0de0SAdrian Chadd ath_tx_tid_resume(sc, atid);
6253375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
6254eb6f0de0SAdrian Chadd }
62553fdfc330SAdrian Chadd
62560eb81626SAdrian Chadd /*
62570eb81626SAdrian Chadd * Check if a node is asleep or not.
62580eb81626SAdrian Chadd */
6259548a605dSAdrian Chadd int
62600eb81626SAdrian Chadd ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an)
62610eb81626SAdrian Chadd {
62620eb81626SAdrian Chadd
626322780332SAdrian Chadd ATH_TX_LOCK_ASSERT(sc);
62640eb81626SAdrian Chadd
62650eb81626SAdrian Chadd return (an->an_is_powersave);
62660eb81626SAdrian Chadd }
62670eb81626SAdrian Chadd
62680eb81626SAdrian Chadd /*
62690eb81626SAdrian Chadd * Mark a node as currently "in powersaving."
62700eb81626SAdrian Chadd * This suspends all traffic on the node.
62710eb81626SAdrian Chadd *
62720eb81626SAdrian Chadd * This must be called with the node/tx locks free.
62730eb81626SAdrian Chadd *
62740eb81626SAdrian Chadd * XXX TODO: the locking silliness below is due to how the node
62750eb81626SAdrian Chadd * locking currently works. Right now, the node lock is grabbed
62760eb81626SAdrian Chadd * to do rate control lookups and these are done with the TX
62770eb81626SAdrian Chadd * queue lock held. This means the node lock can't be grabbed
62780eb81626SAdrian Chadd * first here or a LOR will occur.
62790eb81626SAdrian Chadd *
62800eb81626SAdrian Chadd * Eventually (hopefully!) the TX path code will only grab
62810eb81626SAdrian Chadd * the TXQ lock when transmitting and the ath_node lock when
62820eb81626SAdrian Chadd * doing node/TID operations. There are other complications -
62830eb81626SAdrian Chadd * the sched/unsched operations involve walking the per-txq
62840eb81626SAdrian Chadd * 'active tid' list and this requires both locks to be held.
62850eb81626SAdrian Chadd */
62860eb81626SAdrian Chadd void
62870eb81626SAdrian Chadd ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an)
62880eb81626SAdrian Chadd {
62890eb81626SAdrian Chadd struct ath_tid *atid;
62900eb81626SAdrian Chadd struct ath_txq *txq;
62910eb81626SAdrian Chadd int tid;
62920eb81626SAdrian Chadd
629322780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc);
62940eb81626SAdrian Chadd
62950eb81626SAdrian Chadd /* Suspend all traffic on the node */
6296375307d4SAdrian Chadd ATH_TX_LOCK(sc);
629722a3aee6SAdrian Chadd
629822a3aee6SAdrian Chadd if (an->an_is_powersave) {
629983bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
630022a3aee6SAdrian Chadd "%s: %6D: node was already asleep!\n",
630183bbd5ebSRui Paulo __func__, an->an_node.ni_macaddr, ":");
630222a3aee6SAdrian Chadd ATH_TX_UNLOCK(sc);
630322a3aee6SAdrian Chadd return;
630422a3aee6SAdrian Chadd }
630522a3aee6SAdrian Chadd
63060eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
63070eb81626SAdrian Chadd atid = &an->an_tid[tid];
63080eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac];
63090eb81626SAdrian Chadd
63100eb81626SAdrian Chadd ath_tx_tid_pause(sc, atid);
63110eb81626SAdrian Chadd }
63120eb81626SAdrian Chadd
63130eb81626SAdrian Chadd /* Mark node as in powersaving */
63140eb81626SAdrian Chadd an->an_is_powersave = 1;
63150eb81626SAdrian Chadd
631622780332SAdrian Chadd ATH_TX_UNLOCK(sc);
63170eb81626SAdrian Chadd }
63180eb81626SAdrian Chadd
63190eb81626SAdrian Chadd /*
63200eb81626SAdrian Chadd * Mark a node as currently "awake."
63210eb81626SAdrian Chadd * This resumes all traffic to the node.
63220eb81626SAdrian Chadd */
63230eb81626SAdrian Chadd void
63240eb81626SAdrian Chadd ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an)
63250eb81626SAdrian Chadd {
63260eb81626SAdrian Chadd struct ath_tid *atid;
63270eb81626SAdrian Chadd struct ath_txq *txq;
63280eb81626SAdrian Chadd int tid;
63290eb81626SAdrian Chadd
633022780332SAdrian Chadd ATH_TX_UNLOCK_ASSERT(sc);
633122780332SAdrian Chadd
633222780332SAdrian Chadd ATH_TX_LOCK(sc);
63330eb81626SAdrian Chadd
633422a3aee6SAdrian Chadd /* !? */
63350eb81626SAdrian Chadd if (an->an_is_powersave == 0) {
633622780332SAdrian Chadd ATH_TX_UNLOCK(sc);
633783bbd5ebSRui Paulo DPRINTF(sc, ATH_DEBUG_XMIT,
63380eb81626SAdrian Chadd "%s: an=%p: node was already awake\n",
63390eb81626SAdrian Chadd __func__, an);
63400eb81626SAdrian Chadd return;
63410eb81626SAdrian Chadd }
63420eb81626SAdrian Chadd
63430eb81626SAdrian Chadd /* Mark node as awake */
63440eb81626SAdrian Chadd an->an_is_powersave = 0;
634522a3aee6SAdrian Chadd /*
634622a3aee6SAdrian Chadd * Clear any pending leaked frame requests
634722a3aee6SAdrian Chadd */
634822a3aee6SAdrian Chadd an->an_leak_count = 0;
63490eb81626SAdrian Chadd
63500eb81626SAdrian Chadd for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
63510eb81626SAdrian Chadd atid = &an->an_tid[tid];
63520eb81626SAdrian Chadd txq = sc->sc_ac2q[atid->ac];
63530eb81626SAdrian Chadd
63540eb81626SAdrian Chadd ath_tx_tid_resume(sc, atid);
63550eb81626SAdrian Chadd }
6356375307d4SAdrian Chadd ATH_TX_UNLOCK(sc);
63570eb81626SAdrian Chadd }
63580eb81626SAdrian Chadd
63593fdfc330SAdrian Chadd static int
63603fdfc330SAdrian Chadd ath_legacy_dma_txsetup(struct ath_softc *sc)
63613fdfc330SAdrian Chadd {
63623fdfc330SAdrian Chadd
63633fdfc330SAdrian Chadd /* nothing new needed */
63643fdfc330SAdrian Chadd return (0);
63653fdfc330SAdrian Chadd }
63663fdfc330SAdrian Chadd
63673fdfc330SAdrian Chadd static int
63683fdfc330SAdrian Chadd ath_legacy_dma_txteardown(struct ath_softc *sc)
63693fdfc330SAdrian Chadd {
63703fdfc330SAdrian Chadd
63713fdfc330SAdrian Chadd /* nothing new needed */
63723fdfc330SAdrian Chadd return (0);
63733fdfc330SAdrian Chadd }
63743fdfc330SAdrian Chadd
63753fdfc330SAdrian Chadd void
63763fdfc330SAdrian Chadd ath_xmit_setup_legacy(struct ath_softc *sc)
63773fdfc330SAdrian Chadd {
63781006fc0cSAdrian Chadd /*
63791006fc0cSAdrian Chadd * For now, just set the descriptor length to sizeof(ath_desc);
63801006fc0cSAdrian Chadd * worry about extracting the real length out of the HAL later.
63811006fc0cSAdrian Chadd */
63821006fc0cSAdrian Chadd sc->sc_tx_desclen = sizeof(struct ath_desc);
6383bb327d28SAdrian Chadd sc->sc_tx_statuslen = sizeof(struct ath_desc);
63841006fc0cSAdrian Chadd sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */
63853fdfc330SAdrian Chadd
63863fdfc330SAdrian Chadd sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
63873fdfc330SAdrian Chadd sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
6388f8418db5SAdrian Chadd sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func;
6389746bab5bSAdrian Chadd
6390746bab5bSAdrian Chadd sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
6391746bab5bSAdrian Chadd sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
6392788e6aa9SAdrian Chadd
6393788e6aa9SAdrian Chadd sc->sc_tx.xmit_drain = ath_legacy_tx_drain;
63943fdfc330SAdrian Chadd }
6395