1 /*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * Driver for the Atheros Wireless LAN controller. 35 * 36 * This software is derived from work of Atsushi Onoe; his contribution 37 * is greatly appreciated. 38 */ 39 40 #include "opt_inet.h" 41 #include "opt_ath.h" 42 #include "opt_wlan.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/sysctl.h> 47 #include <sys/mbuf.h> 48 #include <sys/malloc.h> 49 #include <sys/lock.h> 50 #include <sys/mutex.h> 51 #include <sys/kernel.h> 52 #include <sys/socket.h> 53 #include <sys/sockio.h> 54 #include <sys/errno.h> 55 #include <sys/callout.h> 56 #include <sys/bus.h> 57 #include <sys/endian.h> 58 #include <sys/kthread.h> 59 #include <sys/taskqueue.h> 60 #include <sys/priv.h> 61 62 #include <machine/bus.h> 63 64 #include <net/if.h> 65 #include <net/if_var.h> 66 #include <net/if_dl.h> 67 #include <net/if_media.h> 68 #include <net/if_types.h> 69 #include <net/if_arp.h> 70 #include <net/ethernet.h> 71 #include <net/if_llc.h> 72 73 #include <net80211/ieee80211_var.h> 74 #include <net80211/ieee80211_regdomain.h> 75 #ifdef IEEE80211_SUPPORT_SUPERG 76 #include <net80211/ieee80211_superg.h> 77 #endif 78 #ifdef IEEE80211_SUPPORT_TDMA 79 #include <net80211/ieee80211_tdma.h> 80 #endif 81 82 #include <net/bpf.h> 83 84 #ifdef INET 85 #include <netinet/in.h> 86 #include <netinet/if_ether.h> 87 #endif 88 89 #include <dev/ath/if_athvar.h> 90 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 91 #include <dev/ath/ath_hal/ah_diagcodes.h> 92 93 #include <dev/ath/if_ath_debug.h> 94 #include <dev/ath/if_ath_led.h> 95 #include <dev/ath/if_ath_misc.h> 96 #include <dev/ath/if_ath_tx.h> 97 #include <dev/ath/if_ath_sysctl.h> 98 99 #ifdef ATH_TX99_DIAG 100 #include <dev/ath/ath_tx99/ath_tx99.h> 101 #endif 102 103 #ifdef ATH_DEBUG_ALQ 104 #include <dev/ath/if_ath_alq.h> 105 #endif 106 107 static int 108 ath_sysctl_slottime(SYSCTL_HANDLER_ARGS) 109 { 110 struct ath_softc *sc = arg1; 111 u_int slottime = ath_hal_getslottime(sc->sc_ah); 112 int error; 113 114 error = sysctl_handle_int(oidp, &slottime, 0, req); 115 if (error || !req->newptr) 116 return error; 117 return !ath_hal_setslottime(sc->sc_ah, slottime) ? EINVAL : 0; 118 } 119 120 static int 121 ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS) 122 { 123 struct ath_softc *sc = arg1; 124 u_int acktimeout = ath_hal_getacktimeout(sc->sc_ah); 125 int error; 126 127 error = sysctl_handle_int(oidp, &acktimeout, 0, req); 128 if (error || !req->newptr) 129 return error; 130 return !ath_hal_setacktimeout(sc->sc_ah, acktimeout) ? EINVAL : 0; 131 } 132 133 static int 134 ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS) 135 { 136 struct ath_softc *sc = arg1; 137 u_int ctstimeout = ath_hal_getctstimeout(sc->sc_ah); 138 int error; 139 140 error = sysctl_handle_int(oidp, &ctstimeout, 0, req); 141 if (error || !req->newptr) 142 return error; 143 return !ath_hal_setctstimeout(sc->sc_ah, ctstimeout) ? EINVAL : 0; 144 } 145 146 static int 147 ath_sysctl_softled(SYSCTL_HANDLER_ARGS) 148 { 149 struct ath_softc *sc = arg1; 150 int softled = sc->sc_softled; 151 int error; 152 153 error = sysctl_handle_int(oidp, &softled, 0, req); 154 if (error || !req->newptr) 155 return error; 156 softled = (softled != 0); 157 if (softled != sc->sc_softled) { 158 if (softled) { 159 /* NB: handle any sc_ledpin change */ 160 ath_led_config(sc); 161 } 162 sc->sc_softled = softled; 163 } 164 return 0; 165 } 166 167 static int 168 ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS) 169 { 170 struct ath_softc *sc = arg1; 171 int ledpin = sc->sc_ledpin; 172 int error; 173 174 error = sysctl_handle_int(oidp, &ledpin, 0, req); 175 if (error || !req->newptr) 176 return error; 177 if (ledpin != sc->sc_ledpin) { 178 sc->sc_ledpin = ledpin; 179 if (sc->sc_softled) { 180 ath_led_config(sc); 181 } 182 } 183 return 0; 184 } 185 186 static int 187 ath_sysctl_hardled(SYSCTL_HANDLER_ARGS) 188 { 189 struct ath_softc *sc = arg1; 190 int hardled = sc->sc_hardled; 191 int error; 192 193 error = sysctl_handle_int(oidp, &hardled, 0, req); 194 if (error || !req->newptr) 195 return error; 196 hardled = (hardled != 0); 197 if (hardled != sc->sc_hardled) { 198 if (hardled) { 199 /* NB: handle any sc_ledpin change */ 200 ath_led_config(sc); 201 } 202 sc->sc_hardled = hardled; 203 } 204 return 0; 205 } 206 207 static int 208 ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS) 209 { 210 struct ath_softc *sc = arg1; 211 u_int txantenna = ath_hal_getantennaswitch(sc->sc_ah); 212 int error; 213 214 error = sysctl_handle_int(oidp, &txantenna, 0, req); 215 if (!error && req->newptr) { 216 /* XXX assumes 2 antenna ports */ 217 if (txantenna < HAL_ANT_VARIABLE || txantenna > HAL_ANT_FIXED_B) 218 return EINVAL; 219 ath_hal_setantennaswitch(sc->sc_ah, txantenna); 220 /* 221 * NB: with the switch locked this isn't meaningful, 222 * but set it anyway so things like radiotap get 223 * consistent info in their data. 224 */ 225 sc->sc_txantenna = txantenna; 226 } 227 return error; 228 } 229 230 static int 231 ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS) 232 { 233 struct ath_softc *sc = arg1; 234 u_int defantenna = ath_hal_getdefantenna(sc->sc_ah); 235 int error; 236 237 error = sysctl_handle_int(oidp, &defantenna, 0, req); 238 if (!error && req->newptr) 239 ath_hal_setdefantenna(sc->sc_ah, defantenna); 240 return error; 241 } 242 243 static int 244 ath_sysctl_diversity(SYSCTL_HANDLER_ARGS) 245 { 246 struct ath_softc *sc = arg1; 247 u_int diversity = ath_hal_getdiversity(sc->sc_ah); 248 int error; 249 250 error = sysctl_handle_int(oidp, &diversity, 0, req); 251 if (error || !req->newptr) 252 return error; 253 if (!ath_hal_setdiversity(sc->sc_ah, diversity)) 254 return EINVAL; 255 sc->sc_diversity = diversity; 256 return 0; 257 } 258 259 static int 260 ath_sysctl_diag(SYSCTL_HANDLER_ARGS) 261 { 262 struct ath_softc *sc = arg1; 263 u_int32_t diag; 264 int error; 265 266 if (!ath_hal_getdiag(sc->sc_ah, &diag)) 267 return EINVAL; 268 error = sysctl_handle_int(oidp, &diag, 0, req); 269 if (error || !req->newptr) 270 return error; 271 return !ath_hal_setdiag(sc->sc_ah, diag) ? EINVAL : 0; 272 } 273 274 static int 275 ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS) 276 { 277 struct ath_softc *sc = arg1; 278 struct ifnet *ifp = sc->sc_ifp; 279 u_int32_t scale; 280 int error; 281 282 (void) ath_hal_gettpscale(sc->sc_ah, &scale); 283 error = sysctl_handle_int(oidp, &scale, 0, req); 284 if (error || !req->newptr) 285 return error; 286 return !ath_hal_settpscale(sc->sc_ah, scale) ? EINVAL : 287 (ifp->if_drv_flags & IFF_DRV_RUNNING) ? 288 ath_reset(ifp, ATH_RESET_NOLOSS) : 0; 289 } 290 291 static int 292 ath_sysctl_tpc(SYSCTL_HANDLER_ARGS) 293 { 294 struct ath_softc *sc = arg1; 295 u_int tpc = ath_hal_gettpc(sc->sc_ah); 296 int error; 297 298 error = sysctl_handle_int(oidp, &tpc, 0, req); 299 if (error || !req->newptr) 300 return error; 301 return !ath_hal_settpc(sc->sc_ah, tpc) ? EINVAL : 0; 302 } 303 304 static int 305 ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS) 306 { 307 struct ath_softc *sc = arg1; 308 struct ifnet *ifp = sc->sc_ifp; 309 struct ath_hal *ah = sc->sc_ah; 310 u_int rfkill = ath_hal_getrfkill(ah); 311 int error; 312 313 error = sysctl_handle_int(oidp, &rfkill, 0, req); 314 if (error || !req->newptr) 315 return error; 316 if (rfkill == ath_hal_getrfkill(ah)) /* unchanged */ 317 return 0; 318 if (!ath_hal_setrfkill(ah, rfkill)) 319 return EINVAL; 320 return (ifp->if_drv_flags & IFF_DRV_RUNNING) ? 321 ath_reset(ifp, ATH_RESET_FULL) : 0; 322 } 323 324 static int 325 ath_sysctl_txagg(SYSCTL_HANDLER_ARGS) 326 { 327 struct ath_softc *sc = arg1; 328 int i, t, param = 0; 329 int error; 330 struct ath_buf *bf; 331 332 error = sysctl_handle_int(oidp, ¶m, 0, req); 333 if (error || !req->newptr) 334 return error; 335 336 if (param != 1) 337 return 0; 338 339 printf("no tx bufs (empty list): %d\n", sc->sc_stats.ast_tx_getnobuf); 340 printf("no tx bufs (was busy): %d\n", sc->sc_stats.ast_tx_getbusybuf); 341 342 printf("aggr single packet: %d\n", 343 sc->sc_aggr_stats.aggr_single_pkt); 344 printf("aggr single packet w/ BAW closed: %d\n", 345 sc->sc_aggr_stats.aggr_baw_closed_single_pkt); 346 printf("aggr non-baw packet: %d\n", 347 sc->sc_aggr_stats.aggr_nonbaw_pkt); 348 printf("aggr aggregate packet: %d\n", 349 sc->sc_aggr_stats.aggr_aggr_pkt); 350 printf("aggr single packet low hwq: %d\n", 351 sc->sc_aggr_stats.aggr_low_hwq_single_pkt); 352 printf("aggr single packet RTS aggr limited: %d\n", 353 sc->sc_aggr_stats.aggr_rts_aggr_limited); 354 printf("aggr sched, no work: %d\n", 355 sc->sc_aggr_stats.aggr_sched_nopkt); 356 for (i = 0; i < 64; i++) { 357 printf("%2d: %10d ", i, sc->sc_aggr_stats.aggr_pkts[i]); 358 if (i % 4 == 3) 359 printf("\n"); 360 } 361 printf("\n"); 362 363 for (i = 0; i < HAL_NUM_TX_QUEUES; i++) { 364 if (ATH_TXQ_SETUP(sc, i)) { 365 printf("HW TXQ %d: axq_depth=%d, axq_aggr_depth=%d, " 366 "axq_fifo_depth=%d, holdingbf=%p\n", 367 i, 368 sc->sc_txq[i].axq_depth, 369 sc->sc_txq[i].axq_aggr_depth, 370 sc->sc_txq[i].axq_fifo_depth, 371 sc->sc_txq[i].axq_holdingbf); 372 } 373 } 374 375 i = t = 0; 376 ATH_TXBUF_LOCK(sc); 377 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) { 378 if (bf->bf_flags & ATH_BUF_BUSY) { 379 printf("Busy: %d\n", t); 380 i++; 381 } 382 t++; 383 } 384 ATH_TXBUF_UNLOCK(sc); 385 printf("Total TX buffers: %d; Total TX buffers busy: %d (%d)\n", 386 t, i, sc->sc_txbuf_cnt); 387 388 i = t = 0; 389 ATH_TXBUF_LOCK(sc); 390 TAILQ_FOREACH(bf, &sc->sc_txbuf_mgmt, bf_list) { 391 if (bf->bf_flags & ATH_BUF_BUSY) { 392 printf("Busy: %d\n", t); 393 i++; 394 } 395 t++; 396 } 397 ATH_TXBUF_UNLOCK(sc); 398 printf("Total mgmt TX buffers: %d; Total mgmt TX buffers busy: %d\n", 399 t, i); 400 401 ATH_RX_LOCK(sc); 402 for (i = 0; i < 2; i++) { 403 printf("%d: fifolen: %d/%d; head=%d; tail=%d\n", 404 i, 405 sc->sc_rxedma[i].m_fifo_depth, 406 sc->sc_rxedma[i].m_fifolen, 407 sc->sc_rxedma[i].m_fifo_head, 408 sc->sc_rxedma[i].m_fifo_tail); 409 } 410 i = 0; 411 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 412 i++; 413 } 414 printf("Total RX buffers in free list: %d buffers\n", 415 i); 416 ATH_RX_UNLOCK(sc); 417 418 return 0; 419 } 420 421 static int 422 ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS) 423 { 424 struct ath_softc *sc = arg1; 425 u_int rfsilent; 426 int error; 427 428 (void) ath_hal_getrfsilent(sc->sc_ah, &rfsilent); 429 error = sysctl_handle_int(oidp, &rfsilent, 0, req); 430 if (error || !req->newptr) 431 return error; 432 if (!ath_hal_setrfsilent(sc->sc_ah, rfsilent)) 433 return EINVAL; 434 sc->sc_rfsilentpin = rfsilent & 0x1c; 435 sc->sc_rfsilentpol = (rfsilent & 0x2) != 0; 436 return 0; 437 } 438 439 static int 440 ath_sysctl_tpack(SYSCTL_HANDLER_ARGS) 441 { 442 struct ath_softc *sc = arg1; 443 u_int32_t tpack; 444 int error; 445 446 (void) ath_hal_gettpack(sc->sc_ah, &tpack); 447 error = sysctl_handle_int(oidp, &tpack, 0, req); 448 if (error || !req->newptr) 449 return error; 450 return !ath_hal_settpack(sc->sc_ah, tpack) ? EINVAL : 0; 451 } 452 453 static int 454 ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS) 455 { 456 struct ath_softc *sc = arg1; 457 u_int32_t tpcts; 458 int error; 459 460 (void) ath_hal_gettpcts(sc->sc_ah, &tpcts); 461 error = sysctl_handle_int(oidp, &tpcts, 0, req); 462 if (error || !req->newptr) 463 return error; 464 return !ath_hal_settpcts(sc->sc_ah, tpcts) ? EINVAL : 0; 465 } 466 467 static int 468 ath_sysctl_intmit(SYSCTL_HANDLER_ARGS) 469 { 470 struct ath_softc *sc = arg1; 471 int intmit, error; 472 473 intmit = ath_hal_getintmit(sc->sc_ah); 474 error = sysctl_handle_int(oidp, &intmit, 0, req); 475 if (error || !req->newptr) 476 return error; 477 478 /* reusing error; 1 here means "good"; 0 means "fail" */ 479 error = ath_hal_setintmit(sc->sc_ah, intmit); 480 if (! error) 481 return EINVAL; 482 483 /* 484 * Reset the hardware here - disabling ANI in the HAL 485 * doesn't reset ANI related registers, so it'll leave 486 * things in an inconsistent state. 487 */ 488 if (sc->sc_ifp->if_drv_flags & IFF_DRV_RUNNING) 489 ath_reset(sc->sc_ifp, ATH_RESET_NOLOSS); 490 491 return 0; 492 } 493 494 #ifdef IEEE80211_SUPPORT_TDMA 495 static int 496 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS) 497 { 498 struct ath_softc *sc = arg1; 499 int setcca, error; 500 501 setcca = sc->sc_setcca; 502 error = sysctl_handle_int(oidp, &setcca, 0, req); 503 if (error || !req->newptr) 504 return error; 505 sc->sc_setcca = (setcca != 0); 506 return 0; 507 } 508 #endif /* IEEE80211_SUPPORT_TDMA */ 509 510 static int 511 ath_sysctl_forcebstuck(SYSCTL_HANDLER_ARGS) 512 { 513 struct ath_softc *sc = arg1; 514 int val = 0; 515 int error; 516 517 error = sysctl_handle_int(oidp, &val, 0, req); 518 if (error || !req->newptr) 519 return error; 520 if (val == 0) 521 return 0; 522 523 taskqueue_enqueue_fast(sc->sc_tq, &sc->sc_bstucktask); 524 val = 0; 525 return 0; 526 } 527 528 static int 529 ath_sysctl_hangcheck(SYSCTL_HANDLER_ARGS) 530 { 531 struct ath_softc *sc = arg1; 532 int val = 0; 533 int error; 534 uint32_t mask = 0xffffffff; 535 uint32_t *sp; 536 uint32_t rsize; 537 struct ath_hal *ah = sc->sc_ah; 538 539 error = sysctl_handle_int(oidp, &val, 0, req); 540 if (error || !req->newptr) 541 return error; 542 if (val == 0) 543 return 0; 544 545 /* Do a hang check */ 546 if (!ath_hal_getdiagstate(ah, HAL_DIAG_CHECK_HANGS, 547 &mask, sizeof(mask), 548 (void *) &sp, &rsize)) 549 return (0); 550 device_printf(sc->sc_dev, "%s: sp=0x%08x\n", __func__, *sp); 551 552 val = 0; 553 return 0; 554 } 555 556 #ifdef ATH_DEBUG_ALQ 557 static int 558 ath_sysctl_alq_log(SYSCTL_HANDLER_ARGS) 559 { 560 struct ath_softc *sc = arg1; 561 int error, enable; 562 563 enable = (sc->sc_alq.sc_alq_isactive); 564 565 error = sysctl_handle_int(oidp, &enable, 0, req); 566 if (error || !req->newptr) 567 return (error); 568 else if (enable) 569 error = if_ath_alq_start(&sc->sc_alq); 570 else 571 error = if_ath_alq_stop(&sc->sc_alq); 572 return (error); 573 } 574 575 /* 576 * Attach the ALQ debugging if required. 577 */ 578 static void 579 ath_sysctl_alq_attach(struct ath_softc *sc) 580 { 581 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 582 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 583 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 584 585 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "alq", CTLFLAG_RD, 586 NULL, "Atheros ALQ logging parameters"); 587 child = SYSCTL_CHILDREN(tree); 588 589 SYSCTL_ADD_STRING(ctx, child, OID_AUTO, "filename", 590 CTLFLAG_RW, sc->sc_alq.sc_alq_filename, 0, "ALQ filename"); 591 592 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 593 "enable", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 594 ath_sysctl_alq_log, "I", ""); 595 596 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 597 "debugmask", CTLFLAG_RW, &sc->sc_alq.sc_alq_debug, 0, 598 "ALQ debug mask"); 599 600 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 601 "numlost", CTLFLAG_RW, &sc->sc_alq.sc_alq_numlost, 0, 602 "number lost"); 603 } 604 #endif /* ATH_DEBUG_ALQ */ 605 606 void 607 ath_sysctlattach(struct ath_softc *sc) 608 { 609 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 610 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 611 struct ath_hal *ah = sc->sc_ah; 612 613 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 614 "countrycode", CTLFLAG_RD, &sc->sc_eecc, 0, 615 "EEPROM country code"); 616 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 617 "regdomain", CTLFLAG_RD, &sc->sc_eerd, 0, 618 "EEPROM regdomain code"); 619 #ifdef ATH_DEBUG 620 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 621 "debug", CTLFLAG_RW, &sc->sc_debug, 622 "control debugging printfs"); 623 #endif 624 #ifdef ATH_DEBUG_ALQ 625 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 626 "ktrdebug", CTLFLAG_RW, &sc->sc_ktrdebug, 627 "control debugging KTR"); 628 #endif /* ATH_DEBUG_ALQ */ 629 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 630 "slottime", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 631 ath_sysctl_slottime, "I", "802.11 slot time (us)"); 632 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 633 "acktimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 634 ath_sysctl_acktimeout, "I", "802.11 ACK timeout (us)"); 635 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 636 "ctstimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 637 ath_sysctl_ctstimeout, "I", "802.11 CTS timeout (us)"); 638 639 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 640 "softled", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 641 ath_sysctl_softled, "I", "enable/disable software LED support"); 642 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 643 "ledpin", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 644 ath_sysctl_ledpin, "I", "GPIO pin connected to LED"); 645 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 646 "ledon", CTLFLAG_RW, &sc->sc_ledon, 0, 647 "setting to turn LED on"); 648 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 649 "ledidle", CTLFLAG_RW, &sc->sc_ledidle, 0, 650 "idle time for inactivity LED (ticks)"); 651 652 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 653 "hardled", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 654 ath_sysctl_hardled, "I", "enable/disable hardware LED support"); 655 /* XXX Laziness - configure pins, then flip hardled off/on */ 656 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 657 "led_net_pin", CTLFLAG_RW, &sc->sc_led_net_pin, 0, 658 "MAC Network LED pin, or -1 to disable"); 659 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 660 "led_pwr_pin", CTLFLAG_RW, &sc->sc_led_pwr_pin, 0, 661 "MAC Power LED pin, or -1 to disable"); 662 663 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 664 "txantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 665 ath_sysctl_txantenna, "I", "antenna switch"); 666 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 667 "rxantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 668 ath_sysctl_rxantenna, "I", "default/rx antenna"); 669 if (ath_hal_hasdiversity(ah)) 670 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 671 "diversity", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 672 ath_sysctl_diversity, "I", "antenna diversity"); 673 sc->sc_txintrperiod = ATH_TXINTR_PERIOD; 674 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 675 "txintrperiod", CTLFLAG_RW, &sc->sc_txintrperiod, 0, 676 "tx descriptor batching"); 677 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 678 "diag", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 679 ath_sysctl_diag, "I", "h/w diagnostic control"); 680 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 681 "tpscale", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 682 ath_sysctl_tpscale, "I", "tx power scaling"); 683 if (ath_hal_hastpc(ah)) { 684 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 685 "tpc", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 686 ath_sysctl_tpc, "I", "enable/disable per-packet TPC"); 687 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 688 "tpack", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 689 ath_sysctl_tpack, "I", "tx power for ack frames"); 690 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 691 "tpcts", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 692 ath_sysctl_tpcts, "I", "tx power for cts frames"); 693 } 694 if (ath_hal_hasrfsilent(ah)) { 695 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 696 "rfsilent", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 697 ath_sysctl_rfsilent, "I", "h/w RF silent config"); 698 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 699 "rfkill", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 700 ath_sysctl_rfkill, "I", "enable/disable RF kill switch"); 701 } 702 703 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 704 "txagg", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 705 ath_sysctl_txagg, "I", ""); 706 707 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 708 "forcebstuck", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 709 ath_sysctl_forcebstuck, "I", ""); 710 711 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 712 "hangcheck", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 713 ath_sysctl_hangcheck, "I", ""); 714 715 if (ath_hal_hasintmit(ah)) { 716 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 717 "intmit", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 718 ath_sysctl_intmit, "I", "interference mitigation"); 719 } 720 sc->sc_monpass = HAL_RXERR_DECRYPT | HAL_RXERR_MIC; 721 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 722 "monpass", CTLFLAG_RW, &sc->sc_monpass, 0, 723 "mask of error frames to pass when monitoring"); 724 725 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 726 "hwq_limit_nonaggr", CTLFLAG_RW, &sc->sc_hwq_limit_nonaggr, 0, 727 "Hardware non-AMPDU queue depth before software-queuing TX frames"); 728 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 729 "hwq_limit_aggr", CTLFLAG_RW, &sc->sc_hwq_limit_aggr, 0, 730 "Hardware AMPDU queue depth before software-queuing TX frames"); 731 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 732 "tid_hwq_lo", CTLFLAG_RW, &sc->sc_tid_hwq_lo, 0, 733 ""); 734 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 735 "tid_hwq_hi", CTLFLAG_RW, &sc->sc_tid_hwq_hi, 0, 736 ""); 737 738 /* Aggregate length twiddles */ 739 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 740 "aggr_limit", CTLFLAG_RW, &sc->sc_aggr_limit, 0, 741 "Maximum A-MPDU size, or 0 for 'default'"); 742 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 743 "rts_aggr_limit", CTLFLAG_RW, &sc->sc_rts_aggr_limit, 0, 744 "Maximum A-MPDU size for RTS-protected frames, or '0' " 745 "for default"); 746 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 747 "delim_min_pad", CTLFLAG_RW, &sc->sc_delim_min_pad, 0, 748 "Enforce a minimum number of delimiters per A-MPDU " 749 " sub-frame"); 750 751 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 752 "txq_data_minfree", CTLFLAG_RW, &sc->sc_txq_data_minfree, 753 0, "Minimum free buffers before adding a data frame" 754 " to the TX queue"); 755 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 756 "txq_mcastq_maxdepth", CTLFLAG_RW, 757 &sc->sc_txq_mcastq_maxdepth, 0, 758 "Maximum buffer depth for multicast/broadcast frames"); 759 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 760 "txq_node_maxdepth", CTLFLAG_RW, 761 &sc->sc_txq_node_maxdepth, 0, 762 "Maximum buffer depth for a single node"); 763 764 #if 0 765 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 766 "cabq_enable", CTLFLAG_RW, 767 &sc->sc_cabq_enable, 0, 768 "Whether to transmit on the CABQ or not"); 769 #endif 770 771 #ifdef IEEE80211_SUPPORT_TDMA 772 if (ath_hal_macversion(ah) > 0x78) { 773 sc->sc_tdmadbaprep = 2; 774 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 775 "dbaprep", CTLFLAG_RW, &sc->sc_tdmadbaprep, 0, 776 "TDMA DBA preparation time"); 777 sc->sc_tdmaswbaprep = 10; 778 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 779 "swbaprep", CTLFLAG_RW, &sc->sc_tdmaswbaprep, 0, 780 "TDMA SWBA preparation time"); 781 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 782 "guardtime", CTLFLAG_RW, &sc->sc_tdmaguard, 0, 783 "TDMA slot guard time"); 784 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 785 "superframe", CTLFLAG_RD, &sc->sc_tdmabintval, 0, 786 "TDMA calculated super frame"); 787 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 788 "setcca", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 789 ath_sysctl_setcca, "I", "enable CCA control"); 790 } 791 #endif 792 793 #ifdef ATH_DEBUG_ALQ 794 ath_sysctl_alq_attach(sc); 795 #endif 796 } 797 798 static int 799 ath_sysctl_clearstats(SYSCTL_HANDLER_ARGS) 800 { 801 struct ath_softc *sc = arg1; 802 int val = 0; 803 int error; 804 805 error = sysctl_handle_int(oidp, &val, 0, req); 806 if (error || !req->newptr) 807 return error; 808 if (val == 0) 809 return 0; /* Not clearing the stats is still valid */ 810 memset(&sc->sc_stats, 0, sizeof(sc->sc_stats)); 811 memset(&sc->sc_aggr_stats, 0, sizeof(sc->sc_aggr_stats)); 812 memset(&sc->sc_intr_stats, 0, sizeof(sc->sc_intr_stats)); 813 814 val = 0; 815 return 0; 816 } 817 818 static void 819 ath_sysctl_stats_attach_rxphyerr(struct ath_softc *sc, struct sysctl_oid_list *parent) 820 { 821 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 822 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 823 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 824 int i; 825 char sn[8]; 826 827 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx_phy_err", CTLFLAG_RD, NULL, "Per-code RX PHY Errors"); 828 child = SYSCTL_CHILDREN(tree); 829 for (i = 0; i < 64; i++) { 830 snprintf(sn, sizeof(sn), "%d", i); 831 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, &sc->sc_stats.ast_rx_phy[i], 0, ""); 832 } 833 } 834 835 static void 836 ath_sysctl_stats_attach_intr(struct ath_softc *sc, 837 struct sysctl_oid_list *parent) 838 { 839 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 840 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 841 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 842 int i; 843 char sn[8]; 844 845 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "sync_intr", 846 CTLFLAG_RD, NULL, "Sync interrupt statistics"); 847 child = SYSCTL_CHILDREN(tree); 848 for (i = 0; i < 32; i++) { 849 snprintf(sn, sizeof(sn), "%d", i); 850 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, 851 &sc->sc_intr_stats.sync_intr[i], 0, ""); 852 } 853 } 854 855 void 856 ath_sysctl_stats_attach(struct ath_softc *sc) 857 { 858 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 859 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 860 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 861 862 /* Create "clear" node */ 863 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 864 "clear_stats", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 865 ath_sysctl_clearstats, "I", "clear stats"); 866 867 /* Create stats node */ 868 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 869 NULL, "Statistics"); 870 child = SYSCTL_CHILDREN(tree); 871 872 /* This was generated from if_athioctl.h */ 873 874 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_watchdog", CTLFLAG_RD, 875 &sc->sc_stats.ast_watchdog, 0, "device reset by watchdog"); 876 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_hardware", CTLFLAG_RD, 877 &sc->sc_stats.ast_hardware, 0, "fatal hardware error interrupts"); 878 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss", CTLFLAG_RD, 879 &sc->sc_stats.ast_bmiss, 0, "beacon miss interrupts"); 880 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss_phantom", CTLFLAG_RD, 881 &sc->sc_stats.ast_bmiss_phantom, 0, "beacon miss interrupts"); 882 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bstuck", CTLFLAG_RD, 883 &sc->sc_stats.ast_bstuck, 0, "beacon stuck interrupts"); 884 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxorn", CTLFLAG_RD, 885 &sc->sc_stats.ast_rxorn, 0, "rx overrun interrupts"); 886 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxeol", CTLFLAG_RD, 887 &sc->sc_stats.ast_rxeol, 0, "rx eol interrupts"); 888 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_txurn", CTLFLAG_RD, 889 &sc->sc_stats.ast_txurn, 0, "tx underrun interrupts"); 890 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_mib", CTLFLAG_RD, 891 &sc->sc_stats.ast_mib, 0, "mib interrupts"); 892 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_intrcoal", CTLFLAG_RD, 893 &sc->sc_stats.ast_intrcoal, 0, "interrupts coalesced"); 894 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_packets", CTLFLAG_RD, 895 &sc->sc_stats.ast_tx_packets, 0, "packet sent on the interface"); 896 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mgmt", CTLFLAG_RD, 897 &sc->sc_stats.ast_tx_mgmt, 0, "management frames transmitted"); 898 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_discard", CTLFLAG_RD, 899 &sc->sc_stats.ast_tx_discard, 0, "frames discarded prior to assoc"); 900 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qstop", CTLFLAG_RD, 901 &sc->sc_stats.ast_tx_qstop, 0, "output stopped 'cuz no buffer"); 902 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_encap", CTLFLAG_RD, 903 &sc->sc_stats.ast_tx_encap, 0, "tx encapsulation failed"); 904 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nonode", CTLFLAG_RD, 905 &sc->sc_stats.ast_tx_nonode, 0, "tx failed 'cuz no node"); 906 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nombuf", CTLFLAG_RD, 907 &sc->sc_stats.ast_tx_nombuf, 0, "tx failed 'cuz no mbuf"); 908 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nomcl", CTLFLAG_RD, 909 &sc->sc_stats.ast_tx_nomcl, 0, "tx failed 'cuz no cluster"); 910 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_linear", CTLFLAG_RD, 911 &sc->sc_stats.ast_tx_linear, 0, "tx linearized to cluster"); 912 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodata", CTLFLAG_RD, 913 &sc->sc_stats.ast_tx_nodata, 0, "tx discarded empty frame"); 914 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_busdma", CTLFLAG_RD, 915 &sc->sc_stats.ast_tx_busdma, 0, "tx failed for dma resrcs"); 916 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xretries", CTLFLAG_RD, 917 &sc->sc_stats.ast_tx_xretries, 0, "tx failed 'cuz too many retries"); 918 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_fifoerr", CTLFLAG_RD, 919 &sc->sc_stats.ast_tx_fifoerr, 0, "tx failed 'cuz FIFO underrun"); 920 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_filtered", CTLFLAG_RD, 921 &sc->sc_stats.ast_tx_filtered, 0, "tx failed 'cuz xmit filtered"); 922 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortretry", CTLFLAG_RD, 923 &sc->sc_stats.ast_tx_shortretry, 0, "tx on-chip retries (short)"); 924 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_longretry", CTLFLAG_RD, 925 &sc->sc_stats.ast_tx_longretry, 0, "tx on-chip retries (long)"); 926 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_badrate", CTLFLAG_RD, 927 &sc->sc_stats.ast_tx_badrate, 0, "tx failed 'cuz bogus xmit rate"); 928 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_noack", CTLFLAG_RD, 929 &sc->sc_stats.ast_tx_noack, 0, "tx frames with no ack marked"); 930 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_rts", CTLFLAG_RD, 931 &sc->sc_stats.ast_tx_rts, 0, "tx frames with rts enabled"); 932 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cts", CTLFLAG_RD, 933 &sc->sc_stats.ast_tx_cts, 0, "tx frames with cts enabled"); 934 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortpre", CTLFLAG_RD, 935 &sc->sc_stats.ast_tx_shortpre, 0, "tx frames with short preamble"); 936 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_altrate", CTLFLAG_RD, 937 &sc->sc_stats.ast_tx_altrate, 0, "tx frames with alternate rate"); 938 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_protect", CTLFLAG_RD, 939 &sc->sc_stats.ast_tx_protect, 0, "tx frames with protection"); 940 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsburst", CTLFLAG_RD, 941 &sc->sc_stats.ast_tx_ctsburst, 0, "tx frames with cts and bursting"); 942 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsext", CTLFLAG_RD, 943 &sc->sc_stats.ast_tx_ctsext, 0, "tx frames with cts extension"); 944 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_nombuf", CTLFLAG_RD, 945 &sc->sc_stats.ast_rx_nombuf, 0, "rx setup failed 'cuz no mbuf"); 946 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_busdma", CTLFLAG_RD, 947 &sc->sc_stats.ast_rx_busdma, 0, "rx setup failed for dma resrcs"); 948 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_orn", CTLFLAG_RD, 949 &sc->sc_stats.ast_rx_orn, 0, "rx failed 'cuz of desc overrun"); 950 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_crcerr", CTLFLAG_RD, 951 &sc->sc_stats.ast_rx_crcerr, 0, "rx failed 'cuz of bad CRC"); 952 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_fifoerr", CTLFLAG_RD, 953 &sc->sc_stats.ast_rx_fifoerr, 0, "rx failed 'cuz of FIFO overrun"); 954 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badcrypt", CTLFLAG_RD, 955 &sc->sc_stats.ast_rx_badcrypt, 0, "rx failed 'cuz decryption"); 956 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badmic", CTLFLAG_RD, 957 &sc->sc_stats.ast_rx_badmic, 0, "rx failed 'cuz MIC failure"); 958 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_phyerr", CTLFLAG_RD, 959 &sc->sc_stats.ast_rx_phyerr, 0, "rx failed 'cuz of PHY err"); 960 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_tooshort", CTLFLAG_RD, 961 &sc->sc_stats.ast_rx_tooshort, 0, "rx discarded 'cuz frame too short"); 962 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_toobig", CTLFLAG_RD, 963 &sc->sc_stats.ast_rx_toobig, 0, "rx discarded 'cuz frame too large"); 964 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_packets", CTLFLAG_RD, 965 &sc->sc_stats.ast_rx_packets, 0, "packet recv on the interface"); 966 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_mgt", CTLFLAG_RD, 967 &sc->sc_stats.ast_rx_mgt, 0, "management frames received"); 968 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_ctl", CTLFLAG_RD, 969 &sc->sc_stats.ast_rx_ctl, 0, "rx discarded 'cuz ctl frame"); 970 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_xmit", CTLFLAG_RD, 971 &sc->sc_stats.ast_be_xmit, 0, "beacons transmitted"); 972 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_nombuf", CTLFLAG_RD, 973 &sc->sc_stats.ast_be_nombuf, 0, "beacon setup failed 'cuz no mbuf"); 974 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_cal", CTLFLAG_RD, 975 &sc->sc_stats.ast_per_cal, 0, "periodic calibration calls"); 976 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_calfail", CTLFLAG_RD, 977 &sc->sc_stats.ast_per_calfail, 0, "periodic calibration failed"); 978 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_rfgain", CTLFLAG_RD, 979 &sc->sc_stats.ast_per_rfgain, 0, "periodic calibration rfgain reset"); 980 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_calls", CTLFLAG_RD, 981 &sc->sc_stats.ast_rate_calls, 0, "rate control checks"); 982 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_raise", CTLFLAG_RD, 983 &sc->sc_stats.ast_rate_raise, 0, "rate control raised xmit rate"); 984 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_drop", CTLFLAG_RD, 985 &sc->sc_stats.ast_rate_drop, 0, "rate control dropped xmit rate"); 986 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_defswitch", CTLFLAG_RD, 987 &sc->sc_stats.ast_ant_defswitch, 0, "rx/default antenna switches"); 988 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_txswitch", CTLFLAG_RD, 989 &sc->sc_stats.ast_ant_txswitch, 0, "tx antenna switches"); 990 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_xmit", CTLFLAG_RD, 991 &sc->sc_stats.ast_cabq_xmit, 0, "cabq frames transmitted"); 992 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_busy", CTLFLAG_RD, 993 &sc->sc_stats.ast_cabq_busy, 0, "cabq found busy"); 994 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw", CTLFLAG_RD, 995 &sc->sc_stats.ast_tx_raw, 0, "tx frames through raw api"); 996 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txok", CTLFLAG_RD, 997 &sc->sc_stats.ast_ff_txok, 0, "fast frames tx'd successfully"); 998 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txerr", CTLFLAG_RD, 999 &sc->sc_stats.ast_ff_txerr, 0, "fast frames tx'd w/ error"); 1000 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_rx", CTLFLAG_RD, 1001 &sc->sc_stats.ast_ff_rx, 0, "fast frames rx'd"); 1002 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_flush", CTLFLAG_RD, 1003 &sc->sc_stats.ast_ff_flush, 0, "fast frames flushed from staging q"); 1004 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qfull", CTLFLAG_RD, 1005 &sc->sc_stats.ast_tx_qfull, 0, "tx dropped 'cuz of queue limit"); 1006 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nobuf", CTLFLAG_RD, 1007 &sc->sc_stats.ast_tx_nobuf, 0, "tx dropped 'cuz no ath buffer"); 1008 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_update", CTLFLAG_RD, 1009 &sc->sc_stats.ast_tdma_update, 0, "TDMA slot timing updates"); 1010 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_timers", CTLFLAG_RD, 1011 &sc->sc_stats.ast_tdma_timers, 0, "TDMA slot update set beacon timers"); 1012 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_tsf", CTLFLAG_RD, 1013 &sc->sc_stats.ast_tdma_tsf, 0, "TDMA slot update set TSF"); 1014 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_ack", CTLFLAG_RD, 1015 &sc->sc_stats.ast_tdma_ack, 0, "TDMA tx failed 'cuz ACK required"); 1016 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw_fail", CTLFLAG_RD, 1017 &sc->sc_stats.ast_tx_raw_fail, 0, "raw tx failed 'cuz h/w down"); 1018 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nofrag", CTLFLAG_RD, 1019 &sc->sc_stats.ast_tx_nofrag, 0, "tx dropped 'cuz no ath frag buffer"); 1020 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_missed", CTLFLAG_RD, 1021 &sc->sc_stats.ast_be_missed, 0, "number of -missed- beacons"); 1022 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ani_cal", CTLFLAG_RD, 1023 &sc->sc_stats.ast_ani_cal, 0, "number of ANI polls"); 1024 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_agg", CTLFLAG_RD, 1025 &sc->sc_stats.ast_rx_agg, 0, "number of aggregate frames received"); 1026 1027 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_halfgi", CTLFLAG_RD, 1028 &sc->sc_stats.ast_rx_halfgi, 0, "number of frames received with half-GI"); 1029 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_2040", CTLFLAG_RD, 1030 &sc->sc_stats.ast_rx_2040, 0, "number of HT/40 frames received"); 1031 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_pre_crc_err", CTLFLAG_RD, 1032 &sc->sc_stats.ast_rx_pre_crc_err, 0, "number of delimeter-CRC errors detected"); 1033 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_post_crc_err", CTLFLAG_RD, 1034 &sc->sc_stats.ast_rx_post_crc_err, 0, "number of post-delimiter CRC errors detected"); 1035 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_decrypt_busy_err", CTLFLAG_RD, 1036 &sc->sc_stats.ast_rx_decrypt_busy_err, 0, "number of frames received w/ busy decrypt engine"); 1037 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hi_rx_chain", CTLFLAG_RD, 1038 &sc->sc_stats.ast_rx_hi_rx_chain, 0, ""); 1039 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_htprotect", CTLFLAG_RD, 1040 &sc->sc_stats.ast_tx_htprotect, 0, "HT tx frames with protection"); 1041 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hitqueueend", CTLFLAG_RD, 1042 &sc->sc_stats.ast_rx_hitqueueend, 0, "RX hit queue end"); 1043 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timeout", CTLFLAG_RD, 1044 &sc->sc_stats.ast_tx_timeout, 0, "TX Global Timeout"); 1045 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cst", CTLFLAG_RD, 1046 &sc->sc_stats.ast_tx_cst, 0, "TX Carrier Sense Timeout"); 1047 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xtxop", CTLFLAG_RD, 1048 &sc->sc_stats.ast_tx_xtxop, 0, "TX exceeded TXOP"); 1049 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timerexpired", CTLFLAG_RD, 1050 &sc->sc_stats.ast_tx_timerexpired, 0, "TX exceeded TX_TIMER register"); 1051 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_desccfgerr", CTLFLAG_RD, 1052 &sc->sc_stats.ast_tx_desccfgerr, 0, "TX Descriptor Cfg Error"); 1053 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretries", CTLFLAG_RD, 1054 &sc->sc_stats.ast_tx_swretries, 0, "TX software retry count"); 1055 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretrymax", CTLFLAG_RD, 1056 &sc->sc_stats.ast_tx_swretrymax, 0, "TX software retry max reached"); 1057 1058 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_data_underrun", CTLFLAG_RD, 1059 &sc->sc_stats.ast_tx_data_underrun, 0, ""); 1060 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_delim_underrun", CTLFLAG_RD, 1061 &sc->sc_stats.ast_tx_delim_underrun, 0, ""); 1062 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_failall", CTLFLAG_RD, 1063 &sc->sc_stats.ast_tx_aggr_failall, 0, 1064 "Number of aggregate TX failures (whole frame)"); 1065 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_ok", CTLFLAG_RD, 1066 &sc->sc_stats.ast_tx_aggr_ok, 0, 1067 "Number of aggregate TX OK completions (subframe)"); 1068 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_fail", CTLFLAG_RD, 1069 &sc->sc_stats.ast_tx_aggr_fail, 0, 1070 "Number of aggregate TX failures (subframe)"); 1071 1072 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_intr", CTLFLAG_RD, 1073 &sc->sc_stats.ast_rx_intr, 0, "RX interrupts"); 1074 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_intr", CTLFLAG_RD, 1075 &sc->sc_stats.ast_tx_intr, 0, "TX interrupts"); 1076 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mcastq_overflow", 1077 CTLFLAG_RD, &sc->sc_stats.ast_tx_mcastq_overflow, 0, 1078 "Number of multicast frames exceeding maximum mcast queue depth"); 1079 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_keymiss", CTLFLAG_RD, 1080 &sc->sc_stats.ast_rx_keymiss, 0, ""); 1081 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swfiltered", CTLFLAG_RD, 1082 &sc->sc_stats.ast_tx_swfiltered, 0, ""); 1083 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_stbc", 1084 CTLFLAG_RD, &sc->sc_stats.ast_rx_stbc, 0, 1085 "Number of STBC frames received"); 1086 1087 /* Attach the RX phy error array */ 1088 ath_sysctl_stats_attach_rxphyerr(sc, child); 1089 1090 /* Attach the interrupt statistics array */ 1091 ath_sysctl_stats_attach_intr(sc, child); 1092 } 1093 1094 /* 1095 * This doesn't necessarily belong here (because it's HAL related, not 1096 * driver related). 1097 */ 1098 void 1099 ath_sysctl_hal_attach(struct ath_softc *sc) 1100 { 1101 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1102 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1103 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1104 1105 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "hal", CTLFLAG_RD, 1106 NULL, "Atheros HAL parameters"); 1107 child = SYSCTL_CHILDREN(tree); 1108 1109 sc->sc_ah->ah_config.ah_debug = 0; 1110 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "debug", CTLFLAG_RW, 1111 &sc->sc_ah->ah_config.ah_debug, 0, "Atheros HAL debugging printfs"); 1112 1113 sc->sc_ah->ah_config.ah_ar5416_biasadj = 0; 1114 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "ar5416_biasadj", CTLFLAG_RW, 1115 &sc->sc_ah->ah_config.ah_ar5416_biasadj, 0, 1116 "Enable 2GHz AR5416 direction sensitivity bias adjust"); 1117 1118 sc->sc_ah->ah_config.ah_dma_beacon_response_time = 2; 1119 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "dma_brt", CTLFLAG_RW, 1120 &sc->sc_ah->ah_config.ah_dma_beacon_response_time, 0, 1121 "Atheros HAL DMA beacon response time"); 1122 1123 sc->sc_ah->ah_config.ah_sw_beacon_response_time = 10; 1124 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "sw_brt", CTLFLAG_RW, 1125 &sc->sc_ah->ah_config.ah_sw_beacon_response_time, 0, 1126 "Atheros HAL software beacon response time"); 1127 1128 sc->sc_ah->ah_config.ah_additional_swba_backoff = 0; 1129 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "swba_backoff", CTLFLAG_RW, 1130 &sc->sc_ah->ah_config.ah_additional_swba_backoff, 0, 1131 "Atheros HAL additional SWBA backoff time"); 1132 1133 sc->sc_ah->ah_config.ah_force_full_reset = 0; 1134 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "force_full_reset", CTLFLAG_RW, 1135 &sc->sc_ah->ah_config.ah_force_full_reset, 0, 1136 "Force full chip reset rather than a warm reset"); 1137 1138 /* 1139 * This is initialised by the driver. 1140 */ 1141 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "serialise_reg_war", CTLFLAG_RW, 1142 &sc->sc_ah->ah_config.ah_serialise_reg_war, 0, 1143 "Force register access serialisation"); 1144 } 1145