1 /*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * Driver for the Atheros Wireless LAN controller. 35 * 36 * This software is derived from work of Atsushi Onoe; his contribution 37 * is greatly appreciated. 38 */ 39 40 #include "opt_inet.h" 41 #include "opt_ath.h" 42 #include "opt_wlan.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/sysctl.h> 47 #include <sys/mbuf.h> 48 #include <sys/malloc.h> 49 #include <sys/lock.h> 50 #include <sys/mutex.h> 51 #include <sys/kernel.h> 52 #include <sys/socket.h> 53 #include <sys/sockio.h> 54 #include <sys/errno.h> 55 #include <sys/callout.h> 56 #include <sys/bus.h> 57 #include <sys/endian.h> 58 #include <sys/kthread.h> 59 #include <sys/taskqueue.h> 60 #include <sys/priv.h> 61 62 #include <machine/bus.h> 63 64 #include <net/if.h> 65 #include <net/if_var.h> 66 #include <net/if_dl.h> 67 #include <net/if_media.h> 68 #include <net/if_types.h> 69 #include <net/if_arp.h> 70 #include <net/ethernet.h> 71 #include <net/if_llc.h> 72 73 #include <net80211/ieee80211_var.h> 74 #include <net80211/ieee80211_regdomain.h> 75 #ifdef IEEE80211_SUPPORT_SUPERG 76 #include <net80211/ieee80211_superg.h> 77 #endif 78 #ifdef IEEE80211_SUPPORT_TDMA 79 #include <net80211/ieee80211_tdma.h> 80 #endif 81 82 #include <net/bpf.h> 83 84 #ifdef INET 85 #include <netinet/in.h> 86 #include <netinet/if_ether.h> 87 #endif 88 89 #include <dev/ath/if_athvar.h> 90 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 91 #include <dev/ath/ath_hal/ah_diagcodes.h> 92 93 #include <dev/ath/if_ath_debug.h> 94 #include <dev/ath/if_ath_led.h> 95 #include <dev/ath/if_ath_misc.h> 96 #include <dev/ath/if_ath_tx.h> 97 #include <dev/ath/if_ath_sysctl.h> 98 99 #ifdef ATH_TX99_DIAG 100 #include <dev/ath/ath_tx99/ath_tx99.h> 101 #endif 102 103 #ifdef ATH_DEBUG_ALQ 104 #include <dev/ath/if_ath_alq.h> 105 #endif 106 107 static int 108 ath_sysctl_slottime(SYSCTL_HANDLER_ARGS) 109 { 110 struct ath_softc *sc = arg1; 111 u_int slottime; 112 int error; 113 114 ATH_LOCK(sc); 115 ath_power_set_power_state(sc, HAL_PM_AWAKE); 116 slottime = ath_hal_getslottime(sc->sc_ah); 117 ATH_UNLOCK(sc); 118 119 error = sysctl_handle_int(oidp, &slottime, 0, req); 120 if (error || !req->newptr) 121 goto finish; 122 123 error = !ath_hal_setslottime(sc->sc_ah, slottime) ? EINVAL : 0; 124 125 finish: 126 ATH_LOCK(sc); 127 ath_power_restore_power_state(sc); 128 ATH_UNLOCK(sc); 129 130 return error; 131 } 132 133 static int 134 ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS) 135 { 136 struct ath_softc *sc = arg1; 137 u_int acktimeout; 138 int error; 139 140 ATH_LOCK(sc); 141 ath_power_set_power_state(sc, HAL_PM_AWAKE); 142 acktimeout = ath_hal_getacktimeout(sc->sc_ah); 143 ATH_UNLOCK(sc); 144 145 error = sysctl_handle_int(oidp, &acktimeout, 0, req); 146 if (error || !req->newptr) 147 goto finish; 148 149 error = !ath_hal_setacktimeout(sc->sc_ah, acktimeout) ? EINVAL : 0; 150 151 finish: 152 ATH_LOCK(sc); 153 ath_power_restore_power_state(sc); 154 ATH_UNLOCK(sc); 155 156 return (error); 157 } 158 159 static int 160 ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS) 161 { 162 struct ath_softc *sc = arg1; 163 u_int ctstimeout; 164 int error; 165 166 ATH_LOCK(sc); 167 ath_power_set_power_state(sc, HAL_PM_AWAKE); 168 ctstimeout = ath_hal_getctstimeout(sc->sc_ah); 169 ATH_UNLOCK(sc); 170 171 error = sysctl_handle_int(oidp, &ctstimeout, 0, req); 172 if (error || !req->newptr) 173 goto finish; 174 175 error = !ath_hal_setctstimeout(sc->sc_ah, ctstimeout) ? EINVAL : 0; 176 177 finish: 178 ATH_LOCK(sc); 179 ath_power_restore_power_state(sc); 180 ATH_UNLOCK(sc); 181 182 return (error); 183 } 184 185 static int 186 ath_sysctl_softled(SYSCTL_HANDLER_ARGS) 187 { 188 struct ath_softc *sc = arg1; 189 int softled = sc->sc_softled; 190 int error; 191 192 error = sysctl_handle_int(oidp, &softled, 0, req); 193 if (error || !req->newptr) 194 return error; 195 softled = (softled != 0); 196 if (softled != sc->sc_softled) { 197 if (softled) { 198 /* NB: handle any sc_ledpin change */ 199 ath_led_config(sc); 200 } 201 sc->sc_softled = softled; 202 } 203 return 0; 204 } 205 206 static int 207 ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS) 208 { 209 struct ath_softc *sc = arg1; 210 int ledpin = sc->sc_ledpin; 211 int error; 212 213 error = sysctl_handle_int(oidp, &ledpin, 0, req); 214 if (error || !req->newptr) 215 return error; 216 if (ledpin != sc->sc_ledpin) { 217 sc->sc_ledpin = ledpin; 218 if (sc->sc_softled) { 219 ath_led_config(sc); 220 } 221 } 222 return 0; 223 } 224 225 static int 226 ath_sysctl_hardled(SYSCTL_HANDLER_ARGS) 227 { 228 struct ath_softc *sc = arg1; 229 int hardled = sc->sc_hardled; 230 int error; 231 232 error = sysctl_handle_int(oidp, &hardled, 0, req); 233 if (error || !req->newptr) 234 return error; 235 hardled = (hardled != 0); 236 if (hardled != sc->sc_hardled) { 237 if (hardled) { 238 /* NB: handle any sc_ledpin change */ 239 ath_led_config(sc); 240 } 241 sc->sc_hardled = hardled; 242 } 243 return 0; 244 } 245 246 static int 247 ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS) 248 { 249 struct ath_softc *sc = arg1; 250 u_int txantenna; 251 int error; 252 253 ATH_LOCK(sc); 254 ath_power_set_power_state(sc, HAL_PM_AWAKE); 255 ATH_UNLOCK(sc); 256 257 txantenna = ath_hal_getantennaswitch(sc->sc_ah); 258 259 error = sysctl_handle_int(oidp, &txantenna, 0, req); 260 if (!error && req->newptr) { 261 /* XXX assumes 2 antenna ports */ 262 if (txantenna < HAL_ANT_VARIABLE || txantenna > HAL_ANT_FIXED_B) { 263 error = EINVAL; 264 goto finish; 265 } 266 ath_hal_setantennaswitch(sc->sc_ah, txantenna); 267 /* 268 * NB: with the switch locked this isn't meaningful, 269 * but set it anyway so things like radiotap get 270 * consistent info in their data. 271 */ 272 sc->sc_txantenna = txantenna; 273 } 274 275 finish: 276 ATH_LOCK(sc); 277 ath_power_restore_power_state(sc); 278 ATH_UNLOCK(sc); 279 280 return (error); 281 } 282 283 static int 284 ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS) 285 { 286 struct ath_softc *sc = arg1; 287 u_int defantenna; 288 int error; 289 290 ATH_LOCK(sc); 291 ath_power_set_power_state(sc, HAL_PM_AWAKE); 292 defantenna = ath_hal_getdefantenna(sc->sc_ah); 293 ATH_UNLOCK(sc); 294 295 error = sysctl_handle_int(oidp, &defantenna, 0, req); 296 if (!error && req->newptr) 297 ath_hal_setdefantenna(sc->sc_ah, defantenna); 298 299 ATH_LOCK(sc); 300 ath_power_restore_power_state(sc); 301 ATH_UNLOCK(sc); 302 303 return (error); 304 } 305 306 static int 307 ath_sysctl_diversity(SYSCTL_HANDLER_ARGS) 308 { 309 struct ath_softc *sc = arg1; 310 u_int diversity; 311 int error; 312 313 ATH_LOCK(sc); 314 ath_power_set_power_state(sc, HAL_PM_AWAKE); 315 ATH_UNLOCK(sc); 316 317 diversity = ath_hal_getdiversity(sc->sc_ah); 318 319 error = sysctl_handle_int(oidp, &diversity, 0, req); 320 if (error || !req->newptr) 321 goto finish; 322 if (!ath_hal_setdiversity(sc->sc_ah, diversity)) { 323 error = EINVAL; 324 goto finish; 325 } 326 sc->sc_diversity = diversity; 327 error = 0; 328 329 finish: 330 ATH_LOCK(sc); 331 ath_power_restore_power_state(sc); 332 ATH_UNLOCK(sc); 333 334 return (error); 335 } 336 337 static int 338 ath_sysctl_diag(SYSCTL_HANDLER_ARGS) 339 { 340 struct ath_softc *sc = arg1; 341 u_int32_t diag; 342 int error; 343 344 ATH_LOCK(sc); 345 ath_power_set_power_state(sc, HAL_PM_AWAKE); 346 ATH_UNLOCK(sc); 347 348 if (!ath_hal_getdiag(sc->sc_ah, &diag)) { 349 error = EINVAL; 350 goto finish; 351 } 352 353 error = sysctl_handle_int(oidp, &diag, 0, req); 354 if (error || !req->newptr) 355 goto finish; 356 error = !ath_hal_setdiag(sc->sc_ah, diag) ? EINVAL : 0; 357 358 finish: 359 ATH_LOCK(sc); 360 ath_power_restore_power_state(sc); 361 ATH_UNLOCK(sc); 362 363 return (error); 364 } 365 366 static int 367 ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS) 368 { 369 struct ath_softc *sc = arg1; 370 u_int32_t scale; 371 int error; 372 373 ATH_LOCK(sc); 374 ath_power_set_power_state(sc, HAL_PM_AWAKE); 375 ATH_UNLOCK(sc); 376 377 (void) ath_hal_gettpscale(sc->sc_ah, &scale); 378 error = sysctl_handle_int(oidp, &scale, 0, req); 379 if (error || !req->newptr) 380 goto finish; 381 382 error = !ath_hal_settpscale(sc->sc_ah, scale) ? EINVAL : 383 (sc->sc_running) ? ath_reset(sc, ATH_RESET_NOLOSS) : 0; 384 385 finish: 386 ATH_LOCK(sc); 387 ath_power_restore_power_state(sc); 388 ATH_UNLOCK(sc); 389 390 return (error); 391 } 392 393 static int 394 ath_sysctl_tpc(SYSCTL_HANDLER_ARGS) 395 { 396 struct ath_softc *sc = arg1; 397 u_int tpc; 398 int error; 399 400 ATH_LOCK(sc); 401 ath_power_set_power_state(sc, HAL_PM_AWAKE); 402 ATH_UNLOCK(sc); 403 404 tpc = ath_hal_gettpc(sc->sc_ah); 405 406 error = sysctl_handle_int(oidp, &tpc, 0, req); 407 if (error || !req->newptr) 408 goto finish; 409 error = !ath_hal_settpc(sc->sc_ah, tpc) ? EINVAL : 0; 410 411 finish: 412 ATH_LOCK(sc); 413 ath_power_restore_power_state(sc); 414 ATH_UNLOCK(sc); 415 416 return (error); 417 } 418 419 static int 420 ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS) 421 { 422 struct ath_softc *sc = arg1; 423 struct ath_hal *ah = sc->sc_ah; 424 u_int rfkill; 425 int error; 426 427 ATH_LOCK(sc); 428 ath_power_set_power_state(sc, HAL_PM_AWAKE); 429 ATH_UNLOCK(sc); 430 431 rfkill = ath_hal_getrfkill(ah); 432 433 error = sysctl_handle_int(oidp, &rfkill, 0, req); 434 if (error || !req->newptr) 435 goto finish; 436 if (rfkill == ath_hal_getrfkill(ah)) { /* unchanged */ 437 error = 0; 438 goto finish; 439 } 440 if (!ath_hal_setrfkill(ah, rfkill)) { 441 error = EINVAL; 442 goto finish; 443 } 444 error = sc->sc_running ? ath_reset(sc, ATH_RESET_FULL) : 0; 445 446 finish: 447 ATH_LOCK(sc); 448 ath_power_restore_power_state(sc); 449 ATH_UNLOCK(sc); 450 451 return (error); 452 } 453 454 static int 455 ath_sysctl_txagg(SYSCTL_HANDLER_ARGS) 456 { 457 struct ath_softc *sc = arg1; 458 int i, t, param = 0; 459 int error; 460 struct ath_buf *bf; 461 462 error = sysctl_handle_int(oidp, ¶m, 0, req); 463 if (error || !req->newptr) 464 return error; 465 466 if (param != 1) 467 return 0; 468 469 printf("no tx bufs (empty list): %d\n", sc->sc_stats.ast_tx_getnobuf); 470 printf("no tx bufs (was busy): %d\n", sc->sc_stats.ast_tx_getbusybuf); 471 472 printf("aggr single packet: %d\n", 473 sc->sc_aggr_stats.aggr_single_pkt); 474 printf("aggr single packet w/ BAW closed: %d\n", 475 sc->sc_aggr_stats.aggr_baw_closed_single_pkt); 476 printf("aggr non-baw packet: %d\n", 477 sc->sc_aggr_stats.aggr_nonbaw_pkt); 478 printf("aggr aggregate packet: %d\n", 479 sc->sc_aggr_stats.aggr_aggr_pkt); 480 printf("aggr single packet low hwq: %d\n", 481 sc->sc_aggr_stats.aggr_low_hwq_single_pkt); 482 printf("aggr single packet RTS aggr limited: %d\n", 483 sc->sc_aggr_stats.aggr_rts_aggr_limited); 484 printf("aggr sched, no work: %d\n", 485 sc->sc_aggr_stats.aggr_sched_nopkt); 486 for (i = 0; i < 64; i++) { 487 printf("%2d: %10d ", i, sc->sc_aggr_stats.aggr_pkts[i]); 488 if (i % 4 == 3) 489 printf("\n"); 490 } 491 printf("\n"); 492 493 for (i = 0; i < HAL_NUM_TX_QUEUES; i++) { 494 if (ATH_TXQ_SETUP(sc, i)) { 495 printf("HW TXQ %d: axq_depth=%d, axq_aggr_depth=%d, " 496 "axq_fifo_depth=%d, holdingbf=%p\n", 497 i, 498 sc->sc_txq[i].axq_depth, 499 sc->sc_txq[i].axq_aggr_depth, 500 sc->sc_txq[i].axq_fifo_depth, 501 sc->sc_txq[i].axq_holdingbf); 502 } 503 } 504 505 i = t = 0; 506 ATH_TXBUF_LOCK(sc); 507 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) { 508 if (bf->bf_flags & ATH_BUF_BUSY) { 509 printf("Busy: %d\n", t); 510 i++; 511 } 512 t++; 513 } 514 ATH_TXBUF_UNLOCK(sc); 515 printf("Total TX buffers: %d; Total TX buffers busy: %d (%d)\n", 516 t, i, sc->sc_txbuf_cnt); 517 518 i = t = 0; 519 ATH_TXBUF_LOCK(sc); 520 TAILQ_FOREACH(bf, &sc->sc_txbuf_mgmt, bf_list) { 521 if (bf->bf_flags & ATH_BUF_BUSY) { 522 printf("Busy: %d\n", t); 523 i++; 524 } 525 t++; 526 } 527 ATH_TXBUF_UNLOCK(sc); 528 printf("Total mgmt TX buffers: %d; Total mgmt TX buffers busy: %d\n", 529 t, i); 530 531 ATH_RX_LOCK(sc); 532 for (i = 0; i < 2; i++) { 533 printf("%d: fifolen: %d/%d; head=%d; tail=%d; m_pending=%p, m_holdbf=%p\n", 534 i, 535 sc->sc_rxedma[i].m_fifo_depth, 536 sc->sc_rxedma[i].m_fifolen, 537 sc->sc_rxedma[i].m_fifo_head, 538 sc->sc_rxedma[i].m_fifo_tail, 539 sc->sc_rxedma[i].m_rxpending, 540 sc->sc_rxedma[i].m_holdbf); 541 } 542 i = 0; 543 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 544 i++; 545 } 546 printf("Total RX buffers in free list: %d buffers\n", 547 i); 548 ATH_RX_UNLOCK(sc); 549 550 return 0; 551 } 552 553 static int 554 ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS) 555 { 556 struct ath_softc *sc = arg1; 557 u_int rfsilent; 558 int error; 559 560 ATH_LOCK(sc); 561 ath_power_set_power_state(sc, HAL_PM_AWAKE); 562 ATH_UNLOCK(sc); 563 564 (void) ath_hal_getrfsilent(sc->sc_ah, &rfsilent); 565 error = sysctl_handle_int(oidp, &rfsilent, 0, req); 566 if (error || !req->newptr) 567 goto finish; 568 if (!ath_hal_setrfsilent(sc->sc_ah, rfsilent)) { 569 error = EINVAL; 570 goto finish; 571 } 572 /* 573 * Earlier chips (< AR5212) have up to 8 GPIO 574 * pins exposed. 575 * 576 * AR5416 and later chips have many more GPIO 577 * pins (up to 16) so the mask is expanded to 578 * four bits. 579 */ 580 sc->sc_rfsilentpin = rfsilent & 0x3c; 581 sc->sc_rfsilentpol = (rfsilent & 0x2) != 0; 582 error = 0; 583 584 finish: 585 ATH_LOCK(sc); 586 ath_power_restore_power_state(sc); 587 ATH_UNLOCK(sc); 588 589 return (error); 590 } 591 592 static int 593 ath_sysctl_tpack(SYSCTL_HANDLER_ARGS) 594 { 595 struct ath_softc *sc = arg1; 596 u_int32_t tpack; 597 int error; 598 599 ATH_LOCK(sc); 600 ath_power_set_power_state(sc, HAL_PM_AWAKE); 601 ATH_UNLOCK(sc); 602 603 (void) ath_hal_gettpack(sc->sc_ah, &tpack); 604 error = sysctl_handle_int(oidp, &tpack, 0, req); 605 if (error || !req->newptr) 606 goto finish; 607 error = !ath_hal_settpack(sc->sc_ah, tpack) ? EINVAL : 0; 608 609 finish: 610 ATH_LOCK(sc); 611 ath_power_restore_power_state(sc); 612 ATH_UNLOCK(sc); 613 614 return (error); 615 } 616 617 static int 618 ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS) 619 { 620 struct ath_softc *sc = arg1; 621 u_int32_t tpcts; 622 int error; 623 624 ATH_LOCK(sc); 625 ath_power_set_power_state(sc, HAL_PM_AWAKE); 626 ATH_UNLOCK(sc); 627 628 (void) ath_hal_gettpcts(sc->sc_ah, &tpcts); 629 error = sysctl_handle_int(oidp, &tpcts, 0, req); 630 if (error || !req->newptr) 631 goto finish; 632 633 error = !ath_hal_settpcts(sc->sc_ah, tpcts) ? EINVAL : 0; 634 635 finish: 636 ATH_LOCK(sc); 637 ath_power_restore_power_state(sc); 638 ATH_UNLOCK(sc); 639 640 return (error); 641 } 642 643 static int 644 ath_sysctl_intmit(SYSCTL_HANDLER_ARGS) 645 { 646 struct ath_softc *sc = arg1; 647 int intmit, error; 648 649 ATH_LOCK(sc); 650 ath_power_set_power_state(sc, HAL_PM_AWAKE); 651 ATH_UNLOCK(sc); 652 653 intmit = ath_hal_getintmit(sc->sc_ah); 654 error = sysctl_handle_int(oidp, &intmit, 0, req); 655 if (error || !req->newptr) 656 goto finish; 657 658 /* reusing error; 1 here means "good"; 0 means "fail" */ 659 error = ath_hal_setintmit(sc->sc_ah, intmit); 660 if (! error) { 661 error = EINVAL; 662 goto finish; 663 } 664 665 /* 666 * Reset the hardware here - disabling ANI in the HAL 667 * doesn't reset ANI related registers, so it'll leave 668 * things in an inconsistent state. 669 */ 670 if (sc->sc_running) 671 ath_reset(sc, ATH_RESET_NOLOSS); 672 673 error = 0; 674 675 finish: 676 ATH_LOCK(sc); 677 ath_power_restore_power_state(sc); 678 ATH_UNLOCK(sc); 679 680 return (error); 681 } 682 683 #ifdef IEEE80211_SUPPORT_TDMA 684 static int 685 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS) 686 { 687 struct ath_softc *sc = arg1; 688 int setcca, error; 689 690 setcca = sc->sc_setcca; 691 error = sysctl_handle_int(oidp, &setcca, 0, req); 692 if (error || !req->newptr) 693 return error; 694 sc->sc_setcca = (setcca != 0); 695 return 0; 696 } 697 #endif /* IEEE80211_SUPPORT_TDMA */ 698 699 static int 700 ath_sysctl_forcebstuck(SYSCTL_HANDLER_ARGS) 701 { 702 struct ath_softc *sc = arg1; 703 int val = 0; 704 int error; 705 706 error = sysctl_handle_int(oidp, &val, 0, req); 707 if (error || !req->newptr) 708 return error; 709 if (val == 0) 710 return 0; 711 712 taskqueue_enqueue_fast(sc->sc_tq, &sc->sc_bstucktask); 713 val = 0; 714 return 0; 715 } 716 717 static int 718 ath_sysctl_hangcheck(SYSCTL_HANDLER_ARGS) 719 { 720 struct ath_softc *sc = arg1; 721 int val = 0; 722 int error; 723 uint32_t mask = 0xffffffff; 724 uint32_t *sp; 725 uint32_t rsize; 726 struct ath_hal *ah = sc->sc_ah; 727 728 error = sysctl_handle_int(oidp, &val, 0, req); 729 if (error || !req->newptr) 730 return error; 731 if (val == 0) 732 return 0; 733 734 ATH_LOCK(sc); 735 ath_power_set_power_state(sc, HAL_PM_AWAKE); 736 ATH_UNLOCK(sc); 737 738 /* Do a hang check */ 739 if (!ath_hal_getdiagstate(ah, HAL_DIAG_CHECK_HANGS, 740 &mask, sizeof(mask), 741 (void *) &sp, &rsize)) { 742 error = 0; 743 goto finish; 744 } 745 746 device_printf(sc->sc_dev, "%s: sp=0x%08x\n", __func__, *sp); 747 748 val = 0; 749 error = 0; 750 finish: 751 ATH_LOCK(sc); 752 ath_power_restore_power_state(sc); 753 ATH_UNLOCK(sc); 754 755 return (error); 756 } 757 758 #ifdef ATH_DEBUG_ALQ 759 static int 760 ath_sysctl_alq_log(SYSCTL_HANDLER_ARGS) 761 { 762 struct ath_softc *sc = arg1; 763 int error, enable; 764 765 enable = (sc->sc_alq.sc_alq_isactive); 766 767 error = sysctl_handle_int(oidp, &enable, 0, req); 768 if (error || !req->newptr) 769 return (error); 770 else if (enable) 771 error = if_ath_alq_start(&sc->sc_alq); 772 else 773 error = if_ath_alq_stop(&sc->sc_alq); 774 return (error); 775 } 776 777 /* 778 * Attach the ALQ debugging if required. 779 */ 780 static void 781 ath_sysctl_alq_attach(struct ath_softc *sc) 782 { 783 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 784 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 785 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 786 787 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "alq", CTLFLAG_RD, 788 NULL, "Atheros ALQ logging parameters"); 789 child = SYSCTL_CHILDREN(tree); 790 791 SYSCTL_ADD_STRING(ctx, child, OID_AUTO, "filename", 792 CTLFLAG_RW, sc->sc_alq.sc_alq_filename, 0, "ALQ filename"); 793 794 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 795 "enable", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 796 ath_sysctl_alq_log, "I", ""); 797 798 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 799 "debugmask", CTLFLAG_RW, &sc->sc_alq.sc_alq_debug, 0, 800 "ALQ debug mask"); 801 802 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 803 "numlost", CTLFLAG_RW, &sc->sc_alq.sc_alq_numlost, 0, 804 "number lost"); 805 } 806 #endif /* ATH_DEBUG_ALQ */ 807 808 void 809 ath_sysctlattach(struct ath_softc *sc) 810 { 811 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 812 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 813 struct ath_hal *ah = sc->sc_ah; 814 815 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 816 "countrycode", CTLFLAG_RD, &sc->sc_eecc, 0, 817 "EEPROM country code"); 818 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 819 "regdomain", CTLFLAG_RD, &sc->sc_eerd, 0, 820 "EEPROM regdomain code"); 821 #ifdef ATH_DEBUG 822 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 823 "debug", CTLFLAG_RW, &sc->sc_debug, 824 "control debugging printfs"); 825 #endif 826 #ifdef ATH_DEBUG_ALQ 827 SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 828 "ktrdebug", CTLFLAG_RW, &sc->sc_ktrdebug, 829 "control debugging KTR"); 830 #endif /* ATH_DEBUG_ALQ */ 831 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 832 "slottime", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 833 ath_sysctl_slottime, "I", "802.11 slot time (us)"); 834 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 835 "acktimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 836 ath_sysctl_acktimeout, "I", "802.11 ACK timeout (us)"); 837 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 838 "ctstimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 839 ath_sysctl_ctstimeout, "I", "802.11 CTS timeout (us)"); 840 841 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 842 "softled", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 843 ath_sysctl_softled, "I", "enable/disable software LED support"); 844 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 845 "ledpin", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 846 ath_sysctl_ledpin, "I", "GPIO pin connected to LED"); 847 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 848 "ledon", CTLFLAG_RW, &sc->sc_ledon, 0, 849 "setting to turn LED on"); 850 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 851 "ledidle", CTLFLAG_RW, &sc->sc_ledidle, 0, 852 "idle time for inactivity LED (ticks)"); 853 854 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 855 "hardled", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 856 ath_sysctl_hardled, "I", "enable/disable hardware LED support"); 857 /* XXX Laziness - configure pins, then flip hardled off/on */ 858 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 859 "led_net_pin", CTLFLAG_RW, &sc->sc_led_net_pin, 0, 860 "MAC Network LED pin, or -1 to disable"); 861 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 862 "led_pwr_pin", CTLFLAG_RW, &sc->sc_led_pwr_pin, 0, 863 "MAC Power LED pin, or -1 to disable"); 864 865 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 866 "txantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 867 ath_sysctl_txantenna, "I", "antenna switch"); 868 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 869 "rxantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 870 ath_sysctl_rxantenna, "I", "default/rx antenna"); 871 if (ath_hal_hasdiversity(ah)) 872 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 873 "diversity", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 874 ath_sysctl_diversity, "I", "antenna diversity"); 875 sc->sc_txintrperiod = ATH_TXINTR_PERIOD; 876 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 877 "txintrperiod", CTLFLAG_RW, &sc->sc_txintrperiod, 0, 878 "tx descriptor batching"); 879 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 880 "diag", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 881 ath_sysctl_diag, "I", "h/w diagnostic control"); 882 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 883 "tpscale", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 884 ath_sysctl_tpscale, "I", "tx power scaling"); 885 if (ath_hal_hastpc(ah)) { 886 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 887 "tpc", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 888 ath_sysctl_tpc, "I", "enable/disable per-packet TPC"); 889 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 890 "tpack", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 891 ath_sysctl_tpack, "I", "tx power for ack frames"); 892 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 893 "tpcts", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 894 ath_sysctl_tpcts, "I", "tx power for cts frames"); 895 } 896 if (ath_hal_hasrfsilent(ah)) { 897 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 898 "rfsilent", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 899 ath_sysctl_rfsilent, "I", "h/w RF silent config"); 900 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 901 "rfkill", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 902 ath_sysctl_rfkill, "I", "enable/disable RF kill switch"); 903 } 904 905 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 906 "txagg", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 907 ath_sysctl_txagg, "I", ""); 908 909 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 910 "forcebstuck", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 911 ath_sysctl_forcebstuck, "I", ""); 912 913 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 914 "hangcheck", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 915 ath_sysctl_hangcheck, "I", ""); 916 917 if (ath_hal_hasintmit(ah)) { 918 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 919 "intmit", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 920 ath_sysctl_intmit, "I", "interference mitigation"); 921 } 922 sc->sc_monpass = HAL_RXERR_DECRYPT | HAL_RXERR_MIC; 923 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 924 "monpass", CTLFLAG_RW, &sc->sc_monpass, 0, 925 "mask of error frames to pass when monitoring"); 926 927 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 928 "hwq_limit_nonaggr", CTLFLAG_RW, &sc->sc_hwq_limit_nonaggr, 0, 929 "Hardware non-AMPDU queue depth before software-queuing TX frames"); 930 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 931 "hwq_limit_aggr", CTLFLAG_RW, &sc->sc_hwq_limit_aggr, 0, 932 "Hardware AMPDU queue depth before software-queuing TX frames"); 933 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 934 "tid_hwq_lo", CTLFLAG_RW, &sc->sc_tid_hwq_lo, 0, 935 ""); 936 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 937 "tid_hwq_hi", CTLFLAG_RW, &sc->sc_tid_hwq_hi, 0, 938 ""); 939 940 /* Aggregate length twiddles */ 941 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 942 "aggr_limit", CTLFLAG_RW, &sc->sc_aggr_limit, 0, 943 "Maximum A-MPDU size, or 0 for 'default'"); 944 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 945 "rts_aggr_limit", CTLFLAG_RW, &sc->sc_rts_aggr_limit, 0, 946 "Maximum A-MPDU size for RTS-protected frames, or '0' " 947 "for default"); 948 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 949 "delim_min_pad", CTLFLAG_RW, &sc->sc_delim_min_pad, 0, 950 "Enforce a minimum number of delimiters per A-MPDU " 951 " sub-frame"); 952 953 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 954 "txq_data_minfree", CTLFLAG_RW, &sc->sc_txq_data_minfree, 955 0, "Minimum free buffers before adding a data frame" 956 " to the TX queue"); 957 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 958 "txq_mcastq_maxdepth", CTLFLAG_RW, 959 &sc->sc_txq_mcastq_maxdepth, 0, 960 "Maximum buffer depth for multicast/broadcast frames"); 961 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 962 "txq_node_maxdepth", CTLFLAG_RW, 963 &sc->sc_txq_node_maxdepth, 0, 964 "Maximum buffer depth for a single node"); 965 966 #if 0 967 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 968 "cabq_enable", CTLFLAG_RW, 969 &sc->sc_cabq_enable, 0, 970 "Whether to transmit on the CABQ or not"); 971 #endif 972 973 #ifdef IEEE80211_SUPPORT_TDMA 974 if (ath_hal_macversion(ah) > 0x78) { 975 sc->sc_tdmadbaprep = 2; 976 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 977 "dbaprep", CTLFLAG_RW, &sc->sc_tdmadbaprep, 0, 978 "TDMA DBA preparation time"); 979 sc->sc_tdmaswbaprep = 10; 980 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 981 "swbaprep", CTLFLAG_RW, &sc->sc_tdmaswbaprep, 0, 982 "TDMA SWBA preparation time"); 983 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 984 "guardtime", CTLFLAG_RW, &sc->sc_tdmaguard, 0, 985 "TDMA slot guard time"); 986 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 987 "superframe", CTLFLAG_RD, &sc->sc_tdmabintval, 0, 988 "TDMA calculated super frame"); 989 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 990 "setcca", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 991 ath_sysctl_setcca, "I", "enable CCA control"); 992 } 993 #endif 994 995 #ifdef ATH_DEBUG_ALQ 996 ath_sysctl_alq_attach(sc); 997 #endif 998 } 999 1000 static int 1001 ath_sysctl_clearstats(SYSCTL_HANDLER_ARGS) 1002 { 1003 struct ath_softc *sc = arg1; 1004 int val = 0; 1005 int error; 1006 1007 error = sysctl_handle_int(oidp, &val, 0, req); 1008 if (error || !req->newptr) 1009 return error; 1010 if (val == 0) 1011 return 0; /* Not clearing the stats is still valid */ 1012 memset(&sc->sc_stats, 0, sizeof(sc->sc_stats)); 1013 memset(&sc->sc_aggr_stats, 0, sizeof(sc->sc_aggr_stats)); 1014 memset(&sc->sc_intr_stats, 0, sizeof(sc->sc_intr_stats)); 1015 1016 val = 0; 1017 return 0; 1018 } 1019 1020 static void 1021 ath_sysctl_stats_attach_rxphyerr(struct ath_softc *sc, struct sysctl_oid_list *parent) 1022 { 1023 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1024 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1025 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1026 int i; 1027 char sn[8]; 1028 1029 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx_phy_err", CTLFLAG_RD, NULL, "Per-code RX PHY Errors"); 1030 child = SYSCTL_CHILDREN(tree); 1031 for (i = 0; i < 64; i++) { 1032 snprintf(sn, sizeof(sn), "%d", i); 1033 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, &sc->sc_stats.ast_rx_phy[i], 0, ""); 1034 } 1035 } 1036 1037 static void 1038 ath_sysctl_stats_attach_intr(struct ath_softc *sc, 1039 struct sysctl_oid_list *parent) 1040 { 1041 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1042 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1043 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1044 int i; 1045 char sn[8]; 1046 1047 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "sync_intr", 1048 CTLFLAG_RD, NULL, "Sync interrupt statistics"); 1049 child = SYSCTL_CHILDREN(tree); 1050 for (i = 0; i < 32; i++) { 1051 snprintf(sn, sizeof(sn), "%d", i); 1052 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, 1053 &sc->sc_intr_stats.sync_intr[i], 0, ""); 1054 } 1055 } 1056 1057 void 1058 ath_sysctl_stats_attach(struct ath_softc *sc) 1059 { 1060 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1061 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1062 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1063 1064 /* Create "clear" node */ 1065 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1066 "clear_stats", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1067 ath_sysctl_clearstats, "I", "clear stats"); 1068 1069 /* Create stats node */ 1070 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 1071 NULL, "Statistics"); 1072 child = SYSCTL_CHILDREN(tree); 1073 1074 /* This was generated from if_athioctl.h */ 1075 1076 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_watchdog", CTLFLAG_RD, 1077 &sc->sc_stats.ast_watchdog, 0, "device reset by watchdog"); 1078 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_hardware", CTLFLAG_RD, 1079 &sc->sc_stats.ast_hardware, 0, "fatal hardware error interrupts"); 1080 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss", CTLFLAG_RD, 1081 &sc->sc_stats.ast_bmiss, 0, "beacon miss interrupts"); 1082 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss_phantom", CTLFLAG_RD, 1083 &sc->sc_stats.ast_bmiss_phantom, 0, "beacon miss interrupts"); 1084 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bstuck", CTLFLAG_RD, 1085 &sc->sc_stats.ast_bstuck, 0, "beacon stuck interrupts"); 1086 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxorn", CTLFLAG_RD, 1087 &sc->sc_stats.ast_rxorn, 0, "rx overrun interrupts"); 1088 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxeol", CTLFLAG_RD, 1089 &sc->sc_stats.ast_rxeol, 0, "rx eol interrupts"); 1090 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_txurn", CTLFLAG_RD, 1091 &sc->sc_stats.ast_txurn, 0, "tx underrun interrupts"); 1092 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_mib", CTLFLAG_RD, 1093 &sc->sc_stats.ast_mib, 0, "mib interrupts"); 1094 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_intrcoal", CTLFLAG_RD, 1095 &sc->sc_stats.ast_intrcoal, 0, "interrupts coalesced"); 1096 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_packets", CTLFLAG_RD, 1097 &sc->sc_stats.ast_tx_packets, 0, "packet sent on the interface"); 1098 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mgmt", CTLFLAG_RD, 1099 &sc->sc_stats.ast_tx_mgmt, 0, "management frames transmitted"); 1100 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_discard", CTLFLAG_RD, 1101 &sc->sc_stats.ast_tx_discard, 0, "frames discarded prior to assoc"); 1102 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qstop", CTLFLAG_RD, 1103 &sc->sc_stats.ast_tx_qstop, 0, "output stopped 'cuz no buffer"); 1104 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_encap", CTLFLAG_RD, 1105 &sc->sc_stats.ast_tx_encap, 0, "tx encapsulation failed"); 1106 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nonode", CTLFLAG_RD, 1107 &sc->sc_stats.ast_tx_nonode, 0, "tx failed 'cuz no node"); 1108 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nombuf", CTLFLAG_RD, 1109 &sc->sc_stats.ast_tx_nombuf, 0, "tx failed 'cuz no mbuf"); 1110 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nomcl", CTLFLAG_RD, 1111 &sc->sc_stats.ast_tx_nomcl, 0, "tx failed 'cuz no cluster"); 1112 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_linear", CTLFLAG_RD, 1113 &sc->sc_stats.ast_tx_linear, 0, "tx linearized to cluster"); 1114 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodata", CTLFLAG_RD, 1115 &sc->sc_stats.ast_tx_nodata, 0, "tx discarded empty frame"); 1116 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_busdma", CTLFLAG_RD, 1117 &sc->sc_stats.ast_tx_busdma, 0, "tx failed for dma resrcs"); 1118 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xretries", CTLFLAG_RD, 1119 &sc->sc_stats.ast_tx_xretries, 0, "tx failed 'cuz too many retries"); 1120 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_fifoerr", CTLFLAG_RD, 1121 &sc->sc_stats.ast_tx_fifoerr, 0, "tx failed 'cuz FIFO underrun"); 1122 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_filtered", CTLFLAG_RD, 1123 &sc->sc_stats.ast_tx_filtered, 0, "tx failed 'cuz xmit filtered"); 1124 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortretry", CTLFLAG_RD, 1125 &sc->sc_stats.ast_tx_shortretry, 0, "tx on-chip retries (short)"); 1126 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_longretry", CTLFLAG_RD, 1127 &sc->sc_stats.ast_tx_longretry, 0, "tx on-chip retries (long)"); 1128 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_badrate", CTLFLAG_RD, 1129 &sc->sc_stats.ast_tx_badrate, 0, "tx failed 'cuz bogus xmit rate"); 1130 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_noack", CTLFLAG_RD, 1131 &sc->sc_stats.ast_tx_noack, 0, "tx frames with no ack marked"); 1132 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_rts", CTLFLAG_RD, 1133 &sc->sc_stats.ast_tx_rts, 0, "tx frames with rts enabled"); 1134 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cts", CTLFLAG_RD, 1135 &sc->sc_stats.ast_tx_cts, 0, "tx frames with cts enabled"); 1136 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortpre", CTLFLAG_RD, 1137 &sc->sc_stats.ast_tx_shortpre, 0, "tx frames with short preamble"); 1138 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_altrate", CTLFLAG_RD, 1139 &sc->sc_stats.ast_tx_altrate, 0, "tx frames with alternate rate"); 1140 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_protect", CTLFLAG_RD, 1141 &sc->sc_stats.ast_tx_protect, 0, "tx frames with protection"); 1142 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsburst", CTLFLAG_RD, 1143 &sc->sc_stats.ast_tx_ctsburst, 0, "tx frames with cts and bursting"); 1144 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsext", CTLFLAG_RD, 1145 &sc->sc_stats.ast_tx_ctsext, 0, "tx frames with cts extension"); 1146 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_nombuf", CTLFLAG_RD, 1147 &sc->sc_stats.ast_rx_nombuf, 0, "rx setup failed 'cuz no mbuf"); 1148 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_busdma", CTLFLAG_RD, 1149 &sc->sc_stats.ast_rx_busdma, 0, "rx setup failed for dma resrcs"); 1150 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_orn", CTLFLAG_RD, 1151 &sc->sc_stats.ast_rx_orn, 0, "rx failed 'cuz of desc overrun"); 1152 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_crcerr", CTLFLAG_RD, 1153 &sc->sc_stats.ast_rx_crcerr, 0, "rx failed 'cuz of bad CRC"); 1154 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_fifoerr", CTLFLAG_RD, 1155 &sc->sc_stats.ast_rx_fifoerr, 0, "rx failed 'cuz of FIFO overrun"); 1156 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badcrypt", CTLFLAG_RD, 1157 &sc->sc_stats.ast_rx_badcrypt, 0, "rx failed 'cuz decryption"); 1158 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badmic", CTLFLAG_RD, 1159 &sc->sc_stats.ast_rx_badmic, 0, "rx failed 'cuz MIC failure"); 1160 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_phyerr", CTLFLAG_RD, 1161 &sc->sc_stats.ast_rx_phyerr, 0, "rx failed 'cuz of PHY err"); 1162 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_tooshort", CTLFLAG_RD, 1163 &sc->sc_stats.ast_rx_tooshort, 0, "rx discarded 'cuz frame too short"); 1164 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_toobig", CTLFLAG_RD, 1165 &sc->sc_stats.ast_rx_toobig, 0, "rx discarded 'cuz frame too large"); 1166 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_packets", CTLFLAG_RD, 1167 &sc->sc_stats.ast_rx_packets, 0, "packet recv on the interface"); 1168 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_mgt", CTLFLAG_RD, 1169 &sc->sc_stats.ast_rx_mgt, 0, "management frames received"); 1170 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_ctl", CTLFLAG_RD, 1171 &sc->sc_stats.ast_rx_ctl, 0, "rx discarded 'cuz ctl frame"); 1172 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_xmit", CTLFLAG_RD, 1173 &sc->sc_stats.ast_be_xmit, 0, "beacons transmitted"); 1174 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_nombuf", CTLFLAG_RD, 1175 &sc->sc_stats.ast_be_nombuf, 0, "beacon setup failed 'cuz no mbuf"); 1176 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_cal", CTLFLAG_RD, 1177 &sc->sc_stats.ast_per_cal, 0, "periodic calibration calls"); 1178 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_calfail", CTLFLAG_RD, 1179 &sc->sc_stats.ast_per_calfail, 0, "periodic calibration failed"); 1180 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_rfgain", CTLFLAG_RD, 1181 &sc->sc_stats.ast_per_rfgain, 0, "periodic calibration rfgain reset"); 1182 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_calls", CTLFLAG_RD, 1183 &sc->sc_stats.ast_rate_calls, 0, "rate control checks"); 1184 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_raise", CTLFLAG_RD, 1185 &sc->sc_stats.ast_rate_raise, 0, "rate control raised xmit rate"); 1186 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_drop", CTLFLAG_RD, 1187 &sc->sc_stats.ast_rate_drop, 0, "rate control dropped xmit rate"); 1188 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_defswitch", CTLFLAG_RD, 1189 &sc->sc_stats.ast_ant_defswitch, 0, "rx/default antenna switches"); 1190 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_txswitch", CTLFLAG_RD, 1191 &sc->sc_stats.ast_ant_txswitch, 0, "tx antenna switches"); 1192 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_xmit", CTLFLAG_RD, 1193 &sc->sc_stats.ast_cabq_xmit, 0, "cabq frames transmitted"); 1194 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_busy", CTLFLAG_RD, 1195 &sc->sc_stats.ast_cabq_busy, 0, "cabq found busy"); 1196 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw", CTLFLAG_RD, 1197 &sc->sc_stats.ast_tx_raw, 0, "tx frames through raw api"); 1198 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txok", CTLFLAG_RD, 1199 &sc->sc_stats.ast_ff_txok, 0, "fast frames tx'd successfully"); 1200 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txerr", CTLFLAG_RD, 1201 &sc->sc_stats.ast_ff_txerr, 0, "fast frames tx'd w/ error"); 1202 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_rx", CTLFLAG_RD, 1203 &sc->sc_stats.ast_ff_rx, 0, "fast frames rx'd"); 1204 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_flush", CTLFLAG_RD, 1205 &sc->sc_stats.ast_ff_flush, 0, "fast frames flushed from staging q"); 1206 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qfull", CTLFLAG_RD, 1207 &sc->sc_stats.ast_tx_qfull, 0, "tx dropped 'cuz of queue limit"); 1208 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nobuf", CTLFLAG_RD, 1209 &sc->sc_stats.ast_tx_nobuf, 0, "tx dropped 'cuz no ath buffer"); 1210 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_update", CTLFLAG_RD, 1211 &sc->sc_stats.ast_tdma_update, 0, "TDMA slot timing updates"); 1212 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_timers", CTLFLAG_RD, 1213 &sc->sc_stats.ast_tdma_timers, 0, "TDMA slot update set beacon timers"); 1214 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_tsf", CTLFLAG_RD, 1215 &sc->sc_stats.ast_tdma_tsf, 0, "TDMA slot update set TSF"); 1216 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_ack", CTLFLAG_RD, 1217 &sc->sc_stats.ast_tdma_ack, 0, "TDMA tx failed 'cuz ACK required"); 1218 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw_fail", CTLFLAG_RD, 1219 &sc->sc_stats.ast_tx_raw_fail, 0, "raw tx failed 'cuz h/w down"); 1220 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nofrag", CTLFLAG_RD, 1221 &sc->sc_stats.ast_tx_nofrag, 0, "tx dropped 'cuz no ath frag buffer"); 1222 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_missed", CTLFLAG_RD, 1223 &sc->sc_stats.ast_be_missed, 0, "number of -missed- beacons"); 1224 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ani_cal", CTLFLAG_RD, 1225 &sc->sc_stats.ast_ani_cal, 0, "number of ANI polls"); 1226 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_agg", CTLFLAG_RD, 1227 &sc->sc_stats.ast_rx_agg, 0, "number of aggregate frames received"); 1228 1229 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_halfgi", CTLFLAG_RD, 1230 &sc->sc_stats.ast_rx_halfgi, 0, "number of frames received with half-GI"); 1231 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_2040", CTLFLAG_RD, 1232 &sc->sc_stats.ast_rx_2040, 0, "number of HT/40 frames received"); 1233 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_pre_crc_err", CTLFLAG_RD, 1234 &sc->sc_stats.ast_rx_pre_crc_err, 0, "number of delimeter-CRC errors detected"); 1235 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_post_crc_err", CTLFLAG_RD, 1236 &sc->sc_stats.ast_rx_post_crc_err, 0, "number of post-delimiter CRC errors detected"); 1237 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_decrypt_busy_err", CTLFLAG_RD, 1238 &sc->sc_stats.ast_rx_decrypt_busy_err, 0, "number of frames received w/ busy decrypt engine"); 1239 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hi_rx_chain", CTLFLAG_RD, 1240 &sc->sc_stats.ast_rx_hi_rx_chain, 0, ""); 1241 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_htprotect", CTLFLAG_RD, 1242 &sc->sc_stats.ast_tx_htprotect, 0, "HT tx frames with protection"); 1243 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_hitqueueend", CTLFLAG_RD, 1244 &sc->sc_stats.ast_rx_hitqueueend, 0, "RX hit queue end"); 1245 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timeout", CTLFLAG_RD, 1246 &sc->sc_stats.ast_tx_timeout, 0, "TX Global Timeout"); 1247 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cst", CTLFLAG_RD, 1248 &sc->sc_stats.ast_tx_cst, 0, "TX Carrier Sense Timeout"); 1249 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xtxop", CTLFLAG_RD, 1250 &sc->sc_stats.ast_tx_xtxop, 0, "TX exceeded TXOP"); 1251 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_timerexpired", CTLFLAG_RD, 1252 &sc->sc_stats.ast_tx_timerexpired, 0, "TX exceeded TX_TIMER register"); 1253 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_desccfgerr", CTLFLAG_RD, 1254 &sc->sc_stats.ast_tx_desccfgerr, 0, "TX Descriptor Cfg Error"); 1255 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretries", CTLFLAG_RD, 1256 &sc->sc_stats.ast_tx_swretries, 0, "TX software retry count"); 1257 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swretrymax", CTLFLAG_RD, 1258 &sc->sc_stats.ast_tx_swretrymax, 0, "TX software retry max reached"); 1259 1260 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_data_underrun", CTLFLAG_RD, 1261 &sc->sc_stats.ast_tx_data_underrun, 0, ""); 1262 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_delim_underrun", CTLFLAG_RD, 1263 &sc->sc_stats.ast_tx_delim_underrun, 0, ""); 1264 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_failall", CTLFLAG_RD, 1265 &sc->sc_stats.ast_tx_aggr_failall, 0, 1266 "Number of aggregate TX failures (whole frame)"); 1267 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_ok", CTLFLAG_RD, 1268 &sc->sc_stats.ast_tx_aggr_ok, 0, 1269 "Number of aggregate TX OK completions (subframe)"); 1270 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_aggr_fail", CTLFLAG_RD, 1271 &sc->sc_stats.ast_tx_aggr_fail, 0, 1272 "Number of aggregate TX failures (subframe)"); 1273 1274 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_intr", CTLFLAG_RD, 1275 &sc->sc_stats.ast_rx_intr, 0, "RX interrupts"); 1276 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_intr", CTLFLAG_RD, 1277 &sc->sc_stats.ast_tx_intr, 0, "TX interrupts"); 1278 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mcastq_overflow", 1279 CTLFLAG_RD, &sc->sc_stats.ast_tx_mcastq_overflow, 0, 1280 "Number of multicast frames exceeding maximum mcast queue depth"); 1281 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_keymiss", CTLFLAG_RD, 1282 &sc->sc_stats.ast_rx_keymiss, 0, ""); 1283 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_swfiltered", CTLFLAG_RD, 1284 &sc->sc_stats.ast_tx_swfiltered, 0, ""); 1285 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_stbc", 1286 CTLFLAG_RD, &sc->sc_stats.ast_rx_stbc, 0, 1287 "Number of STBC frames received"); 1288 1289 /* Attach the RX phy error array */ 1290 ath_sysctl_stats_attach_rxphyerr(sc, child); 1291 1292 /* Attach the interrupt statistics array */ 1293 ath_sysctl_stats_attach_intr(sc, child); 1294 } 1295 1296 /* 1297 * This doesn't necessarily belong here (because it's HAL related, not 1298 * driver related). 1299 */ 1300 void 1301 ath_sysctl_hal_attach(struct ath_softc *sc) 1302 { 1303 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 1304 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 1305 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); 1306 1307 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "hal", CTLFLAG_RD, 1308 NULL, "Atheros HAL parameters"); 1309 child = SYSCTL_CHILDREN(tree); 1310 1311 sc->sc_ah->ah_config.ah_debug = 0; 1312 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "debug", CTLFLAG_RW, 1313 &sc->sc_ah->ah_config.ah_debug, 0, "Atheros HAL debugging printfs"); 1314 1315 sc->sc_ah->ah_config.ah_ar5416_biasadj = 0; 1316 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "ar5416_biasadj", CTLFLAG_RW, 1317 &sc->sc_ah->ah_config.ah_ar5416_biasadj, 0, 1318 "Enable 2GHz AR5416 direction sensitivity bias adjust"); 1319 1320 sc->sc_ah->ah_config.ah_dma_beacon_response_time = 2; 1321 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "dma_brt", CTLFLAG_RW, 1322 &sc->sc_ah->ah_config.ah_dma_beacon_response_time, 0, 1323 "Atheros HAL DMA beacon response time"); 1324 1325 sc->sc_ah->ah_config.ah_sw_beacon_response_time = 10; 1326 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "sw_brt", CTLFLAG_RW, 1327 &sc->sc_ah->ah_config.ah_sw_beacon_response_time, 0, 1328 "Atheros HAL software beacon response time"); 1329 1330 sc->sc_ah->ah_config.ah_additional_swba_backoff = 0; 1331 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "swba_backoff", CTLFLAG_RW, 1332 &sc->sc_ah->ah_config.ah_additional_swba_backoff, 0, 1333 "Atheros HAL additional SWBA backoff time"); 1334 1335 sc->sc_ah->ah_config.ah_force_full_reset = 0; 1336 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "force_full_reset", CTLFLAG_RW, 1337 &sc->sc_ah->ah_config.ah_force_full_reset, 0, 1338 "Force full chip reset rather than a warm reset"); 1339 1340 /* 1341 * This is initialised by the driver. 1342 */ 1343 SYSCTL_ADD_INT(ctx, child, OID_AUTO, "serialise_reg_war", CTLFLAG_RW, 1344 &sc->sc_ah->ah_config.ah_serialise_reg_war, 0, 1345 "Force register access serialisation"); 1346 } 1347