1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/module.h> 40 #include <sys/kernel.h> 41 #include <sys/lock.h> 42 #include <sys/mutex.h> 43 #include <sys/errno.h> 44 45 #include <machine/bus.h> 46 #include <machine/resource.h> 47 #include <sys/bus.h> 48 #include <sys/rman.h> 49 50 #include <sys/socket.h> 51 52 #include <net/if.h> 53 #include <net/if_media.h> 54 #include <net/if_arp.h> 55 56 #include <net80211/ieee80211_var.h> 57 58 #include <dev/ath/if_athvar.h> 59 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcireg.h> 62 63 /* 64 * PCI glue. 65 */ 66 67 struct ath_pci_softc { 68 struct ath_softc sc_sc; 69 struct resource *sc_sr; /* memory resource */ 70 struct resource *sc_irq; /* irq resource */ 71 void *sc_ih; /* interrupt handler */ 72 }; 73 74 #define BS_BAR 0x10 75 #define PCIR_RETRY_TIMEOUT 0x41 76 77 static void 78 ath_pci_setup(device_t dev) 79 { 80 /* 81 * Disable retry timeout to keep PCI Tx retries from 82 * interfering with C3 CPU state. 83 */ 84 pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1); 85 } 86 87 static int 88 ath_pci_probe(device_t dev) 89 { 90 const char* devname; 91 92 devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev)); 93 if (devname != NULL) { 94 device_set_desc(dev, devname); 95 return BUS_PROBE_DEFAULT; 96 } 97 return ENXIO; 98 } 99 100 static int 101 ath_pci_attach(device_t dev) 102 { 103 struct ath_pci_softc *psc = device_get_softc(dev); 104 struct ath_softc *sc = &psc->sc_sc; 105 int error = ENXIO; 106 int rid; 107 108 sc->sc_dev = dev; 109 110 /* 111 * Enable bus mastering. 112 */ 113 pci_enable_busmaster(dev); 114 115 /* 116 * Setup other PCI bus configuration parameters. 117 */ 118 ath_pci_setup(dev); 119 120 /* 121 * Setup memory-mapping of PCI registers. 122 */ 123 rid = BS_BAR; 124 psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 125 RF_ACTIVE); 126 if (psc->sc_sr == NULL) { 127 device_printf(dev, "cannot map register space\n"); 128 goto bad; 129 } 130 /* XXX uintptr_t is a bandaid for ia64; to be fixed */ 131 sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr); 132 sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); 133 /* 134 * Mark device invalid so any interrupts (shared or otherwise) 135 * that arrive before the HAL is setup are discarded. 136 */ 137 sc->sc_invalid = 1; 138 139 /* 140 * Arrange interrupt line. 141 */ 142 rid = 0; 143 psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 144 RF_SHAREABLE|RF_ACTIVE); 145 if (psc->sc_irq == NULL) { 146 device_printf(dev, "could not map interrupt\n"); 147 goto bad1; 148 } 149 if (bus_setup_intr(dev, psc->sc_irq, 150 INTR_TYPE_NET | INTR_MPSAFE, 151 NULL, ath_intr, sc, &psc->sc_ih)) { 152 device_printf(dev, "could not establish interrupt\n"); 153 goto bad2; 154 } 155 156 /* 157 * Setup DMA descriptor area. 158 */ 159 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 160 1, 0, /* alignment, bounds */ 161 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 162 BUS_SPACE_MAXADDR, /* highaddr */ 163 NULL, NULL, /* filter, filterarg */ 164 0x3ffff, /* maxsize XXX */ 165 ATH_MAX_SCATTER, /* nsegments */ 166 0x3ffff, /* maxsegsize XXX */ 167 BUS_DMA_ALLOCNOW, /* flags */ 168 NULL, /* lockfunc */ 169 NULL, /* lockarg */ 170 &sc->sc_dmat)) { 171 device_printf(dev, "cannot allocate DMA tag\n"); 172 goto bad3; 173 } 174 175 ATH_LOCK_INIT(sc); 176 177 error = ath_attach(pci_get_device(dev), sc); 178 if (error == 0) /* success */ 179 return 0; 180 181 ATH_LOCK_DESTROY(sc); 182 bus_dma_tag_destroy(sc->sc_dmat); 183 bad3: 184 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 185 bad2: 186 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 187 bad1: 188 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 189 bad: 190 return (error); 191 } 192 193 static int 194 ath_pci_detach(device_t dev) 195 { 196 struct ath_pci_softc *psc = device_get_softc(dev); 197 struct ath_softc *sc = &psc->sc_sc; 198 199 /* check if device was removed */ 200 sc->sc_invalid = !bus_child_present(dev); 201 202 ath_detach(sc); 203 204 bus_generic_detach(dev); 205 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 206 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 207 208 bus_dma_tag_destroy(sc->sc_dmat); 209 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 210 211 ATH_LOCK_DESTROY(sc); 212 213 return (0); 214 } 215 216 static int 217 ath_pci_shutdown(device_t dev) 218 { 219 struct ath_pci_softc *psc = device_get_softc(dev); 220 221 ath_shutdown(&psc->sc_sc); 222 return (0); 223 } 224 225 static int 226 ath_pci_suspend(device_t dev) 227 { 228 struct ath_pci_softc *psc = device_get_softc(dev); 229 230 ath_suspend(&psc->sc_sc); 231 232 return (0); 233 } 234 235 static int 236 ath_pci_resume(device_t dev) 237 { 238 struct ath_pci_softc *psc = device_get_softc(dev); 239 240 /* 241 * Suspend/resume resets the PCI configuration space. 242 */ 243 ath_pci_setup(dev); 244 245 ath_resume(&psc->sc_sc); 246 247 return (0); 248 } 249 250 static device_method_t ath_pci_methods[] = { 251 /* Device interface */ 252 DEVMETHOD(device_probe, ath_pci_probe), 253 DEVMETHOD(device_attach, ath_pci_attach), 254 DEVMETHOD(device_detach, ath_pci_detach), 255 DEVMETHOD(device_shutdown, ath_pci_shutdown), 256 DEVMETHOD(device_suspend, ath_pci_suspend), 257 DEVMETHOD(device_resume, ath_pci_resume), 258 259 { 0,0 } 260 }; 261 static driver_t ath_pci_driver = { 262 "ath", 263 ath_pci_methods, 264 sizeof (struct ath_pci_softc) 265 }; 266 static devclass_t ath_devclass; 267 DRIVER_MODULE(ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0); 268 MODULE_VERSION(ath_pci, 1); 269 MODULE_DEPEND(ath_pci, wlan, 1, 1, 1); /* 802.11 media layer */ 270 MODULE_DEPEND(ath_pci, if_ath, 1, 1, 1); /* if_ath driver */ 271