xref: /freebsd/sys/dev/ath/if_ath_pci.c (revision c96ae1968a6ab7056427a739bce81bf07447c2d4)
1 /*-
2  * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification.
11  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13  *    redistribution must be conditioned upon including a substantially
14  *    similar Disclaimer requirement for further binary redistribution.
15  * 3. Neither the names of the above-listed copyright holders nor the names
16  *    of any contributors may be used to endorse or promote products derived
17  *    from this software without specific prior written permission.
18  *
19  * Alternatively, this software may be distributed under the terms of the
20  * GNU General Public License ("GPL") version 2 as published by the Free
21  * Software Foundation.
22  *
23  * NO WARRANTY
24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
27  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
28  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
29  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34  * THE POSSIBILITY OF SUCH DAMAGES.
35  */
36 
37 #include <sys/cdefs.h>
38 __FBSDID("$FreeBSD$");
39 
40 /*
41  * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
42  */
43 
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/module.h>
47 #include <sys/kernel.h>
48 #include <sys/lock.h>
49 #include <sys/mutex.h>
50 #include <sys/errno.h>
51 
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <sys/bus.h>
55 #include <sys/rman.h>
56 
57 #include <sys/socket.h>
58 
59 #include <net/if.h>
60 #include <net/if_media.h>
61 #include <net/if_arp.h>
62 
63 #include <net80211/ieee80211_var.h>
64 
65 #include <dev/ath/if_athvar.h>
66 #include <contrib/dev/ath/ah.h>
67 
68 #include <dev/pci/pcivar.h>
69 #include <dev/pci/pcireg.h>
70 
71 /*
72  * PCI glue.
73  */
74 
75 struct ath_pci_softc {
76 	struct ath_softc	sc_sc;
77 	struct resource		*sc_sr;		/* memory resource */
78 	struct resource		*sc_irq;	/* irq resource */
79 	void			*sc_ih;		/* interrupt handler */
80 };
81 
82 #define	BS_BAR	0x10
83 #define	PCIR_RETRY_TIMEOUT	0x41
84 
85 static int
86 ath_pci_probe(device_t dev)
87 {
88 	const char* devname;
89 
90 	devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev));
91 	if (devname != NULL) {
92 		device_set_desc(dev, devname);
93 		return BUS_PROBE_DEFAULT;
94 	}
95 	return ENXIO;
96 }
97 
98 static u_int32_t
99 ath_pci_setup(device_t dev)
100 {
101 	u_int32_t cmd;
102 
103 	/*
104 	 * Enable memory mapping and bus mastering.
105 	 */
106 	cmd = pci_read_config(dev, PCIR_COMMAND, 4);
107 	cmd |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN;
108 	pci_write_config(dev, PCIR_COMMAND, cmd, 4);
109 	cmd = pci_read_config(dev, PCIR_COMMAND, 4);
110 	if ((cmd & PCIM_CMD_MEMEN) == 0) {
111 		device_printf(dev, "failed to enable memory mapping\n");
112 		return 0;
113 	}
114 	if ((cmd & PCIM_CMD_BUSMASTEREN) == 0) {
115 		device_printf(dev, "failed to enable bus mastering\n");
116 		return 0;
117 	}
118 
119 	/*
120 	 * Disable retry timeout to keep PCI Tx retries from
121 	 * interfering with C3 CPU state.
122 	 */
123 	pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
124 
125 	return 1;
126 }
127 
128 static int
129 ath_pci_attach(device_t dev)
130 {
131 	struct ath_pci_softc *psc = device_get_softc(dev);
132 	struct ath_softc *sc = &psc->sc_sc;
133 	int error = ENXIO;
134 	int rid;
135 
136 	sc->sc_dev = dev;
137 
138 	if (!ath_pci_setup(dev))
139 		goto bad;
140 
141 	/*
142 	 * Setup memory-mapping of PCI registers.
143 	 */
144 	rid = BS_BAR;
145 	psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
146 					    RF_ACTIVE);
147 	if (psc->sc_sr == NULL) {
148 		device_printf(dev, "cannot map register space\n");
149 		goto bad;
150 	}
151 	/* XXX uintptr_t is a bandaid for ia64; to be fixed */
152 	sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr);
153 	sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr);
154 	/*
155 	 * Mark device invalid so any interrupts (shared or otherwise)
156 	 * that arrive before the HAL is setup are discarded.
157 	 */
158 	sc->sc_invalid = 1;
159 
160 	/*
161 	 * Arrange interrupt line.
162 	 */
163 	rid = 0;
164 	psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
165 					     RF_SHAREABLE|RF_ACTIVE);
166 	if (psc->sc_irq == NULL) {
167 		device_printf(dev, "could not map interrupt\n");
168 		goto bad1;
169 	}
170 	if (bus_setup_intr(dev, psc->sc_irq,
171 			   INTR_TYPE_NET | INTR_MPSAFE,
172 			   ath_intr, sc, &psc->sc_ih)) {
173 		device_printf(dev, "could not establish interrupt\n");
174 		goto bad2;
175 	}
176 
177 	/*
178 	 * Setup DMA descriptor area.
179 	 */
180 	if (bus_dma_tag_create(bus_get_dma_tag(dev),	/* parent */
181 			       1, 0,			/* alignment, bounds */
182 			       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
183 			       BUS_SPACE_MAXADDR,	/* highaddr */
184 			       NULL, NULL,		/* filter, filterarg */
185 			       0x3ffff,			/* maxsize XXX */
186 			       ATH_MAX_SCATTER,		/* nsegments */
187 			       0x3ffff,			/* maxsegsize XXX */
188 			       BUS_DMA_ALLOCNOW,	/* flags */
189 			       NULL,			/* lockfunc */
190 			       NULL,			/* lockarg */
191 			       &sc->sc_dmat)) {
192 		device_printf(dev, "cannot allocate DMA tag\n");
193 		goto bad3;
194 	}
195 
196 	ATH_LOCK_INIT(sc);
197 
198 	error = ath_attach(pci_get_device(dev), sc);
199 	if (error == 0)					/* success */
200 		return 0;
201 
202 	ATH_LOCK_DESTROY(sc);
203 	bus_dma_tag_destroy(sc->sc_dmat);
204 bad3:
205 	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
206 bad2:
207 	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
208 bad1:
209 	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
210 bad:
211 	return (error);
212 }
213 
214 static int
215 ath_pci_detach(device_t dev)
216 {
217 	struct ath_pci_softc *psc = device_get_softc(dev);
218 	struct ath_softc *sc = &psc->sc_sc;
219 
220 	/* check if device was removed */
221 	sc->sc_invalid = !bus_child_present(dev);
222 
223 	ath_detach(sc);
224 
225 	bus_generic_detach(dev);
226 	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
227 	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
228 
229 	bus_dma_tag_destroy(sc->sc_dmat);
230 	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
231 
232 	ATH_LOCK_DESTROY(sc);
233 
234 	return (0);
235 }
236 
237 static int
238 ath_pci_shutdown(device_t dev)
239 {
240 	struct ath_pci_softc *psc = device_get_softc(dev);
241 
242 	ath_shutdown(&psc->sc_sc);
243 	return (0);
244 }
245 
246 static int
247 ath_pci_suspend(device_t dev)
248 {
249 	struct ath_pci_softc *psc = device_get_softc(dev);
250 
251 	ath_suspend(&psc->sc_sc);
252 
253 	return (0);
254 }
255 
256 static int
257 ath_pci_resume(device_t dev)
258 {
259 	struct ath_pci_softc *psc = device_get_softc(dev);
260 
261 	if (!ath_pci_setup(dev))
262 		return ENXIO;
263 
264 	ath_resume(&psc->sc_sc);
265 
266 	return (0);
267 }
268 
269 static device_method_t ath_pci_methods[] = {
270 	/* Device interface */
271 	DEVMETHOD(device_probe,		ath_pci_probe),
272 	DEVMETHOD(device_attach,	ath_pci_attach),
273 	DEVMETHOD(device_detach,	ath_pci_detach),
274 	DEVMETHOD(device_shutdown,	ath_pci_shutdown),
275 	DEVMETHOD(device_suspend,	ath_pci_suspend),
276 	DEVMETHOD(device_resume,	ath_pci_resume),
277 
278 	{ 0,0 }
279 };
280 static driver_t ath_pci_driver = {
281 	"ath",
282 	ath_pci_methods,
283 	sizeof (struct ath_pci_softc)
284 };
285 static	devclass_t ath_devclass;
286 DRIVER_MODULE(if_ath, pci, ath_pci_driver, ath_devclass, 0, 0);
287 DRIVER_MODULE(if_ath, cardbus, ath_pci_driver, ath_devclass, 0, 0);
288 MODULE_VERSION(if_ath, 1);
289 MODULE_DEPEND(if_ath, ath_hal, 1, 1, 1);	/* Atheros HAL */
290 MODULE_DEPEND(if_ath, wlan, 1, 1, 1);		/* 802.11 media layer */
291 MODULE_DEPEND(if_ath, ath_rate, 1, 1, 1);	/* rate control algorithm */
292