1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/module.h> 40 #include <sys/kernel.h> 41 #include <sys/lock.h> 42 #include <sys/mutex.h> 43 #include <sys/errno.h> 44 45 #include <machine/bus.h> 46 #include <machine/resource.h> 47 #include <sys/bus.h> 48 #include <sys/rman.h> 49 50 #include <sys/socket.h> 51 52 #include <net/if.h> 53 #include <net/if_media.h> 54 #include <net/if_arp.h> 55 56 #include <net80211/ieee80211_var.h> 57 58 #include <dev/ath/if_athvar.h> 59 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcireg.h> 62 63 /* 64 * PCI glue. 65 */ 66 67 struct ath_pci_softc { 68 struct ath_softc sc_sc; 69 struct resource *sc_sr; /* memory resource */ 70 struct resource *sc_irq; /* irq resource */ 71 void *sc_ih; /* interrupt handler */ 72 }; 73 74 #define BS_BAR 0x10 75 #define PCIR_RETRY_TIMEOUT 0x41 76 #define PCIR_CFG_PMCSR 0x48 77 78 static void 79 ath_pci_setup(device_t dev) 80 { 81 /* Override the system latency timer */ 82 pci_write_config(dev, PCIR_LATTIMER, 0x80, 1); 83 84 /* If a PCI NIC, force wakeup */ 85 #ifdef ATH_PCI_WAKEUP_WAR 86 /* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */ 87 if (1) { 88 uint16_t pmcsr; 89 pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2); 90 pmcsr |= 3; 91 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 92 pmcsr &= ~3; 93 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 94 } 95 #endif 96 97 /* 98 * Disable retry timeout to keep PCI Tx retries from 99 * interfering with C3 CPU state. 100 */ 101 pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1); 102 } 103 104 static int 105 ath_pci_probe(device_t dev) 106 { 107 const char* devname; 108 109 devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev)); 110 if (devname != NULL) { 111 device_set_desc(dev, devname); 112 return BUS_PROBE_DEFAULT; 113 } 114 return ENXIO; 115 } 116 117 static int 118 ath_pci_attach(device_t dev) 119 { 120 struct ath_pci_softc *psc = device_get_softc(dev); 121 struct ath_softc *sc = &psc->sc_sc; 122 int error = ENXIO; 123 int rid; 124 125 sc->sc_dev = dev; 126 127 /* 128 * Enable bus mastering. 129 */ 130 pci_enable_busmaster(dev); 131 132 /* 133 * Setup other PCI bus configuration parameters. 134 */ 135 ath_pci_setup(dev); 136 137 /* 138 * Setup memory-mapping of PCI registers. 139 */ 140 rid = BS_BAR; 141 psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 142 RF_ACTIVE); 143 if (psc->sc_sr == NULL) { 144 device_printf(dev, "cannot map register space\n"); 145 goto bad; 146 } 147 /* XXX uintptr_t is a bandaid for ia64; to be fixed */ 148 sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr); 149 sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); 150 /* 151 * Mark device invalid so any interrupts (shared or otherwise) 152 * that arrive before the HAL is setup are discarded. 153 */ 154 sc->sc_invalid = 1; 155 156 /* 157 * Arrange interrupt line. 158 */ 159 rid = 0; 160 psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 161 RF_SHAREABLE|RF_ACTIVE); 162 if (psc->sc_irq == NULL) { 163 device_printf(dev, "could not map interrupt\n"); 164 goto bad1; 165 } 166 if (bus_setup_intr(dev, psc->sc_irq, 167 INTR_TYPE_NET | INTR_MPSAFE, 168 NULL, ath_intr, sc, &psc->sc_ih)) { 169 device_printf(dev, "could not establish interrupt\n"); 170 goto bad2; 171 } 172 173 /* 174 * Setup DMA descriptor area. 175 */ 176 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 177 1, 0, /* alignment, bounds */ 178 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 179 BUS_SPACE_MAXADDR, /* highaddr */ 180 NULL, NULL, /* filter, filterarg */ 181 0x3ffff, /* maxsize XXX */ 182 ATH_MAX_SCATTER, /* nsegments */ 183 0x3ffff, /* maxsegsize XXX */ 184 BUS_DMA_ALLOCNOW, /* flags */ 185 NULL, /* lockfunc */ 186 NULL, /* lockarg */ 187 &sc->sc_dmat)) { 188 device_printf(dev, "cannot allocate DMA tag\n"); 189 goto bad3; 190 } 191 192 ATH_LOCK_INIT(sc); 193 ATH_PCU_LOCK_INIT(sc); 194 195 error = ath_attach(pci_get_device(dev), sc); 196 if (error == 0) /* success */ 197 return 0; 198 199 ATH_PCU_LOCK_DESTROY(sc); 200 ATH_LOCK_DESTROY(sc); 201 bus_dma_tag_destroy(sc->sc_dmat); 202 bad3: 203 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 204 bad2: 205 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 206 bad1: 207 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 208 bad: 209 return (error); 210 } 211 212 static int 213 ath_pci_detach(device_t dev) 214 { 215 struct ath_pci_softc *psc = device_get_softc(dev); 216 struct ath_softc *sc = &psc->sc_sc; 217 218 /* check if device was removed */ 219 sc->sc_invalid = !bus_child_present(dev); 220 221 /* 222 * Do a config read to clear pre-existing pci error status. 223 */ 224 (void) pci_read_config(dev, PCIR_COMMAND, 4); 225 226 ath_detach(sc); 227 228 bus_generic_detach(dev); 229 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 230 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 231 232 bus_dma_tag_destroy(sc->sc_dmat); 233 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 234 235 ATH_PCU_LOCK_DESTROY(sc); 236 ATH_LOCK_DESTROY(sc); 237 238 return (0); 239 } 240 241 static int 242 ath_pci_shutdown(device_t dev) 243 { 244 struct ath_pci_softc *psc = device_get_softc(dev); 245 246 ath_shutdown(&psc->sc_sc); 247 return (0); 248 } 249 250 static int 251 ath_pci_suspend(device_t dev) 252 { 253 struct ath_pci_softc *psc = device_get_softc(dev); 254 255 ath_suspend(&psc->sc_sc); 256 257 return (0); 258 } 259 260 static int 261 ath_pci_resume(device_t dev) 262 { 263 struct ath_pci_softc *psc = device_get_softc(dev); 264 265 /* 266 * Suspend/resume resets the PCI configuration space. 267 */ 268 ath_pci_setup(dev); 269 270 ath_resume(&psc->sc_sc); 271 272 return (0); 273 } 274 275 static device_method_t ath_pci_methods[] = { 276 /* Device interface */ 277 DEVMETHOD(device_probe, ath_pci_probe), 278 DEVMETHOD(device_attach, ath_pci_attach), 279 DEVMETHOD(device_detach, ath_pci_detach), 280 DEVMETHOD(device_shutdown, ath_pci_shutdown), 281 DEVMETHOD(device_suspend, ath_pci_suspend), 282 DEVMETHOD(device_resume, ath_pci_resume), 283 284 { 0,0 } 285 }; 286 static driver_t ath_pci_driver = { 287 "ath", 288 ath_pci_methods, 289 sizeof (struct ath_pci_softc) 290 }; 291 static devclass_t ath_devclass; 292 DRIVER_MODULE(ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0); 293 MODULE_VERSION(ath_pci, 1); 294 MODULE_DEPEND(ath_pci, wlan, 1, 1, 1); /* 802.11 media layer */ 295 MODULE_DEPEND(ath_pci, if_ath, 1, 1, 1); /* if_ath driver */ 296