xref: /freebsd/sys/dev/ath/if_ath_pci.c (revision 35a04710d7286aa9538917fd7f8e417dbee95b82)
1 /*-
2  * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification.
11  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13  *    redistribution must be conditioned upon including a substantially
14  *    similar Disclaimer requirement for further binary redistribution.
15  *
16  * NO WARRANTY
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27  * THE POSSIBILITY OF SUCH DAMAGES.
28  */
29 
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 /*
34  * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
35  */
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/module.h>
40 #include <sys/kernel.h>
41 #include <sys/lock.h>
42 #include <sys/mutex.h>
43 #include <sys/errno.h>
44 
45 #include <machine/bus.h>
46 #include <machine/resource.h>
47 #include <sys/bus.h>
48 #include <sys/rman.h>
49 
50 #include <sys/socket.h>
51 
52 #include <net/if.h>
53 #include <net/if_media.h>
54 #include <net/if_arp.h>
55 
56 #include <net80211/ieee80211_var.h>
57 
58 #include <dev/ath/if_athvar.h>
59 #include <contrib/dev/ath/ah.h>
60 
61 #include <dev/pci/pcivar.h>
62 #include <dev/pci/pcireg.h>
63 
64 /*
65  * PCI glue.
66  */
67 
68 struct ath_pci_softc {
69 	struct ath_softc	sc_sc;
70 	struct resource		*sc_sr;		/* memory resource */
71 	struct resource		*sc_irq;	/* irq resource */
72 	void			*sc_ih;		/* interrupt handler */
73 };
74 
75 #define	BS_BAR	0x10
76 #define	PCIR_RETRY_TIMEOUT	0x41
77 
78 static int
79 ath_pci_probe(device_t dev)
80 {
81 	const char* devname;
82 
83 	devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev));
84 	if (devname != NULL) {
85 		device_set_desc(dev, devname);
86 		return BUS_PROBE_DEFAULT;
87 	}
88 	return ENXIO;
89 }
90 
91 static int
92 ath_pci_attach(device_t dev)
93 {
94 	struct ath_pci_softc *psc = device_get_softc(dev);
95 	struct ath_softc *sc = &psc->sc_sc;
96 	int error = ENXIO;
97 	int rid;
98 
99 	sc->sc_dev = dev;
100 
101 	/*
102 	 * Enable bus mastering.
103 	 */
104 	pci_enable_busmaster(dev);
105 
106 	/*
107 	 * Disable retry timeout to keep PCI Tx retries from
108 	 * interfering with C3 CPU state.
109 	 */
110 	pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
111 
112 	/*
113 	 * Setup memory-mapping of PCI registers.
114 	 */
115 	rid = BS_BAR;
116 	psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
117 					    RF_ACTIVE);
118 	if (psc->sc_sr == NULL) {
119 		device_printf(dev, "cannot map register space\n");
120 		goto bad;
121 	}
122 	/* XXX uintptr_t is a bandaid for ia64; to be fixed */
123 	sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr);
124 	sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr);
125 	/*
126 	 * Mark device invalid so any interrupts (shared or otherwise)
127 	 * that arrive before the HAL is setup are discarded.
128 	 */
129 	sc->sc_invalid = 1;
130 
131 	/*
132 	 * Arrange interrupt line.
133 	 */
134 	rid = 0;
135 	psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
136 					     RF_SHAREABLE|RF_ACTIVE);
137 	if (psc->sc_irq == NULL) {
138 		device_printf(dev, "could not map interrupt\n");
139 		goto bad1;
140 	}
141 	if (bus_setup_intr(dev, psc->sc_irq,
142 			   INTR_TYPE_NET | INTR_MPSAFE,
143 			   NULL, ath_intr, sc, &psc->sc_ih)) {
144 		device_printf(dev, "could not establish interrupt\n");
145 		goto bad2;
146 	}
147 
148 	/*
149 	 * Setup DMA descriptor area.
150 	 */
151 	if (bus_dma_tag_create(bus_get_dma_tag(dev),	/* parent */
152 			       1, 0,			/* alignment, bounds */
153 			       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
154 			       BUS_SPACE_MAXADDR,	/* highaddr */
155 			       NULL, NULL,		/* filter, filterarg */
156 			       0x3ffff,			/* maxsize XXX */
157 			       ATH_MAX_SCATTER,		/* nsegments */
158 			       0x3ffff,			/* maxsegsize XXX */
159 			       BUS_DMA_ALLOCNOW,	/* flags */
160 			       NULL,			/* lockfunc */
161 			       NULL,			/* lockarg */
162 			       &sc->sc_dmat)) {
163 		device_printf(dev, "cannot allocate DMA tag\n");
164 		goto bad3;
165 	}
166 
167 	ATH_LOCK_INIT(sc);
168 
169 	error = ath_attach(pci_get_device(dev), sc);
170 	if (error == 0)					/* success */
171 		return 0;
172 
173 	ATH_LOCK_DESTROY(sc);
174 	bus_dma_tag_destroy(sc->sc_dmat);
175 bad3:
176 	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
177 bad2:
178 	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
179 bad1:
180 	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
181 bad:
182 	return (error);
183 }
184 
185 static int
186 ath_pci_detach(device_t dev)
187 {
188 	struct ath_pci_softc *psc = device_get_softc(dev);
189 	struct ath_softc *sc = &psc->sc_sc;
190 
191 	/* check if device was removed */
192 	sc->sc_invalid = !bus_child_present(dev);
193 
194 	ath_detach(sc);
195 
196 	bus_generic_detach(dev);
197 	bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
198 	bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
199 
200 	bus_dma_tag_destroy(sc->sc_dmat);
201 	bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
202 
203 	ATH_LOCK_DESTROY(sc);
204 
205 	return (0);
206 }
207 
208 static int
209 ath_pci_shutdown(device_t dev)
210 {
211 	struct ath_pci_softc *psc = device_get_softc(dev);
212 
213 	ath_shutdown(&psc->sc_sc);
214 	return (0);
215 }
216 
217 static int
218 ath_pci_suspend(device_t dev)
219 {
220 	struct ath_pci_softc *psc = device_get_softc(dev);
221 
222 	ath_suspend(&psc->sc_sc);
223 
224 	return (0);
225 }
226 
227 static int
228 ath_pci_resume(device_t dev)
229 {
230 	struct ath_pci_softc *psc = device_get_softc(dev);
231 
232 	ath_resume(&psc->sc_sc);
233 
234 	return (0);
235 }
236 
237 static device_method_t ath_pci_methods[] = {
238 	/* Device interface */
239 	DEVMETHOD(device_probe,		ath_pci_probe),
240 	DEVMETHOD(device_attach,	ath_pci_attach),
241 	DEVMETHOD(device_detach,	ath_pci_detach),
242 	DEVMETHOD(device_shutdown,	ath_pci_shutdown),
243 	DEVMETHOD(device_suspend,	ath_pci_suspend),
244 	DEVMETHOD(device_resume,	ath_pci_resume),
245 
246 	{ 0,0 }
247 };
248 static driver_t ath_pci_driver = {
249 	"ath",
250 	ath_pci_methods,
251 	sizeof (struct ath_pci_softc)
252 };
253 static	devclass_t ath_devclass;
254 DRIVER_MODULE(if_ath, pci, ath_pci_driver, ath_devclass, 0, 0);
255 DRIVER_MODULE(if_ath, cardbus, ath_pci_driver, ath_devclass, 0, 0);
256 MODULE_VERSION(if_ath, 1);
257 MODULE_DEPEND(if_ath, ath_hal, 1, 1, 1);	/* Atheros HAL */
258 MODULE_DEPEND(if_ath, wlan, 1, 1, 1);		/* 802.11 media layer */
259 MODULE_DEPEND(if_ath, ath_rate, 1, 1, 1);	/* rate control algorithm */
260