15591b213SSam Leffler /*- 2b032f27cSSam Leffler * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 35591b213SSam Leffler * All rights reserved. 45591b213SSam Leffler * 55591b213SSam Leffler * Redistribution and use in source and binary forms, with or without 65591b213SSam Leffler * modification, are permitted provided that the following conditions 75591b213SSam Leffler * are met: 85591b213SSam Leffler * 1. Redistributions of source code must retain the above copyright 95591b213SSam Leffler * notice, this list of conditions and the following disclaimer, 105591b213SSam Leffler * without modification. 115591b213SSam Leffler * 2. Redistributions in binary form must reproduce at minimum a disclaimer 125591b213SSam Leffler * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 135591b213SSam Leffler * redistribution must be conditioned upon including a substantially 145591b213SSam Leffler * similar Disclaimer requirement for further binary redistribution. 155591b213SSam Leffler * 165591b213SSam Leffler * NO WARRANTY 175591b213SSam Leffler * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 185591b213SSam Leffler * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 195591b213SSam Leffler * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 205591b213SSam Leffler * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 215591b213SSam Leffler * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 225591b213SSam Leffler * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 235591b213SSam Leffler * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 245591b213SSam Leffler * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 255591b213SSam Leffler * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 265591b213SSam Leffler * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 275591b213SSam Leffler * THE POSSIBILITY OF SUCH DAMAGES. 285591b213SSam Leffler */ 295591b213SSam Leffler 305591b213SSam Leffler #include <sys/cdefs.h> 315591b213SSam Leffler __FBSDID("$FreeBSD$"); 325591b213SSam Leffler 335591b213SSam Leffler /* 345591b213SSam Leffler * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 355591b213SSam Leffler */ 3679f57b35SAdrian Chadd #include "opt_ath.h" 375591b213SSam Leffler 385591b213SSam Leffler #include <sys/param.h> 395591b213SSam Leffler #include <sys/systm.h> 40*c3322cb9SGleb Smirnoff #include <sys/malloc.h> 415591b213SSam Leffler #include <sys/module.h> 425591b213SSam Leffler #include <sys/kernel.h> 435591b213SSam Leffler #include <sys/lock.h> 445591b213SSam Leffler #include <sys/mutex.h> 455591b213SSam Leffler #include <sys/errno.h> 465591b213SSam Leffler 475591b213SSam Leffler #include <machine/bus.h> 485591b213SSam Leffler #include <machine/resource.h> 495591b213SSam Leffler #include <sys/bus.h> 505591b213SSam Leffler #include <sys/rman.h> 515591b213SSam Leffler 52c42a7b7eSSam Leffler #include <sys/socket.h> 53c42a7b7eSSam Leffler 545591b213SSam Leffler #include <net/if.h> 555591b213SSam Leffler #include <net/if_media.h> 565591b213SSam Leffler #include <net/if_arp.h> 57*c3322cb9SGleb Smirnoff #include <net/ethernet.h> 585591b213SSam Leffler 595591b213SSam Leffler #include <net80211/ieee80211_var.h> 605591b213SSam Leffler 615591b213SSam Leffler #include <dev/ath/if_athvar.h> 625591b213SSam Leffler 635591b213SSam Leffler #include <dev/pci/pcivar.h> 645591b213SSam Leffler #include <dev/pci/pcireg.h> 655591b213SSam Leffler 660f60da6fSAdrian Chadd /* For EEPROM firmware */ 670f60da6fSAdrian Chadd #ifdef ATH_EEPROM_FIRMWARE 680f60da6fSAdrian Chadd #include <sys/linker.h> 690f60da6fSAdrian Chadd #include <sys/firmware.h> 700f60da6fSAdrian Chadd #endif /* ATH_EEPROM_FIRMWARE */ 710f60da6fSAdrian Chadd 725591b213SSam Leffler /* 735591b213SSam Leffler * PCI glue. 745591b213SSam Leffler */ 755591b213SSam Leffler 765591b213SSam Leffler struct ath_pci_softc { 775591b213SSam Leffler struct ath_softc sc_sc; 785591b213SSam Leffler struct resource *sc_sr; /* memory resource */ 795591b213SSam Leffler struct resource *sc_irq; /* irq resource */ 80c42a7b7eSSam Leffler void *sc_ih; /* interrupt handler */ 815591b213SSam Leffler }; 825591b213SSam Leffler 835591b213SSam Leffler #define BS_BAR 0x10 840b19ce1eSSam Leffler #define PCIR_RETRY_TIMEOUT 0x41 852c0dd4bbSAdrian Chadd #define PCIR_CFG_PMCSR 0x48 865591b213SSam Leffler 87b890549dSAdrian Chadd #define DEFAULT_CACHESIZE 32 88b890549dSAdrian Chadd 89cdd36f96SAdrian Chadd static void 90cdd36f96SAdrian Chadd ath_pci_setup(device_t dev) 91cdd36f96SAdrian Chadd { 92b890549dSAdrian Chadd uint8_t cz; 93b890549dSAdrian Chadd 94b890549dSAdrian Chadd /* XXX TODO: need to override the _system_ saved copies of this */ 95b890549dSAdrian Chadd 96b890549dSAdrian Chadd /* 97b890549dSAdrian Chadd * If the cache line size is 0, force it to a reasonable 98b890549dSAdrian Chadd * value. 99b890549dSAdrian Chadd */ 100b890549dSAdrian Chadd cz = pci_read_config(dev, PCIR_CACHELNSZ, 1); 101b890549dSAdrian Chadd if (cz == 0) { 102b890549dSAdrian Chadd pci_write_config(dev, PCIR_CACHELNSZ, 103b890549dSAdrian Chadd DEFAULT_CACHESIZE / 4, 1); 104b890549dSAdrian Chadd } 105b890549dSAdrian Chadd 1062c0dd4bbSAdrian Chadd /* Override the system latency timer */ 107b890549dSAdrian Chadd pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1); 1082c0dd4bbSAdrian Chadd 1092c0dd4bbSAdrian Chadd /* If a PCI NIC, force wakeup */ 1102c0dd4bbSAdrian Chadd #ifdef ATH_PCI_WAKEUP_WAR 1112c0dd4bbSAdrian Chadd /* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */ 1122c0dd4bbSAdrian Chadd if (1) { 1132c0dd4bbSAdrian Chadd uint16_t pmcsr; 1142c0dd4bbSAdrian Chadd pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2); 1152c0dd4bbSAdrian Chadd pmcsr |= 3; 1162c0dd4bbSAdrian Chadd pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 1172c0dd4bbSAdrian Chadd pmcsr &= ~3; 1182c0dd4bbSAdrian Chadd pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 1192c0dd4bbSAdrian Chadd } 1202c0dd4bbSAdrian Chadd #endif 1212c0dd4bbSAdrian Chadd 122cdd36f96SAdrian Chadd /* 123cdd36f96SAdrian Chadd * Disable retry timeout to keep PCI Tx retries from 124cdd36f96SAdrian Chadd * interfering with C3 CPU state. 125cdd36f96SAdrian Chadd */ 126cdd36f96SAdrian Chadd pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1); 127cdd36f96SAdrian Chadd } 128cdd36f96SAdrian Chadd 1295591b213SSam Leffler static int 1305591b213SSam Leffler ath_pci_probe(device_t dev) 1315591b213SSam Leffler { 1325591b213SSam Leffler const char* devname; 1335591b213SSam Leffler 1345591b213SSam Leffler devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev)); 135c42a7b7eSSam Leffler if (devname != NULL) { 1365591b213SSam Leffler device_set_desc(dev, devname); 13753ee7173SWarner Losh return BUS_PROBE_DEFAULT; 1385591b213SSam Leffler } 1395591b213SSam Leffler return ENXIO; 1405591b213SSam Leffler } 1415591b213SSam Leffler 1425591b213SSam Leffler static int 1435591b213SSam Leffler ath_pci_attach(device_t dev) 1445591b213SSam Leffler { 1455591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 1465591b213SSam Leffler struct ath_softc *sc = &psc->sc_sc; 1475591b213SSam Leffler int error = ENXIO; 1485591b213SSam Leffler int rid; 1490f60da6fSAdrian Chadd #ifdef ATH_EEPROM_FIRMWARE 1500f60da6fSAdrian Chadd const struct firmware *fw = NULL; 1510f60da6fSAdrian Chadd const char *buf; 1520f60da6fSAdrian Chadd #endif 1535591b213SSam Leffler 1545591b213SSam Leffler sc->sc_dev = dev; 1555591b213SSam Leffler 156e3e2d9bfSKevin Lo /* 157e3e2d9bfSKevin Lo * Enable bus mastering. 158e3e2d9bfSKevin Lo */ 159e3e2d9bfSKevin Lo pci_enable_busmaster(dev); 160e3e2d9bfSKevin Lo 161e3e2d9bfSKevin Lo /* 162cdd36f96SAdrian Chadd * Setup other PCI bus configuration parameters. 163e3e2d9bfSKevin Lo */ 164cdd36f96SAdrian Chadd ath_pci_setup(dev); 1655591b213SSam Leffler 1665591b213SSam Leffler /* 1675591b213SSam Leffler * Setup memory-mapping of PCI registers. 1685591b213SSam Leffler */ 1695591b213SSam Leffler rid = BS_BAR; 1705f96beb9SNate Lawson psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 1715f96beb9SNate Lawson RF_ACTIVE); 1725591b213SSam Leffler if (psc->sc_sr == NULL) { 1735591b213SSam Leffler device_printf(dev, "cannot map register space\n"); 1745591b213SSam Leffler goto bad; 1755591b213SSam Leffler } 176465c8d67SSam Leffler /* XXX uintptr_t is a bandaid for ia64; to be fixed */ 177465c8d67SSam Leffler sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr); 178f9fc583fSSam Leffler sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); 179b58b3803SSam Leffler /* 180b58b3803SSam Leffler * Mark device invalid so any interrupts (shared or otherwise) 181b58b3803SSam Leffler * that arrive before the HAL is setup are discarded. 182b58b3803SSam Leffler */ 183b58b3803SSam Leffler sc->sc_invalid = 1; 1845591b213SSam Leffler 1855591b213SSam Leffler /* 1865591b213SSam Leffler * Arrange interrupt line. 1875591b213SSam Leffler */ 1885591b213SSam Leffler rid = 0; 1895f96beb9SNate Lawson psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 1905f96beb9SNate Lawson RF_SHAREABLE|RF_ACTIVE); 1915591b213SSam Leffler if (psc->sc_irq == NULL) { 1925591b213SSam Leffler device_printf(dev, "could not map interrupt\n"); 1935591b213SSam Leffler goto bad1; 1945591b213SSam Leffler } 1955591b213SSam Leffler if (bus_setup_intr(dev, psc->sc_irq, 1965591b213SSam Leffler INTR_TYPE_NET | INTR_MPSAFE, 197ef544f63SPaolo Pisati NULL, ath_intr, sc, &psc->sc_ih)) { 1985591b213SSam Leffler device_printf(dev, "could not establish interrupt\n"); 1995591b213SSam Leffler goto bad2; 2005591b213SSam Leffler } 2015591b213SSam Leffler 2025591b213SSam Leffler /* 2035591b213SSam Leffler * Setup DMA descriptor area. 2045591b213SSam Leffler */ 205c2175ff5SMarius Strobl if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 2065591b213SSam Leffler 1, 0, /* alignment, bounds */ 2075591b213SSam Leffler BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 2085591b213SSam Leffler BUS_SPACE_MAXADDR, /* highaddr */ 2095591b213SSam Leffler NULL, NULL, /* filter, filterarg */ 2105591b213SSam Leffler 0x3ffff, /* maxsize XXX */ 2115591b213SSam Leffler ATH_MAX_SCATTER, /* nsegments */ 2126ccb8ea7SSam Leffler 0x3ffff, /* maxsegsize XXX */ 2135591b213SSam Leffler BUS_DMA_ALLOCNOW, /* flags */ 214f6b1c44dSScott Long NULL, /* lockfunc */ 215f6b1c44dSScott Long NULL, /* lockarg */ 2165591b213SSam Leffler &sc->sc_dmat)) { 2175591b213SSam Leffler device_printf(dev, "cannot allocate DMA tag\n"); 2185591b213SSam Leffler goto bad3; 2195591b213SSam Leffler } 2205591b213SSam Leffler 2210f60da6fSAdrian Chadd #ifdef ATH_EEPROM_FIRMWARE 2220f60da6fSAdrian Chadd /* 2230f60da6fSAdrian Chadd * If there's an EEPROM firmware image, load that in. 2240f60da6fSAdrian Chadd */ 2250f60da6fSAdrian Chadd if (resource_string_value(device_get_name(dev), device_get_unit(dev), 2260f60da6fSAdrian Chadd "eeprom_firmware", &buf) == 0) { 2270f60da6fSAdrian Chadd if (bootverbose) 2280f60da6fSAdrian Chadd device_printf(dev, "%s: looking up firmware @ '%s'\n", 2290f60da6fSAdrian Chadd __func__, buf); 2300f60da6fSAdrian Chadd 2310f60da6fSAdrian Chadd fw = firmware_get(buf); 2320f60da6fSAdrian Chadd if (fw == NULL) { 2330f60da6fSAdrian Chadd device_printf(dev, "%s: couldn't find firmware\n", 2340f60da6fSAdrian Chadd __func__); 2350f60da6fSAdrian Chadd goto bad3; 2360f60da6fSAdrian Chadd } 2370f60da6fSAdrian Chadd 2380f60da6fSAdrian Chadd device_printf(dev, "%s: EEPROM firmware @ %p\n", 2390f60da6fSAdrian Chadd __func__, fw->data); 2400f60da6fSAdrian Chadd sc->sc_eepromdata = 2410f60da6fSAdrian Chadd malloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO); 2420f60da6fSAdrian Chadd if (! sc->sc_eepromdata) { 2430f60da6fSAdrian Chadd device_printf(dev, "%s: can't malloc eepromdata\n", 2440f60da6fSAdrian Chadd __func__); 2450f60da6fSAdrian Chadd goto bad3; 2460f60da6fSAdrian Chadd } 2470f60da6fSAdrian Chadd memcpy(sc->sc_eepromdata, fw->data, fw->datasize); 2480f60da6fSAdrian Chadd firmware_put(fw, 0); 2490f60da6fSAdrian Chadd } 2500f60da6fSAdrian Chadd #endif /* ATH_EEPROM_FIRMWARE */ 2510f60da6fSAdrian Chadd 252f0b2a0beSSam Leffler ATH_LOCK_INIT(sc); 2533dd85b26SAdrian Chadd ATH_PCU_LOCK_INIT(sc); 2542fe91baaSAdrian Chadd ATH_RX_LOCK_INIT(sc); 2551b5c5f5aSAdrian Chadd ATH_TX_LOCK_INIT(sc); 2561b3502e5SAdrian Chadd ATH_TX_IC_LOCK_INIT(sc); 25754c99795SAdrian Chadd ATH_TXSTATUS_LOCK_INIT(sc); 2585591b213SSam Leffler 2595591b213SSam Leffler error = ath_attach(pci_get_device(dev), sc); 26030e218c0SSam Leffler if (error == 0) /* success */ 26130e218c0SSam Leffler return 0; 2625591b213SSam Leffler 26354c99795SAdrian Chadd ATH_TXSTATUS_LOCK_DESTROY(sc); 2643dd85b26SAdrian Chadd ATH_PCU_LOCK_DESTROY(sc); 2652fe91baaSAdrian Chadd ATH_RX_LOCK_DESTROY(sc); 2661b3502e5SAdrian Chadd ATH_TX_IC_LOCK_DESTROY(sc); 2671b5c5f5aSAdrian Chadd ATH_TX_LOCK_DESTROY(sc); 268f0b2a0beSSam Leffler ATH_LOCK_DESTROY(sc); 2695591b213SSam Leffler bus_dma_tag_destroy(sc->sc_dmat); 2705591b213SSam Leffler bad3: 2715591b213SSam Leffler bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 2725591b213SSam Leffler bad2: 2735591b213SSam Leffler bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 2745591b213SSam Leffler bad1: 2755591b213SSam Leffler bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 2765591b213SSam Leffler bad: 2775591b213SSam Leffler return (error); 2785591b213SSam Leffler } 2795591b213SSam Leffler 2805591b213SSam Leffler static int 2815591b213SSam Leffler ath_pci_detach(device_t dev) 2825591b213SSam Leffler { 2835591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 2845591b213SSam Leffler struct ath_softc *sc = &psc->sc_sc; 2855591b213SSam Leffler 2865591b213SSam Leffler /* check if device was removed */ 2875591b213SSam Leffler sc->sc_invalid = !bus_child_present(dev); 2885591b213SSam Leffler 28965d1eb94SAdrian Chadd /* 29065d1eb94SAdrian Chadd * Do a config read to clear pre-existing pci error status. 29165d1eb94SAdrian Chadd */ 29265d1eb94SAdrian Chadd (void) pci_read_config(dev, PCIR_COMMAND, 4); 29365d1eb94SAdrian Chadd 2945591b213SSam Leffler ath_detach(sc); 2955591b213SSam Leffler 2965591b213SSam Leffler bus_generic_detach(dev); 2975591b213SSam Leffler bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 2985591b213SSam Leffler bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 2995591b213SSam Leffler 3005591b213SSam Leffler bus_dma_tag_destroy(sc->sc_dmat); 3015591b213SSam Leffler bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 3025591b213SSam Leffler 3030f60da6fSAdrian Chadd if (sc->sc_eepromdata) 3040f60da6fSAdrian Chadd free(sc->sc_eepromdata, M_TEMP); 3050f60da6fSAdrian Chadd 30654c99795SAdrian Chadd ATH_TXSTATUS_LOCK_DESTROY(sc); 3073dd85b26SAdrian Chadd ATH_PCU_LOCK_DESTROY(sc); 3082fe91baaSAdrian Chadd ATH_RX_LOCK_DESTROY(sc); 3091b3502e5SAdrian Chadd ATH_TX_IC_LOCK_DESTROY(sc); 3101b5c5f5aSAdrian Chadd ATH_TX_LOCK_DESTROY(sc); 311f0b2a0beSSam Leffler ATH_LOCK_DESTROY(sc); 3125591b213SSam Leffler 3135591b213SSam Leffler return (0); 3145591b213SSam Leffler } 3155591b213SSam Leffler 3165591b213SSam Leffler static int 3175591b213SSam Leffler ath_pci_shutdown(device_t dev) 3185591b213SSam Leffler { 3195591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 3205591b213SSam Leffler 3215591b213SSam Leffler ath_shutdown(&psc->sc_sc); 3225591b213SSam Leffler return (0); 3235591b213SSam Leffler } 3245591b213SSam Leffler 3255591b213SSam Leffler static int 3265591b213SSam Leffler ath_pci_suspend(device_t dev) 3275591b213SSam Leffler { 3285591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 3295591b213SSam Leffler 3305591b213SSam Leffler ath_suspend(&psc->sc_sc); 3315591b213SSam Leffler 3325591b213SSam Leffler return (0); 3335591b213SSam Leffler } 3345591b213SSam Leffler 3355591b213SSam Leffler static int 3365591b213SSam Leffler ath_pci_resume(device_t dev) 3375591b213SSam Leffler { 3385591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 3395591b213SSam Leffler 340cdd36f96SAdrian Chadd /* 341cdd36f96SAdrian Chadd * Suspend/resume resets the PCI configuration space. 342cdd36f96SAdrian Chadd */ 343cdd36f96SAdrian Chadd ath_pci_setup(dev); 344cdd36f96SAdrian Chadd 3455591b213SSam Leffler ath_resume(&psc->sc_sc); 3465591b213SSam Leffler 3475591b213SSam Leffler return (0); 3485591b213SSam Leffler } 3495591b213SSam Leffler 3505591b213SSam Leffler static device_method_t ath_pci_methods[] = { 3515591b213SSam Leffler /* Device interface */ 3525591b213SSam Leffler DEVMETHOD(device_probe, ath_pci_probe), 3535591b213SSam Leffler DEVMETHOD(device_attach, ath_pci_attach), 3545591b213SSam Leffler DEVMETHOD(device_detach, ath_pci_detach), 3555591b213SSam Leffler DEVMETHOD(device_shutdown, ath_pci_shutdown), 3565591b213SSam Leffler DEVMETHOD(device_suspend, ath_pci_suspend), 3575591b213SSam Leffler DEVMETHOD(device_resume, ath_pci_resume), 3585591b213SSam Leffler 3595591b213SSam Leffler { 0,0 } 3605591b213SSam Leffler }; 3615591b213SSam Leffler static driver_t ath_pci_driver = { 3625591b213SSam Leffler "ath", 3635591b213SSam Leffler ath_pci_methods, 3645591b213SSam Leffler sizeof (struct ath_pci_softc) 3655591b213SSam Leffler }; 3665591b213SSam Leffler static devclass_t ath_devclass; 367dba9c859SAdrian Chadd DRIVER_MODULE(ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0); 368dba9c859SAdrian Chadd MODULE_VERSION(ath_pci, 1); 369dba9c859SAdrian Chadd MODULE_DEPEND(ath_pci, wlan, 1, 1, 1); /* 802.11 media layer */ 370dba9c859SAdrian Chadd MODULE_DEPEND(ath_pci, if_ath, 1, 1, 1); /* if_ath driver */ 371