15591b213SSam Leffler /*- 2b032f27cSSam Leffler * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 35591b213SSam Leffler * All rights reserved. 45591b213SSam Leffler * 55591b213SSam Leffler * Redistribution and use in source and binary forms, with or without 65591b213SSam Leffler * modification, are permitted provided that the following conditions 75591b213SSam Leffler * are met: 85591b213SSam Leffler * 1. Redistributions of source code must retain the above copyright 95591b213SSam Leffler * notice, this list of conditions and the following disclaimer, 105591b213SSam Leffler * without modification. 115591b213SSam Leffler * 2. Redistributions in binary form must reproduce at minimum a disclaimer 125591b213SSam Leffler * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 135591b213SSam Leffler * redistribution must be conditioned upon including a substantially 145591b213SSam Leffler * similar Disclaimer requirement for further binary redistribution. 155591b213SSam Leffler * 165591b213SSam Leffler * NO WARRANTY 175591b213SSam Leffler * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 185591b213SSam Leffler * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 195591b213SSam Leffler * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 205591b213SSam Leffler * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 215591b213SSam Leffler * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 225591b213SSam Leffler * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 235591b213SSam Leffler * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 245591b213SSam Leffler * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 255591b213SSam Leffler * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 265591b213SSam Leffler * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 275591b213SSam Leffler * THE POSSIBILITY OF SUCH DAMAGES. 285591b213SSam Leffler */ 295591b213SSam Leffler 305591b213SSam Leffler #include <sys/cdefs.h> 315591b213SSam Leffler __FBSDID("$FreeBSD$"); 325591b213SSam Leffler 335591b213SSam Leffler /* 345591b213SSam Leffler * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 355591b213SSam Leffler */ 36*79f57b35SAdrian Chadd #include "opt_ath.h" 375591b213SSam Leffler 385591b213SSam Leffler #include <sys/param.h> 395591b213SSam Leffler #include <sys/systm.h> 405591b213SSam Leffler #include <sys/module.h> 415591b213SSam Leffler #include <sys/kernel.h> 425591b213SSam Leffler #include <sys/lock.h> 435591b213SSam Leffler #include <sys/mutex.h> 445591b213SSam Leffler #include <sys/errno.h> 455591b213SSam Leffler 465591b213SSam Leffler #include <machine/bus.h> 475591b213SSam Leffler #include <machine/resource.h> 485591b213SSam Leffler #include <sys/bus.h> 495591b213SSam Leffler #include <sys/rman.h> 505591b213SSam Leffler 51c42a7b7eSSam Leffler #include <sys/socket.h> 52c42a7b7eSSam Leffler 535591b213SSam Leffler #include <net/if.h> 545591b213SSam Leffler #include <net/if_media.h> 555591b213SSam Leffler #include <net/if_arp.h> 565591b213SSam Leffler 575591b213SSam Leffler #include <net80211/ieee80211_var.h> 585591b213SSam Leffler 595591b213SSam Leffler #include <dev/ath/if_athvar.h> 605591b213SSam Leffler 615591b213SSam Leffler #include <dev/pci/pcivar.h> 625591b213SSam Leffler #include <dev/pci/pcireg.h> 635591b213SSam Leffler 640f60da6fSAdrian Chadd /* For EEPROM firmware */ 650f60da6fSAdrian Chadd #ifdef ATH_EEPROM_FIRMWARE 660f60da6fSAdrian Chadd #include <sys/linker.h> 670f60da6fSAdrian Chadd #include <sys/firmware.h> 680f60da6fSAdrian Chadd #endif /* ATH_EEPROM_FIRMWARE */ 690f60da6fSAdrian Chadd 705591b213SSam Leffler /* 715591b213SSam Leffler * PCI glue. 725591b213SSam Leffler */ 735591b213SSam Leffler 745591b213SSam Leffler struct ath_pci_softc { 755591b213SSam Leffler struct ath_softc sc_sc; 765591b213SSam Leffler struct resource *sc_sr; /* memory resource */ 775591b213SSam Leffler struct resource *sc_irq; /* irq resource */ 78c42a7b7eSSam Leffler void *sc_ih; /* interrupt handler */ 795591b213SSam Leffler }; 805591b213SSam Leffler 815591b213SSam Leffler #define BS_BAR 0x10 820b19ce1eSSam Leffler #define PCIR_RETRY_TIMEOUT 0x41 832c0dd4bbSAdrian Chadd #define PCIR_CFG_PMCSR 0x48 845591b213SSam Leffler 85cdd36f96SAdrian Chadd static void 86cdd36f96SAdrian Chadd ath_pci_setup(device_t dev) 87cdd36f96SAdrian Chadd { 880f0c074eSAdrian Chadd #ifdef ATH_PCI_LATENCY_WAR 892c0dd4bbSAdrian Chadd /* Override the system latency timer */ 902c0dd4bbSAdrian Chadd pci_write_config(dev, PCIR_LATTIMER, 0x80, 1); 910f0c074eSAdrian Chadd #endif 922c0dd4bbSAdrian Chadd 932c0dd4bbSAdrian Chadd /* If a PCI NIC, force wakeup */ 942c0dd4bbSAdrian Chadd #ifdef ATH_PCI_WAKEUP_WAR 952c0dd4bbSAdrian Chadd /* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */ 962c0dd4bbSAdrian Chadd if (1) { 972c0dd4bbSAdrian Chadd uint16_t pmcsr; 982c0dd4bbSAdrian Chadd pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2); 992c0dd4bbSAdrian Chadd pmcsr |= 3; 1002c0dd4bbSAdrian Chadd pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 1012c0dd4bbSAdrian Chadd pmcsr &= ~3; 1022c0dd4bbSAdrian Chadd pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 1032c0dd4bbSAdrian Chadd } 1042c0dd4bbSAdrian Chadd #endif 1052c0dd4bbSAdrian Chadd 106cdd36f96SAdrian Chadd /* 107cdd36f96SAdrian Chadd * Disable retry timeout to keep PCI Tx retries from 108cdd36f96SAdrian Chadd * interfering with C3 CPU state. 109cdd36f96SAdrian Chadd */ 110cdd36f96SAdrian Chadd pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1); 111cdd36f96SAdrian Chadd } 112cdd36f96SAdrian Chadd 1135591b213SSam Leffler static int 1145591b213SSam Leffler ath_pci_probe(device_t dev) 1155591b213SSam Leffler { 1165591b213SSam Leffler const char* devname; 1175591b213SSam Leffler 1185591b213SSam Leffler devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev)); 119c42a7b7eSSam Leffler if (devname != NULL) { 1205591b213SSam Leffler device_set_desc(dev, devname); 12153ee7173SWarner Losh return BUS_PROBE_DEFAULT; 1225591b213SSam Leffler } 1235591b213SSam Leffler return ENXIO; 1245591b213SSam Leffler } 1255591b213SSam Leffler 1265591b213SSam Leffler static int 1275591b213SSam Leffler ath_pci_attach(device_t dev) 1285591b213SSam Leffler { 1295591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 1305591b213SSam Leffler struct ath_softc *sc = &psc->sc_sc; 1315591b213SSam Leffler int error = ENXIO; 1325591b213SSam Leffler int rid; 1330f60da6fSAdrian Chadd #ifdef ATH_EEPROM_FIRMWARE 1340f60da6fSAdrian Chadd const struct firmware *fw = NULL; 1350f60da6fSAdrian Chadd const char *buf; 1360f60da6fSAdrian Chadd #endif 1375591b213SSam Leffler 1385591b213SSam Leffler sc->sc_dev = dev; 1395591b213SSam Leffler 140e3e2d9bfSKevin Lo /* 141e3e2d9bfSKevin Lo * Enable bus mastering. 142e3e2d9bfSKevin Lo */ 143e3e2d9bfSKevin Lo pci_enable_busmaster(dev); 144e3e2d9bfSKevin Lo 145e3e2d9bfSKevin Lo /* 146cdd36f96SAdrian Chadd * Setup other PCI bus configuration parameters. 147e3e2d9bfSKevin Lo */ 148cdd36f96SAdrian Chadd ath_pci_setup(dev); 1495591b213SSam Leffler 1505591b213SSam Leffler /* 1515591b213SSam Leffler * Setup memory-mapping of PCI registers. 1525591b213SSam Leffler */ 1535591b213SSam Leffler rid = BS_BAR; 1545f96beb9SNate Lawson psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 1555f96beb9SNate Lawson RF_ACTIVE); 1565591b213SSam Leffler if (psc->sc_sr == NULL) { 1575591b213SSam Leffler device_printf(dev, "cannot map register space\n"); 1585591b213SSam Leffler goto bad; 1595591b213SSam Leffler } 160465c8d67SSam Leffler /* XXX uintptr_t is a bandaid for ia64; to be fixed */ 161465c8d67SSam Leffler sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr); 162f9fc583fSSam Leffler sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); 163b58b3803SSam Leffler /* 164b58b3803SSam Leffler * Mark device invalid so any interrupts (shared or otherwise) 165b58b3803SSam Leffler * that arrive before the HAL is setup are discarded. 166b58b3803SSam Leffler */ 167b58b3803SSam Leffler sc->sc_invalid = 1; 1685591b213SSam Leffler 1695591b213SSam Leffler /* 1705591b213SSam Leffler * Arrange interrupt line. 1715591b213SSam Leffler */ 1725591b213SSam Leffler rid = 0; 1735f96beb9SNate Lawson psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 1745f96beb9SNate Lawson RF_SHAREABLE|RF_ACTIVE); 1755591b213SSam Leffler if (psc->sc_irq == NULL) { 1765591b213SSam Leffler device_printf(dev, "could not map interrupt\n"); 1775591b213SSam Leffler goto bad1; 1785591b213SSam Leffler } 1795591b213SSam Leffler if (bus_setup_intr(dev, psc->sc_irq, 1805591b213SSam Leffler INTR_TYPE_NET | INTR_MPSAFE, 181ef544f63SPaolo Pisati NULL, ath_intr, sc, &psc->sc_ih)) { 1825591b213SSam Leffler device_printf(dev, "could not establish interrupt\n"); 1835591b213SSam Leffler goto bad2; 1845591b213SSam Leffler } 1855591b213SSam Leffler 1865591b213SSam Leffler /* 1875591b213SSam Leffler * Setup DMA descriptor area. 1885591b213SSam Leffler */ 189c2175ff5SMarius Strobl if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 1905591b213SSam Leffler 1, 0, /* alignment, bounds */ 1915591b213SSam Leffler BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 1925591b213SSam Leffler BUS_SPACE_MAXADDR, /* highaddr */ 1935591b213SSam Leffler NULL, NULL, /* filter, filterarg */ 1945591b213SSam Leffler 0x3ffff, /* maxsize XXX */ 1955591b213SSam Leffler ATH_MAX_SCATTER, /* nsegments */ 1966ccb8ea7SSam Leffler 0x3ffff, /* maxsegsize XXX */ 1975591b213SSam Leffler BUS_DMA_ALLOCNOW, /* flags */ 198f6b1c44dSScott Long NULL, /* lockfunc */ 199f6b1c44dSScott Long NULL, /* lockarg */ 2005591b213SSam Leffler &sc->sc_dmat)) { 2015591b213SSam Leffler device_printf(dev, "cannot allocate DMA tag\n"); 2025591b213SSam Leffler goto bad3; 2035591b213SSam Leffler } 2045591b213SSam Leffler 2050f60da6fSAdrian Chadd #ifdef ATH_EEPROM_FIRMWARE 2060f60da6fSAdrian Chadd /* 2070f60da6fSAdrian Chadd * If there's an EEPROM firmware image, load that in. 2080f60da6fSAdrian Chadd */ 2090f60da6fSAdrian Chadd if (resource_string_value(device_get_name(dev), device_get_unit(dev), 2100f60da6fSAdrian Chadd "eeprom_firmware", &buf) == 0) { 2110f60da6fSAdrian Chadd if (bootverbose) 2120f60da6fSAdrian Chadd device_printf(dev, "%s: looking up firmware @ '%s'\n", 2130f60da6fSAdrian Chadd __func__, buf); 2140f60da6fSAdrian Chadd 2150f60da6fSAdrian Chadd fw = firmware_get(buf); 2160f60da6fSAdrian Chadd if (fw == NULL) { 2170f60da6fSAdrian Chadd device_printf(dev, "%s: couldn't find firmware\n", 2180f60da6fSAdrian Chadd __func__); 2190f60da6fSAdrian Chadd goto bad3; 2200f60da6fSAdrian Chadd } 2210f60da6fSAdrian Chadd 2220f60da6fSAdrian Chadd device_printf(dev, "%s: EEPROM firmware @ %p\n", 2230f60da6fSAdrian Chadd __func__, fw->data); 2240f60da6fSAdrian Chadd sc->sc_eepromdata = 2250f60da6fSAdrian Chadd malloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO); 2260f60da6fSAdrian Chadd if (! sc->sc_eepromdata) { 2270f60da6fSAdrian Chadd device_printf(dev, "%s: can't malloc eepromdata\n", 2280f60da6fSAdrian Chadd __func__); 2290f60da6fSAdrian Chadd goto bad3; 2300f60da6fSAdrian Chadd } 2310f60da6fSAdrian Chadd memcpy(sc->sc_eepromdata, fw->data, fw->datasize); 2320f60da6fSAdrian Chadd firmware_put(fw, 0); 2330f60da6fSAdrian Chadd } 2340f60da6fSAdrian Chadd #endif /* ATH_EEPROM_FIRMWARE */ 2350f60da6fSAdrian Chadd 236f0b2a0beSSam Leffler ATH_LOCK_INIT(sc); 2373dd85b26SAdrian Chadd ATH_PCU_LOCK_INIT(sc); 2385591b213SSam Leffler 2395591b213SSam Leffler error = ath_attach(pci_get_device(dev), sc); 24030e218c0SSam Leffler if (error == 0) /* success */ 24130e218c0SSam Leffler return 0; 2425591b213SSam Leffler 2433dd85b26SAdrian Chadd ATH_PCU_LOCK_DESTROY(sc); 244f0b2a0beSSam Leffler ATH_LOCK_DESTROY(sc); 2455591b213SSam Leffler bus_dma_tag_destroy(sc->sc_dmat); 2465591b213SSam Leffler bad3: 2475591b213SSam Leffler bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 2485591b213SSam Leffler bad2: 2495591b213SSam Leffler bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 2505591b213SSam Leffler bad1: 2515591b213SSam Leffler bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 2525591b213SSam Leffler bad: 2535591b213SSam Leffler return (error); 2545591b213SSam Leffler } 2555591b213SSam Leffler 2565591b213SSam Leffler static int 2575591b213SSam Leffler ath_pci_detach(device_t dev) 2585591b213SSam Leffler { 2595591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 2605591b213SSam Leffler struct ath_softc *sc = &psc->sc_sc; 2615591b213SSam Leffler 2625591b213SSam Leffler /* check if device was removed */ 2635591b213SSam Leffler sc->sc_invalid = !bus_child_present(dev); 2645591b213SSam Leffler 26565d1eb94SAdrian Chadd /* 26665d1eb94SAdrian Chadd * Do a config read to clear pre-existing pci error status. 26765d1eb94SAdrian Chadd */ 26865d1eb94SAdrian Chadd (void) pci_read_config(dev, PCIR_COMMAND, 4); 26965d1eb94SAdrian Chadd 2705591b213SSam Leffler ath_detach(sc); 2715591b213SSam Leffler 2725591b213SSam Leffler bus_generic_detach(dev); 2735591b213SSam Leffler bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 2745591b213SSam Leffler bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 2755591b213SSam Leffler 2765591b213SSam Leffler bus_dma_tag_destroy(sc->sc_dmat); 2775591b213SSam Leffler bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 2785591b213SSam Leffler 2790f60da6fSAdrian Chadd if (sc->sc_eepromdata) 2800f60da6fSAdrian Chadd free(sc->sc_eepromdata, M_TEMP); 2810f60da6fSAdrian Chadd 2823dd85b26SAdrian Chadd ATH_PCU_LOCK_DESTROY(sc); 283f0b2a0beSSam Leffler ATH_LOCK_DESTROY(sc); 2845591b213SSam Leffler 2855591b213SSam Leffler return (0); 2865591b213SSam Leffler } 2875591b213SSam Leffler 2885591b213SSam Leffler static int 2895591b213SSam Leffler ath_pci_shutdown(device_t dev) 2905591b213SSam Leffler { 2915591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 2925591b213SSam Leffler 2935591b213SSam Leffler ath_shutdown(&psc->sc_sc); 2945591b213SSam Leffler return (0); 2955591b213SSam Leffler } 2965591b213SSam Leffler 2975591b213SSam Leffler static int 2985591b213SSam Leffler ath_pci_suspend(device_t dev) 2995591b213SSam Leffler { 3005591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 3015591b213SSam Leffler 3025591b213SSam Leffler ath_suspend(&psc->sc_sc); 3035591b213SSam Leffler 3045591b213SSam Leffler return (0); 3055591b213SSam Leffler } 3065591b213SSam Leffler 3075591b213SSam Leffler static int 3085591b213SSam Leffler ath_pci_resume(device_t dev) 3095591b213SSam Leffler { 3105591b213SSam Leffler struct ath_pci_softc *psc = device_get_softc(dev); 3115591b213SSam Leffler 312cdd36f96SAdrian Chadd /* 313cdd36f96SAdrian Chadd * Suspend/resume resets the PCI configuration space. 314cdd36f96SAdrian Chadd */ 315cdd36f96SAdrian Chadd ath_pci_setup(dev); 316cdd36f96SAdrian Chadd 3175591b213SSam Leffler ath_resume(&psc->sc_sc); 3185591b213SSam Leffler 3195591b213SSam Leffler return (0); 3205591b213SSam Leffler } 3215591b213SSam Leffler 3225591b213SSam Leffler static device_method_t ath_pci_methods[] = { 3235591b213SSam Leffler /* Device interface */ 3245591b213SSam Leffler DEVMETHOD(device_probe, ath_pci_probe), 3255591b213SSam Leffler DEVMETHOD(device_attach, ath_pci_attach), 3265591b213SSam Leffler DEVMETHOD(device_detach, ath_pci_detach), 3275591b213SSam Leffler DEVMETHOD(device_shutdown, ath_pci_shutdown), 3285591b213SSam Leffler DEVMETHOD(device_suspend, ath_pci_suspend), 3295591b213SSam Leffler DEVMETHOD(device_resume, ath_pci_resume), 3305591b213SSam Leffler 3315591b213SSam Leffler { 0,0 } 3325591b213SSam Leffler }; 3335591b213SSam Leffler static driver_t ath_pci_driver = { 3345591b213SSam Leffler "ath", 3355591b213SSam Leffler ath_pci_methods, 3365591b213SSam Leffler sizeof (struct ath_pci_softc) 3375591b213SSam Leffler }; 3385591b213SSam Leffler static devclass_t ath_devclass; 339dba9c859SAdrian Chadd DRIVER_MODULE(ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0); 340dba9c859SAdrian Chadd MODULE_VERSION(ath_pci, 1); 341dba9c859SAdrian Chadd MODULE_DEPEND(ath_pci, wlan, 1, 1, 1); /* 802.11 media layer */ 342dba9c859SAdrian Chadd MODULE_DEPEND(ath_pci, if_ath, 1, 1, 1); /* if_ath driver */ 343