1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 18 * NO WARRANTY 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29 * THE POSSIBILITY OF SUCH DAMAGES. 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 /* 36 * Driver for the Atheros Wireless LAN controller. 37 * 38 * This software is derived from work of Atsushi Onoe; his contribution 39 * is greatly appreciated. 40 */ 41 42 #include "opt_inet.h" 43 #include "opt_ath.h" 44 /* 45 * This is needed for register operations which are performed 46 * by the driver - eg, calls to ath_hal_gettsf32(). 47 * 48 * It's also required for any AH_DEBUG checks in here, eg the 49 * module dependencies. 50 */ 51 #include "opt_ah.h" 52 #include "opt_wlan.h" 53 54 #include <sys/param.h> 55 #include <sys/systm.h> 56 #include <sys/sysctl.h> 57 #include <sys/mbuf.h> 58 #include <sys/malloc.h> 59 #include <sys/lock.h> 60 #include <sys/mutex.h> 61 #include <sys/kernel.h> 62 #include <sys/socket.h> 63 #include <sys/sockio.h> 64 #include <sys/errno.h> 65 #include <sys/callout.h> 66 #include <sys/bus.h> 67 #include <sys/endian.h> 68 #include <sys/kthread.h> 69 #include <sys/taskqueue.h> 70 #include <sys/priv.h> 71 #include <sys/module.h> 72 #include <sys/ktr.h> 73 #include <sys/smp.h> /* for mp_ncpus */ 74 75 #include <machine/bus.h> 76 77 #include <net/if.h> 78 #include <net/if_var.h> 79 #include <net/if_dl.h> 80 #include <net/if_media.h> 81 #include <net/if_types.h> 82 #include <net/if_arp.h> 83 #include <net/ethernet.h> 84 #include <net/if_llc.h> 85 86 #include <net80211/ieee80211_var.h> 87 #include <net80211/ieee80211_regdomain.h> 88 #ifdef IEEE80211_SUPPORT_SUPERG 89 #include <net80211/ieee80211_superg.h> 90 #endif 91 92 #include <net/bpf.h> 93 94 #ifdef INET 95 #include <netinet/in.h> 96 #include <netinet/if_ether.h> 97 #endif 98 99 #include <dev/ath/if_athvar.h> 100 101 #include <dev/ath/if_ath_debug.h> 102 #include <dev/ath/if_ath_misc.h> 103 #include <dev/ath/if_ath_tx.h> 104 #include <dev/ath/if_ath_beacon.h> 105 106 #ifdef ATH_TX99_DIAG 107 #include <dev/ath/ath_tx99/ath_tx99.h> 108 #endif 109 110 /* 111 * Setup a h/w transmit queue for beacons. 112 */ 113 int 114 ath_beaconq_setup(struct ath_softc *sc) 115 { 116 struct ath_hal *ah = sc->sc_ah; 117 HAL_TXQ_INFO qi; 118 119 memset(&qi, 0, sizeof(qi)); 120 qi.tqi_aifs = HAL_TXQ_USEDEFAULT; 121 qi.tqi_cwmin = HAL_TXQ_USEDEFAULT; 122 qi.tqi_cwmax = HAL_TXQ_USEDEFAULT; 123 /* NB: for dynamic turbo, don't enable any other interrupts */ 124 qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE; 125 if (sc->sc_isedma) 126 qi.tqi_qflags |= HAL_TXQ_TXOKINT_ENABLE | 127 HAL_TXQ_TXERRINT_ENABLE; 128 129 return ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_BEACON, &qi); 130 } 131 132 /* 133 * Setup the transmit queue parameters for the beacon queue. 134 */ 135 int 136 ath_beaconq_config(struct ath_softc *sc) 137 { 138 #define ATH_EXPONENT_TO_VALUE(v) ((1<<(v))-1) 139 struct ieee80211com *ic = &sc->sc_ic; 140 struct ath_hal *ah = sc->sc_ah; 141 HAL_TXQ_INFO qi; 142 143 ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi); 144 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 145 ic->ic_opmode == IEEE80211_M_MBSS) { 146 /* 147 * Always burst out beacon and CAB traffic. 148 */ 149 qi.tqi_aifs = ATH_BEACON_AIFS_DEFAULT; 150 qi.tqi_cwmin = ATH_BEACON_CWMIN_DEFAULT; 151 qi.tqi_cwmax = ATH_BEACON_CWMAX_DEFAULT; 152 } else { 153 struct chanAccParams chp; 154 struct wmeParams *wmep; 155 156 ieee80211_wme_ic_getparams(ic, &chp); 157 wmep = &chp.cap_wmeParams[WME_AC_BE]; 158 159 /* 160 * Adhoc mode; important thing is to use 2x cwmin. 161 */ 162 qi.tqi_aifs = wmep->wmep_aifsn; 163 qi.tqi_cwmin = 2*ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin); 164 qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax); 165 } 166 167 if (!ath_hal_settxqueueprops(ah, sc->sc_bhalq, &qi)) { 168 device_printf(sc->sc_dev, "unable to update parameters for " 169 "beacon hardware queue!\n"); 170 return 0; 171 } else { 172 ath_hal_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */ 173 return 1; 174 } 175 #undef ATH_EXPONENT_TO_VALUE 176 } 177 178 /* 179 * Allocate and setup an initial beacon frame. 180 */ 181 int 182 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 183 { 184 struct ieee80211vap *vap = ni->ni_vap; 185 struct ath_vap *avp = ATH_VAP(vap); 186 struct ath_buf *bf; 187 struct mbuf *m; 188 int error; 189 190 bf = avp->av_bcbuf; 191 DPRINTF(sc, ATH_DEBUG_NODE, "%s: bf_m=%p, bf_node=%p\n", 192 __func__, bf->bf_m, bf->bf_node); 193 if (bf->bf_m != NULL) { 194 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 195 m_freem(bf->bf_m); 196 bf->bf_m = NULL; 197 } 198 if (bf->bf_node != NULL) { 199 ieee80211_free_node(bf->bf_node); 200 bf->bf_node = NULL; 201 } 202 203 /* 204 * NB: the beacon data buffer must be 32-bit aligned; 205 * we assume the mbuf routines will return us something 206 * with this alignment (perhaps should assert). 207 */ 208 m = ieee80211_beacon_alloc(ni); 209 if (m == NULL) { 210 device_printf(sc->sc_dev, "%s: cannot get mbuf\n", __func__); 211 sc->sc_stats.ast_be_nombuf++; 212 return ENOMEM; 213 } 214 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m, 215 bf->bf_segs, &bf->bf_nseg, 216 BUS_DMA_NOWAIT); 217 if (error != 0) { 218 device_printf(sc->sc_dev, 219 "%s: cannot map mbuf, bus_dmamap_load_mbuf_sg returns %d\n", 220 __func__, error); 221 m_freem(m); 222 return error; 223 } 224 225 /* 226 * Calculate a TSF adjustment factor required for staggered 227 * beacons. Note that we assume the format of the beacon 228 * frame leaves the tstamp field immediately following the 229 * header. 230 */ 231 if (sc->sc_stagbeacons && avp->av_bslot > 0) { 232 uint64_t tsfadjust; 233 struct ieee80211_frame *wh; 234 235 /* 236 * The beacon interval is in TU's; the TSF is in usecs. 237 * We figure out how many TU's to add to align the timestamp 238 * then convert to TSF units and handle byte swapping before 239 * inserting it in the frame. The hardware will then add this 240 * each time a beacon frame is sent. Note that we align vap's 241 * 1..N and leave vap 0 untouched. This means vap 0 has a 242 * timestamp in one beacon interval while the others get a 243 * timstamp aligned to the next interval. 244 */ 245 tsfadjust = ni->ni_intval * 246 (ATH_BCBUF - avp->av_bslot) / ATH_BCBUF; 247 tsfadjust = htole64(tsfadjust << 10); /* TU -> TSF */ 248 249 DPRINTF(sc, ATH_DEBUG_BEACON, 250 "%s: %s beacons bslot %d intval %u tsfadjust %llu\n", 251 __func__, sc->sc_stagbeacons ? "stagger" : "burst", 252 avp->av_bslot, ni->ni_intval, 253 (long long unsigned) le64toh(tsfadjust)); 254 255 wh = mtod(m, struct ieee80211_frame *); 256 memcpy(&wh[1], &tsfadjust, sizeof(tsfadjust)); 257 } 258 bf->bf_m = m; 259 bf->bf_node = ieee80211_ref_node(ni); 260 261 return 0; 262 } 263 264 /* 265 * Setup the beacon frame for transmit. 266 */ 267 static void 268 ath_beacon_setup(struct ath_softc *sc, struct ath_buf *bf) 269 { 270 #define USE_SHPREAMBLE(_ic) \ 271 (((_ic)->ic_flags & (IEEE80211_F_SHPREAMBLE | IEEE80211_F_USEBARKER))\ 272 == IEEE80211_F_SHPREAMBLE) 273 struct ieee80211_node *ni = bf->bf_node; 274 struct ieee80211com *ic = ni->ni_ic; 275 struct mbuf *m = bf->bf_m; 276 struct ath_hal *ah = sc->sc_ah; 277 struct ath_desc *ds; 278 int flags, antenna; 279 const HAL_RATE_TABLE *rt; 280 u_int8_t rix, rate; 281 HAL_DMA_ADDR bufAddrList[4]; 282 uint32_t segLenList[4]; 283 HAL_11N_RATE_SERIES rc[4]; 284 285 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: m %p len %u\n", 286 __func__, m, m->m_len); 287 288 /* setup descriptors */ 289 ds = bf->bf_desc; 290 bf->bf_last = bf; 291 bf->bf_lastds = ds; 292 293 flags = HAL_TXDESC_NOACK; 294 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol) { 295 /* self-linked descriptor */ 296 ath_hal_settxdesclink(sc->sc_ah, ds, bf->bf_daddr); 297 flags |= HAL_TXDESC_VEOL; 298 /* 299 * Let hardware handle antenna switching. 300 */ 301 antenna = sc->sc_txantenna; 302 } else { 303 ath_hal_settxdesclink(sc->sc_ah, ds, 0); 304 /* 305 * Switch antenna every 4 beacons. 306 * XXX assumes two antenna 307 */ 308 if (sc->sc_txantenna != 0) 309 antenna = sc->sc_txantenna; 310 else if (sc->sc_stagbeacons && sc->sc_nbcnvaps != 0) 311 antenna = ((sc->sc_stats.ast_be_xmit / sc->sc_nbcnvaps) & 4 ? 2 : 1); 312 else 313 antenna = (sc->sc_stats.ast_be_xmit & 4 ? 2 : 1); 314 } 315 316 KASSERT(bf->bf_nseg == 1, 317 ("multi-segment beacon frame; nseg %u", bf->bf_nseg)); 318 319 /* 320 * Calculate rate code. 321 * XXX everything at min xmit rate 322 */ 323 rix = 0; 324 rt = sc->sc_currates; 325 rate = rt->info[rix].rateCode; 326 if (USE_SHPREAMBLE(ic)) 327 rate |= rt->info[rix].shortPreamble; 328 ath_hal_setuptxdesc(ah, ds 329 , m->m_len + IEEE80211_CRC_LEN /* frame length */ 330 , sizeof(struct ieee80211_frame)/* header length */ 331 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 332 , ieee80211_get_node_txpower(ni) /* txpower XXX */ 333 , rate, 1 /* series 0 rate/tries */ 334 , HAL_TXKEYIX_INVALID /* no encryption */ 335 , antenna /* antenna mode */ 336 , flags /* no ack, veol for beacons */ 337 , 0 /* rts/cts rate */ 338 , 0 /* rts/cts duration */ 339 ); 340 341 /* 342 * The EDMA HAL currently assumes that _all_ rate control 343 * settings are done in ath_hal_set11nratescenario(), rather 344 * than in ath_hal_setuptxdesc(). 345 */ 346 if (sc->sc_isedma) { 347 memset(&rc, 0, sizeof(rc)); 348 349 rc[0].ChSel = sc->sc_txchainmask; 350 rc[0].Tries = 1; 351 rc[0].Rate = rt->info[rix].rateCode; 352 rc[0].RateIndex = rix; 353 rc[0].tx_power_cap = 0x3f; 354 rc[0].PktDuration = 355 ath_hal_computetxtime(ah, rt, roundup(m->m_len, 4), 356 rix, 0, AH_TRUE); 357 ath_hal_set11nratescenario(ah, ds, 0, 0, rc, 4, flags); 358 } 359 360 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 361 segLenList[0] = roundup(m->m_len, 4); 362 segLenList[1] = segLenList[2] = segLenList[3] = 0; 363 bufAddrList[0] = bf->bf_segs[0].ds_addr; 364 bufAddrList[1] = bufAddrList[2] = bufAddrList[3] = 0; 365 ath_hal_filltxdesc(ah, ds 366 , bufAddrList 367 , segLenList 368 , 0 /* XXX desc id */ 369 , sc->sc_bhalq /* hardware TXQ */ 370 , AH_TRUE /* first segment */ 371 , AH_TRUE /* last segment */ 372 , ds /* first descriptor */ 373 ); 374 #if 0 375 ath_desc_swap(ds); 376 #endif 377 #undef USE_SHPREAMBLE 378 } 379 380 void 381 ath_beacon_update(struct ieee80211vap *vap, int item) 382 { 383 struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 384 385 setbit(bo->bo_flags, item); 386 } 387 388 /* 389 * Handle a beacon miss. 390 */ 391 void 392 ath_beacon_miss(struct ath_softc *sc) 393 { 394 HAL_SURVEY_SAMPLE hs; 395 HAL_BOOL ret; 396 uint32_t hangs; 397 398 bzero(&hs, sizeof(hs)); 399 400 ret = ath_hal_get_mib_cycle_counts(sc->sc_ah, &hs); 401 402 if (ath_hal_gethangstate(sc->sc_ah, 0xffff, &hangs) && hangs != 0) { 403 DPRINTF(sc, ATH_DEBUG_BEACON, 404 "%s: hang=0x%08x\n", 405 __func__, 406 hangs); 407 } 408 409 #ifdef ATH_DEBUG_ALQ 410 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_MISSED_BEACON)) 411 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_MISSED_BEACON, 0, NULL); 412 #endif 413 414 DPRINTF(sc, ATH_DEBUG_BEACON, 415 "%s: valid=%d, txbusy=%u, rxbusy=%u, chanbusy=%u, " 416 "extchanbusy=%u, cyclecount=%u\n", 417 __func__, 418 ret, 419 hs.tx_busy, 420 hs.rx_busy, 421 hs.chan_busy, 422 hs.ext_chan_busy, 423 hs.cycle_count); 424 } 425 426 /* 427 * Transmit a beacon frame at SWBA. Dynamic updates to the 428 * frame contents are done as needed and the slot time is 429 * also adjusted based on current state. 430 */ 431 void 432 ath_beacon_proc(void *arg, int pending) 433 { 434 struct ath_softc *sc = arg; 435 struct ath_hal *ah = sc->sc_ah; 436 struct ieee80211vap *vap; 437 struct ath_buf *bf; 438 int slot, otherant; 439 uint32_t bfaddr; 440 441 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: pending %u\n", 442 __func__, pending); 443 /* 444 * Check if the previous beacon has gone out. If 445 * not don't try to post another, skip this period 446 * and wait for the next. Missed beacons indicate 447 * a problem and should not occur. If we miss too 448 * many consecutive beacons reset the device. 449 */ 450 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) { 451 sc->sc_bmisscount++; 452 sc->sc_stats.ast_be_missed++; 453 ath_beacon_miss(sc); 454 DPRINTF(sc, ATH_DEBUG_BEACON, 455 "%s: missed %u consecutive beacons\n", 456 __func__, sc->sc_bmisscount); 457 if (sc->sc_bmisscount >= ath_bstuck_threshold) 458 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask); 459 return; 460 } 461 if (sc->sc_bmisscount != 0) { 462 DPRINTF(sc, ATH_DEBUG_BEACON, 463 "%s: resume beacon xmit after %u misses\n", 464 __func__, sc->sc_bmisscount); 465 sc->sc_bmisscount = 0; 466 #ifdef ATH_DEBUG_ALQ 467 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_RESUME_BEACON)) 468 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_RESUME_BEACON, 0, NULL); 469 #endif 470 } 471 472 if (sc->sc_stagbeacons) { /* staggered beacons */ 473 struct ieee80211com *ic = &sc->sc_ic; 474 uint32_t tsftu; 475 476 tsftu = ath_hal_gettsf32(ah) >> 10; 477 /* XXX lintval */ 478 slot = ((tsftu % ic->ic_lintval) * ATH_BCBUF) / ic->ic_lintval; 479 vap = sc->sc_bslot[(slot+1) % ATH_BCBUF]; 480 bfaddr = 0; 481 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) { 482 bf = ath_beacon_generate(sc, vap); 483 if (bf != NULL) 484 bfaddr = bf->bf_daddr; 485 } 486 } else { /* burst'd beacons */ 487 uint32_t *bflink = &bfaddr; 488 489 for (slot = 0; slot < ATH_BCBUF; slot++) { 490 vap = sc->sc_bslot[slot]; 491 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) { 492 bf = ath_beacon_generate(sc, vap); 493 /* 494 * XXX TODO: this should use settxdesclinkptr() 495 * otherwise it won't work for EDMA chipsets! 496 */ 497 if (bf != NULL) { 498 /* XXX should do this using the ds */ 499 *bflink = bf->bf_daddr; 500 ath_hal_gettxdesclinkptr(sc->sc_ah, 501 bf->bf_desc, &bflink); 502 } 503 } 504 } 505 /* 506 * XXX TODO: this should use settxdesclinkptr() 507 * otherwise it won't work for EDMA chipsets! 508 */ 509 *bflink = 0; /* terminate list */ 510 } 511 512 /* 513 * Handle slot time change when a non-ERP station joins/leaves 514 * an 11g network. The 802.11 layer notifies us via callback, 515 * we mark updateslot, then wait one beacon before effecting 516 * the change. This gives associated stations at least one 517 * beacon interval to note the state change. 518 */ 519 /* XXX locking */ 520 if (sc->sc_updateslot == UPDATE) { 521 sc->sc_updateslot = COMMIT; /* commit next beacon */ 522 sc->sc_slotupdate = slot; 523 } else if (sc->sc_updateslot == COMMIT && sc->sc_slotupdate == slot) 524 ath_setslottime(sc); /* commit change to h/w */ 525 526 /* 527 * Check recent per-antenna transmit statistics and flip 528 * the default antenna if noticeably more frames went out 529 * on the non-default antenna. 530 * XXX assumes 2 anntenae 531 */ 532 if (!sc->sc_diversity && (!sc->sc_stagbeacons || slot == 0)) { 533 otherant = sc->sc_defant & 1 ? 2 : 1; 534 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2) 535 ath_setdefantenna(sc, otherant); 536 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0; 537 } 538 539 /* Program the CABQ with the contents of the CABQ txq and start it */ 540 ATH_TXQ_LOCK(sc->sc_cabq); 541 ath_beacon_cabq_start(sc); 542 ATH_TXQ_UNLOCK(sc->sc_cabq); 543 544 /* Program the new beacon frame if we have one for this interval */ 545 if (bfaddr != 0) { 546 /* 547 * Stop any current dma and put the new frame on the queue. 548 * This should never fail since we check above that no frames 549 * are still pending on the queue. 550 */ 551 if (! sc->sc_isedma) { 552 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 553 DPRINTF(sc, ATH_DEBUG_ANY, 554 "%s: beacon queue %u did not stop?\n", 555 __func__, sc->sc_bhalq); 556 } 557 } 558 /* NB: cabq traffic should already be queued and primed */ 559 560 ath_hal_puttxbuf(ah, sc->sc_bhalq, bfaddr); 561 ath_hal_txstart(ah, sc->sc_bhalq); 562 563 sc->sc_stats.ast_be_xmit++; 564 } 565 } 566 567 static void 568 ath_beacon_cabq_start_edma(struct ath_softc *sc) 569 { 570 struct ath_buf *bf, *bf_last; 571 struct ath_txq *cabq = sc->sc_cabq; 572 #if 0 573 struct ath_buf *bfi; 574 int i = 0; 575 #endif 576 577 ATH_TXQ_LOCK_ASSERT(cabq); 578 579 if (TAILQ_EMPTY(&cabq->axq_q)) 580 return; 581 bf = TAILQ_FIRST(&cabq->axq_q); 582 bf_last = TAILQ_LAST(&cabq->axq_q, axq_q_s); 583 584 /* 585 * This is a dirty, dirty hack to push the contents of 586 * the cabq staging queue into the FIFO. 587 * 588 * This ideally should live in the EDMA code file 589 * and only push things into the CABQ if there's a FIFO 590 * slot. 591 * 592 * We can't treat this like a normal TX queue because 593 * in the case of multi-VAP traffic, we may have to flush 594 * the CABQ each new (staggered) beacon that goes out. 595 * But for non-staggered beacons, we could in theory 596 * handle multicast traffic for all VAPs in one FIFO 597 * push. Just keep all of this in mind if you're wondering 598 * how to correctly/better handle multi-VAP CABQ traffic 599 * with EDMA. 600 */ 601 602 /* 603 * Is the CABQ FIFO free? If not, complain loudly and 604 * don't queue anything. Maybe we'll flush the CABQ 605 * traffic, maybe we won't. But that'll happen next 606 * beacon interval. 607 */ 608 if (cabq->axq_fifo_depth >= HAL_TXFIFO_DEPTH) { 609 device_printf(sc->sc_dev, 610 "%s: Q%d: CAB FIFO queue=%d?\n", 611 __func__, 612 cabq->axq_qnum, 613 cabq->axq_fifo_depth); 614 return; 615 } 616 617 /* 618 * Ok, so here's the gymnastics reqiured to make this 619 * all sensible. 620 */ 621 622 /* 623 * Tag the first/last buffer appropriately. 624 */ 625 bf->bf_flags |= ATH_BUF_FIFOPTR; 626 bf_last->bf_flags |= ATH_BUF_FIFOEND; 627 628 #if 0 629 i = 0; 630 TAILQ_FOREACH(bfi, &cabq->axq_q, bf_list) { 631 ath_printtxbuf(sc, bf, cabq->axq_qnum, i, 0); 632 i++; 633 } 634 #endif 635 636 /* 637 * We now need to push this set of frames onto the tail 638 * of the FIFO queue. We don't adjust the aggregate 639 * count, only the queue depth counter(s). 640 * We also need to blank the link pointer now. 641 */ 642 TAILQ_CONCAT(&cabq->fifo.axq_q, &cabq->axq_q, bf_list); 643 cabq->axq_link = NULL; 644 cabq->fifo.axq_depth += cabq->axq_depth; 645 cabq->axq_depth = 0; 646 647 /* Bump FIFO queue */ 648 cabq->axq_fifo_depth++; 649 650 /* Push the first entry into the hardware */ 651 ath_hal_puttxbuf(sc->sc_ah, cabq->axq_qnum, bf->bf_daddr); 652 cabq->axq_flags |= ATH_TXQ_PUTRUNNING; 653 654 /* NB: gated by beacon so safe to start here */ 655 ath_hal_txstart(sc->sc_ah, cabq->axq_qnum); 656 657 } 658 659 static void 660 ath_beacon_cabq_start_legacy(struct ath_softc *sc) 661 { 662 struct ath_buf *bf; 663 struct ath_txq *cabq = sc->sc_cabq; 664 665 ATH_TXQ_LOCK_ASSERT(cabq); 666 if (TAILQ_EMPTY(&cabq->axq_q)) 667 return; 668 bf = TAILQ_FIRST(&cabq->axq_q); 669 670 /* Push the first entry into the hardware */ 671 ath_hal_puttxbuf(sc->sc_ah, cabq->axq_qnum, bf->bf_daddr); 672 cabq->axq_flags |= ATH_TXQ_PUTRUNNING; 673 674 /* NB: gated by beacon so safe to start here */ 675 ath_hal_txstart(sc->sc_ah, cabq->axq_qnum); 676 } 677 678 /* 679 * Start CABQ transmission - this assumes that all frames are prepped 680 * and ready in the CABQ. 681 */ 682 void 683 ath_beacon_cabq_start(struct ath_softc *sc) 684 { 685 struct ath_txq *cabq = sc->sc_cabq; 686 687 ATH_TXQ_LOCK_ASSERT(cabq); 688 689 if (TAILQ_EMPTY(&cabq->axq_q)) 690 return; 691 692 if (sc->sc_isedma) 693 ath_beacon_cabq_start_edma(sc); 694 else 695 ath_beacon_cabq_start_legacy(sc); 696 } 697 698 struct ath_buf * 699 ath_beacon_generate(struct ath_softc *sc, struct ieee80211vap *vap) 700 { 701 struct ath_vap *avp = ATH_VAP(vap); 702 struct ath_txq *cabq = sc->sc_cabq; 703 struct ath_buf *bf; 704 struct mbuf *m; 705 int nmcastq, error; 706 707 KASSERT(vap->iv_state >= IEEE80211_S_RUN, 708 ("not running, state %d", vap->iv_state)); 709 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer")); 710 711 /* 712 * Update dynamic beacon contents. If this returns 713 * non-zero then we need to remap the memory because 714 * the beacon frame changed size (probably because 715 * of the TIM bitmap). 716 */ 717 bf = avp->av_bcbuf; 718 m = bf->bf_m; 719 /* XXX lock mcastq? */ 720 nmcastq = avp->av_mcastq.axq_depth; 721 722 if (ieee80211_beacon_update(bf->bf_node, m, nmcastq)) { 723 /* XXX too conservative? */ 724 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 725 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m, 726 bf->bf_segs, &bf->bf_nseg, 727 BUS_DMA_NOWAIT); 728 if (error != 0) { 729 if_printf(vap->iv_ifp, 730 "%s: bus_dmamap_load_mbuf_sg failed, error %u\n", 731 __func__, error); 732 return NULL; 733 } 734 } 735 if ((vap->iv_bcn_off.bo_tim[4] & 1) && cabq->axq_depth) { 736 DPRINTF(sc, ATH_DEBUG_BEACON, 737 "%s: cabq did not drain, mcastq %u cabq %u\n", 738 __func__, nmcastq, cabq->axq_depth); 739 sc->sc_stats.ast_cabq_busy++; 740 if (sc->sc_nvaps > 1 && sc->sc_stagbeacons) { 741 /* 742 * CABQ traffic from a previous vap is still pending. 743 * We must drain the q before this beacon frame goes 744 * out as otherwise this vap's stations will get cab 745 * frames from a different vap. 746 * XXX could be slow causing us to miss DBA 747 */ 748 /* 749 * XXX TODO: this doesn't stop CABQ DMA - it assumes 750 * that since we're about to transmit a beacon, we've 751 * already stopped transmitting on the CABQ. But this 752 * doesn't at all mean that the CABQ DMA QCU will 753 * accept a new TXDP! So what, should we do a DMA 754 * stop? What if it fails? 755 * 756 * More thought is required here. 757 */ 758 /* 759 * XXX can we even stop TX DMA here? Check what the 760 * reference driver does for cabq for beacons, given 761 * that stopping TX requires RX is paused. 762 */ 763 ath_tx_draintxq(sc, cabq); 764 } 765 } 766 ath_beacon_setup(sc, bf); 767 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 768 769 /* 770 * XXX TODO: tie into net80211 for quiet time IE update and program 771 * local AP timer if we require it. The process of updating the 772 * beacon will also update the IE with the relevant counters. 773 */ 774 775 /* 776 * Enable the CAB queue before the beacon queue to 777 * insure cab frames are triggered by this beacon. 778 */ 779 if (vap->iv_bcn_off.bo_tim[4] & 1) { 780 781 /* NB: only at DTIM */ 782 ATH_TXQ_LOCK(&avp->av_mcastq); 783 if (nmcastq) { 784 struct ath_buf *bfm, *bfc_last; 785 786 /* 787 * Move frames from the s/w mcast q to the h/w cab q. 788 * 789 * XXX TODO: if we chain together multiple VAPs 790 * worth of CABQ traffic, should we keep the 791 * MORE data bit set on the last frame of each 792 * intermediary VAP (ie, only clear the MORE 793 * bit of the last frame on the last vap?) 794 */ 795 bfm = TAILQ_FIRST(&avp->av_mcastq.axq_q); 796 ATH_TXQ_LOCK(cabq); 797 798 /* 799 * If there's already a frame on the CABQ, we 800 * need to link to the end of the last frame. 801 * We can't use axq_link here because 802 * EDMA descriptors require some recalculation 803 * (checksum) to occur. 804 */ 805 bfc_last = ATH_TXQ_LAST(cabq, axq_q_s); 806 if (bfc_last != NULL) { 807 ath_hal_settxdesclink(sc->sc_ah, 808 bfc_last->bf_lastds, 809 bfm->bf_daddr); 810 } 811 ath_txqmove(cabq, &avp->av_mcastq); 812 ATH_TXQ_UNLOCK(cabq); 813 /* 814 * XXX not entirely accurate, in case a mcast 815 * queue frame arrived before we grabbed the TX 816 * lock. 817 */ 818 sc->sc_stats.ast_cabq_xmit += nmcastq; 819 } 820 ATH_TXQ_UNLOCK(&avp->av_mcastq); 821 } 822 return bf; 823 } 824 825 void 826 ath_beacon_start_adhoc(struct ath_softc *sc, struct ieee80211vap *vap) 827 { 828 struct ath_vap *avp = ATH_VAP(vap); 829 struct ath_hal *ah = sc->sc_ah; 830 struct ath_buf *bf; 831 struct mbuf *m; 832 int error; 833 834 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer")); 835 836 /* 837 * Update dynamic beacon contents. If this returns 838 * non-zero then we need to remap the memory because 839 * the beacon frame changed size (probably because 840 * of the TIM bitmap). 841 */ 842 bf = avp->av_bcbuf; 843 m = bf->bf_m; 844 if (ieee80211_beacon_update(bf->bf_node, m, 0)) { 845 /* XXX too conservative? */ 846 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 847 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m, 848 bf->bf_segs, &bf->bf_nseg, 849 BUS_DMA_NOWAIT); 850 if (error != 0) { 851 if_printf(vap->iv_ifp, 852 "%s: bus_dmamap_load_mbuf_sg failed, error %u\n", 853 __func__, error); 854 return; 855 } 856 } 857 ath_beacon_setup(sc, bf); 858 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 859 860 /* NB: caller is known to have already stopped tx dma */ 861 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 862 ath_hal_txstart(ah, sc->sc_bhalq); 863 } 864 865 /* 866 * Reclaim beacon resources and return buffer to the pool. 867 */ 868 void 869 ath_beacon_return(struct ath_softc *sc, struct ath_buf *bf) 870 { 871 872 DPRINTF(sc, ATH_DEBUG_NODE, "%s: free bf=%p, bf_m=%p, bf_node=%p\n", 873 __func__, bf, bf->bf_m, bf->bf_node); 874 if (bf->bf_m != NULL) { 875 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 876 m_freem(bf->bf_m); 877 bf->bf_m = NULL; 878 } 879 if (bf->bf_node != NULL) { 880 ieee80211_free_node(bf->bf_node); 881 bf->bf_node = NULL; 882 } 883 TAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list); 884 } 885 886 /* 887 * Reclaim beacon resources. 888 */ 889 void 890 ath_beacon_free(struct ath_softc *sc) 891 { 892 struct ath_buf *bf; 893 894 TAILQ_FOREACH(bf, &sc->sc_bbuf, bf_list) { 895 DPRINTF(sc, ATH_DEBUG_NODE, 896 "%s: free bf=%p, bf_m=%p, bf_node=%p\n", 897 __func__, bf, bf->bf_m, bf->bf_node); 898 if (bf->bf_m != NULL) { 899 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 900 m_freem(bf->bf_m); 901 bf->bf_m = NULL; 902 } 903 if (bf->bf_node != NULL) { 904 ieee80211_free_node(bf->bf_node); 905 bf->bf_node = NULL; 906 } 907 } 908 } 909 910 /* 911 * Configure the beacon and sleep timers. 912 * 913 * When operating as an AP this resets the TSF and sets 914 * up the hardware to notify us when we need to issue beacons. 915 * 916 * When operating in station mode this sets up the beacon 917 * timers according to the timestamp of the last received 918 * beacon and the current TSF, configures PCF and DTIM 919 * handling, programs the sleep registers so the hardware 920 * will wakeup in time to receive beacons, and configures 921 * the beacon miss handling so we'll receive a BMISS 922 * interrupt when we stop seeing beacons from the AP 923 * we've associated with. 924 */ 925 void 926 ath_beacon_config(struct ath_softc *sc, struct ieee80211vap *vap) 927 { 928 #define TSF_TO_TU(_h,_l) \ 929 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10)) 930 #define FUDGE 2 931 struct ath_hal *ah = sc->sc_ah; 932 struct ath_vap *avp; 933 struct ieee80211com *ic = &sc->sc_ic; 934 struct ieee80211_node *ni; 935 u_int32_t nexttbtt, intval, tsftu; 936 u_int32_t nexttbtt_u8, intval_u8; 937 u_int64_t tsf, tsf_beacon; 938 939 if (vap == NULL) 940 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */ 941 /* 942 * Just ensure that we aren't being called when the last 943 * VAP is destroyed. 944 */ 945 if (vap == NULL) { 946 device_printf(sc->sc_dev, "%s: called with no VAPs\n", 947 __func__); 948 return; 949 } 950 951 /* Now that we have a vap, we can do this bit */ 952 avp = ATH_VAP(vap); 953 954 ni = ieee80211_ref_node(vap->iv_bss); 955 956 ATH_LOCK(sc); 957 ath_power_set_power_state(sc, HAL_PM_AWAKE); 958 ATH_UNLOCK(sc); 959 960 /* Always clear the quiet IE timers; let the next update program them */ 961 ath_hal_set_quiet(ah, 0, 0, 0, HAL_QUIET_DISABLE); 962 memset(&avp->quiet_ie, 0, sizeof(avp->quiet_ie)); 963 964 /* extract tstamp from last beacon and convert to TU */ 965 nexttbtt = TSF_TO_TU(le32dec(ni->ni_tstamp.data + 4), 966 le32dec(ni->ni_tstamp.data)); 967 968 tsf_beacon = ((uint64_t) le32dec(ni->ni_tstamp.data + 4)) << 32; 969 tsf_beacon |= le32dec(ni->ni_tstamp.data); 970 971 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 972 ic->ic_opmode == IEEE80211_M_MBSS) { 973 /* 974 * For multi-bss ap/mesh support beacons are either staggered 975 * evenly over N slots or burst together. For the former 976 * arrange for the SWBA to be delivered for each slot. 977 * Slots that are not occupied will generate nothing. 978 */ 979 /* NB: the beacon interval is kept internally in TU's */ 980 intval = ni->ni_intval & HAL_BEACON_PERIOD; 981 if (sc->sc_stagbeacons) 982 intval /= ATH_BCBUF; 983 } else { 984 /* NB: the beacon interval is kept internally in TU's */ 985 intval = ni->ni_intval & HAL_BEACON_PERIOD; 986 } 987 988 /* 989 * Note: rounding up to the next intval can cause problems with 990 * bad APs when we're in powersave mode. 991 * 992 * In STA mode with powersave enabled, beacons are only received 993 * whenever the beacon timer fires to wake up the hardware. 994 * Now, if this is rounded up to the next intval, it assumes 995 * that the AP has started transmitting beacons at TSF values that 996 * are multiples of intval, versus say being 25 TU off. 997 * 998 * The specification (802.11-2012 10.1.3.2 - Beacon Generation in 999 * Infrastructure Networks) requires APs be beaconing at a 1000 * mutiple of intval. So, if bintval=100, then we shouldn't 1001 * get beacons at intervals other than around multiples of 100. 1002 */ 1003 if (nexttbtt == 0) /* e.g. for ap mode */ 1004 nexttbtt = intval; 1005 else 1006 nexttbtt = roundup(nexttbtt, intval); 1007 1008 DPRINTF(sc, ATH_DEBUG_BEACON, "%s: nexttbtt %u intval %u (%u)\n", 1009 __func__, nexttbtt, intval, ni->ni_intval); 1010 if (ic->ic_opmode == IEEE80211_M_STA && !sc->sc_swbmiss) { 1011 HAL_BEACON_STATE bs; 1012 int dtimperiod, dtimcount; 1013 int cfpperiod, cfpcount; 1014 1015 /* 1016 * Setup dtim and cfp parameters according to 1017 * last beacon we received (which may be none). 1018 */ 1019 dtimperiod = ni->ni_dtim_period; 1020 if (dtimperiod <= 0) /* NB: 0 if not known */ 1021 dtimperiod = 1; 1022 dtimcount = ni->ni_dtim_count; 1023 if (dtimcount >= dtimperiod) /* NB: sanity check */ 1024 dtimcount = 0; /* XXX? */ 1025 cfpperiod = 1; /* NB: no PCF support yet */ 1026 cfpcount = 0; 1027 /* 1028 * Pull nexttbtt forward to reflect the current 1029 * TSF and calculate dtim+cfp state for the result. 1030 */ 1031 tsf = ath_hal_gettsf64(ah); 1032 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE; 1033 1034 DPRINTF(sc, ATH_DEBUG_BEACON, 1035 "%s: beacon tsf=%llu, hw tsf=%llu, nexttbtt=%u, tsftu=%u\n", 1036 __func__, 1037 (unsigned long long) tsf_beacon, 1038 (unsigned long long) tsf, 1039 nexttbtt, 1040 tsftu); 1041 DPRINTF(sc, ATH_DEBUG_BEACON, 1042 "%s: beacon tsf=%llu, hw tsf=%llu, tsf delta=%lld\n", 1043 __func__, 1044 (unsigned long long) tsf_beacon, 1045 (unsigned long long) tsf, 1046 (long long) tsf - 1047 (long long) tsf_beacon); 1048 1049 DPRINTF(sc, ATH_DEBUG_BEACON, 1050 "%s: nexttbtt=%llu, beacon tsf delta=%lld\n", 1051 __func__, 1052 (unsigned long long) nexttbtt, 1053 (long long) ((long long) nexttbtt * 1024LL) - (long long) tsf_beacon); 1054 1055 /* XXX cfpcount? */ 1056 1057 if (nexttbtt > tsftu) { 1058 uint32_t countdiff, oldtbtt, remainder; 1059 1060 oldtbtt = nexttbtt; 1061 remainder = (nexttbtt - tsftu) % intval; 1062 nexttbtt = tsftu + remainder; 1063 1064 countdiff = (oldtbtt - nexttbtt) / intval % dtimperiod; 1065 if (dtimcount > countdiff) { 1066 dtimcount -= countdiff; 1067 } else { 1068 dtimcount += dtimperiod - countdiff; 1069 } 1070 } else { //nexttbtt <= tsftu 1071 uint32_t countdiff, oldtbtt, remainder; 1072 1073 oldtbtt = nexttbtt; 1074 remainder = (tsftu - nexttbtt) % intval; 1075 nexttbtt = tsftu - remainder + intval; 1076 countdiff = (nexttbtt - oldtbtt) / intval % dtimperiod; 1077 if (dtimcount > countdiff) { 1078 dtimcount -= countdiff; 1079 } else { 1080 dtimcount += dtimperiod - countdiff; 1081 } 1082 } 1083 1084 DPRINTF(sc, ATH_DEBUG_BEACON, 1085 "%s: adj nexttbtt=%llu, rx tsf delta=%lld\n", 1086 __func__, 1087 (unsigned long long) nexttbtt, 1088 (long long) ((long long)nexttbtt * 1024LL) - (long long)tsf); 1089 1090 memset(&bs, 0, sizeof(bs)); 1091 bs.bs_intval = intval; 1092 bs.bs_nexttbtt = nexttbtt; 1093 bs.bs_dtimperiod = dtimperiod*intval; 1094 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval; 1095 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod; 1096 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod; 1097 bs.bs_cfpmaxduration = 0; 1098 #if 0 1099 /* 1100 * The 802.11 layer records the offset to the DTIM 1101 * bitmap while receiving beacons; use it here to 1102 * enable h/w detection of our AID being marked in 1103 * the bitmap vector (to indicate frames for us are 1104 * pending at the AP). 1105 * XXX do DTIM handling in s/w to WAR old h/w bugs 1106 * XXX enable based on h/w rev for newer chips 1107 */ 1108 bs.bs_timoffset = ni->ni_timoff; 1109 #endif 1110 /* 1111 * Calculate the number of consecutive beacons to miss 1112 * before taking a BMISS interrupt. 1113 * Note that we clamp the result to at most 10 beacons. 1114 */ 1115 bs.bs_bmissthreshold = vap->iv_bmissthreshold; 1116 if (bs.bs_bmissthreshold > 10) 1117 bs.bs_bmissthreshold = 10; 1118 else if (bs.bs_bmissthreshold <= 0) 1119 bs.bs_bmissthreshold = 1; 1120 1121 /* 1122 * Calculate sleep duration. The configuration is 1123 * given in ms. We insure a multiple of the beacon 1124 * period is used. Also, if the sleep duration is 1125 * greater than the DTIM period then it makes senses 1126 * to make it a multiple of that. 1127 * 1128 * XXX fixed at 100ms 1129 */ 1130 bs.bs_sleepduration = 1131 roundup(IEEE80211_MS_TO_TU(100), bs.bs_intval); 1132 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1133 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1134 1135 DPRINTF(sc, ATH_DEBUG_BEACON, 1136 "%s: tsf %ju tsf:tu %u intval %u nexttbtt %u dtim %u " 1137 "nextdtim %u bmiss %u sleep %u cfp:period %u " 1138 "maxdur %u next %u timoffset %u\n" 1139 , __func__ 1140 , tsf 1141 , tsftu 1142 , bs.bs_intval 1143 , bs.bs_nexttbtt 1144 , bs.bs_dtimperiod 1145 , bs.bs_nextdtim 1146 , bs.bs_bmissthreshold 1147 , bs.bs_sleepduration 1148 , bs.bs_cfpperiod 1149 , bs.bs_cfpmaxduration 1150 , bs.bs_cfpnext 1151 , bs.bs_timoffset 1152 ); 1153 ath_hal_intrset(ah, 0); 1154 ath_hal_beacontimers(ah, &bs); 1155 sc->sc_imask |= HAL_INT_BMISS; 1156 ath_hal_intrset(ah, sc->sc_imask); 1157 } else { 1158 ath_hal_intrset(ah, 0); 1159 if (nexttbtt == intval) 1160 intval |= HAL_BEACON_RESET_TSF; 1161 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1162 /* 1163 * In IBSS mode enable the beacon timers but only 1164 * enable SWBA interrupts if we need to manually 1165 * prepare beacon frames. Otherwise we use a 1166 * self-linked tx descriptor and let the hardware 1167 * deal with things. 1168 */ 1169 intval |= HAL_BEACON_ENA; 1170 if (!sc->sc_hasveol) 1171 sc->sc_imask |= HAL_INT_SWBA; 1172 if ((intval & HAL_BEACON_RESET_TSF) == 0) { 1173 /* 1174 * Pull nexttbtt forward to reflect 1175 * the current TSF. 1176 */ 1177 tsf = ath_hal_gettsf64(ah); 1178 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE; 1179 do { 1180 nexttbtt += intval; 1181 } while (nexttbtt < tsftu); 1182 } 1183 ath_beaconq_config(sc); 1184 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP || 1185 ic->ic_opmode == IEEE80211_M_MBSS) { 1186 /* 1187 * In AP/mesh mode we enable the beacon timers 1188 * and SWBA interrupts to prepare beacon frames. 1189 */ 1190 intval |= HAL_BEACON_ENA; 1191 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1192 ath_beaconq_config(sc); 1193 } 1194 1195 /* 1196 * Now dirty things because for now, the EDMA HAL has 1197 * nexttbtt and intval is TU/8. 1198 */ 1199 if (sc->sc_isedma) { 1200 nexttbtt_u8 = (nexttbtt << 3); 1201 intval_u8 = (intval << 3); 1202 if (intval & HAL_BEACON_ENA) 1203 intval_u8 |= HAL_BEACON_ENA; 1204 if (intval & HAL_BEACON_RESET_TSF) 1205 intval_u8 |= HAL_BEACON_RESET_TSF; 1206 ath_hal_beaconinit(ah, nexttbtt_u8, intval_u8); 1207 } else 1208 ath_hal_beaconinit(ah, nexttbtt, intval); 1209 sc->sc_bmisscount = 0; 1210 ath_hal_intrset(ah, sc->sc_imask); 1211 /* 1212 * When using a self-linked beacon descriptor in 1213 * ibss mode load it once here. 1214 */ 1215 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol) 1216 ath_beacon_start_adhoc(sc, vap); 1217 } 1218 ieee80211_free_node(ni); 1219 1220 ATH_LOCK(sc); 1221 ath_power_restore_power_state(sc); 1222 ATH_UNLOCK(sc); 1223 #undef FUDGE 1224 #undef TSF_TO_TU 1225 } 1226