1 /*- 2 * Copyright (c) 2012 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 #ifndef __IF_ATH_ALQ_H__ 32 #define __IF_ATH_ALQ_H__ 33 34 #define ATH_ALQ_INIT_STATE 1 35 struct if_ath_alq_init_state { 36 uint32_t sc_mac_version; 37 uint32_t sc_mac_revision; 38 uint32_t sc_phy_rev; 39 uint32_t sc_hal_magic; 40 }; 41 42 #define ATH_ALQ_EDMA_TXSTATUS 2 43 #define ATH_ALQ_EDMA_RXSTATUS 3 44 #define ATH_ALQ_EDMA_TXDESC 4 45 46 #define ATH_ALQ_TDMA_BEACON_STATE 5 47 struct if_ath_alq_tdma_beacon_state { 48 uint64_t rx_tsf; /* RX TSF of beacon frame */ 49 uint64_t beacon_tsf; /* TSF inside beacon frame */ 50 uint64_t tsf64; 51 uint64_t nextslot_tsf; 52 uint32_t nextslot_tu; 53 uint32_t txtime; 54 }; 55 56 #define ATH_ALQ_TDMA_TIMER_CONFIG 6 57 struct if_ath_alq_tdma_timer_config { 58 uint32_t tdma_slot; 59 uint32_t tdma_slotlen; 60 uint32_t tdma_slotcnt; 61 uint32_t tdma_bintval; 62 uint32_t tdma_guard; 63 uint32_t tdma_scbintval; 64 uint32_t tdma_dbaprep; 65 }; 66 67 #define ATH_ALQ_TDMA_SLOT_CALC 7 68 struct if_ath_alq_tdma_slot_calc { 69 uint64_t nexttbtt; 70 uint64_t next_slot; 71 int32_t tsfdelta; 72 int32_t avg_plus; 73 int32_t avg_minus; 74 }; 75 76 #define ATH_ALQ_TDMA_TSF_ADJUST 8 77 struct if_ath_alq_tdma_tsf_adjust { 78 uint64_t tsf64_old; 79 uint64_t tsf64_new; 80 int32_t tsfdelta; 81 }; 82 83 #define ATH_ALQ_TDMA_TIMER_SET 9 84 struct if_ath_alq_tdma_timer_set { 85 uint32_t bt_intval; 86 uint32_t bt_nexttbtt; 87 uint32_t bt_nextdba; 88 uint32_t bt_nextswba; 89 uint32_t bt_nextatim; 90 uint32_t bt_flags; 91 uint32_t sc_tdmadbaprep; 92 uint32_t sc_tdmaswbaprep; 93 }; 94 95 #define ATH_ALQ_INTR_STATUS 10 96 struct if_ath_alq_interrupt { 97 uint32_t intr_status; 98 uint32_t intr_state[8]; 99 uint32_t intr_syncstate; 100 }; 101 102 /* 103 * These will always be logged, regardless. 104 */ 105 #define ATH_ALQ_LOG_ALWAYS_MASK 0x00000001 106 107 #define ATH_ALQ_FILENAME_LEN 128 108 #define ATH_ALQ_DEVNAME_LEN 32 109 110 struct if_ath_alq { 111 uint32_t sc_alq_debug; /* Debug flags to report */ 112 struct alq * sc_alq_alq; /* alq state */ 113 unsigned int sc_alq_qsize; /* queue size */ 114 unsigned int sc_alq_numlost; /* number of "lost" entries */ 115 int sc_alq_isactive; 116 char sc_alq_devname[ATH_ALQ_DEVNAME_LEN]; 117 char sc_alq_filename[ATH_ALQ_FILENAME_LEN]; 118 struct if_ath_alq_init_state sc_alq_cfg; 119 }; 120 121 /* 128 bytes in total */ 122 #define ATH_ALQ_PAYLOAD_LEN 112 123 124 struct if_ath_alq_hdr { 125 uint64_t threadid; 126 uint32_t tstamp_sec; 127 uint32_t tstamp_usec; 128 uint16_t op; 129 uint16_t len; /* Length of (optional) payload */ 130 }; 131 132 struct if_ath_alq_payload { 133 struct if_ath_alq_hdr hdr; 134 char payload[]; 135 }; 136 137 #ifdef _KERNEL 138 static inline int 139 if_ath_alq_checkdebug(struct if_ath_alq *alq, uint16_t op) 140 { 141 142 return ((alq->sc_alq_debug | ATH_ALQ_LOG_ALWAYS_MASK) 143 & (1 << (op - 1))); 144 } 145 146 extern void if_ath_alq_init(struct if_ath_alq *alq, const char *devname); 147 extern void if_ath_alq_setcfg(struct if_ath_alq *alq, uint32_t macVer, 148 uint32_t macRev, uint32_t phyRev, uint32_t halMagic); 149 extern void if_ath_alq_tidyup(struct if_ath_alq *alq); 150 extern int if_ath_alq_start(struct if_ath_alq *alq); 151 extern int if_ath_alq_stop(struct if_ath_alq *alq); 152 extern void if_ath_alq_post(struct if_ath_alq *alq, uint16_t op, 153 uint16_t len, const char *buf); 154 155 /* XXX maybe doesn't belong here? */ 156 static inline void 157 if_ath_alq_post_intr(struct if_ath_alq *alq, uint32_t status, 158 uint32_t *state, uint32_t sync_state) 159 { 160 int i; 161 struct if_ath_alq_interrupt intr; 162 163 if (! if_ath_alq_checkdebug(alq, ATH_ALQ_INTR_STATUS)) 164 return; 165 166 intr.intr_status = htobe32(status); 167 for (i = 0; i < 8; i++) 168 intr.intr_state[i] = htobe32(state[i]); 169 intr.intr_syncstate = htobe32(sync_state); 170 171 if_ath_alq_post(alq, ATH_ALQ_INTR_STATUS, sizeof(intr), 172 (const char *) &intr); 173 } 174 175 #endif /* _KERNEL */ 176 177 #endif 178