1 /*- 2 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 22 * 23 * NO WARRANTY 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 */ 36 37 #include <sys/cdefs.h> 38 __FBSDID("$FreeBSD$"); 39 40 /* 41 * Driver for the Atheros Wireless LAN controller. 42 * 43 * This software is derived from work of Atsushi Onoe; his contribution 44 * is greatly appreciated. 45 */ 46 47 #include "opt_inet.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/sysctl.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/lock.h> 55 #include <sys/mutex.h> 56 #include <sys/kernel.h> 57 #include <sys/socket.h> 58 #include <sys/sockio.h> 59 #include <sys/errno.h> 60 #include <sys/callout.h> 61 #include <sys/bus.h> 62 #include <sys/endian.h> 63 64 #include <machine/bus.h> 65 66 #include <net/if.h> 67 #include <net/if_dl.h> 68 #include <net/if_media.h> 69 #include <net/if_arp.h> 70 #include <net/ethernet.h> 71 #include <net/if_llc.h> 72 73 #include <net80211/ieee80211_var.h> 74 75 #include <net/bpf.h> 76 77 #ifdef INET 78 #include <netinet/in.h> 79 #include <netinet/if_ether.h> 80 #endif 81 82 #define AR_DEBUG 83 #include <dev/ath/if_athvar.h> 84 #include <contrib/dev/ath/ah_desc.h> 85 86 /* unalligned little endian access */ 87 #define LE_READ_2(p) \ 88 ((u_int16_t) \ 89 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8))) 90 #define LE_READ_4(p) \ 91 ((u_int32_t) \ 92 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \ 93 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24))) 94 95 static void ath_init(void *); 96 static void ath_stop(struct ifnet *); 97 static void ath_start(struct ifnet *); 98 static void ath_reset(struct ath_softc *); 99 static int ath_media_change(struct ifnet *); 100 static void ath_watchdog(struct ifnet *); 101 static int ath_ioctl(struct ifnet *, u_long, caddr_t); 102 static void ath_fatal_proc(void *, int); 103 static void ath_rxorn_proc(void *, int); 104 static void ath_bmiss_proc(void *, int); 105 static void ath_initkeytable(struct ath_softc *); 106 static void ath_mode_init(struct ath_softc *); 107 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *); 108 static void ath_beacon_proc(void *, int); 109 static void ath_beacon_free(struct ath_softc *); 110 static void ath_beacon_config(struct ath_softc *); 111 static int ath_desc_alloc(struct ath_softc *); 112 static void ath_desc_free(struct ath_softc *); 113 static struct ieee80211_node *ath_node_alloc(struct ieee80211com *); 114 static void ath_node_free(struct ieee80211com *, struct ieee80211_node *); 115 static void ath_node_copy(struct ieee80211com *, 116 struct ieee80211_node *, const struct ieee80211_node *); 117 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *); 118 static void ath_rx_proc(void *, int); 119 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *, 120 struct ath_buf *, struct mbuf *); 121 static void ath_tx_proc(void *, int); 122 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *); 123 static void ath_draintxq(struct ath_softc *); 124 static void ath_stoprecv(struct ath_softc *); 125 static int ath_startrecv(struct ath_softc *); 126 static void ath_next_scan(void *); 127 static void ath_calibrate(void *); 128 static int ath_newstate(struct ieee80211com *, enum ieee80211_state, int); 129 static void ath_newassoc(struct ieee80211com *, 130 struct ieee80211_node *, int); 131 static int ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor); 132 133 static int ath_rate_setup(struct ath_softc *sc, u_int mode); 134 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode); 135 static void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state); 136 static void ath_rate_ctl(void *, struct ieee80211_node *); 137 138 SYSCTL_DECL(_hw_ath); 139 140 /* XXX validate sysctl values */ 141 static int ath_dwelltime = 200; /* 5 channels/second */ 142 SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime, 143 0, "channel dwell time (ms) for AP/station scanning"); 144 static int ath_calinterval = 30; /* calibrate every 30 secs */ 145 SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval, 146 0, "chip calibration interval (secs)"); 147 static int ath_outdoor = AH_TRUE; /* outdoor operation */ 148 SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor, 149 0, "enable/disable outdoor operation"); 150 static int ath_countrycode = CTRY_DEFAULT; /* country code */ 151 SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode, 152 0, "country code"); 153 static int ath_regdomain = 0; /* regulatory domain */ 154 SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain, 155 0, "regulatory domain"); 156 157 #ifdef AR_DEBUG 158 int ath_debug = 0; 159 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug, 160 0, "control debugging printfs"); 161 #define IFF_DUMPPKTS(_ifp) \ 162 (ath_debug || \ 163 ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 164 static void ath_printrxbuf(struct ath_buf *bf, int); 165 static void ath_printtxbuf(struct ath_buf *bf, int); 166 #define DPRINTF(X) if (ath_debug) printf X 167 #define DPRINTF2(X) if (ath_debug > 1) printf X 168 #else 169 #define IFF_DUMPPKTS(_ifp) \ 170 (((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2)) 171 #define DPRINTF(X) 172 #define DPRINTF2(X) 173 #endif 174 175 int 176 ath_attach(u_int16_t devid, struct ath_softc *sc) 177 { 178 struct ieee80211com *ic = &sc->sc_ic; 179 struct ifnet *ifp = &ic->ic_if; 180 struct ath_hal *ah; 181 HAL_STATUS status; 182 int error = 0; 183 184 DPRINTF(("ath_attach: devid 0x%x\n", devid)); 185 186 /* set these up early for if_printf use */ 187 ifp->if_unit = device_get_unit(sc->sc_dev); 188 ifp->if_name = "ath"; 189 190 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status); 191 if (ah == NULL) { 192 if_printf(ifp, "unable to attach hardware; HAL status %u\n", 193 status); 194 error = ENXIO; 195 goto bad; 196 } 197 sc->sc_ah = ah; 198 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */ 199 200 /* 201 * Collect the channel list using the default country 202 * code and including outdoor channels. The 802.11 layer 203 * is resposible for filtering this list based on settings 204 * like the phy mode. 205 */ 206 error = ath_getchannels(sc, ath_countrycode, ath_outdoor); 207 if (error != 0) 208 goto bad; 209 /* 210 * Copy these back; they are set as a side effect 211 * of constructing the channel list. 212 */ 213 ath_regdomain = ath_hal_getregdomain(ah); 214 ath_countrycode = ath_hal_getcountrycode(ah); 215 216 /* 217 * Setup rate tables for all potential media types. 218 */ 219 ath_rate_setup(sc, IEEE80211_MODE_11A); 220 ath_rate_setup(sc, IEEE80211_MODE_11B); 221 ath_rate_setup(sc, IEEE80211_MODE_11G); 222 ath_rate_setup(sc, IEEE80211_MODE_TURBO); 223 224 error = ath_desc_alloc(sc); 225 if (error != 0) { 226 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 227 goto bad; 228 } 229 callout_init(&sc->sc_scan_ch, CALLOUT_MPSAFE); 230 callout_init(&sc->sc_cal_ch, CALLOUT_MPSAFE); 231 232 mtx_init(&sc->sc_txbuflock, 233 device_get_nameunit(sc->sc_dev), "xmit buf q", MTX_DEF); 234 mtx_init(&sc->sc_txqlock, 235 device_get_nameunit(sc->sc_dev), "xmit q", MTX_DEF); 236 237 TASK_INIT(&sc->sc_txtask, 0, ath_tx_proc, sc); 238 TASK_INIT(&sc->sc_rxtask, 0, ath_rx_proc, sc); 239 TASK_INIT(&sc->sc_swbatask, 0, ath_beacon_proc, sc); 240 TASK_INIT(&sc->sc_rxorntask, 0, ath_rxorn_proc, sc); 241 TASK_INIT(&sc->sc_fataltask, 0, ath_fatal_proc, sc); 242 TASK_INIT(&sc->sc_bmisstask, 0, ath_bmiss_proc, sc); 243 244 /* 245 * For now just pre-allocate one data queue and one 246 * beacon queue. Note that the HAL handles resetting 247 * them at the needed time. Eventually we'll want to 248 * allocate more tx queues for splitting management 249 * frames and for QOS support. 250 */ 251 sc->sc_txhalq = ath_hal_setuptxqueue(ah, 252 HAL_TX_QUEUE_DATA, 253 AH_TRUE /* enable interrupts */ 254 ); 255 if (sc->sc_txhalq == (u_int) -1) { 256 if_printf(ifp, "unable to setup a data xmit queue!\n"); 257 goto bad; 258 } 259 sc->sc_bhalq = ath_hal_setuptxqueue(ah, 260 HAL_TX_QUEUE_BEACON, 261 AH_TRUE /* enable interrupts */ 262 ); 263 if (sc->sc_bhalq == (u_int) -1) { 264 if_printf(ifp, "unable to setup a beacon xmit queue!\n"); 265 goto bad; 266 } 267 268 ifp->if_softc = sc; 269 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 270 ifp->if_start = ath_start; 271 ifp->if_watchdog = ath_watchdog; 272 ifp->if_ioctl = ath_ioctl; 273 ifp->if_init = ath_init; 274 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 275 276 ic->ic_softc = sc; 277 ic->ic_newassoc = ath_newassoc; 278 /* XXX not right but it's not used anywhere important */ 279 ic->ic_phytype = IEEE80211_T_OFDM; 280 ic->ic_opmode = IEEE80211_M_STA; 281 ic->ic_caps = IEEE80211_C_WEP | IEEE80211_C_IBSS | IEEE80211_C_HOSTAP 282 | IEEE80211_C_MONITOR; 283 /* NB: 11g support is identified when we fetch the channel set */ 284 if (sc->sc_have11g) 285 ic->ic_caps |= IEEE80211_C_SHPREAMBLE; 286 287 /* get mac address from hardware */ 288 ath_hal_getmac(ah, ic->ic_myaddr); 289 290 /* call MI attach routine. */ 291 ieee80211_ifattach(ifp); 292 /* override default methods */ 293 ic->ic_node_alloc = ath_node_alloc; 294 ic->ic_node_free = ath_node_free; 295 ic->ic_node_copy = ath_node_copy; 296 sc->sc_newstate = ic->ic_newstate; 297 ic->ic_newstate = ath_newstate; 298 /* complete initialization */ 299 ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status); 300 301 if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr)); 302 303 return 0; 304 bad: 305 if (ah) 306 ath_hal_detach(ah); 307 sc->sc_invalid = 1; 308 return error; 309 } 310 311 int 312 ath_detach(struct ath_softc *sc) 313 { 314 struct ifnet *ifp = &sc->sc_ic.ic_if; 315 316 DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags)); 317 318 mtx_lock(&sc->sc_mtx); 319 ath_stop(ifp); 320 ath_desc_free(sc); 321 ath_hal_detach(sc->sc_ah); 322 ieee80211_ifdetach(ifp); 323 mtx_unlock(&sc->sc_mtx); 324 return 0; 325 } 326 327 void 328 ath_suspend(struct ath_softc *sc) 329 { 330 struct ifnet *ifp = &sc->sc_ic.ic_if; 331 332 DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags)); 333 334 ath_stop(ifp); 335 } 336 337 void 338 ath_resume(struct ath_softc *sc) 339 { 340 struct ifnet *ifp = &sc->sc_ic.ic_if; 341 342 DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags)); 343 344 if (ifp->if_flags & IFF_UP) { 345 ath_init(ifp); 346 if (ifp->if_flags & IFF_RUNNING) 347 ath_start(ifp); 348 } 349 } 350 351 void 352 ath_shutdown(struct ath_softc *sc) 353 { 354 struct ifnet *ifp = &sc->sc_ic.ic_if; 355 356 DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags)); 357 358 ath_stop(ifp); 359 } 360 361 void 362 ath_intr(void *arg) 363 { 364 struct ath_softc *sc = arg; 365 struct ieee80211com *ic = &sc->sc_ic; 366 struct ifnet *ifp = &ic->ic_if; 367 struct ath_hal *ah = sc->sc_ah; 368 HAL_INT status; 369 370 if (sc->sc_invalid) { 371 /* 372 * The hardware is not ready/present, don't touch anything. 373 * Note this can happen early on if the IRQ is shared. 374 */ 375 DPRINTF(("ath_intr: invalid; ignored\n")); 376 return; 377 } 378 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) { 379 DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags)); 380 ath_hal_getisr(ah, &status); /* clear ISR */ 381 ath_hal_intrset(ah, 0); /* disable further intr's */ 382 return; 383 } 384 ath_hal_getisr(ah, &status); /* NB: clears ISR too */ 385 DPRINTF2(("ath_intr: status 0x%x\n", status)); 386 #ifdef AR_DEBUG 387 if (ath_debug && 388 (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) { 389 if_printf(ifp, "ath_intr: status 0x%x\n", status); 390 ath_hal_dumpstate(ah); 391 } 392 #endif /* AR_DEBUG */ 393 if (status & HAL_INT_FATAL) { 394 sc->sc_stats.ast_hardware++; 395 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 396 taskqueue_enqueue(taskqueue_swi, &sc->sc_fataltask); 397 } else if (status & HAL_INT_RXORN) { 398 sc->sc_stats.ast_rxorn++; 399 ath_hal_intrset(ah, 0); /* disable intr's until reset */ 400 taskqueue_enqueue(taskqueue_swi, &sc->sc_rxorntask); 401 } else { 402 if (status & HAL_INT_RXEOL) { 403 /* 404 * NB: the hardware should re-read the link when 405 * RXE bit is written, but it doesn't work at 406 * least on older hardware revs. 407 */ 408 sc->sc_stats.ast_rxeol++; 409 sc->sc_rxlink = NULL; 410 } 411 if (status & HAL_INT_TXURN) { 412 sc->sc_stats.ast_txurn++; 413 /* bump tx trigger level */ 414 ath_hal_updatetxtriglevel(ah, AH_TRUE); 415 } 416 if (status & HAL_INT_RX) 417 taskqueue_enqueue(taskqueue_swi, &sc->sc_rxtask); 418 if (status & HAL_INT_TX) 419 taskqueue_enqueue(taskqueue_swi, &sc->sc_txtask); 420 if (status & HAL_INT_SWBA) 421 taskqueue_enqueue(taskqueue_swi, &sc->sc_swbatask); 422 if (status & HAL_INT_BMISS) { 423 sc->sc_stats.ast_bmiss++; 424 taskqueue_enqueue(taskqueue_swi, &sc->sc_bmisstask); 425 } 426 } 427 } 428 429 static void 430 ath_fatal_proc(void *arg, int pending) 431 { 432 struct ath_softc *sc = arg; 433 434 device_printf(sc->sc_dev, "hardware error; resetting\n"); 435 ath_reset(sc); 436 } 437 438 static void 439 ath_rxorn_proc(void *arg, int pending) 440 { 441 struct ath_softc *sc = arg; 442 443 device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n"); 444 ath_reset(sc); 445 } 446 447 static void 448 ath_bmiss_proc(void *arg, int pending) 449 { 450 struct ath_softc *sc = arg; 451 struct ieee80211com *ic = &sc->sc_ic; 452 453 DPRINTF(("ath_bmiss_proc: pending %u\n", pending)); 454 KASSERT(ic->ic_opmode == IEEE80211_M_STA, 455 ("unexpect operating mode %u", ic->ic_opmode)); 456 if (ic->ic_state == IEEE80211_S_RUN) 457 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 458 } 459 460 static u_int 461 ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan) 462 { 463 static const u_int modeflags[] = { 464 0, /* IEEE80211_MODE_AUTO */ 465 CHANNEL_A, /* IEEE80211_MODE_11A */ 466 CHANNEL_B, /* IEEE80211_MODE_11B */ 467 CHANNEL_PUREG, /* IEEE80211_MODE_11G */ 468 CHANNEL_T /* IEEE80211_MODE_TURBO */ 469 }; 470 return modeflags[ieee80211_chan2mode(ic, chan)]; 471 } 472 473 static void 474 ath_init(void *arg) 475 { 476 struct ath_softc *sc = (struct ath_softc *) arg; 477 struct ieee80211com *ic = &sc->sc_ic; 478 struct ifnet *ifp = &ic->ic_if; 479 struct ieee80211_node *ni; 480 enum ieee80211_phymode mode; 481 struct ath_hal *ah = sc->sc_ah; 482 HAL_STATUS status; 483 HAL_CHANNEL hchan; 484 485 DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags)); 486 487 mtx_lock(&sc->sc_mtx); 488 /* 489 * Stop anything previously setup. This is safe 490 * whether this is the first time through or not. 491 */ 492 ath_stop(ifp); 493 494 /* 495 * The basic interface to setting the hardware in a good 496 * state is ``reset''. On return the hardware is known to 497 * be powered up and with interrupts disabled. This must 498 * be followed by initialization of the appropriate bits 499 * and then setup of the interrupt mask. 500 */ 501 hchan.channel = ic->ic_ibss_chan->ic_freq; 502 hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan); 503 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) { 504 if_printf(ifp, "unable to reset hardware; hal status %u\n", 505 status); 506 goto done; 507 } 508 509 /* 510 * Setup the hardware after reset: the key cache 511 * is filled as needed and the receive engine is 512 * set going. Frame transmit is handled entirely 513 * in the frame output path; there's nothing to do 514 * here except setup the interrupt mask. 515 */ 516 if (ic->ic_flags & IEEE80211_F_WEPON) 517 ath_initkeytable(sc); 518 if (ath_startrecv(sc) != 0) { 519 if_printf(ifp, "unable to start recv logic\n"); 520 goto done; 521 } 522 523 /* 524 * Enable interrupts. 525 */ 526 sc->sc_imask = HAL_INT_RX | HAL_INT_TX 527 | HAL_INT_RXEOL | HAL_INT_RXORN 528 | HAL_INT_FATAL | HAL_INT_GLOBAL; 529 ath_hal_intrset(ah, sc->sc_imask); 530 531 ifp->if_flags |= IFF_RUNNING; 532 ic->ic_state = IEEE80211_S_INIT; 533 534 /* 535 * The hardware should be ready to go now so it's safe 536 * to kick the 802.11 state machine as it's likely to 537 * immediately call back to us to send mgmt frames. 538 */ 539 ni = ic->ic_bss; 540 ni->ni_chan = ic->ic_ibss_chan; 541 mode = ieee80211_chan2mode(ic, ni->ni_chan); 542 if (mode != sc->sc_curmode) 543 ath_setcurmode(sc, mode); 544 if (ic->ic_opmode != IEEE80211_M_MONITOR) 545 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 546 else 547 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 548 done: 549 mtx_unlock(&sc->sc_mtx); 550 } 551 552 static void 553 ath_stop(struct ifnet *ifp) 554 { 555 struct ieee80211com *ic = (struct ieee80211com *) ifp; 556 struct ath_softc *sc = ifp->if_softc; 557 struct ath_hal *ah = sc->sc_ah; 558 559 DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n", 560 sc->sc_invalid, ifp->if_flags)); 561 562 mtx_lock(&sc->sc_mtx); 563 if (ifp->if_flags & IFF_RUNNING) { 564 /* 565 * Shutdown the hardware and driver: 566 * disable interrupts 567 * turn off timers 568 * clear transmit machinery 569 * clear receive machinery 570 * drain and release tx queues 571 * reclaim beacon resources 572 * reset 802.11 state machine 573 * power down hardware 574 * 575 * Note that some of this work is not possible if the 576 * hardware is gone (invalid). 577 */ 578 ifp->if_flags &= ~IFF_RUNNING; 579 ifp->if_timer = 0; 580 if (!sc->sc_invalid) 581 ath_hal_intrset(ah, 0); 582 ath_draintxq(sc); 583 if (!sc->sc_invalid) 584 ath_stoprecv(sc); 585 else 586 sc->sc_rxlink = NULL; 587 IF_DRAIN(&ifp->if_snd); 588 ath_beacon_free(sc); 589 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 590 if (!sc->sc_invalid) 591 ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0); 592 } 593 mtx_unlock(&sc->sc_mtx); 594 } 595 596 /* 597 * Reset the hardware w/o losing operational state. This is 598 * basically a more efficient way of doing ath_stop, ath_init, 599 * followed by state transitions to the current 802.11 600 * operational state. Used to recover from errors rx overrun 601 * and to reset the hardware when rf gain settings must be reset. 602 */ 603 static void 604 ath_reset(struct ath_softc *sc) 605 { 606 struct ieee80211com *ic = &sc->sc_ic; 607 struct ifnet *ifp = &ic->ic_if; 608 struct ath_hal *ah = sc->sc_ah; 609 struct ieee80211_channel *c; 610 HAL_STATUS status; 611 HAL_CHANNEL hchan; 612 613 /* 614 * Convert to a HAL channel description with the flags 615 * constrained to reflect the current operating mode. 616 */ 617 c = ic->ic_ibss_chan; 618 hchan.channel = c->ic_freq; 619 hchan.channelFlags = ath_chan2flags(ic, c); 620 621 ath_hal_intrset(ah, 0); /* disable interrupts */ 622 ath_draintxq(sc); /* stop xmit side */ 623 ath_stoprecv(sc); /* stop recv side */ 624 /* NB: indicate channel change so we do a full reset */ 625 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) 626 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", 627 __func__, status); 628 ath_hal_intrset(ah, sc->sc_imask); 629 if (ath_startrecv(sc) != 0) /* restart recv */ 630 if_printf(ifp, "%s: unable to start recv logic\n", __func__); 631 ath_start(ifp); /* restart xmit */ 632 if (ic->ic_state == IEEE80211_S_RUN) 633 ath_beacon_config(sc); /* restart beacons */ 634 } 635 636 static void 637 ath_start(struct ifnet *ifp) 638 { 639 struct ath_softc *sc = ifp->if_softc; 640 struct ath_hal *ah = sc->sc_ah; 641 struct ieee80211com *ic = &sc->sc_ic; 642 struct ieee80211_node *ni; 643 struct ath_buf *bf; 644 struct mbuf *m; 645 struct ieee80211_frame *wh; 646 647 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 648 return; 649 for (;;) { 650 /* 651 * Grab a TX buffer and associated resources. 652 */ 653 mtx_lock(&sc->sc_txbuflock); 654 bf = TAILQ_FIRST(&sc->sc_txbuf); 655 if (bf != NULL) 656 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list); 657 mtx_unlock(&sc->sc_txbuflock); 658 if (bf == NULL) { 659 DPRINTF(("ath_start: out of xmit buffers\n")); 660 sc->sc_stats.ast_tx_qstop++; 661 ifp->if_flags |= IFF_OACTIVE; 662 break; 663 } 664 /* 665 * Poll the management queue for frames; they 666 * have priority over normal data frames. 667 */ 668 IF_DEQUEUE(&ic->ic_mgtq, m); 669 if (m == NULL) { 670 /* 671 * No data frames go out unless we're associated. 672 */ 673 if (ic->ic_state != IEEE80211_S_RUN) { 674 DPRINTF(("ath_start: ignore data packet, " 675 "state %u\n", ic->ic_state)); 676 sc->sc_stats.ast_tx_discard++; 677 mtx_lock(&sc->sc_txbuflock); 678 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 679 mtx_unlock(&sc->sc_txbuflock); 680 break; 681 } 682 IF_DEQUEUE(&ifp->if_snd, m); 683 if (m == NULL) { 684 mtx_lock(&sc->sc_txbuflock); 685 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 686 mtx_unlock(&sc->sc_txbuflock); 687 break; 688 } 689 ifp->if_opackets++; 690 BPF_MTAP(ifp, m); 691 /* 692 * Encapsulate the packet in prep for transmission. 693 */ 694 m = ieee80211_encap(ifp, m, &ni); 695 if (m == NULL) { 696 DPRINTF(("ath_start: encapsulation failure\n")); 697 sc->sc_stats.ast_tx_encap++; 698 goto bad; 699 } 700 wh = mtod(m, struct ieee80211_frame *); 701 if (ic->ic_flags & IEEE80211_F_WEPON) 702 wh->i_fc[1] |= IEEE80211_FC1_WEP; 703 } else { 704 /* 705 * Hack! The referenced node pointer is in the 706 * rcvif field of the packet header. This is 707 * placed there by ieee80211_mgmt_output because 708 * we need to hold the reference with the frame 709 * and there's no other way (other than packet 710 * tags which we consider too expensive to use) 711 * to pass it along. 712 */ 713 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 714 m->m_pkthdr.rcvif = NULL; 715 716 wh = mtod(m, struct ieee80211_frame *); 717 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 718 IEEE80211_FC0_SUBTYPE_PROBE_RESP) { 719 /* fill time stamp */ 720 u_int64_t tsf; 721 u_int32_t *tstamp; 722 723 tsf = ath_hal_gettsf64(ah); 724 /* XXX: adjust 100us delay to xmit */ 725 tsf += 100; 726 tstamp = (u_int32_t *)&wh[1]; 727 tstamp[0] = htole32(tsf & 0xffffffff); 728 tstamp[1] = htole32(tsf >> 32); 729 } 730 sc->sc_stats.ast_tx_mgmt++; 731 } 732 if (ic->ic_rawbpf) 733 bpf_mtap(ic->ic_rawbpf, m); 734 735 /* 736 * TODO: 737 * The duration field of 802.11 header should be filled. 738 * XXX This may be done in the ieee80211 layer, but the upper 739 * doesn't know the detail of parameters such as IFS 740 * for now.. 741 */ 742 743 if (IFF_DUMPPKTS(ifp)) 744 ieee80211_dump_pkt(mtod(m, u_int8_t *), m->m_len, 745 ni->ni_rates.rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL, 746 -1); 747 748 if (ath_tx_start(sc, ni, bf, m)) { 749 bad: 750 mtx_lock(&sc->sc_txbuflock); 751 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 752 mtx_unlock(&sc->sc_txbuflock); 753 ifp->if_oerrors++; 754 if (ni && ni != ic->ic_bss) 755 ieee80211_free_node(ic, ni); 756 continue; 757 } 758 759 sc->sc_tx_timer = 5; 760 ifp->if_timer = 1; 761 } 762 } 763 764 static int 765 ath_media_change(struct ifnet *ifp) 766 { 767 int error; 768 769 error = ieee80211_media_change(ifp); 770 if (error == ENETRESET) { 771 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 772 (IFF_RUNNING|IFF_UP)) 773 ath_init(ifp); /* XXX lose error */ 774 error = 0; 775 } 776 return error; 777 } 778 779 static void 780 ath_watchdog(struct ifnet *ifp) 781 { 782 struct ath_softc *sc = ifp->if_softc; 783 struct ieee80211com *ic = &sc->sc_ic; 784 785 ifp->if_timer = 0; 786 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) 787 return; 788 if (sc->sc_tx_timer) { 789 if (--sc->sc_tx_timer == 0) { 790 if_printf(ifp, "device timeout\n"); 791 #ifdef AR_DEBUG 792 if (ath_debug) 793 ath_hal_dumpstate(sc->sc_ah); 794 #endif /* AR_DEBUG */ 795 ath_init(ifp); /* XXX ath_reset??? */ 796 ifp->if_oerrors++; 797 sc->sc_stats.ast_watchdog++; 798 return; 799 } 800 ifp->if_timer = 1; 801 } 802 if (ic->ic_fixed_rate == -1) { 803 /* 804 * Run the rate control algorithm if we're not 805 * locked at a fixed rate. 806 */ 807 if (ic->ic_opmode == IEEE80211_M_STA) 808 ath_rate_ctl(sc, ic->ic_bss); 809 else 810 ieee80211_iterate_nodes(ic, ath_rate_ctl, sc); 811 } 812 ieee80211_watchdog(ifp); 813 } 814 815 static int 816 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 817 { 818 struct ath_softc *sc = ifp->if_softc; 819 struct ifreq *ifr = (struct ifreq *)data; 820 int error = 0; 821 822 mtx_lock(&sc->sc_mtx); 823 switch (cmd) { 824 case SIOCSIFFLAGS: 825 if (ifp->if_flags & IFF_UP) { 826 if (ifp->if_flags & IFF_RUNNING) { 827 /* 828 * To avoid rescanning another access point, 829 * do not call ath_init() here. Instead, 830 * only reflect promisc mode settings. 831 */ 832 ath_mode_init(sc); 833 } else 834 ath_init(ifp); /* XXX lose error */ 835 } else 836 ath_stop(ifp); 837 break; 838 case SIOCADDMULTI: 839 case SIOCDELMULTI: 840 /* 841 * The upper layer has already installed/removed 842 * the multicast address(es), just recalculate the 843 * multicast filter for the card. 844 */ 845 if (ifp->if_flags & IFF_RUNNING) 846 ath_mode_init(sc); 847 break; 848 case SIOCGATHSTATS: 849 copyout(&sc->sc_stats, ifr->ifr_data, sizeof (sc->sc_stats)); 850 break; 851 default: 852 error = ieee80211_ioctl(ifp, cmd, data); 853 if (error == ENETRESET) { 854 if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) == 855 (IFF_RUNNING|IFF_UP)) 856 ath_init(ifp); /* XXX lose error */ 857 error = 0; 858 } 859 break; 860 } 861 mtx_unlock(&sc->sc_mtx); 862 return error; 863 } 864 865 /* 866 * Fill the hardware key cache with key entries. 867 */ 868 static void 869 ath_initkeytable(struct ath_softc *sc) 870 { 871 struct ieee80211com *ic = &sc->sc_ic; 872 struct ath_hal *ah = sc->sc_ah; 873 int i; 874 875 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 876 struct ieee80211_wepkey *k = &ic->ic_nw_keys[i]; 877 if (k->wk_len == 0) 878 ath_hal_keyreset(ah, i); 879 else 880 /* XXX return value */ 881 /* NB: this uses HAL_KEYVAL == ieee80211_wepkey */ 882 ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k); 883 } 884 } 885 886 static void 887 ath_mode_init(struct ath_softc *sc) 888 { 889 struct ieee80211com *ic = &sc->sc_ic; 890 struct ath_hal *ah = sc->sc_ah; 891 struct ifnet *ifp = &ic->ic_if; 892 u_int32_t rfilt, mfilt[2], val; 893 u_int8_t pos; 894 struct ifmultiaddr *ifma; 895 896 /* configure operational mode */ 897 ath_hal_setopmode(ah, ic->ic_opmode); 898 899 /* receive filter */ 900 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 901 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 902 if (ic->ic_opmode != IEEE80211_M_STA) 903 rfilt |= HAL_RX_FILTER_PROBEREQ; 904 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 905 (ifp->if_flags & IFF_PROMISC)) 906 rfilt |= HAL_RX_FILTER_PROM; 907 if (ic->ic_state == IEEE80211_S_SCAN) 908 rfilt |= HAL_RX_FILTER_BEACON; 909 ath_hal_setrxfilter(ah, rfilt); 910 911 /* calculate and install multicast filter */ 912 if ((ifp->if_flags & IFF_ALLMULTI) == 0) { 913 mfilt[0] = mfilt[1] = 0; 914 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 915 caddr_t dl; 916 917 /* calculate XOR of eight 6bit values */ 918 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 919 val = LE_READ_4(dl + 0); 920 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 921 val = LE_READ_4(dl + 3); 922 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val; 923 pos &= 0x3f; 924 mfilt[pos / 32] |= (1 << (pos % 32)); 925 } 926 } else { 927 mfilt[0] = mfilt[1] = ~0; 928 } 929 ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]); 930 DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n", 931 rfilt, mfilt[0], mfilt[1])); 932 } 933 934 static void 935 ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error) 936 { 937 struct ath_buf *bf = arg; 938 939 KASSERT(nseg <= ATH_MAX_SCATTER, 940 ("ath_mbuf_load_cb: too many DMA segments %u", nseg)); 941 bf->bf_mapsize = mapsize; 942 bf->bf_nseg = nseg; 943 bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0])); 944 } 945 946 static int 947 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni) 948 { 949 struct ieee80211com *ic = &sc->sc_ic; 950 struct ifnet *ifp = &ic->ic_if; 951 struct ath_hal *ah = sc->sc_ah; 952 struct ieee80211_frame *wh; 953 struct ath_buf *bf; 954 struct ath_desc *ds; 955 struct mbuf *m; 956 int error, pktlen; 957 u_int8_t *frm, rate; 958 u_int16_t capinfo; 959 struct ieee80211_rateset *rs; 960 const HAL_RATE_TABLE *rt; 961 962 bf = sc->sc_bcbuf; 963 if (bf->bf_m != NULL) { 964 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 965 m_freem(bf->bf_m); 966 bf->bf_m = NULL; 967 bf->bf_node = NULL; 968 } 969 /* 970 * NB: the beacon data buffer must be 32-bit aligned; 971 * we assume the mbuf routines will return us something 972 * with this alignment (perhaps should assert). 973 */ 974 rs = &ni->ni_rates; 975 pktlen = sizeof (struct ieee80211_frame) 976 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 6; 977 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 978 pktlen += 2; 979 if (pktlen <= MHLEN) 980 MGETHDR(m, M_DONTWAIT, MT_DATA); 981 else 982 m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 983 if (m == NULL) { 984 DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n", 985 pktlen)); 986 sc->sc_stats.ast_be_nombuf++; 987 return ENOMEM; 988 } 989 990 wh = mtod(m, struct ieee80211_frame *); 991 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 992 IEEE80211_FC0_SUBTYPE_BEACON; 993 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 994 *(u_int16_t *)wh->i_dur = 0; 995 memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN); 996 memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN); 997 memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN); 998 *(u_int16_t *)wh->i_seq = 0; 999 1000 /* 1001 * beacon frame format 1002 * [8] time stamp 1003 * [2] beacon interval 1004 * [2] cabability information 1005 * [tlv] ssid 1006 * [tlv] supported rates 1007 * [tlv] parameter set (IBSS) 1008 * [tlv] extended supported rates 1009 */ 1010 frm = (u_int8_t *)&wh[1]; 1011 memset(frm, 0, 8); /* timestamp is set by hardware */ 1012 frm += 8; 1013 *(u_int16_t *)frm = htole16(ni->ni_intval); 1014 frm += 2; 1015 if (ic->ic_opmode == IEEE80211_M_IBSS) 1016 capinfo = IEEE80211_CAPINFO_IBSS; 1017 else 1018 capinfo = IEEE80211_CAPINFO_ESS; 1019 if (ic->ic_flags & IEEE80211_F_WEPON) 1020 capinfo |= IEEE80211_CAPINFO_PRIVACY; 1021 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1022 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 1023 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1024 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 1025 *(u_int16_t *)frm = htole16(capinfo); 1026 frm += 2; 1027 *frm++ = IEEE80211_ELEMID_SSID; 1028 *frm++ = ni->ni_esslen; 1029 memcpy(frm, ni->ni_essid, ni->ni_esslen); 1030 frm += ni->ni_esslen; 1031 frm = ieee80211_add_rates(frm, rs); 1032 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1033 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 1034 *frm++ = 2; 1035 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 1036 } else { 1037 /* TODO: TIM */ 1038 *frm++ = IEEE80211_ELEMID_TIM; 1039 *frm++ = 4; /* length */ 1040 *frm++ = 0; /* DTIM count */ 1041 *frm++ = 1; /* DTIM period */ 1042 *frm++ = 0; /* bitmap control */ 1043 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 1044 } 1045 frm = ieee80211_add_xrates(frm, rs); 1046 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 1047 KASSERT(m->m_pkthdr.len <= pktlen, 1048 ("beacon bigger than expected, len %u calculated %u", 1049 m->m_pkthdr.len, pktlen)); 1050 1051 DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len)); 1052 error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m, 1053 ath_mbuf_load_cb, bf, 1054 BUS_DMA_NOWAIT); 1055 if (error != 0) { 1056 m_freem(m); 1057 return error; 1058 } 1059 KASSERT(bf->bf_nseg == 1, 1060 ("ath_beacon_alloc: multi-segment packet; nseg %u", 1061 bf->bf_nseg)); 1062 bf->bf_m = m; 1063 1064 /* setup descriptors */ 1065 ds = bf->bf_desc; 1066 1067 ds->ds_link = 0; 1068 ds->ds_data = bf->bf_segs[0].ds_addr; 1069 /* 1070 * Calculate rate code. 1071 * XXX everything at min xmit rate 1072 */ 1073 rt = sc->sc_currates; 1074 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1075 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1076 rate = rt->info[0].rateCode | rt->info[0].shortPreamble; 1077 else 1078 rate = rt->info[0].rateCode; 1079 ath_hal_setuptxdesc(ah, ds 1080 , m->m_pkthdr.len + IEEE80211_CRC_LEN /* packet length */ 1081 , sizeof(struct ieee80211_frame) /* header length */ 1082 , HAL_PKT_TYPE_BEACON /* Atheros packet type */ 1083 , 0x20 /* txpower XXX */ 1084 , rate, 1 /* series 0 rate/tries */ 1085 , HAL_TXKEYIX_INVALID /* no encryption */ 1086 , 0 /* antenna mode */ 1087 , HAL_TXDESC_NOACK /* no ack for beacons */ 1088 , 0 /* rts/cts rate */ 1089 , 0 /* rts/cts duration */ 1090 ); 1091 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 1092 /* XXX verify mbuf data area covers this roundup */ 1093 ath_hal_filltxdesc(ah, ds 1094 , roundup(bf->bf_segs[0].ds_len, 4) /* buffer length */ 1095 , AH_TRUE /* first segment */ 1096 , AH_TRUE /* last segment */ 1097 ); 1098 1099 return 0; 1100 } 1101 1102 static void 1103 ath_beacon_proc(void *arg, int pending) 1104 { 1105 struct ath_softc *sc = arg; 1106 struct ieee80211com *ic = &sc->sc_ic; 1107 struct ath_buf *bf = sc->sc_bcbuf; 1108 struct ath_hal *ah = sc->sc_ah; 1109 1110 DPRINTF2(("%s: pending %u\n", __func__, pending)); 1111 if (ic->ic_opmode == IEEE80211_M_STA || 1112 bf == NULL || bf->bf_m == NULL) { 1113 DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n", 1114 __func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL)); 1115 return; 1116 } 1117 /* TODO: update beacon to reflect PS poll state */ 1118 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) { 1119 DPRINTF(("%s: beacon queue %u did not stop?", 1120 __func__, sc->sc_bhalq)); 1121 return; /* busy, XXX is this right? */ 1122 } 1123 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1124 1125 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr); 1126 ath_hal_txstart(ah, sc->sc_bhalq); 1127 DPRINTF2(("%s: TXDP%u = %p (%p)\n", __func__, 1128 sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1129 } 1130 1131 static void 1132 ath_beacon_free(struct ath_softc *sc) 1133 { 1134 struct ath_buf *bf = sc->sc_bcbuf; 1135 1136 if (bf->bf_m != NULL) { 1137 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1138 m_freem(bf->bf_m); 1139 bf->bf_m = NULL; 1140 bf->bf_node = NULL; 1141 } 1142 } 1143 1144 /* 1145 * Configure the beacon and sleep timers. 1146 * 1147 * When operating as an AP this resets the TSF and sets 1148 * up the hardware to notify us when we need to issue beacons. 1149 * 1150 * When operating in station mode this sets up the beacon 1151 * timers according to the timestamp of the last received 1152 * beacon and the current TSF, configures PCF and DTIM 1153 * handling, programs the sleep registers so the hardware 1154 * will wakeup in time to receive beacons, and configures 1155 * the beacon miss handling so we'll receive a BMISS 1156 * interrupt when we stop seeing beacons from the AP 1157 * we've associated with. 1158 */ 1159 static void 1160 ath_beacon_config(struct ath_softc *sc) 1161 { 1162 struct ath_hal *ah = sc->sc_ah; 1163 struct ieee80211com *ic = &sc->sc_ic; 1164 struct ieee80211_node *ni = ic->ic_bss; 1165 u_int32_t nexttbtt; 1166 1167 nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) | 1168 (LE_READ_4(ni->ni_tstamp) >> 10); 1169 DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt)); 1170 nexttbtt += ni->ni_intval; 1171 if (ic->ic_opmode == IEEE80211_M_STA) { 1172 HAL_BEACON_STATE bs; 1173 u_int32_t bmisstime; 1174 1175 /* NB: no PCF support right now */ 1176 memset(&bs, 0, sizeof(bs)); 1177 bs.bs_intval = ni->ni_intval; 1178 bs.bs_nexttbtt = nexttbtt; 1179 bs.bs_dtimperiod = bs.bs_intval; 1180 bs.bs_nextdtim = nexttbtt; 1181 /* 1182 * Calculate the number of consecutive beacons to miss 1183 * before taking a BMISS interrupt. The configuration 1184 * is specified in ms, so we need to convert that to 1185 * TU's and then calculate based on the beacon interval. 1186 * Note that we clamp the result to at most 10 beacons. 1187 */ 1188 bmisstime = (ic->ic_bmisstimeout * 1000) / 1024; 1189 bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval); 1190 if (bs.bs_bmissthreshold > 10) 1191 bs.bs_bmissthreshold = 10; 1192 else if (bs.bs_bmissthreshold <= 0) 1193 bs.bs_bmissthreshold = 1; 1194 1195 /* 1196 * Calculate sleep duration. The configuration is 1197 * given in ms. We insure a multiple of the beacon 1198 * period is used. Also, if the sleep duration is 1199 * greater than the DTIM period then it makes senses 1200 * to make it a multiple of that. 1201 * 1202 * XXX fixed at 100ms 1203 */ 1204 bs.bs_sleepduration = 1205 roundup((100 * 1000) / 1024, bs.bs_intval); 1206 if (bs.bs_sleepduration > bs.bs_dtimperiod) 1207 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod); 1208 1209 DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n" 1210 , __func__ 1211 , bs.bs_intval 1212 , bs.bs_nexttbtt 1213 , bs.bs_dtimperiod 1214 , bs.bs_nextdtim 1215 , bs.bs_bmissthreshold 1216 , bs.bs_sleepduration 1217 )); 1218 ath_hal_intrset(ah, 0); 1219 /* 1220 * Reset our tsf so the hardware will update the 1221 * tsf register to reflect timestamps found in 1222 * received beacons. 1223 */ 1224 ath_hal_resettsf(ah); 1225 ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0); 1226 sc->sc_imask |= HAL_INT_BMISS; 1227 ath_hal_intrset(ah, sc->sc_imask); 1228 } else { 1229 DPRINTF(("%s: intval %u nexttbtt %u\n", 1230 __func__, ni->ni_intval, nexttbtt)); 1231 ath_hal_intrset(ah, 0); 1232 ath_hal_beaconinit(ah, ic->ic_opmode, 1233 nexttbtt, ni->ni_intval); 1234 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1235 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */ 1236 ath_hal_intrset(ah, sc->sc_imask); 1237 } 1238 } 1239 1240 static void 1241 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 1242 { 1243 bus_addr_t *paddr = (bus_addr_t*) arg; 1244 *paddr = segs->ds_addr; 1245 } 1246 1247 static int 1248 ath_desc_alloc(struct ath_softc *sc) 1249 { 1250 int i, bsize, error; 1251 struct ath_desc *ds; 1252 struct ath_buf *bf; 1253 1254 /* allocate descriptors */ 1255 sc->sc_desc_len = sizeof(struct ath_desc) * 1256 (ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1); 1257 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1258 if (error != 0) 1259 return error; 1260 1261 error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc, 1262 BUS_DMA_NOWAIT, &sc->sc_ddmamap); 1263 if (error != 0) 1264 goto fail0; 1265 1266 error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, 1267 sc->sc_desc, sc->sc_desc_len, 1268 ath_load_cb, &sc->sc_desc_paddr, 1269 BUS_DMA_NOWAIT); 1270 if (error != 0) 1271 goto fail1; 1272 1273 ds = sc->sc_desc; 1274 DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n", 1275 ds, sc->sc_desc_len, 1276 (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len)); 1277 1278 /* allocate buffers */ 1279 bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1); 1280 bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO); 1281 if (bf == NULL) 1282 goto fail2; 1283 sc->sc_bufptr = bf; 1284 1285 TAILQ_INIT(&sc->sc_rxbuf); 1286 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) { 1287 bf->bf_desc = ds; 1288 bf->bf_daddr = sc->sc_desc_paddr + 1289 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1290 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1291 &bf->bf_dmamap); 1292 if (error != 0) 1293 break; 1294 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1295 } 1296 1297 TAILQ_INIT(&sc->sc_txbuf); 1298 for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) { 1299 bf->bf_desc = ds; 1300 bf->bf_daddr = sc->sc_desc_paddr + 1301 ((caddr_t)ds - (caddr_t)sc->sc_desc); 1302 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, 1303 &bf->bf_dmamap); 1304 if (error != 0) 1305 break; 1306 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1307 } 1308 TAILQ_INIT(&sc->sc_txq); 1309 1310 /* beacon buffer */ 1311 bf->bf_desc = ds; 1312 bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc); 1313 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap); 1314 if (error != 0) 1315 return error; 1316 sc->sc_bcbuf = bf; 1317 return 0; 1318 1319 fail2: 1320 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1321 fail1: 1322 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1323 fail0: 1324 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1325 sc->sc_ddmamap = NULL; 1326 return error; 1327 } 1328 1329 static void 1330 ath_desc_free(struct ath_softc *sc) 1331 { 1332 struct ath_buf *bf; 1333 1334 bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap); 1335 bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap); 1336 bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap); 1337 1338 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1339 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1340 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1341 m_freem(bf->bf_m); 1342 } 1343 TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list) 1344 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1345 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 1346 if (bf->bf_m) { 1347 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1348 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap); 1349 m_freem(bf->bf_m); 1350 bf->bf_m = NULL; 1351 } 1352 } 1353 if (sc->sc_bcbuf != NULL) { 1354 bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1355 bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap); 1356 sc->sc_bcbuf = NULL; 1357 } 1358 1359 TAILQ_INIT(&sc->sc_rxbuf); 1360 TAILQ_INIT(&sc->sc_txbuf); 1361 TAILQ_INIT(&sc->sc_txq); 1362 free(sc->sc_bufptr, M_DEVBUF); 1363 sc->sc_bufptr = NULL; 1364 } 1365 1366 static struct ieee80211_node * 1367 ath_node_alloc(struct ieee80211com *ic) 1368 { 1369 struct ath_node *an = 1370 malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1371 return an ? &an->an_node : NULL; 1372 } 1373 1374 static void 1375 ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni) 1376 { 1377 struct ath_softc *sc = ic->ic_if.if_softc; 1378 struct ath_buf *bf; 1379 1380 TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) { 1381 if (bf->bf_node == ni) 1382 bf->bf_node = NULL; 1383 } 1384 free(ni, M_DEVBUF); 1385 } 1386 1387 static void 1388 ath_node_copy(struct ieee80211com *ic, 1389 struct ieee80211_node *dst, const struct ieee80211_node *src) 1390 { 1391 *(struct ath_node *)dst = *(const struct ath_node *)src; 1392 } 1393 1394 static int 1395 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 1396 { 1397 struct ath_hal *ah = sc->sc_ah; 1398 int error; 1399 struct mbuf *m; 1400 struct ath_desc *ds; 1401 1402 m = bf->bf_m; 1403 if (m == NULL) { 1404 /* 1405 * NB: by assigning a page to the rx dma buffer we 1406 * implicitly satisfy the Atheros requirement that 1407 * this buffer be cache-line-aligned and sized to be 1408 * multiple of the cache line size. Not doing this 1409 * causes weird stuff to happen (for the 5210 at least). 1410 */ 1411 m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1412 if (m == NULL) { 1413 DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n")); 1414 sc->sc_stats.ast_rx_nombuf++; 1415 return ENOMEM; 1416 } 1417 bf->bf_m = m; 1418 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 1419 1420 error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m, 1421 ath_mbuf_load_cb, bf, 1422 BUS_DMA_NOWAIT); 1423 if (error != 0) { 1424 DPRINTF(("ath_rxbuf_init: bus_dmamap_load_mbuf failed;" 1425 " error %d\n", error)); 1426 sc->sc_stats.ast_rx_busdma++; 1427 return error; 1428 } 1429 KASSERT(bf->bf_nseg == 1, 1430 ("ath_rxbuf_init: multi-segment packet; nseg %u", 1431 bf->bf_nseg)); 1432 } 1433 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREREAD); 1434 1435 /* setup descriptors */ 1436 ds = bf->bf_desc; 1437 ds->ds_link = 0; 1438 ds->ds_data = bf->bf_segs[0].ds_addr; 1439 ath_hal_setuprxdesc(ah, ds 1440 , m->m_len /* buffer size */ 1441 , 0 1442 ); 1443 1444 if (sc->sc_rxlink != NULL) 1445 *sc->sc_rxlink = bf->bf_daddr; 1446 sc->sc_rxlink = &ds->ds_link; 1447 return 0; 1448 } 1449 1450 static void 1451 ath_rx_proc(void *arg, int npending) 1452 { 1453 struct ath_softc *sc = arg; 1454 struct ath_buf *bf; 1455 struct ieee80211com *ic = &sc->sc_ic; 1456 struct ifnet *ifp = &ic->ic_if; 1457 struct ath_hal *ah = sc->sc_ah; 1458 struct ath_desc *ds; 1459 struct mbuf *m; 1460 struct ieee80211_frame *wh, whbuf; 1461 struct ieee80211_node *ni; 1462 int len; 1463 u_int phyerr; 1464 HAL_STATUS status; 1465 1466 DPRINTF2(("ath_rx_proc: pending %u\n", npending)); 1467 do { 1468 bf = TAILQ_FIRST(&sc->sc_rxbuf); 1469 if (bf == NULL) { /* NB: shouldn't happen */ 1470 if_printf(ifp, "ath_rx_proc: no buffer!\n"); 1471 break; 1472 } 1473 m = bf->bf_m; 1474 if (m == NULL) { /* NB: shouldn't happen */ 1475 if_printf(ifp, "ath_rx_proc: no mbuf!\n"); 1476 continue; 1477 } 1478 ds = bf->bf_desc; 1479 status = ath_hal_rxprocdesc(ah, ds); 1480 #ifdef AR_DEBUG 1481 if (ath_debug > 1) 1482 ath_printrxbuf(bf, status == HAL_OK); 1483 #endif 1484 if (status == HAL_EINPROGRESS) 1485 break; 1486 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 1487 if (ds->ds_rxstat.rs_status != 0) { 1488 ifp->if_ierrors++; 1489 if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC) 1490 sc->sc_stats.ast_rx_crcerr++; 1491 if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO) 1492 sc->sc_stats.ast_rx_fifoerr++; 1493 if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT) 1494 sc->sc_stats.ast_rx_badcrypt++; 1495 if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) { 1496 sc->sc_stats.ast_rx_phyerr++; 1497 phyerr = ds->ds_rxstat.rs_phyerr & 0x1f; 1498 sc->sc_stats.ast_rx_phy[phyerr]++; 1499 } 1500 goto rx_next; 1501 } 1502 1503 len = ds->ds_rxstat.rs_datalen; 1504 if (len < sizeof(struct ieee80211_frame)) { 1505 DPRINTF(("ath_rx_proc: short packet %d\n", len)); 1506 sc->sc_stats.ast_rx_tooshort++; 1507 goto rx_next; 1508 } 1509 1510 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 1511 BUS_DMASYNC_POSTREAD); 1512 1513 wh = mtod(m, struct ieee80211_frame *); 1514 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1515 IEEE80211_FC0_TYPE_CTL && 1516 ic->ic_opmode != IEEE80211_M_MONITOR) { 1517 /* 1518 * Discard control frame when not in monitor mode. 1519 */ 1520 DPRINTF(("ath_rx_proc: control frame\n")); 1521 sc->sc_stats.ast_rx_ctl++; 1522 goto rx_next; 1523 } 1524 1525 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1526 bf->bf_m = NULL; 1527 m->m_pkthdr.rcvif = ifp; 1528 m->m_pkthdr.len = m->m_len = len; 1529 if (IFF_DUMPPKTS(ifp)) { 1530 ieee80211_dump_pkt(mtod(m, u_int8_t *), len, 1531 sc->sc_hwmap[ds->ds_rxstat.rs_rate] & 1532 IEEE80211_RATE_VAL, 1533 ds->ds_rxstat.rs_rssi); 1534 } 1535 1536 m_adj(m, -IEEE80211_CRC_LEN); 1537 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1538 /* 1539 * WEP is decrypted by hardware. Clear WEP bit 1540 * and trim WEP header for ieee80211_input(). 1541 */ 1542 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 1543 memcpy(&whbuf, wh, sizeof(whbuf)); 1544 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 1545 memcpy(mtod(m, caddr_t), &whbuf, sizeof(whbuf)); 1546 /* 1547 * Also trim WEP ICV from the tail. 1548 */ 1549 m_adj(m, -IEEE80211_WEP_CRCLEN); 1550 } 1551 1552 /* 1553 * Locate the node for sender, track state, and 1554 * then pass this node (referenced) up to the 802.11 1555 * layer for its use. We are required to pass 1556 * something so we fall back to ic_bss when this frame 1557 * is from an unknown sender. 1558 */ 1559 if (ic->ic_opmode != IEEE80211_M_STA) { 1560 ni = ieee80211_find_node(ic, wh->i_addr2); 1561 if (ni == NULL) 1562 ni = ieee80211_ref_node(ic->ic_bss); 1563 } else 1564 ni = ieee80211_ref_node(ic->ic_bss); 1565 ATH_NODE(ni)->an_rx_antenna = ds->ds_rxstat.rs_antenna; 1566 /* 1567 * Send frame up for processing. 1568 */ 1569 ieee80211_input(ifp, m, ni, 1570 ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp); 1571 /* 1572 * The frame may have caused the node to be marked for 1573 * reclamation (e.g. in response to a DEAUTH message) 1574 * so use free_node here instead of unref_node. 1575 */ 1576 if (ni == ic->ic_bss) 1577 ieee80211_unref_node(&ni); 1578 else 1579 ieee80211_free_node(ic, ni); 1580 rx_next: 1581 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 1582 } while (ath_rxbuf_init(sc, bf) == 0); 1583 1584 ath_hal_rxmonitor(ah); /* rx signal state monitoring */ 1585 ath_hal_rxena(ah); /* in case of RXEOL */ 1586 } 1587 1588 /* 1589 * XXX Size of an ACK control frame in bytes. 1590 */ 1591 #define IEEE80211_ACK_SIZE (2+2+IEEE80211_ADDR_LEN+4) 1592 1593 static int 1594 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf, 1595 struct mbuf *m0) 1596 { 1597 struct ieee80211com *ic = &sc->sc_ic; 1598 struct ath_hal *ah = sc->sc_ah; 1599 struct ifnet *ifp = &sc->sc_ic.ic_if; 1600 int i, error, iswep, hdrlen, pktlen; 1601 u_int8_t rix, cix, txrate, ctsrate; 1602 struct ath_desc *ds; 1603 struct mbuf *m; 1604 struct ieee80211_frame *wh; 1605 u_int32_t iv; 1606 u_int8_t *ivp; 1607 u_int8_t hdrbuf[sizeof(struct ieee80211_frame) + 1608 IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN]; 1609 u_int subtype, flags, ctsduration, antenna; 1610 HAL_PKT_TYPE atype; 1611 const HAL_RATE_TABLE *rt; 1612 HAL_BOOL shortPreamble; 1613 struct ath_node *an; 1614 1615 wh = mtod(m0, struct ieee80211_frame *); 1616 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP; 1617 hdrlen = sizeof(struct ieee80211_frame); 1618 pktlen = m0->m_pkthdr.len; 1619 1620 if (iswep) { 1621 memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen); 1622 m_adj(m0, hdrlen); 1623 M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT); 1624 if (m0 == NULL) { 1625 sc->sc_stats.ast_tx_nombuf++; 1626 return ENOMEM; 1627 } 1628 ivp = hdrbuf + hdrlen; 1629 /* 1630 * XXX 1631 * IV must not duplicate during the lifetime of the key. 1632 * But no mechanism to renew keys is defined in IEEE 802.11 1633 * WEP. And IV may be duplicated between other stations 1634 * because of the session key itself is shared. 1635 * So we use pseudo random IV for now, though it is not the 1636 * right way. 1637 */ 1638 iv = arc4random(); 1639 for (i = 0; i < IEEE80211_WEP_IVLEN; i++) { 1640 ivp[i] = iv; 1641 iv >>= 8; 1642 } 1643 ivp[i] = sc->sc_ic.ic_wep_txkey << 6; /* Key ID and pad */ 1644 memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf)); 1645 /* 1646 * The ICV length must be included into hdrlen and pktlen. 1647 */ 1648 hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN; 1649 pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN; 1650 } 1651 pktlen += IEEE80211_CRC_LEN; 1652 1653 /* 1654 * Load the DMA map so any coalescing is done. This 1655 * also calculates the number of descriptors we need. 1656 */ 1657 error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m0, 1658 ath_mbuf_load_cb, bf, 1659 BUS_DMA_NOWAIT); 1660 if (error != 0) { 1661 sc->sc_stats.ast_tx_busdma++; 1662 m_freem(m0); 1663 return error; 1664 } 1665 /* 1666 * Discard null packets and check for packets that 1667 * require too many TX descriptors. We try to convert 1668 * the latter to a cluster. 1669 */ 1670 if (bf->bf_nseg > ATH_TXDESC) { /* too many desc's, linearize */ 1671 sc->sc_stats.ast_tx_linear++; 1672 MGETHDR(m, M_DONTWAIT, MT_DATA); 1673 if (m == NULL) { 1674 sc->sc_stats.ast_tx_nombuf++; 1675 m_freem(m0); 1676 return ENOMEM; 1677 } 1678 M_MOVE_PKTHDR(m, m0); 1679 MCLGET(m, M_DONTWAIT); 1680 if ((m->m_flags & M_EXT) == 0) { 1681 sc->sc_stats.ast_tx_nomcl++; 1682 m_freem(m0); 1683 m_free(m); 1684 return ENOMEM; 1685 } 1686 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t)); 1687 m_freem(m0); 1688 m->m_len = m->m_pkthdr.len; 1689 m0 = m; 1690 error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m0, 1691 ath_mbuf_load_cb, bf, 1692 BUS_DMA_NOWAIT); 1693 if (error != 0) { 1694 sc->sc_stats.ast_tx_busdma++; 1695 m_freem(m0); 1696 return error; 1697 } 1698 KASSERT(bf->bf_nseg == 1, 1699 ("ath_tx_start: packet not one segment; nseg %u", 1700 bf->bf_nseg)); 1701 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 1702 sc->sc_stats.ast_tx_nodata++; 1703 m_freem(m0); 1704 return EIO; 1705 } 1706 DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen)); 1707 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1708 bf->bf_m = m0; 1709 bf->bf_node = ni; /* NB: held reference */ 1710 1711 /* setup descriptors */ 1712 ds = bf->bf_desc; 1713 rt = sc->sc_currates; 1714 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1715 1716 /* 1717 * Calculate Atheros packet type from IEEE80211 packet header 1718 * and setup for rate calculations. 1719 */ 1720 atype = HAL_PKT_TYPE_NORMAL; /* default */ 1721 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1722 case IEEE80211_FC0_TYPE_MGT: 1723 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1724 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 1725 atype = HAL_PKT_TYPE_BEACON; 1726 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1727 atype = HAL_PKT_TYPE_PROBE_RESP; 1728 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 1729 atype = HAL_PKT_TYPE_ATIM; 1730 rix = 0; /* XXX lowest rate */ 1731 break; 1732 case IEEE80211_FC0_TYPE_CTL: 1733 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1734 if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL) 1735 atype = HAL_PKT_TYPE_PSPOLL; 1736 rix = 0; /* XXX lowest rate */ 1737 break; 1738 default: 1739 rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] & 1740 IEEE80211_RATE_VAL]; 1741 if (rix == 0xff) { 1742 if_printf(ifp, "bogus xmit rate 0x%x\n", 1743 ni->ni_rates.rs_rates[ni->ni_txrate]); 1744 sc->sc_stats.ast_tx_badrate++; 1745 m_freem(m0); 1746 return EIO; 1747 } 1748 break; 1749 } 1750 /* 1751 * NB: the 802.11 layer marks whether or not we should 1752 * use short preamble based on the current mode and 1753 * negotiated parameters. 1754 */ 1755 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) { 1756 txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble; 1757 shortPreamble = AH_TRUE; 1758 sc->sc_stats.ast_tx_shortpre++; 1759 } else { 1760 txrate = rt->info[rix].rateCode; 1761 shortPreamble = AH_FALSE; 1762 } 1763 1764 /* 1765 * Calculate miscellaneous flags. 1766 */ 1767 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for wep errors */ 1768 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1769 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 1770 sc->sc_stats.ast_tx_noack++; 1771 } else if (pktlen > ic->ic_rtsthreshold) { 1772 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 1773 sc->sc_stats.ast_tx_rts++; 1774 } 1775 1776 /* 1777 * Calculate RTS/CTS rate and duration if needed. 1778 */ 1779 ctsduration = 0; 1780 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) { 1781 /* 1782 * CTS transmit rate is derived from the transmit rate 1783 * by looking in the h/w rate table. We must also factor 1784 * in whether or not a short preamble is to be used. 1785 */ 1786 cix = rt->info[rix].controlRate; 1787 ctsrate = rt->info[cix].rateCode; 1788 if (shortPreamble) 1789 ctsrate |= rt->info[cix].shortPreamble; 1790 /* 1791 * Compute the transmit duration based on the size 1792 * of an ACK frame. We call into the HAL to do the 1793 * computation since it depends on the characteristics 1794 * of the actual PHY being used. 1795 */ 1796 if (flags & HAL_TXDESC_RTSENA) { /* SIFS + CTS */ 1797 ctsduration += ath_hal_computetxtime(ah, 1798 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 1799 } 1800 /* SIFS + data */ 1801 ctsduration += ath_hal_computetxtime(ah, 1802 rt, pktlen, rix, shortPreamble); 1803 if ((flags & HAL_TXDESC_NOACK) == 0) { /* SIFS + ACK */ 1804 ctsduration += ath_hal_computetxtime(ah, 1805 rt, IEEE80211_ACK_SIZE, cix, shortPreamble); 1806 } 1807 } else 1808 ctsrate = 0; 1809 1810 /* 1811 * For now use the antenna on which the last good 1812 * frame was received on. We assume this field is 1813 * initialized to 0 which gives us ``auto'' or the 1814 * ``default'' antenna. 1815 */ 1816 an = (struct ath_node *) ni; 1817 if (an->an_tx_antenna) 1818 antenna = an->an_tx_antenna; 1819 else 1820 antenna = an->an_rx_antenna; 1821 1822 /* 1823 * Formulate first tx descriptor with tx controls. 1824 */ 1825 /* XXX check return value? */ 1826 ath_hal_setuptxdesc(ah, ds 1827 , pktlen /* packet length */ 1828 , hdrlen /* header length */ 1829 , atype /* Atheros packet type */ 1830 , 60 /* txpower XXX */ 1831 , txrate, 1+10 /* series 0 rate/tries */ 1832 , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID 1833 , antenna /* antenna mode */ 1834 , flags /* flags */ 1835 , ctsrate /* rts/cts rate */ 1836 , ctsduration /* rts/cts duration */ 1837 ); 1838 #ifdef notyet 1839 ath_hal_setupxtxdesc(ah, ds 1840 , AH_FALSE /* short preamble */ 1841 , 0, 0 /* series 1 rate/tries */ 1842 , 0, 0 /* series 2 rate/tries */ 1843 , 0, 0 /* series 3 rate/tries */ 1844 ); 1845 #endif 1846 /* 1847 * Fillin the remainder of the descriptor info. 1848 */ 1849 for (i = 0; i < bf->bf_nseg; i++, ds++) { 1850 ds->ds_data = bf->bf_segs[i].ds_addr; 1851 if (i == bf->bf_nseg - 1) 1852 ds->ds_link = 0; 1853 else 1854 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1); 1855 ath_hal_filltxdesc(ah, ds 1856 , bf->bf_segs[i].ds_len /* segment length */ 1857 , i == 0 /* first segment */ 1858 , i == bf->bf_nseg - 1 /* last segment */ 1859 ); 1860 DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n", 1861 i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1, 1862 ds->ds_hw[0], ds->ds_hw[1])); 1863 } 1864 1865 /* 1866 * Insert the frame on the outbound list and 1867 * pass it on to the hardware. 1868 */ 1869 mtx_lock(&sc->sc_txqlock); 1870 TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list); 1871 if (sc->sc_txlink == NULL) { 1872 ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr); 1873 DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n", 1874 (caddr_t)bf->bf_daddr, bf->bf_desc)); 1875 } else { 1876 *sc->sc_txlink = bf->bf_daddr; 1877 DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n", 1878 sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc)); 1879 } 1880 sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link; 1881 mtx_unlock(&sc->sc_txqlock); 1882 1883 ath_hal_txstart(ah, sc->sc_txhalq); 1884 return 0; 1885 } 1886 1887 static void 1888 ath_tx_proc(void *arg, int npending) 1889 { 1890 struct ath_softc *sc = arg; 1891 struct ath_hal *ah = sc->sc_ah; 1892 struct ath_buf *bf; 1893 struct ieee80211com *ic = &sc->sc_ic; 1894 struct ifnet *ifp = &ic->ic_if; 1895 struct ath_desc *ds; 1896 struct ieee80211_node *ni; 1897 struct ath_node *an; 1898 int sr, lr; 1899 HAL_STATUS status; 1900 1901 DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n", 1902 npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq), 1903 sc->sc_txlink)); 1904 for (;;) { 1905 mtx_lock(&sc->sc_txqlock); 1906 bf = TAILQ_FIRST(&sc->sc_txq); 1907 if (bf == NULL) { 1908 sc->sc_txlink = NULL; 1909 mtx_unlock(&sc->sc_txqlock); 1910 break; 1911 } 1912 /* only the last descriptor is needed */ 1913 ds = &bf->bf_desc[bf->bf_nseg - 1]; 1914 status = ath_hal_txprocdesc(ah, ds); 1915 #ifdef AR_DEBUG 1916 if (ath_debug > 1) 1917 ath_printtxbuf(bf, status == HAL_OK); 1918 #endif 1919 if (status == HAL_EINPROGRESS) { 1920 mtx_unlock(&sc->sc_txqlock); 1921 break; 1922 } 1923 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 1924 mtx_unlock(&sc->sc_txqlock); 1925 1926 ni = bf->bf_node; 1927 if (ni != NULL) { 1928 an = (struct ath_node *) ni; 1929 if (ds->ds_txstat.ts_status == 0) { 1930 an->an_tx_ok++; 1931 an->an_tx_antenna = ds->ds_txstat.ts_antenna; 1932 } else { 1933 an->an_tx_err++; 1934 ifp->if_oerrors++; 1935 if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY) 1936 sc->sc_stats.ast_tx_xretries++; 1937 if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO) 1938 sc->sc_stats.ast_tx_fifoerr++; 1939 if (ds->ds_txstat.ts_status & HAL_TXERR_FILT) 1940 sc->sc_stats.ast_tx_filtered++; 1941 an->an_tx_antenna = 0; /* invalidate */ 1942 } 1943 sr = ds->ds_txstat.ts_shortretry; 1944 lr = ds->ds_txstat.ts_longretry; 1945 sc->sc_stats.ast_tx_shortretry += sr; 1946 sc->sc_stats.ast_tx_longretry += lr; 1947 if (sr + lr) 1948 an->an_tx_retr++; 1949 /* 1950 * Reclaim reference to node. 1951 * 1952 * NB: the node may be reclaimed here if, for example 1953 * this is a DEAUTH message that was sent and the 1954 * node was timed out due to inactivity. 1955 */ 1956 if (ni != ic->ic_bss) 1957 ieee80211_free_node(ic, ni); 1958 } 1959 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 1960 BUS_DMASYNC_POSTWRITE); 1961 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 1962 m_freem(bf->bf_m); 1963 bf->bf_m = NULL; 1964 bf->bf_node = NULL; 1965 1966 mtx_lock(&sc->sc_txbuflock); 1967 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 1968 mtx_unlock(&sc->sc_txbuflock); 1969 } 1970 ifp->if_flags &= ~IFF_OACTIVE; 1971 sc->sc_tx_timer = 0; 1972 1973 ath_start(ifp); 1974 } 1975 1976 /* 1977 * Drain the transmit queue and reclaim resources. 1978 */ 1979 static void 1980 ath_draintxq(struct ath_softc *sc) 1981 { 1982 struct ath_hal *ah = sc->sc_ah; 1983 struct ifnet *ifp = &sc->sc_ic.ic_if; 1984 struct ath_buf *bf; 1985 1986 /* XXX return value */ 1987 if (!sc->sc_invalid) { 1988 /* don't touch the hardware if marked invalid */ 1989 (void) ath_hal_stoptxdma(ah, sc->sc_txhalq); 1990 DPRINTF(("ath_draintxq: tx queue %p, link %p\n", 1991 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq), 1992 sc->sc_txlink)); 1993 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq); 1994 DPRINTF(("ath_draintxq: beacon queue %p\n", 1995 (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq))); 1996 } 1997 for (;;) { 1998 mtx_lock(&sc->sc_txqlock); 1999 bf = TAILQ_FIRST(&sc->sc_txq); 2000 if (bf == NULL) { 2001 sc->sc_txlink = NULL; 2002 mtx_unlock(&sc->sc_txqlock); 2003 break; 2004 } 2005 TAILQ_REMOVE(&sc->sc_txq, bf, bf_list); 2006 mtx_unlock(&sc->sc_txqlock); 2007 #ifdef AR_DEBUG 2008 if (ath_debug) 2009 ath_printtxbuf(bf, 2010 ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK); 2011 #endif /* AR_DEBUG */ 2012 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 2013 m_freem(bf->bf_m); 2014 bf->bf_m = NULL; 2015 bf->bf_node = NULL; 2016 mtx_lock(&sc->sc_txbuflock); 2017 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list); 2018 mtx_unlock(&sc->sc_txbuflock); 2019 } 2020 ifp->if_flags &= ~IFF_OACTIVE; 2021 sc->sc_tx_timer = 0; 2022 } 2023 2024 /* 2025 * Disable the receive h/w in preparation for a reset. 2026 */ 2027 static void 2028 ath_stoprecv(struct ath_softc *sc) 2029 { 2030 struct ath_hal *ah = sc->sc_ah; 2031 2032 ath_hal_stoppcurecv(ah); /* disable PCU */ 2033 ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 2034 ath_hal_stopdmarecv(ah); /* disable DMA engine */ 2035 DELAY(3000); /* long enough for 1 frame */ 2036 #ifdef AR_DEBUG 2037 if (ath_debug) { 2038 struct ath_buf *bf; 2039 2040 DPRINTF(("ath_stoprecv: rx queue %p, link %p\n", 2041 (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink)); 2042 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2043 if (ath_hal_rxprocdesc(ah, bf->bf_desc) == HAL_OK) 2044 ath_printrxbuf(bf, 1); 2045 } 2046 } 2047 #endif 2048 sc->sc_rxlink = NULL; /* just in case */ 2049 } 2050 2051 /* 2052 * Enable the receive h/w following a reset. 2053 */ 2054 static int 2055 ath_startrecv(struct ath_softc *sc) 2056 { 2057 struct ath_hal *ah = sc->sc_ah; 2058 struct ath_buf *bf; 2059 2060 sc->sc_rxlink = NULL; 2061 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 2062 int error = ath_rxbuf_init(sc, bf); 2063 if (error != 0) { 2064 DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n", 2065 error)); 2066 return error; 2067 } 2068 } 2069 2070 bf = TAILQ_FIRST(&sc->sc_rxbuf); 2071 ath_hal_putrxbuf(ah, bf->bf_daddr); 2072 ath_hal_rxena(ah); /* enable recv descriptors */ 2073 ath_mode_init(sc); /* set filters, etc. */ 2074 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 2075 return 0; 2076 } 2077 2078 /* 2079 * Set/change channels. If the channel is really being changed, 2080 * it's done by resetting the chip. To accomplish this we must 2081 * first cleanup any pending DMA, then restart stuff after a la 2082 * ath_init. 2083 */ 2084 static int 2085 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) 2086 { 2087 struct ath_hal *ah = sc->sc_ah; 2088 struct ieee80211com *ic = &sc->sc_ic; 2089 2090 DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n", 2091 ieee80211_chan2ieee(ic, ic->ic_ibss_chan), 2092 ic->ic_ibss_chan->ic_freq, 2093 ieee80211_chan2ieee(ic, chan), chan->ic_freq)); 2094 if (chan != ic->ic_ibss_chan) { 2095 HAL_STATUS status; 2096 HAL_CHANNEL hchan; 2097 enum ieee80211_phymode mode; 2098 2099 /* 2100 * To switch channels clear any pending DMA operations; 2101 * wait long enough for the RX fifo to drain, reset the 2102 * hardware at the new frequency, and then re-enable 2103 * the relevant bits of the h/w. 2104 */ 2105 ath_hal_intrset(ah, 0); /* disable interrupts */ 2106 ath_draintxq(sc); /* clear pending tx frames */ 2107 ath_stoprecv(sc); /* turn off frame recv */ 2108 /* 2109 * Convert to a HAL channel description with 2110 * the flags constrained to reflect the current 2111 * operating mode. 2112 */ 2113 hchan.channel = chan->ic_freq; 2114 hchan.channelFlags = ath_chan2flags(ic, chan); 2115 if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) { 2116 if_printf(&ic->ic_if, "ath_chan_set: unable to reset " 2117 "channel %u (%u Mhz)\n", 2118 ieee80211_chan2ieee(ic, chan), chan->ic_freq); 2119 return EIO; 2120 } 2121 /* 2122 * Re-enable rx framework. 2123 */ 2124 if (ath_startrecv(sc) != 0) { 2125 if_printf(&ic->ic_if, 2126 "ath_chan_set: unable to restart recv logic\n"); 2127 return EIO; 2128 } 2129 2130 /* 2131 * Change channels and update the h/w rate map 2132 * if we're switching; e.g. 11a to 11b/g. 2133 */ 2134 ic->ic_ibss_chan = chan; 2135 mode = ieee80211_chan2mode(ic, chan); 2136 if (mode != sc->sc_curmode) 2137 ath_setcurmode(sc, mode); 2138 2139 /* 2140 * Re-enable interrupts. 2141 */ 2142 ath_hal_intrset(ah, sc->sc_imask); 2143 } 2144 return 0; 2145 } 2146 2147 static void 2148 ath_next_scan(void *arg) 2149 { 2150 struct ath_softc *sc = arg; 2151 struct ieee80211com *ic = &sc->sc_ic; 2152 struct ifnet *ifp = &ic->ic_if; 2153 2154 if (ic->ic_state == IEEE80211_S_SCAN) 2155 ieee80211_next_scan(ifp); 2156 } 2157 2158 /* 2159 * Periodically recalibrate the PHY to account 2160 * for temperature/environment changes. 2161 */ 2162 static void 2163 ath_calibrate(void *arg) 2164 { 2165 struct ath_softc *sc = arg; 2166 struct ath_hal *ah = sc->sc_ah; 2167 struct ieee80211com *ic = &sc->sc_ic; 2168 struct ieee80211_channel *c; 2169 HAL_CHANNEL hchan; 2170 2171 sc->sc_stats.ast_per_cal++; 2172 2173 /* 2174 * Convert to a HAL channel description with the flags 2175 * constrained to reflect the current operating mode. 2176 */ 2177 c = ic->ic_ibss_chan; 2178 hchan.channel = c->ic_freq; 2179 hchan.channelFlags = ath_chan2flags(ic, c); 2180 2181 DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags)); 2182 2183 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) { 2184 /* 2185 * Rfgain is out of bounds, reset the chip 2186 * to load new gain values. 2187 */ 2188 sc->sc_stats.ast_per_rfgain++; 2189 ath_reset(sc); 2190 } 2191 if (!ath_hal_calibrate(ah, &hchan)) { 2192 DPRINTF(("%s: calibration of channel %u failed\n", 2193 __func__, c->ic_freq)); 2194 sc->sc_stats.ast_per_calfail++; 2195 } 2196 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc); 2197 } 2198 2199 static int 2200 ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 2201 { 2202 struct ifnet *ifp = &ic->ic_if; 2203 struct ath_softc *sc = ifp->if_softc; 2204 struct ath_hal *ah = sc->sc_ah; 2205 struct ieee80211_node *ni; 2206 int i, error; 2207 u_int8_t *bssid; 2208 u_int32_t rfilt; 2209 static const HAL_LED_STATE leds[] = { 2210 HAL_LED_INIT, /* IEEE80211_S_INIT */ 2211 HAL_LED_SCAN, /* IEEE80211_S_SCAN */ 2212 HAL_LED_AUTH, /* IEEE80211_S_AUTH */ 2213 HAL_LED_ASSOC, /* IEEE80211_S_ASSOC */ 2214 HAL_LED_RUN, /* IEEE80211_S_RUN */ 2215 }; 2216 2217 DPRINTF(("%s: %s -> %s\n", __func__, 2218 ieee80211_state_name[ic->ic_state], 2219 ieee80211_state_name[nstate])); 2220 2221 ath_hal_setledstate(ah, leds[nstate]); /* set LED */ 2222 2223 if (nstate == IEEE80211_S_INIT) { 2224 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2225 ath_hal_intrset(ah, sc->sc_imask); 2226 callout_stop(&sc->sc_scan_ch); 2227 callout_stop(&sc->sc_cal_ch); 2228 return (*sc->sc_newstate)(ic, nstate, arg); 2229 } 2230 ni = ic->ic_bss; 2231 error = ath_chan_set(sc, ni->ni_chan); 2232 if (error != 0) 2233 goto bad; 2234 rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR) 2235 | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 2236 if (ic->ic_opmode != IEEE80211_M_STA) 2237 rfilt |= HAL_RX_FILTER_PROBEREQ; 2238 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2239 (ifp->if_flags & IFF_PROMISC)) 2240 rfilt |= HAL_RX_FILTER_PROM; 2241 if (nstate == IEEE80211_S_SCAN) { 2242 callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000, 2243 ath_next_scan, sc); 2244 bssid = ifp->if_broadcastaddr; 2245 rfilt |= HAL_RX_FILTER_BEACON; 2246 } else { 2247 callout_stop(&sc->sc_scan_ch); 2248 bssid = ni->ni_bssid; 2249 } 2250 ath_hal_setrxfilter(ah, rfilt); 2251 DPRINTF(("%s: RX filter 0x%x bssid %s\n", 2252 __func__, rfilt, ether_sprintf(bssid))); 2253 2254 if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA) 2255 ath_hal_setassocid(ah, bssid, ni->ni_associd); 2256 else 2257 ath_hal_setassocid(ah, bssid, 0); 2258 if (ic->ic_flags & IEEE80211_F_WEPON) { 2259 for (i = 0; i < IEEE80211_WEP_NKID; i++) 2260 if (ath_hal_keyisvalid(ah, i)) 2261 ath_hal_keysetmac(ah, i, bssid); 2262 } 2263 2264 if (nstate == IEEE80211_S_RUN) { 2265 DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s " 2266 "capinfo=0x%04x chan=%d\n" 2267 , __func__ 2268 , ic->ic_flags 2269 , ni->ni_intval 2270 , ether_sprintf(ni->ni_bssid) 2271 , ni->ni_capinfo 2272 , ieee80211_chan2ieee(ic, ni->ni_chan))); 2273 2274 /* 2275 * Allocate and setup the beacon frame for AP or adhoc mode. 2276 */ 2277 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 2278 ic->ic_opmode == IEEE80211_M_IBSS) { 2279 error = ath_beacon_alloc(sc, ni); 2280 if (error != 0) 2281 goto bad; 2282 } 2283 2284 /* 2285 * Configure the beacon and sleep timers. 2286 */ 2287 ath_beacon_config(sc); 2288 2289 /* start periodic recalibration timer */ 2290 callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, 2291 ath_calibrate, sc); 2292 } else { 2293 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS); 2294 ath_hal_intrset(ah, sc->sc_imask); 2295 callout_stop(&sc->sc_cal_ch); /* no calibration */ 2296 } 2297 /* 2298 * Reset the rate control state. 2299 */ 2300 ath_rate_ctl_reset(sc, nstate); 2301 /* 2302 * Invoke the parent method to complete the work. 2303 */ 2304 return (*sc->sc_newstate)(ic, nstate, arg); 2305 bad: 2306 callout_stop(&sc->sc_scan_ch); 2307 callout_stop(&sc->sc_cal_ch); 2308 /* NB: do not invoke the parent */ 2309 return error; 2310 } 2311 2312 /* 2313 * Setup driver-specific state for a newly associated node. 2314 * Note that we're called also on a re-associate, the isnew 2315 * param tells us if this is the first time or not. 2316 */ 2317 static void 2318 ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 2319 { 2320 if (isnew) { 2321 struct ath_node *an = (struct ath_node *) ni; 2322 2323 an->an_tx_ok = an->an_tx_err = 2324 an->an_tx_retr = an->an_tx_upper = 0; 2325 /* start with highest negotiated rate */ 2326 /* 2327 * XXX should do otherwise but only when 2328 * the rate control algorithm is better. 2329 */ 2330 KASSERT(ni->ni_rates.rs_nrates > 0, 2331 ("new association w/ no rates!")); 2332 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 2333 } 2334 } 2335 2336 static int 2337 ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor) 2338 { 2339 struct ieee80211com *ic = &sc->sc_ic; 2340 struct ifnet *ifp = &ic->ic_if; 2341 struct ath_hal *ah = sc->sc_ah; 2342 HAL_CHANNEL *chans; 2343 int i, ix, nchan; 2344 2345 sc->sc_have11g = 0; 2346 chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL), 2347 M_TEMP, M_NOWAIT); 2348 if (chans == NULL) { 2349 if_printf(ifp, "unable to allocate channel table\n"); 2350 return ENOMEM; 2351 } 2352 if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan, 2353 cc, HAL_MODE_ALL, outdoor)) { 2354 if_printf(ifp, "unable to collect channel list from hal\n"); 2355 free(chans, M_TEMP); 2356 return EINVAL; 2357 } 2358 2359 /* 2360 * Convert HAL channels to ieee80211 ones and insert 2361 * them in the table according to their channel number. 2362 */ 2363 for (i = 0; i < nchan; i++) { 2364 HAL_CHANNEL *c = &chans[i]; 2365 ix = ath_hal_mhz2ieee(c->channel, c->channelFlags); 2366 if (ix > IEEE80211_CHAN_MAX) { 2367 if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n", 2368 ix, c->channel, c->channelFlags); 2369 continue; 2370 } 2371 /* NB: flags are known to be compatible */ 2372 if (ic->ic_channels[ix].ic_freq == 0) { 2373 ic->ic_channels[ix].ic_freq = c->channel; 2374 ic->ic_channels[ix].ic_flags = c->channelFlags; 2375 } else { 2376 /* channels overlap; e.g. 11g and 11b */ 2377 ic->ic_channels[ix].ic_flags |= c->channelFlags; 2378 } 2379 if ((c->channelFlags & CHANNEL_G) == CHANNEL_G) 2380 sc->sc_have11g = 1; 2381 } 2382 free(chans, M_TEMP); 2383 return 0; 2384 } 2385 2386 static int 2387 ath_rate_setup(struct ath_softc *sc, u_int mode) 2388 { 2389 struct ath_hal *ah = sc->sc_ah; 2390 struct ieee80211com *ic = &sc->sc_ic; 2391 const HAL_RATE_TABLE *rt; 2392 struct ieee80211_rateset *rs; 2393 int i, maxrates; 2394 2395 switch (mode) { 2396 case IEEE80211_MODE_11A: 2397 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A); 2398 break; 2399 case IEEE80211_MODE_11B: 2400 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B); 2401 break; 2402 case IEEE80211_MODE_11G: 2403 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G); 2404 break; 2405 case IEEE80211_MODE_TURBO: 2406 sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO); 2407 break; 2408 default: 2409 DPRINTF(("%s: invalid mode %u\n", __func__, mode)); 2410 return 0; 2411 } 2412 rt = sc->sc_rates[mode]; 2413 if (rt == NULL) 2414 return 0; 2415 if (rt->rateCount > IEEE80211_RATE_MAXSIZE) { 2416 DPRINTF(("%s: rate table too small (%u > %u)\n", 2417 __func__, rt->rateCount, IEEE80211_RATE_MAXSIZE)); 2418 maxrates = IEEE80211_RATE_MAXSIZE; 2419 } else 2420 maxrates = rt->rateCount; 2421 rs = &ic->ic_sup_rates[mode]; 2422 for (i = 0; i < maxrates; i++) 2423 rs->rs_rates[i] = rt->info[i].dot11Rate; 2424 rs->rs_nrates = maxrates; 2425 return 1; 2426 } 2427 2428 static void 2429 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode) 2430 { 2431 const HAL_RATE_TABLE *rt; 2432 int i; 2433 2434 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap)); 2435 rt = sc->sc_rates[mode]; 2436 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode)); 2437 for (i = 0; i < rt->rateCount; i++) 2438 sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i; 2439 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap)); 2440 for (i = 0; i < 32; i++) 2441 sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate; 2442 sc->sc_currates = rt; 2443 sc->sc_curmode = mode; 2444 } 2445 2446 /* 2447 * Reset the rate control state for each 802.11 state transition. 2448 */ 2449 static void 2450 ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state) 2451 { 2452 struct ieee80211com *ic = &sc->sc_ic; 2453 struct ieee80211_node *ni; 2454 struct ath_node *an; 2455 2456 an = (struct ath_node *) ic->ic_bss; 2457 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0; 2458 if (ic->ic_opmode == IEEE80211_M_STA) { 2459 ni = ic->ic_bss; 2460 if (state == IEEE80211_S_RUN) { 2461 /* start with highest negotiated rate */ 2462 KASSERT(ni->ni_rates.rs_nrates > 0, 2463 ("transition to RUN state w/ no rates!")); 2464 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 2465 } else { 2466 /* use lowest rate */ 2467 ni->ni_txrate = 0; 2468 } 2469 } else { 2470 TAILQ_FOREACH(ni, &ic->ic_node, ni_list) { 2471 ni->ni_txrate = 0; /* use lowest rate */ 2472 an = (struct ath_node *) ni; 2473 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 2474 an->an_tx_upper = 0; 2475 } 2476 } 2477 } 2478 2479 /* 2480 * Examine and potentially adjust the transmit rate. 2481 */ 2482 static void 2483 ath_rate_ctl(void *arg, struct ieee80211_node *ni) 2484 { 2485 struct ath_softc *sc = arg; 2486 struct ath_node *an = (struct ath_node *) ni; 2487 struct ieee80211_rateset *rs = &ni->ni_rates; 2488 int mod = 0, orate, enough; 2489 2490 /* 2491 * Rate control 2492 * XXX: very primitive version. 2493 */ 2494 sc->sc_stats.ast_rate_calls++; 2495 2496 enough = (an->an_tx_ok + an->an_tx_err >= 10); 2497 2498 /* no packet reached -> down */ 2499 if (an->an_tx_err > 0 && an->an_tx_ok == 0) 2500 mod = -1; 2501 2502 /* all packets needs retry in average -> down */ 2503 if (enough && an->an_tx_ok < an->an_tx_retr) 2504 mod = -1; 2505 2506 /* no error and less than 10% of packets needs retry -> up */ 2507 if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10) 2508 mod = 1; 2509 2510 orate = ni->ni_txrate; 2511 switch (mod) { 2512 case 0: 2513 if (enough && an->an_tx_upper > 0) 2514 an->an_tx_upper--; 2515 break; 2516 case -1: 2517 if (ni->ni_txrate > 0) { 2518 ni->ni_txrate--; 2519 sc->sc_stats.ast_rate_drop++; 2520 } 2521 an->an_tx_upper = 0; 2522 break; 2523 case 1: 2524 if (++an->an_tx_upper < 2) 2525 break; 2526 an->an_tx_upper = 0; 2527 if (ni->ni_txrate + 1 < rs->rs_nrates) { 2528 ni->ni_txrate++; 2529 sc->sc_stats.ast_rate_raise++; 2530 } 2531 break; 2532 } 2533 2534 if (ni->ni_txrate != orate) { 2535 printf("%s: %dM -> %dM (%d ok, %d err, %d retr)\n", 2536 __func__, 2537 (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2, 2538 (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2, 2539 an->an_tx_ok, an->an_tx_err, an->an_tx_retr); 2540 } 2541 if (ni->ni_txrate != orate || enough) 2542 an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0; 2543 } 2544 2545 #ifdef AR_DEBUG 2546 static int 2547 sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS) 2548 { 2549 char dmode[64]; 2550 int error; 2551 2552 strncpy(dmode, "", sizeof(dmode) - 1); 2553 dmode[sizeof(dmode) - 1] = '\0'; 2554 error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req); 2555 2556 if (error == 0 && req->newptr != NULL) { 2557 struct ifnet *ifp; 2558 struct ath_softc *sc; 2559 2560 ifp = ifunit("ath0"); /* XXX */ 2561 if (!ifp) 2562 return EINVAL; 2563 sc = ifp->if_softc; 2564 if (strcmp(dmode, "hal") == 0) 2565 ath_hal_dumpstate(sc->sc_ah); 2566 else if (strcmp(dmode, "eeprom") == 0) 2567 ath_hal_dumpeeprom(sc->sc_ah); 2568 else if (strcmp(dmode, "rfgain") == 0) 2569 ath_hal_dumprfgain(sc->sc_ah); 2570 else if (strcmp(dmode, "ani") == 0) 2571 ath_hal_dumpani(sc->sc_ah); 2572 else 2573 return EINVAL; 2574 } 2575 return error; 2576 } 2577 SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW, 2578 0, 0, sysctl_hw_ath_dump, "A", "Dump driver state"); 2579 2580 static void 2581 ath_printrxbuf(struct ath_buf *bf, int done) 2582 { 2583 struct ath_desc *ds; 2584 int i; 2585 2586 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 2587 printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n", 2588 i, ds, (struct ath_desc *)bf->bf_daddr + i, 2589 ds->ds_link, ds->ds_data, 2590 ds->ds_ctl0, ds->ds_ctl1, 2591 ds->ds_hw[0], ds->ds_hw[1], 2592 !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!'); 2593 } 2594 } 2595 2596 static void 2597 ath_printtxbuf(struct ath_buf *bf, int done) 2598 { 2599 struct ath_desc *ds; 2600 int i; 2601 2602 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) { 2603 printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n", 2604 i, ds, (struct ath_desc *)bf->bf_daddr + i, 2605 ds->ds_link, ds->ds_data, 2606 ds->ds_ctl0, ds->ds_ctl1, 2607 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3], 2608 !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!'); 2609 } 2610 } 2611 #endif /* AR_DEBUG */ 2612