1 /*- 2 * Copyright (c) 2004 INRIA 3 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer, 11 without modification. 12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14 * redistribution must be conditioned upon including a substantially 15 * similar Disclaimer requirement for further binary redistribution. 16 * 3. Neither the names of the above-listed copyright holders nor the names 17 * of any contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * Alternatively, this software may be distributed under the terms of the 21 * GNU General Public License ("GPL") version 2 as published by the Free 22 * Software Foundation. 23 * 24 * NO WARRANTY 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 28 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 29 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 30 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 33 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 35 * THE POSSIBILITY OF SUCH DAMAGES. 36 * 37 * $FreeBSD$ 38 */ 39 40 #ifndef _DEV_ATH_RATE_AMRR_H 41 #define _DEV_ATH_RATE_AMRR_H 42 43 /* per-device state */ 44 struct amrr_softc { 45 struct ath_ratectrl arc; /* base state */ 46 }; 47 48 /* per-node state */ 49 struct amrr_node { 50 int amn_rix; /* current rate index */ 51 int amn_ticks; /* time of last update */ 52 int amn_interval; /* update interval (ticks) */ 53 /* AMRR statistics for this node */ 54 u_int amn_tx_try0_cnt; 55 u_int amn_tx_try1_cnt; 56 u_int amn_tx_try2_cnt; 57 u_int amn_tx_try3_cnt; 58 u_int amn_tx_failure_cnt; 59 /* AMRR algorithm state for this node */ 60 u_int amn_success_threshold; 61 u_int amn_success; 62 u_int amn_recovery; 63 /* rate index et al. */ 64 u_int8_t amn_tx_rix0; /* series 0 rate index */ 65 u_int8_t amn_tx_rate0; /* series 0 h/w rate */ 66 u_int8_t amn_tx_rate1; /* series 1 h/w rate */ 67 u_int8_t amn_tx_rate2; /* series 2 h/w rate */ 68 u_int8_t amn_tx_rate3; /* series 3 h/w rate */ 69 u_int8_t amn_tx_rate0sp; /* series 0 short preamble h/w rate */ 70 u_int8_t amn_tx_rate1sp; /* series 1 short preamble h/w rate */ 71 u_int8_t amn_tx_rate2sp; /* series 2 short preamble h/w rate */ 72 u_int8_t amn_tx_rate3sp; /* series 3 short preamble h/w rate */ 73 u_int8_t amn_tx_try0; /* series 0 try count */ 74 u_int amn_tx_try1; /* series 1 try count */ 75 u_int amn_tx_try2; /* series 2 try count */ 76 u_int amn_tx_try3; /* series 3 try count */ 77 }; 78 #define ATH_NODE_AMRR(an) ((struct amrr_node *)&an[1]) 79 #endif /* _DEV_ATH_RATE_AMRR_H */ 80