1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2008-2010 Atheros Communications Inc. 5 * Copyright (c) 2011 Adrian Chadd, Xenion Pty Ltd. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 #include "opt_ah.h" 29 #include "ah.h" 30 #include "ah_internal.h" 31 32 #include "ah_eeprom_v4k.h" 33 34 #include "ar9002/ar9285.h" 35 #include "ar5416/ar5416reg.h" 36 #include "ar5416/ar5416phy.h" 37 #include "ar9002/ar9002phy.h" 38 //#include "ar9002/ar9287phy.h" 39 40 #include "ar9002/ar9287_cal.h" 41 42 void 43 ar9287PACal(struct ath_hal *ah, HAL_BOOL is_reset) 44 { 45 /* XXX not required */ 46 } 47 48 /* 49 * This is like Merlin but without ADC disable 50 */ 51 HAL_BOOL 52 ar9287InitCalHardware(struct ath_hal *ah, const struct ieee80211_channel *chan) 53 { 54 OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); 55 56 /* Calibrate the AGC */ 57 OS_REG_WRITE(ah, AR_PHY_AGC_CONTROL, 58 OS_REG_READ(ah, AR_PHY_AGC_CONTROL) | AR_PHY_AGC_CONTROL_CAL); 59 60 /* Poll for offset calibration complete */ 61 if (!ath_hal_wait(ah, AR_PHY_AGC_CONTROL, 62 AR_PHY_AGC_CONTROL_CAL, 0)) { 63 HALDEBUG(ah, HAL_DEBUG_RESET, 64 "%s: offset calibration failed to complete in 1ms; " 65 "noisy environment?\n", __func__); 66 return AH_FALSE; 67 } 68 69 OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL); 70 71 return AH_TRUE; 72 } 73