1 /* 2 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 #include "ah_devid.h" 24 25 #include "ah_eeprom_v14.h" /* XXX for tx/rx gain */ 26 #include "ah_eeprom_9287.h" 27 28 #include "ar9002/ar9280.h" 29 #include "ar9002/ar9287.h" 30 #include "ar5416/ar5416reg.h" 31 #include "ar5416/ar5416phy.h" 32 33 #include "ar9002/ar9287_cal.h" 34 #include "ar9002/ar9287_reset.h" 35 #include "ar9002/ar9287_olc.h" 36 37 #include "ar9002/ar9287.ini" 38 39 static const HAL_PERCAL_DATA ar9287_iq_cal = { /* single sample */ 40 .calName = "IQ", .calType = IQ_MISMATCH_CAL, 41 .calNumSamples = MIN_CAL_SAMPLES, 42 .calCountMax = PER_MAX_LOG_COUNT, 43 .calCollect = ar5416IQCalCollect, 44 .calPostProc = ar5416IQCalibration 45 }; 46 static const HAL_PERCAL_DATA ar9287_adc_gain_cal = { /* single sample */ 47 .calName = "ADC Gain", .calType = ADC_GAIN_CAL, 48 .calNumSamples = MIN_CAL_SAMPLES, 49 .calCountMax = PER_MIN_LOG_COUNT, 50 .calCollect = ar5416AdcGainCalCollect, 51 .calPostProc = ar5416AdcGainCalibration 52 }; 53 static const HAL_PERCAL_DATA ar9287_adc_dc_cal = { /* single sample */ 54 .calName = "ADC DC", .calType = ADC_DC_CAL, 55 .calNumSamples = MIN_CAL_SAMPLES, 56 .calCountMax = PER_MIN_LOG_COUNT, 57 .calCollect = ar5416AdcDcCalCollect, 58 .calPostProc = ar5416AdcDcCalibration 59 }; 60 static const HAL_PERCAL_DATA ar9287_adc_init_dc_cal = { 61 .calName = "ADC Init DC", .calType = ADC_DC_INIT_CAL, 62 .calNumSamples = MIN_CAL_SAMPLES, 63 .calCountMax = INIT_LOG_COUNT, 64 .calCollect = ar5416AdcDcCalCollect, 65 .calPostProc = ar5416AdcDcCalibration 66 }; 67 68 static void ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, 69 HAL_BOOL power_off); 70 static void ar9287DisablePCIE(struct ath_hal *ah); 71 static HAL_BOOL ar9287FillCapabilityInfo(struct ath_hal *ah); 72 static void ar9287WriteIni(struct ath_hal *ah, 73 const struct ieee80211_channel *chan); 74 75 static void 76 ar9287AniSetup(struct ath_hal *ah) 77 { 78 /* 79 * These are the parameters from the AR5416 ANI code; 80 * they likely need quite a bit of adjustment for the 81 * AR9287. 82 */ 83 static const struct ar5212AniParams aniparams = { 84 .maxNoiseImmunityLevel = 4, /* levels 0..4 */ 85 .totalSizeDesired = { -55, -55, -55, -55, -62 }, 86 .coarseHigh = { -14, -14, -14, -14, -12 }, 87 .coarseLow = { -64, -64, -64, -64, -70 }, 88 .firpwr = { -78, -78, -78, -78, -80 }, 89 .maxSpurImmunityLevel = 7, 90 .cycPwrThr1 = { 2, 4, 6, 8, 10, 12, 14, 16 }, 91 .maxFirstepLevel = 2, /* levels 0..2 */ 92 .firstep = { 0, 4, 8 }, 93 .ofdmTrigHigh = 500, 94 .ofdmTrigLow = 200, 95 .cckTrigHigh = 200, 96 .cckTrigLow = 100, 97 .rssiThrHigh = 40, 98 .rssiThrLow = 7, 99 .period = 100, 100 }; 101 /* NB: disable ANI noise immmunity for reliable RIFS rx */ 102 AH5416(ah)->ah_ani_function &= ~ HAL_ANI_NOISE_IMMUNITY_LEVEL; 103 104 /* NB: ANI is not enabled yet */ 105 ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE); 106 } 107 108 /* 109 * Attach for an AR9287 part. 110 */ 111 static struct ath_hal * 112 ar9287Attach(uint16_t devid, HAL_SOFTC sc, 113 HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, 114 HAL_OPS_CONFIG *ah_config, 115 HAL_STATUS *status) 116 { 117 struct ath_hal_9287 *ahp9287; 118 struct ath_hal_5212 *ahp; 119 struct ath_hal *ah; 120 uint32_t val; 121 HAL_STATUS ecode; 122 HAL_BOOL rfStatus; 123 int8_t pwr_table_offset; 124 125 HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n", 126 __func__, sc, (void*) st, (void*) sh); 127 128 /* NB: memory is returned zero'd */ 129 ahp9287 = ath_hal_malloc(sizeof (struct ath_hal_9287)); 130 if (ahp9287 == AH_NULL) { 131 HALDEBUG(AH_NULL, HAL_DEBUG_ANY, 132 "%s: cannot allocate memory for state block\n", __func__); 133 *status = HAL_ENOMEM; 134 return AH_NULL; 135 } 136 ahp = AH5212(ahp9287); 137 ah = &ahp->ah_priv.h; 138 139 ar5416InitState(AH5416(ah), devid, sc, st, sh, status); 140 141 if (eepromdata != AH_NULL) { 142 AH_PRIVATE(ah)->ah_eepromRead = ath_hal_EepromDataRead; 143 AH_PRIVATE(ah)->ah_eepromWrite = NULL; 144 ah->ah_eepromdata = eepromdata; 145 } 146 147 148 /* XXX override with 9280 specific state */ 149 /* override 5416 methods for our needs */ 150 AH5416(ah)->ah_initPLL = ar9280InitPLL; 151 152 ah->ah_setAntennaSwitch = ar9287SetAntennaSwitch; 153 ah->ah_configPCIE = ar9287ConfigPCIE; 154 ah->ah_disablePCIE = ar9287DisablePCIE; 155 156 AH5416(ah)->ah_cal.iqCalData.calData = &ar9287_iq_cal; 157 AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9287_adc_gain_cal; 158 AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9287_adc_dc_cal; 159 AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9287_adc_init_dc_cal; 160 /* Better performance without ADC Gain Calibration */ 161 AH5416(ah)->ah_cal.suppCals = ADC_DC_CAL | IQ_MISMATCH_CAL; 162 163 AH5416(ah)->ah_spurMitigate = ar9280SpurMitigate; 164 AH5416(ah)->ah_writeIni = ar9287WriteIni; 165 166 ah->ah_setTxPower = ar9287SetTransmitPower; 167 ah->ah_setBoardValues = ar9287SetBoardValues; 168 169 AH5416(ah)->ah_olcInit = ar9287olcInit; 170 AH5416(ah)->ah_olcTempCompensation = ar9287olcTemperatureCompensation; 171 //AH5416(ah)->ah_setPowerCalTable = ar9287SetPowerCalTable; 172 AH5416(ah)->ah_cal_initcal = ar9287InitCalHardware; 173 AH5416(ah)->ah_cal_pacal = ar9287PACal; 174 175 /* XXX NF calibration */ 176 /* XXX Ini override? (IFS vars - since the kiwi mac clock is faster?) */ 177 /* XXX what else is kiwi-specific in the radio/calibration pathway? */ 178 179 AH5416(ah)->ah_rx_chainmask = AR9287_DEFAULT_RXCHAINMASK; 180 AH5416(ah)->ah_tx_chainmask = AR9287_DEFAULT_TXCHAINMASK; 181 182 if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) { 183 /* reset chip */ 184 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n", 185 __func__); 186 ecode = HAL_EIO; 187 goto bad; 188 } 189 190 if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) { 191 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n", 192 __func__); 193 ecode = HAL_EIO; 194 goto bad; 195 } 196 /* Read Revisions from Chips before taking out of reset */ 197 val = OS_REG_READ(ah, AR_SREV); 198 HALDEBUG(ah, HAL_DEBUG_ATTACH, 199 "%s: ID 0x%x VERSION 0x%x TYPE 0x%x REVISION 0x%x\n", 200 __func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION), 201 MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION)); 202 /* NB: include chip type to differentiate from pre-Sowl versions */ 203 AH_PRIVATE(ah)->ah_macVersion = 204 (val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S; 205 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION); 206 AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0; 207 208 /* Don't support Kiwi < 1.2; those are pre-release chips */ 209 if (! AR_SREV_KIWI_12_OR_LATER(ah)) { 210 ath_hal_printf(ah, "[ath]: Kiwi < 1.2 is not supported\n"); 211 ecode = HAL_EIO; 212 goto bad; 213 } 214 215 /* setup common ini data; rf backends handle remainder */ 216 HAL_INI_INIT(&ahp->ah_ini_modes, ar9287Modes_9287_1_1, 6); 217 HAL_INI_INIT(&ahp->ah_ini_common, ar9287Common_9287_1_1, 2); 218 219 /* If pcie_clock_req */ 220 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, 221 ar9287PciePhy_clkreq_always_on_L1_9287_1_1, 2); 222 223 /* XXX WoW ini values */ 224 225 /* Else */ 226 #if 0 227 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, 228 ar9287PciePhy_clkreq_off_L1_9287_1_1, 2); 229 #endif 230 231 /* Initialise Japan arrays */ 232 HAL_INI_INIT(&ahp9287->ah_ini_cckFirNormal, 233 ar9287Common_normal_cck_fir_coeff_9287_1_1, 2); 234 HAL_INI_INIT(&ahp9287->ah_ini_cckFirJapan2484, 235 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1, 2); 236 237 ar5416AttachPCIE(ah); 238 239 ecode = ath_hal_9287EepromAttach(ah); 240 if (ecode != HAL_OK) 241 goto bad; 242 243 if (!ar5416ChipReset(ah, AH_NULL)) { /* reset chip */ 244 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); 245 ecode = HAL_EIO; 246 goto bad; 247 } 248 249 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); 250 251 if (!ar5212ChipTest(ah)) { 252 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", 253 __func__); 254 ecode = HAL_ESELFTEST; 255 goto bad; 256 } 257 258 /* 259 * Set correct Baseband to analog shift 260 * setting to access analog chips. 261 */ 262 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); 263 264 /* Read Radio Chip Rev Extract */ 265 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah); 266 switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) { 267 case AR_RAD2133_SREV_MAJOR: /* Sowl: 2G/3x3 */ 268 case AR_RAD5133_SREV_MAJOR: /* Sowl: 2+5G/3x3 */ 269 break; 270 default: 271 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) { 272 AH_PRIVATE(ah)->ah_analog5GhzRev = 273 AR_RAD5133_SREV_MAJOR; 274 break; 275 } 276 #ifdef AH_DEBUG 277 HALDEBUG(ah, HAL_DEBUG_ANY, 278 "%s: 5G Radio Chip Rev 0x%02X is not supported by " 279 "this driver\n", __func__, 280 AH_PRIVATE(ah)->ah_analog5GhzRev); 281 ecode = HAL_ENOTSUPP; 282 goto bad; 283 #endif 284 } 285 rfStatus = ar9287RfAttach(ah, &ecode); 286 if (!rfStatus) { 287 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n", 288 __func__, ecode); 289 goto bad; 290 } 291 292 /* 293 * We only implement open-loop TX power control 294 * for the AR9287 in this codebase. 295 */ 296 if (! ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL)) { 297 ath_hal_printf(ah, "[ath] AR9287 w/ closed-loop TX power control" 298 " isn't supported.\n"); 299 ecode = HAL_ENOTSUPP; 300 goto bad; 301 } 302 303 /* 304 * Check whether the power table offset isn't the default. 305 * This can occur with eeprom minor V21 or greater on Merlin. 306 */ 307 (void) ath_hal_eepromGet(ah, AR_EEP_PWR_TABLE_OFFSET, &pwr_table_offset); 308 if (pwr_table_offset != AR5416_PWR_TABLE_OFFSET_DB) 309 ath_hal_printf(ah, "[ath]: default pwr offset: %d dBm != EEPROM pwr offset: %d dBm; curves will be adjusted.\n", 310 AR5416_PWR_TABLE_OFFSET_DB, (int) pwr_table_offset); 311 312 /* setup rxgain table */ 313 HAL_INI_INIT(&ahp9287->ah_ini_rxgain, ar9287Modes_rx_gain_9287_1_1, 6); 314 315 /* setup txgain table */ 316 HAL_INI_INIT(&ahp9287->ah_ini_txgain, ar9287Modes_tx_gain_9287_1_1, 6); 317 318 /* 319 * Got everything we need now to setup the capabilities. 320 */ 321 if (!ar9287FillCapabilityInfo(ah)) { 322 ecode = HAL_EEREAD; 323 goto bad; 324 } 325 326 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); 327 if (ecode != HAL_OK) { 328 HALDEBUG(ah, HAL_DEBUG_ANY, 329 "%s: error getting mac address from EEPROM\n", __func__); 330 goto bad; 331 } 332 /* XXX How about the serial number ? */ 333 /* Read Reg Domain */ 334 AH_PRIVATE(ah)->ah_currentRD = 335 ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL); 336 AH_PRIVATE(ah)->ah_currentRDext = AR9287_RDEXT_DEFAULT; 337 338 /* 339 * ah_miscMode is populated by ar5416FillCapabilityInfo() 340 * starting from griffin. Set here to make sure that 341 * AR_MISC_MODE_MIC_NEW_LOC_ENABLE is set before a GTK is 342 * placed into hardware. 343 */ 344 if (ahp->ah_miscMode != 0) 345 OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); 346 347 ar9287AniSetup(ah); /* Anti Noise Immunity */ 348 349 /* Setup noise floor min/max/nominal values */ 350 AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ; 351 AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ; 352 AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9287_2GHZ; 353 AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9287_5GHZ; 354 AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_9287_5GHZ; 355 AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_9287_5GHZ; 356 357 ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist); 358 359 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); 360 361 return ah; 362 bad: 363 if (ah != AH_NULL) 364 ah->ah_detach(ah); 365 if (status) 366 *status = ecode; 367 return AH_NULL; 368 } 369 370 static void 371 ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off) 372 { 373 if (AH_PRIVATE(ah)->ah_ispcie && !restore) { 374 ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0); 375 OS_DELAY(1000); 376 OS_REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); 377 /* Yes, Kiwi uses the Kite PCIe PHY WA */ 378 OS_REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT); 379 } 380 } 381 382 static void 383 ar9287DisablePCIE(struct ath_hal *ah) 384 { 385 /* XXX TODO */ 386 } 387 388 static void 389 ar9287WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan) 390 { 391 u_int modesIndex, freqIndex; 392 int regWrites = 0; 393 394 /* Setup the indices for the next set of register array writes */ 395 /* XXX Ignore 11n dynamic mode on the AR5416 for the moment */ 396 if (IEEE80211_IS_CHAN_2GHZ(chan)) { 397 freqIndex = 2; 398 if (IEEE80211_IS_CHAN_HT40(chan)) 399 modesIndex = 3; 400 else if (IEEE80211_IS_CHAN_108G(chan)) 401 modesIndex = 5; 402 else 403 modesIndex = 4; 404 } else { 405 freqIndex = 1; 406 if (IEEE80211_IS_CHAN_HT40(chan) || 407 IEEE80211_IS_CHAN_TURBO(chan)) 408 modesIndex = 2; 409 else 410 modesIndex = 1; 411 } 412 413 /* Set correct Baseband to analog shift setting to access analog chips. */ 414 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); 415 OS_REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC); 416 417 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_modes, modesIndex, regWrites); 418 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_rxgain, modesIndex, regWrites); 419 regWrites = ath_hal_ini_write(ah, &AH9287(ah)->ah_ini_txgain, modesIndex, regWrites); 420 regWrites = ath_hal_ini_write(ah, &AH5212(ah)->ah_ini_common, 1, regWrites); 421 } 422 423 /* 424 * Fill all software cached or static hardware state information. 425 * Return failure if capabilities are to come from EEPROM and 426 * cannot be read. 427 */ 428 static HAL_BOOL 429 ar9287FillCapabilityInfo(struct ath_hal *ah) 430 { 431 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; 432 433 if (!ar5416FillCapabilityInfo(ah)) 434 return AH_FALSE; 435 pCap->halNumGpioPins = 10; 436 pCap->halWowSupport = AH_TRUE; 437 pCap->halWowMatchPatternExact = AH_TRUE; 438 #if 0 439 pCap->halWowMatchPatternDword = AH_TRUE; 440 #endif 441 442 pCap->halCSTSupport = AH_TRUE; 443 pCap->halRifsRxSupport = AH_TRUE; 444 pCap->halRifsTxSupport = AH_TRUE; 445 pCap->halRtsAggrLimit = 64*1024; /* 802.11n max */ 446 pCap->halExtChanDfsSupport = AH_TRUE; 447 pCap->halUseCombinedRadarRssi = AH_TRUE; 448 #if 0 449 /* XXX bluetooth */ 450 pCap->halBtCoexSupport = AH_TRUE; 451 #endif 452 pCap->halAutoSleepSupport = AH_FALSE; /* XXX? */ 453 pCap->hal4kbSplitTransSupport = AH_FALSE; 454 /* Disable this so Block-ACK works correctly */ 455 pCap->halHasRxSelfLinkedTail = AH_FALSE; 456 pCap->halPSPollBroken = AH_FALSE; 457 pCap->halSpectralScanSupport = AH_TRUE; 458 459 /* Hardware supports (at least) single-stream STBC TX/RX */ 460 pCap->halRxStbcSupport = 1; 461 pCap->halTxStbcSupport = 1; 462 463 /* Hardware supports short-GI w/ 20MHz */ 464 pCap->halHTSGI20Support = 1; 465 466 pCap->halEnhancedDfsSupport = AH_TRUE; 467 468 return AH_TRUE; 469 } 470 471 /* 472 * This has been disabled - having the HAL flip chainmasks on/off 473 * when attempting to implement 11n disrupts things. For now, just 474 * leave this flipped off and worry about implementing TX diversity 475 * for legacy and MCS0-15 when 11n is fully functioning. 476 */ 477 HAL_BOOL 478 ar9287SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings) 479 { 480 return AH_TRUE; 481 } 482 483 static const char* 484 ar9287Probe(uint16_t vendorid, uint16_t devid) 485 { 486 if (vendorid == ATHEROS_VENDOR_ID) { 487 if (devid == AR9287_DEVID_PCI) 488 return "Atheros 9227"; 489 if (devid == AR9287_DEVID_PCIE) 490 return "Atheros 9287"; 491 } 492 return AH_NULL; 493 } 494 AH_CHIP(AR9287, ar9287Probe, ar9287Attach); 495