1 /* 2 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #include "opt_ah.h" 20 21 /* 22 * NB: Merlin and later have a simpler RF backend. 23 */ 24 #include "ah.h" 25 #include "ah_internal.h" 26 27 #include "ah_eeprom_v14.h" 28 29 #include "ar9002/ar9287.h" 30 #include "ar5416/ar5416reg.h" 31 #include "ar5416/ar5416phy.h" 32 33 #define N(a) (sizeof(a)/sizeof(a[0])) 34 35 struct ar9287State { 36 RF_HAL_FUNCS base; /* public state, must be first */ 37 uint16_t pcdacTable[1]; /* XXX */ 38 }; 39 #define AR9287(ah) ((struct ar9287State *) AH5212(ah)->ah_rfHal) 40 41 static HAL_BOOL ar9287GetChannelMaxMinPower(struct ath_hal *, 42 const struct ieee80211_channel *, int16_t *maxPow,int16_t *minPow); 43 int16_t ar9287GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c); 44 45 static void 46 ar9287WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 47 int writes) 48 { 49 (void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain, 50 freqIndex, writes); 51 } 52 53 /* 54 * Take the MHz channel value and set the Channel value 55 * 56 * ASSUMES: Writes enabled to analog bus 57 * 58 * Actual Expression, 59 * 60 * For 2GHz channel, 61 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) 62 * (freq_ref = 40MHz) 63 * 64 * For 5GHz channel, 65 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10) 66 * (freq_ref = 40MHz/(24>>amodeRefSel)) 67 * 68 * For 5GHz channels which are 5MHz spaced, 69 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) 70 * (freq_ref = 40MHz) 71 */ 72 static HAL_BOOL 73 ar9287SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 74 { 75 uint16_t bMode, fracMode, aModeRefSel = 0; 76 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; 77 CHAN_CENTERS centers; 78 uint32_t refDivA = 24; 79 80 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq); 81 82 ar5416GetChannelCenters(ah, chan, ¢ers); 83 freq = centers.synth_center; 84 85 reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL); 86 reg32 &= 0xc0000000; 87 88 if (freq < 4800) { /* 2 GHz, fractional mode */ 89 uint32_t txctl; 90 int regWrites = 0; 91 92 bMode = 1; 93 fracMode = 1; 94 aModeRefSel = 0; 95 channelSel = (freq * 0x10000)/15; 96 97 if (AR_SREV_KIWI_11_OR_LATER(ah)) { 98 if (freq == 2484) { 99 ath_hal_ini_write(ah, 100 &AH9287(ah)->ah_ini_cckFirJapan2484, 1, 101 regWrites); 102 } else { 103 ath_hal_ini_write(ah, 104 &AH9287(ah)->ah_ini_cckFirNormal, 1, 105 regWrites); 106 } 107 } 108 109 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 110 if (freq == 2484) { 111 /* Enable channel spreading for channel 14 */ 112 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 113 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 114 } else { 115 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 116 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 117 } 118 } else { 119 bMode = 0; 120 fracMode = 0; 121 122 if ((freq % 20) == 0) { 123 aModeRefSel = 3; 124 } else if ((freq % 10) == 0) { 125 aModeRefSel = 2; 126 } else { 127 aModeRefSel = 0; 128 /* 129 * Enable 2G (fractional) mode for channels which 130 * are 5MHz spaced 131 */ 132 fracMode = 1; 133 refDivA = 1; 134 channelSel = (freq * 0x8000)/15; 135 136 /* RefDivA setting */ 137 OS_A_REG_RMW_FIELD(ah, AR_AN_SYNTH9, 138 AR_AN_SYNTH9_REFDIVA, refDivA); 139 } 140 if (!fracMode) { 141 ndiv = (freq * (refDivA >> aModeRefSel))/60; 142 channelSel = ndiv & 0x1ff; 143 channelFrac = (ndiv & 0xfffffe00) * 2; 144 channelSel = (channelSel << 17) | channelFrac; 145 } 146 } 147 148 reg32 = reg32 | (bMode << 29) | (fracMode << 28) | 149 (aModeRefSel << 26) | (channelSel); 150 151 OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32); 152 153 AH_PRIVATE(ah)->ah_curchan = chan; 154 155 return AH_TRUE; 156 } 157 158 /* 159 * Return a reference to the requested RF Bank. 160 */ 161 static uint32_t * 162 ar9287GetRfBank(struct ath_hal *ah, int bank) 163 { 164 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 165 __func__, bank); 166 return AH_NULL; 167 } 168 169 /* 170 * Reads EEPROM header info from device structure and programs 171 * all rf registers 172 */ 173 static HAL_BOOL 174 ar9287SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan, 175 uint16_t modesIndex, uint16_t *rfXpdGain) 176 { 177 return AH_TRUE; /* nothing to do */ 178 } 179 180 /* 181 * Read the transmit power levels from the structures taken from EEPROM 182 * Interpolate read transmit power values for this channel 183 * Organize the transmit power values into a table for writing into the hardware 184 */ 185 186 static HAL_BOOL 187 ar9287SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax, 188 const struct ieee80211_channel *chan, uint16_t *rfXpdGain) 189 { 190 return AH_TRUE; 191 } 192 193 #if 0 194 static int16_t 195 ar9287GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data) 196 { 197 int i, minIndex; 198 int16_t minGain,minPwr,minPcdac,retVal; 199 200 /* Assume NUM_POINTS_XPD0 > 0 */ 201 minGain = data->pDataPerXPD[0].xpd_gain; 202 for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) { 203 if (data->pDataPerXPD[i].xpd_gain < minGain) { 204 minIndex = i; 205 minGain = data->pDataPerXPD[i].xpd_gain; 206 } 207 } 208 minPwr = data->pDataPerXPD[minIndex].pwr_t4[0]; 209 minPcdac = data->pDataPerXPD[minIndex].pcdac[0]; 210 for (i=1; i<NUM_POINTS_XPD0; i++) { 211 if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) { 212 minPwr = data->pDataPerXPD[minIndex].pwr_t4[i]; 213 minPcdac = data->pDataPerXPD[minIndex].pcdac[i]; 214 } 215 } 216 retVal = minPwr - (minPcdac*2); 217 return(retVal); 218 } 219 #endif 220 221 static HAL_BOOL 222 ar9287GetChannelMaxMinPower(struct ath_hal *ah, 223 const struct ieee80211_channel *chan, 224 int16_t *maxPow, int16_t *minPow) 225 { 226 #if 0 227 struct ath_hal_5212 *ahp = AH5212(ah); 228 int numChannels=0,i,last; 229 int totalD, totalF,totalMin; 230 EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL; 231 EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL; 232 233 *maxPow = 0; 234 if (IS_CHAN_A(chan)) { 235 powerArray = ahp->ah_modePowerArray5112; 236 data = powerArray[headerInfo11A].pDataPerChannel; 237 numChannels = powerArray[headerInfo11A].numChannels; 238 } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) { 239 /* XXX - is this correct? Should we also use the same power for turbo G? */ 240 powerArray = ahp->ah_modePowerArray5112; 241 data = powerArray[headerInfo11G].pDataPerChannel; 242 numChannels = powerArray[headerInfo11G].numChannels; 243 } else if (IS_CHAN_B(chan)) { 244 powerArray = ahp->ah_modePowerArray5112; 245 data = powerArray[headerInfo11B].pDataPerChannel; 246 numChannels = powerArray[headerInfo11B].numChannels; 247 } else { 248 return (AH_TRUE); 249 } 250 /* Make sure the channel is in the range of the TP values 251 * (freq piers) 252 */ 253 if ((numChannels < 1) || 254 (chan->channel < data[0].channelValue) || 255 (chan->channel > data[numChannels-1].channelValue)) 256 return(AH_FALSE); 257 258 /* Linearly interpolate the power value now */ 259 for (last=0,i=0; 260 (i<numChannels) && (chan->channel > data[i].channelValue); 261 last=i++); 262 totalD = data[i].channelValue - data[last].channelValue; 263 if (totalD > 0) { 264 totalF = data[i].maxPower_t4 - data[last].maxPower_t4; 265 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD); 266 267 totalMin = ar9287GetMinPower(ah,&data[i]) - ar9287GetMinPower(ah, &data[last]); 268 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar9287GetMinPower(ah, &data[last])*totalD)/totalD); 269 return (AH_TRUE); 270 } else { 271 if (chan->channel == data[i].channelValue) { 272 *maxPow = data[i].maxPower_t4; 273 *minPow = ar9287GetMinPower(ah, &data[i]); 274 return(AH_TRUE); 275 } else 276 return(AH_FALSE); 277 } 278 #else 279 *maxPow = *minPow = 0; 280 return AH_FALSE; 281 #endif 282 } 283 284 /* 285 * The ordering of nfarray is thus: 286 * 287 * nfarray[0]: Chain 0 ctl 288 * nfarray[1]: Chain 1 ctl 289 * nfarray[2]: Chain 2 ctl 290 * nfarray[3]: Chain 0 ext 291 * nfarray[4]: Chain 1 ext 292 * nfarray[5]: Chain 2 ext 293 */ 294 static void 295 ar9287GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[]) 296 { 297 int16_t nf; 298 299 nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR); 300 if (nf & 0x100) 301 nf = 0 - ((nf ^ 0x1ff) + 1); 302 HALDEBUG(ah, HAL_DEBUG_NFCAL, 303 "NF calibrated [ctl] [chain 0] is %d\n", nf); 304 nfarray[0] = nf; 305 306 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR9280_PHY_CH1_MINCCA_PWR); 307 if (nf & 0x100) 308 nf = 0 - ((nf ^ 0x1ff) + 1); 309 HALDEBUG(ah, HAL_DEBUG_NFCAL, 310 "NF calibrated [ctl] [chain 1] is %d\n", nf); 311 nfarray[1] = nf; 312 313 nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR); 314 if (nf & 0x100) 315 nf = 0 - ((nf ^ 0x1ff) + 1); 316 HALDEBUG(ah, HAL_DEBUG_NFCAL, 317 "NF calibrated [ext] [chain 0] is %d\n", nf); 318 nfarray[3] = nf; 319 320 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR9280_PHY_CH1_EXT_MINCCA_PWR); 321 if (nf & 0x100) 322 nf = 0 - ((nf ^ 0x1ff) + 1); 323 HALDEBUG(ah, HAL_DEBUG_NFCAL, 324 "NF calibrated [ext] [chain 1] is %d\n", nf); 325 nfarray[4] = nf; 326 327 /* Chain 2 - invalid */ 328 nfarray[2] = 0; 329 nfarray[5] = 0; 330 331 } 332 333 /* 334 * Adjust NF based on statistical values for 5GHz frequencies. 335 * Stubbed:Not used by Fowl 336 */ 337 int16_t 338 ar9287GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c) 339 { 340 return 0; 341 } 342 343 /* 344 * Free memory for analog bank scratch buffers 345 */ 346 static void 347 ar9287RfDetach(struct ath_hal *ah) 348 { 349 struct ath_hal_5212 *ahp = AH5212(ah); 350 351 HALASSERT(ahp->ah_rfHal != AH_NULL); 352 ath_hal_free(ahp->ah_rfHal); 353 ahp->ah_rfHal = AH_NULL; 354 } 355 356 HAL_BOOL 357 ar9287RfAttach(struct ath_hal *ah, HAL_STATUS *status) 358 { 359 struct ath_hal_5212 *ahp = AH5212(ah); 360 struct ar9287State *priv; 361 362 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR9280 radio\n", __func__); 363 364 HALASSERT(ahp->ah_rfHal == AH_NULL); 365 priv = ath_hal_malloc(sizeof(struct ar9287State)); 366 if (priv == AH_NULL) { 367 HALDEBUG(ah, HAL_DEBUG_ANY, 368 "%s: cannot allocate private state\n", __func__); 369 *status = HAL_ENOMEM; /* XXX */ 370 return AH_FALSE; 371 } 372 priv->base.rfDetach = ar9287RfDetach; 373 priv->base.writeRegs = ar9287WriteRegs; 374 priv->base.getRfBank = ar9287GetRfBank; 375 priv->base.setChannel = ar9287SetChannel; 376 priv->base.setRfRegs = ar9287SetRfRegs; 377 priv->base.setPowerTable = ar9287SetPowerTable; 378 priv->base.getChannelMaxMinPower = ar9287GetChannelMaxMinPower; 379 priv->base.getNfAdjust = ar9287GetNfAdjust; 380 381 ahp->ah_pcdacTable = priv->pcdacTable; 382 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 383 ahp->ah_rfHal = &priv->base; 384 /* 385 * Set noise floor adjust method; we arrange a 386 * direct call instead of thunking. 387 */ 388 AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust; 389 AH_PRIVATE(ah)->ah_getNoiseFloor = ar9287GetNoiseFloor; 390 391 return AH_TRUE; 392 } 393 394 static HAL_BOOL 395 ar9287RfProbe(struct ath_hal *ah) 396 { 397 return (AR_SREV_KIWI(ah)); 398 } 399 400 AH_RF(RF9287, ar9287RfProbe, ar9287RfAttach); 401