xref: /freebsd/sys/dev/ath/ath_hal/ar9002/ar9285_phy.c (revision c243e4902be8df1e643c76b5f18b68bb77cc5268)
1 /*
2  * Copyright (c) 2008-2010 Atheros Communications Inc.
3  * Copyright (c) 2010-2011 Adrian Chadd, Xenion Pty Ltd.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 #include "opt_ah.h"
29 
30 #include "ah.h"
31 #include "ah_internal.h"
32 #include "ah_devid.h"
33 #include "ah_eeprom_v4k.h"
34 
35 #include "ar9002/ar9280.h"
36 #include "ar9002/ar9285.h"
37 #include "ar5416/ar5416reg.h"
38 #include "ar5416/ar5416phy.h"
39 #include "ar9002/ar9285phy.h"
40 #include "ar9002/ar9285_phy.h"
41 
42 void
43 ar9285_antdiv_comb_conf_get(struct ath_hal *ah,
44     struct ar9285_antcomb_conf *antconf)
45 {
46 	uint32_t regval;
47 
48 	regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
49 	antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >>
50 				  AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S;
51 	antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >>
52 				 AR_PHY_9285_ANT_DIV_ALT_LNACONF_S;
53 	antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >>
54 				  AR_PHY_9285_FAST_DIV_BIAS_S;
55 }
56 
57 void
58 ar9285_antdiv_comb_conf_set(struct ath_hal *ah,
59     struct ar9285_antcomb_conf *antconf)
60 {
61 	uint32_t regval;
62 
63 	regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
64 	regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF |
65 		    AR_PHY_9285_ANT_DIV_ALT_LNACONF |
66 		    AR_PHY_9285_FAST_DIV_BIAS);
67 	regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S)
68 		   & AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
69 	regval |= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S)
70 		   & AR_PHY_9285_ANT_DIV_ALT_LNACONF);
71 	regval |= ((antconf->fast_div_bias << AR_PHY_9285_FAST_DIV_BIAS_S)
72 		   & AR_PHY_9285_FAST_DIV_BIAS);
73 
74 	OS_REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval);
75 }
76 
77 /*
78  * Check whether combined + fast antenna diversity should be enabled.
79  *
80  * This enables software-driven RX antenna diversity based on RX
81  * RSSI + antenna config packet sampling.
82  */
83 HAL_BOOL
84 ar9285_check_div_comb(struct ath_hal *ah)
85 {
86 	uint8_t ant_div_ctl1;
87 	HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom;
88         const MODAL_EEP4K_HEADER *pModal = &ee->ee_base.modalHeader;
89 
90 	/* For now, simply disable this until it's better debugged. -adrian */
91 	return AH_FALSE;
92 
93 	if (! AR_SREV_KITE(ah))
94 		return AH_FALSE;
95 
96 	if (pModal->version < 3)
97 		return AH_FALSE;
98 
99 	ant_div_ctl1 = pModal->antdiv_ctl1;
100 	if ((ant_div_ctl1 & 0x1) && ((ant_div_ctl1 >> 3) & 0x1))
101 		return AH_TRUE;
102 
103 	return AH_FALSE;
104 }
105