1 /* 2 * Copyright (c) 2008-2010 Atheros Communications Inc. 3 * Copyright (c) 2010-2011 Adrian Chadd, Xenion Pty Ltd. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 #include "opt_ah.h" 29 30 #include "ah.h" 31 #include "ah_internal.h" 32 #include "ah_devid.h" 33 #include "ah_eeprom_v4k.h" 34 35 #include "ar9002/ar9280.h" 36 #include "ar9002/ar9285.h" 37 #include "ar5416/ar5416reg.h" 38 #include "ar5416/ar5416phy.h" 39 #include "ar9002/ar9285phy.h" 40 #include "ar9002/ar9285_phy.h" 41 42 void 43 ar9285_antdiv_comb_conf_get(struct ath_hal *ah, HAL_ANT_COMB_CONFIG *antconf) 44 { 45 uint32_t regval; 46 47 regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); 48 antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >> 49 AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S; 50 antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >> 51 AR_PHY_9285_ANT_DIV_ALT_LNACONF_S; 52 antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >> 53 AR_PHY_9285_FAST_DIV_BIAS_S; 54 antconf->antdiv_configgroup = DEFAULT_ANTDIV_CONFIG_GROUP; 55 } 56 57 void 58 ar9285_antdiv_comb_conf_set(struct ath_hal *ah, HAL_ANT_COMB_CONFIG *antconf) 59 { 60 uint32_t regval; 61 62 regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); 63 regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF | 64 AR_PHY_9285_ANT_DIV_ALT_LNACONF | 65 AR_PHY_9285_FAST_DIV_BIAS); 66 regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S) 67 & AR_PHY_9285_ANT_DIV_MAIN_LNACONF); 68 regval |= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S) 69 & AR_PHY_9285_ANT_DIV_ALT_LNACONF); 70 regval |= ((antconf->fast_div_bias << AR_PHY_9285_FAST_DIV_BIAS_S) 71 & AR_PHY_9285_FAST_DIV_BIAS); 72 73 OS_REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval); 74 } 75 76 /* 77 * Check whether combined + fast antenna diversity should be enabled. 78 * 79 * This enables software-driven RX antenna diversity based on RX 80 * RSSI + antenna config packet sampling. 81 */ 82 HAL_BOOL 83 ar9285_check_div_comb(struct ath_hal *ah) 84 { 85 uint8_t ant_div_ctl1; 86 HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom; 87 const MODAL_EEP4K_HEADER *pModal = &ee->ee_base.modalHeader; 88 89 #if 0 90 /* For now, simply disable this until it's better debugged. -adrian */ 91 return AH_FALSE; 92 #endif 93 94 if (! AR_SREV_KITE(ah)) 95 return AH_FALSE; 96 97 if (pModal->version < 3) 98 return AH_FALSE; 99 100 ant_div_ctl1 = pModal->antdiv_ctl1; 101 if ((ant_div_ctl1 & 0x1) && ((ant_div_ctl1 >> 3) & 0x1)) 102 return AH_TRUE; 103 104 return AH_FALSE; 105 } 106