xref: /freebsd/sys/dev/ath/ath_hal/ar9002/ar9285_btcoex.c (revision 7cd2dcf07629713e5a3d60472cfe4701b705a167)
1 /*
2  * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
3  * Copyright (c) 2002-2005 Atheros Communications, Inc.
4  * Copyright (c) 2008-2010, Atheros Communications Inc.
5  *
6  * Permission to use, copy, modify, and/or distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  *
18  * $FreeBSD$
19  */
20 
21 #include "opt_ah.h"
22 
23 #include "ah.h"
24 #include "ah_internal.h"
25 #include "ah_devid.h"
26 #ifdef AH_DEBUG
27 #include "ah_desc.h"                    /* NB: for HAL_PHYERR* */
28 #endif
29 
30 #include "ar5416/ar5416.h"
31 #include "ar5416/ar5416reg.h"
32 #include "ar5416/ar5416phy.h"
33 #include "ar5416/ar5416desc.h" /* AR5416_CONTTXMODE */
34 
35 #include "ar9002/ar9285phy.h"
36 #include "ar9002/ar9285.h"
37 
38 /*
39  * This is specific to Kite.
40  *
41  * Kiwi and others don't have antenna diversity like this.
42  */
43 void
44 ar9285BTCoexAntennaDiversity(struct ath_hal *ah)
45 {
46 	struct ath_hal_5416 *ahp = AH5416(ah);
47 	u_int32_t regVal;
48 	u_int8_t ant_div_control1, ant_div_control2;
49 
50     if ((ahp->ah_btCoexFlag & HAL_BT_COEX_FLAG_ANT_DIV_ALLOW) ||
51         (AH5212(ah)->ah_diversity != HAL_ANT_VARIABLE)) {
52         if ((ahp->ah_btCoexFlag & HAL_BT_COEX_FLAG_ANT_DIV_ENABLE) &&
53              (AH5212(ah)->ah_diversity == HAL_ANT_VARIABLE)) {
54             /* Enable antenna diversity */
55             ant_div_control1 = HAL_BT_COEX_ANTDIV_CONTROL1_ENABLE;
56             ant_div_control2 = HAL_BT_COEX_ANTDIV_CONTROL2_ENABLE;
57 
58             /* Don't disable BT ant to allow BB to control SWCOM */
59             ahp->ah_btCoexMode2 &= (~(AR_BT_DISABLE_BT_ANT));
60             OS_REG_WRITE(ah, AR_BT_COEX_MODE2, ahp->ah_btCoexMode2);
61 
62             /* Program the correct SWCOM table */
63             OS_REG_WRITE(ah, AR_PHY_SWITCH_COM,
64               HAL_BT_COEX_ANT_DIV_SWITCH_COM);
65             OS_REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0, 0xf0000000);
66         } else if (AH5212(ah)->ah_diversity == HAL_ANT_FIXED_B) {
67             /* Disable antenna diversity. Use antenna B(LNA2) only. */
68             ant_div_control1 = HAL_BT_COEX_ANTDIV_CONTROL1_FIXED_B;
69             ant_div_control2 = HAL_BT_COEX_ANTDIV_CONTROL2_FIXED_B;
70 
71             /* Disable BT ant to allow concurrent BT and WLAN receive */
72             ahp->ah_btCoexMode2 |= AR_BT_DISABLE_BT_ANT;
73             OS_REG_WRITE(ah, AR_BT_COEX_MODE2, ahp->ah_btCoexMode2);
74 
75             /* Program SWCOM talbe to make sure RF switch always parks at WLAN side */
76             OS_REG_WRITE(ah, AR_PHY_SWITCH_COM, HAL_BT_COEX_ANT_DIV_SWITCH_COM);
77             OS_REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0x60000000, 0xf0000000);
78         } else {
79             /* Disable antenna diversity. Use antenna A(LNA1) only */
80             ant_div_control1 = HAL_BT_COEX_ANTDIV_CONTROL1_FIXED_A;
81             ant_div_control2 = HAL_BT_COEX_ANTDIV_CONTROL2_FIXED_A;
82 
83             /* Disable BT ant to allow concurrent BT and WLAN receive */
84             ahp->ah_btCoexMode2 |= AR_BT_DISABLE_BT_ANT;
85             OS_REG_WRITE(ah, AR_BT_COEX_MODE2, ahp->ah_btCoexMode2);
86 
87             /* Program SWCOM talbe to make sure RF switch always parks at BT side */
88             OS_REG_WRITE(ah, AR_PHY_SWITCH_COM, 0);
89             OS_REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0, 0xf0000000);
90         }
91 
92         regVal = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL);
93         regVal &= (~(AR_PHY_9285_ANT_DIV_CTL_ALL));
94         /* Clear ant_fast_div_bias [14:9] since for Janus the main LNA is always LNA1. */
95         regVal &= (~(AR_PHY_9285_FAST_DIV_BIAS));
96 
97         regVal |= SM(ant_div_control1, AR_PHY_9285_ANT_DIV_CTL);
98         regVal |= SM(ant_div_control2, AR_PHY_9285_ANT_DIV_ALT_LNACONF);
99         regVal |= SM((ant_div_control2 >> 2), AR_PHY_9285_ANT_DIV_MAIN_LNACONF);
100         regVal |= SM((ant_div_control1 >> 1), AR_PHY_9285_ANT_DIV_ALT_GAINTB);
101         regVal |= SM((ant_div_control1 >> 2), AR_PHY_9285_ANT_DIV_MAIN_GAINTB);
102         OS_REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal);
103 
104         regVal = OS_REG_READ(ah, AR_PHY_CCK_DETECT);
105         regVal &= (~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
106         regVal |= SM((ant_div_control1 >> 3), AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
107         OS_REG_WRITE(ah, AR_PHY_CCK_DETECT, regVal);
108     }
109 }
110 
111 void
112 ar9285BTCoexSetParameter(struct ath_hal *ah, u_int32_t type, u_int32_t value)
113 {
114 	struct ath_hal_5416 *ahp = AH5416(ah);
115 
116 	switch (type) {
117 	case HAL_BT_COEX_ANTENNA_DIVERSITY:
118 		if (AR_SREV_KITE(ah)) {
119 			ahp->ah_btCoexFlag |= HAL_BT_COEX_FLAG_ANT_DIV_ALLOW;
120 			if (value)
121 				ahp->ah_btCoexFlag |=
122 				    HAL_BT_COEX_FLAG_ANT_DIV_ENABLE;
123 			else
124 				ahp->ah_btCoexFlag &=
125 				    ~HAL_BT_COEX_FLAG_ANT_DIV_ENABLE;
126 			ar9285BTCoexAntennaDiversity(ah);
127 		}
128 		break;
129 	default:
130 		ar5416BTCoexSetParameter(ah, type, value);
131 		break;
132 	}
133 }
134 
135 
136