1 /* 2 * Copyright (c) 2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 #include "ah_devid.h" 24 25 #include "ar5416/ar5416.h" 26 #include "ar5416/ar5416reg.h" 27 #include "ar5416/ar5416phy.h" 28 29 #include "ar9001/ar9160.ini" 30 31 static const HAL_PERCAL_DATA ar9160_iq_cal = { /* multi sample */ 32 .calName = "IQ", .calType = IQ_MISMATCH_CAL, 33 .calNumSamples = MAX_CAL_SAMPLES, 34 .calCountMax = PER_MIN_LOG_COUNT, 35 .calCollect = ar5416IQCalCollect, 36 .calPostProc = ar5416IQCalibration 37 }; 38 static const HAL_PERCAL_DATA ar9160_adc_gain_cal = { /* multi sample */ 39 .calName = "ADC Gain", .calType = ADC_GAIN_CAL, 40 .calNumSamples = MAX_CAL_SAMPLES, 41 .calCountMax = PER_MIN_LOG_COUNT, 42 .calCollect = ar5416AdcGainCalCollect, 43 .calPostProc = ar5416AdcGainCalibration 44 }; 45 static const HAL_PERCAL_DATA ar9160_adc_dc_cal = { /* multi sample */ 46 .calName = "ADC DC", .calType = ADC_DC_CAL, 47 .calNumSamples = MAX_CAL_SAMPLES, 48 .calCountMax = PER_MIN_LOG_COUNT, 49 .calCollect = ar5416AdcDcCalCollect, 50 .calPostProc = ar5416AdcDcCalibration 51 }; 52 static const HAL_PERCAL_DATA ar9160_adc_init_dc_cal = { 53 .calName = "ADC Init DC", .calType = ADC_DC_INIT_CAL, 54 .calNumSamples = MIN_CAL_SAMPLES, 55 .calCountMax = INIT_LOG_COUNT, 56 .calCollect = ar5416AdcDcCalCollect, 57 .calPostProc = ar5416AdcDcCalibration 58 }; 59 60 static HAL_BOOL ar9160FillCapabilityInfo(struct ath_hal *ah); 61 62 static void 63 ar9160AniSetup(struct ath_hal *ah) 64 { 65 static const struct ar5212AniParams aniparams = { 66 .maxNoiseImmunityLevel = 4, /* levels 0..4 */ 67 .totalSizeDesired = { -55, -55, -55, -55, -62 }, 68 .coarseHigh = { -14, -14, -14, -14, -12 }, 69 .coarseLow = { -64, -64, -64, -64, -70 }, 70 .firpwr = { -78, -78, -78, -78, -80 }, 71 .maxSpurImmunityLevel = 2, 72 .cycPwrThr1 = { 2, 4, 6 }, 73 .maxFirstepLevel = 2, /* levels 0..2 */ 74 .firstep = { 0, 4, 8 }, 75 .ofdmTrigHigh = 500, 76 .ofdmTrigLow = 200, 77 .cckTrigHigh = 200, 78 .cckTrigLow = 100, 79 .rssiThrHigh = 40, 80 .rssiThrLow = 7, 81 .period = 100, 82 }; 83 84 /* NB: disable ANI noise immmunity for reliable RIFS rx */ 85 AH5416(ah)->ah_ani_function &= ~(1 << HAL_ANI_NOISE_IMMUNITY_LEVEL); 86 ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE); 87 } 88 89 static void 90 ar9160InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan) 91 { 92 uint32_t pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV); 93 if (chan != AH_NULL) { 94 if (IEEE80211_IS_CHAN_HALF(chan)) 95 pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL); 96 else if (IEEE80211_IS_CHAN_QUARTER(chan)) 97 pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL); 98 99 if (IEEE80211_IS_CHAN_5GHZ(chan)) 100 pll |= SM(0x50, AR_RTC_SOWL_PLL_DIV); 101 else 102 pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV); 103 } else 104 pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV); 105 106 OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll); 107 OS_DELAY(RTC_PLL_SETTLE_DELAY); 108 OS_REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_SLEEP_DERIVED_CLK); 109 } 110 111 /* 112 * Attach for an AR9160 part. 113 */ 114 static struct ath_hal * 115 ar9160Attach(uint16_t devid, HAL_SOFTC sc, 116 HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, 117 HAL_STATUS *status) 118 { 119 struct ath_hal_5416 *ahp5416; 120 struct ath_hal_5212 *ahp; 121 struct ath_hal *ah; 122 uint32_t val; 123 HAL_STATUS ecode; 124 HAL_BOOL rfStatus; 125 126 HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n", 127 __func__, sc, (void*) st, (void*) sh); 128 129 /* NB: memory is returned zero'd */ 130 ahp5416 = ath_hal_malloc(sizeof (struct ath_hal_5416)); 131 if (ahp5416 == AH_NULL) { 132 HALDEBUG(AH_NULL, HAL_DEBUG_ANY, 133 "%s: cannot allocate memory for state block\n", __func__); 134 *status = HAL_ENOMEM; 135 return AH_NULL; 136 } 137 ar5416InitState(ahp5416, devid, sc, st, sh, status); 138 ahp = &ahp5416->ah_5212; 139 ah = &ahp->ah_priv.h; 140 141 /* XXX override with 9160 specific state */ 142 /* override 5416 methods for our needs */ 143 AH5416(ah)->ah_initPLL = ar9160InitPLL; 144 145 AH5416(ah)->ah_cal.iqCalData.calData = &ar9160_iq_cal; 146 AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9160_adc_gain_cal; 147 AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9160_adc_dc_cal; 148 AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9160_adc_init_dc_cal; 149 AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL; 150 151 if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) { 152 /* reset chip */ 153 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n", 154 __func__); 155 ecode = HAL_EIO; 156 goto bad; 157 } 158 159 if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) { 160 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n", 161 __func__); 162 ecode = HAL_EIO; 163 goto bad; 164 } 165 /* Read Revisions from Chips before taking out of reset */ 166 val = OS_REG_READ(ah, AR_SREV); 167 HALDEBUG(ah, HAL_DEBUG_ATTACH, 168 "%s: ID 0x%x VERSION 0x%x TYPE 0x%x REVISION 0x%x\n", 169 __func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION), 170 MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION)); 171 /* NB: include chip type to differentiate from pre-Sowl versions */ 172 AH_PRIVATE(ah)->ah_macVersion = 173 (val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S; 174 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION); 175 AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0; 176 177 /* setup common ini data; rf backends handle remainder */ 178 HAL_INI_INIT(&ahp->ah_ini_modes, ar9160Modes, 6); 179 HAL_INI_INIT(&ahp->ah_ini_common, ar9160Common, 2); 180 181 HAL_INI_INIT(&AH5416(ah)->ah_ini_bb_rfgain, ar9160BB_RfGain, 3); 182 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank0, ar9160Bank0, 2); 183 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank1, ar9160Bank1, 2); 184 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank2, ar9160Bank2, 2); 185 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank3, ar9160Bank3, 3); 186 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank6, ar9160Bank6, 3); 187 HAL_INI_INIT(&AH5416(ah)->ah_ini_bank7, ar9160Bank7, 2); 188 if (AR_SREV_SOWL_11(ah)) 189 HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac_1_1, 2); 190 else 191 HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac, 2); 192 193 ecode = ath_hal_v14EepromAttach(ah); 194 if (ecode != HAL_OK) 195 goto bad; 196 197 HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, ar9160PciePhy, 2); 198 ar5416AttachPCIE(ah); 199 200 if (!ar5416ChipReset(ah, AH_NULL)) { /* reset chip */ 201 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); 202 ecode = HAL_EIO; 203 goto bad; 204 } 205 206 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); 207 208 if (!ar5212ChipTest(ah)) { 209 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", 210 __func__); 211 ecode = HAL_ESELFTEST; 212 goto bad; 213 } 214 215 /* 216 * Set correct Baseband to analog shift 217 * setting to access analog chips. 218 */ 219 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); 220 221 /* Read Radio Chip Rev Extract */ 222 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah); 223 switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) { 224 case AR_RAD2133_SREV_MAJOR: /* Sowl: 2G/3x3 */ 225 case AR_RAD5133_SREV_MAJOR: /* Sowl: 2+5G/3x3 */ 226 break; 227 default: 228 if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) { 229 AH_PRIVATE(ah)->ah_analog5GhzRev = 230 AR_RAD5133_SREV_MAJOR; 231 break; 232 } 233 #ifdef AH_DEBUG 234 HALDEBUG(ah, HAL_DEBUG_ANY, 235 "%s: 5G Radio Chip Rev 0x%02X is not supported by " 236 "this driver\n", __func__, 237 AH_PRIVATE(ah)->ah_analog5GhzRev); 238 ecode = HAL_ENOTSUPP; 239 goto bad; 240 #endif 241 } 242 rfStatus = ar2133RfAttach(ah, &ecode); 243 if (!rfStatus) { 244 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n", 245 __func__, ecode); 246 goto bad; 247 } 248 249 /* 250 * Got everything we need now to setup the capabilities. 251 */ 252 if (!ar9160FillCapabilityInfo(ah)) { 253 ecode = HAL_EEREAD; 254 goto bad; 255 } 256 257 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); 258 if (ecode != HAL_OK) { 259 HALDEBUG(ah, HAL_DEBUG_ANY, 260 "%s: error getting mac address from EEPROM\n", __func__); 261 goto bad; 262 } 263 /* XXX How about the serial number ? */ 264 /* Read Reg Domain */ 265 AH_PRIVATE(ah)->ah_currentRD = 266 ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL); 267 AH_PRIVATE(ah)->ah_currentRDext = 268 ath_hal_eepromGet(ah, AR_EEP_REGDMN_1, AH_NULL); 269 270 /* 271 * ah_miscMode is populated by ar5416FillCapabilityInfo() 272 * starting from griffin. Set here to make sure that 273 * AR_MISC_MODE_MIC_NEW_LOC_ENABLE is set before a GTK is 274 * placed into hardware. 275 */ 276 if (ahp->ah_miscMode != 0) 277 OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); 278 279 ar9160AniSetup(ah); /* Anti Noise Immunity */ 280 281 /* This just uses the AR5416 NF values */ 282 AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ; 283 AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ; 284 AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_5416_2GHZ; 285 AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ; 286 AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ; 287 AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ; 288 289 ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist); 290 291 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); 292 293 return ah; 294 bad: 295 if (ahp) 296 ar5416Detach((struct ath_hal *) ahp); 297 if (status) 298 *status = ecode; 299 return AH_NULL; 300 } 301 302 /* 303 * Fill all software cached or static hardware state information. 304 * Return failure if capabilities are to come from EEPROM and 305 * cannot be read. 306 */ 307 static HAL_BOOL 308 ar9160FillCapabilityInfo(struct ath_hal *ah) 309 { 310 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; 311 312 if (!ar5416FillCapabilityInfo(ah)) 313 return AH_FALSE; 314 pCap->halCSTSupport = AH_TRUE; 315 pCap->halRifsRxSupport = AH_TRUE; 316 pCap->halRifsTxSupport = AH_TRUE; 317 pCap->halRtsAggrLimit = 64*1024; /* 802.11n max */ 318 pCap->halExtChanDfsSupport = AH_TRUE; 319 pCap->halUseCombinedRadarRssi = AH_TRUE; 320 pCap->halAutoSleepSupport = AH_FALSE; /* XXX? */ 321 pCap->halMbssidAggrSupport = AH_TRUE; 322 pCap->hal4AddrAggrSupport = AH_TRUE; 323 /* BB Read WAR */ 324 pCap->halHasBBReadWar = AH_TRUE; 325 326 /* AR9160 is a 2x2 stream device */ 327 pCap->halTxStreams = 2; 328 pCap->halRxStreams = 2; 329 330 return AH_TRUE; 331 } 332 333 static const char* 334 ar9160Probe(uint16_t vendorid, uint16_t devid) 335 { 336 if (vendorid == ATHEROS_VENDOR_ID && devid == AR9160_DEVID_PCI) 337 return "Atheros 9160"; 338 return AH_NULL; 339 } 340 AH_CHIP(AR9160, ar9160Probe, ar9160Attach); 341