1 /* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 #include "ah_devid.h" 24 25 #include "ar5416/ar5416.h" 26 #include "ar5416/ar5416reg.h" 27 #include "ar5416/ar5416phy.h" 28 29 /* Adc DC Offset Cal aliases */ 30 #define totalAdcDcOffsetIOddPhase(i) caldata[0][i].s 31 #define totalAdcDcOffsetIEvenPhase(i) caldata[1][i].s 32 #define totalAdcDcOffsetQOddPhase(i) caldata[2][i].s 33 #define totalAdcDcOffsetQEvenPhase(i) caldata[3][i].s 34 35 void 36 ar5416AdcDcCalCollect(struct ath_hal *ah) 37 { 38 struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; 39 int i; 40 41 for (i = 0; i < AR5416_MAX_CHAINS; i++) { 42 cal->totalAdcDcOffsetIOddPhase(i) += (int32_t) 43 OS_REG_READ(ah, AR_PHY_CAL_MEAS_0(i)); 44 cal->totalAdcDcOffsetIEvenPhase(i) += (int32_t) 45 OS_REG_READ(ah, AR_PHY_CAL_MEAS_1(i)); 46 cal->totalAdcDcOffsetQOddPhase(i) += (int32_t) 47 OS_REG_READ(ah, AR_PHY_CAL_MEAS_2(i)); 48 cal->totalAdcDcOffsetQEvenPhase(i) += (int32_t) 49 OS_REG_READ(ah, AR_PHY_CAL_MEAS_3(i)); 50 51 HALDEBUG(ah, HAL_DEBUG_PERCAL, 52 "%d: Chn %d oddi=0x%08x; eveni=0x%08x; oddq=0x%08x; evenq=0x%08x;\n", 53 cal->calSamples, i, 54 cal->totalAdcDcOffsetIOddPhase(i), 55 cal->totalAdcDcOffsetIEvenPhase(i), 56 cal->totalAdcDcOffsetQOddPhase(i), 57 cal->totalAdcDcOffsetQEvenPhase(i)); 58 } 59 } 60 61 void 62 ar5416AdcDcCalibration(struct ath_hal *ah, uint8_t numChains) 63 { 64 struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; 65 const HAL_PERCAL_DATA *calData = cal->cal_curr->calData; 66 uint32_t numSamples; 67 int i; 68 69 numSamples = (1 << (calData->calCountMax + 5)) * calData->calNumSamples; 70 for (i = 0; i < numChains; i++) { 71 uint32_t iOddMeasOffset = cal->totalAdcDcOffsetIOddPhase(i); 72 uint32_t iEvenMeasOffset = cal->totalAdcDcOffsetIEvenPhase(i); 73 int32_t qOddMeasOffset = cal->totalAdcDcOffsetQOddPhase(i); 74 int32_t qEvenMeasOffset = cal->totalAdcDcOffsetQEvenPhase(i); 75 int32_t qDcMismatch, iDcMismatch; 76 uint32_t val; 77 78 HALDEBUG(ah, HAL_DEBUG_PERCAL, 79 "Starting ADC DC Offset Cal for Chain %d\n", i); 80 81 HALDEBUG(ah, HAL_DEBUG_PERCAL, " pwr_meas_odd_i = %d\n", 82 iOddMeasOffset); 83 HALDEBUG(ah, HAL_DEBUG_PERCAL, " pwr_meas_even_i = %d\n", 84 iEvenMeasOffset); 85 HALDEBUG(ah, HAL_DEBUG_PERCAL, " pwr_meas_odd_q = %d\n", 86 qOddMeasOffset); 87 HALDEBUG(ah, HAL_DEBUG_PERCAL, " pwr_meas_even_q = %d\n", 88 qEvenMeasOffset); 89 90 HALASSERT(numSamples); 91 92 iDcMismatch = (((iEvenMeasOffset - iOddMeasOffset) * 2) / 93 numSamples) & 0x1ff; 94 qDcMismatch = (((qOddMeasOffset - qEvenMeasOffset) * 2) / 95 numSamples) & 0x1ff; 96 HALDEBUG(ah, HAL_DEBUG_PERCAL, 97 " dc_offset_mismatch_i = 0x%08x\n", iDcMismatch); 98 HALDEBUG(ah, HAL_DEBUG_PERCAL, 99 " dc_offset_mismatch_q = 0x%08x\n", qDcMismatch); 100 101 val = OS_REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i)); 102 val &= 0xc0000fff; 103 val |= (qDcMismatch << 12) | (iDcMismatch << 21); 104 OS_REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val); 105 106 HALDEBUG(ah, HAL_DEBUG_PERCAL, 107 "ADC DC Offset Cal done for Chain %d\n", i); 108 } 109 OS_REG_SET_BIT(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0), 110 AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE); 111 } 112