xref: /freebsd/sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf)
1 /*-
2  * SPDX-License-Identifier: ISC
3  *
4  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5  * Copyright (c) 2002-2008 Atheros Communications, Inc.
6  *
7  * Permission to use, copy, modify, and/or distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 #include "opt_ah.h"
20 
21 #include "ah.h"
22 #include "ah_internal.h"
23 
24 #include "ar5416/ar5416.h"
25 #include "ar5416/ar5416reg.h"
26 #include "ar5416/ar5416phy.h"
27 
28 #define TU_TO_USEC(_tu)		((_tu) << 10)
29 #define	ONE_EIGHTH_TU_TO_USEC(_tu8)	((_tu8) << 7)
30 
31 /*
32  * Return the hardware NextTBTT in TSF
33  */
34 uint64_t
35 ar5416GetNextTBTT(struct ath_hal *ah)
36 {
37 	return OS_REG_READ(ah, AR_NEXT_TBTT);
38 }
39 
40 /*
41  * Initialize all of the hardware registers used to
42  * send beacons.  Note that for station operation the
43  * driver calls ar5416SetStaBeaconTimers instead.
44  */
45 void
46 ar5416SetBeaconTimers(struct ath_hal *ah, const HAL_BEACON_TIMERS *bt)
47 {
48 	uint32_t bperiod;
49 	struct ath_hal_5212 *ahp = AH5212(ah);
50 
51 	OS_REG_WRITE(ah, AR_NEXT_TBTT, TU_TO_USEC(bt->bt_nexttbtt));
52 	OS_REG_WRITE(ah, AR_NEXT_DBA, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextdba));
53 	OS_REG_WRITE(ah, AR_NEXT_SWBA, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextswba));
54 	OS_REG_WRITE(ah, AR_NEXT_NDP, TU_TO_USEC(bt->bt_nextatim));
55 
56 	bperiod = TU_TO_USEC(bt->bt_intval & HAL_BEACON_PERIOD);
57 	ahp->ah_beaconInterval = bt->bt_intval & HAL_BEACON_PERIOD;
58 	OS_REG_WRITE(ah, AR5416_BEACON_PERIOD, bperiod);
59 	OS_REG_WRITE(ah, AR_DBA_PERIOD, bperiod);
60 	OS_REG_WRITE(ah, AR_SWBA_PERIOD, bperiod);
61 	OS_REG_WRITE(ah, AR_NDP_PERIOD, bperiod);
62 
63 	/*
64 	 * Reset TSF if required.
65 	 */
66 	if (bt->bt_intval & AR_BEACON_RESET_TSF)
67 		ar5416ResetTsf(ah);
68 
69 	/* enable timers */
70 	/* NB: flags == 0 handled specially for backwards compatibility */
71 	OS_REG_SET_BIT(ah, AR_TIMER_MODE,
72 	    bt->bt_flags != 0 ? bt->bt_flags :
73 		AR_TIMER_MODE_TBTT | AR_TIMER_MODE_DBA | AR_TIMER_MODE_SWBA);
74 }
75 
76 /*
77  * Initializes all of the hardware registers used to
78  * send beacons.  Note that for station operation the
79  * driver calls ar5212SetStaBeaconTimers instead.
80  */
81 void
82 ar5416BeaconInit(struct ath_hal *ah,
83 	uint32_t next_beacon, uint32_t beacon_period)
84 {
85 	HAL_BEACON_TIMERS bt;
86 
87 	bt.bt_nexttbtt = next_beacon;
88 	/*
89 	 * TIMER1: in AP/adhoc mode this controls the DMA beacon
90 	 * alert timer; otherwise it controls the next wakeup time.
91 	 * TIMER2: in AP mode, it controls the SBA beacon alert
92 	 * interrupt; otherwise it sets the start of the next CFP.
93 	 */
94 	bt.bt_flags = 0;
95 	switch (AH_PRIVATE(ah)->ah_opmode) {
96 	case HAL_M_STA:
97 	case HAL_M_MONITOR:
98 		bt.bt_nextdba = 0xffff;
99 		bt.bt_nextswba = 0x7ffff;
100 		bt.bt_flags |= AR_TIMER_MODE_TBTT;
101 		break;
102 	case HAL_M_IBSS:
103 		OS_REG_SET_BIT(ah, AR_TXCFG, AR_TXCFG_ATIM_TXPOLICY);
104 		bt.bt_flags |= AR_TIMER_MODE_NDP;
105 		/* fall thru... */
106 	case HAL_M_HOSTAP:
107 		bt.bt_nextdba = (next_beacon -
108 		    ah->ah_config.ah_dma_beacon_response_time) << 3;	/* 1/8 TU */
109 		bt.bt_nextswba = (next_beacon -
110 		    ah->ah_config.ah_sw_beacon_response_time) << 3;	/* 1/8 TU */
111 		bt.bt_flags |= AR_TIMER_MODE_TBTT
112 			    |  AR_TIMER_MODE_DBA
113 			    |  AR_TIMER_MODE_SWBA;
114 		break;
115 	}
116 	/*
117 	 * Set the ATIM window
118 	 * Our hardware does not support an ATIM window of 0
119 	 * (beacons will not work).  If the ATIM windows is 0,
120 	 * force it to 1.
121 	 */
122 	bt.bt_nextatim = next_beacon + 1;
123 	bt.bt_intval = beacon_period &
124 		(AR_BEACON_PERIOD | AR_BEACON_RESET_TSF | AR_BEACON_EN);
125 	ar5416SetBeaconTimers(ah, &bt);
126 }
127 
128 #define AR_BEACON_PERIOD_MAX	0xffff
129 
130 void
131 ar5416ResetStaBeaconTimers(struct ath_hal *ah)
132 {
133 	uint32_t val;
134 
135 	OS_REG_WRITE(ah, AR_NEXT_TBTT, 0);		/* no beacons */
136 	val = OS_REG_READ(ah, AR_STA_ID1);
137 	val |= AR_STA_ID1_PWR_SAV;		/* XXX */
138 	/* tell the h/w that the associated AP is not PCF capable */
139 	OS_REG_WRITE(ah, AR_STA_ID1,
140 		val & ~(AR_STA_ID1_USE_DEFANT | AR_STA_ID1_PCF));
141 	OS_REG_WRITE(ah, AR5416_BEACON_PERIOD, AR_BEACON_PERIOD_MAX);
142 	OS_REG_WRITE(ah, AR_DBA_PERIOD, AR_BEACON_PERIOD_MAX);
143 }
144 
145 /*
146  * Set all the beacon related bits on the h/w for stations
147  * i.e. initializes the corresponding h/w timers;
148  * also tells the h/w whether to anticipate PCF beacons
149  */
150 void
151 ar5416SetStaBeaconTimers(struct ath_hal *ah, const HAL_BEACON_STATE *bs)
152 {
153 	uint32_t nextTbtt, nextdtim,beaconintval, dtimperiod;
154 
155 	HALASSERT(bs->bs_intval != 0);
156 
157 	/* NB: no cfp setting since h/w automatically takes care */
158 
159 	OS_REG_WRITE(ah, AR_NEXT_TBTT, TU_TO_USEC(bs->bs_nexttbtt));
160 
161 	/*
162 	 * Start the beacon timers by setting the BEACON register
163 	 * to the beacon interval; no need to write tim offset since
164 	 * h/w parses IEs.
165 	 */
166 	OS_REG_WRITE(ah, AR5416_BEACON_PERIOD,
167 			 TU_TO_USEC(bs->bs_intval & HAL_BEACON_PERIOD));
168 	OS_REG_WRITE(ah, AR_DBA_PERIOD,
169 			 TU_TO_USEC(bs->bs_intval & HAL_BEACON_PERIOD));
170 
171 	/*
172 	 * Configure the BMISS interrupt.  Note that we
173 	 * assume the caller blocks interrupts while enabling
174 	 * the threshold.
175 	 */
176 	HALASSERT(bs->bs_bmissthreshold <=
177 		(AR_RSSI_THR_BM_THR >> AR_RSSI_THR_BM_THR_S));
178 	OS_REG_RMW_FIELD(ah, AR_RSSI_THR,
179 		AR_RSSI_THR_BM_THR, bs->bs_bmissthreshold);
180 
181 	/*
182 	 * Program the sleep registers to correlate with the beacon setup.
183 	 */
184 
185 	/*
186 	 * Oahu beacons timers on the station were used for power
187 	 * save operation (waking up in anticipation of a beacon)
188 	 * and any CFP function; Venice does sleep/power-save timers
189 	 * differently - so this is the right place to set them up;
190 	 * don't think the beacon timers are used by venice sta hw
191 	 * for any useful purpose anymore
192 	 * Setup venice's sleep related timers
193 	 * Current implementation assumes sw processing of beacons -
194 	 *   assuming an interrupt is generated every beacon which
195 	 *   causes the hardware to become awake until the sw tells
196 	 *   it to go to sleep again; beacon timeout is to allow for
197 	 *   beacon jitter; cab timeout is max time to wait for cab
198 	 *   after seeing the last DTIM or MORE CAB bit
199 	 */
200 
201 /*
202  * I've bumped these to 30TU for now.
203  *
204  * Some APs (AR933x/AR934x?) in 2GHz especially seem to not always
205  * transmit beacon frames at exactly the right times and with it set
206  * to 10TU, the NIC starts not waking up at the right times to hear
207  * these slightly-larger-jitering beacons.  It also never recovers
208  * from that (it doesn't resync? I'm not sure.)
209  *
210  * So for now bump this to 30TU.  Ideally we'd cap this based on
211  * the beacon interval so the sum of CAB+BEACON timeouts never
212  * exceeded the beacon interval.
213  *
214  * Now, since we're doing all the math in the ath(4) driver in TU
215  * rather than TSF, we may be seeing the result of dumb rounding
216  * errors causing the jitter to actually be a much bigger problem.
217  * I'll have to investigate that with a fine tooth comb.
218  */
219 #define CAB_TIMEOUT_VAL     10 /* in TU */
220 #define BEACON_TIMEOUT_VAL  10 /* in TU */
221 #define SLEEP_SLOP          3  /* in TU */
222 
223 	/*
224 	 * For max powersave mode we may want to sleep for longer than a
225 	 * beacon period and not want to receive all beacons; modify the
226 	 * timers accordingly; make sure to align the next TIM to the
227 	 * next DTIM if we decide to wake for DTIMs only
228 	 */
229 	beaconintval = bs->bs_intval & HAL_BEACON_PERIOD;
230 	HALASSERT(beaconintval != 0);
231 	if (bs->bs_sleepduration > beaconintval) {
232 		HALASSERT(roundup(bs->bs_sleepduration, beaconintval) ==
233 				bs->bs_sleepduration);
234 		beaconintval = bs->bs_sleepduration;
235 	}
236 	dtimperiod = bs->bs_dtimperiod;
237 	if (bs->bs_sleepduration > dtimperiod) {
238 		HALASSERT(dtimperiod == 0 ||
239 			roundup(bs->bs_sleepduration, dtimperiod) ==
240 				bs->bs_sleepduration);
241 		dtimperiod = bs->bs_sleepduration;
242 	}
243 	HALASSERT(beaconintval <= dtimperiod);
244 	if (beaconintval == dtimperiod)
245 		nextTbtt = bs->bs_nextdtim;
246 	else
247 		nextTbtt = bs->bs_nexttbtt;
248 	nextdtim = bs->bs_nextdtim;
249 
250 	OS_REG_WRITE(ah, AR_NEXT_DTIM,
251 		TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP));
252 	OS_REG_WRITE(ah, AR_NEXT_TIM, TU_TO_USEC(nextTbtt - SLEEP_SLOP));
253 
254 	/* cab timeout is now in 1/8 TU */
255 	OS_REG_WRITE(ah, AR5416_SLEEP1,
256 		SM((CAB_TIMEOUT_VAL << 3), AR5416_SLEEP1_CAB_TIMEOUT)
257 		| AR5416_SLEEP1_ASSUME_DTIM);
258 
259 	/* XXX autosleep? Use min beacon timeout; check ath9k -adrian */
260 	/* beacon timeout is now in 1/8 TU */
261 	OS_REG_WRITE(ah, AR5416_SLEEP2,
262 		SM((BEACON_TIMEOUT_VAL << 3), AR5416_SLEEP2_BEACON_TIMEOUT));
263 
264 	/* TIM_PERIOD and DTIM_PERIOD are now in uS. */
265 	OS_REG_WRITE(ah, AR_TIM_PERIOD, TU_TO_USEC(beaconintval));
266 	OS_REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod));
267 
268 	OS_REG_SET_BIT(ah, AR_TIMER_MODE,
269 	     AR_TIMER_MODE_TBTT | AR_TIMER_MODE_TIM | AR_TIMER_MODE_DTIM);
270 
271 #define	HAL_TSFOOR_THRESHOLD	0x00004240 /* TSF OOR threshold (16k us) */
272 
273 	/* TSF out of range threshold */
274 //	OS_REG_WRITE(ah, AR_TSFOOR_THRESHOLD, bs->bs_tsfoor_threshold);
275 	OS_REG_WRITE(ah, AR_TSFOOR_THRESHOLD, HAL_TSFOOR_THRESHOLD);
276 
277 	HALDEBUG(ah, HAL_DEBUG_BEACON, "%s: next DTIM %d\n",
278 	    __func__, bs->bs_nextdtim);
279 	HALDEBUG(ah, HAL_DEBUG_BEACON, "%s: next beacon %d\n",
280 	    __func__, nextTbtt);
281 	HALDEBUG(ah, HAL_DEBUG_BEACON, "%s: beacon period %d\n",
282 	    __func__, beaconintval);
283 	HALDEBUG(ah, HAL_DEBUG_BEACON, "%s: DTIM period %d\n",
284 	    __func__, dtimperiod);
285 #undef CAB_TIMEOUT_VAL
286 #undef BEACON_TIMEOUT_VAL
287 #undef SLEEP_SLOP
288 }
289