1 /* 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #ifndef _ATH_AR5416_H_ 20 #define _ATH_AR5416_H_ 21 22 #include "ar5212/ar5212.h" 23 #include "ar5416_cal.h" 24 #include "ah_eeprom_v14.h" /* for CAL_TARGET_POWER_* */ 25 26 #define AR5416_MAGIC 0x20065416 27 28 enum { 29 HAL_RESET_POWER_ON, 30 HAL_RESET_WARM, 31 HAL_RESET_COLD, 32 }; 33 34 typedef struct { 35 uint16_t synth_center; 36 uint16_t ctl_center; 37 uint16_t ext_center; 38 } CHAN_CENTERS; 39 40 typedef enum Ar5416_Rates { 41 rate6mb, rate9mb, rate12mb, rate18mb, 42 rate24mb, rate36mb, rate48mb, rate54mb, 43 rate1l, rate2l, rate2s, rate5_5l, 44 rate5_5s, rate11l, rate11s, rateXr, 45 rateHt20_0, rateHt20_1, rateHt20_2, rateHt20_3, 46 rateHt20_4, rateHt20_5, rateHt20_6, rateHt20_7, 47 rateHt40_0, rateHt40_1, rateHt40_2, rateHt40_3, 48 rateHt40_4, rateHt40_5, rateHt40_6, rateHt40_7, 49 rateDupCck, rateDupOfdm, rateExtCck, rateExtOfdm, 50 Ar5416RateSize 51 } AR5416_RATES; 52 53 #define AR5416_DEFAULT_RXCHAINMASK 7 54 #define AR5416_DEFAULT_TXCHAINMASK 1 55 #define AR5416_MAX_RATE_POWER 63 56 #define AR5416_KEYTABLE_SIZE 128 57 58 #define AR5416_CCA_MAX_GOOD_VALUE -85 59 #define AR5416_CCA_MAX_HIGH_VALUE -62 60 #define AR5416_CCA_MIN_BAD_VALUE -140 61 #define AR9285_CCA_MAX_GOOD_VALUE -118 62 63 #define AR5416_SPUR_RSSI_THRESH 40 64 65 struct ar5416NfLimits { 66 int16_t max; 67 int16_t min; 68 int16_t nominal; 69 }; 70 71 struct ath_hal_5416 { 72 struct ath_hal_5212 ah_5212; 73 74 /* NB: RF data setup at attach */ 75 HAL_INI_ARRAY ah_ini_bb_rfgain; 76 HAL_INI_ARRAY ah_ini_bank0; 77 HAL_INI_ARRAY ah_ini_bank1; 78 HAL_INI_ARRAY ah_ini_bank2; 79 HAL_INI_ARRAY ah_ini_bank3; 80 HAL_INI_ARRAY ah_ini_bank6; 81 HAL_INI_ARRAY ah_ini_bank7; 82 HAL_INI_ARRAY ah_ini_addac; 83 HAL_INI_ARRAY ah_ini_pcieserdes; 84 85 void (*ah_writeIni)(struct ath_hal *, 86 const struct ieee80211_channel *); 87 void (*ah_spurMitigate)(struct ath_hal *, 88 const struct ieee80211_channel *); 89 90 /* calibration ops */ 91 HAL_BOOL (*ah_cal_initcal)(struct ath_hal *, 92 const struct ieee80211_channel *); 93 void (*ah_cal_pacal)(struct ath_hal *, 94 HAL_BOOL is_reset); 95 96 /* optional open-loop tx power control related methods */ 97 void (*ah_olcInit)(struct ath_hal *); 98 void (*ah_olcTempCompensation)(struct ath_hal *); 99 100 /* tx power control */ 101 HAL_BOOL (*ah_setPowerCalTable) (struct ath_hal *ah, 102 struct ar5416eeprom *pEepData, 103 const struct ieee80211_channel *chan, 104 int16_t *pTxPowerIndexOffset); 105 106 /* baseband operations */ 107 void (*ah_initPLL) (struct ath_hal *ah, 108 const struct ieee80211_channel *chan); 109 110 u_int ah_globaltxtimeout; /* global tx timeout */ 111 u_int ah_gpioMask; 112 int ah_hangs; /* h/w hangs state */ 113 uint8_t ah_keytype[AR5416_KEYTABLE_SIZE]; 114 /* 115 * Primary/Extension Channel Tx, Rx, Rx Clear State 116 */ 117 uint32_t ah_cycleCount; 118 uint32_t ah_ctlBusy; 119 uint32_t ah_extBusy; 120 uint32_t ah_rxBusy; 121 uint32_t ah_txBusy; 122 uint32_t ah_rx_chainmask; 123 uint32_t ah_tx_chainmask; 124 125 HAL_ANI_CMD ah_ani_function; 126 127 struct ar5416PerCal ah_cal; /* periodic calibration state */ 128 129 struct ar5416NfLimits nf_2g; 130 struct ar5416NfLimits nf_5g; 131 132 int initPDADC; 133 134 int ah_need_an_top2_fixup; /* merlin or later chips that may need this workaround */ 135 }; 136 #define AH5416(_ah) ((struct ath_hal_5416 *)(_ah)) 137 138 #define IS_5416_PCI(ah) ((AH_PRIVATE(ah)->ah_macVersion) == AR_SREV_VERSION_OWL_PCI) 139 #define IS_5416_PCIE(ah) ((AH_PRIVATE(ah)->ah_macVersion) == AR_SREV_VERSION_OWL_PCIE) 140 #undef IS_PCIE 141 #define IS_PCIE(ah) (IS_5416_PCIE(ah)) 142 143 extern HAL_BOOL ar2133RfAttach(struct ath_hal *, HAL_STATUS *); 144 145 struct ath_hal; 146 147 extern uint32_t ar5416GetRadioRev(struct ath_hal *ah); 148 extern void ar5416InitState(struct ath_hal_5416 *, uint16_t devid, 149 HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, 150 HAL_STATUS *status); 151 extern void ar5416Detach(struct ath_hal *ah); 152 extern void ar5416AttachPCIE(struct ath_hal *ah); 153 extern HAL_BOOL ar5416FillCapabilityInfo(struct ath_hal *ah); 154 155 extern void ar5416AniAttach(struct ath_hal *, const struct ar5212AniParams *, 156 const struct ar5212AniParams *, HAL_BOOL ena); 157 extern void ar5416AniDetach(struct ath_hal *); 158 extern HAL_BOOL ar5416AniControl(struct ath_hal *, HAL_ANI_CMD cmd, int param); 159 extern HAL_BOOL ar5416AniSetParams(struct ath_hal *, 160 const struct ar5212AniParams *, const struct ar5212AniParams *); 161 extern void ar5416ProcessMibIntr(struct ath_hal *, const HAL_NODE_STATS *); 162 extern void ar5416RxMonitor(struct ath_hal *, const HAL_NODE_STATS *, 163 const struct ieee80211_channel *); 164 extern void ar5416AniPoll(struct ath_hal *, const struct ieee80211_channel *); 165 extern void ar5416AniReset(struct ath_hal *, const struct ieee80211_channel *, 166 HAL_OPMODE, int); 167 168 extern void ar5416SetBeaconTimers(struct ath_hal *, const HAL_BEACON_TIMERS *); 169 extern void ar5416BeaconInit(struct ath_hal *ah, 170 uint32_t next_beacon, uint32_t beacon_period); 171 extern void ar5416ResetStaBeaconTimers(struct ath_hal *ah); 172 extern void ar5416SetStaBeaconTimers(struct ath_hal *ah, 173 const HAL_BEACON_STATE *); 174 extern uint64_t ar5416GetNextTBTT(struct ath_hal *); 175 176 extern HAL_BOOL ar5416EepromRead(struct ath_hal *, u_int off, uint16_t *data); 177 extern HAL_BOOL ar5416EepromWrite(struct ath_hal *, u_int off, uint16_t data); 178 179 extern HAL_BOOL ar5416IsInterruptPending(struct ath_hal *ah); 180 extern HAL_BOOL ar5416GetPendingInterrupts(struct ath_hal *, HAL_INT *masked); 181 extern HAL_INT ar5416SetInterrupts(struct ath_hal *ah, HAL_INT ints); 182 183 extern HAL_BOOL ar5416GpioCfgOutput(struct ath_hal *, uint32_t gpio, 184 HAL_GPIO_MUX_TYPE); 185 extern HAL_BOOL ar5416GpioCfgInput(struct ath_hal *, uint32_t gpio); 186 extern HAL_BOOL ar5416GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val); 187 extern uint32_t ar5416GpioGet(struct ath_hal *ah, uint32_t gpio); 188 extern void ar5416GpioSetIntr(struct ath_hal *ah, u_int, uint32_t ilevel); 189 190 extern u_int ar5416GetWirelessModes(struct ath_hal *ah); 191 extern void ar5416SetLedState(struct ath_hal *ah, HAL_LED_STATE state); 192 extern uint64_t ar5416GetTsf64(struct ath_hal *ah); 193 extern void ar5416SetTsf64(struct ath_hal *ah, uint64_t tsf64); 194 extern void ar5416ResetTsf(struct ath_hal *ah); 195 extern uint32_t ar5416GetCurRssi(struct ath_hal *ah); 196 extern HAL_BOOL ar5416SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING); 197 extern HAL_BOOL ar5416SetDecompMask(struct ath_hal *, uint16_t, int); 198 extern void ar5416SetCoverageClass(struct ath_hal *, uint8_t, int); 199 extern uint32_t ar5416GetMibCycleCountsPct(struct ath_hal *ah, 200 uint32_t *rxc_pcnt, uint32_t *rxextc_pcnt, uint32_t *rxf_pcnt, 201 uint32_t *txf_pcnt); 202 extern uint32_t ar5416Get11nExtBusy(struct ath_hal *ah); 203 extern void ar5416Set11nMac2040(struct ath_hal *ah, HAL_HT_MACMODE mode); 204 extern HAL_HT_RXCLEAR ar5416Get11nRxClear(struct ath_hal *ah); 205 extern void ar5416Set11nRxClear(struct ath_hal *ah, HAL_HT_RXCLEAR rxclear); 206 extern HAL_STATUS ar5416SetQuiet(struct ath_hal *ah, uint32_t period, 207 uint32_t duration, uint32_t nextStart, HAL_QUIET_FLAG flag); 208 extern HAL_STATUS ar5416GetCapability(struct ath_hal *ah, 209 HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t *result); 210 extern HAL_BOOL ar5416SetCapability(struct ath_hal *ah, 211 HAL_CAPABILITY_TYPE type, uint32_t capability, uint32_t val, 212 HAL_STATUS *status); 213 extern HAL_BOOL ar5416GetDiagState(struct ath_hal *ah, int request, 214 const void *args, uint32_t argsize, 215 void **result, uint32_t *resultsize); 216 extern HAL_BOOL ar5416SetRifsDelay(struct ath_hal *ah, 217 const struct ieee80211_channel *chan, HAL_BOOL enable); 218 219 extern void ar5416EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe); 220 extern void ar5416GetDfsThresh(struct ath_hal *ah, HAL_PHYERR_PARAM *pe); 221 extern HAL_BOOL ar5416ProcessRadarEvent(struct ath_hal *ah, 222 struct ath_rx_status *rxs, uint64_t fulltsf, const char *buf, 223 HAL_DFS_EVENT *event); 224 extern HAL_BOOL ar5416IsFastClockEnabled(struct ath_hal *ah); 225 226 extern HAL_BOOL ar5416SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, 227 int setChip); 228 extern HAL_POWER_MODE ar5416GetPowerMode(struct ath_hal *ah); 229 extern HAL_BOOL ar5416GetPowerStatus(struct ath_hal *ah); 230 231 extern HAL_BOOL ar5416ResetKeyCacheEntry(struct ath_hal *ah, uint16_t entry); 232 extern HAL_BOOL ar5416SetKeyCacheEntry(struct ath_hal *ah, uint16_t entry, 233 const HAL_KEYVAL *k, const uint8_t *mac, int xorKey); 234 235 extern uint32_t ar5416GetRxFilter(struct ath_hal *ah); 236 extern void ar5416SetRxFilter(struct ath_hal *ah, uint32_t bits); 237 extern void ar5416StartPcuReceive(struct ath_hal *ah); 238 extern void ar5416StopPcuReceive(struct ath_hal *ah); 239 extern HAL_BOOL ar5416SetupRxDesc(struct ath_hal *, 240 struct ath_desc *, uint32_t size, u_int flags); 241 extern HAL_STATUS ar5416ProcRxDesc(struct ath_hal *ah, struct ath_desc *, 242 uint32_t, struct ath_desc *, uint64_t, 243 struct ath_rx_status *); 244 245 extern HAL_BOOL ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, 246 struct ieee80211_channel *chan, 247 HAL_BOOL bChannelChange, HAL_STATUS *status); 248 extern HAL_BOOL ar5416PhyDisable(struct ath_hal *ah); 249 extern HAL_RFGAIN ar5416GetRfgain(struct ath_hal *ah); 250 extern HAL_BOOL ar5416Disable(struct ath_hal *ah); 251 extern HAL_BOOL ar5416ChipReset(struct ath_hal *ah, 252 const struct ieee80211_channel *); 253 extern int ar5416GetRegChainOffset(struct ath_hal *ah, int i); 254 extern HAL_BOOL ar5416SetBoardValues(struct ath_hal *, 255 const struct ieee80211_channel *); 256 extern HAL_BOOL ar5416SetResetReg(struct ath_hal *, uint32_t type); 257 extern HAL_BOOL ar5416SetTxPowerLimit(struct ath_hal *ah, uint32_t limit); 258 extern HAL_BOOL ar5416SetTransmitPower(struct ath_hal *, 259 const struct ieee80211_channel *, uint16_t *); 260 extern HAL_BOOL ar5416GetChipPowerLimits(struct ath_hal *ah, 261 struct ieee80211_channel *chan); 262 extern void ar5416GetChannelCenters(struct ath_hal *, 263 const struct ieee80211_channel *chan, CHAN_CENTERS *centers); 264 extern void ar5416SetRatesArrayFromTargetPower(struct ath_hal *ah, 265 const struct ieee80211_channel *chan, 266 int16_t *ratesArray, 267 const CAL_TARGET_POWER_LEG *targetPowerCck, 268 const CAL_TARGET_POWER_LEG *targetPowerCckExt, 269 const CAL_TARGET_POWER_LEG *targetPowerOfdm, 270 const CAL_TARGET_POWER_LEG *targetPowerOfdmExt, 271 const CAL_TARGET_POWER_HT *targetPowerHt20, 272 const CAL_TARGET_POWER_HT *targetPowerHt40); 273 extern void ar5416GetTargetPowers(struct ath_hal *ah, 274 const struct ieee80211_channel *chan, 275 CAL_TARGET_POWER_HT *powInfo, 276 uint16_t numChannels, CAL_TARGET_POWER_HT *pNewPower, 277 uint16_t numRates, HAL_BOOL isHt40Target); 278 extern void ar5416GetTargetPowersLeg(struct ath_hal *ah, 279 const struct ieee80211_channel *chan, 280 CAL_TARGET_POWER_LEG *powInfo, 281 uint16_t numChannels, CAL_TARGET_POWER_LEG *pNewPower, 282 uint16_t numRates, HAL_BOOL isExtTarget); 283 extern void ar5416InitChainMasks(struct ath_hal *ah); 284 extern void ar5416RestoreChainMask(struct ath_hal *ah); 285 extern void ar5416EepromSetAddac(struct ath_hal *ah, 286 const struct ieee80211_channel *chan); 287 extern uint16_t ar5416GetMaxEdgePower(uint16_t freq, 288 CAL_CTL_EDGES *pRdEdgesPower, HAL_BOOL is2GHz); 289 extern void ar5416InitPLL(struct ath_hal *ah, 290 const struct ieee80211_channel *chan); 291 292 /* TX power setup related routines in ar5416_reset.c */ 293 extern void ar5416GetGainBoundariesAndPdadcs(struct ath_hal *ah, 294 const struct ieee80211_channel *chan, CAL_DATA_PER_FREQ *pRawDataSet, 295 uint8_t * bChans, uint16_t availPiers, 296 uint16_t tPdGainOverlap, int16_t *pMinCalPower, 297 uint16_t * pPdGainBoundaries, uint8_t * pPDADCValues, 298 uint16_t numXpdGains); 299 extern void ar5416SetGainBoundariesClosedLoop(struct ath_hal *ah, 300 int i, uint16_t pdGainOverlap_t2, 301 uint16_t gainBoundaries[]); 302 extern uint16_t ar5416GetXpdGainValues(struct ath_hal *ah, uint16_t xpdMask, 303 uint16_t xpdGainValues[]); 304 extern void ar5416WriteDetectorGainBiases(struct ath_hal *ah, 305 uint16_t numXpdGain, uint16_t xpdGainValues[]); 306 extern void ar5416WritePdadcValues(struct ath_hal *ah, int i, 307 uint8_t pdadcValues[]); 308 extern HAL_BOOL ar5416SetPowerCalTable(struct ath_hal *ah, 309 struct ar5416eeprom *pEepData, const struct ieee80211_channel *chan, 310 int16_t *pTxPowerIndexOffset); 311 extern void ar5416WriteTxPowerRateRegisters(struct ath_hal *ah, 312 const struct ieee80211_channel *chan, const int16_t ratesArray[]); 313 314 extern HAL_BOOL ar5416StopTxDma(struct ath_hal *ah, u_int q); 315 extern HAL_BOOL ar5416SetupTxDesc(struct ath_hal *ah, struct ath_desc *ds, 316 u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int txPower, 317 u_int txRate0, u_int txTries0, 318 u_int keyIx, u_int antMode, u_int flags, 319 u_int rtsctsRate, u_int rtsctsDuration, 320 u_int compicvLen, u_int compivLen, u_int comp); 321 extern HAL_BOOL ar5416SetupXTxDesc(struct ath_hal *, struct ath_desc *, 322 u_int txRate1, u_int txRetries1, 323 u_int txRate2, u_int txRetries2, 324 u_int txRate3, u_int txRetries3); 325 extern HAL_BOOL ar5416FillTxDesc(struct ath_hal *ah, struct ath_desc *ds, 326 u_int segLen, HAL_BOOL firstSeg, HAL_BOOL lastSeg, 327 const struct ath_desc *ds0); 328 extern HAL_STATUS ar5416ProcTxDesc(struct ath_hal *ah, 329 struct ath_desc *, struct ath_tx_status *); 330 extern HAL_BOOL ar5416GetTxCompletionRates(struct ath_hal *ah, 331 const struct ath_desc *ds0, int *rates, int *tries); 332 333 extern HAL_BOOL ar5416ResetTxQueue(struct ath_hal *ah, u_int q); 334 extern int ar5416SetupTxQueue(struct ath_hal *ah, HAL_TX_QUEUE type, 335 const HAL_TXQ_INFO *qInfo); 336 337 extern HAL_BOOL ar5416ChainTxDesc(struct ath_hal *ah, struct ath_desc *ds, 338 u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int keyIx, 339 HAL_CIPHER cipher, uint8_t delims, u_int segLen, 340 HAL_BOOL firstSeg, HAL_BOOL lastSeg, HAL_BOOL lastAggr); 341 extern HAL_BOOL ar5416SetupFirstTxDesc(struct ath_hal *ah, struct ath_desc *ds, 342 u_int aggrLen, u_int flags, u_int txPower, u_int txRate0, u_int txTries0, 343 u_int antMode, u_int rtsctsRate, u_int rtsctsDuration); 344 extern HAL_BOOL ar5416SetupLastTxDesc(struct ath_hal *ah, struct ath_desc *ds, 345 const struct ath_desc *ds0); 346 extern HAL_BOOL ar5416SetGlobalTxTimeout(struct ath_hal *ah, u_int tu); 347 extern u_int ar5416GetGlobalTxTimeout(struct ath_hal *ah); 348 extern void ar5416Set11nRateScenario(struct ath_hal *ah, struct ath_desc *ds, 349 u_int durUpdateEn, u_int rtsctsRate, HAL_11N_RATE_SERIES series[], 350 u_int nseries, u_int flags); 351 352 extern void ar5416Set11nAggrFirst(struct ath_hal *ah, struct ath_desc *ds, 353 u_int aggrLen, u_int numDelims); 354 extern void ar5416Set11nAggrMiddle(struct ath_hal *ah, struct ath_desc *ds, u_int numDelims); 355 extern void ar5416Set11nAggrLast(struct ath_hal *ah, struct ath_desc *ds); 356 357 extern void ar5416Clr11nAggr(struct ath_hal *ah, struct ath_desc *ds); 358 359 extern void ar5416Set11nBurstDuration(struct ath_hal *ah, struct ath_desc *ds, u_int burstDuration); 360 361 extern const HAL_RATE_TABLE *ar5416GetRateTable(struct ath_hal *, u_int mode); 362 #endif /* _ATH_AR5416_H_ */ 363