xref: /freebsd/sys/dev/ath/ath_hal/ar5416/ar2133.c (revision 811b1001aaeba45d1987307d4a396d6ff9185d2d)
114779705SSam Leffler /*
259efa8b5SSam Leffler  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
314779705SSam Leffler  * Copyright (c) 2002-2008 Atheros Communications, Inc.
414779705SSam Leffler  *
514779705SSam Leffler  * Permission to use, copy, modify, and/or distribute this software for any
614779705SSam Leffler  * purpose with or without fee is hereby granted, provided that the above
714779705SSam Leffler  * copyright notice and this permission notice appear in all copies.
814779705SSam Leffler  *
914779705SSam Leffler  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
1014779705SSam Leffler  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1114779705SSam Leffler  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1214779705SSam Leffler  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1314779705SSam Leffler  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1414779705SSam Leffler  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
1514779705SSam Leffler  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1614779705SSam Leffler  *
1759efa8b5SSam Leffler  * $FreeBSD$
1814779705SSam Leffler  */
1914779705SSam Leffler #include "opt_ah.h"
2014779705SSam Leffler 
2114779705SSam Leffler #include "ah.h"
2214779705SSam Leffler #include "ah_internal.h"
2314779705SSam Leffler 
2414779705SSam Leffler #include "ah_eeprom_v14.h"
2514779705SSam Leffler 
2614779705SSam Leffler #include "ar5416/ar5416.h"
2714779705SSam Leffler #include "ar5416/ar5416reg.h"
2814779705SSam Leffler #include "ar5416/ar5416phy.h"
2914779705SSam Leffler 
3014779705SSam Leffler #define N(a)    (sizeof(a)/sizeof(a[0]))
3114779705SSam Leffler 
3214779705SSam Leffler struct ar2133State {
3314779705SSam Leffler 	RF_HAL_FUNCS	base;		/* public state, must be first */
3414779705SSam Leffler 	uint16_t	pcdacTable[1];
3514779705SSam Leffler 
3614779705SSam Leffler 	uint32_t	*Bank0Data;
3714779705SSam Leffler 	uint32_t	*Bank1Data;
3814779705SSam Leffler 	uint32_t	*Bank2Data;
3914779705SSam Leffler 	uint32_t	*Bank3Data;
4014779705SSam Leffler 	uint32_t	*Bank6Data;
4114779705SSam Leffler 	uint32_t	*Bank7Data;
4214779705SSam Leffler 
4314779705SSam Leffler 	/* NB: Bank*Data storage follows */
4414779705SSam Leffler };
4514779705SSam Leffler #define	AR2133(ah)	((struct ar2133State *) AH5212(ah)->ah_rfHal)
4614779705SSam Leffler 
4714779705SSam Leffler #define	ar5416ModifyRfBuffer	ar5212ModifyRfBuffer	/*XXX*/
4814779705SSam Leffler 
4959efa8b5SSam Leffler void	ar5416ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
5014779705SSam Leffler 	    uint32_t numBits, uint32_t firstBit, uint32_t column);
5114779705SSam Leffler 
5214779705SSam Leffler static void
5314779705SSam Leffler ar2133WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
5414779705SSam Leffler 	int writes)
5514779705SSam Leffler {
5614779705SSam Leffler 	(void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain,
5714779705SSam Leffler 		freqIndex, writes);
5814779705SSam Leffler }
5914779705SSam Leffler 
6014779705SSam Leffler /*
6114779705SSam Leffler  * Take the MHz channel value and set the Channel value
6214779705SSam Leffler  *
6314779705SSam Leffler  * ASSUMES: Writes enabled to analog bus
6414779705SSam Leffler  */
6514779705SSam Leffler static HAL_BOOL
6659efa8b5SSam Leffler ar2133SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
6714779705SSam Leffler {
6814779705SSam Leffler 	uint32_t channelSel  = 0;
6914779705SSam Leffler 	uint32_t bModeSynth  = 0;
7014779705SSam Leffler 	uint32_t aModeRefSel = 0;
7114779705SSam Leffler 	uint32_t reg32       = 0;
7214779705SSam Leffler 	uint16_t freq;
7314779705SSam Leffler 	CHAN_CENTERS centers;
7414779705SSam Leffler 
7559efa8b5SSam Leffler 	OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
7614779705SSam Leffler 
7714779705SSam Leffler 	ar5416GetChannelCenters(ah, chan, &centers);
7814779705SSam Leffler 	freq = centers.synth_center;
7914779705SSam Leffler 
8014779705SSam Leffler 	if (freq < 4800) {
8114779705SSam Leffler 		uint32_t txctl;
8214779705SSam Leffler 
8314779705SSam Leffler 		if (((freq - 2192) % 5) == 0) {
8414779705SSam Leffler 			channelSel = ((freq - 672) * 2 - 3040)/10;
8514779705SSam Leffler 			bModeSynth = 0;
8614779705SSam Leffler 		} else if (((freq - 2224) % 5) == 0) {
8714779705SSam Leffler 			channelSel = ((freq - 704) * 2 - 3040) / 10;
8814779705SSam Leffler 			bModeSynth = 1;
8914779705SSam Leffler 		} else {
9014779705SSam Leffler 			HALDEBUG(ah, HAL_DEBUG_ANY,
9114779705SSam Leffler 			    "%s: invalid channel %u MHz\n", __func__, freq);
9214779705SSam Leffler 			return AH_FALSE;
9314779705SSam Leffler 		}
9414779705SSam Leffler 
9514779705SSam Leffler 		channelSel = (channelSel << 2) & 0xff;
9614779705SSam Leffler 		channelSel = ath_hal_reverseBits(channelSel, 8);
9714779705SSam Leffler 
9814779705SSam Leffler 		txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
9914779705SSam Leffler 		if (freq == 2484) {
10014779705SSam Leffler 			/* Enable channel spreading for channel 14 */
10114779705SSam Leffler 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
10214779705SSam Leffler 				txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
10314779705SSam Leffler 		} else {
10414779705SSam Leffler 			OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
10514779705SSam Leffler  			txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
10614779705SSam Leffler 		}
10714779705SSam Leffler 	} else if ((freq % 20) == 0 && freq >= 5120) {
10814779705SSam Leffler 		channelSel = ath_hal_reverseBits(((freq - 4800) / 20 << 2), 8);
10914779705SSam Leffler 		if (AR_SREV_SOWL_10_OR_LATER(ah))
11014779705SSam Leffler 			aModeRefSel = ath_hal_reverseBits(3, 2);
11114779705SSam Leffler 		else
11214779705SSam Leffler 			aModeRefSel = ath_hal_reverseBits(1, 2);
11314779705SSam Leffler 	} else if ((freq % 10) == 0) {
11414779705SSam Leffler 		channelSel = ath_hal_reverseBits(((freq - 4800) / 10 << 1), 8);
11514779705SSam Leffler 		if (AR_SREV_SOWL_10_OR_LATER(ah))
11614779705SSam Leffler 			aModeRefSel = ath_hal_reverseBits(2, 2);
11714779705SSam Leffler 		else
11814779705SSam Leffler 			aModeRefSel = ath_hal_reverseBits(1, 2);
11914779705SSam Leffler 	} else if ((freq % 5) == 0) {
12014779705SSam Leffler 		channelSel = ath_hal_reverseBits((freq - 4800) / 5, 8);
12114779705SSam Leffler 		aModeRefSel = ath_hal_reverseBits(1, 2);
12214779705SSam Leffler 	} else {
12314779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
12414779705SSam Leffler 		    __func__, freq);
12514779705SSam Leffler 		return AH_FALSE;
12614779705SSam Leffler 	}
12714779705SSam Leffler 
12814779705SSam Leffler 	reg32 = (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
12914779705SSam Leffler 		(1 << 5) | 0x1;
13014779705SSam Leffler 
13114779705SSam Leffler 	OS_REG_WRITE(ah, AR_PHY(0x37), reg32);
13214779705SSam Leffler 
13314779705SSam Leffler 	AH_PRIVATE(ah)->ah_curchan = chan;
13414779705SSam Leffler 	return AH_TRUE;
13514779705SSam Leffler 
13614779705SSam Leffler }
13714779705SSam Leffler 
13814779705SSam Leffler /*
13914779705SSam Leffler  * Return a reference to the requested RF Bank.
14014779705SSam Leffler  */
14114779705SSam Leffler static uint32_t *
14214779705SSam Leffler ar2133GetRfBank(struct ath_hal *ah, int bank)
14314779705SSam Leffler {
14414779705SSam Leffler 	struct ar2133State *priv = AR2133(ah);
14514779705SSam Leffler 
14614779705SSam Leffler 	HALASSERT(priv != AH_NULL);
14714779705SSam Leffler 	switch (bank) {
14814779705SSam Leffler 	case 1: return priv->Bank1Data;
14914779705SSam Leffler 	case 2: return priv->Bank2Data;
15014779705SSam Leffler 	case 3: return priv->Bank3Data;
15114779705SSam Leffler 	case 6: return priv->Bank6Data;
15214779705SSam Leffler 	case 7: return priv->Bank7Data;
15314779705SSam Leffler 	}
15414779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
15514779705SSam Leffler 	    __func__, bank);
15614779705SSam Leffler 	return AH_NULL;
15714779705SSam Leffler }
15814779705SSam Leffler 
15914779705SSam Leffler /*
16014779705SSam Leffler  * Reads EEPROM header info from device structure and programs
16114779705SSam Leffler  * all rf registers
16214779705SSam Leffler  *
16314779705SSam Leffler  * REQUIRES: Access to the analog rf device
16414779705SSam Leffler  */
16514779705SSam Leffler static HAL_BOOL
16659efa8b5SSam Leffler ar2133SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
16714779705SSam Leffler                 uint16_t modesIndex, uint16_t *rfXpdGain)
16814779705SSam Leffler {
16914779705SSam Leffler 	struct ar2133State *priv = AR2133(ah);
17014779705SSam Leffler 	int writes;
17114779705SSam Leffler 
17214779705SSam Leffler 	HALASSERT(priv);
17314779705SSam Leffler 
17414779705SSam Leffler 	/* Setup Bank 0 Write */
17514779705SSam Leffler 	ath_hal_ini_bank_setup(priv->Bank0Data, &AH5416(ah)->ah_ini_bank0, 1);
17614779705SSam Leffler 
17714779705SSam Leffler 	/* Setup Bank 1 Write */
17814779705SSam Leffler 	ath_hal_ini_bank_setup(priv->Bank1Data, &AH5416(ah)->ah_ini_bank1, 1);
17914779705SSam Leffler 
18014779705SSam Leffler 	/* Setup Bank 2 Write */
18114779705SSam Leffler 	ath_hal_ini_bank_setup(priv->Bank2Data, &AH5416(ah)->ah_ini_bank2, 1);
18214779705SSam Leffler 
18314779705SSam Leffler 	/* Setup Bank 3 Write */
18414779705SSam Leffler 	ath_hal_ini_bank_setup(priv->Bank3Data, &AH5416(ah)->ah_ini_bank3, modesIndex);
18514779705SSam Leffler 
18614779705SSam Leffler 	/* Setup Bank 6 Write */
18714779705SSam Leffler 	ath_hal_ini_bank_setup(priv->Bank6Data, &AH5416(ah)->ah_ini_bank6, modesIndex);
18814779705SSam Leffler 
18914779705SSam Leffler 	/* Only the 5 or 2 GHz OB/DB need to be set for a mode */
19059efa8b5SSam Leffler 	if (IEEE80211_IS_CHAN_2GHZ(chan)) {
19114779705SSam Leffler 		ar5416ModifyRfBuffer(priv->Bank6Data,
19214779705SSam Leffler 		    ath_hal_eepromGet(ah, AR_EEP_OB_2, AH_NULL), 3, 197, 0);
19314779705SSam Leffler 		ar5416ModifyRfBuffer(priv->Bank6Data,
19414779705SSam Leffler 		    ath_hal_eepromGet(ah, AR_EEP_DB_2, AH_NULL), 3, 194, 0);
19514779705SSam Leffler 	} else {
19614779705SSam Leffler 		ar5416ModifyRfBuffer(priv->Bank6Data,
19714779705SSam Leffler 		    ath_hal_eepromGet(ah, AR_EEP_OB_5, AH_NULL), 3, 203, 0);
19814779705SSam Leffler 		ar5416ModifyRfBuffer(priv->Bank6Data,
19914779705SSam Leffler 		    ath_hal_eepromGet(ah, AR_EEP_DB_5, AH_NULL), 3, 200, 0);
20014779705SSam Leffler 	}
20114779705SSam Leffler 	/* Setup Bank 7 Setup */
20214779705SSam Leffler 	ath_hal_ini_bank_setup(priv->Bank7Data, &AH5416(ah)->ah_ini_bank7, 1);
20314779705SSam Leffler 
20414779705SSam Leffler 	/* Write Analog registers */
20514779705SSam Leffler 	writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank0,
20614779705SSam Leffler 	    priv->Bank0Data, 0);
20714779705SSam Leffler 	writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank1,
20814779705SSam Leffler 	    priv->Bank1Data, writes);
20914779705SSam Leffler 	writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank2,
21014779705SSam Leffler 	    priv->Bank2Data, writes);
21114779705SSam Leffler 	writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank3,
21214779705SSam Leffler 	    priv->Bank3Data, writes);
21314779705SSam Leffler 	writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank6,
21414779705SSam Leffler 	    priv->Bank6Data, writes);
21514779705SSam Leffler 	(void) ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank7,
21614779705SSam Leffler 	    priv->Bank7Data, writes);
21714779705SSam Leffler 
21814779705SSam Leffler 	return AH_TRUE;
21914779705SSam Leffler #undef  RF_BANK_SETUP
22014779705SSam Leffler }
22114779705SSam Leffler 
22214779705SSam Leffler /*
22314779705SSam Leffler  * Read the transmit power levels from the structures taken from EEPROM
22414779705SSam Leffler  * Interpolate read transmit power values for this channel
22514779705SSam Leffler  * Organize the transmit power values into a table for writing into the hardware
22614779705SSam Leffler  */
22714779705SSam Leffler 
22814779705SSam Leffler static HAL_BOOL
22914779705SSam Leffler ar2133SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax,
23059efa8b5SSam Leffler 	const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
23114779705SSam Leffler {
23214779705SSam Leffler 	return AH_TRUE;
23314779705SSam Leffler }
23414779705SSam Leffler 
23514779705SSam Leffler #if 0
23614779705SSam Leffler static int16_t
23714779705SSam Leffler ar2133GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data)
23814779705SSam Leffler {
23914779705SSam Leffler     int i, minIndex;
24014779705SSam Leffler     int16_t minGain,minPwr,minPcdac,retVal;
24114779705SSam Leffler 
24214779705SSam Leffler     /* Assume NUM_POINTS_XPD0 > 0 */
24314779705SSam Leffler     minGain = data->pDataPerXPD[0].xpd_gain;
24414779705SSam Leffler     for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
24514779705SSam Leffler         if (data->pDataPerXPD[i].xpd_gain < minGain) {
24614779705SSam Leffler             minIndex = i;
24714779705SSam Leffler             minGain = data->pDataPerXPD[i].xpd_gain;
24814779705SSam Leffler         }
24914779705SSam Leffler     }
25014779705SSam Leffler     minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
25114779705SSam Leffler     minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
25214779705SSam Leffler     for (i=1; i<NUM_POINTS_XPD0; i++) {
25314779705SSam Leffler         if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
25414779705SSam Leffler             minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
25514779705SSam Leffler             minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
25614779705SSam Leffler         }
25714779705SSam Leffler     }
25814779705SSam Leffler     retVal = minPwr - (minPcdac*2);
25914779705SSam Leffler     return(retVal);
26014779705SSam Leffler }
26114779705SSam Leffler #endif
26214779705SSam Leffler 
26314779705SSam Leffler static HAL_BOOL
26459efa8b5SSam Leffler ar2133GetChannelMaxMinPower(struct ath_hal *ah,
26559efa8b5SSam Leffler 	const struct ieee80211_channel *chan,
26659efa8b5SSam Leffler 	int16_t *maxPow, int16_t *minPow)
26714779705SSam Leffler {
26814779705SSam Leffler #if 0
26914779705SSam Leffler     struct ath_hal_5212 *ahp = AH5212(ah);
27014779705SSam Leffler     int numChannels=0,i,last;
27114779705SSam Leffler     int totalD, totalF,totalMin;
27214779705SSam Leffler     EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL;
27314779705SSam Leffler     EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL;
27414779705SSam Leffler 
27514779705SSam Leffler     *maxPow = 0;
27614779705SSam Leffler     if (IS_CHAN_A(chan)) {
27714779705SSam Leffler         powerArray = ahp->ah_modePowerArray5112;
27814779705SSam Leffler         data = powerArray[headerInfo11A].pDataPerChannel;
27914779705SSam Leffler         numChannels = powerArray[headerInfo11A].numChannels;
28014779705SSam Leffler     } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) {
28114779705SSam Leffler         /* XXX - is this correct? Should we also use the same power for turbo G? */
28214779705SSam Leffler         powerArray = ahp->ah_modePowerArray5112;
28314779705SSam Leffler         data = powerArray[headerInfo11G].pDataPerChannel;
28414779705SSam Leffler         numChannels = powerArray[headerInfo11G].numChannels;
28514779705SSam Leffler     } else if (IS_CHAN_B(chan)) {
28614779705SSam Leffler         powerArray = ahp->ah_modePowerArray5112;
28714779705SSam Leffler         data = powerArray[headerInfo11B].pDataPerChannel;
28814779705SSam Leffler         numChannels = powerArray[headerInfo11B].numChannels;
28914779705SSam Leffler     } else {
29014779705SSam Leffler         return (AH_TRUE);
29114779705SSam Leffler     }
29214779705SSam Leffler     /* Make sure the channel is in the range of the TP values
29314779705SSam Leffler      *  (freq piers)
29414779705SSam Leffler      */
29514779705SSam Leffler     if ((numChannels < 1) ||
29614779705SSam Leffler         (chan->channel < data[0].channelValue) ||
29714779705SSam Leffler         (chan->channel > data[numChannels-1].channelValue))
29814779705SSam Leffler         return(AH_FALSE);
29914779705SSam Leffler 
30014779705SSam Leffler     /* Linearly interpolate the power value now */
30114779705SSam Leffler     for (last=0,i=0;
30214779705SSam Leffler          (i<numChannels) && (chan->channel > data[i].channelValue);
30314779705SSam Leffler          last=i++);
30414779705SSam Leffler     totalD = data[i].channelValue - data[last].channelValue;
30514779705SSam Leffler     if (totalD > 0) {
30614779705SSam Leffler         totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
30714779705SSam Leffler         *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
30814779705SSam Leffler 
30914779705SSam Leffler         totalMin = ar2133GetMinPower(ah,&data[i]) - ar2133GetMinPower(ah, &data[last]);
31014779705SSam Leffler         *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar2133GetMinPower(ah, &data[last])*totalD)/totalD);
31114779705SSam Leffler         return (AH_TRUE);
31214779705SSam Leffler     } else {
31314779705SSam Leffler         if (chan->channel == data[i].channelValue) {
31414779705SSam Leffler             *maxPow = data[i].maxPower_t4;
31514779705SSam Leffler             *minPow = ar2133GetMinPower(ah, &data[i]);
31614779705SSam Leffler             return(AH_TRUE);
31714779705SSam Leffler         } else
31814779705SSam Leffler             return(AH_FALSE);
31914779705SSam Leffler     }
32014779705SSam Leffler #else
32114779705SSam Leffler     *maxPow = *minPow = 0;
32214779705SSam Leffler 	return AH_FALSE;
32314779705SSam Leffler #endif
32414779705SSam Leffler }
32514779705SSam Leffler 
32614779705SSam Leffler static void
32714779705SSam Leffler ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
32814779705SSam Leffler {
32914779705SSam Leffler 	struct ath_hal_5416 *ahp = AH5416(ah);
33014779705SSam Leffler 	int16_t nf;
33114779705SSam Leffler 
33214779705SSam Leffler 	switch (ahp->ah_rx_chainmask) {
33314779705SSam Leffler         case 0x7:
33414779705SSam Leffler 		nf = MS(OS_REG_READ(ah, AR_PHY_CH2_CCA), AR_PHY_CH2_MINCCA_PWR);
33514779705SSam Leffler 		if (nf & 0x100)
33614779705SSam Leffler 			nf = 0 - ((nf ^ 0x1ff) + 1);
33714779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_NFCAL,
33814779705SSam Leffler 		    "NF calibrated [ctl] [chain 2] is %d\n", nf);
33914779705SSam Leffler 		nfarray[4] = nf;
34014779705SSam Leffler 
34114779705SSam Leffler 		nf = MS(OS_REG_READ(ah, AR_PHY_CH2_EXT_CCA), AR_PHY_CH2_EXT_MINCCA_PWR);
34214779705SSam Leffler 		if (nf & 0x100)
34314779705SSam Leffler 			nf = 0 - ((nf ^ 0x1ff) + 1);
34414779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_NFCAL,
34514779705SSam Leffler 		    "NF calibrated [ext] [chain 2] is %d\n", nf);
34614779705SSam Leffler 		nfarray[5] = nf;
34714779705SSam Leffler 		/* fall thru... */
34814779705SSam Leffler         case 0x3:
34914779705SSam Leffler         case 0x5:
35014779705SSam Leffler 		nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR_PHY_CH1_MINCCA_PWR);
35114779705SSam Leffler 		if (nf & 0x100)
35214779705SSam Leffler 			nf = 0 - ((nf ^ 0x1ff) + 1);
35314779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_NFCAL,
35414779705SSam Leffler 		    "NF calibrated [ctl] [chain 1] is %d\n", nf);
35514779705SSam Leffler 		nfarray[2] = nf;
35614779705SSam Leffler 
35714779705SSam Leffler 
35814779705SSam Leffler 		nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR_PHY_CH1_EXT_MINCCA_PWR);
35914779705SSam Leffler 		if (nf & 0x100)
36014779705SSam Leffler 			nf = 0 - ((nf ^ 0x1ff) + 1);
36114779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_NFCAL,
36214779705SSam Leffler 		    "NF calibrated [ext] [chain 1] is %d\n", nf);
36314779705SSam Leffler 		nfarray[3] = nf;
36414779705SSam Leffler 		/* fall thru... */
36514779705SSam Leffler         case 0x1:
36614779705SSam Leffler 		nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR_PHY_MINCCA_PWR);
36714779705SSam Leffler 		if (nf & 0x100)
36814779705SSam Leffler 			nf = 0 - ((nf ^ 0x1ff) + 1);
36914779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_NFCAL,
37014779705SSam Leffler 		    "NF calibrated [ctl] [chain 0] is %d\n", nf);
37114779705SSam Leffler 		nfarray[0] = nf;
37214779705SSam Leffler 
37314779705SSam Leffler 		nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR);
37414779705SSam Leffler 		if (nf & 0x100)
37514779705SSam Leffler 			nf = 0 - ((nf ^ 0x1ff) + 1);
37614779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_NFCAL,
37714779705SSam Leffler 		    "NF calibrated [ext] [chain 0] is %d\n", nf);
37814779705SSam Leffler 		nfarray[1] = nf;
37914779705SSam Leffler 
38014779705SSam Leffler 		break;
38114779705SSam Leffler 	}
38214779705SSam Leffler }
38314779705SSam Leffler 
38414779705SSam Leffler /*
38514779705SSam Leffler  * Adjust NF based on statistical values for 5GHz frequencies.
38614779705SSam Leffler  * Stubbed:Not used by Fowl
38714779705SSam Leffler  */
38859efa8b5SSam Leffler static int16_t
38914779705SSam Leffler ar2133GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c)
39014779705SSam Leffler {
39114779705SSam Leffler 	return 0;
39214779705SSam Leffler }
39314779705SSam Leffler 
39414779705SSam Leffler /*
39514779705SSam Leffler  * Free memory for analog bank scratch buffers
39614779705SSam Leffler  */
39714779705SSam Leffler static void
39814779705SSam Leffler ar2133RfDetach(struct ath_hal *ah)
39914779705SSam Leffler {
40014779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
40114779705SSam Leffler 
40214779705SSam Leffler 	HALASSERT(ahp->ah_rfHal != AH_NULL);
40314779705SSam Leffler 	ath_hal_free(ahp->ah_rfHal);
40414779705SSam Leffler 	ahp->ah_rfHal = AH_NULL;
40514779705SSam Leffler }
40614779705SSam Leffler 
40714779705SSam Leffler /*
40814779705SSam Leffler  * Allocate memory for analog bank scratch buffers
40914779705SSam Leffler  * Scratch Buffer will be reinitialized every reset so no need to zero now
41014779705SSam Leffler  */
41114779705SSam Leffler HAL_BOOL
41214779705SSam Leffler ar2133RfAttach(struct ath_hal *ah, HAL_STATUS *status)
41314779705SSam Leffler {
41414779705SSam Leffler 	struct ath_hal_5212 *ahp = AH5212(ah);
41514779705SSam Leffler 	struct ar2133State *priv;
41614779705SSam Leffler 	uint32_t *bankData;
41714779705SSam Leffler 
418811b1001SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR2133 radio\n", __func__);
419811b1001SSam Leffler 
42014779705SSam Leffler 	HALASSERT(ahp->ah_rfHal == AH_NULL);
42114779705SSam Leffler 	priv = ath_hal_malloc(sizeof(struct ar2133State)
42214779705SSam Leffler 	    + AH5416(ah)->ah_ini_bank0.rows * sizeof(uint32_t)
42314779705SSam Leffler 	    + AH5416(ah)->ah_ini_bank1.rows * sizeof(uint32_t)
42414779705SSam Leffler 	    + AH5416(ah)->ah_ini_bank2.rows * sizeof(uint32_t)
42514779705SSam Leffler 	    + AH5416(ah)->ah_ini_bank3.rows * sizeof(uint32_t)
42614779705SSam Leffler 	    + AH5416(ah)->ah_ini_bank6.rows * sizeof(uint32_t)
42714779705SSam Leffler 	    + AH5416(ah)->ah_ini_bank7.rows * sizeof(uint32_t)
42814779705SSam Leffler 	);
42914779705SSam Leffler 	if (priv == AH_NULL) {
43014779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY,
43114779705SSam Leffler 		    "%s: cannot allocate private state\n", __func__);
43214779705SSam Leffler 		*status = HAL_ENOMEM;		/* XXX */
43314779705SSam Leffler 		return AH_FALSE;
43414779705SSam Leffler 	}
43514779705SSam Leffler 	priv->base.rfDetach		= ar2133RfDetach;
43614779705SSam Leffler 	priv->base.writeRegs		= ar2133WriteRegs;
43714779705SSam Leffler 	priv->base.getRfBank		= ar2133GetRfBank;
43814779705SSam Leffler 	priv->base.setChannel		= ar2133SetChannel;
43914779705SSam Leffler 	priv->base.setRfRegs		= ar2133SetRfRegs;
44014779705SSam Leffler 	priv->base.setPowerTable	= ar2133SetPowerTable;
44114779705SSam Leffler 	priv->base.getChannelMaxMinPower = ar2133GetChannelMaxMinPower;
44214779705SSam Leffler 	priv->base.getNfAdjust		= ar2133GetNfAdjust;
44314779705SSam Leffler 
44414779705SSam Leffler 	bankData = (uint32_t *) &priv[1];
44514779705SSam Leffler 	priv->Bank0Data = bankData, bankData += AH5416(ah)->ah_ini_bank0.rows;
44614779705SSam Leffler 	priv->Bank1Data = bankData, bankData += AH5416(ah)->ah_ini_bank1.rows;
44714779705SSam Leffler 	priv->Bank2Data = bankData, bankData += AH5416(ah)->ah_ini_bank2.rows;
44814779705SSam Leffler 	priv->Bank3Data = bankData, bankData += AH5416(ah)->ah_ini_bank3.rows;
44914779705SSam Leffler 	priv->Bank6Data = bankData, bankData += AH5416(ah)->ah_ini_bank6.rows;
45014779705SSam Leffler 	priv->Bank7Data = bankData, bankData += AH5416(ah)->ah_ini_bank7.rows;
45114779705SSam Leffler 
45214779705SSam Leffler 	ahp->ah_pcdacTable = priv->pcdacTable;
45314779705SSam Leffler 	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
45414779705SSam Leffler 	ahp->ah_rfHal = &priv->base;
45514779705SSam Leffler 	/*
45614779705SSam Leffler 	 * Set noise floor adjust method; we arrange a
45714779705SSam Leffler 	 * direct call instead of thunking.
45814779705SSam Leffler 	 */
45914779705SSam Leffler 	AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
46014779705SSam Leffler 	AH_PRIVATE(ah)->ah_getNoiseFloor = ar2133GetNoiseFloor;
46114779705SSam Leffler 
46214779705SSam Leffler 	return AH_TRUE;
46314779705SSam Leffler }
464