xref: /freebsd/sys/dev/ath/ath_hal/ar5212/ar5212_power.c (revision 0b3105a37d7adcadcb720112fed4dc4e8040be99)
1 /*
2  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3  * Copyright (c) 2002-2008 Atheros Communications, Inc.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  *
17  * $FreeBSD$
18  */
19 #include "opt_ah.h"
20 
21 #include "ah.h"
22 #include "ah_internal.h"
23 
24 #include "ar5212/ar5212.h"
25 #include "ar5212/ar5212reg.h"
26 #include "ar5212/ar5212desc.h"
27 
28 /*
29  * Notify Power Mgt is enabled in self-generated frames.
30  * If requested, force chip awake.
31  *
32  * Returns A_OK if chip is awake or successfully forced awake.
33  *
34  * WARNING WARNING WARNING
35  * There is a problem with the chip where sometimes it will not wake up.
36  */
37 static HAL_BOOL
38 ar5212SetPowerModeAwake(struct ath_hal *ah, int setChip)
39 {
40 #define	AR_SCR_MASK \
41     (AR_SCR_SLDUR|AR_SCR_SLE|AR_SCR_SLDTP|AR_SCR_SLDWP|\
42      AR_SCR_SLEPOL|AR_SCR_MIBIE|AR_SCR_UNKNOWN)
43 #define	POWER_UP_TIME	2000
44 	uint32_t scr, val;
45 	int i;
46 
47 	if (setChip) {
48 		/*
49 		 * Be careful setting the AWAKE mode.  When we are called
50 		 * with the chip powered down the read returns 0xffffffff
51 		 * which when blindly written back with OS_REG_RMW_FIELD
52 		 * enables the MIB interrupt for the sleep performance
53 		 * counters.  This can result in an interrupt storm when
54 		 * ANI is in operation as noone knows to turn off the MIB
55 		 * interrupt cause.
56 		 */
57 		scr = OS_REG_READ(ah, AR_SCR);
58 		if (scr & ~AR_SCR_MASK) {
59 			HALDEBUG(ah, HAL_DEBUG_ANY,
60 			    "%s: bogus SCR 0x%x, PCICFG 0x%x\n",
61 			    __func__, scr, OS_REG_READ(ah, AR_PCICFG));
62 			scr = 0;
63 		}
64 		scr = (scr &~ AR_SCR_SLE) | AR_SCR_SLE_WAKE;
65 		OS_REG_WRITE(ah, AR_SCR, scr);
66 		OS_DELAY(10);	/* Give chip the chance to awake */
67 
68 		for (i = POWER_UP_TIME / 50; i != 0; i--) {
69 			val = OS_REG_READ(ah, AR_PCICFG);
70 			if ((val & AR_PCICFG_SPWR_DN) == 0)
71 				break;
72 			OS_DELAY(50);
73 			OS_REG_WRITE(ah, AR_SCR, scr);
74 		}
75 		if (i == 0) {
76 #ifdef AH_DEBUG
77 			ath_hal_printf(ah, "%s: Failed to wakeup in %ums\n",
78 				__func__, POWER_UP_TIME/50);
79 #endif
80 			return AH_FALSE;
81 		}
82 	}
83 
84 	OS_REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
85 	return AH_TRUE;
86 #undef POWER_UP_TIME
87 #undef AR_SCR_MASK
88 }
89 
90 /*
91  * Notify Power Mgt is disabled in self-generated frames.
92  * If requested, force chip to sleep.
93  */
94 static void
95 ar5212SetPowerModeSleep(struct ath_hal *ah, int setChip)
96 {
97 	OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
98 	if (setChip)
99 		OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP);
100 }
101 
102 /*
103  * Notify Power Management is enabled in self-generating
104  * fames.  If request, set power mode of chip to
105  * auto/normal.  Duration in units of 128us (1/8 TU).
106  */
107 static void
108 ar5212SetPowerModeNetworkSleep(struct ath_hal *ah, int setChip)
109 {
110 	OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
111 	if (setChip)
112 		OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM);
113 }
114 
115 /*
116  * Set power mgt to the requested mode, and conditionally set
117  * the chip as well
118  */
119 HAL_BOOL
120 ar5212SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip)
121 {
122 #ifdef AH_DEBUG
123 	static const char* modes[] = {
124 		"AWAKE",
125 		"FULL-SLEEP",
126 		"NETWORK SLEEP",
127 		"UNDEFINED"
128 	};
129 #endif
130 	int status = AH_TRUE;
131 
132 	HALDEBUG(ah, HAL_DEBUG_POWER, "%s: %s -> %s (%s)\n", __func__,
133 		modes[ah->ah_powerMode], modes[mode],
134 		setChip ? "set chip " : "");
135 	switch (mode) {
136 	case HAL_PM_AWAKE:
137 		if (setChip)
138 			ah->ah_powerMode = mode;
139 		status = ar5212SetPowerModeAwake(ah, setChip);
140 		break;
141 	case HAL_PM_FULL_SLEEP:
142 		ar5212SetPowerModeSleep(ah, setChip);
143 		if (setChip)
144 			ah->ah_powerMode = mode;
145 		break;
146 	case HAL_PM_NETWORK_SLEEP:
147 		ar5212SetPowerModeNetworkSleep(ah, setChip);
148 		if (setChip)
149 			ah->ah_powerMode = mode;
150 		break;
151 	default:
152 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown power mode %u\n",
153 		    __func__, mode);
154 		return AH_FALSE;
155 	}
156 	return status;
157 }
158 
159 /*
160  * Return the current sleep mode of the chip
161  */
162 HAL_POWER_MODE
163 ar5212GetPowerMode(struct ath_hal *ah)
164 {
165 	/* Just so happens the h/w maps directly to the abstracted value */
166 	return MS(OS_REG_READ(ah, AR_SCR), AR_SCR_SLE);
167 }
168 
169 #if 0
170 /*
171  * Return the current sleep state of the chip
172  * TRUE = sleeping
173  */
174 HAL_BOOL
175 ar5212GetPowerStatus(struct ath_hal *ah)
176 {
177 	return (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_SPWR_DN) != 0;
178 }
179 #endif
180