1*6e778a7eSPedro F. Giffuni /*-
2*6e778a7eSPedro F. Giffuni * SPDX-License-Identifier: ISC
3*6e778a7eSPedro F. Giffuni *
414779705SSam Leffler * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
514779705SSam Leffler * Copyright (c) 2002-2008 Atheros Communications, Inc.
614779705SSam Leffler *
714779705SSam Leffler * Permission to use, copy, modify, and/or distribute this software for any
814779705SSam Leffler * purpose with or without fee is hereby granted, provided that the above
914779705SSam Leffler * copyright notice and this permission notice appear in all copies.
1014779705SSam Leffler *
1114779705SSam Leffler * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
1214779705SSam Leffler * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1314779705SSam Leffler * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1414779705SSam Leffler * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1514779705SSam Leffler * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1614779705SSam Leffler * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
1714779705SSam Leffler * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1814779705SSam Leffler */
1914779705SSam Leffler #include "opt_ah.h"
2014779705SSam Leffler
2114779705SSam Leffler #include "ah.h"
2214779705SSam Leffler #include "ah_internal.h"
2314779705SSam Leffler
2414779705SSam Leffler #include "ar5212/ar5212.h"
2514779705SSam Leffler
2614779705SSam Leffler /* shorthands to compact tables for readability */
2714779705SSam Leffler #define OFDM IEEE80211_T_OFDM
2814779705SSam Leffler #define CCK IEEE80211_T_CCK
2914779705SSam Leffler #define TURBO IEEE80211_T_TURBO
3017e45e19SSam Leffler #define HALF IEEE80211_T_OFDM_HALF
3117e45e19SSam Leffler #define QUART IEEE80211_T_OFDM_QUARTER
3214779705SSam Leffler
3314779705SSam Leffler HAL_RATE_TABLE ar5212_11a_table = {
3414779705SSam Leffler 8, /* number of rates */
3514779705SSam Leffler { 0 },
3614779705SSam Leffler {
3714779705SSam Leffler /* short ctrl */
3814779705SSam Leffler /* valid rateCode Preamble dot11Rate Rate */
3914779705SSam Leffler /* 6 Mb */ { AH_TRUE, OFDM, 6000, 0x0b, 0x00, (0x80|12), 0 },
4014779705SSam Leffler /* 9 Mb */ { AH_TRUE, OFDM, 9000, 0x0f, 0x00, 18, 0 },
4114779705SSam Leffler /* 12 Mb */ { AH_TRUE, OFDM, 12000, 0x0a, 0x00, (0x80|24), 2 },
4214779705SSam Leffler /* 18 Mb */ { AH_TRUE, OFDM, 18000, 0x0e, 0x00, 36, 2 },
4314779705SSam Leffler /* 24 Mb */ { AH_TRUE, OFDM, 24000, 0x09, 0x00, (0x80|48), 4 },
4414779705SSam Leffler /* 36 Mb */ { AH_TRUE, OFDM, 36000, 0x0d, 0x00, 72, 4 },
4514779705SSam Leffler /* 48 Mb */ { AH_TRUE, OFDM, 48000, 0x08, 0x00, 96, 4 },
4614779705SSam Leffler /* 54 Mb */ { AH_TRUE, OFDM, 54000, 0x0c, 0x00, 108, 4 }
4714779705SSam Leffler },
4814779705SSam Leffler };
4914779705SSam Leffler
5014779705SSam Leffler HAL_RATE_TABLE ar5212_half_table = {
5114779705SSam Leffler 8, /* number of rates */
5214779705SSam Leffler { 0 },
5314779705SSam Leffler {
5414779705SSam Leffler /* short ctrl */
5514779705SSam Leffler /* valid rateCode Preamble dot11Rate Rate */
5617e45e19SSam Leffler /* 3 Mb */ { AH_TRUE, HALF, 3000, 0x0b, 0x00, (0x80|6), 0 },
5717e45e19SSam Leffler /* 4.5 Mb */ { AH_TRUE, HALF, 4500, 0x0f, 0x00, 9, 0 },
5817e45e19SSam Leffler /* 6 Mb */ { AH_TRUE, HALF, 6000, 0x0a, 0x00, (0x80|12), 2 },
5917e45e19SSam Leffler /* 9 Mb */ { AH_TRUE, HALF, 9000, 0x0e, 0x00, 18, 2 },
6017e45e19SSam Leffler /* 12 Mb */ { AH_TRUE, HALF, 12000, 0x09, 0x00, (0x80|24), 4 },
6117e45e19SSam Leffler /* 18 Mb */ { AH_TRUE, HALF, 18000, 0x0d, 0x00, 36, 4 },
6217e45e19SSam Leffler /* 24 Mb */ { AH_TRUE, HALF, 24000, 0x08, 0x00, 48, 4 },
6317e45e19SSam Leffler /* 27 Mb */ { AH_TRUE, HALF, 27000, 0x0c, 0x00, 54, 4 }
6414779705SSam Leffler },
6514779705SSam Leffler };
6614779705SSam Leffler
6714779705SSam Leffler HAL_RATE_TABLE ar5212_quarter_table = {
6814779705SSam Leffler 8, /* number of rates */
6914779705SSam Leffler { 0 },
7014779705SSam Leffler {
7114779705SSam Leffler /* short ctrl */
7214779705SSam Leffler /* valid rateCode Preamble dot11Rate Rate */
7317e45e19SSam Leffler /* 1.5 Mb */ { AH_TRUE, QUART, 1500, 0x0b, 0x00, (0x80|3), 0 },
7417e45e19SSam Leffler /* 2 Mb */ { AH_TRUE, QUART, 2250, 0x0f, 0x00, 4, 0 },
7517e45e19SSam Leffler /* 3 Mb */ { AH_TRUE, QUART, 3000, 0x0a, 0x00, (0x80|6), 2 },
7617e45e19SSam Leffler /* 4.5 Mb */ { AH_TRUE, QUART, 4500, 0x0e, 0x00, 9, 2 },
7717e45e19SSam Leffler /* 6 Mb */ { AH_TRUE, QUART, 6000, 0x09, 0x00, (0x80|12), 4 },
7817e45e19SSam Leffler /* 9 Mb */ { AH_TRUE, QUART, 9000, 0x0d, 0x00, 18, 4 },
7917e45e19SSam Leffler /* 12 Mb */ { AH_TRUE, QUART, 12000, 0x08, 0x00, 24, 4 },
8017e45e19SSam Leffler /*13.5 Mb */ { AH_TRUE, QUART, 13500, 0x0c, 0x00, 27, 4 }
8114779705SSam Leffler },
8214779705SSam Leffler };
8314779705SSam Leffler
8414779705SSam Leffler HAL_RATE_TABLE ar5212_turbog_table = {
8514779705SSam Leffler 7, /* number of rates */
8614779705SSam Leffler { 0 },
8714779705SSam Leffler {
8814779705SSam Leffler /* short ctrl */
8914779705SSam Leffler /* valid rateCode Preamble dot11Rate Rate */
9019ea87c4SSam Leffler /* 6 Mb */ { AH_TRUE, TURBO, 12000, 0x0b, 0x00, (0x80|12), 0 },
9119ea87c4SSam Leffler /* 12 Mb */ { AH_TRUE, TURBO, 24000, 0x0a, 0x00, (0x80|24), 1 },
9219ea87c4SSam Leffler /* 18 Mb */ { AH_TRUE, TURBO, 36000, 0x0e, 0x00, 36, 1 },
9319ea87c4SSam Leffler /* 24 Mb */ { AH_TRUE, TURBO, 48000, 0x09, 0x00, (0x80|48), 2 },
9419ea87c4SSam Leffler /* 36 Mb */ { AH_TRUE, TURBO, 72000, 0x0d, 0x00, 72, 2 },
9519ea87c4SSam Leffler /* 48 Mb */ { AH_TRUE, TURBO, 96000, 0x08, 0x00, 96, 2 },
9619ea87c4SSam Leffler /* 54 Mb */ { AH_TRUE, TURBO, 108000, 0x0c, 0x00, 108, 2 }
9714779705SSam Leffler },
9814779705SSam Leffler };
9914779705SSam Leffler
10014779705SSam Leffler HAL_RATE_TABLE ar5212_turboa_table = {
10114779705SSam Leffler 8, /* number of rates */
10214779705SSam Leffler { 0 },
10314779705SSam Leffler {
10414779705SSam Leffler /* short ctrl */
10514779705SSam Leffler /* valid rateCode Preamble dot11Rate Rate */
10619ea87c4SSam Leffler /* 6 Mb */ { AH_TRUE, TURBO, 12000, 0x0b, 0x00, (0x80|12), 0 },
10719ea87c4SSam Leffler /* 9 Mb */ { AH_TRUE, TURBO, 18000, 0x0f, 0x00, 18, 0 },
10819ea87c4SSam Leffler /* 12 Mb */ { AH_TRUE, TURBO, 24000, 0x0a, 0x00, (0x80|24), 2 },
10919ea87c4SSam Leffler /* 18 Mb */ { AH_TRUE, TURBO, 36000, 0x0e, 0x00, 36, 2 },
11019ea87c4SSam Leffler /* 24 Mb */ { AH_TRUE, TURBO, 48000, 0x09, 0x00, (0x80|48), 4 },
11119ea87c4SSam Leffler /* 36 Mb */ { AH_TRUE, TURBO, 72000, 0x0d, 0x00, 72, 4 },
11219ea87c4SSam Leffler /* 48 Mb */ { AH_TRUE, TURBO, 96000, 0x08, 0x00, 96, 4 },
11319ea87c4SSam Leffler /* 54 Mb */ { AH_TRUE, TURBO, 108000, 0x0c, 0x00, 108, 4 }
11414779705SSam Leffler },
11514779705SSam Leffler };
11614779705SSam Leffler
11714779705SSam Leffler HAL_RATE_TABLE ar5212_11b_table = {
11814779705SSam Leffler 4, /* number of rates */
11914779705SSam Leffler { 0 },
12014779705SSam Leffler {
12114779705SSam Leffler /* short ctrl */
12214779705SSam Leffler /* valid rateCode Preamble dot11Rate Rate */
12314779705SSam Leffler /* 1 Mb */ { AH_TRUE, CCK, 1000, 0x1b, 0x00, (0x80| 2), 0 },
12414779705SSam Leffler /* 2 Mb */ { AH_TRUE, CCK, 2000, 0x1a, 0x04, (0x80| 4), 1 },
12514779705SSam Leffler /* 5.5 Mb */ { AH_TRUE, CCK, 5500, 0x19, 0x04, (0x80|11), 1 },
12614779705SSam Leffler /* 11 Mb */ { AH_TRUE, CCK, 11000, 0x18, 0x04, (0x80|22), 1 }
12714779705SSam Leffler },
12814779705SSam Leffler };
12914779705SSam Leffler
13014779705SSam Leffler /* Venice TODO: roundUpRate() is broken when the rate table does not represent rates
13114779705SSam Leffler * in increasing order e.g. 5.5, 11, 6, 9.
13214779705SSam Leffler * An average rate of 6 Mbps will currently map to 11 Mbps.
13314779705SSam Leffler */
13414779705SSam Leffler HAL_RATE_TABLE ar5212_11g_table = {
13514779705SSam Leffler 12, /* number of rates */
13614779705SSam Leffler { 0 },
13714779705SSam Leffler {
13814779705SSam Leffler /* short ctrl */
13914779705SSam Leffler /* valid rateCode Preamble dot11Rate Rate */
14014779705SSam Leffler /* 1 Mb */ { AH_TRUE, CCK, 1000, 0x1b, 0x00, (0x80| 2), 0 },
14114779705SSam Leffler /* 2 Mb */ { AH_TRUE, CCK, 2000, 0x1a, 0x04, (0x80| 4), 1 },
14214779705SSam Leffler /* 5.5 Mb */ { AH_TRUE, CCK, 5500, 0x19, 0x04, (0x80|11), 2 },
14314779705SSam Leffler /* 11 Mb */ { AH_TRUE, CCK, 11000, 0x18, 0x04, (0x80|22), 3 },
14414779705SSam Leffler /* remove rates 6, 9 from rate ctrl */
14514779705SSam Leffler /* 6 Mb */ { AH_FALSE, OFDM, 6000, 0x0b, 0x00, 12, 4 },
14614779705SSam Leffler /* 9 Mb */ { AH_FALSE, OFDM, 9000, 0x0f, 0x00, 18, 4 },
14714779705SSam Leffler /* 12 Mb */ { AH_TRUE, OFDM, 12000, 0x0a, 0x00, 24, 6 },
14814779705SSam Leffler /* 18 Mb */ { AH_TRUE, OFDM, 18000, 0x0e, 0x00, 36, 6 },
14914779705SSam Leffler /* 24 Mb */ { AH_TRUE, OFDM, 24000, 0x09, 0x00, 48, 8 },
15014779705SSam Leffler /* 36 Mb */ { AH_TRUE, OFDM, 36000, 0x0d, 0x00, 72, 8 },
15114779705SSam Leffler /* 48 Mb */ { AH_TRUE, OFDM, 48000, 0x08, 0x00, 96, 8 },
15214779705SSam Leffler /* 54 Mb */ { AH_TRUE, OFDM, 54000, 0x0c, 0x00, 108, 8 }
15314779705SSam Leffler },
15414779705SSam Leffler };
15514779705SSam Leffler
15614779705SSam Leffler #undef OFDM
15714779705SSam Leffler #undef CCK
15814779705SSam Leffler #undef TURBO
15914779705SSam Leffler #undef XR
16014779705SSam Leffler
16114779705SSam Leffler const HAL_RATE_TABLE *
ar5212GetRateTable(struct ath_hal * ah,u_int mode)16214779705SSam Leffler ar5212GetRateTable(struct ath_hal *ah, u_int mode)
16314779705SSam Leffler {
16414779705SSam Leffler HAL_RATE_TABLE *rt;
16514779705SSam Leffler switch (mode) {
16614779705SSam Leffler case HAL_MODE_11A:
16714779705SSam Leffler rt = &ar5212_11a_table;
16814779705SSam Leffler break;
16914779705SSam Leffler case HAL_MODE_11B:
17014779705SSam Leffler rt = &ar5212_11b_table;
17114779705SSam Leffler break;
17214779705SSam Leffler case HAL_MODE_11G:
17314779705SSam Leffler #ifdef notdef
17414779705SSam Leffler case HAL_MODE_PUREG:
17514779705SSam Leffler #endif
17614779705SSam Leffler rt = &ar5212_11g_table;
17714779705SSam Leffler break;
17814779705SSam Leffler case HAL_MODE_108A:
17914779705SSam Leffler case HAL_MODE_TURBO:
18014779705SSam Leffler rt = &ar5212_turboa_table;
18114779705SSam Leffler break;
18214779705SSam Leffler case HAL_MODE_108G:
18314779705SSam Leffler rt = &ar5212_turbog_table;
18414779705SSam Leffler break;
18514779705SSam Leffler case HAL_MODE_11A_HALF_RATE:
18614779705SSam Leffler case HAL_MODE_11G_HALF_RATE:
18714779705SSam Leffler rt = &ar5212_half_table;
18814779705SSam Leffler break;
18914779705SSam Leffler case HAL_MODE_11A_QUARTER_RATE:
19014779705SSam Leffler case HAL_MODE_11G_QUARTER_RATE:
19114779705SSam Leffler rt = &ar5212_quarter_table;
19214779705SSam Leffler break;
19314779705SSam Leffler default:
19414779705SSam Leffler HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid mode 0x%x\n",
19514779705SSam Leffler __func__, mode);
19614779705SSam Leffler return AH_NULL;
19714779705SSam Leffler }
19814779705SSam Leffler ath_hal_setupratetable(ah, rt);
19914779705SSam Leffler return rt;
20014779705SSam Leffler }
201