1 /*- 2 * SPDX-License-Identifier: ISC 3 * 4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 5 * Copyright (c) 2002-2008 Atheros Communications, Inc. 6 * 7 * Permission to use, copy, modify, and/or distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 #include "ah_devid.h" 24 #ifdef AH_DEBUG 25 #include "ah_desc.h" /* NB: for HAL_PHYERR* */ 26 #endif 27 28 #include "ar5212/ar5212.h" 29 #include "ar5212/ar5212reg.h" 30 #include "ar5212/ar5212phy.h" 31 32 #define AR_NUM_GPIO 6 /* 6 GPIO pins */ 33 #define AR_GPIOD_MASK 0x0000002F /* GPIO data reg r/w mask */ 34 35 /* 36 * Configure GPIO Output lines 37 */ 38 HAL_BOOL 39 ar5212GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type) 40 { 41 HALASSERT(gpio < AR_NUM_GPIO); 42 43 /* 44 * NB: AR_GPIOCR_CR_A(pin) is all 1's so there's no need 45 * to clear the field before or'ing in the new value. 46 */ 47 OS_REG_WRITE(ah, AR_GPIOCR, 48 OS_REG_READ(ah, AR_GPIOCR) | AR_GPIOCR_CR_A(gpio)); 49 50 return AH_TRUE; 51 } 52 53 /* 54 * Configure GPIO Input lines 55 */ 56 HAL_BOOL 57 ar5212GpioCfgInput(struct ath_hal *ah, uint32_t gpio) 58 { 59 HALASSERT(gpio < AR_NUM_GPIO); 60 61 OS_REG_WRITE(ah, AR_GPIOCR, 62 (OS_REG_READ(ah, AR_GPIOCR) &~ AR_GPIOCR_CR_A(gpio)) 63 | AR_GPIOCR_CR_N(gpio)); 64 65 return AH_TRUE; 66 } 67 68 /* 69 * Once configured for I/O - set output lines 70 */ 71 HAL_BOOL 72 ar5212GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val) 73 { 74 uint32_t reg; 75 76 HALASSERT(gpio < AR_NUM_GPIO); 77 78 reg = OS_REG_READ(ah, AR_GPIODO); 79 reg &= ~(1 << gpio); 80 reg |= (val&1) << gpio; 81 82 OS_REG_WRITE(ah, AR_GPIODO, reg); 83 return AH_TRUE; 84 } 85 86 /* 87 * Once configured for I/O - get input lines 88 */ 89 uint32_t 90 ar5212GpioGet(struct ath_hal *ah, uint32_t gpio) 91 { 92 if (gpio < AR_NUM_GPIO) { 93 uint32_t val = OS_REG_READ(ah, AR_GPIODI); 94 val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1; 95 return val; 96 } else { 97 return 0xffffffff; 98 } 99 } 100 101 /* 102 * Set the GPIO Interrupt 103 */ 104 void 105 ar5212GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel) 106 { 107 uint32_t val; 108 109 /* XXX bounds check gpio */ 110 val = OS_REG_READ(ah, AR_GPIOCR); 111 val &= ~(AR_GPIOCR_CR_A(gpio) | 112 AR_GPIOCR_INT_MASK | AR_GPIOCR_INT_ENA | AR_GPIOCR_INT_SEL); 113 val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA; 114 if (ilevel) 115 val |= AR_GPIOCR_INT_SELH; /* interrupt on pin high */ 116 else 117 val |= AR_GPIOCR_INT_SELL; /* interrupt on pin low */ 118 119 /* Don't need to change anything for low level interrupt. */ 120 OS_REG_WRITE(ah, AR_GPIOCR, val); 121 122 /* Change the interrupt mask. */ 123 (void) ar5212SetInterrupts(ah, AH5212(ah)->ah_maskReg | HAL_INT_GPIO); 124 } 125