1 /* 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 24 #include "ar5212/ar5212.h" 25 #include "ar5212/ar5212reg.h" 26 #include "ar5212/ar5212phy.h" 27 28 #include "ah_eeprom_v3.h" 29 30 #define AH_5212_2425 31 #define AH_5212_2417 32 #include "ar5212/ar5212.ini" 33 34 #define N(a) (sizeof(a)/sizeof(a[0])) 35 36 struct ar2425State { 37 RF_HAL_FUNCS base; /* public state, must be first */ 38 uint16_t pcdacTable[PWR_TABLE_SIZE_2413]; 39 40 uint32_t Bank1Data[N(ar5212Bank1_2425)]; 41 uint32_t Bank2Data[N(ar5212Bank2_2425)]; 42 uint32_t Bank3Data[N(ar5212Bank3_2425)]; 43 uint32_t Bank6Data[N(ar5212Bank6_2425)]; /* 2417 is same size */ 44 uint32_t Bank7Data[N(ar5212Bank7_2425)]; 45 }; 46 #define AR2425(ah) ((struct ar2425State *) AH5212(ah)->ah_rfHal) 47 48 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 49 uint32_t numBits, uint32_t firstBit, uint32_t column); 50 51 static void 52 ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 53 int writes) 54 { 55 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes); 56 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2425, 1, writes); 57 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2425, freqIndex, writes); 58 #if 0 59 /* 60 * for SWAN similar to Condor 61 * Bit 0 enables link to go to L1 when MAC goes to sleep. 62 * Bit 3 enables the loop back the link down to reset. 63 */ 64 if (AH_PRIVATE(ah)->ah_ispcie && && ath_hal_pcieL1SKPEnable) { 65 OS_REG_WRITE(ah, AR_PCIE_PMC, 66 AR_PCIE_PMC_ENA_L1 | AR_PCIE_PMC_ENA_RESET); 67 } 68 /* 69 * for Standby issue in Swan/Condor. 70 * Bit 9 (MAC_WOW_PWR_STATE_MASK_D2)to be set to avoid skips 71 * before last Training Sequence 2 (TS2) 72 * Bit 8 (MAC_WOW_PWR_STATE_MASK_D1)to be unset to assert 73 * Power Reset along with PCI Reset 74 */ 75 OS_REG_SET_BIT(ah, AR_PCIE_PMC, MAC_WOW_PWR_STATE_MASK_D2); 76 #endif 77 } 78 79 /* 80 * Take the MHz channel value and set the Channel value 81 * 82 * ASSUMES: Writes enabled to analog bus 83 */ 84 static HAL_BOOL 85 ar2425SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 86 { 87 uint16_t freq = ath_hal_gethwchannel(ah, chan); 88 uint32_t channelSel = 0; 89 uint32_t bModeSynth = 0; 90 uint32_t aModeRefSel = 0; 91 uint32_t reg32 = 0; 92 93 OS_MARK(ah, AH_MARK_SETCHANNEL, freq); 94 95 if (freq < 4800) { 96 uint32_t txctl; 97 98 channelSel = freq - 2272; 99 channelSel = ath_hal_reverseBits(channelSel, 8); 100 101 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 102 if (freq == 2484) { 103 // Enable channel spreading for channel 14 104 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 105 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 106 } else { 107 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 108 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 109 } 110 111 } else if (((freq % 5) == 2) && (freq <= 5435)) { 112 freq = freq - 2; /* Align to even 5MHz raster */ 113 channelSel = ath_hal_reverseBits( 114 (uint32_t)(((freq - 4800)*10)/25 + 1), 8); 115 aModeRefSel = ath_hal_reverseBits(0, 2); 116 } else if ((freq % 20) == 0 && freq >= 5120) { 117 channelSel = ath_hal_reverseBits( 118 ((freq - 4800) / 20 << 2), 8); 119 aModeRefSel = ath_hal_reverseBits(1, 2); 120 } else if ((freq % 10) == 0) { 121 channelSel = ath_hal_reverseBits( 122 ((freq - 4800) / 10 << 1), 8); 123 aModeRefSel = ath_hal_reverseBits(1, 2); 124 } else if ((freq % 5) == 0) { 125 channelSel = ath_hal_reverseBits( 126 (freq - 4800) / 5, 8); 127 aModeRefSel = ath_hal_reverseBits(1, 2); 128 } else { 129 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", 130 __func__, freq); 131 return AH_FALSE; 132 } 133 134 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 135 (1 << 12) | 0x1; 136 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 137 138 reg32 >>= 8; 139 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 140 141 AH_PRIVATE(ah)->ah_curchan = chan; 142 return AH_TRUE; 143 } 144 145 /* 146 * Reads EEPROM header info from device structure and programs 147 * all rf registers 148 * 149 * REQUIRES: Access to the analog rf device 150 */ 151 static HAL_BOOL 152 ar2425SetRfRegs(struct ath_hal *ah, 153 const struct ieee80211_channel *chan, 154 uint16_t modesIndex, uint16_t *rfXpdGain) 155 { 156 #define RF_BANK_SETUP(_priv, _ix, _col) do { \ 157 int i; \ 158 for (i = 0; i < N(ar5212Bank##_ix##_2425); i++) \ 159 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\ 160 } while (0) 161 struct ath_hal_5212 *ahp = AH5212(ah); 162 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 163 struct ar2425State *priv = AR2425(ah); 164 uint16_t ob2GHz = 0, db2GHz = 0; 165 int regWrites = 0; 166 167 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", 168 __func__, chan->ic_freq, chan->ic_flags, modesIndex); 169 170 HALASSERT(priv); 171 172 /* Setup rf parameters */ 173 if (IEEE80211_IS_CHAN_B(chan)) { 174 ob2GHz = ee->ee_obFor24; 175 db2GHz = ee->ee_dbFor24; 176 } else { 177 ob2GHz = ee->ee_obFor24g; 178 db2GHz = ee->ee_dbFor24g; 179 } 180 181 /* Bank 1 Write */ 182 RF_BANK_SETUP(priv, 1, 1); 183 184 /* Bank 2 Write */ 185 RF_BANK_SETUP(priv, 2, modesIndex); 186 187 /* Bank 3 Write */ 188 RF_BANK_SETUP(priv, 3, modesIndex); 189 190 /* Bank 6 Write */ 191 RF_BANK_SETUP(priv, 6, modesIndex); 192 193 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0); 194 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0); 195 196 /* Bank 7 Setup */ 197 RF_BANK_SETUP(priv, 7, modesIndex); 198 199 /* Write Analog registers */ 200 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites); 201 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites); 202 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites); 203 if (IS_2417(ah)) { 204 HALASSERT(N(ar5212Bank6_2425) == N(ar5212Bank6_2417)); 205 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2417, priv->Bank6Data, 206 regWrites); 207 } else 208 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2425, priv->Bank6Data, 209 regWrites); 210 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites); 211 212 /* Now that we have reprogrammed rfgain value, clear the flag. */ 213 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 214 215 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__); 216 return AH_TRUE; 217 #undef RF_BANK_SETUP 218 } 219 220 /* 221 * Return a reference to the requested RF Bank. 222 */ 223 static uint32_t * 224 ar2425GetRfBank(struct ath_hal *ah, int bank) 225 { 226 struct ar2425State *priv = AR2425(ah); 227 228 HALASSERT(priv != AH_NULL); 229 switch (bank) { 230 case 1: return priv->Bank1Data; 231 case 2: return priv->Bank2Data; 232 case 3: return priv->Bank3Data; 233 case 6: return priv->Bank6Data; 234 case 7: return priv->Bank7Data; 235 } 236 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 237 __func__, bank); 238 return AH_NULL; 239 } 240 241 /* 242 * Return indices surrounding the value in sorted integer lists. 243 * 244 * NB: the input list is assumed to be sorted in ascending order 245 */ 246 static void 247 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, 248 uint32_t *vlo, uint32_t *vhi) 249 { 250 int16_t target = v; 251 const uint16_t *ep = lp+listSize; 252 const uint16_t *tp; 253 254 /* 255 * Check first and last elements for out-of-bounds conditions. 256 */ 257 if (target < lp[0]) { 258 *vlo = *vhi = 0; 259 return; 260 } 261 if (target >= ep[-1]) { 262 *vlo = *vhi = listSize - 1; 263 return; 264 } 265 266 /* look for value being near or between 2 values in list */ 267 for (tp = lp; tp < ep; tp++) { 268 /* 269 * If value is close to the current value of the list 270 * then target is not between values, it is one of the values 271 */ 272 if (*tp == target) { 273 *vlo = *vhi = tp - (const uint16_t *) lp; 274 return; 275 } 276 /* 277 * Look for value being between current value and next value 278 * if so return these 2 values 279 */ 280 if (target < tp[1]) { 281 *vlo = tp - (const uint16_t *) lp; 282 *vhi = *vlo + 1; 283 return; 284 } 285 } 286 } 287 288 /* 289 * Fill the Vpdlist for indices Pmax-Pmin 290 */ 291 static HAL_BOOL 292 ar2425FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, 293 const int16_t *pwrList, const uint16_t *VpdList, 294 uint16_t numIntercepts, 295 uint16_t retVpdList[][64]) 296 { 297 uint16_t ii, jj, kk; 298 int16_t currPwr = (int16_t)(2*Pmin); 299 /* since Pmin is pwr*2 and pwrList is 4*pwr */ 300 uint32_t idxL, idxR; 301 302 ii = 0; 303 jj = 0; 304 305 if (numIntercepts < 2) 306 return AH_FALSE; 307 308 while (ii <= (uint16_t)(Pmax - Pmin)) { 309 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList, 310 numIntercepts, &(idxL), &(idxR)); 311 if (idxR < 1) 312 idxR = 1; /* extrapolate below */ 313 if (idxL == (uint32_t)(numIntercepts - 1)) 314 idxL = numIntercepts - 2; /* extrapolate above */ 315 if (pwrList[idxL] == pwrList[idxR]) 316 kk = VpdList[idxL]; 317 else 318 kk = (uint16_t) 319 (((currPwr - pwrList[idxL])*VpdList[idxR]+ 320 (pwrList[idxR] - currPwr)*VpdList[idxL])/ 321 (pwrList[idxR] - pwrList[idxL])); 322 retVpdList[pdGainIdx][ii] = kk; 323 ii++; 324 currPwr += 2; /* half dB steps */ 325 } 326 327 return AH_TRUE; 328 } 329 330 /* 331 * Returns interpolated or the scaled up interpolated value 332 */ 333 static int16_t 334 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 335 int16_t targetLeft, int16_t targetRight) 336 { 337 int16_t rv; 338 339 if (srcRight != srcLeft) { 340 rv = ((target - srcLeft)*targetRight + 341 (srcRight - target)*targetLeft) / (srcRight - srcLeft); 342 } else { 343 rv = targetLeft; 344 } 345 return rv; 346 } 347 348 /* 349 * Uses the data points read from EEPROM to reconstruct the pdadc power table 350 * Called by ar2425SetPowerTable() 351 */ 352 static void 353 ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, 354 const RAW_DATA_STRUCT_2413 *pRawDataset, 355 uint16_t pdGainOverlap_t2, 356 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], 357 uint16_t pPdGainValues[], uint16_t pPDADCValues[]) 358 { 359 /* Note the items statically allocated below are to reduce stack usage */ 360 uint32_t ii, jj, kk; 361 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */ 362 uint32_t idxL, idxR; 363 uint32_t numPdGainsUsed = 0; 364 static uint16_t VpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 365 /* filled out Vpd table for all pdGains (chanL) */ 366 static uint16_t VpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 367 /* filled out Vpd table for all pdGains (chanR) */ 368 static uint16_t VpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 369 /* filled out Vpd table for all pdGains (interpolated) */ 370 /* 371 * If desired to support -ve power levels in future, just 372 * change pwr_I_0 to signed 5-bits. 373 */ 374 static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 375 /* to accommodate -ve power levels later on. */ 376 static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 377 /* to accommodate -ve power levels later on */ 378 uint16_t numVpd = 0; 379 uint16_t Vpd_step; 380 int16_t tmpVal ; 381 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex; 382 383 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "==>%s:\n", __func__); 384 385 /* Get upper lower index */ 386 GetLowerUpperIndex(channel, pRawDataset->pChannels, 387 pRawDataset->numChannels, &(idxL), &(idxR)); 388 389 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 390 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 391 /* work backwards 'cause highest pdGain for lowest power */ 392 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd; 393 if (numVpd > 0) { 394 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain; 395 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]; 396 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) { 397 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]; 398 } 399 Pmin_t2[numPdGainsUsed] = (int16_t) 400 (Pmin_t2[numPdGainsUsed] / 2); 401 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 402 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]) 403 Pmax_t2[numPdGainsUsed] = 404 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 405 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2); 406 ar2425FillVpdTable( 407 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 408 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]), 409 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L 410 ); 411 ar2425FillVpdTable( 412 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 413 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]), 414 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R 415 ); 416 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) { 417 VpdTable_I[numPdGainsUsed][kk] = 418 interpolate_signed( 419 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR], 420 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]); 421 } 422 /* fill VpdTable_I for this pdGain */ 423 numPdGainsUsed++; 424 } 425 /* if this pdGain is used */ 426 } 427 428 *pMinCalPower = Pmin_t2[0]; 429 kk = 0; /* index for the final table */ 430 for (ii = 0; ii < numPdGainsUsed; ii++) { 431 if (ii == (numPdGainsUsed - 1)) 432 pPdGainBoundaries[ii] = Pmax_t2[ii] + 433 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB; 434 else 435 pPdGainBoundaries[ii] = (uint16_t) 436 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 ); 437 438 /* Find starting index for this pdGain */ 439 if (ii == 0) 440 ss = 0; /* for the first pdGain, start from index 0 */ 441 else 442 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) - 443 pdGainOverlap_t2; 444 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]); 445 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 446 /* 447 *-ve ss indicates need to extrapolate data below for this pdGain 448 */ 449 while (ss < 0) { 450 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step); 451 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal); 452 ss++; 453 } 454 455 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii]; 456 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii]; 457 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable; 458 459 while (ss < (int16_t)maxIndex) 460 pPDADCValues[kk++] = VpdTable_I[ii][ss++]; 461 462 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] - 463 VpdTable_I[ii][sizeCurrVpdTable-2]); 464 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 465 /* 466 * for last gain, pdGainBoundary == Pmax_t2, so will 467 * have to extrapolate 468 */ 469 if (tgtIndex > maxIndex) { /* need to extrapolate above */ 470 while(ss < (int16_t)tgtIndex) { 471 tmpVal = (uint16_t) 472 (VpdTable_I[ii][sizeCurrVpdTable-1] + 473 (ss-maxIndex)*Vpd_step); 474 pPDADCValues[kk++] = (tmpVal > 127) ? 475 127 : tmpVal; 476 ss++; 477 } 478 } /* extrapolated above */ 479 } /* for all pdGainUsed */ 480 481 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) { 482 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1]; 483 ii++; 484 } 485 while (kk < 128) { 486 pPDADCValues[kk] = pPDADCValues[kk-1]; 487 kk++; 488 } 489 490 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__); 491 } 492 493 494 /* Same as 2413 set power table */ 495 static HAL_BOOL 496 ar2425SetPowerTable(struct ath_hal *ah, 497 int16_t *minPower, int16_t *maxPower, 498 const struct ieee80211_channel *chan, 499 uint16_t *rfXpdGain) 500 { 501 uint16_t freq = ath_hal_gethwchannel(ah, chan); 502 struct ath_hal_5212 *ahp = AH5212(ah); 503 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 504 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 505 uint16_t pdGainOverlap_t2; 506 int16_t minCalPower2413_t2; 507 uint16_t *pdadcValues = ahp->ah_pcdacTable; 508 uint16_t gainBoundaries[4]; 509 uint32_t i, reg32, regoffset; 510 511 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s:chan 0x%x flag 0x%x\n", 512 __func__, freq, chan->ic_flags); 513 514 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 515 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 516 else if (IEEE80211_IS_CHAN_B(chan)) 517 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 518 else { 519 HALDEBUG(ah, HAL_DEBUG_ANY, "%s:illegal mode\n", __func__); 520 return AH_FALSE; 521 } 522 523 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), 524 AR_PHY_TPCRG5_PD_GAIN_OVERLAP); 525 526 ar2425getGainBoundariesAndPdadcsForPowers(ah, freq, 527 pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries, 528 rfXpdGain, pdadcValues); 529 530 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 531 (pRawDataset->pDataPerChannel[0].numPdGains - 1)); 532 533 /* 534 * Note the pdadc table may not start at 0 dBm power, could be 535 * negative or greater than 0. Need to offset the power 536 * values by the amount of minPower for griffin 537 */ 538 if (minCalPower2413_t2 != 0) 539 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2); 540 else 541 ahp->ah_txPowerIndexOffset = 0; 542 543 /* Finally, write the power values into the baseband power table */ 544 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */ 545 for (i = 0; i < 32; i++) { 546 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 547 ((pdadcValues[4*i + 1] & 0xFF) << 8) | 548 ((pdadcValues[4*i + 2] & 0xFF) << 16) | 549 ((pdadcValues[4*i + 3] & 0xFF) << 24) ; 550 OS_REG_WRITE(ah, regoffset, reg32); 551 regoffset += 4; 552 } 553 554 OS_REG_WRITE(ah, AR_PHY_TPCRG5, 555 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 556 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 557 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 558 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 559 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); 560 561 return AH_TRUE; 562 } 563 564 static int16_t 565 ar2425GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 566 { 567 uint32_t ii,jj; 568 uint16_t Pmin=0,numVpd; 569 570 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 571 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 572 /* work backwards 'cause highest pdGain for lowest power */ 573 numVpd = data->pDataPerPDGain[jj].numVpd; 574 if (numVpd > 0) { 575 Pmin = data->pDataPerPDGain[jj].pwr_t4[0]; 576 return(Pmin); 577 } 578 } 579 return(Pmin); 580 } 581 582 static int16_t 583 ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 584 { 585 uint32_t ii; 586 uint16_t Pmax=0,numVpd; 587 588 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 589 /* work forwards cuase lowest pdGain for highest power */ 590 numVpd = data->pDataPerPDGain[ii].numVpd; 591 if (numVpd > 0) { 592 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1]; 593 return(Pmax); 594 } 595 } 596 return(Pmax); 597 } 598 599 static 600 HAL_BOOL 601 ar2425GetChannelMaxMinPower(struct ath_hal *ah, 602 const struct ieee80211_channel *chan, 603 int16_t *maxPow, int16_t *minPow) 604 { 605 uint16_t freq = chan->ic_freq; /* NB: never mapped */ 606 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 607 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 608 const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL; 609 uint16_t numChannels; 610 int totalD,totalF, totalMin,last, i; 611 612 *maxPow = 0; 613 614 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 615 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 616 else if (IEEE80211_IS_CHAN_B(chan)) 617 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 618 else 619 return(AH_FALSE); 620 621 numChannels = pRawDataset->numChannels; 622 data = pRawDataset->pDataPerChannel; 623 624 /* Make sure the channel is in the range of the TP values 625 * (freq piers) 626 */ 627 if (numChannels < 1) 628 return(AH_FALSE); 629 630 if ((freq < data[0].channelValue) || 631 (freq > data[numChannels-1].channelValue)) { 632 if (freq < data[0].channelValue) { 633 *maxPow = ar2425GetMaxPower(ah, &data[0]); 634 *minPow = ar2425GetMinPower(ah, &data[0]); 635 return(AH_TRUE); 636 } else { 637 *maxPow = ar2425GetMaxPower(ah, &data[numChannels - 1]); 638 *minPow = ar2425GetMinPower(ah, &data[numChannels - 1]); 639 return(AH_TRUE); 640 } 641 } 642 643 /* Linearly interpolate the power value now */ 644 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); 645 last = i++); 646 totalD = data[i].channelValue - data[last].channelValue; 647 if (totalD > 0) { 648 totalF = ar2425GetMaxPower(ah, &data[i]) - ar2425GetMaxPower(ah, &data[last]); 649 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + 650 ar2425GetMaxPower(ah, &data[last])*totalD)/totalD); 651 totalMin = ar2425GetMinPower(ah, &data[i]) - ar2425GetMinPower(ah, &data[last]); 652 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + 653 ar2425GetMinPower(ah, &data[last])*totalD)/totalD); 654 return(AH_TRUE); 655 } else { 656 if (freq == data[i].channelValue) { 657 *maxPow = ar2425GetMaxPower(ah, &data[i]); 658 *minPow = ar2425GetMinPower(ah, &data[i]); 659 return(AH_TRUE); 660 } else 661 return(AH_FALSE); 662 } 663 } 664 665 /* 666 * Free memory for analog bank scratch buffers 667 */ 668 static void 669 ar2425RfDetach(struct ath_hal *ah) 670 { 671 struct ath_hal_5212 *ahp = AH5212(ah); 672 673 HALASSERT(ahp->ah_rfHal != AH_NULL); 674 ath_hal_free(ahp->ah_rfHal); 675 ahp->ah_rfHal = AH_NULL; 676 } 677 678 /* 679 * Allocate memory for analog bank scratch buffers 680 * Scratch Buffer will be reinitialized every reset so no need to zero now 681 */ 682 static HAL_BOOL 683 ar2425RfAttach(struct ath_hal *ah, HAL_STATUS *status) 684 { 685 struct ath_hal_5212 *ahp = AH5212(ah); 686 struct ar2425State *priv; 687 688 HALASSERT(ah->ah_magic == AR5212_MAGIC); 689 690 HALASSERT(ahp->ah_rfHal == AH_NULL); 691 priv = ath_hal_malloc(sizeof(struct ar2425State)); 692 if (priv == AH_NULL) { 693 HALDEBUG(ah, HAL_DEBUG_ANY, 694 "%s: cannot allocate private state\n", __func__); 695 *status = HAL_ENOMEM; /* XXX */ 696 return AH_FALSE; 697 } 698 priv->base.rfDetach = ar2425RfDetach; 699 priv->base.writeRegs = ar2425WriteRegs; 700 priv->base.getRfBank = ar2425GetRfBank; 701 priv->base.setChannel = ar2425SetChannel; 702 priv->base.setRfRegs = ar2425SetRfRegs; 703 priv->base.setPowerTable = ar2425SetPowerTable; 704 priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower; 705 priv->base.getNfAdjust = ar5212GetNfAdjust; 706 707 ahp->ah_pcdacTable = priv->pcdacTable; 708 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 709 ahp->ah_rfHal = &priv->base; 710 711 return AH_TRUE; 712 } 713 714 static HAL_BOOL 715 ar2425Probe(struct ath_hal *ah) 716 { 717 return IS_2425(ah) || IS_2417(ah); 718 } 719 AH_RF(RF2425, ar2425Probe, ar2425RfAttach); 720