1 /* 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2006 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $FreeBSD$ 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 #include "ah_devid.h" 24 25 #include "ar5211/ar5211.h" 26 #include "ar5211/ar5211reg.h" 27 #include "ar5211/ar5211phy.h" 28 29 #include "ah_eeprom_v3.h" 30 31 static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah, 32 uint16_t flags, uint16_t *low, uint16_t *high); 33 static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah, 34 struct ieee80211_channel *chan); 35 36 static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, 37 HAL_BOOL power_off); 38 static void ar5211DisablePCIE(struct ath_hal *ah); 39 40 static const struct ath_hal_private ar5211hal = {{ 41 .ah_magic = AR5211_MAGIC, 42 43 .ah_getRateTable = ar5211GetRateTable, 44 .ah_detach = ar5211Detach, 45 46 /* Reset Functions */ 47 .ah_reset = ar5211Reset, 48 .ah_phyDisable = ar5211PhyDisable, 49 .ah_disable = ar5211Disable, 50 .ah_configPCIE = ar5211ConfigPCIE, 51 .ah_disablePCIE = ar5211DisablePCIE, 52 .ah_setPCUConfig = ar5211SetPCUConfig, 53 .ah_perCalibration = ar5211PerCalibration, 54 .ah_perCalibrationN = ar5211PerCalibrationN, 55 .ah_resetCalValid = ar5211ResetCalValid, 56 .ah_setTxPowerLimit = ar5211SetTxPowerLimit, 57 .ah_getChanNoise = ath_hal_getChanNoise, 58 59 /* Transmit functions */ 60 .ah_updateTxTrigLevel = ar5211UpdateTxTrigLevel, 61 .ah_setupTxQueue = ar5211SetupTxQueue, 62 .ah_setTxQueueProps = ar5211SetTxQueueProps, 63 .ah_getTxQueueProps = ar5211GetTxQueueProps, 64 .ah_releaseTxQueue = ar5211ReleaseTxQueue, 65 .ah_resetTxQueue = ar5211ResetTxQueue, 66 .ah_getTxDP = ar5211GetTxDP, 67 .ah_setTxDP = ar5211SetTxDP, 68 .ah_numTxPending = ar5211NumTxPending, 69 .ah_startTxDma = ar5211StartTxDma, 70 .ah_stopTxDma = ar5211StopTxDma, 71 .ah_setupTxDesc = ar5211SetupTxDesc, 72 .ah_setupXTxDesc = ar5211SetupXTxDesc, 73 .ah_fillTxDesc = ar5211FillTxDesc, 74 .ah_procTxDesc = ar5211ProcTxDesc, 75 .ah_getTxIntrQueue = ar5211GetTxIntrQueue, 76 .ah_reqTxIntrDesc = ar5211IntrReqTxDesc, 77 .ah_getTxCompletionRates = ar5211GetTxCompletionRates, 78 .ah_setTxDescLink = ar5211SetTxDescLink, 79 .ah_getTxDescLink = ar5211GetTxDescLink, 80 .ah_getTxDescLinkPtr = ar5211GetTxDescLinkPtr, 81 82 /* RX Functions */ 83 .ah_getRxDP = ar5211GetRxDP, 84 .ah_setRxDP = ar5211SetRxDP, 85 .ah_enableReceive = ar5211EnableReceive, 86 .ah_stopDmaReceive = ar5211StopDmaReceive, 87 .ah_startPcuReceive = ar5211StartPcuReceive, 88 .ah_stopPcuReceive = ar5211StopPcuReceive, 89 .ah_setMulticastFilter = ar5211SetMulticastFilter, 90 .ah_setMulticastFilterIndex = ar5211SetMulticastFilterIndex, 91 .ah_clrMulticastFilterIndex = ar5211ClrMulticastFilterIndex, 92 .ah_getRxFilter = ar5211GetRxFilter, 93 .ah_setRxFilter = ar5211SetRxFilter, 94 .ah_setupRxDesc = ar5211SetupRxDesc, 95 .ah_procRxDesc = ar5211ProcRxDesc, 96 .ah_rxMonitor = ar5211RxMonitor, 97 .ah_aniPoll = ar5211AniPoll, 98 .ah_procMibEvent = ar5211MibEvent, 99 100 /* Misc Functions */ 101 .ah_getCapability = ar5211GetCapability, 102 .ah_setCapability = ar5211SetCapability, 103 .ah_getDiagState = ar5211GetDiagState, 104 .ah_getMacAddress = ar5211GetMacAddress, 105 .ah_setMacAddress = ar5211SetMacAddress, 106 .ah_getBssIdMask = ar5211GetBssIdMask, 107 .ah_setBssIdMask = ar5211SetBssIdMask, 108 .ah_setRegulatoryDomain = ar5211SetRegulatoryDomain, 109 .ah_setLedState = ar5211SetLedState, 110 .ah_writeAssocid = ar5211WriteAssocid, 111 .ah_gpioCfgInput = ar5211GpioCfgInput, 112 .ah_gpioCfgOutput = ar5211GpioCfgOutput, 113 .ah_gpioGet = ar5211GpioGet, 114 .ah_gpioSet = ar5211GpioSet, 115 .ah_gpioSetIntr = ar5211GpioSetIntr, 116 .ah_getTsf32 = ar5211GetTsf32, 117 .ah_getTsf64 = ar5211GetTsf64, 118 .ah_resetTsf = ar5211ResetTsf, 119 .ah_detectCardPresent = ar5211DetectCardPresent, 120 .ah_updateMibCounters = ar5211UpdateMibCounters, 121 .ah_getRfGain = ar5211GetRfgain, 122 .ah_getDefAntenna = ar5211GetDefAntenna, 123 .ah_setDefAntenna = ar5211SetDefAntenna, 124 .ah_getAntennaSwitch = ar5211GetAntennaSwitch, 125 .ah_setAntennaSwitch = ar5211SetAntennaSwitch, 126 .ah_setSifsTime = ar5211SetSifsTime, 127 .ah_getSifsTime = ar5211GetSifsTime, 128 .ah_setSlotTime = ar5211SetSlotTime, 129 .ah_getSlotTime = ar5211GetSlotTime, 130 .ah_setAckTimeout = ar5211SetAckTimeout, 131 .ah_getAckTimeout = ar5211GetAckTimeout, 132 .ah_setAckCTSRate = ar5211SetAckCTSRate, 133 .ah_getAckCTSRate = ar5211GetAckCTSRate, 134 .ah_setCTSTimeout = ar5211SetCTSTimeout, 135 .ah_getCTSTimeout = ar5211GetCTSTimeout, 136 .ah_setDecompMask = ar5211SetDecompMask, 137 .ah_setCoverageClass = ar5211SetCoverageClass, 138 .ah_get11nExtBusy = ar5211Get11nExtBusy, 139 .ah_getMibCycleCounts = ar5211GetMibCycleCounts, 140 .ah_enableDfs = ar5211EnableDfs, 141 .ah_getDfsThresh = ar5211GetDfsThresh, 142 /* XXX procRadarEvent */ 143 /* XXX isFastClockEnabled */ 144 145 /* Key Cache Functions */ 146 .ah_getKeyCacheSize = ar5211GetKeyCacheSize, 147 .ah_resetKeyCacheEntry = ar5211ResetKeyCacheEntry, 148 .ah_isKeyCacheEntryValid = ar5211IsKeyCacheEntryValid, 149 .ah_setKeyCacheEntry = ar5211SetKeyCacheEntry, 150 .ah_setKeyCacheEntryMac = ar5211SetKeyCacheEntryMac, 151 152 /* Power Management Functions */ 153 .ah_setPowerMode = ar5211SetPowerMode, 154 .ah_getPowerMode = ar5211GetPowerMode, 155 156 /* Beacon Functions */ 157 .ah_setBeaconTimers = ar5211SetBeaconTimers, 158 .ah_beaconInit = ar5211BeaconInit, 159 .ah_setStationBeaconTimers = ar5211SetStaBeaconTimers, 160 .ah_resetStationBeaconTimers = ar5211ResetStaBeaconTimers, 161 .ah_getNextTBTT = ar5211GetNextTBTT, 162 163 /* Interrupt Functions */ 164 .ah_isInterruptPending = ar5211IsInterruptPending, 165 .ah_getPendingInterrupts = ar5211GetPendingInterrupts, 166 .ah_getInterrupts = ar5211GetInterrupts, 167 .ah_setInterrupts = ar5211SetInterrupts }, 168 169 .ah_getChannelEdges = ar5211GetChannelEdges, 170 .ah_getWirelessModes = ar5211GetWirelessModes, 171 .ah_eepromRead = ar5211EepromRead, 172 #ifdef AH_SUPPORT_WRITE_EEPROM 173 .ah_eepromWrite = ar5211EepromWrite, 174 #endif 175 .ah_getChipPowerLimits = ar5211GetChipPowerLimits, 176 }; 177 178 static HAL_BOOL ar5211ChipTest(struct ath_hal *); 179 static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah); 180 181 /* 182 * Return the revsion id for the radio chip. This 183 * fetched via the PHY. 184 */ 185 static uint32_t 186 ar5211GetRadioRev(struct ath_hal *ah) 187 { 188 uint32_t val; 189 int i; 190 191 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16); 192 for (i = 0; i < 8; i++) 193 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000); 194 val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff; 195 val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4); 196 return ath_hal_reverseBits(val, 8); 197 } 198 199 /* 200 * Attach for an AR5211 part. 201 */ 202 static struct ath_hal * 203 ar5211Attach(uint16_t devid, HAL_SOFTC sc, 204 HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, 205 HAL_STATUS *status) 206 { 207 #define N(a) (sizeof(a)/sizeof(a[0])) 208 struct ath_hal_5211 *ahp; 209 struct ath_hal *ah; 210 uint32_t val; 211 uint16_t eeval; 212 HAL_STATUS ecode; 213 214 HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n", 215 __func__, sc, (void*) st, (void*) sh); 216 217 /* NB: memory is returned zero'd */ 218 ahp = ath_hal_malloc(sizeof (struct ath_hal_5211)); 219 if (ahp == AH_NULL) { 220 HALDEBUG(AH_NULL, HAL_DEBUG_ANY, 221 "%s: cannot allocate memory for state block\n", __func__); 222 ecode = HAL_ENOMEM; 223 goto bad; 224 } 225 ah = &ahp->ah_priv.h; 226 /* set initial values */ 227 OS_MEMCPY(&ahp->ah_priv, &ar5211hal, sizeof(struct ath_hal_private)); 228 ah->ah_sc = sc; 229 ah->ah_st = st; 230 ah->ah_sh = sh; 231 232 ah->ah_devid = devid; /* NB: for AH_DEBUG_ALQ */ 233 AH_PRIVATE(ah)->ah_devid = devid; 234 AH_PRIVATE(ah)->ah_subvendorid = 0; /* XXX */ 235 236 AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER; 237 AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */ 238 239 ahp->ah_diversityControl = HAL_ANT_VARIABLE; 240 ahp->ah_staId1Defaults = 0; 241 ahp->ah_rssiThr = INIT_RSSI_THR; 242 ahp->ah_sifstime = (u_int) -1; 243 ahp->ah_slottime = (u_int) -1; 244 ahp->ah_acktimeout = (u_int) -1; 245 ahp->ah_ctstimeout = (u_int) -1; 246 247 if (!ar5211ChipReset(ah, AH_NULL)) { /* reset chip */ 248 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__); 249 ecode = HAL_EIO; 250 goto bad; 251 } 252 if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B) { 253 /* set it back to OFDM mode to be able to read analog rev id */ 254 OS_REG_WRITE(ah, AR5211_PHY_MODE, AR5211_PHY_MODE_OFDM); 255 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44); 256 OS_DELAY(1000); 257 } 258 259 /* Read Revisions from Chips */ 260 val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M; 261 AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S; 262 AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M; 263 264 if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_MAUI_2 || 265 AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_OAHU) { 266 HALDEBUG(ah, HAL_DEBUG_ANY, 267 "%s: Mac Chip Rev 0x%x is not supported by this driver\n", 268 __func__, AH_PRIVATE(ah)->ah_macVersion); 269 ecode = HAL_ENOTSUPP; 270 goto bad; 271 } 272 273 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID); 274 275 if (!ar5211ChipTest(ah)) { 276 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n", 277 __func__); 278 ecode = HAL_ESELFTEST; 279 goto bad; 280 } 281 282 /* Set correct Baseband to analog shift setting to access analog chips. */ 283 if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) { 284 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); 285 } else { 286 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047); 287 } 288 OS_DELAY(2000); 289 290 /* Read Radio Chip Rev Extract */ 291 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5211GetRadioRev(ah); 292 if ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xf0) != RAD5_SREV_MAJOR) { 293 HALDEBUG(ah, HAL_DEBUG_ANY, 294 "%s: 5G Radio Chip Rev 0x%02X is not supported by this " 295 "driver\n", __func__, AH_PRIVATE(ah)->ah_analog5GhzRev); 296 ecode = HAL_ENOTSUPP; 297 goto bad; 298 } 299 300 val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >> 301 AR_PCICFG_EEPROM_SIZE_S; 302 if (val != AR_PCICFG_EEPROM_SIZE_16K) { 303 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM size " 304 "%u (0x%x) found\n", __func__, val, val); 305 ecode = HAL_EESIZE; 306 goto bad; 307 } 308 ecode = ath_hal_legacyEepromAttach(ah); 309 if (ecode != HAL_OK) { 310 goto bad; 311 } 312 313 /* If Bmode and AR5211, verify 2.4 analog exists */ 314 if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU && 315 ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { 316 /* Set correct Baseband to analog shift setting to access analog chips. */ 317 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007); 318 OS_DELAY(2000); 319 AH_PRIVATE(ah)->ah_analog2GhzRev = ar5211GetRadioRev(ah); 320 321 /* Set baseband for 5GHz chip */ 322 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007); 323 OS_DELAY(2000); 324 if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != RAD2_SREV_MAJOR) { 325 HALDEBUG(ah, HAL_DEBUG_ANY, 326 "%s: 2G Radio Chip Rev 0x%x is not supported by " 327 "this driver\n", __func__, 328 AH_PRIVATE(ah)->ah_analog2GhzRev); 329 ecode = HAL_ENOTSUPP; 330 goto bad; 331 } 332 } else { 333 ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_FALSE); 334 } 335 336 ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval); 337 if (ecode != HAL_OK) { 338 HALDEBUG(ah, HAL_DEBUG_ANY, 339 "%s: cannot read regulatory domain from EEPROM\n", 340 __func__); 341 goto bad; 342 } 343 AH_PRIVATE(ah)->ah_currentRD = eeval; 344 AH_PRIVATE(ah)->ah_getNfAdjust = ar5211GetNfAdjust; 345 346 /* 347 * Got everything we need now to setup the capabilities. 348 */ 349 (void) ar5211FillCapabilityInfo(ah); 350 351 /* Initialize gain ladder thermal calibration structure */ 352 ar5211InitializeGainValues(ah); 353 354 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); 355 if (ecode != HAL_OK) { 356 HALDEBUG(ah, HAL_DEBUG_ANY, 357 "%s: error getting mac address from EEPROM\n", __func__); 358 goto bad; 359 } 360 361 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); 362 363 return ah; 364 bad: 365 if (ahp) 366 ar5211Detach((struct ath_hal *) ahp); 367 if (status) 368 *status = ecode; 369 return AH_NULL; 370 #undef N 371 } 372 373 void 374 ar5211Detach(struct ath_hal *ah) 375 { 376 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__); 377 378 HALASSERT(ah != AH_NULL); 379 HALASSERT(ah->ah_magic == AR5211_MAGIC); 380 381 ath_hal_eepromDetach(ah); 382 ath_hal_free(ah); 383 } 384 385 static HAL_BOOL 386 ar5211ChipTest(struct ath_hal *ah) 387 { 388 uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) }; 389 uint32_t regHold[2]; 390 uint32_t patternData[4] = 391 { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 }; 392 int i, j; 393 394 /* Test PHY & MAC registers */ 395 for (i = 0; i < 2; i++) { 396 uint32_t addr = regAddr[i]; 397 uint32_t wrData, rdData; 398 399 regHold[i] = OS_REG_READ(ah, addr); 400 for (j = 0; j < 0x100; j++) { 401 wrData = (j << 16) | j; 402 OS_REG_WRITE(ah, addr, wrData); 403 rdData = OS_REG_READ(ah, addr); 404 if (rdData != wrData) { 405 HALDEBUG(ah, HAL_DEBUG_ANY, 406 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 407 __func__, addr, wrData, rdData); 408 return AH_FALSE; 409 } 410 } 411 for (j = 0; j < 4; j++) { 412 wrData = patternData[j]; 413 OS_REG_WRITE(ah, addr, wrData); 414 rdData = OS_REG_READ(ah, addr); 415 if (wrData != rdData) { 416 HALDEBUG(ah, HAL_DEBUG_ANY, 417 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 418 __func__, addr, wrData, rdData); 419 return AH_FALSE; 420 } 421 } 422 OS_REG_WRITE(ah, regAddr[i], regHold[i]); 423 } 424 OS_DELAY(100); 425 return AH_TRUE; 426 } 427 428 /* 429 * Store the channel edges for the requested operational mode 430 */ 431 static HAL_BOOL 432 ar5211GetChannelEdges(struct ath_hal *ah, 433 uint16_t flags, uint16_t *low, uint16_t *high) 434 { 435 if (flags & IEEE80211_CHAN_5GHZ) { 436 *low = 4920; 437 *high = 6100; 438 return AH_TRUE; 439 } 440 if (flags & IEEE80211_CHAN_2GHZ && 441 ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) { 442 *low = 2312; 443 *high = 2732; 444 return AH_TRUE; 445 } 446 return AH_FALSE; 447 } 448 449 static HAL_BOOL 450 ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan) 451 { 452 /* XXX fill in, this is just a placeholder */ 453 HALDEBUG(ah, HAL_DEBUG_ATTACH, 454 "%s: no min/max power for %u/0x%x\n", 455 __func__, chan->ic_freq, chan->ic_flags); 456 chan->ic_maxpower = MAX_RATE_POWER; 457 chan->ic_minpower = 0; 458 return AH_TRUE; 459 } 460 461 static void 462 ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off) 463 { 464 } 465 466 static void 467 ar5211DisablePCIE(struct ath_hal *ah) 468 { 469 } 470 471 /* 472 * Fill all software cached or static hardware state information. 473 */ 474 static HAL_BOOL 475 ar5211FillCapabilityInfo(struct ath_hal *ah) 476 { 477 struct ath_hal_private *ahpriv = AH_PRIVATE(ah); 478 HAL_CAPABILITIES *pCap = &ahpriv->ah_caps; 479 480 /* Construct wireless mode from EEPROM */ 481 pCap->halWirelessModes = 0; 482 if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) { 483 pCap->halWirelessModes |= HAL_MODE_11A; 484 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE)) 485 pCap->halWirelessModes |= HAL_MODE_TURBO; 486 } 487 if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) 488 pCap->halWirelessModes |= HAL_MODE_11B; 489 490 pCap->halLow2GhzChan = 2312; 491 pCap->halHigh2GhzChan = 2732; 492 pCap->halLow5GhzChan = 4920; 493 pCap->halHigh5GhzChan = 6100; 494 495 pCap->halChanSpreadSupport = AH_TRUE; 496 pCap->halSleepAfterBeaconBroken = AH_TRUE; 497 pCap->halPSPollBroken = AH_TRUE; 498 pCap->halVEOLSupport = AH_TRUE; 499 pCap->halNumMRRetries = 1; /* No hardware MRR support */ 500 pCap->halNumTxMaps = 1; /* Single TX ptr per descr */ 501 502 pCap->halTotalQueues = HAL_NUM_TX_QUEUES; 503 pCap->halKeyCacheSize = 128; 504 505 /* XXX not needed */ 506 pCap->halChanHalfRate = AH_FALSE; 507 pCap->halChanQuarterRate = AH_FALSE; 508 509 /* 510 * RSSI uses the combined field; some 11n NICs may use 511 * the control chain RSSI. 512 */ 513 pCap->halUseCombinedRadarRssi = AH_TRUE; 514 515 if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) && 516 ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) { 517 /* NB: enabled by default */ 518 ahpriv->ah_rfkillEnabled = AH_TRUE; 519 pCap->halRfSilentSupport = AH_TRUE; 520 } 521 522 pCap->halTstampPrecision = 13; 523 pCap->halIntrMask = HAL_INT_COMMON 524 | HAL_INT_RX 525 | HAL_INT_TX 526 | HAL_INT_FATAL 527 | HAL_INT_BNR 528 | HAL_INT_TIM 529 ; 530 531 pCap->hal4kbSplitTransSupport = AH_TRUE; 532 pCap->halHasRxSelfLinkedTail = AH_TRUE; 533 534 /* XXX might be ok w/ some chip revs */ 535 ahpriv->ah_rxornIsFatal = AH_TRUE; 536 return AH_TRUE; 537 } 538 539 static const char* 540 ar5211Probe(uint16_t vendorid, uint16_t devid) 541 { 542 if (vendorid == ATHEROS_VENDOR_ID) { 543 if (devid == AR5211_DEVID || devid == AR5311_DEVID || 544 devid == AR5211_DEFAULT) 545 return "Atheros 5211"; 546 if (devid == AR5211_FPGA11B) 547 return "Atheros 5211 (FPGA)"; 548 } 549 return AH_NULL; 550 } 551 AH_CHIP(AR5211, ar5211Probe, ar5211Attach); 552