xref: /freebsd/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c (revision 9a14aa017b21c292740c00ee098195cd46642730)
1 /*
2  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3  * Copyright (c) 2002-2006 Atheros Communications, Inc.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  *
17  * $FreeBSD$
18  */
19 #include "opt_ah.h"
20 
21 #include "ah.h"
22 #include "ah_internal.h"
23 #include "ah_devid.h"
24 
25 #include "ar5211/ar5211.h"
26 #include "ar5211/ar5211reg.h"
27 #include "ar5211/ar5211phy.h"
28 
29 #include "ah_eeprom_v3.h"
30 
31 static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah,
32 		uint16_t flags, uint16_t *low, uint16_t *high);
33 static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah,
34 		struct ieee80211_channel *chan);
35 
36 static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
37 static void ar5211DisablePCIE(struct ath_hal *ah);
38 
39 static const struct ath_hal_private ar5211hal = {{
40 	.ah_magic			= AR5211_MAGIC,
41 
42 	.ah_getRateTable		= ar5211GetRateTable,
43 	.ah_detach			= ar5211Detach,
44 
45 	/* Reset Functions */
46 	.ah_reset			= ar5211Reset,
47 	.ah_phyDisable			= ar5211PhyDisable,
48 	.ah_disable			= ar5211Disable,
49 	.ah_configPCIE			= ar5211ConfigPCIE,
50 	.ah_disablePCIE			= ar5211DisablePCIE,
51 	.ah_setPCUConfig		= ar5211SetPCUConfig,
52 	.ah_perCalibration		= ar5211PerCalibration,
53 	.ah_perCalibrationN		= ar5211PerCalibrationN,
54 	.ah_resetCalValid		= ar5211ResetCalValid,
55 	.ah_setTxPowerLimit		= ar5211SetTxPowerLimit,
56 	.ah_getChanNoise		= ath_hal_getChanNoise,
57 
58 	/* Transmit functions */
59 	.ah_updateTxTrigLevel		= ar5211UpdateTxTrigLevel,
60 	.ah_setupTxQueue		= ar5211SetupTxQueue,
61 	.ah_setTxQueueProps             = ar5211SetTxQueueProps,
62 	.ah_getTxQueueProps             = ar5211GetTxQueueProps,
63 	.ah_releaseTxQueue		= ar5211ReleaseTxQueue,
64 	.ah_resetTxQueue		= ar5211ResetTxQueue,
65 	.ah_getTxDP			= ar5211GetTxDP,
66 	.ah_setTxDP			= ar5211SetTxDP,
67 	.ah_numTxPending		= ar5211NumTxPending,
68 	.ah_startTxDma			= ar5211StartTxDma,
69 	.ah_stopTxDma			= ar5211StopTxDma,
70 	.ah_setupTxDesc			= ar5211SetupTxDesc,
71 	.ah_setupXTxDesc		= ar5211SetupXTxDesc,
72 	.ah_fillTxDesc			= ar5211FillTxDesc,
73 	.ah_procTxDesc			= ar5211ProcTxDesc,
74 	.ah_getTxIntrQueue		= ar5211GetTxIntrQueue,
75 	.ah_reqTxIntrDesc 		= ar5211IntrReqTxDesc,
76 	.ah_getTxCompletionRates	= ar5211GetTxCompletionRates,
77 
78 	/* RX Functions */
79 	.ah_getRxDP			= ar5211GetRxDP,
80 	.ah_setRxDP			= ar5211SetRxDP,
81 	.ah_enableReceive		= ar5211EnableReceive,
82 	.ah_stopDmaReceive		= ar5211StopDmaReceive,
83 	.ah_startPcuReceive		= ar5211StartPcuReceive,
84 	.ah_stopPcuReceive		= ar5211StopPcuReceive,
85 	.ah_setMulticastFilter		= ar5211SetMulticastFilter,
86 	.ah_setMulticastFilterIndex	= ar5211SetMulticastFilterIndex,
87 	.ah_clrMulticastFilterIndex	= ar5211ClrMulticastFilterIndex,
88 	.ah_getRxFilter			= ar5211GetRxFilter,
89 	.ah_setRxFilter			= ar5211SetRxFilter,
90 	.ah_setupRxDesc			= ar5211SetupRxDesc,
91 	.ah_procRxDesc			= ar5211ProcRxDesc,
92 	.ah_rxMonitor			= ar5211RxMonitor,
93 	.ah_aniPoll			= ar5211AniPoll,
94 	.ah_procMibEvent		= ar5211MibEvent,
95 
96 	/* Misc Functions */
97 	.ah_getCapability		= ar5211GetCapability,
98 	.ah_setCapability		= ar5211SetCapability,
99 	.ah_getDiagState		= ar5211GetDiagState,
100 	.ah_getMacAddress		= ar5211GetMacAddress,
101 	.ah_setMacAddress		= ar5211SetMacAddress,
102 	.ah_getBssIdMask		= ar5211GetBssIdMask,
103 	.ah_setBssIdMask		= ar5211SetBssIdMask,
104 	.ah_setRegulatoryDomain		= ar5211SetRegulatoryDomain,
105 	.ah_setLedState			= ar5211SetLedState,
106 	.ah_writeAssocid		= ar5211WriteAssocid,
107 	.ah_gpioCfgInput		= ar5211GpioCfgInput,
108 	.ah_gpioCfgOutput		= ar5211GpioCfgOutput,
109 	.ah_gpioGet			= ar5211GpioGet,
110 	.ah_gpioSet			= ar5211GpioSet,
111 	.ah_gpioSetIntr			= ar5211GpioSetIntr,
112 	.ah_getTsf32			= ar5211GetTsf32,
113 	.ah_getTsf64			= ar5211GetTsf64,
114 	.ah_resetTsf			= ar5211ResetTsf,
115 	.ah_detectCardPresent		= ar5211DetectCardPresent,
116 	.ah_updateMibCounters		= ar5211UpdateMibCounters,
117 	.ah_getRfGain			= ar5211GetRfgain,
118 	.ah_getDefAntenna		= ar5211GetDefAntenna,
119 	.ah_setDefAntenna		= ar5211SetDefAntenna,
120 	.ah_getAntennaSwitch		= ar5211GetAntennaSwitch,
121 	.ah_setAntennaSwitch		= ar5211SetAntennaSwitch,
122 	.ah_setSifsTime			= ar5211SetSifsTime,
123 	.ah_getSifsTime			= ar5211GetSifsTime,
124 	.ah_setSlotTime			= ar5211SetSlotTime,
125 	.ah_getSlotTime			= ar5211GetSlotTime,
126 	.ah_setAckTimeout		= ar5211SetAckTimeout,
127 	.ah_getAckTimeout		= ar5211GetAckTimeout,
128 	.ah_setAckCTSRate		= ar5211SetAckCTSRate,
129 	.ah_getAckCTSRate		= ar5211GetAckCTSRate,
130 	.ah_setCTSTimeout		= ar5211SetCTSTimeout,
131 	.ah_getCTSTimeout		= ar5211GetCTSTimeout,
132 	.ah_setDecompMask               = ar5211SetDecompMask,
133 	.ah_setCoverageClass            = ar5211SetCoverageClass,
134 
135 	/* Key Cache Functions */
136 	.ah_getKeyCacheSize		= ar5211GetKeyCacheSize,
137 	.ah_resetKeyCacheEntry		= ar5211ResetKeyCacheEntry,
138 	.ah_isKeyCacheEntryValid	= ar5211IsKeyCacheEntryValid,
139 	.ah_setKeyCacheEntry		= ar5211SetKeyCacheEntry,
140 	.ah_setKeyCacheEntryMac		= ar5211SetKeyCacheEntryMac,
141 
142 	/* Power Management Functions */
143 	.ah_setPowerMode		= ar5211SetPowerMode,
144 	.ah_getPowerMode		= ar5211GetPowerMode,
145 
146 	/* Beacon Functions */
147 	.ah_setBeaconTimers		= ar5211SetBeaconTimers,
148 	.ah_beaconInit			= ar5211BeaconInit,
149 	.ah_setStationBeaconTimers	= ar5211SetStaBeaconTimers,
150 	.ah_resetStationBeaconTimers	= ar5211ResetStaBeaconTimers,
151 	.ah_getNextTBTT			= ar5211GetNextTBTT,
152 
153 	/* Interrupt Functions */
154 	.ah_isInterruptPending		= ar5211IsInterruptPending,
155 	.ah_getPendingInterrupts	= ar5211GetPendingInterrupts,
156 	.ah_getInterrupts		= ar5211GetInterrupts,
157 	.ah_setInterrupts		= ar5211SetInterrupts },
158 
159 	.ah_getChannelEdges		= ar5211GetChannelEdges,
160 	.ah_getWirelessModes		= ar5211GetWirelessModes,
161 	.ah_eepromRead			= ar5211EepromRead,
162 #ifdef AH_SUPPORT_WRITE_EEPROM
163 	.ah_eepromWrite			= ar5211EepromWrite,
164 #endif
165 	.ah_getChipPowerLimits		= ar5211GetChipPowerLimits,
166 };
167 
168 static HAL_BOOL ar5211ChipTest(struct ath_hal *);
169 static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah);
170 
171 /*
172  * Return the revsion id for the radio chip.  This
173  * fetched via the PHY.
174  */
175 static uint32_t
176 ar5211GetRadioRev(struct ath_hal *ah)
177 {
178 	uint32_t val;
179 	int i;
180 
181 	OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16);
182 	for (i = 0; i < 8; i++)
183 		OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000);
184 	val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff;
185 	val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
186 	return ath_hal_reverseBits(val, 8);
187 }
188 
189 /*
190  * Attach for an AR5211 part.
191  */
192 static struct ath_hal *
193 ar5211Attach(uint16_t devid, HAL_SOFTC sc,
194 	HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
195 	HAL_STATUS *status)
196 {
197 #define	N(a)	(sizeof(a)/sizeof(a[0]))
198 	struct ath_hal_5211 *ahp;
199 	struct ath_hal *ah;
200 	uint32_t val;
201 	uint16_t eeval;
202 	HAL_STATUS ecode;
203 
204 	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
205 	    __func__, sc, (void*) st, (void*) sh);
206 
207 	/* NB: memory is returned zero'd */
208 	ahp = ath_hal_malloc(sizeof (struct ath_hal_5211));
209 	if (ahp == AH_NULL) {
210 		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
211 		    "%s: cannot allocate memory for state block\n", __func__);
212 		ecode = HAL_ENOMEM;
213 		goto bad;
214 	}
215 	ah = &ahp->ah_priv.h;
216 	/* set initial values */
217 	OS_MEMCPY(&ahp->ah_priv, &ar5211hal, sizeof(struct ath_hal_private));
218 	ah->ah_sc = sc;
219 	ah->ah_st = st;
220 	ah->ah_sh = sh;
221 
222 	ah->ah_devid = devid;			/* NB: for AH_DEBUG_ALQ */
223 	AH_PRIVATE(ah)->ah_devid = devid;
224 	AH_PRIVATE(ah)->ah_subvendorid = 0;	/* XXX */
225 
226 	AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER;
227 	AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX;	/* no scaling */
228 
229 	ahp->ah_diversityControl = HAL_ANT_VARIABLE;
230 	ahp->ah_staId1Defaults = 0;
231 	ahp->ah_rssiThr = INIT_RSSI_THR;
232 	ahp->ah_sifstime = (u_int) -1;
233 	ahp->ah_slottime = (u_int) -1;
234 	ahp->ah_acktimeout = (u_int) -1;
235 	ahp->ah_ctstimeout = (u_int) -1;
236 
237 	if (!ar5211ChipReset(ah, AH_NULL)) {	/* reset chip */
238 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
239 		ecode = HAL_EIO;
240 		goto bad;
241 	}
242 	if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B) {
243 		/* set it back to OFDM mode to be able to read analog rev id */
244 		OS_REG_WRITE(ah, AR5211_PHY_MODE, AR5211_PHY_MODE_OFDM);
245 		OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44);
246 		OS_DELAY(1000);
247 	}
248 
249 	/* Read Revisions from Chips */
250 	val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M;
251 	AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
252 	AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M;
253 
254 	if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_MAUI_2 ||
255 	    AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_OAHU) {
256 		HALDEBUG(ah, HAL_DEBUG_ANY,
257 		    "%s: Mac Chip Rev 0x%x is not supported by this driver\n",
258 		    __func__, AH_PRIVATE(ah)->ah_macVersion);
259 		ecode = HAL_ENOTSUPP;
260 		goto bad;
261 	}
262 
263 	AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
264 
265 	if (!ar5211ChipTest(ah)) {
266 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
267 		    __func__);
268 		ecode = HAL_ESELFTEST;
269 		goto bad;
270 	}
271 
272 	/* Set correct Baseband to analog shift setting to access analog chips. */
273 	if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) {
274 		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
275 	} else {
276 		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047);
277 	}
278 	OS_DELAY(2000);
279 
280 	/* Read Radio Chip Rev Extract */
281 	AH_PRIVATE(ah)->ah_analog5GhzRev = ar5211GetRadioRev(ah);
282 	if ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xf0) != RAD5_SREV_MAJOR) {
283 		HALDEBUG(ah, HAL_DEBUG_ANY,
284 		    "%s: 5G Radio Chip Rev 0x%02X is not supported by this "
285 		    "driver\n", __func__, AH_PRIVATE(ah)->ah_analog5GhzRev);
286 		ecode = HAL_ENOTSUPP;
287 		goto bad;
288 	}
289 
290 	val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >>
291                AR_PCICFG_EEPROM_SIZE_S;
292 	if (val != AR_PCICFG_EEPROM_SIZE_16K) {
293 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM size "
294 		    "%u (0x%x) found\n", __func__, val, val);
295 		ecode = HAL_EESIZE;
296 		goto bad;
297 	}
298 	ecode = ath_hal_legacyEepromAttach(ah);
299 	if (ecode != HAL_OK) {
300 		goto bad;
301 	}
302 
303         /* If Bmode and AR5211, verify 2.4 analog exists */
304 	if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU &&
305 	    ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
306 		/* Set correct Baseband to analog shift setting to access analog chips. */
307 		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007);
308 		OS_DELAY(2000);
309 		AH_PRIVATE(ah)->ah_analog2GhzRev = ar5211GetRadioRev(ah);
310 
311 		/* Set baseband for 5GHz chip */
312 		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
313 		OS_DELAY(2000);
314 		if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != RAD2_SREV_MAJOR) {
315 			HALDEBUG(ah, HAL_DEBUG_ANY,
316 			    "%s: 2G Radio Chip Rev 0x%x is not supported by "
317 			    "this driver\n", __func__,
318 			    AH_PRIVATE(ah)->ah_analog2GhzRev);
319 			ecode = HAL_ENOTSUPP;
320 			goto bad;
321 		}
322 	} else {
323 		ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_FALSE);
324         }
325 
326 	ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);
327 	if (ecode != HAL_OK) {
328 		HALDEBUG(ah, HAL_DEBUG_ANY,
329 		    "%s: cannot read regulatory domain from EEPROM\n",
330 		    __func__);
331 		goto bad;
332         }
333 	AH_PRIVATE(ah)->ah_currentRD = eeval;
334 	AH_PRIVATE(ah)->ah_getNfAdjust = ar5211GetNfAdjust;
335 
336 	/*
337 	 * Got everything we need now to setup the capabilities.
338 	 */
339 	(void) ar5211FillCapabilityInfo(ah);
340 
341 	/* Initialize gain ladder thermal calibration structure */
342 	ar5211InitializeGainValues(ah);
343 
344 	ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
345 	if (ecode != HAL_OK) {
346 		HALDEBUG(ah, HAL_DEBUG_ANY,
347 		    "%s: error getting mac address from EEPROM\n", __func__);
348 		goto bad;
349         }
350 
351 	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
352 
353 	return ah;
354 bad:
355 	if (ahp)
356 		ar5211Detach((struct ath_hal *) ahp);
357 	if (status)
358 		*status = ecode;
359 	return AH_NULL;
360 #undef N
361 }
362 
363 void
364 ar5211Detach(struct ath_hal *ah)
365 {
366 	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__);
367 
368 	HALASSERT(ah != AH_NULL);
369 	HALASSERT(ah->ah_magic == AR5211_MAGIC);
370 
371 	ath_hal_eepromDetach(ah);
372 	ath_hal_free(ah);
373 }
374 
375 static HAL_BOOL
376 ar5211ChipTest(struct ath_hal *ah)
377 {
378 	uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) };
379 	uint32_t regHold[2];
380 	uint32_t patternData[4] =
381 	    { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 };
382 	int i, j;
383 
384 	/* Test PHY & MAC registers */
385 	for (i = 0; i < 2; i++) {
386 		uint32_t addr = regAddr[i];
387 		uint32_t wrData, rdData;
388 
389 		regHold[i] = OS_REG_READ(ah, addr);
390 		for (j = 0; j < 0x100; j++) {
391 			wrData = (j << 16) | j;
392 			OS_REG_WRITE(ah, addr, wrData);
393 			rdData = OS_REG_READ(ah, addr);
394 			if (rdData != wrData) {
395 				HALDEBUG(ah, HAL_DEBUG_ANY,
396 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
397 				__func__, addr, wrData, rdData);
398 				return AH_FALSE;
399 			}
400 		}
401 		for (j = 0; j < 4; j++) {
402 			wrData = patternData[j];
403 			OS_REG_WRITE(ah, addr, wrData);
404 			rdData = OS_REG_READ(ah, addr);
405 			if (wrData != rdData) {
406 				HALDEBUG(ah, HAL_DEBUG_ANY,
407 "%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
408 					__func__, addr, wrData, rdData);
409 				return AH_FALSE;
410 			}
411 		}
412 		OS_REG_WRITE(ah, regAddr[i], regHold[i]);
413 	}
414 	OS_DELAY(100);
415 	return AH_TRUE;
416 }
417 
418 /*
419  * Store the channel edges for the requested operational mode
420  */
421 static HAL_BOOL
422 ar5211GetChannelEdges(struct ath_hal *ah,
423 	uint16_t flags, uint16_t *low, uint16_t *high)
424 {
425 	if (flags & IEEE80211_CHAN_5GHZ) {
426 		*low = 4920;
427 		*high = 6100;
428 		return AH_TRUE;
429 	}
430 	if (flags & IEEE80211_CHAN_2GHZ &&
431 	    ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
432 		*low = 2312;
433 		*high = 2732;
434 		return AH_TRUE;
435 	}
436 	return AH_FALSE;
437 }
438 
439 static HAL_BOOL
440 ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan)
441 {
442 	/* XXX fill in, this is just a placeholder */
443 	HALDEBUG(ah, HAL_DEBUG_ATTACH,
444 	    "%s: no min/max power for %u/0x%x\n",
445 	    __func__, chan->ic_freq, chan->ic_flags);
446 	chan->ic_maxpower = MAX_RATE_POWER;
447 	chan->ic_minpower = 0;
448 	return AH_TRUE;
449 }
450 
451 static void
452 ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
453 {
454 }
455 
456 static void
457 ar5211DisablePCIE(struct ath_hal *ah)
458 {
459 }
460 
461 /*
462  * Fill all software cached or static hardware state information.
463  */
464 static HAL_BOOL
465 ar5211FillCapabilityInfo(struct ath_hal *ah)
466 {
467 	struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
468 	HAL_CAPABILITIES *pCap = &ahpriv->ah_caps;
469 
470 	/* Construct wireless mode from EEPROM */
471 	pCap->halWirelessModes = 0;
472 	if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
473 		pCap->halWirelessModes |= HAL_MODE_11A;
474 		if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE))
475 			pCap->halWirelessModes |= HAL_MODE_TURBO;
476 	}
477 	if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE))
478 		pCap->halWirelessModes |= HAL_MODE_11B;
479 
480 	pCap->halLow2GhzChan = 2312;
481 	pCap->halHigh2GhzChan = 2732;
482 	pCap->halLow5GhzChan = 4920;
483 	pCap->halHigh5GhzChan = 6100;
484 
485 	pCap->halChanSpreadSupport = AH_TRUE;
486 	pCap->halSleepAfterBeaconBroken = AH_TRUE;
487 	pCap->halPSPollBroken = AH_TRUE;
488 	pCap->halVEOLSupport = AH_TRUE;
489 
490 	pCap->halTotalQueues = HAL_NUM_TX_QUEUES;
491 	pCap->halKeyCacheSize = 128;
492 
493 	/* XXX not needed */
494 	pCap->halChanHalfRate = AH_FALSE;
495 	pCap->halChanQuarterRate = AH_FALSE;
496 
497 	if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
498 	    ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) {
499 		/* NB: enabled by default */
500 		ahpriv->ah_rfkillEnabled = AH_TRUE;
501 		pCap->halRfSilentSupport = AH_TRUE;
502 	}
503 
504 	pCap->halTstampPrecision = 13;
505 	pCap->halIntrMask = HAL_INT_COMMON
506 			| HAL_INT_RX
507 			| HAL_INT_TX
508 			| HAL_INT_FATAL
509 			| HAL_INT_BNR
510 			| HAL_INT_TIM
511 			;
512 
513 	pCap->hal4kbSplitTransSupport = AH_TRUE;
514 	pCap->halHasRxSelfLinkedTail = AH_TRUE;
515 
516 	/* XXX might be ok w/ some chip revs */
517 	ahpriv->ah_rxornIsFatal = AH_TRUE;
518 	return AH_TRUE;
519 }
520 
521 static const char*
522 ar5211Probe(uint16_t vendorid, uint16_t devid)
523 {
524 	if (vendorid == ATHEROS_VENDOR_ID) {
525 		if (devid == AR5211_DEVID || devid == AR5311_DEVID ||
526 		    devid == AR5211_DEFAULT)
527 			return "Atheros 5211";
528 		if (devid == AR5211_FPGA11B)
529 			return "Atheros 5211 (FPGA)";
530 	}
531 	return AH_NULL;
532 }
533 AH_CHIP(AR5211, ar5211Probe, ar5211Attach);
534