16e778a7eSPedro F. Giffuni /*- 26e778a7eSPedro F. Giffuni * SPDX-License-Identifier: ISC 36e778a7eSPedro F. Giffuni * 459efa8b5SSam Leffler * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 514779705SSam Leffler * Copyright (c) 2002-2004 Atheros Communications, Inc. 614779705SSam Leffler * 714779705SSam Leffler * Permission to use, copy, modify, and/or distribute this software for any 814779705SSam Leffler * purpose with or without fee is hereby granted, provided that the above 914779705SSam Leffler * copyright notice and this permission notice appear in all copies. 1014779705SSam Leffler * 1114779705SSam Leffler * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 1214779705SSam Leffler * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 1314779705SSam Leffler * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 1414779705SSam Leffler * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 1514779705SSam Leffler * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 1614779705SSam Leffler * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 1714779705SSam Leffler * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 1814779705SSam Leffler */ 1914779705SSam Leffler #ifndef _ATH_AR5210_H_ 2014779705SSam Leffler #define _ATH_AR5210_H_ 2114779705SSam Leffler 2214779705SSam Leffler #define AR5210_MAGIC 0x19980124 2314779705SSam Leffler 2414779705SSam Leffler #if 0 2514779705SSam Leffler /* 2614779705SSam Leffler * RTS_ENABLE includes LONG_PKT because they essentially 2714779705SSam Leffler * imply the same thing, and are set or not set together 2814779705SSam Leffler * for this chip 2914779705SSam Leffler */ 3014779705SSam Leffler #define AR5210_TXD_CTRL_A_HDR_LEN(_val) (((_val) ) & 0x0003f) 3114779705SSam Leffler #define AR5210_TXD_CTRL_A_TX_RATE(_val) (((_val) << 6) & 0x003c0) 3214779705SSam Leffler #define AR5210_TXD_CTRL_A_RTS_ENABLE ( 0x00c00) 3314779705SSam Leffler #define AR5210_TXD_CTRL_A_CLEAR_DEST_MASK(_val) (((_val) << 12) & 0x01000) 3414779705SSam Leffler #define AR5210_TXD_CTRL_A_ANT_MODE(_val) (((_val) << 13) & 0x02000) 3514779705SSam Leffler #define AR5210_TXD_CTRL_A_PKT_TYPE(_val) (((_val) << 14) & 0x1c000) 3614779705SSam Leffler #define AR5210_TXD_CTRL_A_INT_REQ ( 0x20000) 3714779705SSam Leffler #define AR5210_TXD_CTRL_A_KEY_VALID ( 0x40000) 3814779705SSam Leffler #define AR5210_TXD_CTRL_B_KEY_ID(_val) (((_val) ) & 0x0003f) 3914779705SSam Leffler #define AR5210_TXD_CTRL_B_RTS_DURATION(_val) (((_val) << 6) & 0x7ffc0) 4014779705SSam Leffler #endif 4114779705SSam Leffler 4214779705SSam Leffler #define INIT_CONFIG_STATUS 0x00000000 4314779705SSam Leffler #define INIT_ACKTOPS 0x00000008 4414779705SSam Leffler #define INIT_BCON_CNTRL_REG 0x00000000 4514779705SSam Leffler #define INIT_SLOT_TIME 0x00000168 4614779705SSam Leffler #define INIT_SLOT_TIME_TURBO 0x000001e0 /* More aggressive turbo slot timing = 6 us */ 4714779705SSam Leffler #define INIT_ACK_CTS_TIMEOUT 0x04000400 4814779705SSam Leffler #define INIT_ACK_CTS_TIMEOUT_TURBO 0x08000800 4914779705SSam Leffler 5014779705SSam Leffler #define INIT_USEC 0x27 5114779705SSam Leffler #define INIT_USEC_TURBO 0x4f 5214779705SSam Leffler #define INIT_USEC_32 0x1f 5314779705SSam Leffler #define INIT_TX_LATENCY 0x36 5414779705SSam Leffler #define INIT_RX_LATENCY 0x1D 5514779705SSam Leffler #define INIT_TRANSMIT_LATENCY \ 5614779705SSam Leffler ((INIT_RX_LATENCY << AR_USEC_RX_LATENCY_S) | \ 5714779705SSam Leffler (INIT_TX_LATENCY << AR_USEC_TX_LATENCY_S) | \ 5814779705SSam Leffler (INIT_USEC_32 << 7) | INIT_USEC ) 5914779705SSam Leffler #define INIT_TRANSMIT_LATENCY_TURBO \ 6014779705SSam Leffler ((INIT_RX_LATENCY << AR_USEC_RX_LATENCY_S) | \ 6114779705SSam Leffler (INIT_TX_LATENCY << AR_USEC_TX_LATENCY_S) | \ 6214779705SSam Leffler (INIT_USEC_32 << 7) | INIT_USEC_TURBO) 6314779705SSam Leffler 6414779705SSam Leffler #define INIT_SIFS 0x230 /* = 16 us - 2 us */ 6514779705SSam Leffler #define INIT_SIFS_TURBO 0x1E0 /* More aggressive turbo SIFS timing - 8 us - 2 us */ 6614779705SSam Leffler 6714779705SSam Leffler /* 6814779705SSam Leffler * Various fifo fill before Tx start, in 64-byte units 6914779705SSam Leffler * i.e. put the frame in the air while still DMAing 7014779705SSam Leffler */ 7114779705SSam Leffler #define MIN_TX_FIFO_THRESHOLD 0x1 7214779705SSam Leffler #define MAX_TX_FIFO_THRESHOLD ((IEEE80211_MAX_LEN / 64) + 1) 7314779705SSam Leffler 7414779705SSam Leffler #define INIT_NEXT_CFP_START 0xffffffff 7514779705SSam Leffler 7614779705SSam Leffler #define INIT_BEACON_PERIOD 0xffff 7714779705SSam Leffler #define INIT_BEACON_EN 0 /* this should be set by AP only when it's ready */ 7814779705SSam Leffler #define INIT_BEACON_CONTROL \ 7914779705SSam Leffler ((INIT_RESET_TSF << 24) | (INIT_BEACON_EN << 23) | \ 8014779705SSam Leffler (INIT_TIM_OFFSET<<16) | INIT_BEACON_PERIOD) 8114779705SSam Leffler 8214779705SSam Leffler #define INIT_RSSI_THR 0x00000700 /* Missed beacon counter initialized to max value of 7 */ 8314779705SSam Leffler #define INIT_ProgIFS 0x398 /* PIFS - 2us */ 8414779705SSam Leffler #define INIT_ProgIFS_TURBO 0x3C0 8514779705SSam Leffler #define INIT_EIFS 0xd70 8614779705SSam Leffler #define INIT_EIFS_TURBO 0x1ae0 8714779705SSam Leffler #define INIT_CARR_SENSE_EN 1 8814779705SSam Leffler #define INIT_PROTO_TIME_CNTRL ( (INIT_CARR_SENSE_EN << 26) | (INIT_EIFS << 12) | \ 8914779705SSam Leffler (INIT_ProgIFS) ) 9014779705SSam Leffler #define INIT_PROTO_TIME_CNTRL_TURBO ( (INIT_CARR_SENSE_EN << 26) | (INIT_EIFS_TURBO << 12) | \ 9114779705SSam Leffler (INIT_ProgIFS_TURBO) ) 9214779705SSam Leffler 9314779705SSam Leffler #define AR5210_MAX_RATE_POWER 60 9414779705SSam Leffler 9514779705SSam Leffler #undef HAL_NUM_TX_QUEUES /* from ah.h */ 9614779705SSam Leffler #define HAL_NUM_TX_QUEUES 3 9714779705SSam Leffler 9814779705SSam Leffler struct ath_hal_5210 { 9914779705SSam Leffler struct ath_hal_private ah_priv; /* base definitions */ 10014779705SSam Leffler 10114779705SSam Leffler uint8_t ah_macaddr[IEEE80211_ADDR_LEN]; 10214779705SSam Leffler /* 10314779705SSam Leffler * Runtime state. 10414779705SSam Leffler */ 10514779705SSam Leffler uint32_t ah_maskReg; /* shadow of IMR+IER regs */ 10614779705SSam Leffler uint32_t ah_txOkInterruptMask; 10714779705SSam Leffler uint32_t ah_txErrInterruptMask; 10814779705SSam Leffler uint32_t ah_txDescInterruptMask; 10914779705SSam Leffler uint32_t ah_txEolInterruptMask; 11014779705SSam Leffler uint32_t ah_txUrnInterruptMask; 11114779705SSam Leffler uint8_t ah_bssid[IEEE80211_ADDR_LEN]; 11214779705SSam Leffler HAL_TX_QUEUE_INFO ah_txq[HAL_NUM_TX_QUEUES]; /* beacon+cab+data */ 11314779705SSam Leffler /* 11414779705SSam Leffler * Station mode support. 11514779705SSam Leffler */ 11614779705SSam Leffler uint32_t ah_staId1Defaults; /* STA_ID1 default settings */ 11714779705SSam Leffler uint32_t ah_rssiThr; /* RSSI_THR settings */ 11814779705SSam Leffler 11914779705SSam Leffler u_int ah_sifstime; /* user-specified sifs time */ 12014779705SSam Leffler u_int ah_slottime; /* user-specified slot time */ 12114779705SSam Leffler u_int ah_acktimeout; /* user-specified ack timeout */ 12214779705SSam Leffler u_int ah_ctstimeout; /* user-specified cts timeout */ 1239b34359bSAdrian Chadd 1249b34359bSAdrian Chadd uint16_t ah_associd; /* association id */ 12514779705SSam Leffler }; 12614779705SSam Leffler #define AH5210(ah) ((struct ath_hal_5210 *)(ah)) 12714779705SSam Leffler 12814779705SSam Leffler struct ath_hal; 12914779705SSam Leffler 13014779705SSam Leffler extern void ar5210Detach(struct ath_hal *ah); 13114779705SSam Leffler extern HAL_BOOL ar5210Reset(struct ath_hal *, HAL_OPMODE, 132f50e4ebfSAdrian Chadd struct ieee80211_channel *, HAL_BOOL bChannelChange, 133f50e4ebfSAdrian Chadd HAL_RESET_TYPE, HAL_STATUS *); 13414779705SSam Leffler extern void ar5210SetPCUConfig(struct ath_hal *); 13514779705SSam Leffler extern HAL_BOOL ar5210PhyDisable(struct ath_hal *); 13614779705SSam Leffler extern HAL_BOOL ar5210Disable(struct ath_hal *); 13759efa8b5SSam Leffler extern HAL_BOOL ar5210ChipReset(struct ath_hal *, struct ieee80211_channel *); 13859efa8b5SSam Leffler extern HAL_BOOL ar5210PerCalibration(struct ath_hal *, struct ieee80211_channel *, HAL_BOOL *); 13959efa8b5SSam Leffler extern HAL_BOOL ar5210PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan, 14014779705SSam Leffler u_int chainMask, HAL_BOOL longCal, HAL_BOOL *isCalDone); 14159efa8b5SSam Leffler extern HAL_BOOL ar5210ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *); 14214779705SSam Leffler extern int16_t ar5210GetNoiseFloor(struct ath_hal *); 14314779705SSam Leffler extern int16_t ar5210GetNfAdjust(struct ath_hal *, 14414779705SSam Leffler const HAL_CHANNEL_INTERNAL *); 14514779705SSam Leffler extern HAL_BOOL ar5210SetTxPowerLimit(struct ath_hal *, uint32_t limit); 14659efa8b5SSam Leffler extern HAL_BOOL ar5210SetTransmitPower(struct ath_hal *, 14759efa8b5SSam Leffler const struct ieee80211_channel *); 14814779705SSam Leffler extern HAL_BOOL ar5210CalNoiseFloor(struct ath_hal *, HAL_CHANNEL_INTERNAL *); 14914779705SSam Leffler extern HAL_BOOL ar5210ResetDma(struct ath_hal *, HAL_OPMODE); 15014779705SSam Leffler 15114779705SSam Leffler extern HAL_BOOL ar5210SetTxQueueProps(struct ath_hal *ah, int q, 15214779705SSam Leffler const HAL_TXQ_INFO *qInfo); 15314779705SSam Leffler extern HAL_BOOL ar5210GetTxQueueProps(struct ath_hal *ah, int q, 15414779705SSam Leffler HAL_TXQ_INFO *qInfo); 15514779705SSam Leffler extern int ar5210SetupTxQueue(struct ath_hal *ah, HAL_TX_QUEUE type, 15614779705SSam Leffler const HAL_TXQ_INFO *qInfo); 15714779705SSam Leffler extern HAL_BOOL ar5210ReleaseTxQueue(struct ath_hal *ah, u_int q); 15814779705SSam Leffler extern HAL_BOOL ar5210ResetTxQueue(struct ath_hal *ah, u_int q); 15914779705SSam Leffler extern uint32_t ar5210GetTxDP(struct ath_hal *, u_int); 16014779705SSam Leffler extern HAL_BOOL ar5210SetTxDP(struct ath_hal *, u_int, uint32_t txdp); 16114779705SSam Leffler extern HAL_BOOL ar5210UpdateTxTrigLevel(struct ath_hal *, HAL_BOOL); 16214779705SSam Leffler extern uint32_t ar5210NumTxPending(struct ath_hal *, u_int); 16314779705SSam Leffler extern HAL_BOOL ar5210StartTxDma(struct ath_hal *, u_int); 16414779705SSam Leffler extern HAL_BOOL ar5210StopTxDma(struct ath_hal *, u_int); 16514779705SSam Leffler extern HAL_BOOL ar5210SetupTxDesc(struct ath_hal *, struct ath_desc *, 16614779705SSam Leffler u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int txPower, 16714779705SSam Leffler u_int txRate0, u_int txRetries0, 16814779705SSam Leffler u_int keyIx, u_int antMode, u_int flags, 16914779705SSam Leffler u_int rtsctsRate, u_int rtsctsDuration, 17014779705SSam Leffler u_int compicvLen, u_int compivLen, u_int comp); 17114779705SSam Leffler extern HAL_BOOL ar5210SetupXTxDesc(struct ath_hal *, struct ath_desc *, 17214779705SSam Leffler u_int txRate1, u_int txRetries1, 17314779705SSam Leffler u_int txRate2, u_int txRetries2, 17414779705SSam Leffler u_int txRate3, u_int txRetries3); 17514779705SSam Leffler extern HAL_BOOL ar5210FillTxDesc(struct ath_hal *, struct ath_desc *, 17646634305SAdrian Chadd HAL_DMA_ADDR *bufAddrList, uint32_t *segLenList, 17746634305SAdrian Chadd u_int descId, u_int qcuId, HAL_BOOL firstSeg, HAL_BOOL lastSeg, 17814779705SSam Leffler const struct ath_desc *ds0); 17914779705SSam Leffler extern HAL_STATUS ar5210ProcTxDesc(struct ath_hal *, 18014779705SSam Leffler struct ath_desc *, struct ath_tx_status *); 18114779705SSam Leffler extern void ar5210GetTxIntrQueue(struct ath_hal *ah, uint32_t *); 18214779705SSam Leffler extern void ar5210IntrReqTxDesc(struct ath_hal *ah, struct ath_desc *); 1839ea46744SAdrian Chadd extern HAL_BOOL ar5210GetTxCompletionRates(struct ath_hal *ah, 1849ea46744SAdrian Chadd const struct ath_desc *, int *rates, int *tries); 185ad3e6dcdSAdrian Chadd extern void ar5210SetTxDescLink(struct ath_hal *ah, void *ds, 186ad3e6dcdSAdrian Chadd uint32_t link); 187ad3e6dcdSAdrian Chadd extern void ar5210GetTxDescLink(struct ath_hal *ah, void *ds, 188ad3e6dcdSAdrian Chadd uint32_t *link); 189ad3e6dcdSAdrian Chadd extern void ar5210GetTxDescLinkPtr(struct ath_hal *ah, void *ds, 190ad3e6dcdSAdrian Chadd uint32_t **linkptr); 19114779705SSam Leffler 192d60a0680SAdrian Chadd extern uint32_t ar5210GetRxDP(struct ath_hal *, HAL_RX_QUEUE); 193d60a0680SAdrian Chadd extern void ar5210SetRxDP(struct ath_hal *, uint32_t rxdp, HAL_RX_QUEUE); 19414779705SSam Leffler extern void ar5210EnableReceive(struct ath_hal *); 19514779705SSam Leffler extern HAL_BOOL ar5210StopDmaReceive(struct ath_hal *); 196a8083b9cSAdrian Chadd extern void ar5210StartPcuReceive(struct ath_hal *, HAL_BOOL); 19714779705SSam Leffler extern void ar5210StopPcuReceive(struct ath_hal *); 19814779705SSam Leffler extern void ar5210SetMulticastFilter(struct ath_hal *, 19914779705SSam Leffler uint32_t filter0, uint32_t filter1); 20014779705SSam Leffler extern HAL_BOOL ar5210ClrMulticastFilterIndex(struct ath_hal *, uint32_t); 20114779705SSam Leffler extern HAL_BOOL ar5210SetMulticastFilterIndex(struct ath_hal *, uint32_t); 20214779705SSam Leffler extern uint32_t ar5210GetRxFilter(struct ath_hal *); 20314779705SSam Leffler extern void ar5210SetRxFilter(struct ath_hal *, uint32_t); 20414779705SSam Leffler extern HAL_BOOL ar5210SetupRxDesc(struct ath_hal *, struct ath_desc *, 20514779705SSam Leffler uint32_t, u_int flags); 20614779705SSam Leffler extern HAL_STATUS ar5210ProcRxDesc(struct ath_hal *, struct ath_desc *, 20714779705SSam Leffler uint32_t, struct ath_desc *, uint64_t, 20814779705SSam Leffler struct ath_rx_status *); 20914779705SSam Leffler 21014779705SSam Leffler extern void ar5210GetMacAddress(struct ath_hal *, uint8_t *); 21114779705SSam Leffler extern HAL_BOOL ar5210SetMacAddress(struct ath_hal *ah, const uint8_t *); 21214779705SSam Leffler extern void ar5210GetBssIdMask(struct ath_hal *, uint8_t *); 21314779705SSam Leffler extern HAL_BOOL ar5210SetBssIdMask(struct ath_hal *, const uint8_t *); 21414779705SSam Leffler extern HAL_BOOL ar5210EepromRead(struct ath_hal *, u_int off, uint16_t *data); 21514779705SSam Leffler extern HAL_BOOL ar5210EepromWrite(struct ath_hal *, u_int off, uint16_t data); 21614779705SSam Leffler extern HAL_BOOL ar5210SetRegulatoryDomain(struct ath_hal *, 21714779705SSam Leffler uint16_t, HAL_STATUS *); 21814779705SSam Leffler extern u_int ar5210GetWirelessModes(struct ath_hal *ah); 21914779705SSam Leffler extern void ar5210EnableRfKill(struct ath_hal *); 22014779705SSam Leffler extern HAL_BOOL ar5210GpioCfgInput(struct ath_hal *, uint32_t gpio); 221869ff02eSSam Leffler extern HAL_BOOL ar5210GpioCfgOutput(struct ath_hal *, uint32_t gpio, 222869ff02eSSam Leffler HAL_GPIO_MUX_TYPE); 22314779705SSam Leffler extern uint32_t ar5210GpioGet(struct ath_hal *, uint32_t gpio); 22414779705SSam Leffler extern HAL_BOOL ar5210GpioSet(struct ath_hal *, uint32_t gpio, uint32_t); 22514779705SSam Leffler extern void ar5210Gpio0SetIntr(struct ath_hal *, u_int, uint32_t ilevel); 22614779705SSam Leffler extern void ar5210SetLedState(struct ath_hal *, HAL_LED_STATE); 22714779705SSam Leffler extern u_int ar5210GetDefAntenna(struct ath_hal *); 22814779705SSam Leffler extern void ar5210SetDefAntenna(struct ath_hal *, u_int); 22914779705SSam Leffler extern HAL_ANT_SETTING ar5210GetAntennaSwitch(struct ath_hal *); 23014779705SSam Leffler extern HAL_BOOL ar5210SetAntennaSwitch(struct ath_hal *, HAL_ANT_SETTING); 23114779705SSam Leffler extern void ar5210WriteAssocid(struct ath_hal *, 23214779705SSam Leffler const uint8_t *bssid, uint16_t assocId); 23314779705SSam Leffler extern uint32_t ar5210GetTsf32(struct ath_hal *); 23414779705SSam Leffler extern uint64_t ar5210GetTsf64(struct ath_hal *); 23514779705SSam Leffler extern void ar5210ResetTsf(struct ath_hal *); 23614779705SSam Leffler extern uint32_t ar5210GetRandomSeed(struct ath_hal *); 23714779705SSam Leffler extern HAL_BOOL ar5210DetectCardPresent(struct ath_hal *); 23814779705SSam Leffler extern void ar5210UpdateMibCounters(struct ath_hal *, HAL_MIB_STATS *); 23914779705SSam Leffler extern void ar5210EnableHwEncryption(struct ath_hal *); 24014779705SSam Leffler extern void ar5210DisableHwEncryption(struct ath_hal *); 24114779705SSam Leffler extern HAL_RFGAIN ar5210GetRfgain(struct ath_hal *); 24214779705SSam Leffler extern HAL_BOOL ar5210SetSifsTime(struct ath_hal *, u_int); 24314779705SSam Leffler extern u_int ar5210GetSifsTime(struct ath_hal *); 24414779705SSam Leffler extern HAL_BOOL ar5210SetSlotTime(struct ath_hal *, u_int); 24514779705SSam Leffler extern u_int ar5210GetSlotTime(struct ath_hal *); 24614779705SSam Leffler extern HAL_BOOL ar5210SetAckTimeout(struct ath_hal *, u_int); 24714779705SSam Leffler extern u_int ar5210GetAckTimeout(struct ath_hal *); 24814779705SSam Leffler extern HAL_BOOL ar5210SetAckCTSRate(struct ath_hal *, u_int); 24914779705SSam Leffler extern u_int ar5210GetAckCTSRate(struct ath_hal *); 25014779705SSam Leffler extern HAL_BOOL ar5210SetCTSTimeout(struct ath_hal *, u_int); 25114779705SSam Leffler extern u_int ar5210GetCTSTimeout(struct ath_hal *); 25214779705SSam Leffler extern HAL_BOOL ar5210SetDecompMask(struct ath_hal *, uint16_t, int); 25314779705SSam Leffler void ar5210SetCoverageClass(struct ath_hal *, uint8_t, int); 254aa36f34dSAdrian Chadd extern HAL_STATUS ar5210SetQuiet(struct ath_hal *, uint32_t, uint32_t, 255aa36f34dSAdrian Chadd uint32_t, HAL_QUIET_FLAG); 25614779705SSam Leffler extern HAL_STATUS ar5210GetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE, 25714779705SSam Leffler uint32_t, uint32_t *); 25814779705SSam Leffler extern HAL_BOOL ar5210SetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE, 25914779705SSam Leffler uint32_t, uint32_t, HAL_STATUS *); 26014779705SSam Leffler extern HAL_BOOL ar5210GetDiagState(struct ath_hal *ah, int request, 26114779705SSam Leffler const void *args, uint32_t argsize, 26214779705SSam Leffler void **result, uint32_t *resultsize); 263352f07f6SAdrian Chadd extern uint32_t ar5210Get11nExtBusy(struct ath_hal *); 264352f07f6SAdrian Chadd extern HAL_BOOL ar5210GetMibCycleCounts(struct ath_hal *, 265352f07f6SAdrian Chadd HAL_SURVEY_SAMPLE *); 266d2a72d67SAdrian Chadd extern void ar5210SetChainMasks(struct ath_hal *, uint32_t, uint32_t); 267a41607fcSAdrian Chadd extern void ar5210EnableDfs(struct ath_hal *, HAL_PHYERR_PARAM *); 268a41607fcSAdrian Chadd extern void ar5210GetDfsThresh(struct ath_hal *, HAL_PHYERR_PARAM *); 269143cfad7SAdrian Chadd extern void ar5210UpdateDiagReg(struct ath_hal *ah, uint32_t val); 270bed90bf8SAdrian Chadd extern void ar5210SetNav(struct ath_hal *ah, u_int val); 271bed90bf8SAdrian Chadd extern u_int ar5210GetNav(struct ath_hal *ah); 27214779705SSam Leffler 27314779705SSam Leffler extern u_int ar5210GetKeyCacheSize(struct ath_hal *); 27414779705SSam Leffler extern HAL_BOOL ar5210IsKeyCacheEntryValid(struct ath_hal *, uint16_t); 27514779705SSam Leffler extern HAL_BOOL ar5210ResetKeyCacheEntry(struct ath_hal *, uint16_t entry); 27614779705SSam Leffler extern HAL_BOOL ar5210SetKeyCacheEntry(struct ath_hal *, uint16_t entry, 27714779705SSam Leffler const HAL_KEYVAL *, const uint8_t *mac, int xorKey); 27814779705SSam Leffler extern HAL_BOOL ar5210SetKeyCacheEntryMac(struct ath_hal *, 27914779705SSam Leffler uint16_t, const uint8_t *); 28014779705SSam Leffler 281*1e65df68SJohn Baldwin extern HAL_BOOL ar5210SetPowerMode(struct ath_hal *, HAL_POWER_MODE mode, 28214779705SSam Leffler int setChip); 28314779705SSam Leffler extern HAL_POWER_MODE ar5210GetPowerMode(struct ath_hal *); 28414779705SSam Leffler 28514779705SSam Leffler extern void ar5210SetBeaconTimers(struct ath_hal *, 28614779705SSam Leffler const HAL_BEACON_TIMERS *); 28714779705SSam Leffler extern void ar5210BeaconInit(struct ath_hal *, uint32_t, uint32_t); 28814779705SSam Leffler extern void ar5210SetStaBeaconTimers(struct ath_hal *, 28914779705SSam Leffler const HAL_BEACON_STATE *); 29014779705SSam Leffler extern void ar5210ResetStaBeaconTimers(struct ath_hal *); 291fc4de9b7SAdrian Chadd extern uint64_t ar5210GetNextTBTT(struct ath_hal *); 29214779705SSam Leffler 29314779705SSam Leffler extern HAL_BOOL ar5210IsInterruptPending(struct ath_hal *); 29414779705SSam Leffler extern HAL_BOOL ar5210GetPendingInterrupts(struct ath_hal *, HAL_INT *); 29514779705SSam Leffler extern HAL_INT ar5210GetInterrupts(struct ath_hal *); 29614779705SSam Leffler extern HAL_INT ar5210SetInterrupts(struct ath_hal *, HAL_INT ints); 29714779705SSam Leffler 29814779705SSam Leffler extern const HAL_RATE_TABLE *ar5210GetRateTable(struct ath_hal *, u_int mode); 29914779705SSam Leffler 30014779705SSam Leffler extern HAL_BOOL ar5210AniControl(struct ath_hal *, HAL_ANI_CMD, int ); 301a108ab63SAdrian Chadd extern void ar5210AniPoll(struct ath_hal *, const struct ieee80211_channel *); 302a108ab63SAdrian Chadd extern void ar5210RxMonitor(struct ath_hal *, const HAL_NODE_STATS *, 30359efa8b5SSam Leffler const struct ieee80211_channel *); 30414779705SSam Leffler extern void ar5210MibEvent(struct ath_hal *, const HAL_NODE_STATS *); 30514779705SSam Leffler #endif /* _ATH_AR5210_H_ */ 306