1 /*- 2 * SPDX-License-Identifier: ISC 3 * 4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 5 * Copyright (c) 2002-2008 Atheros Communications, Inc. 6 * 7 * Permission to use, copy, modify, and/or distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 * 19 * $FreeBSD$ 20 */ 21 #ifndef _ATH_AH_SOC_H_ 22 #define _ATH_AH_SOC_H_ 23 /* 24 * Atheros System on Chip (SoC) public definitions. 25 */ 26 27 /* 28 * This is board-specific data that is stored in a "known" 29 * location in flash. To find the start of this data search 30 * back from the (aliased) end of flash by 0x1000 bytes at a 31 * time until you find the string "5311", which marks the 32 * start of Board Configuration. Typically one gives up if 33 * more than 500KB is searched. 34 */ 35 struct ar531x_boarddata { 36 uint32_t magic; /* board data is valid */ 37 #define AR531X_BD_MAGIC 0x35333131 /* "5311", for all 531x platforms */ 38 uint16_t cksum; /* checksum (starting with BD_REV 2) */ 39 uint16_t rev; /* revision of this struct */ 40 #define BD_REV 4 41 char boardName[64]; /* Name of board */ 42 uint16_t major; /* Board major number */ 43 uint16_t minor; /* Board minor number */ 44 uint32_t config; /* Board configuration */ 45 #define BD_ENET0 0x00000001 /* ENET0 is stuffed */ 46 #define BD_ENET1 0x00000002 /* ENET1 is stuffed */ 47 #define BD_UART1 0x00000004 /* UART1 is stuffed */ 48 #define BD_UART0 0x00000008 /* UART0 is stuffed (dma) */ 49 #define BD_RSTFACTORY 0x00000010 /* Reset factory defaults stuffed */ 50 #define BD_SYSLED 0x00000020 /* System LED stuffed */ 51 #define BD_EXTUARTCLK 0x00000040 /* External UART clock */ 52 #define BD_CPUFREQ 0x00000080 /* cpu freq is valid in nvram */ 53 #define BD_SYSFREQ 0x00000100 /* sys freq is set in nvram */ 54 #define BD_WLAN0 0x00000200 /* Enable WLAN0 */ 55 #define BD_MEMCAP 0x00000400 /* CAP SDRAM @ memCap for testing */ 56 #define BD_DISWATCHDOG 0x00000800 /* disable system watchdog */ 57 #define BD_WLAN1 0x00001000 /* Enable WLAN1 (ar5212) */ 58 #define BD_ISCASPER 0x00002000 /* FLAG for AR2312 */ 59 #define BD_WLAN0_2G_EN 0x00004000 /* FLAG for radio0_2G */ 60 #define BD_WLAN0_5G_EN 0x00008000 /* FLAG for radio0_2G */ 61 #define BD_WLAN1_2G_EN 0x00020000 /* FLAG for radio0_2G */ 62 #define BD_WLAN1_5G_EN 0x00040000 /* FLAG for radio0_2G */ 63 uint16_t resetConfigGpio; /* Reset factory GPIO pin */ 64 uint16_t sysLedGpio; /* System LED GPIO pin */ 65 66 uint32_t cpuFreq; /* CPU core frequency in Hz */ 67 uint32_t sysFreq; /* System frequency in Hz */ 68 uint32_t cntFreq; /* Calculated C0_COUNT frequency */ 69 70 uint8_t wlan0Mac[6]; 71 uint8_t enet0Mac[6]; 72 uint8_t enet1Mac[6]; 73 74 uint16_t pciId; /* Pseudo PCIID for common code */ 75 uint16_t memCap; /* cap bank1 in MB */ 76 77 /* version 3 */ 78 uint8_t wlan1Mac[6]; /* (ar5212) */ 79 }; 80 81 /* 82 * Board support data. The driver is required to locate 83 * and fill-in this information before passing a reference to 84 * this structure as the HAL_BUS_TAG parameter supplied to 85 * ath_hal_attach. 86 */ 87 struct ar531x_config { 88 const struct ar531x_boarddata *board; /* board config data */ 89 const char *radio; /* radio config data */ 90 int unit; /* unit number [0, 1] */ 91 void *tag; /* bus space tag */ 92 }; 93 #endif /* _ATH_AH_SOC_H_ */ 94