1 /*- 2 * SPDX-License-Identifier: ISC 3 * 4 * Copyright (c) 2008 Sam Leffler, Errno Consulting 5 * Copyright (c) 2008 Atheros Communications, Inc. 6 * 7 * Permission to use, copy, modify, and/or distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 #include "ah_eeprom_v14.h" 24 25 static HAL_STATUS 26 v14EepromGet(struct ath_hal *ah, int param, void *val) 27 { 28 #define CHAN_A_IDX 0 29 #define CHAN_B_IDX 1 30 #define IS_VERS(op, v) ((pBase->version & AR5416_EEP_VER_MINOR_MASK) op (v)) 31 HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom; 32 const MODAL_EEP_HEADER *pModal = ee->ee_base.modalHeader; 33 const BASE_EEP_HEADER *pBase = &ee->ee_base.baseEepHeader; 34 uint32_t sum; 35 uint8_t *macaddr; 36 int i; 37 38 switch (param) { 39 case AR_EEP_NFTHRESH_5: 40 *(int16_t *)val = pModal[0].noiseFloorThreshCh[0]; 41 return HAL_OK; 42 case AR_EEP_NFTHRESH_2: 43 *(int16_t *)val = pModal[1].noiseFloorThreshCh[0]; 44 return HAL_OK; 45 case AR_EEP_MACADDR: /* Get MAC Address */ 46 sum = 0; 47 macaddr = val; 48 for (i = 0; i < 6; i++) { 49 macaddr[i] = pBase->macAddr[i]; 50 sum += pBase->macAddr[i]; 51 } 52 if (sum == 0 || sum == 0xffff*3) { 53 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad mac address %s\n", 54 __func__, ath_hal_ether_sprintf(macaddr)); 55 return HAL_EEBADMAC; 56 } 57 return HAL_OK; 58 case AR_EEP_REGDMN_0: 59 return pBase->regDmn[0]; 60 case AR_EEP_REGDMN_1: 61 return pBase->regDmn[1]; 62 case AR_EEP_OPCAP: 63 return pBase->deviceCap; 64 case AR_EEP_OPMODE: 65 return pBase->opCapFlags; 66 case AR_EEP_RFSILENT: 67 return pBase->rfSilent; 68 case AR_EEP_OB_5: 69 return pModal[CHAN_A_IDX].ob; 70 case AR_EEP_DB_5: 71 return pModal[CHAN_A_IDX].db; 72 case AR_EEP_OB_2: 73 return pModal[CHAN_B_IDX].ob; 74 case AR_EEP_DB_2: 75 return pModal[CHAN_B_IDX].db; 76 case AR_EEP_TXMASK: 77 return pBase->txMask; 78 case AR_EEP_RXMASK: 79 return pBase->rxMask; 80 case AR_EEP_RXGAIN_TYPE: 81 return IS_VERS(>=, AR5416_EEP_MINOR_VER_17) ? 82 pBase->rxGainType : AR5416_EEP_RXGAIN_ORIG; 83 case AR_EEP_TXGAIN_TYPE: 84 return IS_VERS(>=, AR5416_EEP_MINOR_VER_19) ? 85 pBase->txGainType : AR5416_EEP_TXGAIN_ORIG; 86 case AR_EEP_FSTCLK_5G: 87 /* 5ghz fastclock is always enabled for Merlin minor <= 16 */ 88 if (IS_VERS(<=, AR5416_EEP_MINOR_VER_16)) 89 return HAL_OK; 90 return pBase->fastClk5g ? HAL_OK : HAL_EIO; 91 case AR_EEP_OL_PWRCTRL: 92 HALASSERT(val == AH_NULL); 93 return pBase->openLoopPwrCntl ? HAL_OK : HAL_EIO; 94 case AR_EEP_DAC_HPWR_5G: 95 if (IS_VERS(>=, AR5416_EEP_MINOR_VER_20)) { 96 *(uint8_t *) val = pBase->dacHiPwrMode_5G; 97 return HAL_OK; 98 } else 99 return HAL_EIO; 100 case AR_EEP_FRAC_N_5G: 101 if (IS_VERS(>=, AR5416_EEP_MINOR_VER_22)) { 102 *(uint8_t *) val = pBase->frac_n_5g; 103 } else 104 *(uint8_t *) val = 0; 105 return HAL_OK; 106 case AR_EEP_AMODE: 107 HALASSERT(val == AH_NULL); 108 return pBase->opCapFlags & AR5416_OPFLAGS_11A ? 109 HAL_OK : HAL_EIO; 110 case AR_EEP_BMODE: 111 case AR_EEP_GMODE: 112 HALASSERT(val == AH_NULL); 113 return pBase->opCapFlags & AR5416_OPFLAGS_11G ? 114 HAL_OK : HAL_EIO; 115 case AR_EEP_32KHZCRYSTAL: 116 case AR_EEP_COMPRESS: 117 case AR_EEP_FASTFRAME: /* XXX policy decision, h/w can do it */ 118 case AR_EEP_WRITEPROTECT: /* NB: no write protect bit */ 119 HALASSERT(val == AH_NULL); 120 /* fall thru... */ 121 case AR_EEP_MAXQCU: /* NB: not in opCapFlags */ 122 case AR_EEP_KCENTRIES: /* NB: not in opCapFlags */ 123 return HAL_EIO; 124 case AR_EEP_AES: 125 case AR_EEP_BURST: 126 case AR_EEP_RFKILL: 127 case AR_EEP_TURBO5DISABLE: 128 case AR_EEP_TURBO2DISABLE: 129 HALASSERT(val == AH_NULL); 130 return HAL_OK; 131 case AR_EEP_ANTGAINMAX_2: 132 *(int8_t *) val = ee->ee_antennaGainMax[1]; 133 return HAL_OK; 134 case AR_EEP_ANTGAINMAX_5: 135 *(int8_t *) val = ee->ee_antennaGainMax[0]; 136 return HAL_OK; 137 case AR_EEP_PWR_TABLE_OFFSET: 138 if (IS_VERS(>=, AR5416_EEP_MINOR_VER_21)) 139 *(int8_t *) val = pBase->pwr_table_offset; 140 else 141 *(int8_t *) val = AR5416_PWR_TABLE_OFFSET_DB; 142 return HAL_OK; 143 case AR_EEP_PWDCLKIND: 144 if (IS_VERS(>=, AR5416_EEP_MINOR_VER_10)) { 145 *(uint8_t *) val = pBase->pwdclkind; 146 return HAL_OK; 147 } 148 return HAL_EIO; 149 150 default: 151 HALASSERT(0); 152 return HAL_EINVAL; 153 } 154 #undef IS_VERS 155 #undef CHAN_A_IDX 156 #undef CHAN_B_IDX 157 } 158 159 static HAL_STATUS 160 v14EepromSet(struct ath_hal *ah, int param, int v) 161 { 162 HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom; 163 164 switch (param) { 165 case AR_EEP_ANTGAINMAX_2: 166 ee->ee_antennaGainMax[1] = (int8_t) v; 167 return HAL_OK; 168 case AR_EEP_ANTGAINMAX_5: 169 ee->ee_antennaGainMax[0] = (int8_t) v; 170 return HAL_OK; 171 } 172 return HAL_EINVAL; 173 } 174 175 static HAL_BOOL 176 v14EepromDiag(struct ath_hal *ah, int request, 177 const void *args, uint32_t argsize, void **result, uint32_t *resultsize) 178 { 179 HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom; 180 181 switch (request) { 182 case HAL_DIAG_EEPROM: 183 *result = ee; 184 *resultsize = sizeof(HAL_EEPROM_v14); 185 return AH_TRUE; 186 } 187 return AH_FALSE; 188 } 189 190 /* Do structure specific swaps if Eeprom format is non native to host */ 191 static void 192 eepromSwap(struct ar5416eeprom *ee) 193 { 194 uint32_t integer, i, j; 195 uint16_t word; 196 MODAL_EEP_HEADER *pModal; 197 198 /* convert Base Eep header */ 199 word = __bswap16(ee->baseEepHeader.length); 200 ee->baseEepHeader.length = word; 201 202 word = __bswap16(ee->baseEepHeader.checksum); 203 ee->baseEepHeader.checksum = word; 204 205 word = __bswap16(ee->baseEepHeader.version); 206 ee->baseEepHeader.version = word; 207 208 word = __bswap16(ee->baseEepHeader.regDmn[0]); 209 ee->baseEepHeader.regDmn[0] = word; 210 211 word = __bswap16(ee->baseEepHeader.regDmn[1]); 212 ee->baseEepHeader.regDmn[1] = word; 213 214 word = __bswap16(ee->baseEepHeader.rfSilent); 215 ee->baseEepHeader.rfSilent = word; 216 217 word = __bswap16(ee->baseEepHeader.blueToothOptions); 218 ee->baseEepHeader.blueToothOptions = word; 219 220 word = __bswap16(ee->baseEepHeader.deviceCap); 221 ee->baseEepHeader.deviceCap = word; 222 223 /* convert Modal Eep header */ 224 for (j = 0; j < 2; j++) { 225 pModal = &ee->modalHeader[j]; 226 227 /* XXX linux/ah_osdep.h only defines __bswap32 for BE */ 228 integer = __bswap32(pModal->antCtrlCommon); 229 pModal->antCtrlCommon = integer; 230 231 for (i = 0; i < AR5416_MAX_CHAINS; i++) { 232 integer = __bswap32(pModal->antCtrlChain[i]); 233 pModal->antCtrlChain[i] = integer; 234 } 235 for (i = 0; i < 3; i++) { 236 word = __bswap16(pModal->xpaBiasLvlFreq[i]); 237 pModal->xpaBiasLvlFreq[i] = word; 238 } 239 for (i = 0; i < AR5416_EEPROM_MODAL_SPURS; i++) { 240 word = __bswap16(pModal->spurChans[i].spurChan); 241 pModal->spurChans[i].spurChan = word; 242 } 243 } 244 } 245 246 static uint16_t 247 v14EepromGetSpurChan(struct ath_hal *ah, int ix, HAL_BOOL is2GHz) 248 { 249 HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom; 250 251 HALASSERT(0 <= ix && ix < AR5416_EEPROM_MODAL_SPURS); 252 return ee->ee_base.modalHeader[is2GHz].spurChans[ix].spurChan; 253 } 254 255 /************************************************************************** 256 * fbin2freq 257 * 258 * Get channel value from binary representation held in eeprom 259 * RETURNS: the frequency in MHz 260 */ 261 static uint16_t 262 fbin2freq(uint8_t fbin, HAL_BOOL is2GHz) 263 { 264 /* 265 * Reserved value 0xFF provides an empty definition both as 266 * an fbin and as a frequency - do not convert 267 */ 268 if (fbin == AR5416_BCHAN_UNUSED) 269 return fbin; 270 return (uint16_t)((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin)); 271 } 272 273 /* 274 * Copy EEPROM Conformance Testing Limits contents 275 * into the allocated space 276 */ 277 /* USE CTLS from chain zero */ 278 #define CTL_CHAIN 0 279 280 static void 281 v14EepromReadCTLInfo(struct ath_hal *ah, HAL_EEPROM_v14 *ee) 282 { 283 RD_EDGES_POWER *rep = ee->ee_rdEdgesPower; 284 int i, j; 285 286 HALASSERT(AR5416_NUM_CTLS <= sizeof(ee->ee_rdEdgesPower)/NUM_EDGES); 287 288 for (i = 0; ee->ee_base.ctlIndex[i] != 0 && i < AR5416_NUM_CTLS; i++) { 289 for (j = 0; j < NUM_EDGES; j ++) { 290 /* XXX Confirm this is the right thing to do when an invalid channel is stored */ 291 if (ee->ee_base.ctlData[i].ctlEdges[CTL_CHAIN][j].bChannel == AR5416_BCHAN_UNUSED) { 292 rep[j].rdEdge = 0; 293 rep[j].twice_rdEdgePower = 0; 294 rep[j].flag = 0; 295 } else { 296 rep[j].rdEdge = fbin2freq( 297 ee->ee_base.ctlData[i].ctlEdges[CTL_CHAIN][j].bChannel, 298 (ee->ee_base.ctlIndex[i] & CTL_MODE_M) != CTL_11A); 299 rep[j].twice_rdEdgePower = MS(ee->ee_base.ctlData[i].ctlEdges[CTL_CHAIN][j].tPowerFlag, CAL_CTL_EDGES_POWER); 300 rep[j].flag = MS(ee->ee_base.ctlData[i].ctlEdges[CTL_CHAIN][j].tPowerFlag, CAL_CTL_EDGES_FLAG) != 0; 301 } 302 } 303 rep += NUM_EDGES; 304 } 305 ee->ee_numCtls = i; 306 HALDEBUG(ah, HAL_DEBUG_ATTACH | HAL_DEBUG_EEPROM, 307 "%s Numctls = %u\n",__func__,i); 308 } 309 310 /* 311 * Reclaim any EEPROM-related storage. 312 */ 313 static void 314 v14EepromDetach(struct ath_hal *ah) 315 { 316 HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom; 317 318 ath_hal_free(ee); 319 AH_PRIVATE(ah)->ah_eeprom = AH_NULL; 320 } 321 322 #define owl_get_eep_ver(_ee) \ 323 (((_ee)->ee_base.baseEepHeader.version >> 12) & 0xF) 324 #define owl_get_eep_rev(_ee) \ 325 (((_ee)->ee_base.baseEepHeader.version) & 0xFFF) 326 327 /* 328 * Howl is (hopefully) a special case where the endian-ness of the EEPROM 329 * matches the native endian-ness; and that supplied EEPROMs don't have 330 * a magic value to check. 331 */ 332 HAL_STATUS 333 ath_hal_v14EepromAttach(struct ath_hal *ah) 334 { 335 #define NW(a) (sizeof(a) / sizeof(uint16_t)) 336 HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom; 337 uint16_t *eep_data, magic; 338 HAL_BOOL need_swap; 339 u_int w, off, len; 340 uint32_t sum; 341 342 HALASSERT(ee == AH_NULL); 343 344 /* 345 * Don't check magic if we're supplied with an EEPROM block, 346 * typically this is from Howl but it may also be from later 347 * boards w/ an embedded Merlin. 348 */ 349 if (ah->ah_eepromdata == NULL) { 350 if (!ath_hal_eepromRead(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) { 351 HALDEBUG(ah, HAL_DEBUG_ANY, 352 "%s Error reading Eeprom MAGIC\n", __func__); 353 return HAL_EEREAD; 354 } 355 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s Eeprom Magic = 0x%x\n", 356 __func__, magic); 357 if (magic != AR5416_EEPROM_MAGIC) { 358 HALDEBUG(ah, HAL_DEBUG_ANY, "Bad magic number\n"); 359 return HAL_EEMAGIC; 360 } 361 } 362 363 ee = ath_hal_malloc(sizeof(HAL_EEPROM_v14)); 364 if (ee == AH_NULL) { 365 /* XXX message */ 366 return HAL_ENOMEM; 367 } 368 369 eep_data = (uint16_t *)&ee->ee_base; 370 for (w = 0; w < NW(struct ar5416eeprom); w++) { 371 off = owl_eep_start_loc + w; /* NB: AP71 starts at 0 */ 372 if (!ath_hal_eepromRead(ah, off, &eep_data[w])) { 373 HALDEBUG(ah, HAL_DEBUG_ANY, 374 "%s eeprom read error at offset 0x%x\n", 375 __func__, off); 376 return HAL_EEREAD; 377 } 378 } 379 /* Convert to eeprom native eeprom endian format */ 380 /* XXX this is likely incorrect but will do for now to get howl/ap83 working. */ 381 if (ah->ah_eepromdata == NULL && isBigEndian()) { 382 for (w = 0; w < NW(struct ar5416eeprom); w++) 383 eep_data[w] = __bswap16(eep_data[w]); 384 } 385 386 /* 387 * At this point, we're in the native eeprom endian format 388 * Now, determine the eeprom endian by looking at byte 26?? 389 */ 390 need_swap = ((ee->ee_base.baseEepHeader.eepMisc & AR5416_EEPMISC_BIG_ENDIAN) != 0) ^ isBigEndian(); 391 if (need_swap) { 392 HALDEBUG(ah, HAL_DEBUG_ATTACH | HAL_DEBUG_EEPROM, 393 "Byte swap EEPROM contents.\n"); 394 len = __bswap16(ee->ee_base.baseEepHeader.length); 395 } else { 396 len = ee->ee_base.baseEepHeader.length; 397 } 398 len = AH_MIN(len, sizeof(struct ar5416eeprom)) / sizeof(uint16_t); 399 400 /* Apply the checksum, done in native eeprom format */ 401 /* XXX - Need to check to make sure checksum calculation is done 402 * in the correct endian format. Right now, it seems it would 403 * cast the raw data to host format and do the calculation, which may 404 * not be correct as the calculation may need to be done in the native 405 * eeprom format 406 */ 407 sum = 0; 408 for (w = 0; w < len; w++) 409 sum ^= eep_data[w]; 410 /* Check CRC - Attach should fail on a bad checksum */ 411 if (sum != 0xffff) { 412 HALDEBUG(ah, HAL_DEBUG_ANY, 413 "Bad EEPROM checksum 0x%x (Len=%u)\n", sum, len); 414 return HAL_EEBADSUM; 415 } 416 417 if (need_swap) 418 eepromSwap(&ee->ee_base); /* byte swap multi-byte data */ 419 420 /* swap words 0+2 so version is at the front */ 421 magic = eep_data[0]; 422 eep_data[0] = eep_data[2]; 423 eep_data[2] = magic; 424 425 HALDEBUG(ah, HAL_DEBUG_ATTACH | HAL_DEBUG_EEPROM, 426 "%s Eeprom Version %u.%u\n", __func__, 427 owl_get_eep_ver(ee), owl_get_eep_rev(ee)); 428 429 /* NB: must be after all byte swapping */ 430 if (owl_get_eep_ver(ee) != AR5416_EEP_VER) { 431 HALDEBUG(ah, HAL_DEBUG_ANY, 432 "Bad EEPROM version 0x%x\n", owl_get_eep_ver(ee)); 433 return HAL_EEBADSUM; 434 } 435 436 v14EepromReadCTLInfo(ah, ee); /* Get CTLs */ 437 438 AH_PRIVATE(ah)->ah_eeprom = ee; 439 AH_PRIVATE(ah)->ah_eeversion = ee->ee_base.baseEepHeader.version; 440 AH_PRIVATE(ah)->ah_eepromDetach = v14EepromDetach; 441 AH_PRIVATE(ah)->ah_eepromGet = v14EepromGet; 442 AH_PRIVATE(ah)->ah_eepromSet = v14EepromSet; 443 AH_PRIVATE(ah)->ah_getSpurChan = v14EepromGetSpurChan; 444 AH_PRIVATE(ah)->ah_eepromDiag = v14EepromDiag; 445 return HAL_OK; 446 #undef NW 447 } 448