1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 #include "opt_ah.h" 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/sysctl.h> 38 #include <sys/bus.h> 39 #include <sys/malloc.h> 40 #include <sys/proc.h> 41 42 #include <machine/stdarg.h> 43 44 #include <net/ethernet.h> /* XXX for ether_sprintf */ 45 46 #include <contrib/dev/ath/ah.h> 47 48 /* 49 * WiSoC boards overload the bus tag with information about the 50 * board layout. We must extract the bus space tag from that 51 * indirect structure. For everyone else the tag is passed in 52 * directly. 53 * XXX cache indirect ref privately 54 */ 55 #ifdef AH_SUPPORT_AR5312 56 #define BUSTAG(ah) \ 57 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 58 #else 59 #define BUSTAG(ah) ((bus_space_tag_t) (ah)->ah_st) 60 #endif 61 62 extern void ath_hal_printf(struct ath_hal *, const char*, ...) 63 __printflike(2,3); 64 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 65 __printflike(2, 0); 66 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 67 extern void *ath_hal_malloc(size_t); 68 extern void ath_hal_free(void *); 69 #ifdef AH_ASSERT 70 extern void ath_hal_assert_failed(const char* filename, 71 int lineno, const char* msg); 72 #endif 73 #ifdef AH_DEBUG 74 extern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...); 75 extern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...); 76 #endif /* AH_DEBUG */ 77 78 /* NB: put this here instead of the driver to avoid circular references */ 79 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 80 SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters"); 81 82 #ifdef AH_DEBUG 83 static int ath_hal_debug = 0; 84 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug, 85 0, "Atheros HAL debugging printfs"); 86 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug); 87 #endif /* AH_DEBUG */ 88 89 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, version, CTLFLAG_RD, ath_hal_version, 0, 90 "Atheros HAL version"); 91 92 /* NB: these are deprecated; they exist for now for compatibility */ 93 int ath_hal_dma_beacon_response_time = 2; /* in TU's */ 94 SYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW, 95 &ath_hal_dma_beacon_response_time, 0, 96 "Atheros HAL DMA beacon response time"); 97 int ath_hal_sw_beacon_response_time = 10; /* in TU's */ 98 SYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW, 99 &ath_hal_sw_beacon_response_time, 0, 100 "Atheros HAL software beacon response time"); 101 int ath_hal_additional_swba_backoff = 0; /* in TU's */ 102 SYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW, 103 &ath_hal_additional_swba_backoff, 0, 104 "Atheros HAL additional SWBA backoff time"); 105 106 MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 107 108 void* 109 ath_hal_malloc(size_t size) 110 { 111 return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 112 } 113 114 void 115 ath_hal_free(void* p) 116 { 117 return free(p, M_ATH_HAL); 118 } 119 120 void 121 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 122 { 123 vprintf(fmt, ap); 124 } 125 126 void 127 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 128 { 129 va_list ap; 130 va_start(ap, fmt); 131 ath_hal_vprintf(ah, fmt, ap); 132 va_end(ap); 133 } 134 135 const char* 136 ath_hal_ether_sprintf(const u_int8_t *mac) 137 { 138 return ether_sprintf(mac); 139 } 140 141 #ifdef AH_DEBUG 142 void 143 HALDEBUG(struct ath_hal *ah, const char* fmt, ...) 144 { 145 if (ath_hal_debug) { 146 __va_list ap; 147 va_start(ap, fmt); 148 ath_hal_vprintf(ah, fmt, ap); 149 va_end(ap); 150 } 151 } 152 153 void 154 HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...) 155 { 156 if (ath_hal_debug >= level) { 157 __va_list ap; 158 va_start(ap, fmt); 159 ath_hal_vprintf(ah, fmt, ap); 160 va_end(ap); 161 } 162 } 163 #endif /* AH_DEBUG */ 164 165 #ifdef AH_DEBUG_ALQ 166 /* 167 * ALQ register tracing support. 168 * 169 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 170 * writes to the file /tmp/ath_hal.log. The file format is a simple 171 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 172 * and then decode the file with the arcode program (that is part of the 173 * HAL). If you start+stop tracing the data will be appended to an 174 * existing file. 175 * 176 * NB: doesn't handle multiple devices properly; only one DEVICE record 177 * is emitted and the different devices are not identified. 178 */ 179 #include <sys/alq.h> 180 #include <sys/pcpu.h> 181 #include <contrib/dev/ath/ah_decode.h> 182 183 static struct alq *ath_hal_alq; 184 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 185 static u_int ath_hal_alq_lost; /* count of lost records */ 186 static const char *ath_hal_logfile = "/tmp/ath_hal.log"; 187 static u_int ath_hal_alq_qsize = 64*1024; 188 189 static int 190 ath_hal_setlogging(int enable) 191 { 192 int error; 193 194 if (enable) { 195 error = alq_open(&ath_hal_alq, ath_hal_logfile, 196 curthread->td_ucred, ALQ_DEFAULT_CMODE, 197 sizeof (struct athregrec), ath_hal_alq_qsize); 198 ath_hal_alq_lost = 0; 199 ath_hal_alq_emitdev = 1; 200 printf("ath_hal: logging to %s enabled\n", 201 ath_hal_logfile); 202 } else { 203 if (ath_hal_alq) 204 alq_close(ath_hal_alq); 205 ath_hal_alq = NULL; 206 printf("ath_hal: logging disabled\n"); 207 error = 0; 208 } 209 return (error); 210 } 211 212 static int 213 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 214 { 215 int error, enable; 216 217 enable = (ath_hal_alq != NULL); 218 error = sysctl_handle_int(oidp, &enable, 0, req); 219 if (error || !req->newptr) 220 return (error); 221 else 222 return (ath_hal_setlogging(enable)); 223 } 224 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 225 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 226 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 227 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 228 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 229 &ath_hal_alq_lost, 0, "Register operations not logged"); 230 231 static struct ale * 232 ath_hal_alq_get(struct ath_hal *ah) 233 { 234 struct ale *ale; 235 236 if (ath_hal_alq_emitdev) { 237 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 238 if (ale) { 239 struct athregrec *r = 240 (struct athregrec *) ale->ae_data; 241 r->op = OP_DEVICE; 242 r->reg = 0; 243 r->val = ah->ah_devid; 244 alq_post(ath_hal_alq, ale); 245 ath_hal_alq_emitdev = 0; 246 } else 247 ath_hal_alq_lost++; 248 } 249 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 250 if (!ale) 251 ath_hal_alq_lost++; 252 return ale; 253 } 254 255 void 256 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 257 { 258 bus_space_tag_t tag = BUSTAG(ah); 259 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 260 261 if (ath_hal_alq) { 262 struct ale *ale = ath_hal_alq_get(ah); 263 if (ale) { 264 struct athregrec *r = (struct athregrec *) ale->ae_data; 265 r->op = OP_WRITE; 266 r->reg = reg; 267 r->val = val; 268 alq_post(ath_hal_alq, ale); 269 } 270 } 271 #if _BYTE_ORDER == _BIG_ENDIAN 272 if (reg >= 0x4000 && reg < 0x5000) 273 bus_space_write_4(tag, h, reg, val); 274 else 275 #endif 276 bus_space_write_stream_4(tag, h, reg, val); 277 } 278 279 u_int32_t 280 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 281 { 282 bus_space_tag_t tag = BUSTAG(ah); 283 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 284 u_int32_t val; 285 286 #if _BYTE_ORDER == _BIG_ENDIAN 287 if (reg >= 0x4000 && reg < 0x5000) 288 val = bus_space_read_4(tag, h, reg); 289 else 290 #endif 291 val = bus_space_read_stream_4(tag, h, reg); 292 if (ath_hal_alq) { 293 struct ale *ale = ath_hal_alq_get(ah); 294 if (ale) { 295 struct athregrec *r = (struct athregrec *) ale->ae_data; 296 r->op = OP_READ; 297 r->reg = reg; 298 r->val = val; 299 alq_post(ath_hal_alq, ale); 300 } 301 } 302 return val; 303 } 304 305 void 306 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 307 { 308 if (ath_hal_alq) { 309 struct ale *ale = ath_hal_alq_get(ah); 310 if (ale) { 311 struct athregrec *r = (struct athregrec *) ale->ae_data; 312 r->op = OP_MARK; 313 r->reg = id; 314 r->val = v; 315 alq_post(ath_hal_alq, ale); 316 } 317 } 318 } 319 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) 320 /* 321 * Memory-mapped device register read/write. These are here 322 * as routines when debugging support is enabled and/or when 323 * explicitly configured to use function calls. The latter is 324 * for architectures that might need to do something before 325 * referencing memory (e.g. remap an i/o window). 326 * 327 * NB: see the comments in ah_osdep.h about byte-swapping register 328 * reads and writes to understand what's going on below. 329 */ 330 331 void 332 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 333 { 334 bus_space_tag_t tag = BUSTAG(ah); 335 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 336 337 #if _BYTE_ORDER == _BIG_ENDIAN 338 if (reg >= 0x4000 && reg < 0x5000) 339 bus_space_write_4(tag, h, reg, val); 340 else 341 #endif 342 bus_space_write_stream_4(tag, h, reg, val); 343 } 344 345 u_int32_t 346 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 347 { 348 bus_space_tag_t tag = BUSTAG(ah); 349 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 350 u_int32_t val; 351 352 #if _BYTE_ORDER == _BIG_ENDIAN 353 if (reg >= 0x4000 && reg < 0x5000) 354 val = bus_space_read_4(tag, h, reg); 355 else 356 #endif 357 val = bus_space_read_stream_4(tag, h, reg); 358 return val; 359 } 360 #endif /* AH_DEBUG || AH_REGOPS_FUNC */ 361 362 #ifdef AH_ASSERT 363 void 364 ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 365 { 366 printf("Atheros HAL assertion failure: %s: line %u: %s\n", 367 filename, lineno, msg); 368 panic("ath_hal_assert"); 369 } 370 #endif /* AH_ASSERT */ 371 372 /* 373 * Delay n microseconds. 374 */ 375 void 376 ath_hal_delay(int n) 377 { 378 DELAY(n); 379 } 380 381 u_int32_t 382 ath_hal_getuptime(struct ath_hal *ah) 383 { 384 struct bintime bt; 385 getbinuptime(&bt); 386 return (bt.sec * 1000) + 387 (((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32); 388 } 389 390 void 391 ath_hal_memzero(void *dst, size_t n) 392 { 393 bzero(dst, n); 394 } 395 396 void * 397 ath_hal_memcpy(void *dst, const void *src, size_t n) 398 { 399 return memcpy(dst, src, n); 400 } 401 402 /* 403 * Module glue. 404 */ 405 406 static int 407 ath_hal_modevent(module_t mod, int type, void *unused) 408 { 409 const char *sep; 410 int i; 411 412 switch (type) { 413 case MOD_LOAD: 414 printf("ath_hal: %s (", ath_hal_version); 415 sep = ""; 416 for (i = 0; ath_hal_buildopts[i] != NULL; i++) { 417 printf("%s%s", sep, ath_hal_buildopts[i]); 418 sep = ", "; 419 } 420 printf(")\n"); 421 return 0; 422 case MOD_UNLOAD: 423 return 0; 424 } 425 return EINVAL; 426 } 427 428 static moduledata_t ath_hal_mod = { 429 "ath_hal", 430 ath_hal_modevent, 431 0 432 }; 433 DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY); 434 MODULE_VERSION(ath_hal, 1); 435