1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 #include "opt_ah.h" 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/sysctl.h> 38 #include <sys/bus.h> 39 #include <sys/malloc.h> 40 #include <sys/proc.h> 41 42 #include <machine/stdarg.h> 43 44 #include <net/ethernet.h> /* XXX for ether_sprintf */ 45 46 #include <contrib/dev/ath/ah.h> 47 48 /* 49 * WiSoC boards overload the bus tag with information about the 50 * board layout. We must extract the bus space tag from that 51 * indirect structure. For everyone else the tag is passed in 52 * directly. 53 * XXX cache indirect ref privately 54 */ 55 #ifdef AH_SUPPORT_AR5312 56 #define BUSTAG(ah) \ 57 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 58 #else 59 #define BUSTAG(ah) ((bus_space_tag_t) (ah)->ah_st) 60 #endif 61 62 extern void ath_hal_printf(struct ath_hal *, const char*, ...) 63 __printflike(2,3); 64 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 65 __printflike(2, 0); 66 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 67 extern void *ath_hal_malloc(size_t); 68 extern void ath_hal_free(void *); 69 #ifdef AH_ASSERT 70 extern void ath_hal_assert_failed(const char* filename, 71 int lineno, const char* msg); 72 #endif 73 #ifdef AH_DEBUG 74 #if HAL_ABI_VERSION >= 0x08090101 75 extern void HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...); 76 #else 77 extern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...); 78 extern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...); 79 #endif 80 #endif /* AH_DEBUG */ 81 82 /* NB: put this here instead of the driver to avoid circular references */ 83 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 84 SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters"); 85 86 #ifdef AH_DEBUG 87 static int ath_hal_debug = 0; 88 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug, 89 0, "Atheros HAL debugging printfs"); 90 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug); 91 #endif /* AH_DEBUG */ 92 93 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, version, CTLFLAG_RD, ath_hal_version, 0, 94 "Atheros HAL version"); 95 96 /* NB: these are deprecated; they exist for now for compatibility */ 97 int ath_hal_dma_beacon_response_time = 2; /* in TU's */ 98 SYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW, 99 &ath_hal_dma_beacon_response_time, 0, 100 "Atheros HAL DMA beacon response time"); 101 int ath_hal_sw_beacon_response_time = 10; /* in TU's */ 102 SYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW, 103 &ath_hal_sw_beacon_response_time, 0, 104 "Atheros HAL software beacon response time"); 105 int ath_hal_additional_swba_backoff = 0; /* in TU's */ 106 SYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW, 107 &ath_hal_additional_swba_backoff, 0, 108 "Atheros HAL additional SWBA backoff time"); 109 110 MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 111 112 void* 113 ath_hal_malloc(size_t size) 114 { 115 return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 116 } 117 118 void 119 ath_hal_free(void* p) 120 { 121 return free(p, M_ATH_HAL); 122 } 123 124 void 125 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 126 { 127 vprintf(fmt, ap); 128 } 129 130 void 131 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 132 { 133 va_list ap; 134 va_start(ap, fmt); 135 ath_hal_vprintf(ah, fmt, ap); 136 va_end(ap); 137 } 138 139 const char* 140 ath_hal_ether_sprintf(const u_int8_t *mac) 141 { 142 return ether_sprintf(mac); 143 } 144 145 #ifdef AH_DEBUG 146 #if HAL_ABI_VERSION >= 0x08090101 147 void 148 HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 149 { 150 if (ath_hal_debug & mask) { 151 __va_list ap; 152 va_start(ap, fmt); 153 ath_hal_vprintf(ah, fmt, ap); 154 va_end(ap); 155 } 156 } 157 #else 158 void 159 HALDEBUG(struct ath_hal *ah, const char* fmt, ...) 160 { 161 if (ath_hal_debug) { 162 __va_list ap; 163 va_start(ap, fmt); 164 ath_hal_vprintf(ah, fmt, ap); 165 va_end(ap); 166 } 167 } 168 169 void 170 HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...) 171 { 172 if (ath_hal_debug >= level) { 173 __va_list ap; 174 va_start(ap, fmt); 175 ath_hal_vprintf(ah, fmt, ap); 176 va_end(ap); 177 } 178 } 179 #endif 180 #endif /* AH_DEBUG */ 181 182 #ifdef AH_DEBUG_ALQ 183 /* 184 * ALQ register tracing support. 185 * 186 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 187 * writes to the file /tmp/ath_hal.log. The file format is a simple 188 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 189 * and then decode the file with the arcode program (that is part of the 190 * HAL). If you start+stop tracing the data will be appended to an 191 * existing file. 192 * 193 * NB: doesn't handle multiple devices properly; only one DEVICE record 194 * is emitted and the different devices are not identified. 195 */ 196 #include <sys/alq.h> 197 #include <sys/pcpu.h> 198 #include <contrib/dev/ath/ah_decode.h> 199 200 static struct alq *ath_hal_alq; 201 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 202 static u_int ath_hal_alq_lost; /* count of lost records */ 203 static const char *ath_hal_logfile = "/tmp/ath_hal.log"; 204 static u_int ath_hal_alq_qsize = 64*1024; 205 206 static int 207 ath_hal_setlogging(int enable) 208 { 209 int error; 210 211 if (enable) { 212 error = alq_open(&ath_hal_alq, ath_hal_logfile, 213 curthread->td_ucred, ALQ_DEFAULT_CMODE, 214 sizeof (struct athregrec), ath_hal_alq_qsize); 215 ath_hal_alq_lost = 0; 216 ath_hal_alq_emitdev = 1; 217 printf("ath_hal: logging to %s enabled\n", 218 ath_hal_logfile); 219 } else { 220 if (ath_hal_alq) 221 alq_close(ath_hal_alq); 222 ath_hal_alq = NULL; 223 printf("ath_hal: logging disabled\n"); 224 error = 0; 225 } 226 return (error); 227 } 228 229 static int 230 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 231 { 232 int error, enable; 233 234 enable = (ath_hal_alq != NULL); 235 error = sysctl_handle_int(oidp, &enable, 0, req); 236 if (error || !req->newptr) 237 return (error); 238 else 239 return (ath_hal_setlogging(enable)); 240 } 241 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 242 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 243 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 244 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 245 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 246 &ath_hal_alq_lost, 0, "Register operations not logged"); 247 248 static struct ale * 249 ath_hal_alq_get(struct ath_hal *ah) 250 { 251 struct ale *ale; 252 253 if (ath_hal_alq_emitdev) { 254 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 255 if (ale) { 256 struct athregrec *r = 257 (struct athregrec *) ale->ae_data; 258 r->op = OP_DEVICE; 259 r->reg = 0; 260 r->val = ah->ah_devid; 261 alq_post(ath_hal_alq, ale); 262 ath_hal_alq_emitdev = 0; 263 } else 264 ath_hal_alq_lost++; 265 } 266 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 267 if (!ale) 268 ath_hal_alq_lost++; 269 return ale; 270 } 271 272 void 273 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 274 { 275 bus_space_tag_t tag = BUSTAG(ah); 276 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 277 278 if (ath_hal_alq) { 279 struct ale *ale = ath_hal_alq_get(ah); 280 if (ale) { 281 struct athregrec *r = (struct athregrec *) ale->ae_data; 282 r->op = OP_WRITE; 283 r->reg = reg; 284 r->val = val; 285 alq_post(ath_hal_alq, ale); 286 } 287 } 288 #if _BYTE_ORDER == _BIG_ENDIAN 289 if (reg >= 0x4000 && reg < 0x5000) 290 bus_space_write_4(tag, h, reg, val); 291 else 292 #endif 293 bus_space_write_stream_4(tag, h, reg, val); 294 } 295 296 u_int32_t 297 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 298 { 299 bus_space_tag_t tag = BUSTAG(ah); 300 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 301 u_int32_t val; 302 303 #if _BYTE_ORDER == _BIG_ENDIAN 304 if (reg >= 0x4000 && reg < 0x5000) 305 val = bus_space_read_4(tag, h, reg); 306 else 307 #endif 308 val = bus_space_read_stream_4(tag, h, reg); 309 if (ath_hal_alq) { 310 struct ale *ale = ath_hal_alq_get(ah); 311 if (ale) { 312 struct athregrec *r = (struct athregrec *) ale->ae_data; 313 r->op = OP_READ; 314 r->reg = reg; 315 r->val = val; 316 alq_post(ath_hal_alq, ale); 317 } 318 } 319 return val; 320 } 321 322 void 323 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 324 { 325 if (ath_hal_alq) { 326 struct ale *ale = ath_hal_alq_get(ah); 327 if (ale) { 328 struct athregrec *r = (struct athregrec *) ale->ae_data; 329 r->op = OP_MARK; 330 r->reg = id; 331 r->val = v; 332 alq_post(ath_hal_alq, ale); 333 } 334 } 335 } 336 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) 337 /* 338 * Memory-mapped device register read/write. These are here 339 * as routines when debugging support is enabled and/or when 340 * explicitly configured to use function calls. The latter is 341 * for architectures that might need to do something before 342 * referencing memory (e.g. remap an i/o window). 343 * 344 * NB: see the comments in ah_osdep.h about byte-swapping register 345 * reads and writes to understand what's going on below. 346 */ 347 348 void 349 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 350 { 351 bus_space_tag_t tag = BUSTAG(ah); 352 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 353 354 #if _BYTE_ORDER == _BIG_ENDIAN 355 if (reg >= 0x4000 && reg < 0x5000) 356 bus_space_write_4(tag, h, reg, val); 357 else 358 #endif 359 bus_space_write_stream_4(tag, h, reg, val); 360 } 361 362 u_int32_t 363 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 364 { 365 bus_space_tag_t tag = BUSTAG(ah); 366 bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh; 367 u_int32_t val; 368 369 #if _BYTE_ORDER == _BIG_ENDIAN 370 if (reg >= 0x4000 && reg < 0x5000) 371 val = bus_space_read_4(tag, h, reg); 372 else 373 #endif 374 val = bus_space_read_stream_4(tag, h, reg); 375 return val; 376 } 377 #endif /* AH_DEBUG || AH_REGOPS_FUNC */ 378 379 #ifdef AH_ASSERT 380 void 381 ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 382 { 383 printf("Atheros HAL assertion failure: %s: line %u: %s\n", 384 filename, lineno, msg); 385 panic("ath_hal_assert"); 386 } 387 #endif /* AH_ASSERT */ 388 389 /* 390 * Delay n microseconds. 391 */ 392 void 393 ath_hal_delay(int n) 394 { 395 DELAY(n); 396 } 397 398 u_int32_t 399 ath_hal_getuptime(struct ath_hal *ah) 400 { 401 struct bintime bt; 402 getbinuptime(&bt); 403 return (bt.sec * 1000) + 404 (((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32); 405 } 406 407 void 408 ath_hal_memzero(void *dst, size_t n) 409 { 410 bzero(dst, n); 411 } 412 413 void * 414 ath_hal_memcpy(void *dst, const void *src, size_t n) 415 { 416 return memcpy(dst, src, n); 417 } 418 419 /* 420 * Module glue. 421 */ 422 423 static int 424 ath_hal_modevent(module_t mod, int type, void *unused) 425 { 426 const char *sep; 427 int i; 428 429 switch (type) { 430 case MOD_LOAD: 431 printf("ath_hal: %s (", ath_hal_version); 432 sep = ""; 433 for (i = 0; ath_hal_buildopts[i] != NULL; i++) { 434 printf("%s%s", sep, ath_hal_buildopts[i]); 435 sep = ", "; 436 } 437 printf(")\n"); 438 return 0; 439 case MOD_UNLOAD: 440 return 0; 441 } 442 return EINVAL; 443 } 444 445 static moduledata_t ath_hal_mod = { 446 "ath_hal", 447 ath_hal_modevent, 448 0 449 }; 450 DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY); 451 MODULE_VERSION(ath_hal, 1); 452