1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 #include "opt_ah.h" 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/sysctl.h> 38 #include <sys/bus.h> 39 #include <sys/malloc.h> 40 #include <sys/proc.h> 41 #include <sys/pcpu.h> 42 #include <sys/lock.h> 43 #include <sys/mutex.h> 44 45 #include <machine/stdarg.h> 46 47 #include <net/ethernet.h> /* XXX for ether_sprintf */ 48 49 #include <dev/ath/ath_hal/ah.h> 50 #include <dev/ath/ath_hal/ah_debug.h> 51 52 /* 53 * WiSoC boards overload the bus tag with information about the 54 * board layout. We must extract the bus space tag from that 55 * indirect structure. For everyone else the tag is passed in 56 * directly. 57 * XXX cache indirect ref privately 58 */ 59 #ifdef AH_SUPPORT_AR5312 60 #define BUSTAG(ah) \ 61 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 62 #else 63 #define BUSTAG(ah) ((ah)->ah_st) 64 #endif 65 66 /* 67 * This lock is used to seralise register access for chips which have 68 * problems w/ SMP CPUs issuing concurrent PCI transactions. 69 * 70 * XXX This is a global lock for now; it should be pushed to 71 * a per-device lock in some platform-independent fashion. 72 */ 73 struct mtx ah_regser_mtx; 74 MTX_SYSINIT(ah_regser, &ah_regser_mtx, "Atheros register access mutex", 75 MTX_SPIN); 76 77 extern void ath_hal_printf(struct ath_hal *, const char*, ...) 78 __printflike(2,3); 79 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 80 __printflike(2, 0); 81 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 82 extern void *ath_hal_malloc(size_t); 83 extern void ath_hal_free(void *); 84 #ifdef AH_ASSERT 85 extern void ath_hal_assert_failed(const char* filename, 86 int lineno, const char* msg); 87 #endif 88 #ifdef AH_DEBUG 89 extern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...); 90 #endif /* AH_DEBUG */ 91 92 /* NB: put this here instead of the driver to avoid circular references */ 93 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 94 static SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, 95 "Atheros HAL parameters"); 96 97 #ifdef AH_DEBUG 98 int ath_hal_debug = 0; 99 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RWTUN, &ath_hal_debug, 100 0, "Atheros HAL debugging printfs"); 101 #endif /* AH_DEBUG */ 102 103 static MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 104 105 void* 106 ath_hal_malloc(size_t size) 107 { 108 return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 109 } 110 111 void 112 ath_hal_free(void* p) 113 { 114 free(p, M_ATH_HAL); 115 } 116 117 void 118 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 119 { 120 vprintf(fmt, ap); 121 } 122 123 void 124 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 125 { 126 va_list ap; 127 va_start(ap, fmt); 128 ath_hal_vprintf(ah, fmt, ap); 129 va_end(ap); 130 } 131 132 const char* 133 ath_hal_ether_sprintf(const u_int8_t *mac) 134 { 135 return ether_sprintf(mac); 136 } 137 138 #ifdef AH_DEBUG 139 140 /* 141 * XXX This is highly relevant only for the AR5416 and later 142 * PCI/PCIe NICs. It'll need adjustment for other hardware 143 * variations. 144 */ 145 static int 146 ath_hal_reg_whilst_asleep(struct ath_hal *ah, uint32_t reg) 147 { 148 149 if (reg >= 0x4000 && reg < 0x5000) 150 return (1); 151 if (reg >= 0x6000 && reg < 0x7000) 152 return (1); 153 if (reg >= 0x7000 && reg < 0x8000) 154 return (1); 155 return (0); 156 } 157 158 void 159 DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 160 { 161 if ((mask == HAL_DEBUG_UNMASKABLE) || 162 (ah != NULL && ah->ah_config.ah_debug & mask) || 163 (ath_hal_debug & mask)) { 164 __va_list ap; 165 va_start(ap, fmt); 166 ath_hal_vprintf(ah, fmt, ap); 167 va_end(ap); 168 } 169 } 170 #undef HAL_DEBUG_UNMASKABLE 171 #endif /* AH_DEBUG */ 172 173 #ifdef AH_DEBUG_ALQ 174 /* 175 * ALQ register tracing support. 176 * 177 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 178 * writes to the file /tmp/ath_hal.log. The file format is a simple 179 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 180 * and then decode the file with the arcode program (that is part of the 181 * HAL). If you start+stop tracing the data will be appended to an 182 * existing file. 183 * 184 * NB: doesn't handle multiple devices properly; only one DEVICE record 185 * is emitted and the different devices are not identified. 186 */ 187 #include <sys/alq.h> 188 #include <sys/pcpu.h> 189 #include <dev/ath/ath_hal/ah_decode.h> 190 191 static struct alq *ath_hal_alq; 192 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 193 static u_int ath_hal_alq_lost; /* count of lost records */ 194 static char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log"; 195 196 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW, 197 &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile"); 198 199 static u_int ath_hal_alq_qsize = 64*1024; 200 201 static int 202 ath_hal_setlogging(int enable) 203 { 204 int error; 205 206 if (enable) { 207 error = alq_open(&ath_hal_alq, ath_hal_logfile, 208 curthread->td_ucred, ALQ_DEFAULT_CMODE, 209 sizeof (struct athregrec), ath_hal_alq_qsize); 210 ath_hal_alq_lost = 0; 211 ath_hal_alq_emitdev = 1; 212 printf("ath_hal: logging to %s enabled\n", 213 ath_hal_logfile); 214 } else { 215 if (ath_hal_alq) 216 alq_close(ath_hal_alq); 217 ath_hal_alq = NULL; 218 printf("ath_hal: logging disabled\n"); 219 error = 0; 220 } 221 return (error); 222 } 223 224 static int 225 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 226 { 227 int error, enable; 228 229 enable = (ath_hal_alq != NULL); 230 error = sysctl_handle_int(oidp, &enable, 0, req); 231 if (error || !req->newptr) 232 return (error); 233 else 234 return (ath_hal_setlogging(enable)); 235 } 236 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 237 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 238 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 239 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 240 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 241 &ath_hal_alq_lost, 0, "Register operations not logged"); 242 243 static struct ale * 244 ath_hal_alq_get(struct ath_hal *ah) 245 { 246 struct ale *ale; 247 248 if (ath_hal_alq_emitdev) { 249 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 250 if (ale) { 251 struct athregrec *r = 252 (struct athregrec *) ale->ae_data; 253 r->op = OP_DEVICE; 254 r->reg = 0; 255 r->val = ah->ah_devid; 256 alq_post(ath_hal_alq, ale); 257 ath_hal_alq_emitdev = 0; 258 } else 259 ath_hal_alq_lost++; 260 } 261 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 262 if (!ale) 263 ath_hal_alq_lost++; 264 return ale; 265 } 266 267 void 268 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 269 { 270 bus_space_tag_t tag = BUSTAG(ah); 271 bus_space_handle_t h = ah->ah_sh; 272 273 #ifdef AH_DEBUG 274 /* Debug - complain if we haven't fully waken things up */ 275 if (! ath_hal_reg_whilst_asleep(ah, reg) && 276 ah->ah_powerMode != HAL_PM_AWAKE) { 277 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", 278 __func__, reg, val, ah->ah_powerMode); 279 } 280 #endif 281 282 if (ath_hal_alq) { 283 struct ale *ale = ath_hal_alq_get(ah); 284 if (ale) { 285 struct athregrec *r = (struct athregrec *) ale->ae_data; 286 r->threadid = curthread->td_tid; 287 r->op = OP_WRITE; 288 r->reg = reg; 289 r->val = val; 290 alq_post(ath_hal_alq, ale); 291 } 292 } 293 if (ah->ah_config.ah_serialise_reg_war) 294 mtx_lock_spin(&ah_regser_mtx); 295 bus_space_write_4(tag, h, reg, val); 296 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_WRITE); 297 if (ah->ah_config.ah_serialise_reg_war) 298 mtx_unlock_spin(&ah_regser_mtx); 299 } 300 301 u_int32_t 302 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 303 { 304 bus_space_tag_t tag = BUSTAG(ah); 305 bus_space_handle_t h = ah->ah_sh; 306 u_int32_t val; 307 308 #ifdef AH_DEBUG 309 /* Debug - complain if we haven't fully waken things up */ 310 if (! ath_hal_reg_whilst_asleep(ah, reg) && 311 ah->ah_powerMode != HAL_PM_AWAKE) { 312 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", 313 __func__, reg, ah->ah_powerMode); 314 } 315 #endif 316 317 if (ah->ah_config.ah_serialise_reg_war) 318 mtx_lock_spin(&ah_regser_mtx); 319 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_READ); 320 val = bus_space_read_4(tag, h, reg); 321 if (ah->ah_config.ah_serialise_reg_war) 322 mtx_unlock_spin(&ah_regser_mtx); 323 if (ath_hal_alq) { 324 struct ale *ale = ath_hal_alq_get(ah); 325 if (ale) { 326 struct athregrec *r = (struct athregrec *) ale->ae_data; 327 r->threadid = curthread->td_tid; 328 r->op = OP_READ; 329 r->reg = reg; 330 r->val = val; 331 alq_post(ath_hal_alq, ale); 332 } 333 } 334 return val; 335 } 336 337 void 338 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 339 { 340 if (ath_hal_alq) { 341 struct ale *ale = ath_hal_alq_get(ah); 342 if (ale) { 343 struct athregrec *r = (struct athregrec *) ale->ae_data; 344 r->threadid = curthread->td_tid; 345 r->op = OP_MARK; 346 r->reg = id; 347 r->val = v; 348 alq_post(ath_hal_alq, ale); 349 } 350 } 351 } 352 #else /* AH_DEBUG_ALQ */ 353 354 /* 355 * Memory-mapped device register read/write. These are here 356 * as routines when debugging support is enabled and/or when 357 * explicitly configured to use function calls. The latter is 358 * for architectures that might need to do something before 359 * referencing memory (e.g. remap an i/o window). 360 * 361 * NB: see the comments in ah_osdep.h about byte-swapping register 362 * reads and writes to understand what's going on below. 363 */ 364 365 void 366 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 367 { 368 bus_space_tag_t tag = BUSTAG(ah); 369 bus_space_handle_t h = ah->ah_sh; 370 371 #ifdef AH_DEBUG 372 /* Debug - complain if we haven't fully waken things up */ 373 if (! ath_hal_reg_whilst_asleep(ah, reg) && 374 ah->ah_powerMode != HAL_PM_AWAKE) { 375 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n", 376 __func__, reg, val, ah->ah_powerMode); 377 } 378 #endif 379 380 if (ah->ah_config.ah_serialise_reg_war) 381 mtx_lock_spin(&ah_regser_mtx); 382 bus_space_write_4(tag, h, reg, val); 383 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_WRITE); 384 if (ah->ah_config.ah_serialise_reg_war) 385 mtx_unlock_spin(&ah_regser_mtx); 386 } 387 388 u_int32_t 389 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 390 { 391 bus_space_tag_t tag = BUSTAG(ah); 392 bus_space_handle_t h = ah->ah_sh; 393 u_int32_t val; 394 395 #ifdef AH_DEBUG 396 /* Debug - complain if we haven't fully waken things up */ 397 if (! ath_hal_reg_whilst_asleep(ah, reg) && 398 ah->ah_powerMode != HAL_PM_AWAKE) { 399 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n", 400 __func__, reg, ah->ah_powerMode); 401 } 402 #endif 403 404 if (ah->ah_config.ah_serialise_reg_war) 405 mtx_lock_spin(&ah_regser_mtx); 406 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_READ); 407 val = bus_space_read_4(tag, h, reg); 408 if (ah->ah_config.ah_serialise_reg_war) 409 mtx_unlock_spin(&ah_regser_mtx); 410 return val; 411 } 412 #endif /* AH_DEBUG_ALQ */ 413 414 #ifdef AH_ASSERT 415 void 416 ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 417 { 418 printf("Atheros HAL assertion failure: %s: line %u: %s\n", 419 filename, lineno, msg); 420 panic("ath_hal_assert"); 421 } 422 #endif /* AH_ASSERT */ 423