xref: /freebsd/sys/dev/ath/ah_osdep.c (revision 69c5bce6ee1ec42997757e7f1334767d217c5d7d)
1 /*-
2  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification.
11  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13  *    redistribution must be conditioned upon including a substantially
14  *    similar Disclaimer requirement for further binary redistribution.
15  *
16  * NO WARRANTY
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27  * THE POSSIBILITY OF SUCH DAMAGES.
28  *
29  * $FreeBSD$
30  */
31 #include "opt_ah.h"
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/sysctl.h>
38 #include <sys/bus.h>
39 #include <sys/malloc.h>
40 #include <sys/proc.h>
41 
42 #include <machine/stdarg.h>
43 
44 #include <net/ethernet.h>		/* XXX for ether_sprintf */
45 
46 #include <dev/ath/ath_hal/ah.h>
47 
48 /*
49  * WiSoC boards overload the bus tag with information about the
50  * board layout.  We must extract the bus space tag from that
51  * indirect structure.  For everyone else the tag is passed in
52  * directly.
53  * XXX cache indirect ref privately
54  */
55 #ifdef AH_SUPPORT_AR5312
56 #define	BUSTAG(ah) \
57 	((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
58 #else
59 #define	BUSTAG(ah)	((ah)->ah_st)
60 #endif
61 
62 extern	void ath_hal_printf(struct ath_hal *, const char*, ...)
63 		__printflike(2,3);
64 extern	void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
65 		__printflike(2, 0);
66 extern	const char* ath_hal_ether_sprintf(const u_int8_t *mac);
67 extern	void *ath_hal_malloc(size_t);
68 extern	void ath_hal_free(void *);
69 #ifdef AH_ASSERT
70 extern	void ath_hal_assert_failed(const char* filename,
71 		int lineno, const char* msg);
72 #endif
73 #ifdef AH_DEBUG
74 extern	void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...);
75 #endif /* AH_DEBUG */
76 
77 /* NB: put this here instead of the driver to avoid circular references */
78 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
79 SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters");
80 
81 #ifdef AH_DEBUG
82 int ath_hal_debug = 0;
83 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
84     0, "Atheros HAL debugging printfs");
85 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
86 #endif /* AH_DEBUG */
87 
88 MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
89 
90 void*
91 ath_hal_malloc(size_t size)
92 {
93 	return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO);
94 }
95 
96 void
97 ath_hal_free(void* p)
98 {
99 	free(p, M_ATH_HAL);
100 }
101 
102 void
103 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap)
104 {
105 	vprintf(fmt, ap);
106 }
107 
108 void
109 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
110 {
111 	va_list ap;
112 	va_start(ap, fmt);
113 	ath_hal_vprintf(ah, fmt, ap);
114 	va_end(ap);
115 }
116 
117 const char*
118 ath_hal_ether_sprintf(const u_int8_t *mac)
119 {
120 	return ether_sprintf(mac);
121 }
122 
123 #ifdef AH_DEBUG
124 
125 /* This must match the definition in ath_hal/ah_debug.h */
126 #define	HAL_DEBUG_UNMASKABLE	0xf0000000
127 void
128 DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
129 {
130 	if ((mask == HAL_DEBUG_UNMASKABLE) ||
131 	    (ah != NULL && ah->ah_config.ah_debug & mask) ||
132 	    (ath_hal_debug & mask)) {
133 		__va_list ap;
134 		va_start(ap, fmt);
135 		ath_hal_vprintf(ah, fmt, ap);
136 		va_end(ap);
137 	}
138 }
139 #undef	HAL_DEBUG_UNMASKABLE
140 #endif /* AH_DEBUG */
141 
142 #ifdef AH_DEBUG_ALQ
143 /*
144  * ALQ register tracing support.
145  *
146  * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
147  * writes to the file /tmp/ath_hal.log.  The file format is a simple
148  * fixed-size array of records.  When done logging set hw.ath.hal.alq=0
149  * and then decode the file with the arcode program (that is part of the
150  * HAL).  If you start+stop tracing the data will be appended to an
151  * existing file.
152  *
153  * NB: doesn't handle multiple devices properly; only one DEVICE record
154  *     is emitted and the different devices are not identified.
155  */
156 #include <sys/alq.h>
157 #include <sys/pcpu.h>
158 #include <dev/ath/ath_hal/ah_decode.h>
159 
160 static	struct alq *ath_hal_alq;
161 static	int ath_hal_alq_emitdev;	/* need to emit DEVICE record */
162 static	u_int ath_hal_alq_lost;		/* count of lost records */
163 static	char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log";
164 
165 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW,
166     &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile");
167 
168 static	u_int ath_hal_alq_qsize = 64*1024;
169 
170 static int
171 ath_hal_setlogging(int enable)
172 {
173 	int error;
174 
175 	if (enable) {
176 		error = alq_open(&ath_hal_alq, ath_hal_logfile,
177 			curthread->td_ucred, ALQ_DEFAULT_CMODE,
178 			sizeof (struct athregrec), ath_hal_alq_qsize);
179 		ath_hal_alq_lost = 0;
180 		ath_hal_alq_emitdev = 1;
181 		printf("ath_hal: logging to %s enabled\n",
182 			ath_hal_logfile);
183 	} else {
184 		if (ath_hal_alq)
185 			alq_close(ath_hal_alq);
186 		ath_hal_alq = NULL;
187 		printf("ath_hal: logging disabled\n");
188 		error = 0;
189 	}
190 	return (error);
191 }
192 
193 static int
194 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
195 {
196 	int error, enable;
197 
198 	enable = (ath_hal_alq != NULL);
199         error = sysctl_handle_int(oidp, &enable, 0, req);
200         if (error || !req->newptr)
201                 return (error);
202 	else
203 		return (ath_hal_setlogging(enable));
204 }
205 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
206 	0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
207 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
208 	&ath_hal_alq_qsize, 0, "In-memory log size (#records)");
209 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
210 	&ath_hal_alq_lost, 0, "Register operations not logged");
211 
212 static struct ale *
213 ath_hal_alq_get(struct ath_hal *ah)
214 {
215 	struct ale *ale;
216 
217 	if (ath_hal_alq_emitdev) {
218 		ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
219 		if (ale) {
220 			struct athregrec *r =
221 				(struct athregrec *) ale->ae_data;
222 			r->op = OP_DEVICE;
223 			r->reg = 0;
224 			r->val = ah->ah_devid;
225 			alq_post(ath_hal_alq, ale);
226 			ath_hal_alq_emitdev = 0;
227 		} else
228 			ath_hal_alq_lost++;
229 	}
230 	ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
231 	if (!ale)
232 		ath_hal_alq_lost++;
233 	return ale;
234 }
235 
236 void
237 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
238 {
239 	bus_space_tag_t tag = BUSTAG(ah);
240 	bus_space_handle_t h = ah->ah_sh;
241 
242 	if (ath_hal_alq) {
243 		struct ale *ale = ath_hal_alq_get(ah);
244 		if (ale) {
245 			struct athregrec *r = (struct athregrec *) ale->ae_data;
246 			r->op = OP_WRITE;
247 			r->reg = reg;
248 			r->val = val;
249 			alq_post(ath_hal_alq, ale);
250 		}
251 	}
252 #if _BYTE_ORDER == _BIG_ENDIAN
253 	if (OS_REG_UNSWAPPED(reg))
254 		bus_space_write_4(tag, h, reg, val);
255 	else
256 #endif
257 		bus_space_write_stream_4(tag, h, reg, val);
258 }
259 
260 u_int32_t
261 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
262 {
263 	bus_space_tag_t tag = BUSTAG(ah);
264 	bus_space_handle_t h = ah->ah_sh;
265 	u_int32_t val;
266 
267 #if _BYTE_ORDER == _BIG_ENDIAN
268 	if (OS_REG_UNSWAPPED(reg))
269 		val = bus_space_read_4(tag, h, reg);
270 	else
271 #endif
272 		val = bus_space_read_stream_4(tag, h, reg);
273 	if (ath_hal_alq) {
274 		struct ale *ale = ath_hal_alq_get(ah);
275 		if (ale) {
276 			struct athregrec *r = (struct athregrec *) ale->ae_data;
277 			r->op = OP_READ;
278 			r->reg = reg;
279 			r->val = val;
280 			alq_post(ath_hal_alq, ale);
281 		}
282 	}
283 	return val;
284 }
285 
286 void
287 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
288 {
289 	if (ath_hal_alq) {
290 		struct ale *ale = ath_hal_alq_get(ah);
291 		if (ale) {
292 			struct athregrec *r = (struct athregrec *) ale->ae_data;
293 			r->op = OP_MARK;
294 			r->reg = id;
295 			r->val = v;
296 			alq_post(ath_hal_alq, ale);
297 		}
298 	}
299 }
300 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
301 /*
302  * Memory-mapped device register read/write.  These are here
303  * as routines when debugging support is enabled and/or when
304  * explicitly configured to use function calls.  The latter is
305  * for architectures that might need to do something before
306  * referencing memory (e.g. remap an i/o window).
307  *
308  * NB: see the comments in ah_osdep.h about byte-swapping register
309  *     reads and writes to understand what's going on below.
310  */
311 
312 void
313 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
314 {
315 	bus_space_tag_t tag = BUSTAG(ah);
316 	bus_space_handle_t h = ah->ah_sh;
317 
318 #if _BYTE_ORDER == _BIG_ENDIAN
319 	if (OS_REG_UNSWAPPED(reg))
320 		bus_space_write_4(tag, h, reg, val);
321 	else
322 #endif
323 		bus_space_write_stream_4(tag, h, reg, val);
324 }
325 
326 u_int32_t
327 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
328 {
329 	bus_space_tag_t tag = BUSTAG(ah);
330 	bus_space_handle_t h = ah->ah_sh;
331 	u_int32_t val;
332 
333 #if _BYTE_ORDER == _BIG_ENDIAN
334 	if (OS_REG_UNSWAPPED(reg))
335 		val = bus_space_read_4(tag, h, reg);
336 	else
337 #endif
338 		val = bus_space_read_stream_4(tag, h, reg);
339 	return val;
340 }
341 #endif /* AH_DEBUG || AH_REGOPS_FUNC */
342 
343 #ifdef AH_ASSERT
344 void
345 ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
346 {
347 	printf("Atheros HAL assertion failure: %s: line %u: %s\n",
348 		filename, lineno, msg);
349 	panic("ath_hal_assert");
350 }
351 #endif /* AH_ASSERT */
352