1 /*- 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 #include "opt_ah.h" 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/sysctl.h> 38 #include <sys/bus.h> 39 #include <sys/malloc.h> 40 #include <sys/proc.h> 41 #include <sys/lock.h> 42 #include <sys/mutex.h> 43 44 #include <machine/stdarg.h> 45 46 #include <net/ethernet.h> /* XXX for ether_sprintf */ 47 48 #include <dev/ath/ath_hal/ah.h> 49 50 /* 51 * WiSoC boards overload the bus tag with information about the 52 * board layout. We must extract the bus space tag from that 53 * indirect structure. For everyone else the tag is passed in 54 * directly. 55 * XXX cache indirect ref privately 56 */ 57 #ifdef AH_SUPPORT_AR5312 58 #define BUSTAG(ah) \ 59 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 60 #else 61 #define BUSTAG(ah) ((ah)->ah_st) 62 #endif 63 64 /* 65 * This lock is used to seralise register access for chips which have 66 * problems w/ SMP CPUs issuing concurrent PCI transactions. 67 * 68 * XXX This is a global lock for now; it should be pushed to 69 * a per-device lock in some platform-independent fashion. 70 */ 71 struct mtx ah_regser_mtx; 72 MTX_SYSINIT(ah_regser, &ah_regser_mtx, "Atheros register access mutex", 73 MTX_SPIN); 74 75 extern void ath_hal_printf(struct ath_hal *, const char*, ...) 76 __printflike(2,3); 77 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 78 __printflike(2, 0); 79 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 80 extern void *ath_hal_malloc(size_t); 81 extern void ath_hal_free(void *); 82 #ifdef AH_ASSERT 83 extern void ath_hal_assert_failed(const char* filename, 84 int lineno, const char* msg); 85 #endif 86 #ifdef AH_DEBUG 87 extern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...); 88 #endif /* AH_DEBUG */ 89 90 /* NB: put this here instead of the driver to avoid circular references */ 91 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 92 static SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, 93 "Atheros HAL parameters"); 94 95 #ifdef AH_DEBUG 96 int ath_hal_debug = 0; 97 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug, 98 0, "Atheros HAL debugging printfs"); 99 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug); 100 #endif /* AH_DEBUG */ 101 102 static MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 103 104 void* 105 ath_hal_malloc(size_t size) 106 { 107 return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 108 } 109 110 void 111 ath_hal_free(void* p) 112 { 113 free(p, M_ATH_HAL); 114 } 115 116 void 117 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 118 { 119 vprintf(fmt, ap); 120 } 121 122 void 123 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 124 { 125 va_list ap; 126 va_start(ap, fmt); 127 ath_hal_vprintf(ah, fmt, ap); 128 va_end(ap); 129 } 130 131 const char* 132 ath_hal_ether_sprintf(const u_int8_t *mac) 133 { 134 return ether_sprintf(mac); 135 } 136 137 #ifdef AH_DEBUG 138 139 /* This must match the definition in ath_hal/ah_debug.h */ 140 #define HAL_DEBUG_UNMASKABLE 0xf0000000 141 void 142 DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 143 { 144 if ((mask == HAL_DEBUG_UNMASKABLE) || 145 (ah != NULL && ah->ah_config.ah_debug & mask) || 146 (ath_hal_debug & mask)) { 147 __va_list ap; 148 va_start(ap, fmt); 149 ath_hal_vprintf(ah, fmt, ap); 150 va_end(ap); 151 } 152 } 153 #undef HAL_DEBUG_UNMASKABLE 154 #endif /* AH_DEBUG */ 155 156 #ifdef AH_DEBUG_ALQ 157 /* 158 * ALQ register tracing support. 159 * 160 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 161 * writes to the file /tmp/ath_hal.log. The file format is a simple 162 * fixed-size array of records. When done logging set hw.ath.hal.alq=0 163 * and then decode the file with the arcode program (that is part of the 164 * HAL). If you start+stop tracing the data will be appended to an 165 * existing file. 166 * 167 * NB: doesn't handle multiple devices properly; only one DEVICE record 168 * is emitted and the different devices are not identified. 169 */ 170 #include <sys/alq.h> 171 #include <sys/pcpu.h> 172 #include <dev/ath/ath_hal/ah_decode.h> 173 174 static struct alq *ath_hal_alq; 175 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 176 static u_int ath_hal_alq_lost; /* count of lost records */ 177 static char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log"; 178 179 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW, 180 &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile"); 181 182 static u_int ath_hal_alq_qsize = 64*1024; 183 184 static int 185 ath_hal_setlogging(int enable) 186 { 187 int error; 188 189 if (enable) { 190 error = alq_open(&ath_hal_alq, ath_hal_logfile, 191 curthread->td_ucred, ALQ_DEFAULT_CMODE, 192 sizeof (struct athregrec), ath_hal_alq_qsize); 193 ath_hal_alq_lost = 0; 194 ath_hal_alq_emitdev = 1; 195 printf("ath_hal: logging to %s enabled\n", 196 ath_hal_logfile); 197 } else { 198 if (ath_hal_alq) 199 alq_close(ath_hal_alq); 200 ath_hal_alq = NULL; 201 printf("ath_hal: logging disabled\n"); 202 error = 0; 203 } 204 return (error); 205 } 206 207 static int 208 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 209 { 210 int error, enable; 211 212 enable = (ath_hal_alq != NULL); 213 error = sysctl_handle_int(oidp, &enable, 0, req); 214 if (error || !req->newptr) 215 return (error); 216 else 217 return (ath_hal_setlogging(enable)); 218 } 219 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 220 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 221 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 222 &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 223 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 224 &ath_hal_alq_lost, 0, "Register operations not logged"); 225 226 static struct ale * 227 ath_hal_alq_get(struct ath_hal *ah) 228 { 229 struct ale *ale; 230 231 if (ath_hal_alq_emitdev) { 232 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 233 if (ale) { 234 struct athregrec *r = 235 (struct athregrec *) ale->ae_data; 236 r->op = OP_DEVICE; 237 r->reg = 0; 238 r->val = ah->ah_devid; 239 alq_post(ath_hal_alq, ale); 240 ath_hal_alq_emitdev = 0; 241 } else 242 ath_hal_alq_lost++; 243 } 244 ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 245 if (!ale) 246 ath_hal_alq_lost++; 247 return ale; 248 } 249 250 void 251 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 252 { 253 bus_space_tag_t tag = BUSTAG(ah); 254 bus_space_handle_t h = ah->ah_sh; 255 256 if (ath_hal_alq) { 257 struct ale *ale = ath_hal_alq_get(ah); 258 if (ale) { 259 struct athregrec *r = (struct athregrec *) ale->ae_data; 260 r->op = OP_WRITE; 261 r->reg = reg; 262 r->val = val; 263 alq_post(ath_hal_alq, ale); 264 } 265 } 266 if (ah->ah_config.ah_serialise_reg_war) 267 mtx_lock_spin(&ah_regser_mtx); 268 #if _BYTE_ORDER == _BIG_ENDIAN 269 if (OS_REG_UNSWAPPED(reg)) 270 bus_space_write_4(tag, h, reg, val); 271 else 272 #endif 273 bus_space_write_stream_4(tag, h, reg, val); 274 if (ah->ah_config.ah_serialise_reg_war) 275 mtx_unlock_spin(&ah_regser_mtx); 276 } 277 278 u_int32_t 279 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 280 { 281 bus_space_tag_t tag = BUSTAG(ah); 282 bus_space_handle_t h = ah->ah_sh; 283 u_int32_t val; 284 285 if (ah->ah_config.ah_serialise_reg_war) 286 mtx_lock_spin(&ah_regser_mtx); 287 #if _BYTE_ORDER == _BIG_ENDIAN 288 if (OS_REG_UNSWAPPED(reg)) 289 val = bus_space_read_4(tag, h, reg); 290 else 291 #endif 292 val = bus_space_read_stream_4(tag, h, reg); 293 if (ah->ah_config.ah_serialise_reg_war) 294 mtx_unlock_spin(&ah_regser_mtx); 295 if (ath_hal_alq) { 296 struct ale *ale = ath_hal_alq_get(ah); 297 if (ale) { 298 struct athregrec *r = (struct athregrec *) ale->ae_data; 299 r->op = OP_READ; 300 r->reg = reg; 301 r->val = val; 302 alq_post(ath_hal_alq, ale); 303 } 304 } 305 return val; 306 } 307 308 void 309 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 310 { 311 if (ath_hal_alq) { 312 struct ale *ale = ath_hal_alq_get(ah); 313 if (ale) { 314 struct athregrec *r = (struct athregrec *) ale->ae_data; 315 r->op = OP_MARK; 316 r->reg = id; 317 r->val = v; 318 alq_post(ath_hal_alq, ale); 319 } 320 } 321 } 322 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) 323 /* 324 * Memory-mapped device register read/write. These are here 325 * as routines when debugging support is enabled and/or when 326 * explicitly configured to use function calls. The latter is 327 * for architectures that might need to do something before 328 * referencing memory (e.g. remap an i/o window). 329 * 330 * NB: see the comments in ah_osdep.h about byte-swapping register 331 * reads and writes to understand what's going on below. 332 */ 333 334 void 335 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 336 { 337 bus_space_tag_t tag = BUSTAG(ah); 338 bus_space_handle_t h = ah->ah_sh; 339 340 if (ah->ah_config.ah_serialise_reg_war) 341 mtx_lock_spin(&ah_regser_mtx); 342 #if _BYTE_ORDER == _BIG_ENDIAN 343 if (OS_REG_UNSWAPPED(reg)) 344 bus_space_write_4(tag, h, reg, val); 345 else 346 #endif 347 bus_space_write_stream_4(tag, h, reg, val); 348 if (ah->ah_config.ah_serialise_reg_war) 349 mtx_unlock_spin(&ah_regser_mtx); 350 } 351 352 u_int32_t 353 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 354 { 355 bus_space_tag_t tag = BUSTAG(ah); 356 bus_space_handle_t h = ah->ah_sh; 357 u_int32_t val; 358 359 if (ah->ah_config.ah_serialise_reg_war) 360 mtx_lock_spin(&ah_regser_mtx); 361 #if _BYTE_ORDER == _BIG_ENDIAN 362 if (OS_REG_UNSWAPPED(reg)) 363 val = bus_space_read_4(tag, h, reg); 364 else 365 #endif 366 val = bus_space_read_stream_4(tag, h, reg); 367 if (ah->ah_config.ah_serialise_reg_war) 368 mtx_unlock_spin(&ah_regser_mtx); 369 return val; 370 } 371 #endif /* AH_DEBUG || AH_REGOPS_FUNC */ 372 373 #ifdef AH_ASSERT 374 void 375 ath_hal_assert_failed(const char* filename, int lineno, const char *msg) 376 { 377 printf("Atheros HAL assertion failure: %s: line %u: %s\n", 378 filename, lineno, msg); 379 panic("ath_hal_assert"); 380 } 381 #endif /* AH_ASSERT */ 382