1 /*- 2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_ata.h" 31 #include <sys/param.h> 32 #include <sys/module.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ata.h> 36 #include <sys/bus.h> 37 #include <sys/endian.h> 38 #include <sys/malloc.h> 39 #include <sys/lock.h> 40 #include <sys/mutex.h> 41 #include <sys/sema.h> 42 #include <sys/taskqueue.h> 43 #include <vm/uma.h> 44 #include <machine/stdarg.h> 45 #include <machine/resource.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/ata/ata-all.h> 51 #include <dev/ata/ata-pci.h> 52 #include <ata_if.h> 53 54 /* local prototypes */ 55 static int ata_ati_chipinit(device_t dev); 56 static int ata_ati_dumb_ch_attach(device_t dev); 57 static int ata_ati_ixp700_ch_attach(device_t dev); 58 static int ata_ati_setmode(device_t dev, int target, int mode); 59 60 /* misc defines */ 61 #define ATI_PATA 0x01 62 #define ATI_SATA 0x02 63 #define ATI_AHCI 0x04 64 #define SII_MEMIO 1 65 #define SII_BUG 0x04 66 67 static int force_ahci = 1; 68 TUNABLE_INT("hw.ahci.force", &force_ahci); 69 70 /* 71 * ATI chipset support functions 72 */ 73 static int 74 ata_ati_probe(device_t dev) 75 { 76 struct ata_pci_controller *ctlr = device_get_softc(dev); 77 static struct ata_chip_id ids[] = 78 {{ ATA_ATI_IXP200, 0x00, ATI_PATA, 0, ATA_UDMA5, "IXP200" }, 79 { ATA_ATI_IXP300, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP300" }, 80 { ATA_ATI_IXP300_S1, 0x00, ATI_SATA, 0, ATA_SA150, "IXP300" }, 81 { ATA_ATI_IXP400, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP400" }, 82 { ATA_ATI_IXP400_S1, 0x00, ATI_SATA, 0, ATA_SA150, "IXP400" }, 83 { ATA_ATI_IXP400_S2, 0x00, ATI_SATA, 0, ATA_SA150, "IXP400" }, 84 { ATA_ATI_IXP600, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP600" }, 85 { ATA_ATI_IXP600_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP600" }, 86 { ATA_ATI_IXP700, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP700/800" }, 87 { ATA_ATI_IXP700_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" }, 88 { ATA_ATI_IXP700_S2, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" }, 89 { ATA_ATI_IXP700_S3, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" }, 90 { ATA_ATI_IXP700_S4, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" }, 91 { ATA_ATI_IXP800_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP800" }, 92 { ATA_ATI_IXP800_S2, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP800" }, 93 { 0, 0, 0, 0, 0, 0}}; 94 95 if (pci_get_vendor(dev) != ATA_ATI_ID) 96 return ENXIO; 97 98 if (!(ctlr->chip = ata_match_chip(dev, ids))) 99 return ENXIO; 100 101 ata_set_desc(dev); 102 103 switch (ctlr->chip->cfg1) { 104 case ATI_PATA: 105 ctlr->chipinit = ata_ati_chipinit; 106 break; 107 case ATI_SATA: 108 /* 109 * the ATI SATA controller is actually a SiI 3112 controller 110 * cfg values below much match those in ata-siliconimage.c 111 */ 112 ctlr->chip->cfg1 = SII_MEMIO; 113 ctlr->chip->cfg2 = SII_BUG; 114 ctlr->chipinit = ata_sii_chipinit; 115 break; 116 case ATI_AHCI: 117 if (force_ahci == 1 || pci_get_subclass(dev) != PCIS_STORAGE_IDE) 118 ctlr->chipinit = ata_ahci_chipinit; 119 else 120 ctlr->chipinit = ata_ati_chipinit; 121 break; 122 } 123 return (BUS_PROBE_DEFAULT); 124 } 125 126 static int 127 ata_ati_chipinit(device_t dev) 128 { 129 struct ata_pci_controller *ctlr = device_get_softc(dev); 130 device_t smbdev; 131 uint8_t satacfg; 132 133 if (ata_setup_interrupt(dev, ata_generic_intr)) 134 return ENXIO; 135 136 if (ctlr->chip->cfg1 == ATI_AHCI) { 137 ctlr->ch_attach = ata_ati_dumb_ch_attach; 138 ctlr->setmode = ata_sata_setmode; 139 return (0); 140 } 141 switch (ctlr->chip->chipid) { 142 case ATA_ATI_IXP600: 143 /* IXP600 only has 1 PATA channel */ 144 ctlr->channels = 1; 145 break; 146 case ATA_ATI_IXP700: 147 /* 148 * When "combined mode" is enabled, an additional PATA channel is 149 * emulated with two SATA ports and appears on this device. 150 * This mode can only be detected via SMB controller. 151 */ 152 smbdev = pci_find_device(ATA_ATI_ID, 0x4385); 153 if (smbdev != NULL) { 154 satacfg = pci_read_config(smbdev, 0xad, 1); 155 if (bootverbose) 156 device_printf(dev, "SATA controller %s (%s%s channel)\n", 157 (satacfg & 0x01) == 0 ? "disabled" : "enabled", 158 (satacfg & 0x08) == 0 ? "" : "combined mode, ", 159 (satacfg & 0x10) == 0 ? "primary" : "secondary"); 160 ctlr->chipset_data = (void *)(uintptr_t)satacfg; 161 /* 162 * If SATA controller is enabled but combined mode is disabled, 163 * we have only one PATA channel. Ignore a non-existent channel. 164 */ 165 if ((satacfg & 0x09) == 0x01) 166 ctlr->ichannels &= ~(1 << ((satacfg & 0x10) >> 4)); 167 else { 168 ctlr->ch_attach = ata_ati_ixp700_ch_attach; 169 } 170 } 171 break; 172 } 173 174 ctlr->setmode = ata_ati_setmode; 175 return 0; 176 } 177 178 static int 179 ata_ati_dumb_ch_attach(device_t dev) 180 { 181 struct ata_channel *ch = device_get_softc(dev); 182 183 if (ata_pci_ch_attach(dev)) 184 return ENXIO; 185 ch->flags |= ATA_SATA; 186 return (0); 187 } 188 189 static int 190 ata_ati_ixp700_ch_attach(device_t dev) 191 { 192 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 193 struct ata_channel *ch = device_get_softc(dev); 194 uint8_t satacfg = (uint8_t)(uintptr_t)ctlr->chipset_data; 195 196 /* Setup the usual register normal pci style. */ 197 if (ata_pci_ch_attach(dev)) 198 return ENXIO; 199 200 /* One of channels is PATA, another is SATA. */ 201 if (ch->unit == ((satacfg & 0x10) >> 4)) 202 ch->flags |= ATA_SATA; 203 return (0); 204 } 205 206 static int 207 ata_ati_setmode(device_t dev, int target, int mode) 208 { 209 device_t parent = device_get_parent(dev); 210 struct ata_pci_controller *ctlr = device_get_softc(parent); 211 struct ata_channel *ch = device_get_softc(dev); 212 int devno = (ch->unit << 1) + target; 213 int offset = (devno ^ 0x01) << 3; 214 int piomode; 215 u_int8_t piotimings[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 }; 216 u_int8_t dmatimings[] = { 0x77, 0x21, 0x20 }; 217 218 mode = min(mode, ctlr->chip->max_dma); 219 if (mode >= ATA_UDMA0) { 220 /* Set UDMA mode, enable UDMA, set WDMA2/PIO4 */ 221 pci_write_config(parent, 0x56, 222 (pci_read_config(parent, 0x56, 2) & 223 ~(0xf << (devno << 2))) | 224 ((mode & ATA_MODE_MASK) << (devno << 2)), 2); 225 pci_write_config(parent, 0x54, 226 pci_read_config(parent, 0x54, 1) | 227 (0x01 << devno), 1); 228 pci_write_config(parent, 0x44, 229 (pci_read_config(parent, 0x44, 4) & 230 ~(0xff << offset)) | 231 (dmatimings[2] << offset), 4); 232 piomode = ATA_PIO4; 233 } else if (mode >= ATA_WDMA0) { 234 /* Disable UDMA, set WDMA mode and timings, calculate PIO. */ 235 pci_write_config(parent, 0x54, 236 pci_read_config(parent, 0x54, 1) & 237 ~(0x01 << devno), 1); 238 pci_write_config(parent, 0x44, 239 (pci_read_config(parent, 0x44, 4) & 240 ~(0xff << offset)) | 241 (dmatimings[mode & ATA_MODE_MASK] << offset), 4); 242 piomode = (mode == ATA_WDMA0) ? ATA_PIO0 : 243 (mode == ATA_WDMA1) ? ATA_PIO3 : ATA_PIO4; 244 } else { 245 /* Disable UDMA, set requested PIO. */ 246 pci_write_config(parent, 0x54, 247 pci_read_config(parent, 0x54, 1) & 248 ~(0x01 << devno), 1); 249 piomode = mode; 250 } 251 /* Set PIO mode and timings, calculated above. */ 252 pci_write_config(parent, 0x4a, 253 (pci_read_config(parent, 0x4a, 2) & 254 ~(0xf << (devno << 2))) | 255 ((piomode - ATA_PIO0) << (devno<<2)),2); 256 pci_write_config(parent, 0x40, 257 (pci_read_config(parent, 0x40, 4) & 258 ~(0xff << offset)) | 259 (piotimings[ata_mode2idx(piomode)] << offset), 4); 260 return (mode); 261 } 262 263 ATA_DECLARE_DRIVER(ata_ati); 264 MODULE_DEPEND(ata_ati, ata_ahci, 1, 1, 1); 265 MODULE_DEPEND(ata_ati, ata_sii, 1, 1, 1); 266