1 /*- 2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_ata.h" 31 #include <sys/param.h> 32 #include <sys/module.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/ata.h> 36 #include <sys/bus.h> 37 #include <sys/endian.h> 38 #include <sys/malloc.h> 39 #include <sys/lock.h> 40 #include <sys/mutex.h> 41 #include <sys/sema.h> 42 #include <sys/taskqueue.h> 43 #include <vm/uma.h> 44 #include <machine/stdarg.h> 45 #include <machine/resource.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/ata/ata-all.h> 51 #include <dev/ata/ata-pci.h> 52 #include <ata_if.h> 53 54 /* local prototypes */ 55 static int ata_ati_chipinit(device_t dev); 56 static int ata_ati_ixp700_ch_attach(device_t dev); 57 static int ata_ati_setmode(device_t dev, int target, int mode); 58 59 /* misc defines */ 60 #define ATI_PATA 0x01 61 #define ATI_SATA 0x02 62 #define ATI_AHCI 0x04 63 #define SII_MEMIO 1 64 #define SII_BUG 0x04 65 66 67 /* 68 * ATI chipset support functions 69 */ 70 static int 71 ata_ati_probe(device_t dev) 72 { 73 struct ata_pci_controller *ctlr = device_get_softc(dev); 74 static struct ata_chip_id ids[] = 75 {{ ATA_ATI_IXP200, 0x00, ATI_PATA, 0, ATA_UDMA5, "IXP200" }, 76 { ATA_ATI_IXP300, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP300" }, 77 { ATA_ATI_IXP300_S1, 0x00, ATI_SATA, 0, ATA_SA150, "IXP300" }, 78 { ATA_ATI_IXP400, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP400" }, 79 { ATA_ATI_IXP400_S1, 0x00, ATI_SATA, 0, ATA_SA150, "IXP400" }, 80 { ATA_ATI_IXP400_S2, 0x00, ATI_SATA, 0, ATA_SA150, "IXP400" }, 81 { ATA_ATI_IXP600, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP600" }, 82 { ATA_ATI_IXP600_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP600" }, 83 { ATA_ATI_IXP700, 0x00, ATI_PATA, 0, ATA_UDMA6, "IXP700/800" }, 84 { ATA_ATI_IXP700_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" }, 85 { ATA_ATI_IXP700_S2, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" }, 86 { ATA_ATI_IXP700_S3, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" }, 87 { ATA_ATI_IXP700_S4, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700/800" }, 88 { ATA_ATI_IXP800_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP800" }, 89 { ATA_ATI_IXP800_S2, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP800" }, 90 { 0, 0, 0, 0, 0, 0}}; 91 92 if (pci_get_vendor(dev) != ATA_ATI_ID) 93 return ENXIO; 94 95 if (!(ctlr->chip = ata_match_chip(dev, ids))) 96 return ENXIO; 97 98 ata_set_desc(dev); 99 100 switch (ctlr->chip->cfg1) { 101 case ATI_PATA: 102 ctlr->chipinit = ata_ati_chipinit; 103 break; 104 case ATI_SATA: 105 /* 106 * the ATI SATA controller is actually a SiI 3112 controller 107 * cfg values below much match those in ata-siliconimage.c 108 */ 109 ctlr->chip->cfg1 = SII_MEMIO; 110 ctlr->chip->cfg2 = SII_BUG; 111 ctlr->chipinit = ata_sii_chipinit; 112 break; 113 case ATI_AHCI: 114 ctlr->chipinit = ata_ahci_chipinit; 115 break; 116 } 117 return (BUS_PROBE_DEFAULT); 118 } 119 120 static int 121 ata_ati_chipinit(device_t dev) 122 { 123 struct ata_pci_controller *ctlr = device_get_softc(dev); 124 device_t smbdev; 125 uint8_t satacfg; 126 127 if (ata_setup_interrupt(dev, ata_generic_intr)) 128 return ENXIO; 129 130 switch (ctlr->chip->chipid) { 131 case ATA_ATI_IXP600: 132 /* IXP600 only has 1 PATA channel */ 133 ctlr->channels = 1; 134 break; 135 case ATA_ATI_IXP700: 136 /* 137 * When "combined mode" is enabled, an additional PATA channel is 138 * emulated with two SATA ports and appears on this device. 139 * This mode can only be detected via SMB controller. 140 */ 141 smbdev = pci_find_device(ATA_ATI_ID, 0x4385); 142 if (smbdev != NULL) { 143 satacfg = pci_read_config(smbdev, 0xad, 1); 144 if (bootverbose) 145 device_printf(dev, "SATA controller %s (%s%s channel)\n", 146 (satacfg & 0x01) == 0 ? "disabled" : "enabled", 147 (satacfg & 0x08) == 0 ? "" : "combined mode, ", 148 (satacfg & 0x10) == 0 ? "primary" : "secondary"); 149 ctlr->chipset_data = (void *)(uintptr_t)satacfg; 150 /* 151 * If SATA controller is enabled but combined mode is disabled, 152 * we have only one PATA channel. Ignore a non-existent channel. 153 */ 154 if ((satacfg & 0x09) == 0x01) 155 ctlr->ichannels &= ~(1 << ((satacfg & 0x10) >> 4)); 156 else { 157 ctlr->ch_attach = ata_ati_ixp700_ch_attach; 158 } 159 } 160 break; 161 } 162 163 ctlr->setmode = ata_ati_setmode; 164 return 0; 165 } 166 167 static int 168 ata_ati_ixp700_ch_attach(device_t dev) 169 { 170 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 171 struct ata_channel *ch = device_get_softc(dev); 172 uint8_t satacfg = (uint8_t)(uintptr_t)ctlr->chipset_data; 173 174 /* Setup the usual register normal pci style. */ 175 if (ata_pci_ch_attach(dev)) 176 return ENXIO; 177 178 /* One of channels is PATA, another is SATA. */ 179 if (ch->unit == ((satacfg & 0x10) >> 4)) 180 ch->flags |= ATA_SATA; 181 return (0); 182 } 183 184 static int 185 ata_ati_setmode(device_t dev, int target, int mode) 186 { 187 device_t parent = device_get_parent(dev); 188 struct ata_pci_controller *ctlr = device_get_softc(parent); 189 struct ata_channel *ch = device_get_softc(dev); 190 int devno = (ch->unit << 1) + target; 191 int offset = (devno ^ 0x01) << 3; 192 int piomode; 193 u_int8_t piotimings[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 }; 194 u_int8_t dmatimings[] = { 0x77, 0x21, 0x20 }; 195 196 mode = min(mode, ctlr->chip->max_dma); 197 if (mode >= ATA_UDMA0) { 198 /* Set UDMA mode, enable UDMA, set WDMA2/PIO4 */ 199 pci_write_config(parent, 0x56, 200 (pci_read_config(parent, 0x56, 2) & 201 ~(0xf << (devno << 2))) | 202 ((mode & ATA_MODE_MASK) << (devno << 2)), 2); 203 pci_write_config(parent, 0x54, 204 pci_read_config(parent, 0x54, 1) | 205 (0x01 << devno), 1); 206 pci_write_config(parent, 0x44, 207 (pci_read_config(parent, 0x44, 4) & 208 ~(0xff << offset)) | 209 (dmatimings[2] << offset), 4); 210 piomode = ATA_PIO4; 211 } else if (mode >= ATA_WDMA0) { 212 /* Disable UDMA, set WDMA mode and timings, calculate PIO. */ 213 pci_write_config(parent, 0x54, 214 pci_read_config(parent, 0x54, 1) & 215 ~(0x01 << devno), 1); 216 pci_write_config(parent, 0x44, 217 (pci_read_config(parent, 0x44, 4) & 218 ~(0xff << offset)) | 219 (dmatimings[mode & ATA_MODE_MASK] << offset), 4); 220 piomode = (mode == ATA_WDMA0) ? ATA_PIO0 : 221 (mode == ATA_WDMA1) ? ATA_PIO3 : ATA_PIO4; 222 } else { 223 /* Disable UDMA, set requested PIO. */ 224 pci_write_config(parent, 0x54, 225 pci_read_config(parent, 0x54, 1) & 226 ~(0x01 << devno), 1); 227 piomode = mode; 228 } 229 /* Set PIO mode and timings, calculated above. */ 230 pci_write_config(parent, 0x4a, 231 (pci_read_config(parent, 0x4a, 2) & 232 ~(0xf << (devno << 2))) | 233 ((piomode - ATA_PIO0) << (devno<<2)),2); 234 pci_write_config(parent, 0x40, 235 (pci_read_config(parent, 0x40, 4) & 236 ~(0xff << offset)) | 237 (piotimings[ata_mode2idx(piomode)] << offset), 4); 238 return (mode); 239 } 240 241 ATA_DECLARE_DRIVER(ata_ati); 242 MODULE_DEPEND(ata_ati, ata_ahci, 1, 1, 1); 243 MODULE_DEPEND(ata_ati, ata_sii, 1, 1, 1); 244