xref: /freebsd/sys/dev/ata/chipsets/ata-ati.c (revision 4a5216a6dc0c3ce4cf5f2d3ee8af0c3ff3402c4f)
1 /*-
2  * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification, immediately at the beginning of the file.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include "opt_ata.h"
31 #include <sys/param.h>
32 #include <sys/module.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/ata.h>
36 #include <sys/bus.h>
37 #include <sys/endian.h>
38 #include <sys/malloc.h>
39 #include <sys/lock.h>
40 #include <sys/mutex.h>
41 #include <sys/sema.h>
42 #include <sys/taskqueue.h>
43 #include <vm/uma.h>
44 #include <machine/stdarg.h>
45 #include <machine/resource.h>
46 #include <machine/bus.h>
47 #include <sys/rman.h>
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/ata/ata-all.h>
51 #include <dev/ata/ata-pci.h>
52 #include <ata_if.h>
53 
54 /* local prototypes */
55 static int ata_ati_chipinit(device_t dev);
56 static void ata_ati_setmode(device_t dev, int mode);
57 
58 /* misc defines */
59 #define ATI_PATA	0x01
60 #define ATI_SATA	0x02
61 #define ATI_AHCI	0x04
62 #define SII_MEMIO       1
63 #define SII_BUG         0x04
64 
65 
66 /*
67  * ATI chipset support functions
68  */
69 static int
70 ata_ati_probe(device_t dev)
71 {
72     struct ata_pci_controller *ctlr = device_get_softc(dev);
73     static struct ata_chip_id ids[] =
74     {{ ATA_ATI_IXP200,    0x00, ATI_PATA, 0, ATA_UDMA5, "IXP200" },
75      { ATA_ATI_IXP300,    0x00, ATI_PATA, 0, ATA_UDMA6, "IXP300" },
76      { ATA_ATI_IXP300_S1, 0x00, ATI_SATA, 0, ATA_SA150, "IXP300" },
77      { ATA_ATI_IXP400,    0x00, ATI_PATA, 0, ATA_UDMA6, "IXP400" },
78      { ATA_ATI_IXP400_S1, 0x00, ATI_SATA, 0, ATA_SA150, "IXP400" },
79      { ATA_ATI_IXP400_S2, 0x00, ATI_SATA, 0, ATA_SA150, "IXP400" },
80      { ATA_ATI_IXP600,    0x00, ATI_PATA, 0, ATA_UDMA6, "IXP600" },
81      { ATA_ATI_IXP600_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP600" },
82      { ATA_ATI_IXP700,    0x00, ATI_PATA, 0, ATA_UDMA6, "IXP700" },
83      { ATA_ATI_IXP700_S1, 0x00, ATI_AHCI, 0, ATA_SA300, "IXP700" },
84      { 0, 0, 0, 0, 0, 0}};
85 
86     if (pci_get_vendor(dev) != ATA_ATI_ID)
87 	return ENXIO;
88 
89     if (!(ctlr->chip = ata_match_chip(dev, ids)))
90 	return ENXIO;
91 
92     ata_set_desc(dev);
93 
94     switch (ctlr->chip->cfg1) {
95     case ATI_PATA:
96 	ctlr->chipinit = ata_ati_chipinit;
97 	break;
98     case ATI_SATA:
99 	/*
100 	 * the ATI SATA controller is actually a SiI 3112 controller
101 	 * cfg values below much match those in ata-siliconimage.c
102 	 */
103 	ctlr->chip->cfg1 = SII_MEMIO;
104 	ctlr->chip->cfg2 = SII_BUG;
105 	ctlr->chipinit = ata_sii_chipinit;
106 	break;
107     case ATI_AHCI:
108 	ctlr->chipinit = ata_ahci_chipinit;
109 	break;
110     }
111     return 0;
112 }
113 
114 static int
115 ata_ati_chipinit(device_t dev)
116 {
117     struct ata_pci_controller *ctlr = device_get_softc(dev);
118 
119     if (ata_setup_interrupt(dev, ata_generic_intr))
120 	return ENXIO;
121 
122     /* IXP600 & IXP700 only have 1 PATA channel */
123     if ((ctlr->chip->chipid == ATA_ATI_IXP600) ||
124 	(ctlr->chip->chipid == ATA_ATI_IXP700))
125 	ctlr->channels = 1;
126 
127     ctlr->setmode = ata_ati_setmode;
128     return 0;
129 }
130 
131 static void
132 ata_ati_setmode(device_t dev, int mode)
133 {
134     device_t gparent = GRANDPARENT(dev);
135     struct ata_pci_controller *ctlr = device_get_softc(gparent);
136     struct ata_channel *ch = device_get_softc(device_get_parent(dev));
137     struct ata_device *atadev = device_get_softc(dev);
138     int devno = (ch->unit << 1) + atadev->unit;
139     int offset = (devno ^ 0x01) << 3;
140     int error;
141     u_int8_t piotimings[] = { 0x5d, 0x47, 0x34, 0x22, 0x20, 0x34, 0x22, 0x20,
142 			      0x20, 0x20, 0x20, 0x20, 0x20, 0x20 };
143     u_int8_t dmatimings[] = { 0x77, 0x21, 0x20 };
144 
145     mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma);
146 
147     mode = ata_check_80pin(dev, mode);
148 
149     error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode);
150 
151     if (bootverbose)
152 	device_printf(dev, "%ssetting %s on %s chip\n",
153 		      (error) ? "FAILURE " : "",
154 		      ata_mode2str(mode), ctlr->chip->text);
155     if (!error) {
156 	if (mode >= ATA_UDMA0) {
157 	    pci_write_config(gparent, 0x56,
158 			     (pci_read_config(gparent, 0x56, 2) &
159 			      ~(0xf << (devno << 2))) |
160 			     ((mode & ATA_MODE_MASK) << (devno << 2)), 2);
161 	    pci_write_config(gparent, 0x54,
162 			     pci_read_config(gparent, 0x54, 1) |
163 			     (0x01 << devno), 1);
164 	    pci_write_config(gparent, 0x44,
165 			     (pci_read_config(gparent, 0x44, 4) &
166 			      ~(0xff << offset)) |
167 			     (dmatimings[2] << offset), 4);
168 	}
169 	else if (mode >= ATA_WDMA0) {
170 	    pci_write_config(gparent, 0x54,
171 			     pci_read_config(gparent, 0x54, 1) &
172 			      ~(0x01 << devno), 1);
173 	    pci_write_config(gparent, 0x44,
174 			     (pci_read_config(gparent, 0x44, 4) &
175 			      ~(0xff << offset)) |
176 			     (dmatimings[mode & ATA_MODE_MASK] << offset), 4);
177 	}
178 	else
179 	    pci_write_config(gparent, 0x54,
180 			     pci_read_config(gparent, 0x54, 1) &
181 			     ~(0x01 << devno), 1);
182 
183 	pci_write_config(gparent, 0x4a,
184 			 (pci_read_config(gparent, 0x4a, 2) &
185 			  ~(0xf << (devno << 2))) |
186 			 (((mode - ATA_PIO0) & ATA_MODE_MASK) << (devno<<2)),2);
187 	pci_write_config(gparent, 0x40,
188 			 (pci_read_config(gparent, 0x40, 4) &
189 			  ~(0xff << offset)) |
190 			 (piotimings[ata_mode2idx(mode)] << offset), 4);
191 	atadev->mode = mode;
192     }
193 }
194 
195 ATA_DECLARE_DRIVER(ata_ati);
196 MODULE_DEPEND(ata_ati, ata_ahci, 1, 1, 1);
197 MODULE_DEPEND(ata_ati, ata_sii, 1, 1, 1);
198